if_iwireg.h revision 1.11
1 /* $NetBSD: if_iwireg.h,v 1.11 2005/10/08 06:19:46 skrll Exp $ */ 2 3 /*- 4 * Copyright (c) 2004, 2005 5 * Damien Bergamini <damien.bergamini (at) free.fr>. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice unmodified, this list of conditions, and the following 12 * disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 */ 29 30 #define IWI_CMD_RING_COUNT 16 31 #define IWI_TX_RING_COUNT 64 32 #define IWI_RX_RING_COUNT 32 33 34 #define IWI_TX_DESC_SIZE (sizeof (struct iwi_tx_desc)) 35 #define IWI_CMD_DESC_SIZE (sizeof (struct iwi_cmd_desc)) 36 37 #define IWI_CSR_INTR 0x0008 38 #define IWI_CSR_INTR_MASK 0x000c 39 #define IWI_CSR_INDIRECT_ADDR 0x0010 40 #define IWI_CSR_INDIRECT_DATA 0x0014 41 #define IWI_CSR_AUTOINC_ADDR 0x0018 42 #define IWI_CSR_AUTOINC_DATA 0x001c 43 #define IWI_CSR_RST 0x0020 44 #define IWI_CSR_CTL 0x0024 45 #define IWI_CSR_IO 0x0030 46 #define IWI_CSR_CMD_BASE 0x0200 47 #define IWI_CSR_CMD_SIZE 0x0204 48 #define IWI_CSR_TX1_BASE 0x0208 49 #define IWI_CSR_TX1_SIZE 0x020c 50 #define IWI_CSR_TX2_BASE 0x0210 51 #define IWI_CSR_TX2_SIZE 0x0214 52 #define IWI_CSR_TX3_BASE 0x0218 53 #define IWI_CSR_TX3_SIZE 0x021c 54 #define IWI_CSR_TX4_BASE 0x0220 55 #define IWI_CSR_TX4_SIZE 0x0224 56 #define IWI_CSR_CMD_RIDX 0x0280 57 #define IWI_CSR_TX1_RIDX 0x0284 58 #define IWI_CSR_TX2_RIDX 0x0288 59 #define IWI_CSR_TX3_RIDX 0x028c 60 #define IWI_CSR_TX4_RIDX 0x0290 61 #define IWI_CSR_RX_RIDX 0x02a0 62 #define IWI_CSR_RX_BASE 0x0500 63 #define IWI_CSR_TABLE0_SIZE 0x0700 64 #define IWI_CSR_TABLE0_BASE 0x0704 65 #define IWI_CSR_CURRENT_TX_RATE IWI_CSR_TABLE0_BASE 66 #define IWI_CSR_CMD_WIDX 0x0f80 67 #define IWI_CSR_TX1_WIDX 0x0f84 68 #define IWI_CSR_TX2_WIDX 0x0f88 69 #define IWI_CSR_TX3_WIDX 0x0f8c 70 #define IWI_CSR_TX4_WIDX 0x0f90 71 #define IWI_CSR_RX_WIDX 0x0fa0 72 #define IWI_CSR_READ_INT 0x0ff4 73 74 /* possible flags for IWI_CSR_INTR */ 75 #define IWI_INTR_RX_DONE 0x00000002 76 #define IWI_INTR_CMD_DONE 0x00000800 77 #define IWI_INTR_TX1_DONE 0x00001000 78 #define IWI_INTR_TX2_DONE 0x00002000 79 #define IWI_INTR_TX3_DONE 0x00004000 80 #define IWI_INTR_TX4_DONE 0x00008000 81 #define IWI_INTR_FW_INITED 0x01000000 82 #define IWI_INTR_RADIO_OFF 0x04000000 83 #define IWI_INTR_FATAL_ERROR 0x40000000 84 #define IWI_INTR_PARITY_ERROR 0x80000000 85 86 #define IWI_INTR_MASK \ 87 (IWI_INTR_RX_DONE | IWI_INTR_CMD_DONE | \ 88 IWI_INTR_TX1_DONE | IWI_INTR_TX2_DONE | \ 89 IWI_INTR_TX3_DONE | IWI_INTR_TX4_DONE | \ 90 IWI_INTR_FW_INITED | IWI_INTR_RADIO_OFF | \ 91 IWI_INTR_FATAL_ERROR | IWI_INTR_PARITY_ERROR) 92 93 /* possible flags for register IWI_CSR_RST */ 94 #define IWI_RST_PRINCETON_RESET 0x00000001 95 #define IWI_RST_SW_RESET 0x00000080 96 #define IWI_RST_MASTER_DISABLED 0x00000100 97 #define IWI_RST_STOP_MASTER 0x00000200 98 99 /* possible flags for register IWI_CSR_CTL */ 100 #define IWI_CTL_CLOCK_READY 0x00000001 101 #define IWI_CTL_ALLOW_STANDBY 0x00000002 102 #define IWI_CTL_INIT 0x00000004 103 104 /* possible flags for register IWI_CSR_IO */ 105 #define IWI_IO_RADIO_ENABLED 0x00010000 106 107 /* possible flags for IWI_CSR_READ_INT */ 108 #define IWI_READ_INT_INIT_HOST 0x20000000 109 110 /* table2 offsets */ 111 #define IWI_INFO_ADAPTER_MAC 40 112 113 /* constants for command blocks */ 114 #define IWI_CB_DEFAULT_CTL 0x8cea0000 115 #define IWI_CB_MAXDATALEN 8191 116 117 /* supported rates */ 118 #define IWI_RATE_DS1 10 119 #define IWI_RATE_DS2 20 120 #define IWI_RATE_DS5 55 121 #define IWI_RATE_DS11 110 122 #define IWI_RATE_OFDM6 13 123 #define IWI_RATE_OFDM9 15 124 #define IWI_RATE_OFDM12 5 125 #define IWI_RATE_OFDM18 7 126 #define IWI_RATE_OFDM24 9 127 #define IWI_RATE_OFDM36 11 128 #define IWI_RATE_OFDM48 1 129 #define IWI_RATE_OFDM54 3 130 131 struct iwi_hdr { 132 uint8_t type; 133 #define IWI_HDR_TYPE_DATA 0 134 #define IWI_HDR_TYPE_COMMAND 1 135 #define IWI_HDR_TYPE_NOTIF 3 136 #define IWI_HDR_TYPE_FRAME 9 137 138 uint8_t seq; 139 uint8_t flags; 140 #define IWI_HDR_FLAG_IRQ 0x04 141 142 uint8_t reserved; 143 } __attribute__((__packed__)); 144 145 struct iwi_notif { 146 uint32_t reserved[2]; 147 uint8_t type; 148 #define IWI_NOTIF_TYPE_ASSOCIATION 10 149 #define IWI_NOTIF_TYPE_AUTHENTICATION 11 150 #define IWI_NOTIF_TYPE_SCAN_CHANNEL 12 151 #define IWI_NOTIF_TYPE_SCAN_COMPLETE 13 152 #define IWI_NOTIF_TYPE_BEACON 17 153 #define IWI_NOTIF_TYPE_CALIBRATION 20 154 #define IWI_NOTIF_TYPE_NOISE 25 155 156 uint8_t flags; 157 uint16_t len; 158 } __attribute__((__packed__)); 159 160 /* structure for notification IWI_NOTIF_TYPE_AUTHENTICATION */ 161 struct iwi_notif_authentication { 162 uint8_t state; 163 #define IWI_DEAUTHENTICATED 0 164 #define IWI_AUTHENTICATED 9 165 } __attribute__((__packed__)); 166 167 /* structure for notification IWI_NOTIF_TYPE_ASSOCIATION */ 168 struct iwi_notif_association { 169 uint8_t state; 170 #define IWI_DEASSOCIATED 0 171 #define IWI_ASSOCIATED 12 172 173 struct ieee80211_frame frame; 174 uint16_t capinfo; 175 uint16_t status; 176 uint16_t associd; 177 } __attribute__((__packed__)); 178 179 /* structure for notification IWI_NOTIF_TYPE_SCAN_CHANNEL */ 180 struct iwi_notif_scan_channel { 181 uint8_t nchan; 182 uint8_t reserved[47]; 183 } __attribute__((__packed__)); 184 185 /* structure for notification IWI_NOTIF_TYPE_SCAN_COMPLETE */ 186 struct iwi_notif_scan_complete { 187 uint8_t type; 188 uint8_t nchan; 189 uint8_t status; 190 uint8_t reserved; 191 } __attribute__((__packed__)); 192 193 /* received frame header */ 194 struct iwi_frame { 195 uint32_t reserved1[2]; 196 uint8_t chan; 197 uint8_t status; 198 uint8_t rate; 199 uint8_t rssi; /* receiver signal strength indicator */ 200 uint8_t agc; /* automatic gain control */ 201 uint8_t rssi_dbm; 202 uint16_t signal; 203 uint16_t noise; 204 uint8_t antenna; 205 uint8_t control; 206 uint8_t reserved2[2]; 207 uint16_t len; 208 } __attribute__((__packed__)); 209 210 /* header for transmission */ 211 struct iwi_tx_desc { 212 struct iwi_hdr hdr; 213 uint32_t reserved1; 214 uint8_t station; 215 uint8_t reserved2[3]; 216 uint8_t cmd; 217 #define IWI_DATA_CMD_TX 0x0b 218 219 uint8_t seq; 220 uint16_t len; 221 uint8_t priority; 222 uint8_t flags; 223 #define IWI_DATA_FLAG_SHPREAMBLE 0x04 224 #define IWI_DATA_FLAG_NO_WEP 0x20 225 #define IWI_DATA_FLAG_NEED_ACK 0x80 226 227 uint8_t xflags; 228 uint8_t wep_txkey; 229 uint8_t wepkey[IEEE80211_KEYBUF_SIZE]; 230 uint8_t rate; 231 uint8_t antenna; 232 uint8_t reserved3[10]; 233 struct ieee80211_qosframe_addr4 wh; 234 uint32_t iv; 235 uint32_t eiv; 236 uint32_t nseg; 237 #define IWI_MAX_NSEG 6 238 239 uint32_t seg_addr[IWI_MAX_NSEG]; 240 uint16_t seg_len[IWI_MAX_NSEG]; 241 } __attribute__((__packed__)); 242 243 /* command */ 244 struct iwi_cmd_desc { 245 struct iwi_hdr hdr; 246 uint8_t type; 247 #define IWI_CMD_ENABLE 2 248 #define IWI_CMD_SET_CONFIGURATION 6 249 #define IWI_CMD_SET_ESSID 8 250 #define IWI_CMD_SET_MAC_ADDRESS 11 251 #define IWI_CMD_SET_RTS_THRESHOLD 15 252 #define IWI_CMD_SET_FRAG_THRESHOLD 16 253 #define IWI_CMD_SET_POWER_MODE 17 254 #define IWI_CMD_SET_WEP_KEY 18 255 #define IWI_CMD_SCAN 20 256 #define IWI_CMD_ASSOCIATE 21 257 #define IWI_CMD_SET_RATES 22 258 #define IWI_CMD_ABORT_SCAN 23 259 #define IWI_CMD_SCAN_V2 26 260 #define IWI_CMD_SET_OPTIE 31 261 #define IWI_CMD_DISABLE 33 262 #define IWI_CMD_SET_IV 34 263 #define IWI_CMD_SET_TX_POWER 35 264 #define IWI_CMD_SET_SENSITIVITY 42 265 266 uint8_t len; 267 uint16_t reserved; 268 uint8_t data[120]; 269 } __attribute__((__packed__)); 270 271 /* constants for 'mode' fields */ 272 #define IWI_MODE_11A 0 273 #define IWI_MODE_11B 1 274 #define IWI_MODE_11G 2 275 276 /* possible values for command IWI_CMD_SET_POWER_MODE */ 277 #define IWI_POWER_MODE_CAM 0 278 279 /* structure for command IWI_CMD_SET_RATES */ 280 struct iwi_rateset { 281 uint8_t mode; 282 uint8_t nrates; 283 uint8_t type; 284 #define IWI_RATESET_TYPE_NEGOTIATED 0 285 #define IWI_RATESET_TYPE_SUPPORTED 1 286 287 uint8_t reserved; 288 uint8_t rates[12]; 289 } __attribute__((__packed__)); 290 291 /* structure for command IWI_CMD_SET_TX_POWER */ 292 struct iwi_txpower { 293 uint8_t nchan; 294 uint8_t mode; 295 struct { 296 uint8_t chan; 297 uint8_t power; 298 #define IWI_TXPOWER_MAX 20 299 #define IWI_TXPOWER_RATIO (IEEE80211_TXPOWER_MAX / IWI_TXPOWER_MAX) 300 } __attribute__((__packed__)) chan[37]; 301 } __attribute__((__packed__)); 302 303 /* structure for command IWI_CMD_ASSOCIATE */ 304 struct iwi_associate { 305 uint8_t chan; 306 uint8_t auth; 307 #define IWI_AUTH_OPEN 0 308 #define IWI_AUTH_SHARED 1 309 #define IWI_AUTH_NONE 3 310 311 uint8_t type; 312 uint8_t reserved1; 313 uint16_t policy; 314 #define IWI_POLICY_OPTIE 2 315 316 uint8_t plen; 317 uint8_t mode; 318 uint8_t bssid[IEEE80211_ADDR_LEN]; 319 uint8_t tstamp[8]; 320 uint16_t capinfo; 321 uint16_t lintval; 322 uint16_t intval; 323 uint8_t dst[IEEE80211_ADDR_LEN]; 324 uint32_t reserved3; 325 uint16_t reserved4; 326 } __attribute__((__packed__)); 327 328 #define IWI_SCAN_CHANNELS 54 329 330 #define IWI_SCAN_TYPE_FIRST_BEACON 0 331 #define IWI_SCAN_TYPE_PASSIVE 1 332 #define IWI_SCAN_TYPE_ACTIVE_DIRECT 2 333 #define IWI_SCAN_TYPE_ACTIVE_BROADCAST 3 334 #define IWI_SCAN_TYPE_ACTIVE_BDIRECT 4 335 #define IWI_SCAN_TYPES 5 336 337 #define iwi_scan_type_set(s, i, t) \ 338 do { \ 339 if ((i) % 2 == 0) \ 340 (s).type[(i) / 2].lsn = (t); \ 341 else \ 342 (s).type[(i) / 2].msn = (t); \ 343 } while(0) 344 345 /* structure for command IWI_CMD_SCAN_V2 */ 346 struct iwi_scan_v2 { 347 u_int32_t fsidx; 348 u_int8_t channels[IWI_SCAN_CHANNELS]; 349 #define IWI_CHAN_5GHZ (0 << 6) 350 #define IWI_CHAN_2GHZ (1 << 6) 351 352 struct { 353 u_int8_t msn:4; 354 u_int8_t lsn:4; 355 } __attribute__ ((__packed__)) type[IWI_SCAN_CHANNELS / 2]; 356 357 u_int8_t reserved1; 358 u_int16_t dwelltime[IWI_SCAN_TYPES]; 359 360 } __attribute__ ((__packed__)); 361 362 /* structure for command IWI_CMD_SET_CONFIGURATION */ 363 struct iwi_configuration { 364 uint8_t bluetooth_coexistence; 365 uint8_t reserved1; 366 uint8_t answer_pbreq; 367 uint8_t allow_invalid_frames; 368 uint8_t multicast_enabled; 369 uint8_t drop_unicast_unencrypted; 370 uint8_t disable_unicast_decryption; 371 uint8_t drop_multicast_unencrypted; 372 uint8_t disable_multicast_decryption; 373 uint8_t antenna; 374 uint8_t reserved2; 375 uint8_t use_protection; 376 uint8_t protection_ctsonly; 377 uint8_t enable_multicast_filtering; 378 uint8_t bluetooth_threshold; 379 uint8_t reserved4; 380 uint8_t allow_beacon_and_probe_resp; 381 uint8_t allow_mgt; 382 uint8_t noise_reported; 383 uint8_t reserved5; 384 } __attribute__((__packed__)); 385 386 /* structure for command IWI_CMD_SET_WEP_KEY */ 387 struct iwi_wep_key { 388 uint8_t cmd; 389 #define IWI_WEP_KEY_CMD_SETKEY 0x08 390 391 uint8_t seq; 392 uint8_t idx; 393 uint8_t len; 394 uint8_t key[IEEE80211_KEYBUF_SIZE]; 395 } __attribute__((__packed__)); 396 397 /* EEPROM = Electrically Erasable Programmable Read-Only Memory */ 398 399 #define IWI_MEM_EEPROM_CTL 0x00300040 400 401 #define IWI_EEPROM_MAC 0x21 402 403 #define IWI_EEPROM_DELAY 1 /* minimum hold time (microsecond) */ 404 405 #define IWI_EEPROM_C (1 << 0) /* Serial Clock */ 406 #define IWI_EEPROM_S (1 << 1) /* Chip Select */ 407 #define IWI_EEPROM_D (1 << 2) /* Serial data input */ 408 #define IWI_EEPROM_Q (1 << 4) /* Serial data output */ 409 410 #define IWI_EEPROM_SHIFT_D 2 411 #define IWI_EEPROM_SHIFT_Q 4 412 413 /* 414 * control and status registers access macros 415 */ 416 #define CSR_READ_1(sc, reg) \ 417 bus_space_read_1((sc)->sc_st, (sc)->sc_sh, (reg)) 418 419 #define CSR_READ_2(sc, reg) \ 420 bus_space_read_2((sc)->sc_st, (sc)->sc_sh, (reg)) 421 422 #define CSR_READ_4(sc, reg) \ 423 bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg)) 424 425 #define CSR_READ_REGION_4(sc, offset, datap, count) \ 426 bus_space_read_region_4((sc)->sc_st, (sc)->sc_sh, (offset), \ 427 (datap), (count)) 428 429 #define CSR_WRITE_1(sc, reg, val) \ 430 bus_space_write_1((sc)->sc_st, (sc)->sc_sh, (reg), (val)) 431 432 #define CSR_WRITE_2(sc, reg, val) \ 433 bus_space_write_2((sc)->sc_st, (sc)->sc_sh, (reg), (val)) 434 435 #define CSR_WRITE_4(sc, reg, val) \ 436 bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val)) 437 438 /* 439 * indirect memory space access macros 440 */ 441 #define MEM_WRITE_1(sc, addr, val) do { \ 442 CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr)); \ 443 CSR_WRITE_1((sc), IWI_CSR_INDIRECT_DATA, (val)); \ 444 } while (/* CONSTCOND */0) 445 446 #define MEM_WRITE_2(sc, addr, val) do { \ 447 CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr)); \ 448 CSR_WRITE_2((sc), IWI_CSR_INDIRECT_DATA, (val)); \ 449 } while (/* CONSTCOND */0) 450 451 #define MEM_WRITE_4(sc, addr, val) do { \ 452 CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr)); \ 453 CSR_WRITE_4((sc), IWI_CSR_INDIRECT_DATA, (val)); \ 454 } while (/* CONSTCOND */0) 455 456 #define MEM_WRITE_MULTI_1(sc, addr, buf, len) do { \ 457 CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr)); \ 458 CSR_WRITE_MULTI_1((sc), IWI_CSR_INDIRECT_DATA, (buf), (len)); \ 459 } while (/* CONSTCOND */0) 460 461 /* 462 * EEPROM access macro 463 */ 464 #define IWI_EEPROM_CTL(sc, val) do { \ 465 MEM_WRITE_4((sc), IWI_MEM_EEPROM_CTL, (val)); \ 466 DELAY(IWI_EEPROM_DELAY); \ 467 } while (/* CONSTCOND */0) 468
Indexes created Mon Sep 29 21:09:56 GMT 2025