if_iwireg.h revision 1.6
1 /* $NetBSD: if_iwireg.h,v 1.6 2005/09/12 21:15:04 skrll Exp $ */ 2 3 /*- 4 * Copyright (c) 2004, 2005 5 * Damien Bergamini <damien.bergamini (at) free.fr>. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice unmodified, this list of conditions, and the following 12 * disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 */ 29 30 #define IWI_CMD_RING_COUNT 16 31 #define IWI_TX_RING_COUNT 64 32 #define IWI_RX_RING_COUNT 32 33 34 #define IWI_CSR_INTR 0x0008 35 #define IWI_CSR_INTR_MASK 0x000c 36 #define IWI_CSR_INDIRECT_ADDR 0x0010 37 #define IWI_CSR_INDIRECT_DATA 0x0014 38 #define IWI_CSR_AUTOINC_ADDR 0x0018 39 #define IWI_CSR_AUTOINC_DATA 0x001c 40 #define IWI_CSR_RST 0x0020 41 #define IWI_CSR_CTL 0x0024 42 #define IWI_CSR_IO 0x0030 43 #define IWI_CSR_CMD_BASE 0x0200 44 #define IWI_CSR_CMD_SIZE 0x0204 45 #define IWI_CSR_TX1_BASE 0x0208 46 #define IWI_CSR_TX1_SIZE 0x020c 47 #define IWI_CSR_TX2_BASE 0x0210 48 #define IWI_CSR_TX2_SIZE 0x0214 49 #define IWI_CSR_TX3_BASE 0x0218 50 #define IWI_CSR_TX3_SIZE 0x021c 51 #define IWI_CSR_TX4_BASE 0x0220 52 #define IWI_CSR_TX4_SIZE 0x0224 53 #define IWI_CSR_CMD_RIDX 0x0280 54 #define IWI_CSR_TX1_RIDX 0x0284 55 #define IWI_CSR_TX2_RIDX 0x0288 56 #define IWI_CSR_TX3_RIDX 0x028c 57 #define IWI_CSR_TX4_RIDX 0x0290 58 #define IWI_CSR_RX_RIDX 0x02a0 59 #define IWI_CSR_RX_BASE 0x0500 60 #define IWI_CSR_TABLE0_SIZE 0x0700 61 #define IWI_CSR_TABLE0_BASE 0x0704 62 #define IWI_CSR_CURRENT_TX_RATE IWI_CSR_TABLE0_BASE 63 #define IWI_CSR_CMD_WIDX 0x0f80 64 #define IWI_CSR_TX1_WIDX 0x0f84 65 #define IWI_CSR_TX2_WIDX 0x0f88 66 #define IWI_CSR_TX3_WIDX 0x0f8c 67 #define IWI_CSR_TX4_WIDX 0x0f90 68 #define IWI_CSR_RX_WIDX 0x0fa0 69 #define IWI_CSR_READ_INT 0x0ff4 70 71 /* possible flags for IWI_CSR_INTR */ 72 #define IWI_INTR_RX_DONE 0x00000002 73 #define IWI_INTR_CMD_DONE 0x00000800 74 #define IWI_INTR_TX1_DONE 0x00001000 75 #define IWI_INTR_TX2_DONE 0x00002000 76 #define IWI_INTR_TX3_DONE 0x00004000 77 #define IWI_INTR_TX4_DONE 0x00008000 78 #define IWI_INTR_FW_INITED 0x01000000 79 #define IWI_INTR_RADIO_OFF 0x04000000 80 #define IWI_INTR_FATAL_ERROR 0x40000000 81 #define IWI_INTR_PARITY_ERROR 0x80000000 82 83 #define IWI_INTR_MASK \ 84 (IWI_INTR_RX_DONE | IWI_INTR_CMD_DONE | \ 85 IWI_INTR_TX1_DONE | IWI_INTR_TX2_DONE | \ 86 IWI_INTR_TX3_DONE | IWI_INTR_TX4_DONE | \ 87 IWI_INTR_FW_INITED | IWI_INTR_RADIO_OFF | \ 88 IWI_INTR_FATAL_ERROR | IWI_INTR_PARITY_ERROR) 89 90 /* possible flags for register IWI_CSR_RST */ 91 #define IWI_RST_PRINCETON_RESET 0x00000001 92 #define IWI_RST_SW_RESET 0x00000080 93 #define IWI_RST_MASTER_DISABLED 0x00000100 94 #define IWI_RST_STOP_MASTER 0x00000200 95 96 /* possible flags for register IWI_CSR_CTL */ 97 #define IWI_CTL_CLOCK_READY 0x00000001 98 #define IWI_CTL_ALLOW_STANDBY 0x00000002 99 #define IWI_CTL_INIT 0x00000004 100 101 /* possible flags for register IWI_CSR_IO */ 102 #define IWI_IO_RADIO_ENABLED 0x00010000 103 104 /* possible flags for IWI_CSR_READ_INT */ 105 #define IWI_READ_INT_INIT_HOST 0x20000000 106 107 /* table2 offsets */ 108 #define IWI_INFO_ADAPTER_MAC 40 109 110 /* constants for command blocks */ 111 #define IWI_CB_DEFAULT_CTL 0x8cea0000 112 #define IWI_CB_MAXDATALEN 8191 113 114 /* supported rates */ 115 #define IWI_RATE_DS1 10 116 #define IWI_RATE_DS2 20 117 #define IWI_RATE_DS5 55 118 #define IWI_RATE_DS11 110 119 #define IWI_RATE_OFDM6 13 120 #define IWI_RATE_OFDM9 15 121 #define IWI_RATE_OFDM12 5 122 #define IWI_RATE_OFDM18 7 123 #define IWI_RATE_OFDM24 9 124 #define IWI_RATE_OFDM36 11 125 #define IWI_RATE_OFDM48 1 126 #define IWI_RATE_OFDM54 3 127 128 struct iwi_hdr { 129 u_int8_t type; 130 #define IWI_HDR_TYPE_DATA 0 131 #define IWI_HDR_TYPE_COMMAND 1 132 #define IWI_HDR_TYPE_NOTIF 3 133 #define IWI_HDR_TYPE_FRAME 9 134 u_int8_t seq; 135 u_int8_t flags; 136 #define IWI_HDR_FLAG_IRQ 0x04 137 u_int8_t reserved; 138 } __attribute__((__packed__)); 139 140 struct iwi_notif { 141 u_int32_t reserved[2]; 142 u_int8_t type; 143 #define IWI_NOTIF_TYPE_ASSOCIATION 10 144 #define IWI_NOTIF_TYPE_AUTHENTICATION 11 145 #define IWI_NOTIF_TYPE_SCAN_CHANNEL 12 146 #define IWI_NOTIF_TYPE_SCAN_COMPLETE 13 147 #define IWI_NOTIF_TYPE_BEACON 17 148 #define IWI_NOTIF_TYPE_CALIBRATION 20 149 #define IWI_NOTIF_TYPE_NOISE 25 150 u_int8_t flags; 151 u_int16_t len; 152 } __attribute__((__packed__)); 153 154 /* structure for notification IWI_NOTIF_TYPE_AUTHENTICATION */ 155 struct iwi_notif_authentication { 156 u_int8_t state; 157 #define IWI_DEAUTHENTICATED 0 158 #define IWI_AUTHENTICATED 9 159 } __attribute__((__packed__)); 160 161 /* structure for notification IWI_NOTIF_TYPE_ASSOCIATION */ 162 struct iwi_notif_association { 163 u_int8_t state; 164 #define IWI_DEASSOCIATED 0 165 #define IWI_ASSOCIATED 12 166 167 struct ieee80211_frame frame; 168 u_int16_t capinfo; 169 u_int16_t status; 170 u_int16_t associd; 171 } __attribute__((__packed__)); 172 173 /* structure for notification IWI_NOTIF_TYPE_SCAN_CHANNEL */ 174 struct iwi_notif_scan_channel { 175 u_int8_t nchan; 176 u_int8_t reserved[47]; 177 } __attribute__((__packed__)); 178 179 /* structure for notification IWI_NOTIF_TYPE_SCAN_COMPLETE */ 180 struct iwi_notif_scan_complete { 181 u_int8_t type; 182 u_int8_t nchan; 183 u_int8_t status; 184 u_int8_t reserved; 185 } __attribute__((__packed__)); 186 187 /* received frame header */ 188 struct iwi_frame { 189 u_int32_t reserved1[2]; 190 u_int8_t chan; 191 u_int8_t status; 192 u_int8_t rate; 193 u_int8_t rssi; /* receiver signal strength indicator */ 194 u_int8_t agc; /* automatic gain control */ 195 u_int8_t rssi_dbm; 196 u_int16_t signal; 197 u_int16_t noise; 198 u_int8_t antenna; 199 u_int8_t control; 200 u_int8_t reserved2[2]; 201 u_int16_t len; 202 } __attribute__((__packed__)); 203 204 /* header for transmission */ 205 struct iwi_tx_desc { 206 struct iwi_hdr hdr; 207 u_int32_t reserved1; 208 u_int8_t station; 209 u_int8_t reserved2[3]; 210 u_int8_t cmd; 211 #define IWI_DATA_CMD_TX 0x0b 212 u_int8_t seq; 213 u_int16_t len; 214 u_int8_t priority; 215 u_int8_t flags; 216 #define IWI_DATA_FLAG_SHPREAMBLE 0x04 217 #define IWI_DATA_FLAG_NO_WEP 0x20 218 #define IWI_DATA_FLAG_NEED_ACK 0x80 219 u_int8_t xflags; 220 u_int8_t wep_txkey; 221 u_int8_t wepkey[IEEE80211_KEYBUF_SIZE]; 222 u_int8_t rate; 223 u_int8_t antenna; 224 u_int8_t reserved3[10]; 225 226 struct ieee80211_qosframe_addr4 wh; 227 u_int32_t iv; 228 u_int32_t eiv; 229 230 u_int32_t nseg; 231 #define IWI_MAX_NSEG 6 232 u_int32_t seg_addr[IWI_MAX_NSEG]; 233 u_int16_t seg_len[IWI_MAX_NSEG]; 234 } __attribute__((__packed__)); 235 236 /* command */ 237 struct iwi_cmd_desc { 238 struct iwi_hdr hdr; 239 u_int8_t type; 240 #define IWI_CMD_ENABLE 2 241 #define IWI_CMD_SET_CONFIGURATION 6 242 #define IWI_CMD_SET_ESSID 8 243 #define IWI_CMD_SET_MAC_ADDRESS 11 244 #define IWI_CMD_SET_RTS_THRESHOLD 15 245 #define IWI_CMD_SET_FRAG_THRESHOLD 16 246 #define IWI_CMD_SET_POWER_MODE 17 247 #define IWI_CMD_SET_WEP_KEY 18 248 #define IWI_CMD_SCAN 20 249 #define IWI_CMD_ASSOCIATE 21 250 #define IWI_CMD_SET_RATES 22 251 #define IWI_CMD_ABORT_SCAN 23 252 #define IWI_CMD_SET_OPTIE 31 253 #define IWI_CMD_DISABLE 33 254 #define IWI_CMD_SET_IV 34 255 #define IWI_CMD_SET_TX_POWER 35 256 #define IWI_CMD_SET_SENSITIVITY 42 257 u_int8_t len; 258 u_int16_t reserved; 259 u_int8_t data[120]; 260 } __attribute__((__packed__)); 261 262 /* constants for 'mode' fields */ 263 #define IWI_MODE_11A 0 264 #define IWI_MODE_11B 1 265 #define IWI_MODE_11G 2 266 267 /* possible values for command IWI_CMD_SET_POWER_MODE */ 268 #define IWI_POWER_MODE_CAM 0 269 270 /* structure for command IWI_CMD_SET_RATES */ 271 struct iwi_rateset { 272 u_int8_t mode; 273 u_int8_t nrates; 274 u_int8_t type; 275 #define IWI_RATESET_TYPE_NEGOTIATED 0 276 #define IWI_RATESET_TYPE_SUPPORTED 1 277 u_int8_t reserved; 278 u_int8_t rates[12]; 279 } __attribute__((__packed__)); 280 281 /* structure for command IWI_CMD_SET_TX_POWER */ 282 struct iwi_txpower { 283 u_int8_t nchan; 284 u_int8_t mode; 285 struct { 286 u_int8_t chan; 287 u_int8_t power; 288 #define IWI_TXPOWER_MAX 20 289 #define IWI_TXPOWER_RATIO (IEEE80211_TXPOWER_MAX / IWI_TXPOWER_MAX) 290 } __attribute__((__packed__)) chan[37]; 291 } __attribute__((__packed__)); 292 293 /* structure for command IWI_CMD_ASSOCIATE */ 294 struct iwi_associate { 295 u_int8_t chan; 296 u_int8_t auth; 297 #define IWI_AUTH_OPEN 0 298 #define IWI_AUTH_SHARED 1 299 #define IWI_AUTH_NONE 3 300 u_int8_t type; 301 u_int8_t reserved1; 302 u_int16_t policy; 303 #define IWI_POLICY_OPTIE 2 304 305 u_int8_t plen; 306 u_int8_t mode; 307 u_int8_t bssid[IEEE80211_ADDR_LEN]; 308 u_int8_t tstamp[8]; 309 u_int16_t capinfo; 310 u_int16_t lintval; 311 u_int16_t intval; 312 u_int8_t dst[IEEE80211_ADDR_LEN]; 313 u_int32_t reserved3; 314 u_int16_t reserved4; 315 } __attribute__((__packed__)); 316 317 #define IWI_SCAN_CHANNELS 54 318 319 /* structure for command IWI_CMD_SCAN */ 320 struct iwi_scan { 321 u_int8_t type; 322 #define IWI_SCAN_TYPE_PASSIVE 1 323 #define IWI_SCAN_TYPE_BROADCAST 3 324 325 u_int16_t dwelltime; 326 u_int8_t channels[IWI_SCAN_CHANNELS]; 327 #define IWI_CHAN_5GHZ (0 << 6) 328 #define IWI_CHAN_2GHZ (1 << 6) 329 330 u_int8_t reserved[3]; 331 } __attribute__((__packed__)); 332 333 /* structure for command IWI_CMD_SET_CONFIGURATION */ 334 struct iwi_configuration { 335 u_int8_t bluetooth_coexistence; 336 u_int8_t reserved1; 337 u_int8_t answer_pbreq; 338 u_int8_t allow_invalid_frames; 339 u_int8_t multicast_enabled; 340 u_int8_t drop_unicast_unencrypted; 341 u_int8_t disable_unicast_decryption; 342 u_int8_t drop_multicast_unencrypted; 343 u_int8_t disable_multicast_decryption; 344 u_int8_t antenna; 345 u_int8_t reserved2; 346 u_int8_t use_protection; 347 u_int8_t protection_ctsonly; 348 u_int8_t enable_multicast_filtering; 349 u_int8_t bluetooth_threshold; 350 u_int8_t reserved4; 351 u_int8_t allow_beacon_and_probe_resp; 352 u_int8_t allow_mgt; 353 u_int8_t noise_reported; 354 u_int8_t reserved5; 355 } __attribute__((__packed__)); 356 357 /* structure for command IWI_CMD_SET_WEP_KEY */ 358 struct iwi_wep_key { 359 u_int8_t cmd; 360 #define IWI_WEP_KEY_CMD_SETKEY 0x08 361 u_int8_t seq; 362 u_int8_t idx; 363 u_int8_t len; 364 u_int8_t key[IEEE80211_KEYBUF_SIZE]; 365 } __attribute__((__packed__)); 366 367 /* EEPROM = Electrically Erasable Programmable Read-Only Memory */ 368 369 #define IWI_MEM_EEPROM_CTL 0x00300040 370 371 #define IWI_EEPROM_MAC 0x21 372 373 #define IWI_EEPROM_DELAY 1 /* minimum hold time (microsecond) */ 374 375 #define IWI_EEPROM_C (1 << 0) /* Serial Clock */ 376 #define IWI_EEPROM_S (1 << 1) /* Chip Select */ 377 #define IWI_EEPROM_D (1 << 2) /* Serial data input */ 378 #define IWI_EEPROM_Q (1 << 4) /* Serial data output */ 379 380 #define IWI_EEPROM_SHIFT_D 2 381 #define IWI_EEPROM_SHIFT_Q 4 382 383 /* 384 * control and status registers access macros 385 */ 386 #define CSR_READ_1(sc, reg) \ 387 bus_space_read_1((sc)->sc_st, (sc)->sc_sh, (reg)) 388 389 #define CSR_READ_2(sc, reg) \ 390 bus_space_read_2((sc)->sc_st, (sc)->sc_sh, (reg)) 391 392 #define CSR_READ_4(sc, reg) \ 393 bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg)) 394 395 #define CSR_READ_REGION_4(sc, offset, datap, count) \ 396 bus_space_read_region_4((sc)->sc_st, (sc)->sc_sh, (offset), \ 397 (datap), (count)) 398 399 #define CSR_WRITE_1(sc, reg, val) \ 400 bus_space_write_1((sc)->sc_st, (sc)->sc_sh, (reg), (val)) 401 402 #define CSR_WRITE_2(sc, reg, val) \ 403 bus_space_write_2((sc)->sc_st, (sc)->sc_sh, (reg), (val)) 404 405 #define CSR_WRITE_4(sc, reg, val) \ 406 bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val)) 407 408 /* 409 * indirect memory space access macros 410 */ 411 #define MEM_WRITE_1(sc, addr, val) do { \ 412 CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr)); \ 413 CSR_WRITE_1((sc), IWI_CSR_INDIRECT_DATA, (val)); \ 414 } while (/* CONSTCOND */0) 415 416 #define MEM_WRITE_2(sc, addr, val) do { \ 417 CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr)); \ 418 CSR_WRITE_2((sc), IWI_CSR_INDIRECT_DATA, (val)); \ 419 } while (/* CONSTCOND */0) 420 421 #define MEM_WRITE_4(sc, addr, val) do { \ 422 CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr)); \ 423 CSR_WRITE_4((sc), IWI_CSR_INDIRECT_DATA, (val)); \ 424 } while (/* CONSTCOND */0) 425 426 #define MEM_WRITE_MULTI_1(sc, addr, buf, len) do { \ 427 CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr)); \ 428 CSR_WRITE_MULTI_1((sc), IWI_CSR_INDIRECT_DATA, (buf), (len)); \ 429 } while (/* CONSTCOND */0) 430 431 /* 432 * EEPROM access macro 433 */ 434 #define IWI_EEPROM_CTL(sc, val) do { \ 435 MEM_WRITE_4((sc), IWI_MEM_EEPROM_CTL, (val)); \ 436 DELAY(IWI_EEPROM_DELAY); \ 437 } while (/* CONSTCOND */0) 438
Indexes created Sun Sep 28 07:09:56 GMT 2025