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if_iwm.c revision 1.71
      1  1.71   nonaka /*	$NetBSD: if_iwm.c,v 1.71 2017/03/14 23:59:26 nonaka Exp $	*/
      2  1.56   nonaka /*	OpenBSD: if_iwm.c,v 1.148 2016/11/19 21:07:08 stsp Exp	*/
      3  1.45   nonaka #define IEEE80211_NO_HT
      4   1.1    pooka /*
      5  1.45   nonaka  * Copyright (c) 2014, 2016 genua gmbh <info (at) genua.de>
      6  1.45   nonaka  *   Author: Stefan Sperling <stsp (at) openbsd.org>
      7   1.1    pooka  * Copyright (c) 2014 Fixup Software Ltd.
      8   1.1    pooka  *
      9   1.1    pooka  * Permission to use, copy, modify, and distribute this software for any
     10   1.1    pooka  * purpose with or without fee is hereby granted, provided that the above
     11   1.1    pooka  * copyright notice and this permission notice appear in all copies.
     12   1.1    pooka  *
     13   1.1    pooka  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
     14   1.1    pooka  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
     15   1.1    pooka  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
     16   1.1    pooka  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
     17   1.1    pooka  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
     18   1.1    pooka  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
     19   1.1    pooka  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
     20   1.1    pooka  */
     21   1.1    pooka 
     22   1.1    pooka /*-
     23   1.1    pooka  * Based on BSD-licensed source modules in the Linux iwlwifi driver,
     24   1.1    pooka  * which were used as the reference documentation for this implementation.
     25   1.1    pooka  *
     26   1.1    pooka  ***********************************************************************
     27   1.1    pooka  *
     28   1.1    pooka  * This file is provided under a dual BSD/GPLv2 license.  When using or
     29   1.1    pooka  * redistributing this file, you may do so under either license.
     30   1.1    pooka  *
     31   1.1    pooka  * GPL LICENSE SUMMARY
     32   1.1    pooka  *
     33  1.71   nonaka  * Copyright(c) 2008 - 2014 Intel Corporation. All rights reserved.
     34  1.45   nonaka  * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
     35  1.71   nonaka  * Copyright(c) 2016        Intel Deutschland GmbH
     36   1.1    pooka  *
     37   1.1    pooka  * This program is free software; you can redistribute it and/or modify
     38   1.1    pooka  * it under the terms of version 2 of the GNU General Public License as
     39   1.1    pooka  * published by the Free Software Foundation.
     40   1.1    pooka  *
     41   1.1    pooka  * This program is distributed in the hope that it will be useful, but
     42   1.1    pooka  * WITHOUT ANY WARRANTY; without even the implied warranty of
     43   1.1    pooka  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
     44   1.1    pooka  * General Public License for more details.
     45   1.1    pooka  *
     46   1.1    pooka  * You should have received a copy of the GNU General Public License
     47   1.1    pooka  * along with this program; if not, write to the Free Software
     48   1.1    pooka  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
     49   1.1    pooka  * USA
     50   1.1    pooka  *
     51   1.1    pooka  * The full GNU General Public License is included in this distribution
     52   1.1    pooka  * in the file called COPYING.
     53   1.1    pooka  *
     54   1.1    pooka  * Contact Information:
     55  1.71   nonaka  *  Intel Linux Wireless <linuxwifi (at) intel.com>
     56   1.1    pooka  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
     57   1.1    pooka  *
     58   1.1    pooka  * BSD LICENSE
     59   1.1    pooka  *
     60  1.71   nonaka  * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
     61  1.45   nonaka  * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
     62  1.71   nonaka  * Copyright(c) 2016        Intel Deutschland GmbH
     63   1.1    pooka  * All rights reserved.
     64   1.1    pooka  *
     65   1.1    pooka  * Redistribution and use in source and binary forms, with or without
     66   1.1    pooka  * modification, are permitted provided that the following conditions
     67   1.1    pooka  * are met:
     68   1.1    pooka  *
     69   1.1    pooka  *  * Redistributions of source code must retain the above copyright
     70   1.1    pooka  *    notice, this list of conditions and the following disclaimer.
     71   1.1    pooka  *  * Redistributions in binary form must reproduce the above copyright
     72   1.1    pooka  *    notice, this list of conditions and the following disclaimer in
     73   1.1    pooka  *    the documentation and/or other materials provided with the
     74   1.1    pooka  *    distribution.
     75   1.1    pooka  *  * Neither the name Intel Corporation nor the names of its
     76   1.1    pooka  *    contributors may be used to endorse or promote products derived
     77   1.1    pooka  *    from this software without specific prior written permission.
     78   1.1    pooka  *
     79   1.1    pooka  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
     80   1.1    pooka  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
     81   1.1    pooka  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
     82   1.1    pooka  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
     83   1.1    pooka  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
     84   1.1    pooka  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
     85   1.1    pooka  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     86   1.1    pooka  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     87   1.1    pooka  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     88   1.1    pooka  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
     89   1.1    pooka  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     90   1.1    pooka  */
     91   1.1    pooka 
     92   1.1    pooka /*-
     93   1.1    pooka  * Copyright (c) 2007-2010 Damien Bergamini <damien.bergamini (at) free.fr>
     94   1.1    pooka  *
     95   1.1    pooka  * Permission to use, copy, modify, and distribute this software for any
     96   1.1    pooka  * purpose with or without fee is hereby granted, provided that the above
     97   1.1    pooka  * copyright notice and this permission notice appear in all copies.
     98   1.1    pooka  *
     99   1.1    pooka  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
    100   1.1    pooka  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
    101   1.1    pooka  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
    102   1.1    pooka  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
    103   1.1    pooka  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
    104   1.1    pooka  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
    105   1.1    pooka  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
    106   1.1    pooka  */
    107   1.1    pooka 
    108   1.1    pooka #include <sys/cdefs.h>
    109  1.71   nonaka __KERNEL_RCSID(0, "$NetBSD: if_iwm.c,v 1.71 2017/03/14 23:59:26 nonaka Exp $");
    110   1.1    pooka 
    111   1.1    pooka #include <sys/param.h>
    112   1.1    pooka #include <sys/conf.h>
    113   1.1    pooka #include <sys/kernel.h>
    114   1.1    pooka #include <sys/kmem.h>
    115   1.1    pooka #include <sys/mbuf.h>
    116   1.1    pooka #include <sys/mutex.h>
    117   1.1    pooka #include <sys/proc.h>
    118   1.1    pooka #include <sys/socket.h>
    119   1.1    pooka #include <sys/sockio.h>
    120  1.32   nonaka #include <sys/sysctl.h>
    121   1.1    pooka #include <sys/systm.h>
    122   1.1    pooka 
    123   1.1    pooka #include <sys/cpu.h>
    124   1.1    pooka #include <sys/bus.h>
    125   1.1    pooka #include <sys/workqueue.h>
    126   1.1    pooka #include <machine/endian.h>
    127  1.66   nonaka #include <sys/intr.h>
    128   1.1    pooka 
    129   1.1    pooka #include <dev/pci/pcireg.h>
    130   1.1    pooka #include <dev/pci/pcivar.h>
    131   1.1    pooka #include <dev/pci/pcidevs.h>
    132   1.1    pooka #include <dev/firmload.h>
    133   1.1    pooka 
    134   1.1    pooka #include <net/bpf.h>
    135   1.1    pooka #include <net/if.h>
    136   1.1    pooka #include <net/if_dl.h>
    137   1.1    pooka #include <net/if_media.h>
    138   1.1    pooka #include <net/if_ether.h>
    139   1.1    pooka 
    140   1.1    pooka #include <netinet/in.h>
    141   1.1    pooka #include <netinet/ip.h>
    142   1.1    pooka 
    143   1.1    pooka #include <net80211/ieee80211_var.h>
    144   1.1    pooka #include <net80211/ieee80211_amrr.h>
    145   1.1    pooka #include <net80211/ieee80211_radiotap.h>
    146   1.1    pooka 
    147   1.1    pooka #define DEVNAME(_s)	device_xname((_s)->sc_dev)
    148   1.1    pooka #define IC2IFP(_ic_)	((_ic_)->ic_ifp)
    149   1.1    pooka 
    150   1.1    pooka #define le16_to_cpup(_a_) (le16toh(*(const uint16_t *)(_a_)))
    151   1.1    pooka #define le32_to_cpup(_a_) (le32toh(*(const uint32_t *)(_a_)))
    152   1.1    pooka 
    153   1.1    pooka #ifdef IWM_DEBUG
    154   1.1    pooka #define DPRINTF(x)	do { if (iwm_debug > 0) printf x; } while (0)
    155   1.1    pooka #define DPRINTFN(n, x)	do { if (iwm_debug >= (n)) printf x; } while (0)
    156  1.32   nonaka int iwm_debug = 0;
    157   1.1    pooka #else
    158   1.1    pooka #define DPRINTF(x)	do { ; } while (0)
    159   1.1    pooka #define DPRINTFN(n, x)	do { ; } while (0)
    160   1.1    pooka #endif
    161   1.1    pooka 
    162   1.1    pooka #include <dev/pci/if_iwmreg.h>
    163   1.1    pooka #include <dev/pci/if_iwmvar.h>
    164   1.1    pooka 
    165   1.4   nonaka static const uint8_t iwm_nvm_channels[] = {
    166   1.1    pooka 	/* 2.4 GHz */
    167   1.1    pooka 	1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
    168   1.1    pooka 	/* 5 GHz */
    169  1.45   nonaka 	36, 40, 44, 48, 52, 56, 60, 64,
    170   1.1    pooka 	100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144,
    171   1.1    pooka 	149, 153, 157, 161, 165
    172   1.1    pooka };
    173  1.45   nonaka 
    174  1.45   nonaka static const uint8_t iwm_nvm_channels_8000[] = {
    175  1.45   nonaka 	/* 2.4 GHz */
    176  1.45   nonaka 	1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
    177  1.45   nonaka 	/* 5 GHz */
    178  1.45   nonaka 	36, 40, 44, 48, 52, 56, 60, 64, 68, 72, 76, 80, 84, 88, 92,
    179  1.45   nonaka 	96, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144,
    180  1.45   nonaka 	149, 153, 157, 161, 165, 169, 173, 177, 181
    181  1.45   nonaka };
    182  1.45   nonaka 
    183   1.1    pooka #define IWM_NUM_2GHZ_CHANNELS	14
    184   1.1    pooka 
    185   1.4   nonaka static const struct iwm_rate {
    186   1.1    pooka 	uint8_t rate;
    187   1.1    pooka 	uint8_t plcp;
    188  1.45   nonaka 	uint8_t ht_plcp;
    189   1.1    pooka } iwm_rates[] = {
    190  1.45   nonaka 		/* Legacy */		/* HT */
    191  1.45   nonaka 	{   2,	IWM_RATE_1M_PLCP,	IWM_RATE_HT_SISO_MCS_INV_PLCP  },
    192  1.45   nonaka 	{   4,	IWM_RATE_2M_PLCP,	IWM_RATE_HT_SISO_MCS_INV_PLCP },
    193  1.45   nonaka 	{  11,	IWM_RATE_5M_PLCP,	IWM_RATE_HT_SISO_MCS_INV_PLCP  },
    194  1.45   nonaka 	{  22,	IWM_RATE_11M_PLCP,	IWM_RATE_HT_SISO_MCS_INV_PLCP },
    195  1.45   nonaka 	{  12,	IWM_RATE_6M_PLCP,	IWM_RATE_HT_SISO_MCS_0_PLCP },
    196  1.45   nonaka 	{  18,	IWM_RATE_9M_PLCP,	IWM_RATE_HT_SISO_MCS_INV_PLCP  },
    197  1.45   nonaka 	{  24,	IWM_RATE_12M_PLCP,	IWM_RATE_HT_SISO_MCS_1_PLCP },
    198  1.45   nonaka 	{  36,	IWM_RATE_18M_PLCP,	IWM_RATE_HT_SISO_MCS_2_PLCP },
    199  1.45   nonaka 	{  48,	IWM_RATE_24M_PLCP,	IWM_RATE_HT_SISO_MCS_3_PLCP },
    200  1.45   nonaka 	{  72,	IWM_RATE_36M_PLCP,	IWM_RATE_HT_SISO_MCS_4_PLCP },
    201  1.45   nonaka 	{  96,	IWM_RATE_48M_PLCP,	IWM_RATE_HT_SISO_MCS_5_PLCP },
    202  1.45   nonaka 	{ 108,	IWM_RATE_54M_PLCP,	IWM_RATE_HT_SISO_MCS_6_PLCP },
    203  1.45   nonaka 	{ 128,	IWM_RATE_INVM_PLCP,	IWM_RATE_HT_SISO_MCS_7_PLCP },
    204   1.1    pooka };
    205   1.1    pooka #define IWM_RIDX_CCK	0
    206   1.1    pooka #define IWM_RIDX_OFDM	4
    207   1.1    pooka #define IWM_RIDX_MAX	(__arraycount(iwm_rates)-1)
    208   1.1    pooka #define IWM_RIDX_IS_CCK(_i_) ((_i_) < IWM_RIDX_OFDM)
    209   1.1    pooka #define IWM_RIDX_IS_OFDM(_i_) ((_i_) >= IWM_RIDX_OFDM)
    210   1.1    pooka 
    211  1.45   nonaka #ifndef IEEE80211_NO_HT
    212  1.45   nonaka /* Convert an MCS index into an iwm_rates[] index. */
    213  1.45   nonaka static const int iwm_mcs2ridx[] = {
    214  1.45   nonaka 	IWM_RATE_MCS_0_INDEX,
    215  1.45   nonaka 	IWM_RATE_MCS_1_INDEX,
    216  1.45   nonaka 	IWM_RATE_MCS_2_INDEX,
    217  1.45   nonaka 	IWM_RATE_MCS_3_INDEX,
    218  1.45   nonaka 	IWM_RATE_MCS_4_INDEX,
    219  1.45   nonaka 	IWM_RATE_MCS_5_INDEX,
    220  1.45   nonaka 	IWM_RATE_MCS_6_INDEX,
    221  1.45   nonaka 	IWM_RATE_MCS_7_INDEX,
    222  1.45   nonaka };
    223  1.45   nonaka #endif
    224  1.45   nonaka 
    225  1.45   nonaka struct iwm_nvm_section {
    226  1.45   nonaka 	uint16_t length;
    227  1.45   nonaka 	uint8_t *data;
    228  1.45   nonaka };
    229  1.45   nonaka 
    230   1.1    pooka struct iwm_newstate_state {
    231   1.1    pooka 	struct work ns_wk;
    232   1.1    pooka 	enum ieee80211_state ns_nstate;
    233   1.1    pooka 	int ns_arg;
    234   1.1    pooka 	int ns_generation;
    235   1.1    pooka };
    236   1.1    pooka 
    237   1.4   nonaka static int	iwm_store_cscheme(struct iwm_softc *, uint8_t *, size_t);
    238   1.4   nonaka static int	iwm_firmware_store_section(struct iwm_softc *,
    239   1.4   nonaka 		    enum iwm_ucode_type, uint8_t *, size_t);
    240   1.4   nonaka static int	iwm_set_default_calib(struct iwm_softc *, const void *);
    241  1.61   nonaka static int	iwm_read_firmware(struct iwm_softc *, enum iwm_ucode_type);
    242   1.4   nonaka static uint32_t iwm_read_prph(struct iwm_softc *, uint32_t);
    243   1.4   nonaka static void	iwm_write_prph(struct iwm_softc *, uint32_t, uint32_t);
    244   1.2   nonaka #ifdef IWM_DEBUG
    245   1.4   nonaka static int	iwm_read_mem(struct iwm_softc *, uint32_t, void *, int);
    246   1.2   nonaka #endif
    247   1.4   nonaka static int	iwm_write_mem(struct iwm_softc *, uint32_t, const void *, int);
    248   1.4   nonaka static int	iwm_write_mem32(struct iwm_softc *, uint32_t, uint32_t);
    249   1.4   nonaka static int	iwm_poll_bit(struct iwm_softc *, int, uint32_t, uint32_t, int);
    250   1.4   nonaka static int	iwm_nic_lock(struct iwm_softc *);
    251   1.4   nonaka static void	iwm_nic_unlock(struct iwm_softc *);
    252   1.4   nonaka static void	iwm_set_bits_mask_prph(struct iwm_softc *, uint32_t, uint32_t,
    253   1.8   nonaka 		    uint32_t);
    254   1.4   nonaka static void	iwm_set_bits_prph(struct iwm_softc *, uint32_t, uint32_t);
    255   1.4   nonaka static void	iwm_clear_bits_prph(struct iwm_softc *, uint32_t, uint32_t);
    256   1.4   nonaka static int	iwm_dma_contig_alloc(bus_dma_tag_t, struct iwm_dma_info *,
    257   1.4   nonaka 		    bus_size_t, bus_size_t);
    258   1.4   nonaka static void	iwm_dma_contig_free(struct iwm_dma_info *);
    259   1.4   nonaka static int	iwm_alloc_rx_ring(struct iwm_softc *, struct iwm_rx_ring *);
    260  1.45   nonaka static void	iwm_disable_rx_dma(struct iwm_softc *);
    261   1.4   nonaka static void	iwm_reset_rx_ring(struct iwm_softc *, struct iwm_rx_ring *);
    262   1.4   nonaka static void	iwm_free_rx_ring(struct iwm_softc *, struct iwm_rx_ring *);
    263   1.4   nonaka static int	iwm_alloc_tx_ring(struct iwm_softc *, struct iwm_tx_ring *,
    264   1.4   nonaka 		    int);
    265   1.4   nonaka static void	iwm_reset_tx_ring(struct iwm_softc *, struct iwm_tx_ring *);
    266   1.4   nonaka static void	iwm_free_tx_ring(struct iwm_softc *, struct iwm_tx_ring *);
    267   1.4   nonaka static void	iwm_enable_rfkill_int(struct iwm_softc *);
    268   1.4   nonaka static int	iwm_check_rfkill(struct iwm_softc *);
    269   1.4   nonaka static void	iwm_enable_interrupts(struct iwm_softc *);
    270   1.4   nonaka static void	iwm_restore_interrupts(struct iwm_softc *);
    271   1.4   nonaka static void	iwm_disable_interrupts(struct iwm_softc *);
    272   1.4   nonaka static void	iwm_ict_reset(struct iwm_softc *);
    273   1.4   nonaka static int	iwm_set_hw_ready(struct iwm_softc *);
    274   1.4   nonaka static int	iwm_prepare_card_hw(struct iwm_softc *);
    275   1.4   nonaka static void	iwm_apm_config(struct iwm_softc *);
    276   1.4   nonaka static int	iwm_apm_init(struct iwm_softc *);
    277   1.4   nonaka static void	iwm_apm_stop(struct iwm_softc *);
    278  1.11   nonaka static int	iwm_allow_mcast(struct iwm_softc *);
    279   1.4   nonaka static int	iwm_start_hw(struct iwm_softc *);
    280   1.4   nonaka static void	iwm_stop_device(struct iwm_softc *);
    281  1.45   nonaka static void	iwm_nic_config(struct iwm_softc *);
    282   1.4   nonaka static int	iwm_nic_rx_init(struct iwm_softc *);
    283   1.4   nonaka static int	iwm_nic_tx_init(struct iwm_softc *);
    284   1.4   nonaka static int	iwm_nic_init(struct iwm_softc *);
    285  1.45   nonaka static int	iwm_enable_txq(struct iwm_softc *, int, int, int);
    286   1.4   nonaka static int	iwm_post_alive(struct iwm_softc *);
    287  1.45   nonaka static struct iwm_phy_db_entry *
    288  1.45   nonaka 		iwm_phy_db_get_section(struct iwm_softc *,
    289  1.45   nonaka 		    enum iwm_phy_db_section_type, uint16_t);
    290  1.45   nonaka static int	iwm_phy_db_set_section(struct iwm_softc *,
    291  1.45   nonaka 		    struct iwm_calib_res_notif_phy_db *, uint16_t);
    292   1.4   nonaka static int	iwm_is_valid_channel(uint16_t);
    293   1.4   nonaka static uint8_t	iwm_ch_id_to_ch_index(uint16_t);
    294   1.4   nonaka static uint16_t iwm_channel_id_to_papd(uint16_t);
    295   1.4   nonaka static uint16_t iwm_channel_id_to_txp(struct iwm_softc *, uint16_t);
    296   1.4   nonaka static int	iwm_phy_db_get_section_data(struct iwm_softc *, uint32_t,
    297   1.4   nonaka 		    uint8_t **, uint16_t *, uint16_t);
    298   1.4   nonaka static int	iwm_send_phy_db_cmd(struct iwm_softc *, uint16_t, uint16_t,
    299   1.4   nonaka 		    void *);
    300  1.45   nonaka static int	iwm_phy_db_send_all_channel_groups(struct iwm_softc *,
    301  1.45   nonaka 		    enum iwm_phy_db_section_type, uint8_t);
    302   1.4   nonaka static int	iwm_send_phy_db_data(struct iwm_softc *);
    303  1.45   nonaka static void	iwm_te_v2_to_v1(const struct iwm_time_event_cmd_v2 *,
    304   1.4   nonaka 		    struct iwm_time_event_cmd_v1 *);
    305  1.45   nonaka static int	iwm_send_time_event_cmd(struct iwm_softc *,
    306   1.4   nonaka 		    const struct iwm_time_event_cmd_v2 *);
    307  1.45   nonaka static void	iwm_protect_session(struct iwm_softc *, struct iwm_node *,
    308  1.45   nonaka 		    uint32_t, uint32_t);
    309   1.4   nonaka static int	iwm_nvm_read_chunk(struct iwm_softc *, uint16_t, uint16_t,
    310   1.4   nonaka 		    uint16_t, uint8_t *, uint16_t *);
    311   1.4   nonaka static int	iwm_nvm_read_section(struct iwm_softc *, uint16_t, uint8_t *,
    312  1.45   nonaka 		    uint16_t *, size_t);
    313  1.45   nonaka static void	iwm_init_channel_map(struct iwm_softc *, const uint16_t * const,
    314  1.45   nonaka 		    const uint8_t *, size_t);
    315  1.45   nonaka #ifndef IEEE80211_NO_HT
    316  1.45   nonaka static void	iwm_setup_ht_rates(struct iwm_softc *);
    317  1.45   nonaka static void	iwm_htprot_task(void *);
    318  1.45   nonaka static void	iwm_update_htprot(struct ieee80211com *,
    319  1.45   nonaka 		    struct ieee80211_node *);
    320  1.45   nonaka static int	iwm_ampdu_rx_start(struct ieee80211com *,
    321  1.45   nonaka 		    struct ieee80211_node *, uint8_t);
    322  1.45   nonaka static void	iwm_ampdu_rx_stop(struct ieee80211com *,
    323  1.45   nonaka 		    struct ieee80211_node *, uint8_t);
    324  1.45   nonaka static void	iwm_sta_rx_agg(struct iwm_softc *, struct ieee80211_node *,
    325  1.45   nonaka 		    uint8_t, uint16_t, int);
    326  1.45   nonaka #ifdef notyet
    327  1.45   nonaka static int	iwm_ampdu_tx_start(struct ieee80211com *,
    328  1.45   nonaka 		    struct ieee80211_node *, uint8_t);
    329  1.45   nonaka static void	iwm_ampdu_tx_stop(struct ieee80211com *,
    330  1.45   nonaka 		    struct ieee80211_node *, uint8_t);
    331  1.45   nonaka #endif
    332  1.45   nonaka static void	iwm_ba_task(void *);
    333  1.45   nonaka #endif
    334  1.45   nonaka 
    335   1.4   nonaka static int	iwm_parse_nvm_data(struct iwm_softc *, const uint16_t *,
    336  1.45   nonaka 		    const uint16_t *, const uint16_t *, const uint16_t *,
    337  1.45   nonaka 		    const uint16_t *, const uint16_t *);
    338  1.45   nonaka static void	iwm_set_hw_address_8000(struct iwm_softc *,
    339  1.45   nonaka 		    struct iwm_nvm_data *, const uint16_t *, const uint16_t *);
    340  1.45   nonaka static int	iwm_parse_nvm_sections(struct iwm_softc *,
    341  1.45   nonaka 		    struct iwm_nvm_section *);
    342   1.4   nonaka static int	iwm_nvm_init(struct iwm_softc *);
    343  1.45   nonaka static int	iwm_firmware_load_sect(struct iwm_softc *, uint32_t,
    344  1.45   nonaka 		    const uint8_t *, uint32_t);
    345   1.4   nonaka static int	iwm_firmware_load_chunk(struct iwm_softc *, uint32_t,
    346   1.4   nonaka 		    const uint8_t *, uint32_t);
    347  1.71   nonaka static int	iwm_load_cpu_sections_7000(struct iwm_softc *,
    348  1.71   nonaka 		    struct iwm_fw_sects *, int , int *);
    349  1.45   nonaka static int	iwm_load_firmware_7000(struct iwm_softc *, enum iwm_ucode_type);
    350  1.45   nonaka static int	iwm_load_cpu_sections_8000(struct iwm_softc *,
    351  1.45   nonaka 		    struct iwm_fw_sects *, int , int *);
    352  1.45   nonaka static int	iwm_load_firmware_8000(struct iwm_softc *, enum iwm_ucode_type);
    353   1.4   nonaka static int	iwm_load_firmware(struct iwm_softc *, enum iwm_ucode_type);
    354   1.4   nonaka static int	iwm_start_fw(struct iwm_softc *, enum iwm_ucode_type);
    355   1.4   nonaka static int	iwm_send_tx_ant_cfg(struct iwm_softc *, uint8_t);
    356   1.4   nonaka static int	iwm_send_phy_cfg_cmd(struct iwm_softc *);
    357  1.45   nonaka static int	iwm_load_ucode_wait_alive(struct iwm_softc *,
    358   1.4   nonaka 		    enum iwm_ucode_type);
    359   1.4   nonaka static int	iwm_run_init_mvm_ucode(struct iwm_softc *, int);
    360   1.4   nonaka static int	iwm_rx_addbuf(struct iwm_softc *, int, int);
    361  1.45   nonaka static int	iwm_calc_rssi(struct iwm_softc *, struct iwm_rx_phy_info *);
    362  1.45   nonaka static int	iwm_get_signal_strength(struct iwm_softc *,
    363   1.4   nonaka 		    struct iwm_rx_phy_info *);
    364  1.45   nonaka static void	iwm_rx_rx_phy_cmd(struct iwm_softc *,
    365   1.4   nonaka 		    struct iwm_rx_packet *, struct iwm_rx_data *);
    366  1.45   nonaka static int	iwm_get_noise(const struct iwm_statistics_rx_non_phy *);
    367  1.45   nonaka static void	iwm_rx_rx_mpdu(struct iwm_softc *, struct iwm_rx_packet *,
    368   1.4   nonaka 		    struct iwm_rx_data *);
    369  1.45   nonaka static void	iwm_rx_tx_cmd_single(struct iwm_softc *, struct iwm_rx_packet *,		    struct iwm_node *);
    370  1.45   nonaka static void	iwm_rx_tx_cmd(struct iwm_softc *, struct iwm_rx_packet *,
    371   1.4   nonaka 		    struct iwm_rx_data *);
    372  1.45   nonaka static int	iwm_binding_cmd(struct iwm_softc *, struct iwm_node *,
    373   1.4   nonaka 		    uint32_t);
    374  1.45   nonaka #if 0
    375  1.45   nonaka static int	iwm_binding_update(struct iwm_softc *, struct iwm_node *, int);
    376  1.45   nonaka static int	iwm_binding_add_vif(struct iwm_softc *, struct iwm_node *);
    377  1.45   nonaka #endif
    378  1.45   nonaka static void	iwm_phy_ctxt_cmd_hdr(struct iwm_softc *, struct iwm_phy_ctxt *,
    379  1.45   nonaka 		    struct iwm_phy_context_cmd *, uint32_t, uint32_t);
    380  1.45   nonaka static void	iwm_phy_ctxt_cmd_data(struct iwm_softc *,
    381   1.4   nonaka 		    struct iwm_phy_context_cmd *, struct ieee80211_channel *,
    382   1.4   nonaka 		    uint8_t, uint8_t);
    383  1.45   nonaka static int	iwm_phy_ctxt_cmd(struct iwm_softc *, struct iwm_phy_ctxt *,
    384  1.45   nonaka 		    uint8_t, uint8_t, uint32_t, uint32_t);
    385   1.4   nonaka static int	iwm_send_cmd(struct iwm_softc *, struct iwm_host_cmd *);
    386  1.45   nonaka static int	iwm_send_cmd_pdu(struct iwm_softc *, uint32_t, uint32_t,
    387   1.4   nonaka 		    uint16_t, const void *);
    388  1.45   nonaka static int	iwm_send_cmd_status(struct iwm_softc *, struct iwm_host_cmd *,
    389  1.45   nonaka 		    uint32_t *);
    390  1.45   nonaka static int	iwm_send_cmd_pdu_status(struct iwm_softc *, uint32_t, uint16_t,
    391  1.45   nonaka 		    const void *, uint32_t *);
    392   1.4   nonaka static void	iwm_free_resp(struct iwm_softc *, struct iwm_host_cmd *);
    393  1.45   nonaka static void	iwm_cmd_done(struct iwm_softc *, int qid, int idx);
    394   1.4   nonaka #if 0
    395   1.4   nonaka static void	iwm_update_sched(struct iwm_softc *, int, int, uint8_t,
    396   1.4   nonaka 		    uint16_t);
    397   1.4   nonaka #endif
    398  1.45   nonaka static const struct iwm_rate *
    399  1.45   nonaka 		iwm_tx_fill_cmd(struct iwm_softc *, struct iwm_node *,
    400  1.45   nonaka 		    struct ieee80211_frame *, struct iwm_tx_cmd *);
    401   1.4   nonaka static int	iwm_tx(struct iwm_softc *, struct mbuf *,
    402   1.4   nonaka 		    struct ieee80211_node *, int);
    403  1.45   nonaka static void	iwm_led_enable(struct iwm_softc *);
    404  1.45   nonaka static void	iwm_led_disable(struct iwm_softc *);
    405  1.45   nonaka static int	iwm_led_is_enabled(struct iwm_softc *);
    406  1.45   nonaka static void	iwm_led_blink_timeout(void *);
    407  1.45   nonaka static void	iwm_led_blink_start(struct iwm_softc *);
    408  1.45   nonaka static void	iwm_led_blink_stop(struct iwm_softc *);
    409  1.45   nonaka static int	iwm_beacon_filter_send_cmd(struct iwm_softc *,
    410   1.4   nonaka 		    struct iwm_beacon_filter_cmd *);
    411  1.45   nonaka static void	iwm_beacon_filter_set_cqm_params(struct iwm_softc *,
    412   1.4   nonaka 		    struct iwm_node *, struct iwm_beacon_filter_cmd *);
    413  1.45   nonaka static int	iwm_update_beacon_abort(struct iwm_softc *, struct iwm_node *,
    414  1.45   nonaka 		    int);
    415  1.45   nonaka static void	iwm_power_build_cmd(struct iwm_softc *, struct iwm_node *,
    416   1.4   nonaka 		    struct iwm_mac_power_cmd *);
    417  1.45   nonaka static int	iwm_power_mac_update_mode(struct iwm_softc *,
    418   1.4   nonaka 		    struct iwm_node *);
    419  1.45   nonaka static int	iwm_power_update_device(struct iwm_softc *);
    420  1.45   nonaka #ifdef notyet
    421  1.45   nonaka static int	iwm_enable_beacon_filter(struct iwm_softc *, struct iwm_node *);
    422  1.45   nonaka #endif
    423  1.45   nonaka static int	iwm_disable_beacon_filter(struct iwm_softc *);
    424  1.45   nonaka static int	iwm_add_sta_cmd(struct iwm_softc *, struct iwm_node *, int);
    425  1.45   nonaka static int	iwm_add_aux_sta(struct iwm_softc *);
    426  1.45   nonaka static uint16_t iwm_scan_rx_chain(struct iwm_softc *);
    427  1.45   nonaka static uint32_t iwm_scan_rate_n_flags(struct iwm_softc *, int, int);
    428  1.45   nonaka #ifdef notyet
    429  1.45   nonaka static uint16_t iwm_get_active_dwell(struct iwm_softc *, int, int);
    430  1.45   nonaka static uint16_t iwm_get_passive_dwell(struct iwm_softc *, int);
    431  1.45   nonaka #endif
    432  1.45   nonaka static uint8_t	iwm_lmac_scan_fill_channels(struct iwm_softc *,
    433  1.45   nonaka 		    struct iwm_scan_channel_cfg_lmac *, int);
    434  1.45   nonaka static int	iwm_fill_probe_req(struct iwm_softc *,
    435  1.45   nonaka 		    struct iwm_scan_probe_req *);
    436  1.45   nonaka static int	iwm_lmac_scan(struct iwm_softc *);
    437  1.45   nonaka static int	iwm_config_umac_scan(struct iwm_softc *);
    438  1.45   nonaka static int	iwm_umac_scan(struct iwm_softc *);
    439  1.45   nonaka static uint8_t	iwm_ridx2rate(struct ieee80211_rateset *, int);
    440  1.45   nonaka static void	iwm_ack_rates(struct iwm_softc *, struct iwm_node *, int *,
    441   1.4   nonaka 		    int *);
    442  1.45   nonaka static void	iwm_mac_ctxt_cmd_common(struct iwm_softc *, struct iwm_node *,
    443  1.45   nonaka 		    struct iwm_mac_ctx_cmd *, uint32_t, int);
    444  1.45   nonaka static void	iwm_mac_ctxt_cmd_fill_sta(struct iwm_softc *, struct iwm_node *,
    445  1.45   nonaka 		    struct iwm_mac_data_sta *, int);
    446  1.45   nonaka static int	iwm_mac_ctxt_cmd(struct iwm_softc *, struct iwm_node *,
    447  1.45   nonaka 		    uint32_t, int);
    448  1.45   nonaka static int	iwm_update_quotas(struct iwm_softc *, struct iwm_node *);
    449   1.4   nonaka static int	iwm_auth(struct iwm_softc *);
    450   1.4   nonaka static int	iwm_assoc(struct iwm_softc *);
    451   1.4   nonaka static void	iwm_calib_timeout(void *);
    452  1.45   nonaka #ifndef IEEE80211_NO_HT
    453  1.45   nonaka static void	iwm_setrates_task(void *);
    454  1.45   nonaka static int	iwm_setrates(struct iwm_node *);
    455  1.45   nonaka #endif
    456   1.4   nonaka static int	iwm_media_change(struct ifnet *);
    457  1.65   nonaka static int	iwm_do_newstate(struct ieee80211com *, enum ieee80211_state,
    458  1.65   nonaka 		    int);
    459   1.5   nonaka static void	iwm_newstate_cb(struct work *, void *);
    460   1.4   nonaka static int	iwm_newstate(struct ieee80211com *, enum ieee80211_state, int);
    461  1.50   nonaka static void	iwm_endscan(struct iwm_softc *);
    462  1.45   nonaka static void	iwm_fill_sf_command(struct iwm_softc *, struct iwm_sf_cfg_cmd *,
    463  1.45   nonaka 		    struct ieee80211_node *);
    464  1.45   nonaka static int	iwm_sf_config(struct iwm_softc *, int);
    465  1.45   nonaka static int	iwm_send_bt_init_conf(struct iwm_softc *);
    466  1.45   nonaka static int	iwm_send_update_mcc_cmd(struct iwm_softc *, const char *);
    467  1.45   nonaka static void	iwm_tt_tx_backoff(struct iwm_softc *, uint32_t);
    468   1.4   nonaka static int	iwm_init_hw(struct iwm_softc *);
    469   1.4   nonaka static int	iwm_init(struct ifnet *);
    470   1.4   nonaka static void	iwm_start(struct ifnet *);
    471   1.4   nonaka static void	iwm_stop(struct ifnet *, int);
    472   1.4   nonaka static void	iwm_watchdog(struct ifnet *);
    473   1.4   nonaka static int	iwm_ioctl(struct ifnet *, u_long, void *);
    474   1.4   nonaka #ifdef IWM_DEBUG
    475   1.4   nonaka static const char *iwm_desc_lookup(uint32_t);
    476   1.4   nonaka static void	iwm_nic_error(struct iwm_softc *);
    477  1.45   nonaka static void	iwm_nic_umac_error(struct iwm_softc *);
    478   1.4   nonaka #endif
    479   1.4   nonaka static void	iwm_notif_intr(struct iwm_softc *);
    480  1.61   nonaka static int	iwm_intr(void *);
    481  1.50   nonaka static void	iwm_softintr(void *);
    482   1.4   nonaka static int	iwm_preinit(struct iwm_softc *);
    483   1.4   nonaka static void	iwm_attach_hook(device_t);
    484   1.4   nonaka static void	iwm_attach(device_t, device_t, void *);
    485   1.4   nonaka #if 0
    486   1.4   nonaka static void	iwm_init_task(void *);
    487   1.4   nonaka static int	iwm_activate(device_t, enum devact);
    488   1.4   nonaka static void	iwm_wakeup(struct iwm_softc *);
    489   1.4   nonaka #endif
    490   1.4   nonaka static void	iwm_radiotap_attach(struct iwm_softc *);
    491  1.36   nonaka static int	iwm_sysctl_fw_loaded_handler(SYSCTLFN_PROTO);
    492  1.36   nonaka 
    493  1.36   nonaka static int iwm_sysctl_root_num;
    494  1.60   nonaka static int iwm_lar_disable;
    495   1.1    pooka 
    496  1.61   nonaka #ifndef	IWM_DEFAULT_MCC
    497  1.61   nonaka #define	IWM_DEFAULT_MCC	"ZZ"
    498  1.61   nonaka #endif
    499  1.61   nonaka static char iwm_default_mcc[3] = IWM_DEFAULT_MCC;
    500  1.61   nonaka 
    501   1.1    pooka static int
    502   1.1    pooka iwm_firmload(struct iwm_softc *sc)
    503   1.1    pooka {
    504   1.1    pooka 	struct iwm_fw_info *fw = &sc->sc_fw;
    505   1.1    pooka 	firmware_handle_t fwh;
    506  1.45   nonaka 	int err;
    507   1.1    pooka 
    508  1.36   nonaka 	if (ISSET(sc->sc_flags, IWM_FLAG_FW_LOADED))
    509  1.36   nonaka 		return 0;
    510  1.36   nonaka 
    511   1.1    pooka 	/* Open firmware image. */
    512  1.45   nonaka 	err = firmware_open("if_iwm", sc->sc_fwname, &fwh);
    513  1.45   nonaka 	if (err) {
    514   1.1    pooka 		aprint_error_dev(sc->sc_dev,
    515   1.1    pooka 		    "could not get firmware handle %s\n", sc->sc_fwname);
    516  1.45   nonaka 		return err;
    517   1.1    pooka 	}
    518   1.1    pooka 
    519  1.36   nonaka 	if (fw->fw_rawdata != NULL && fw->fw_rawsize > 0) {
    520  1.36   nonaka 		kmem_free(fw->fw_rawdata, fw->fw_rawsize);
    521  1.36   nonaka 		fw->fw_rawdata = NULL;
    522  1.36   nonaka 	}
    523  1.36   nonaka 
    524   1.1    pooka 	fw->fw_rawsize = firmware_get_size(fwh);
    525   1.1    pooka 	/*
    526   1.1    pooka 	 * Well, this is how the Linux driver checks it ....
    527   1.1    pooka 	 */
    528   1.1    pooka 	if (fw->fw_rawsize < sizeof(uint32_t)) {
    529   1.1    pooka 		aprint_error_dev(sc->sc_dev,
    530   1.1    pooka 		    "firmware too short: %zd bytes\n", fw->fw_rawsize);
    531  1.45   nonaka 		err = EINVAL;
    532   1.1    pooka 		goto out;
    533   1.1    pooka 	}
    534   1.1    pooka 
    535   1.1    pooka 	/* Read the firmware. */
    536   1.1    pooka 	fw->fw_rawdata = kmem_alloc(fw->fw_rawsize, KM_SLEEP);
    537   1.1    pooka 	if (fw->fw_rawdata == NULL) {
    538   1.1    pooka 		aprint_error_dev(sc->sc_dev,
    539   1.1    pooka 		    "not enough memory to stock firmware %s\n", sc->sc_fwname);
    540  1.45   nonaka 		err = ENOMEM;
    541   1.1    pooka 		goto out;
    542   1.1    pooka 	}
    543  1.45   nonaka 	err = firmware_read(fwh, 0, fw->fw_rawdata, fw->fw_rawsize);
    544  1.45   nonaka 	if (err) {
    545   1.1    pooka 		aprint_error_dev(sc->sc_dev,
    546   1.1    pooka 		    "could not read firmware %s\n", sc->sc_fwname);
    547   1.1    pooka 		goto out;
    548   1.1    pooka 	}
    549   1.1    pooka 
    550  1.36   nonaka 	SET(sc->sc_flags, IWM_FLAG_FW_LOADED);
    551   1.1    pooka  out:
    552   1.1    pooka 	/* caller will release memory, if necessary */
    553   1.1    pooka 
    554   1.1    pooka 	firmware_close(fwh);
    555  1.45   nonaka 	return err;
    556   1.1    pooka }
    557   1.1    pooka 
    558   1.1    pooka /*
    559   1.1    pooka  * just maintaining status quo.
    560   1.1    pooka  */
    561   1.1    pooka static void
    562  1.45   nonaka iwm_fix_channel(struct iwm_softc *sc, struct mbuf *m)
    563   1.1    pooka {
    564  1.45   nonaka 	struct ieee80211com *ic = &sc->sc_ic;
    565   1.1    pooka 	struct ieee80211_frame *wh;
    566   1.1    pooka 	uint8_t subtype;
    567   1.1    pooka 
    568   1.1    pooka 	wh = mtod(m, struct ieee80211_frame *);
    569   1.1    pooka 
    570   1.1    pooka 	if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) != IEEE80211_FC0_TYPE_MGT)
    571   1.1    pooka 		return;
    572   1.1    pooka 
    573   1.1    pooka 	subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
    574   1.1    pooka 
    575   1.1    pooka 	if (subtype != IEEE80211_FC0_SUBTYPE_BEACON &&
    576   1.1    pooka 	    subtype != IEEE80211_FC0_SUBTYPE_PROBE_RESP)
    577   1.1    pooka 		return;
    578   1.1    pooka 
    579  1.45   nonaka 	int chan = le32toh(sc->sc_last_phy_info.channel);
    580  1.45   nonaka 	if (chan < __arraycount(ic->ic_channels))
    581  1.45   nonaka 		ic->ic_curchan = &ic->ic_channels[chan];
    582   1.1    pooka }
    583   1.1    pooka 
    584   1.4   nonaka static int
    585   1.1    pooka iwm_store_cscheme(struct iwm_softc *sc, uint8_t *data, size_t dlen)
    586   1.1    pooka {
    587  1.45   nonaka 	struct iwm_fw_cscheme_list *l = (struct iwm_fw_cscheme_list *)data;
    588   1.1    pooka 
    589   1.1    pooka 	if (dlen < sizeof(*l) ||
    590   1.1    pooka 	    dlen < sizeof(l->size) + l->size * sizeof(*l->cs))
    591   1.1    pooka 		return EINVAL;
    592   1.1    pooka 
    593   1.1    pooka 	/* we don't actually store anything for now, always use s/w crypto */
    594   1.1    pooka 
    595   1.1    pooka 	return 0;
    596   1.1    pooka }
    597   1.1    pooka 
    598   1.4   nonaka static int
    599  1.45   nonaka iwm_firmware_store_section(struct iwm_softc *sc, enum iwm_ucode_type type,
    600  1.45   nonaka     uint8_t *data, size_t dlen)
    601   1.1    pooka {
    602   1.1    pooka 	struct iwm_fw_sects *fws;
    603   1.1    pooka 	struct iwm_fw_onesect *fwone;
    604   1.1    pooka 
    605   1.1    pooka 	if (type >= IWM_UCODE_TYPE_MAX)
    606   1.1    pooka 		return EINVAL;
    607   1.1    pooka 	if (dlen < sizeof(uint32_t))
    608   1.1    pooka 		return EINVAL;
    609   1.1    pooka 
    610   1.1    pooka 	fws = &sc->sc_fw.fw_sects[type];
    611   1.1    pooka 	if (fws->fw_count >= IWM_UCODE_SECT_MAX)
    612   1.1    pooka 		return EINVAL;
    613   1.1    pooka 
    614   1.1    pooka 	fwone = &fws->fw_sect[fws->fw_count];
    615   1.1    pooka 
    616   1.1    pooka 	/* first 32bit are device load offset */
    617   1.1    pooka 	memcpy(&fwone->fws_devoff, data, sizeof(uint32_t));
    618   1.1    pooka 
    619   1.1    pooka 	/* rest is data */
    620   1.1    pooka 	fwone->fws_data = data + sizeof(uint32_t);
    621   1.1    pooka 	fwone->fws_len = dlen - sizeof(uint32_t);
    622   1.1    pooka 
    623   1.1    pooka 	/* for freeing the buffer during driver unload */
    624   1.1    pooka 	fwone->fws_alloc = data;
    625   1.1    pooka 	fwone->fws_allocsize = dlen;
    626   1.1    pooka 
    627   1.1    pooka 	fws->fw_count++;
    628   1.1    pooka 	fws->fw_totlen += fwone->fws_len;
    629   1.1    pooka 
    630   1.1    pooka 	return 0;
    631   1.1    pooka }
    632   1.1    pooka 
    633   1.1    pooka struct iwm_tlv_calib_data {
    634   1.1    pooka 	uint32_t ucode_type;
    635   1.1    pooka 	struct iwm_tlv_calib_ctrl calib;
    636   1.1    pooka } __packed;
    637   1.1    pooka 
    638   1.4   nonaka static int
    639   1.1    pooka iwm_set_default_calib(struct iwm_softc *sc, const void *data)
    640   1.1    pooka {
    641   1.1    pooka 	const struct iwm_tlv_calib_data *def_calib = data;
    642   1.1    pooka 	uint32_t ucode_type = le32toh(def_calib->ucode_type);
    643   1.1    pooka 
    644   1.1    pooka 	if (ucode_type >= IWM_UCODE_TYPE_MAX) {
    645  1.45   nonaka 		DPRINTF(("%s: Wrong ucode_type %u for default calibration.\n",
    646  1.45   nonaka 		    DEVNAME(sc), ucode_type));
    647   1.1    pooka 		return EINVAL;
    648   1.1    pooka 	}
    649   1.1    pooka 
    650   1.1    pooka 	sc->sc_default_calib[ucode_type].flow_trigger =
    651   1.1    pooka 	    def_calib->calib.flow_trigger;
    652   1.1    pooka 	sc->sc_default_calib[ucode_type].event_trigger =
    653   1.1    pooka 	    def_calib->calib.event_trigger;
    654   1.1    pooka 
    655   1.1    pooka 	return 0;
    656   1.1    pooka }
    657   1.1    pooka 
    658   1.4   nonaka static int
    659  1.61   nonaka iwm_read_firmware(struct iwm_softc *sc, enum iwm_ucode_type ucode_type)
    660   1.1    pooka {
    661   1.1    pooka 	struct iwm_fw_info *fw = &sc->sc_fw;
    662   1.8   nonaka 	struct iwm_tlv_ucode_header *uhdr;
    663   1.8   nonaka 	struct iwm_ucode_tlv tlv;
    664   1.1    pooka 	enum iwm_ucode_tlv_type tlv_type;
    665   1.1    pooka 	uint8_t *data;
    666  1.45   nonaka 	int err, status;
    667   1.2   nonaka 	size_t len;
    668   1.1    pooka 
    669  1.61   nonaka 	if (ucode_type != IWM_UCODE_TYPE_INIT &&
    670  1.61   nonaka 	    fw->fw_status == IWM_FW_STATUS_DONE)
    671  1.61   nonaka 		return 0;
    672  1.61   nonaka 
    673   1.1    pooka 	if (fw->fw_status == IWM_FW_STATUS_NONE) {
    674   1.1    pooka 		fw->fw_status = IWM_FW_STATUS_INPROGRESS;
    675   1.1    pooka 	} else {
    676   1.1    pooka 		while (fw->fw_status == IWM_FW_STATUS_INPROGRESS)
    677   1.1    pooka 			tsleep(&sc->sc_fw, 0, "iwmfwp", 0);
    678   1.1    pooka 	}
    679   1.1    pooka 	status = fw->fw_status;
    680   1.1    pooka 
    681   1.1    pooka 	if (status == IWM_FW_STATUS_DONE)
    682   1.1    pooka 		return 0;
    683   1.1    pooka 
    684  1.45   nonaka 	err = iwm_firmload(sc);
    685  1.45   nonaka 	if (err) {
    686   1.3   nonaka 		aprint_error_dev(sc->sc_dev,
    687   1.3   nonaka 		    "could not read firmware %s (error %d)\n",
    688  1.45   nonaka 		    sc->sc_fwname, err);
    689   1.1    pooka 		goto out;
    690   1.1    pooka 	}
    691   1.1    pooka 
    692  1.45   nonaka 	sc->sc_capaflags = 0;
    693  1.45   nonaka 	sc->sc_capa_n_scan_channels = IWM_MAX_NUM_SCAN_CHANNELS;
    694  1.45   nonaka 	memset(sc->sc_enabled_capa, 0, sizeof(sc->sc_enabled_capa));
    695  1.45   nonaka 	memset(sc->sc_fw_mcc, 0, sizeof(sc->sc_fw_mcc));
    696   1.1    pooka 
    697   1.1    pooka 	uhdr = (void *)fw->fw_rawdata;
    698   1.1    pooka 	if (*(uint32_t *)fw->fw_rawdata != 0
    699   1.1    pooka 	    || le32toh(uhdr->magic) != IWM_TLV_UCODE_MAGIC) {
    700   1.3   nonaka 		aprint_error_dev(sc->sc_dev, "invalid firmware %s\n",
    701   1.3   nonaka 		    sc->sc_fwname);
    702  1.45   nonaka 		err = EINVAL;
    703   1.1    pooka 		goto out;
    704   1.1    pooka 	}
    705   1.1    pooka 
    706  1.45   nonaka 	snprintf(sc->sc_fwver, sizeof(sc->sc_fwver), "%d.%d (API ver %d)",
    707  1.45   nonaka 	    IWM_UCODE_MAJOR(le32toh(uhdr->ver)),
    708  1.45   nonaka 	    IWM_UCODE_MINOR(le32toh(uhdr->ver)),
    709  1.45   nonaka 	    IWM_UCODE_API(le32toh(uhdr->ver)));
    710   1.1    pooka 	data = uhdr->data;
    711   1.1    pooka 	len = fw->fw_rawsize - sizeof(*uhdr);
    712   1.1    pooka 
    713   1.1    pooka 	while (len >= sizeof(tlv)) {
    714   1.2   nonaka 		size_t tlv_len;
    715   1.1    pooka 		void *tlv_data;
    716   1.1    pooka 
    717   1.1    pooka 		memcpy(&tlv, data, sizeof(tlv));
    718   1.1    pooka 		tlv_len = le32toh(tlv.length);
    719   1.1    pooka 		tlv_type = le32toh(tlv.type);
    720   1.1    pooka 
    721   1.1    pooka 		len -= sizeof(tlv);
    722   1.1    pooka 		data += sizeof(tlv);
    723   1.1    pooka 		tlv_data = data;
    724   1.1    pooka 
    725   1.1    pooka 		if (len < tlv_len) {
    726   1.3   nonaka 			aprint_error_dev(sc->sc_dev,
    727   1.3   nonaka 			    "firmware too short: %zu bytes\n", len);
    728  1.45   nonaka 			err = EINVAL;
    729   1.1    pooka 			goto parse_out;
    730   1.1    pooka 		}
    731   1.1    pooka 
    732  1.45   nonaka 		switch (tlv_type) {
    733   1.1    pooka 		case IWM_UCODE_TLV_PROBE_MAX_LEN:
    734   1.1    pooka 			if (tlv_len < sizeof(uint32_t)) {
    735  1.45   nonaka 				err = EINVAL;
    736   1.1    pooka 				goto parse_out;
    737   1.1    pooka 			}
    738   1.1    pooka 			sc->sc_capa_max_probe_len
    739   1.1    pooka 			    = le32toh(*(uint32_t *)tlv_data);
    740   1.1    pooka 			/* limit it to something sensible */
    741  1.45   nonaka 			if (sc->sc_capa_max_probe_len >
    742  1.45   nonaka 			    IWM_SCAN_OFFLOAD_PROBE_REQ_SIZE) {
    743  1.45   nonaka 				err = EINVAL;
    744   1.1    pooka 				goto parse_out;
    745   1.1    pooka 			}
    746   1.1    pooka 			break;
    747   1.1    pooka 		case IWM_UCODE_TLV_PAN:
    748   1.1    pooka 			if (tlv_len) {
    749  1.45   nonaka 				err = EINVAL;
    750   1.1    pooka 				goto parse_out;
    751   1.1    pooka 			}
    752   1.1    pooka 			sc->sc_capaflags |= IWM_UCODE_TLV_FLAGS_PAN;
    753   1.1    pooka 			break;
    754   1.1    pooka 		case IWM_UCODE_TLV_FLAGS:
    755   1.1    pooka 			if (tlv_len < sizeof(uint32_t)) {
    756  1.45   nonaka 				err = EINVAL;
    757   1.1    pooka 				goto parse_out;
    758   1.1    pooka 			}
    759  1.71   nonaka 			if (tlv_len % sizeof(uint32_t)) {
    760  1.71   nonaka 				err = EINVAL;
    761  1.71   nonaka 				goto parse_out;
    762  1.71   nonaka 			}
    763   1.1    pooka 			/*
    764   1.1    pooka 			 * Apparently there can be many flags, but Linux driver
    765   1.1    pooka 			 * parses only the first one, and so do we.
    766   1.1    pooka 			 *
    767   1.1    pooka 			 * XXX: why does this override IWM_UCODE_TLV_PAN?
    768   1.1    pooka 			 * Intentional or a bug?  Observations from
    769   1.1    pooka 			 * current firmware file:
    770   1.1    pooka 			 *  1) TLV_PAN is parsed first
    771   1.1    pooka 			 *  2) TLV_FLAGS contains TLV_FLAGS_PAN
    772   1.1    pooka 			 * ==> this resets TLV_PAN to itself... hnnnk
    773   1.1    pooka 			 */
    774   1.1    pooka 			sc->sc_capaflags = le32toh(*(uint32_t *)tlv_data);
    775   1.1    pooka 			break;
    776   1.1    pooka 		case IWM_UCODE_TLV_CSCHEME:
    777  1.45   nonaka 			err = iwm_store_cscheme(sc, tlv_data, tlv_len);
    778  1.45   nonaka 			if (err)
    779   1.1    pooka 				goto parse_out;
    780   1.1    pooka 			break;
    781  1.45   nonaka 		case IWM_UCODE_TLV_NUM_OF_CPU: {
    782  1.45   nonaka 			uint32_t num_cpu;
    783   1.1    pooka 			if (tlv_len != sizeof(uint32_t)) {
    784  1.45   nonaka 				err = EINVAL;
    785   1.1    pooka 				goto parse_out;
    786   1.1    pooka 			}
    787  1.45   nonaka 			num_cpu = le32toh(*(uint32_t *)tlv_data);
    788  1.71   nonaka 			if (num_cpu == 2) {
    789  1.71   nonaka 				fw->fw_sects[IWM_UCODE_TYPE_REGULAR].is_dual_cpus =
    790  1.71   nonaka 				    true;
    791  1.71   nonaka 				fw->fw_sects[IWM_UCODE_TYPE_INIT].is_dual_cpus =
    792  1.71   nonaka 				    true;
    793  1.71   nonaka 				fw->fw_sects[IWM_UCODE_TYPE_WOW].is_dual_cpus =
    794  1.71   nonaka 				    true;
    795  1.71   nonaka 			} else if (num_cpu < 1 || num_cpu > 2) {
    796  1.45   nonaka 				err = EINVAL;
    797   1.1    pooka 				goto parse_out;
    798   1.1    pooka 			}
    799   1.1    pooka 			break;
    800  1.45   nonaka 		}
    801   1.1    pooka 		case IWM_UCODE_TLV_SEC_RT:
    802  1.45   nonaka 			err = iwm_firmware_store_section(sc,
    803  1.45   nonaka 			    IWM_UCODE_TYPE_REGULAR, tlv_data, tlv_len);
    804  1.45   nonaka 			if (err)
    805   1.1    pooka 				goto parse_out;
    806   1.1    pooka 			break;
    807   1.1    pooka 		case IWM_UCODE_TLV_SEC_INIT:
    808  1.45   nonaka 			err = iwm_firmware_store_section(sc,
    809  1.45   nonaka 			    IWM_UCODE_TYPE_INIT, tlv_data, tlv_len);
    810  1.45   nonaka 			if (err)
    811   1.1    pooka 				goto parse_out;
    812   1.1    pooka 			break;
    813   1.1    pooka 		case IWM_UCODE_TLV_SEC_WOWLAN:
    814  1.45   nonaka 			err = iwm_firmware_store_section(sc,
    815  1.45   nonaka 			    IWM_UCODE_TYPE_WOW, tlv_data, tlv_len);
    816  1.45   nonaka 			if (err)
    817   1.1    pooka 				goto parse_out;
    818   1.1    pooka 			break;
    819   1.1    pooka 		case IWM_UCODE_TLV_DEF_CALIB:
    820   1.1    pooka 			if (tlv_len != sizeof(struct iwm_tlv_calib_data)) {
    821  1.45   nonaka 				err = EINVAL;
    822   1.1    pooka 				goto parse_out;
    823   1.1    pooka 			}
    824  1.45   nonaka 			err = iwm_set_default_calib(sc, tlv_data);
    825  1.45   nonaka 			if (err)
    826   1.1    pooka 				goto parse_out;
    827   1.1    pooka 			break;
    828   1.1    pooka 		case IWM_UCODE_TLV_PHY_SKU:
    829   1.1    pooka 			if (tlv_len != sizeof(uint32_t)) {
    830  1.45   nonaka 				err = EINVAL;
    831   1.1    pooka 				goto parse_out;
    832   1.1    pooka 			}
    833   1.1    pooka 			sc->sc_fw_phy_config = le32toh(*(uint32_t *)tlv_data);
    834   1.1    pooka 			break;
    835   1.1    pooka 
    836  1.45   nonaka 		case IWM_UCODE_TLV_API_CHANGES_SET: {
    837  1.45   nonaka 			struct iwm_ucode_api *api;
    838  1.71   nonaka 			uint32_t idx, bits;
    839  1.71   nonaka 			int i;
    840  1.45   nonaka 			if (tlv_len != sizeof(*api)) {
    841  1.45   nonaka 				err = EINVAL;
    842  1.45   nonaka 				goto parse_out;
    843  1.45   nonaka 			}
    844  1.45   nonaka 			api = (struct iwm_ucode_api *)tlv_data;
    845  1.71   nonaka 			idx = le32toh(api->api_index);
    846  1.71   nonaka 			bits = le32toh(api->api_flags);
    847  1.71   nonaka 			if (idx >= howmany(IWM_NUM_UCODE_TLV_API, 32)) {
    848  1.61   nonaka 				err = EINVAL;
    849  1.45   nonaka 				goto parse_out;
    850  1.45   nonaka 			}
    851  1.71   nonaka 			for (i = 0; i < 32; i++) {
    852  1.71   nonaka 				if (!ISSET(bits, __BIT(i)))
    853  1.71   nonaka 					continue;
    854  1.71   nonaka 				setbit(sc->sc_ucode_api, i + (32 * idx));
    855  1.71   nonaka 			}
    856  1.45   nonaka 			break;
    857  1.45   nonaka 		}
    858  1.45   nonaka 
    859  1.45   nonaka 		case IWM_UCODE_TLV_ENABLED_CAPABILITIES: {
    860  1.45   nonaka 			struct iwm_ucode_capa *capa;
    861  1.71   nonaka 			uint32_t idx, bits;
    862  1.71   nonaka 			int i;
    863  1.45   nonaka 			if (tlv_len != sizeof(*capa)) {
    864  1.45   nonaka 				err = EINVAL;
    865  1.45   nonaka 				goto parse_out;
    866  1.45   nonaka 			}
    867  1.45   nonaka 			capa = (struct iwm_ucode_capa *)tlv_data;
    868  1.45   nonaka 			idx = le32toh(capa->api_index);
    869  1.71   nonaka 			bits = le32toh(capa->api_capa);
    870  1.45   nonaka 			if (idx >= howmany(IWM_NUM_UCODE_TLV_CAPA, 32)) {
    871  1.61   nonaka 				err = EINVAL;
    872  1.45   nonaka 				goto parse_out;
    873  1.45   nonaka 			}
    874  1.45   nonaka 			for (i = 0; i < 32; i++) {
    875  1.71   nonaka 				if (!ISSET(bits, __BIT(i)))
    876  1.45   nonaka 					continue;
    877  1.45   nonaka 				setbit(sc->sc_enabled_capa, i + (32 * idx));
    878  1.45   nonaka 			}
    879  1.45   nonaka 			break;
    880  1.45   nonaka 		}
    881  1.45   nonaka 
    882  1.45   nonaka 		case IWM_UCODE_TLV_FW_UNDOCUMENTED1:
    883  1.45   nonaka 		case IWM_UCODE_TLV_SDIO_ADMA_ADDR:
    884  1.45   nonaka 		case IWM_UCODE_TLV_FW_GSCAN_CAPA:
    885  1.71   nonaka 		case IWM_UCODE_TLV_FW_MEM_SEG:
    886   1.1    pooka 			/* ignore, not used by current driver */
    887   1.1    pooka 			break;
    888   1.1    pooka 
    889  1.45   nonaka 		case IWM_UCODE_TLV_SEC_RT_USNIFFER:
    890  1.45   nonaka 			err = iwm_firmware_store_section(sc,
    891  1.45   nonaka 			    IWM_UCODE_TYPE_REGULAR_USNIFFER, tlv_data,
    892  1.45   nonaka 			    tlv_len);
    893  1.45   nonaka 			if (err)
    894  1.45   nonaka 				goto parse_out;
    895  1.45   nonaka 			break;
    896  1.45   nonaka 
    897  1.71   nonaka 		case IWM_UCODE_TLV_PAGING: {
    898  1.71   nonaka 			uint32_t paging_mem_size;
    899  1.71   nonaka 			if (tlv_len != sizeof(paging_mem_size)) {
    900  1.71   nonaka 				err = EINVAL;
    901  1.71   nonaka 				goto parse_out;
    902  1.71   nonaka 			}
    903  1.71   nonaka 			paging_mem_size = le32toh(*(uint32_t *)tlv_data);
    904  1.71   nonaka 			if (paging_mem_size > IWM_MAX_PAGING_IMAGE_SIZE) {
    905  1.71   nonaka 				err = EINVAL;
    906  1.71   nonaka 				goto parse_out;
    907  1.71   nonaka 			}
    908  1.71   nonaka 			if (paging_mem_size & (IWM_FW_PAGING_SIZE - 1)) {
    909  1.71   nonaka 				err = EINVAL;
    910  1.71   nonaka 				goto parse_out;
    911  1.71   nonaka 			}
    912  1.71   nonaka 			fw->fw_sects[IWM_UCODE_TYPE_REGULAR].paging_mem_size =
    913  1.71   nonaka 			    paging_mem_size;
    914  1.71   nonaka 			fw->fw_sects[IWM_UCODE_TYPE_REGULAR_USNIFFER].paging_mem_size =
    915  1.71   nonaka 			    paging_mem_size;
    916  1.71   nonaka 			break;
    917  1.71   nonaka 		}
    918  1.71   nonaka 
    919  1.45   nonaka 		case IWM_UCODE_TLV_N_SCAN_CHANNELS:
    920  1.45   nonaka 			if (tlv_len != sizeof(uint32_t)) {
    921  1.45   nonaka 				err = EINVAL;
    922  1.45   nonaka 				goto parse_out;
    923  1.45   nonaka 			}
    924  1.45   nonaka 			sc->sc_capa_n_scan_channels =
    925  1.45   nonaka 			  le32toh(*(uint32_t *)tlv_data);
    926  1.45   nonaka 			break;
    927  1.45   nonaka 
    928  1.45   nonaka 		case IWM_UCODE_TLV_FW_VERSION:
    929  1.45   nonaka 			if (tlv_len != sizeof(uint32_t) * 3) {
    930  1.45   nonaka 				err = EINVAL;
    931  1.45   nonaka 				goto parse_out;
    932  1.45   nonaka 			}
    933  1.45   nonaka 			snprintf(sc->sc_fwver, sizeof(sc->sc_fwver),
    934  1.45   nonaka 			    "%d.%d.%d",
    935  1.45   nonaka 			    le32toh(((uint32_t *)tlv_data)[0]),
    936  1.45   nonaka 			    le32toh(((uint32_t *)tlv_data)[1]),
    937  1.45   nonaka 			    le32toh(((uint32_t *)tlv_data)[2]));
    938  1.45   nonaka 			break;
    939  1.45   nonaka 
    940   1.1    pooka 		default:
    941   1.2   nonaka 			DPRINTF(("%s: unknown firmware section %d, abort\n",
    942   1.2   nonaka 			    DEVNAME(sc), tlv_type));
    943  1.45   nonaka 			err = EINVAL;
    944   1.1    pooka 			goto parse_out;
    945   1.1    pooka 		}
    946   1.1    pooka 
    947   1.1    pooka 		len -= roundup(tlv_len, 4);
    948   1.1    pooka 		data += roundup(tlv_len, 4);
    949   1.1    pooka 	}
    950   1.1    pooka 
    951  1.45   nonaka 	KASSERT(err == 0);
    952   1.1    pooka 
    953   1.1    pooka  parse_out:
    954  1.45   nonaka 	if (err) {
    955   1.3   nonaka 		aprint_error_dev(sc->sc_dev,
    956   1.3   nonaka 		    "firmware parse error, section type %d\n", tlv_type);
    957   1.1    pooka 	}
    958   1.1    pooka 
    959   1.1    pooka 	if (!(sc->sc_capaflags & IWM_UCODE_TLV_FLAGS_PM_CMD_SUPPORT)) {
    960   1.3   nonaka 		aprint_error_dev(sc->sc_dev,
    961   1.3   nonaka 		    "device uses unsupported power ops\n");
    962  1.45   nonaka 		err = ENOTSUP;
    963   1.1    pooka 	}
    964   1.1    pooka 
    965   1.1    pooka  out:
    966  1.45   nonaka 	if (err)
    967   1.2   nonaka 		fw->fw_status = IWM_FW_STATUS_NONE;
    968   1.2   nonaka 	else
    969   1.1    pooka 		fw->fw_status = IWM_FW_STATUS_DONE;
    970   1.1    pooka 	wakeup(&sc->sc_fw);
    971   1.1    pooka 
    972  1.45   nonaka 	if (err && fw->fw_rawdata != NULL) {
    973   1.1    pooka 		kmem_free(fw->fw_rawdata, fw->fw_rawsize);
    974   1.1    pooka 		fw->fw_rawdata = NULL;
    975  1.36   nonaka 		CLR(sc->sc_flags, IWM_FLAG_FW_LOADED);
    976  1.45   nonaka 		/* don't touch fw->fw_status */
    977  1.45   nonaka 		memset(fw->fw_sects, 0, sizeof(fw->fw_sects));
    978   1.1    pooka 	}
    979  1.45   nonaka 	return err;
    980   1.1    pooka }
    981   1.1    pooka 
    982   1.4   nonaka static uint32_t
    983   1.1    pooka iwm_read_prph(struct iwm_softc *sc, uint32_t addr)
    984   1.1    pooka {
    985   1.1    pooka 	IWM_WRITE(sc,
    986   1.1    pooka 	    IWM_HBUS_TARG_PRPH_RADDR, ((addr & 0x000fffff) | (3 << 24)));
    987   1.1    pooka 	IWM_BARRIER_READ_WRITE(sc);
    988   1.1    pooka 	return IWM_READ(sc, IWM_HBUS_TARG_PRPH_RDAT);
    989   1.1    pooka }
    990   1.1    pooka 
    991   1.4   nonaka static void
    992   1.1    pooka iwm_write_prph(struct iwm_softc *sc, uint32_t addr, uint32_t val)
    993   1.1    pooka {
    994   1.1    pooka 	IWM_WRITE(sc,
    995   1.1    pooka 	    IWM_HBUS_TARG_PRPH_WADDR, ((addr & 0x000fffff) | (3 << 24)));
    996   1.1    pooka 	IWM_BARRIER_WRITE(sc);
    997   1.1    pooka 	IWM_WRITE(sc, IWM_HBUS_TARG_PRPH_WDAT, val);
    998   1.1    pooka }
    999   1.1    pooka 
   1000   1.4   nonaka #ifdef IWM_DEBUG
   1001   1.4   nonaka static int
   1002   1.1    pooka iwm_read_mem(struct iwm_softc *sc, uint32_t addr, void *buf, int dwords)
   1003   1.1    pooka {
   1004  1.53   nonaka 	int offs;
   1005   1.1    pooka 	uint32_t *vals = buf;
   1006   1.1    pooka 
   1007   1.1    pooka 	if (iwm_nic_lock(sc)) {
   1008   1.1    pooka 		IWM_WRITE(sc, IWM_HBUS_TARG_MEM_RADDR, addr);
   1009   1.1    pooka 		for (offs = 0; offs < dwords; offs++)
   1010   1.1    pooka 			vals[offs] = IWM_READ(sc, IWM_HBUS_TARG_MEM_RDAT);
   1011   1.1    pooka 		iwm_nic_unlock(sc);
   1012  1.53   nonaka 		return 0;
   1013   1.1    pooka 	}
   1014  1.53   nonaka 	return EBUSY;
   1015   1.1    pooka }
   1016   1.4   nonaka #endif
   1017   1.1    pooka 
   1018   1.4   nonaka static int
   1019   1.1    pooka iwm_write_mem(struct iwm_softc *sc, uint32_t addr, const void *buf, int dwords)
   1020   1.1    pooka {
   1021   1.5   nonaka 	int offs;
   1022   1.1    pooka 	const uint32_t *vals = buf;
   1023   1.1    pooka 
   1024   1.1    pooka 	if (iwm_nic_lock(sc)) {
   1025   1.1    pooka 		IWM_WRITE(sc, IWM_HBUS_TARG_MEM_WADDR, addr);
   1026   1.1    pooka 		/* WADDR auto-increments */
   1027   1.1    pooka 		for (offs = 0; offs < dwords; offs++) {
   1028   1.1    pooka 			uint32_t val = vals ? vals[offs] : 0;
   1029   1.1    pooka 			IWM_WRITE(sc, IWM_HBUS_TARG_MEM_WDAT, val);
   1030   1.1    pooka 		}
   1031   1.1    pooka 		iwm_nic_unlock(sc);
   1032  1.53   nonaka 		return 0;
   1033   1.1    pooka 	}
   1034  1.53   nonaka 	return EBUSY;
   1035   1.1    pooka }
   1036   1.1    pooka 
   1037   1.4   nonaka static int
   1038   1.1    pooka iwm_write_mem32(struct iwm_softc *sc, uint32_t addr, uint32_t val)
   1039   1.1    pooka {
   1040   1.1    pooka 	return iwm_write_mem(sc, addr, &val, 1);
   1041   1.1    pooka }
   1042   1.1    pooka 
   1043   1.4   nonaka static int
   1044  1.45   nonaka iwm_poll_bit(struct iwm_softc *sc, int reg, uint32_t bits, uint32_t mask,
   1045  1.45   nonaka     int timo)
   1046   1.1    pooka {
   1047   1.1    pooka 	for (;;) {
   1048   1.1    pooka 		if ((IWM_READ(sc, reg) & mask) == (bits & mask)) {
   1049   1.1    pooka 			return 1;
   1050   1.1    pooka 		}
   1051   1.1    pooka 		if (timo < 10) {
   1052   1.1    pooka 			return 0;
   1053   1.1    pooka 		}
   1054   1.1    pooka 		timo -= 10;
   1055   1.1    pooka 		DELAY(10);
   1056   1.1    pooka 	}
   1057   1.1    pooka }
   1058   1.1    pooka 
   1059   1.4   nonaka static int
   1060   1.1    pooka iwm_nic_lock(struct iwm_softc *sc)
   1061   1.1    pooka {
   1062   1.1    pooka 	int rv = 0;
   1063   1.1    pooka 
   1064  1.59   nonaka 	if (sc->sc_cmd_hold_nic_awake)
   1065  1.59   nonaka 		return 1;
   1066  1.59   nonaka 
   1067   1.1    pooka 	IWM_SETBITS(sc, IWM_CSR_GP_CNTRL,
   1068   1.1    pooka 	    IWM_CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
   1069   1.1    pooka 
   1070  1.45   nonaka 	if (sc->sc_device_family == IWM_DEVICE_FAMILY_8000)
   1071  1.45   nonaka 		DELAY(2);
   1072  1.45   nonaka 
   1073   1.1    pooka 	if (iwm_poll_bit(sc, IWM_CSR_GP_CNTRL,
   1074   1.1    pooka 	    IWM_CSR_GP_CNTRL_REG_VAL_MAC_ACCESS_EN,
   1075   1.1    pooka 	    IWM_CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY
   1076   1.1    pooka 	     | IWM_CSR_GP_CNTRL_REG_FLAG_GOING_TO_SLEEP, 15000)) {
   1077  1.38    ozaki 		rv = 1;
   1078   1.1    pooka 	} else {
   1079  1.69   nonaka 		DPRINTF(("%s: resetting device via NMI\n", DEVNAME(sc)));
   1080   1.1    pooka 		IWM_WRITE(sc, IWM_CSR_RESET, IWM_CSR_RESET_REG_FLAG_FORCE_NMI);
   1081   1.1    pooka 	}
   1082   1.1    pooka 
   1083   1.1    pooka 	return rv;
   1084   1.1    pooka }
   1085   1.1    pooka 
   1086   1.4   nonaka static void
   1087   1.1    pooka iwm_nic_unlock(struct iwm_softc *sc)
   1088   1.1    pooka {
   1089  1.59   nonaka 
   1090  1.59   nonaka 	if (sc->sc_cmd_hold_nic_awake)
   1091  1.59   nonaka 		return;
   1092  1.59   nonaka 
   1093   1.1    pooka 	IWM_CLRBITS(sc, IWM_CSR_GP_CNTRL,
   1094   1.1    pooka 	    IWM_CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
   1095   1.1    pooka }
   1096   1.1    pooka 
   1097   1.4   nonaka static void
   1098  1.45   nonaka iwm_set_bits_mask_prph(struct iwm_softc *sc, uint32_t reg, uint32_t bits,
   1099  1.45   nonaka     uint32_t mask)
   1100   1.1    pooka {
   1101   1.1    pooka 	uint32_t val;
   1102   1.1    pooka 
   1103   1.1    pooka 	/* XXX: no error path? */
   1104   1.1    pooka 	if (iwm_nic_lock(sc)) {
   1105   1.1    pooka 		val = iwm_read_prph(sc, reg) & mask;
   1106   1.1    pooka 		val |= bits;
   1107   1.1    pooka 		iwm_write_prph(sc, reg, val);
   1108   1.1    pooka 		iwm_nic_unlock(sc);
   1109   1.1    pooka 	}
   1110   1.1    pooka }
   1111   1.1    pooka 
   1112   1.4   nonaka static void
   1113   1.1    pooka iwm_set_bits_prph(struct iwm_softc *sc, uint32_t reg, uint32_t bits)
   1114   1.1    pooka {
   1115   1.1    pooka 	iwm_set_bits_mask_prph(sc, reg, bits, ~0);
   1116   1.1    pooka }
   1117   1.1    pooka 
   1118   1.4   nonaka static void
   1119   1.1    pooka iwm_clear_bits_prph(struct iwm_softc *sc, uint32_t reg, uint32_t bits)
   1120   1.1    pooka {
   1121   1.1    pooka 	iwm_set_bits_mask_prph(sc, reg, 0, ~bits);
   1122   1.1    pooka }
   1123   1.1    pooka 
   1124   1.4   nonaka static int
   1125   1.1    pooka iwm_dma_contig_alloc(bus_dma_tag_t tag, struct iwm_dma_info *dma,
   1126   1.1    pooka     bus_size_t size, bus_size_t alignment)
   1127   1.1    pooka {
   1128  1.45   nonaka 	int nsegs, err;
   1129   1.1    pooka 	void *va;
   1130   1.1    pooka 
   1131   1.1    pooka 	dma->tag = tag;
   1132   1.1    pooka 	dma->size = size;
   1133   1.1    pooka 
   1134  1.45   nonaka 	err = bus_dmamap_create(tag, size, 1, size, 0, BUS_DMA_NOWAIT,
   1135   1.1    pooka 	    &dma->map);
   1136  1.45   nonaka 	if (err)
   1137   1.1    pooka 		goto fail;
   1138   1.1    pooka 
   1139  1.45   nonaka 	err = bus_dmamem_alloc(tag, size, alignment, 0, &dma->seg, 1, &nsegs,
   1140   1.1    pooka 	    BUS_DMA_NOWAIT);
   1141  1.45   nonaka 	if (err)
   1142   1.1    pooka 		goto fail;
   1143   1.1    pooka 
   1144  1.45   nonaka 	err = bus_dmamem_map(tag, &dma->seg, 1, size, &va, BUS_DMA_NOWAIT);
   1145  1.45   nonaka 	if (err)
   1146   1.1    pooka 		goto fail;
   1147   1.1    pooka 	dma->vaddr = va;
   1148   1.1    pooka 
   1149  1.45   nonaka 	err = bus_dmamap_load(tag, dma->map, dma->vaddr, size, NULL,
   1150   1.1    pooka 	    BUS_DMA_NOWAIT);
   1151  1.45   nonaka 	if (err)
   1152   1.1    pooka 		goto fail;
   1153   1.1    pooka 
   1154   1.1    pooka 	memset(dma->vaddr, 0, size);
   1155   1.1    pooka 	bus_dmamap_sync(tag, dma->map, 0, size, BUS_DMASYNC_PREWRITE);
   1156   1.1    pooka 	dma->paddr = dma->map->dm_segs[0].ds_addr;
   1157   1.1    pooka 
   1158   1.1    pooka 	return 0;
   1159   1.1    pooka 
   1160   1.1    pooka fail:	iwm_dma_contig_free(dma);
   1161  1.45   nonaka 	return err;
   1162   1.1    pooka }
   1163   1.1    pooka 
   1164   1.4   nonaka static void
   1165   1.1    pooka iwm_dma_contig_free(struct iwm_dma_info *dma)
   1166   1.1    pooka {
   1167   1.1    pooka 	if (dma->map != NULL) {
   1168   1.1    pooka 		if (dma->vaddr != NULL) {
   1169   1.1    pooka 			bus_dmamap_sync(dma->tag, dma->map, 0, dma->size,
   1170   1.1    pooka 			    BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
   1171   1.1    pooka 			bus_dmamap_unload(dma->tag, dma->map);
   1172   1.1    pooka 			bus_dmamem_unmap(dma->tag, dma->vaddr, dma->size);
   1173   1.1    pooka 			bus_dmamem_free(dma->tag, &dma->seg, 1);
   1174   1.1    pooka 			dma->vaddr = NULL;
   1175   1.1    pooka 		}
   1176   1.1    pooka 		bus_dmamap_destroy(dma->tag, dma->map);
   1177   1.1    pooka 		dma->map = NULL;
   1178   1.1    pooka 	}
   1179   1.1    pooka }
   1180   1.1    pooka 
   1181   1.4   nonaka static int
   1182   1.1    pooka iwm_alloc_rx_ring(struct iwm_softc *sc, struct iwm_rx_ring *ring)
   1183   1.1    pooka {
   1184   1.1    pooka 	bus_size_t size;
   1185  1.45   nonaka 	int i, err;
   1186   1.1    pooka 
   1187   1.1    pooka 	ring->cur = 0;
   1188   1.1    pooka 
   1189   1.1    pooka 	/* Allocate RX descriptors (256-byte aligned). */
   1190   1.1    pooka 	size = IWM_RX_RING_COUNT * sizeof(uint32_t);
   1191  1.45   nonaka 	err = iwm_dma_contig_alloc(sc->sc_dmat, &ring->desc_dma, size, 256);
   1192  1.45   nonaka 	if (err) {
   1193   1.3   nonaka 		aprint_error_dev(sc->sc_dev,
   1194   1.3   nonaka 		    "could not allocate RX ring DMA memory\n");
   1195   1.1    pooka 		goto fail;
   1196   1.1    pooka 	}
   1197   1.1    pooka 	ring->desc = ring->desc_dma.vaddr;
   1198   1.1    pooka 
   1199   1.1    pooka 	/* Allocate RX status area (16-byte aligned). */
   1200  1.45   nonaka 	err = iwm_dma_contig_alloc(sc->sc_dmat, &ring->stat_dma,
   1201   1.1    pooka 	    sizeof(*ring->stat), 16);
   1202  1.45   nonaka 	if (err) {
   1203   1.3   nonaka 		aprint_error_dev(sc->sc_dev,
   1204   1.3   nonaka 		    "could not allocate RX status DMA memory\n");
   1205   1.1    pooka 		goto fail;
   1206   1.1    pooka 	}
   1207   1.1    pooka 	ring->stat = ring->stat_dma.vaddr;
   1208   1.1    pooka 
   1209   1.1    pooka 	for (i = 0; i < IWM_RX_RING_COUNT; i++) {
   1210   1.1    pooka 		struct iwm_rx_data *data = &ring->data[i];
   1211   1.1    pooka 
   1212   1.1    pooka 		memset(data, 0, sizeof(*data));
   1213  1.45   nonaka 		err = bus_dmamap_create(sc->sc_dmat, IWM_RBUF_SIZE, 1,
   1214   1.1    pooka 		    IWM_RBUF_SIZE, 0, BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW,
   1215   1.1    pooka 		    &data->map);
   1216  1.45   nonaka 		if (err) {
   1217   1.3   nonaka 			aprint_error_dev(sc->sc_dev,
   1218   1.3   nonaka 			    "could not create RX buf DMA map\n");
   1219   1.1    pooka 			goto fail;
   1220   1.1    pooka 		}
   1221   1.1    pooka 
   1222  1.45   nonaka 		err = iwm_rx_addbuf(sc, IWM_RBUF_SIZE, i);
   1223  1.45   nonaka 		if (err)
   1224   1.1    pooka 			goto fail;
   1225   1.1    pooka 	}
   1226   1.1    pooka 	return 0;
   1227   1.1    pooka 
   1228   1.1    pooka fail:	iwm_free_rx_ring(sc, ring);
   1229  1.45   nonaka 	return err;
   1230   1.1    pooka }
   1231   1.1    pooka 
   1232   1.4   nonaka static void
   1233  1.45   nonaka iwm_disable_rx_dma(struct iwm_softc *sc)
   1234   1.1    pooka {
   1235   1.1    pooka 	int ntries;
   1236   1.1    pooka 
   1237   1.1    pooka 	if (iwm_nic_lock(sc)) {
   1238   1.1    pooka 		IWM_WRITE(sc, IWM_FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
   1239   1.1    pooka 		for (ntries = 0; ntries < 1000; ntries++) {
   1240   1.1    pooka 			if (IWM_READ(sc, IWM_FH_MEM_RSSR_RX_STATUS_REG) &
   1241   1.1    pooka 			    IWM_FH_RSSR_CHNL0_RX_STATUS_CHNL_IDLE)
   1242   1.1    pooka 				break;
   1243   1.1    pooka 			DELAY(10);
   1244   1.1    pooka 		}
   1245   1.1    pooka 		iwm_nic_unlock(sc);
   1246   1.1    pooka 	}
   1247  1.45   nonaka }
   1248  1.45   nonaka 
   1249  1.45   nonaka void
   1250  1.45   nonaka iwm_reset_rx_ring(struct iwm_softc *sc, struct iwm_rx_ring *ring)
   1251  1.45   nonaka {
   1252   1.1    pooka 	ring->cur = 0;
   1253  1.45   nonaka 	memset(ring->stat, 0, sizeof(*ring->stat));
   1254  1.45   nonaka 	bus_dmamap_sync(sc->sc_dmat, ring->stat_dma.map, 0,
   1255  1.45   nonaka 	    ring->stat_dma.size, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
   1256   1.1    pooka }
   1257   1.1    pooka 
   1258   1.4   nonaka static void
   1259   1.1    pooka iwm_free_rx_ring(struct iwm_softc *sc, struct iwm_rx_ring *ring)
   1260   1.1    pooka {
   1261   1.1    pooka 	int i;
   1262   1.1    pooka 
   1263   1.1    pooka 	iwm_dma_contig_free(&ring->desc_dma);
   1264   1.1    pooka 	iwm_dma_contig_free(&ring->stat_dma);
   1265   1.1    pooka 
   1266   1.1    pooka 	for (i = 0; i < IWM_RX_RING_COUNT; i++) {
   1267   1.1    pooka 		struct iwm_rx_data *data = &ring->data[i];
   1268   1.1    pooka 
   1269   1.1    pooka 		if (data->m != NULL) {
   1270   1.1    pooka 			bus_dmamap_sync(sc->sc_dmat, data->map, 0,
   1271   1.1    pooka 			    data->map->dm_mapsize, BUS_DMASYNC_POSTREAD);
   1272   1.1    pooka 			bus_dmamap_unload(sc->sc_dmat, data->map);
   1273   1.1    pooka 			m_freem(data->m);
   1274  1.45   nonaka 			data->m = NULL;
   1275   1.1    pooka 		}
   1276  1.45   nonaka 		if (data->map != NULL) {
   1277   1.1    pooka 			bus_dmamap_destroy(sc->sc_dmat, data->map);
   1278  1.45   nonaka 			data->map = NULL;
   1279  1.45   nonaka 		}
   1280   1.1    pooka 	}
   1281   1.1    pooka }
   1282   1.1    pooka 
   1283   1.4   nonaka static int
   1284   1.1    pooka iwm_alloc_tx_ring(struct iwm_softc *sc, struct iwm_tx_ring *ring, int qid)
   1285   1.1    pooka {
   1286   1.1    pooka 	bus_addr_t paddr;
   1287   1.1    pooka 	bus_size_t size;
   1288  1.61   nonaka 	int i, err, nsegs;
   1289   1.1    pooka 
   1290   1.1    pooka 	ring->qid = qid;
   1291   1.1    pooka 	ring->queued = 0;
   1292   1.1    pooka 	ring->cur = 0;
   1293   1.1    pooka 
   1294   1.1    pooka 	/* Allocate TX descriptors (256-byte aligned). */
   1295   1.1    pooka 	size = IWM_TX_RING_COUNT * sizeof (struct iwm_tfd);
   1296  1.45   nonaka 	err = iwm_dma_contig_alloc(sc->sc_dmat, &ring->desc_dma, size, 256);
   1297  1.45   nonaka 	if (err) {
   1298   1.3   nonaka 		aprint_error_dev(sc->sc_dev,
   1299   1.3   nonaka 		    "could not allocate TX ring DMA memory\n");
   1300   1.1    pooka 		goto fail;
   1301   1.1    pooka 	}
   1302   1.1    pooka 	ring->desc = ring->desc_dma.vaddr;
   1303   1.1    pooka 
   1304   1.1    pooka 	/*
   1305   1.1    pooka 	 * We only use rings 0 through 9 (4 EDCA + cmd) so there is no need
   1306   1.1    pooka 	 * to allocate commands space for other rings.
   1307   1.1    pooka 	 */
   1308  1.45   nonaka 	if (qid > IWM_CMD_QUEUE)
   1309   1.1    pooka 		return 0;
   1310   1.1    pooka 
   1311   1.1    pooka 	size = IWM_TX_RING_COUNT * sizeof(struct iwm_device_cmd);
   1312  1.45   nonaka 	err = iwm_dma_contig_alloc(sc->sc_dmat, &ring->cmd_dma, size, 4);
   1313  1.45   nonaka 	if (err) {
   1314   1.3   nonaka 		aprint_error_dev(sc->sc_dev,
   1315   1.3   nonaka 		    "could not allocate TX cmd DMA memory\n");
   1316   1.1    pooka 		goto fail;
   1317   1.1    pooka 	}
   1318   1.1    pooka 	ring->cmd = ring->cmd_dma.vaddr;
   1319   1.1    pooka 
   1320   1.1    pooka 	paddr = ring->cmd_dma.paddr;
   1321   1.1    pooka 	for (i = 0; i < IWM_TX_RING_COUNT; i++) {
   1322   1.1    pooka 		struct iwm_tx_data *data = &ring->data[i];
   1323  1.45   nonaka 		size_t mapsize;
   1324   1.1    pooka 
   1325   1.1    pooka 		data->cmd_paddr = paddr;
   1326   1.1    pooka 		data->scratch_paddr = paddr + sizeof(struct iwm_cmd_header)
   1327   1.1    pooka 		    + offsetof(struct iwm_tx_cmd, scratch);
   1328   1.1    pooka 		paddr += sizeof(struct iwm_device_cmd);
   1329   1.1    pooka 
   1330  1.45   nonaka 		/* FW commands may require more mapped space than packets. */
   1331  1.61   nonaka 		if (qid == IWM_CMD_QUEUE) {
   1332  1.61   nonaka 			mapsize = IWM_RBUF_SIZE;
   1333  1.61   nonaka 			nsegs = 1;
   1334  1.61   nonaka 		} else {
   1335  1.45   nonaka 			mapsize = MCLBYTES;
   1336  1.61   nonaka 			nsegs = IWM_NUM_OF_TBS - 2;
   1337  1.61   nonaka 		}
   1338  1.61   nonaka 		err = bus_dmamap_create(sc->sc_dmat, mapsize, nsegs, mapsize,
   1339  1.61   nonaka 		    0, BUS_DMA_NOWAIT, &data->map);
   1340  1.45   nonaka 		if (err) {
   1341   1.3   nonaka 			aprint_error_dev(sc->sc_dev,
   1342   1.3   nonaka 			    "could not create TX buf DMA map\n");
   1343   1.1    pooka 			goto fail;
   1344   1.1    pooka 		}
   1345   1.1    pooka 	}
   1346   1.1    pooka 	KASSERT(paddr == ring->cmd_dma.paddr + size);
   1347   1.1    pooka 	return 0;
   1348   1.1    pooka 
   1349   1.1    pooka fail:	iwm_free_tx_ring(sc, ring);
   1350  1.45   nonaka 	return err;
   1351   1.1    pooka }
   1352   1.1    pooka 
   1353   1.4   nonaka static void
   1354  1.59   nonaka iwm_clear_cmd_in_flight(struct iwm_softc *sc)
   1355  1.59   nonaka {
   1356  1.59   nonaka 
   1357  1.59   nonaka 	if (!sc->apmg_wake_up_wa)
   1358  1.59   nonaka 		return;
   1359  1.59   nonaka 
   1360  1.59   nonaka 	if (!sc->sc_cmd_hold_nic_awake) {
   1361  1.59   nonaka 		aprint_error_dev(sc->sc_dev,
   1362  1.59   nonaka 		    "cmd_hold_nic_awake not set\n");
   1363  1.59   nonaka 		return;
   1364  1.59   nonaka 	}
   1365  1.59   nonaka 
   1366  1.59   nonaka 	sc->sc_cmd_hold_nic_awake = 0;
   1367  1.59   nonaka 	IWM_CLRBITS(sc, IWM_CSR_GP_CNTRL,
   1368  1.59   nonaka 	    IWM_CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
   1369  1.59   nonaka }
   1370  1.59   nonaka 
   1371  1.59   nonaka static int
   1372  1.59   nonaka iwm_set_cmd_in_flight(struct iwm_softc *sc)
   1373  1.59   nonaka {
   1374  1.59   nonaka 	int ret;
   1375  1.59   nonaka 
   1376  1.59   nonaka 	/*
   1377  1.59   nonaka 	 * wake up the NIC to make sure that the firmware will see the host
   1378  1.59   nonaka 	 * command - we will let the NIC sleep once all the host commands
   1379  1.59   nonaka 	 * returned. This needs to be done only on NICs that have
   1380  1.59   nonaka 	 * apmg_wake_up_wa set.
   1381  1.59   nonaka 	 */
   1382  1.59   nonaka 	if (sc->apmg_wake_up_wa && !sc->sc_cmd_hold_nic_awake) {
   1383  1.59   nonaka 
   1384  1.59   nonaka 		IWM_SETBITS(sc, IWM_CSR_GP_CNTRL,
   1385  1.59   nonaka 		    IWM_CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
   1386  1.59   nonaka 
   1387  1.59   nonaka 		ret = iwm_poll_bit(sc, IWM_CSR_GP_CNTRL,
   1388  1.59   nonaka 		    IWM_CSR_GP_CNTRL_REG_VAL_MAC_ACCESS_EN,
   1389  1.59   nonaka 		    (IWM_CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY |
   1390  1.59   nonaka 		     IWM_CSR_GP_CNTRL_REG_FLAG_GOING_TO_SLEEP),
   1391  1.59   nonaka 		    15000);
   1392  1.59   nonaka 		if (ret == 0) {
   1393  1.59   nonaka 			IWM_CLRBITS(sc, IWM_CSR_GP_CNTRL,
   1394  1.59   nonaka 			    IWM_CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
   1395  1.59   nonaka 			aprint_error_dev(sc->sc_dev,
   1396  1.59   nonaka 			    "failed to wake NIC for hcmd\n");
   1397  1.59   nonaka 			return EIO;
   1398  1.59   nonaka 		}
   1399  1.59   nonaka 		sc->sc_cmd_hold_nic_awake = 1;
   1400  1.59   nonaka 	}
   1401  1.59   nonaka 
   1402  1.59   nonaka 	return 0;
   1403  1.59   nonaka }
   1404  1.59   nonaka static void
   1405   1.1    pooka iwm_reset_tx_ring(struct iwm_softc *sc, struct iwm_tx_ring *ring)
   1406   1.1    pooka {
   1407   1.1    pooka 	int i;
   1408   1.1    pooka 
   1409   1.1    pooka 	for (i = 0; i < IWM_TX_RING_COUNT; i++) {
   1410   1.1    pooka 		struct iwm_tx_data *data = &ring->data[i];
   1411   1.1    pooka 
   1412   1.1    pooka 		if (data->m != NULL) {
   1413   1.1    pooka 			bus_dmamap_sync(sc->sc_dmat, data->map, 0,
   1414   1.1    pooka 			    data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
   1415   1.1    pooka 			bus_dmamap_unload(sc->sc_dmat, data->map);
   1416   1.1    pooka 			m_freem(data->m);
   1417   1.1    pooka 			data->m = NULL;
   1418   1.1    pooka 		}
   1419   1.1    pooka 	}
   1420   1.1    pooka 	/* Clear TX descriptors. */
   1421   1.1    pooka 	memset(ring->desc, 0, ring->desc_dma.size);
   1422   1.1    pooka 	bus_dmamap_sync(sc->sc_dmat, ring->desc_dma.map, 0,
   1423   1.1    pooka 	    ring->desc_dma.size, BUS_DMASYNC_PREWRITE);
   1424   1.1    pooka 	sc->qfullmsk &= ~(1 << ring->qid);
   1425   1.1    pooka 	ring->queued = 0;
   1426   1.1    pooka 	ring->cur = 0;
   1427  1.59   nonaka 
   1428  1.59   nonaka 	if (ring->qid == IWM_CMD_QUEUE && sc->sc_cmd_hold_nic_awake)
   1429  1.59   nonaka 		iwm_clear_cmd_in_flight(sc);
   1430   1.1    pooka }
   1431   1.1    pooka 
   1432   1.4   nonaka static void
   1433   1.1    pooka iwm_free_tx_ring(struct iwm_softc *sc, struct iwm_tx_ring *ring)
   1434   1.1    pooka {
   1435   1.1    pooka 	int i;
   1436   1.1    pooka 
   1437   1.1    pooka 	iwm_dma_contig_free(&ring->desc_dma);
   1438   1.1    pooka 	iwm_dma_contig_free(&ring->cmd_dma);
   1439   1.1    pooka 
   1440   1.1    pooka 	for (i = 0; i < IWM_TX_RING_COUNT; i++) {
   1441   1.1    pooka 		struct iwm_tx_data *data = &ring->data[i];
   1442   1.1    pooka 
   1443   1.1    pooka 		if (data->m != NULL) {
   1444   1.1    pooka 			bus_dmamap_sync(sc->sc_dmat, data->map, 0,
   1445   1.1    pooka 			    data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
   1446   1.1    pooka 			bus_dmamap_unload(sc->sc_dmat, data->map);
   1447   1.1    pooka 			m_freem(data->m);
   1448  1.57   nonaka 			data->m = NULL;
   1449   1.1    pooka 		}
   1450  1.45   nonaka 		if (data->map != NULL) {
   1451   1.1    pooka 			bus_dmamap_destroy(sc->sc_dmat, data->map);
   1452  1.45   nonaka 			data->map = NULL;
   1453  1.45   nonaka 		}
   1454   1.1    pooka 	}
   1455   1.1    pooka }
   1456   1.1    pooka 
   1457   1.4   nonaka static void
   1458   1.1    pooka iwm_enable_rfkill_int(struct iwm_softc *sc)
   1459   1.1    pooka {
   1460   1.1    pooka 	sc->sc_intmask = IWM_CSR_INT_BIT_RF_KILL;
   1461   1.1    pooka 	IWM_WRITE(sc, IWM_CSR_INT_MASK, sc->sc_intmask);
   1462   1.1    pooka }
   1463   1.1    pooka 
   1464   1.4   nonaka static int
   1465   1.1    pooka iwm_check_rfkill(struct iwm_softc *sc)
   1466   1.1    pooka {
   1467   1.1    pooka 	uint32_t v;
   1468   1.1    pooka 	int s;
   1469   1.1    pooka 	int rv;
   1470   1.8   nonaka 
   1471   1.1    pooka 	s = splnet();
   1472   1.1    pooka 
   1473   1.1    pooka 	/*
   1474   1.1    pooka 	 * "documentation" is not really helpful here:
   1475   1.1    pooka 	 *  27:	HW_RF_KILL_SW
   1476   1.1    pooka 	 *	Indicates state of (platform's) hardware RF-Kill switch
   1477   1.1    pooka 	 *
   1478   1.1    pooka 	 * But apparently when it's off, it's on ...
   1479   1.1    pooka 	 */
   1480   1.1    pooka 	v = IWM_READ(sc, IWM_CSR_GP_CNTRL);
   1481   1.1    pooka 	rv = (v & IWM_CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW) == 0;
   1482   1.1    pooka 	if (rv) {
   1483   1.1    pooka 		sc->sc_flags |= IWM_FLAG_RFKILL;
   1484   1.1    pooka 	} else {
   1485   1.1    pooka 		sc->sc_flags &= ~IWM_FLAG_RFKILL;
   1486   1.1    pooka 	}
   1487   1.1    pooka 
   1488   1.1    pooka 	splx(s);
   1489   1.1    pooka 	return rv;
   1490   1.1    pooka }
   1491   1.1    pooka 
   1492   1.4   nonaka static void
   1493   1.1    pooka iwm_enable_interrupts(struct iwm_softc *sc)
   1494   1.1    pooka {
   1495   1.1    pooka 	sc->sc_intmask = IWM_CSR_INI_SET_MASK;
   1496   1.1    pooka 	IWM_WRITE(sc, IWM_CSR_INT_MASK, sc->sc_intmask);
   1497   1.1    pooka }
   1498   1.1    pooka 
   1499   1.4   nonaka static void
   1500   1.1    pooka iwm_restore_interrupts(struct iwm_softc *sc)
   1501   1.1    pooka {
   1502   1.1    pooka 	IWM_WRITE(sc, IWM_CSR_INT_MASK, sc->sc_intmask);
   1503   1.1    pooka }
   1504   1.1    pooka 
   1505   1.4   nonaka static void
   1506   1.1    pooka iwm_disable_interrupts(struct iwm_softc *sc)
   1507   1.1    pooka {
   1508   1.1    pooka 	int s = splnet();
   1509   1.1    pooka 
   1510   1.1    pooka 	IWM_WRITE(sc, IWM_CSR_INT_MASK, 0);
   1511   1.1    pooka 
   1512   1.1    pooka 	/* acknowledge all interrupts */
   1513   1.1    pooka 	IWM_WRITE(sc, IWM_CSR_INT, ~0);
   1514   1.1    pooka 	IWM_WRITE(sc, IWM_CSR_FH_INT_STATUS, ~0);
   1515   1.1    pooka 
   1516   1.1    pooka 	splx(s);
   1517   1.1    pooka }
   1518   1.1    pooka 
   1519   1.4   nonaka static void
   1520   1.1    pooka iwm_ict_reset(struct iwm_softc *sc)
   1521   1.1    pooka {
   1522   1.1    pooka 	iwm_disable_interrupts(sc);
   1523   1.1    pooka 
   1524   1.1    pooka 	memset(sc->ict_dma.vaddr, 0, IWM_ICT_SIZE);
   1525  1.45   nonaka 	bus_dmamap_sync(sc->sc_dmat, sc->ict_dma.map, 0, IWM_ICT_SIZE,
   1526  1.45   nonaka 	    BUS_DMASYNC_PREWRITE);
   1527   1.1    pooka 	sc->ict_cur = 0;
   1528   1.1    pooka 
   1529  1.45   nonaka 	/* Set physical address of ICT (4KB aligned). */
   1530   1.1    pooka 	IWM_WRITE(sc, IWM_CSR_DRAM_INT_TBL_REG,
   1531   1.1    pooka 	    IWM_CSR_DRAM_INT_TBL_ENABLE
   1532   1.1    pooka 	    | IWM_CSR_DRAM_INIT_TBL_WRAP_CHECK
   1533  1.45   nonaka 	    | IWM_CSR_DRAM_INIT_TBL_WRITE_POINTER
   1534   1.1    pooka 	    | sc->ict_dma.paddr >> IWM_ICT_PADDR_SHIFT);
   1535   1.1    pooka 
   1536   1.1    pooka 	/* Switch to ICT interrupt mode in driver. */
   1537   1.1    pooka 	sc->sc_flags |= IWM_FLAG_USE_ICT;
   1538   1.1    pooka 
   1539   1.1    pooka 	IWM_WRITE(sc, IWM_CSR_INT, ~0);
   1540   1.1    pooka 	iwm_enable_interrupts(sc);
   1541   1.1    pooka }
   1542   1.1    pooka 
   1543   1.1    pooka #define IWM_HW_READY_TIMEOUT 50
   1544   1.4   nonaka static int
   1545   1.1    pooka iwm_set_hw_ready(struct iwm_softc *sc)
   1546   1.1    pooka {
   1547  1.45   nonaka 	int ready;
   1548  1.45   nonaka 
   1549   1.1    pooka 	IWM_SETBITS(sc, IWM_CSR_HW_IF_CONFIG_REG,
   1550   1.1    pooka 	    IWM_CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
   1551   1.1    pooka 
   1552  1.45   nonaka 	ready = iwm_poll_bit(sc, IWM_CSR_HW_IF_CONFIG_REG,
   1553   1.1    pooka 	    IWM_CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
   1554   1.1    pooka 	    IWM_CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
   1555   1.1    pooka 	    IWM_HW_READY_TIMEOUT);
   1556  1.45   nonaka 	if (ready)
   1557  1.45   nonaka 		IWM_SETBITS(sc, IWM_CSR_MBOX_SET_REG,
   1558  1.45   nonaka 		    IWM_CSR_MBOX_SET_REG_OS_ALIVE);
   1559  1.45   nonaka 
   1560  1.45   nonaka 	return ready;
   1561   1.1    pooka }
   1562   1.1    pooka #undef IWM_HW_READY_TIMEOUT
   1563   1.1    pooka 
   1564   1.4   nonaka static int
   1565   1.1    pooka iwm_prepare_card_hw(struct iwm_softc *sc)
   1566   1.1    pooka {
   1567   1.1    pooka 	int t = 0;
   1568   1.1    pooka 
   1569  1.10   nonaka 	if (iwm_set_hw_ready(sc))
   1570  1.45   nonaka 		return 0;
   1571  1.45   nonaka 
   1572  1.45   nonaka 	DELAY(100);
   1573   1.1    pooka 
   1574   1.1    pooka 	/* If HW is not ready, prepare the conditions to check again */
   1575   1.1    pooka 	IWM_SETBITS(sc, IWM_CSR_HW_IF_CONFIG_REG,
   1576   1.1    pooka 	    IWM_CSR_HW_IF_CONFIG_REG_PREPARE);
   1577   1.1    pooka 
   1578   1.1    pooka 	do {
   1579   1.1    pooka 		if (iwm_set_hw_ready(sc))
   1580  1.45   nonaka 			return 0;
   1581   1.1    pooka 		DELAY(200);
   1582   1.1    pooka 		t += 200;
   1583   1.1    pooka 	} while (t < 150000);
   1584   1.1    pooka 
   1585  1.45   nonaka 	return ETIMEDOUT;
   1586   1.1    pooka }
   1587   1.1    pooka 
   1588   1.4   nonaka static void
   1589   1.1    pooka iwm_apm_config(struct iwm_softc *sc)
   1590   1.1    pooka {
   1591   1.1    pooka 	pcireg_t reg;
   1592   1.1    pooka 
   1593   1.1    pooka 	reg = pci_conf_read(sc->sc_pct, sc->sc_pcitag,
   1594   1.1    pooka 	    sc->sc_cap_off + PCIE_LCSR);
   1595   1.1    pooka 	if (reg & PCIE_LCSR_ASPM_L1) {
   1596   1.1    pooka 		/* Um the Linux driver prints "Disabling L0S for this one ... */
   1597   1.1    pooka 		IWM_SETBITS(sc, IWM_CSR_GIO_REG,
   1598   1.1    pooka 		    IWM_CSR_GIO_REG_VAL_L0S_ENABLED);
   1599   1.1    pooka 	} else {
   1600   1.1    pooka 		/* ... and "Enabling" here */
   1601   1.1    pooka 		IWM_CLRBITS(sc, IWM_CSR_GIO_REG,
   1602   1.1    pooka 		    IWM_CSR_GIO_REG_VAL_L0S_ENABLED);
   1603   1.1    pooka 	}
   1604   1.1    pooka }
   1605   1.1    pooka 
   1606   1.1    pooka /*
   1607   1.1    pooka  * Start up NIC's basic functionality after it has been reset
   1608  1.45   nonaka  * e.g. after platform boot or shutdown.
   1609   1.1    pooka  * NOTE:  This does not load uCode nor start the embedded processor
   1610   1.1    pooka  */
   1611   1.4   nonaka static int
   1612   1.1    pooka iwm_apm_init(struct iwm_softc *sc)
   1613   1.1    pooka {
   1614  1.45   nonaka 	int err = 0;
   1615   1.1    pooka 
   1616  1.45   nonaka 	/* Disable L0S exit timer (platform NMI workaround) */
   1617  1.61   nonaka 	if (sc->sc_device_family != IWM_DEVICE_FAMILY_8000) {
   1618  1.45   nonaka 		IWM_SETBITS(sc, IWM_CSR_GIO_CHICKEN_BITS,
   1619  1.45   nonaka 		    IWM_CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
   1620  1.61   nonaka 	}
   1621   1.1    pooka 
   1622   1.1    pooka 	/*
   1623   1.1    pooka 	 * Disable L0s without affecting L1;
   1624   1.1    pooka 	 *  don't wait for ICH L0s (ICH bug W/A)
   1625   1.1    pooka 	 */
   1626   1.1    pooka 	IWM_SETBITS(sc, IWM_CSR_GIO_CHICKEN_BITS,
   1627   1.1    pooka 	    IWM_CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
   1628   1.1    pooka 
   1629   1.1    pooka 	/* Set FH wait threshold to maximum (HW error during stress W/A) */
   1630   1.1    pooka 	IWM_SETBITS(sc, IWM_CSR_DBG_HPET_MEM_REG, IWM_CSR_DBG_HPET_MEM_REG_VAL);
   1631   1.1    pooka 
   1632   1.1    pooka 	/*
   1633   1.1    pooka 	 * Enable HAP INTA (interrupt from management bus) to
   1634   1.1    pooka 	 * wake device's PCI Express link L1a -> L0s
   1635   1.1    pooka 	 */
   1636   1.1    pooka 	IWM_SETBITS(sc, IWM_CSR_HW_IF_CONFIG_REG,
   1637   1.1    pooka 	    IWM_CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
   1638   1.1    pooka 
   1639   1.1    pooka 	iwm_apm_config(sc);
   1640   1.1    pooka 
   1641  1.45   nonaka #if 0 /* not for 7k/8k */
   1642   1.1    pooka 	/* Configure analog phase-lock-loop before activating to D0A */
   1643   1.1    pooka 	if (trans->cfg->base_params->pll_cfg_val)
   1644   1.1    pooka 		IWM_SETBITS(trans, IWM_CSR_ANA_PLL_CFG,
   1645   1.1    pooka 		    trans->cfg->base_params->pll_cfg_val);
   1646   1.1    pooka #endif
   1647   1.1    pooka 
   1648   1.1    pooka 	/*
   1649   1.1    pooka 	 * Set "initialization complete" bit to move adapter from
   1650   1.1    pooka 	 * D0U* --> D0A* (powered-up active) state.
   1651   1.1    pooka 	 */
   1652   1.1    pooka 	IWM_SETBITS(sc, IWM_CSR_GP_CNTRL, IWM_CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
   1653   1.1    pooka 
   1654   1.1    pooka 	/*
   1655   1.1    pooka 	 * Wait for clock stabilization; once stabilized, access to
   1656   1.1    pooka 	 * device-internal resources is supported, e.g. iwm_write_prph()
   1657   1.1    pooka 	 * and accesses to uCode SRAM.
   1658   1.1    pooka 	 */
   1659   1.1    pooka 	if (!iwm_poll_bit(sc, IWM_CSR_GP_CNTRL,
   1660   1.1    pooka 	    IWM_CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
   1661   1.1    pooka 	    IWM_CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000)) {
   1662   1.3   nonaka 		aprint_error_dev(sc->sc_dev,
   1663   1.3   nonaka 		    "timeout waiting for clock stabilization\n");
   1664  1.45   nonaka 		err = ETIMEDOUT;
   1665   1.1    pooka 		goto out;
   1666   1.1    pooka 	}
   1667   1.1    pooka 
   1668  1.17   nonaka 	if (sc->host_interrupt_operation_mode) {
   1669  1.17   nonaka 		/*
   1670  1.17   nonaka 		 * This is a bit of an abuse - This is needed for 7260 / 3160
   1671  1.17   nonaka 		 * only check host_interrupt_operation_mode even if this is
   1672  1.17   nonaka 		 * not related to host_interrupt_operation_mode.
   1673  1.17   nonaka 		 *
   1674  1.17   nonaka 		 * Enable the oscillator to count wake up time for L1 exit. This
   1675  1.17   nonaka 		 * consumes slightly more power (100uA) - but allows to be sure
   1676  1.17   nonaka 		 * that we wake up from L1 on time.
   1677  1.17   nonaka 		 *
   1678  1.17   nonaka 		 * This looks weird: read twice the same register, discard the
   1679  1.17   nonaka 		 * value, set a bit, and yet again, read that same register
   1680  1.17   nonaka 		 * just to discard the value. But that's the way the hardware
   1681  1.17   nonaka 		 * seems to like it.
   1682  1.17   nonaka 		 */
   1683  1.17   nonaka 		iwm_read_prph(sc, IWM_OSC_CLK);
   1684  1.17   nonaka 		iwm_read_prph(sc, IWM_OSC_CLK);
   1685  1.17   nonaka 		iwm_set_bits_prph(sc, IWM_OSC_CLK, IWM_OSC_CLK_FORCE_CONTROL);
   1686  1.17   nonaka 		iwm_read_prph(sc, IWM_OSC_CLK);
   1687  1.17   nonaka 		iwm_read_prph(sc, IWM_OSC_CLK);
   1688  1.17   nonaka 	}
   1689   1.1    pooka 
   1690   1.1    pooka 	/*
   1691   1.1    pooka 	 * Enable DMA clock and wait for it to stabilize.
   1692   1.1    pooka 	 *
   1693   1.1    pooka 	 * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
   1694   1.1    pooka 	 * do not disable clocks.  This preserves any hardware bits already
   1695   1.1    pooka 	 * set by default in "CLK_CTRL_REG" after reset.
   1696   1.1    pooka 	 */
   1697  1.45   nonaka 	if (sc->sc_device_family == IWM_DEVICE_FAMILY_7000) {
   1698  1.45   nonaka 		iwm_write_prph(sc, IWM_APMG_CLK_EN_REG,
   1699  1.45   nonaka 		    IWM_APMG_CLK_VAL_DMA_CLK_RQT);
   1700  1.45   nonaka 		DELAY(20);
   1701  1.45   nonaka 
   1702  1.45   nonaka 		/* Disable L1-Active */
   1703  1.45   nonaka 		iwm_set_bits_prph(sc, IWM_APMG_PCIDEV_STT_REG,
   1704  1.45   nonaka 		    IWM_APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
   1705  1.45   nonaka 
   1706  1.45   nonaka 		/* Clear the interrupt in APMG if the NIC is in RFKILL */
   1707  1.45   nonaka 		iwm_write_prph(sc, IWM_APMG_RTC_INT_STT_REG,
   1708  1.45   nonaka 		    IWM_APMG_RTC_INT_STT_RFKILL);
   1709  1.45   nonaka 	}
   1710   1.1    pooka  out:
   1711  1.45   nonaka 	if (err)
   1712  1.45   nonaka 		aprint_error_dev(sc->sc_dev, "apm init error %d\n", err);
   1713  1.45   nonaka 	return err;
   1714   1.1    pooka }
   1715   1.1    pooka 
   1716   1.4   nonaka static void
   1717   1.1    pooka iwm_apm_stop(struct iwm_softc *sc)
   1718   1.1    pooka {
   1719   1.1    pooka 	/* stop device's busmaster DMA activity */
   1720   1.1    pooka 	IWM_SETBITS(sc, IWM_CSR_RESET, IWM_CSR_RESET_REG_FLAG_STOP_MASTER);
   1721   1.1    pooka 
   1722   1.1    pooka 	if (!iwm_poll_bit(sc, IWM_CSR_RESET,
   1723   1.1    pooka 	    IWM_CSR_RESET_REG_FLAG_MASTER_DISABLED,
   1724   1.1    pooka 	    IWM_CSR_RESET_REG_FLAG_MASTER_DISABLED, 100))
   1725   1.3   nonaka 		aprint_error_dev(sc->sc_dev, "timeout waiting for master\n");
   1726   1.3   nonaka 	DPRINTF(("iwm apm stop\n"));
   1727   1.1    pooka }
   1728   1.1    pooka 
   1729   1.4   nonaka static int
   1730   1.1    pooka iwm_start_hw(struct iwm_softc *sc)
   1731   1.1    pooka {
   1732  1.45   nonaka 	int err;
   1733   1.1    pooka 
   1734  1.45   nonaka 	err = iwm_prepare_card_hw(sc);
   1735  1.45   nonaka 	if (err)
   1736  1.45   nonaka 		return err;
   1737   1.1    pooka 
   1738   1.8   nonaka 	/* Reset the entire device */
   1739  1.45   nonaka 	IWM_WRITE(sc, IWM_CSR_RESET, IWM_CSR_RESET_REG_FLAG_SW_RESET);
   1740   1.1    pooka 	DELAY(10);
   1741   1.1    pooka 
   1742  1.45   nonaka 	err = iwm_apm_init(sc);
   1743  1.45   nonaka 	if (err)
   1744  1.45   nonaka 		return err;
   1745   1.1    pooka 
   1746   1.1    pooka 	iwm_enable_rfkill_int(sc);
   1747   1.1    pooka 	iwm_check_rfkill(sc);
   1748   1.1    pooka 
   1749   1.1    pooka 	return 0;
   1750   1.1    pooka }
   1751   1.1    pooka 
   1752   1.4   nonaka static void
   1753   1.1    pooka iwm_stop_device(struct iwm_softc *sc)
   1754   1.1    pooka {
   1755   1.1    pooka 	int chnl, ntries;
   1756   1.1    pooka 	int qid;
   1757   1.1    pooka 
   1758   1.1    pooka 	iwm_disable_interrupts(sc);
   1759   1.1    pooka 	sc->sc_flags &= ~IWM_FLAG_USE_ICT;
   1760   1.1    pooka 
   1761  1.45   nonaka 	/* Deactivate TX scheduler. */
   1762   1.1    pooka 	iwm_write_prph(sc, IWM_SCD_TXFACT, 0);
   1763   1.1    pooka 
   1764   1.1    pooka 	/* Stop all DMA channels. */
   1765   1.1    pooka 	if (iwm_nic_lock(sc)) {
   1766   1.1    pooka 		for (chnl = 0; chnl < IWM_FH_TCSR_CHNL_NUM; chnl++) {
   1767   1.1    pooka 			IWM_WRITE(sc,
   1768   1.1    pooka 			    IWM_FH_TCSR_CHNL_TX_CONFIG_REG(chnl), 0);
   1769   1.1    pooka 			for (ntries = 0; ntries < 200; ntries++) {
   1770   1.1    pooka 				uint32_t r;
   1771   1.1    pooka 
   1772   1.1    pooka 				r = IWM_READ(sc, IWM_FH_TSSR_TX_STATUS_REG);
   1773   1.1    pooka 				if (r & IWM_FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(
   1774   1.1    pooka 				    chnl))
   1775   1.1    pooka 					break;
   1776   1.1    pooka 				DELAY(20);
   1777   1.1    pooka 			}
   1778   1.1    pooka 		}
   1779   1.1    pooka 		iwm_nic_unlock(sc);
   1780   1.1    pooka 	}
   1781  1.45   nonaka 	iwm_disable_rx_dma(sc);
   1782   1.1    pooka 
   1783   1.1    pooka 	iwm_reset_rx_ring(sc, &sc->rxq);
   1784   1.1    pooka 
   1785   1.1    pooka 	for (qid = 0; qid < __arraycount(sc->txq); qid++)
   1786   1.1    pooka 		iwm_reset_tx_ring(sc, &sc->txq[qid]);
   1787   1.1    pooka 
   1788  1.61   nonaka 	if (sc->sc_device_family == IWM_DEVICE_FAMILY_7000) {
   1789  1.61   nonaka 		/* Power-down device's busmaster DMA clocks */
   1790  1.61   nonaka 		if (iwm_nic_lock(sc)) {
   1791  1.61   nonaka 			iwm_write_prph(sc, IWM_APMG_CLK_DIS_REG,
   1792  1.61   nonaka 			    IWM_APMG_CLK_VAL_DMA_CLK_RQT);
   1793  1.61   nonaka 			DELAY(5);
   1794  1.61   nonaka 			iwm_nic_unlock(sc);
   1795  1.61   nonaka 		}
   1796  1.61   nonaka 	}
   1797   1.1    pooka 
   1798   1.1    pooka 	/* Make sure (redundant) we've released our request to stay awake */
   1799   1.1    pooka 	IWM_CLRBITS(sc, IWM_CSR_GP_CNTRL,
   1800   1.1    pooka 	    IWM_CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
   1801   1.1    pooka 
   1802   1.1    pooka 	/* Stop the device, and put it in low power state */
   1803   1.1    pooka 	iwm_apm_stop(sc);
   1804   1.1    pooka 
   1805  1.45   nonaka 	/*
   1806  1.45   nonaka 	 * Upon stop, the APM issues an interrupt if HW RF kill is set.
   1807   1.8   nonaka 	 * Clean again the interrupt here
   1808   1.8   nonaka 	 */
   1809   1.1    pooka 	iwm_disable_interrupts(sc);
   1810   1.1    pooka 
   1811  1.45   nonaka 	/* Reset the on-board processor. */
   1812  1.45   nonaka 	IWM_WRITE(sc, IWM_CSR_RESET, IWM_CSR_RESET_REG_FLAG_SW_RESET);
   1813  1.45   nonaka 
   1814  1.45   nonaka 	/* Even though we stop the HW we still want the RF kill interrupt. */
   1815   1.1    pooka 	iwm_enable_rfkill_int(sc);
   1816   1.1    pooka 	iwm_check_rfkill(sc);
   1817   1.1    pooka }
   1818   1.1    pooka 
   1819   1.4   nonaka static void
   1820  1.45   nonaka iwm_nic_config(struct iwm_softc *sc)
   1821   1.1    pooka {
   1822   1.1    pooka 	uint8_t radio_cfg_type, radio_cfg_step, radio_cfg_dash;
   1823   1.1    pooka 	uint32_t reg_val = 0;
   1824   1.1    pooka 
   1825   1.1    pooka 	radio_cfg_type = (sc->sc_fw_phy_config & IWM_FW_PHY_CFG_RADIO_TYPE) >>
   1826   1.1    pooka 	    IWM_FW_PHY_CFG_RADIO_TYPE_POS;
   1827   1.1    pooka 	radio_cfg_step = (sc->sc_fw_phy_config & IWM_FW_PHY_CFG_RADIO_STEP) >>
   1828   1.1    pooka 	    IWM_FW_PHY_CFG_RADIO_STEP_POS;
   1829   1.1    pooka 	radio_cfg_dash = (sc->sc_fw_phy_config & IWM_FW_PHY_CFG_RADIO_DASH) >>
   1830   1.1    pooka 	    IWM_FW_PHY_CFG_RADIO_DASH_POS;
   1831   1.1    pooka 
   1832   1.1    pooka 	reg_val |= IWM_CSR_HW_REV_STEP(sc->sc_hw_rev) <<
   1833   1.1    pooka 	    IWM_CSR_HW_IF_CONFIG_REG_POS_MAC_STEP;
   1834   1.1    pooka 	reg_val |= IWM_CSR_HW_REV_DASH(sc->sc_hw_rev) <<
   1835   1.1    pooka 	    IWM_CSR_HW_IF_CONFIG_REG_POS_MAC_DASH;
   1836   1.1    pooka 
   1837   1.1    pooka 	/* radio configuration */
   1838   1.1    pooka 	reg_val |= radio_cfg_type << IWM_CSR_HW_IF_CONFIG_REG_POS_PHY_TYPE;
   1839   1.1    pooka 	reg_val |= radio_cfg_step << IWM_CSR_HW_IF_CONFIG_REG_POS_PHY_STEP;
   1840   1.1    pooka 	reg_val |= radio_cfg_dash << IWM_CSR_HW_IF_CONFIG_REG_POS_PHY_DASH;
   1841   1.1    pooka 
   1842   1.1    pooka 	IWM_WRITE(sc, IWM_CSR_HW_IF_CONFIG_REG, reg_val);
   1843   1.1    pooka 
   1844   1.8   nonaka 	DPRINTF(("Radio type=0x%x-0x%x-0x%x\n", radio_cfg_type,
   1845   1.8   nonaka 	    radio_cfg_step, radio_cfg_dash));
   1846   1.1    pooka 
   1847   1.1    pooka 	/*
   1848   1.1    pooka 	 * W/A : NIC is stuck in a reset state after Early PCIe power off
   1849   1.1    pooka 	 * (PCIe power is lost before PERST# is asserted), causing ME FW
   1850   1.1    pooka 	 * to lose ownership and not being able to obtain it back.
   1851   1.1    pooka 	 */
   1852  1.61   nonaka 	if (sc->sc_device_family == IWM_DEVICE_FAMILY_7000) {
   1853  1.45   nonaka 		iwm_set_bits_mask_prph(sc, IWM_APMG_PS_CTRL_REG,
   1854  1.45   nonaka 		    IWM_APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS,
   1855  1.45   nonaka 		    ~IWM_APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS);
   1856  1.61   nonaka 	}
   1857   1.1    pooka }
   1858   1.1    pooka 
   1859   1.4   nonaka static int
   1860   1.1    pooka iwm_nic_rx_init(struct iwm_softc *sc)
   1861   1.1    pooka {
   1862   1.1    pooka 	if (!iwm_nic_lock(sc))
   1863   1.1    pooka 		return EBUSY;
   1864   1.1    pooka 
   1865   1.1    pooka 	memset(sc->rxq.stat, 0, sizeof(*sc->rxq.stat));
   1866  1.45   nonaka 	bus_dmamap_sync(sc->sc_dmat, sc->rxq.stat_dma.map,
   1867  1.45   nonaka 	    0, sc->rxq.stat_dma.size,
   1868  1.45   nonaka 	    BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
   1869   1.1    pooka 
   1870  1.45   nonaka 	iwm_disable_rx_dma(sc);
   1871   1.1    pooka 	IWM_WRITE(sc, IWM_FH_MEM_RCSR_CHNL0_RBDCB_WPTR, 0);
   1872   1.1    pooka 	IWM_WRITE(sc, IWM_FH_MEM_RCSR_CHNL0_FLUSH_RB_REQ, 0);
   1873   1.1    pooka 	IWM_WRITE(sc, IWM_FH_RSCSR_CHNL0_RDPTR, 0);
   1874   1.1    pooka 	IWM_WRITE(sc, IWM_FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0);
   1875   1.1    pooka 
   1876   1.1    pooka 	/* Set physical address of RX ring (256-byte aligned). */
   1877   1.1    pooka 	IWM_WRITE(sc,
   1878   1.1    pooka 	    IWM_FH_RSCSR_CHNL0_RBDCB_BASE_REG, sc->rxq.desc_dma.paddr >> 8);
   1879   1.1    pooka 
   1880   1.1    pooka 	/* Set physical address of RX status (16-byte aligned). */
   1881   1.1    pooka 	IWM_WRITE(sc,
   1882   1.1    pooka 	    IWM_FH_RSCSR_CHNL0_STTS_WPTR_REG, sc->rxq.stat_dma.paddr >> 4);
   1883   1.1    pooka 
   1884   1.1    pooka 	/* Enable RX. */
   1885   1.1    pooka 	IWM_WRITE(sc, IWM_FH_MEM_RCSR_CHNL0_CONFIG_REG,
   1886   1.1    pooka 	    IWM_FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL		|
   1887   1.1    pooka 	    IWM_FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY		|  /* HW bug */
   1888   1.1    pooka 	    IWM_FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL	|
   1889  1.45   nonaka 	    IWM_FH_RCSR_CHNL0_RX_CONFIG_SINGLE_FRAME_MSK	|
   1890  1.61   nonaka 	    IWM_FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K		|
   1891  1.45   nonaka 	    (IWM_RX_RB_TIMEOUT << IWM_FH_RCSR_RX_CONFIG_REG_IRQ_RBTH_POS) |
   1892   1.1    pooka 	    IWM_RX_QUEUE_SIZE_LOG << IWM_FH_RCSR_RX_CONFIG_RBDCB_SIZE_POS);
   1893   1.1    pooka 
   1894   1.1    pooka 	IWM_WRITE_1(sc, IWM_CSR_INT_COALESCING, IWM_HOST_INT_TIMEOUT_DEF);
   1895  1.17   nonaka 
   1896  1.17   nonaka 	/* W/A for interrupt coalescing bug in 7260 and 3160 */
   1897  1.17   nonaka 	if (sc->host_interrupt_operation_mode)
   1898  1.17   nonaka 		IWM_SETBITS(sc, IWM_CSR_INT_COALESCING, IWM_HOST_INT_OPER_MODE);
   1899   1.1    pooka 
   1900   1.1    pooka 	/*
   1901  1.45   nonaka 	 * This value should initially be 0 (before preparing any RBs),
   1902  1.45   nonaka 	 * and should be 8 after preparing the first 8 RBs (for example).
   1903   1.1    pooka 	 */
   1904   1.1    pooka 	IWM_WRITE(sc, IWM_FH_RSCSR_CHNL0_WPTR, 8);
   1905   1.1    pooka 
   1906   1.1    pooka 	iwm_nic_unlock(sc);
   1907   1.1    pooka 
   1908   1.1    pooka 	return 0;
   1909   1.1    pooka }
   1910   1.1    pooka 
   1911   1.4   nonaka static int
   1912   1.1    pooka iwm_nic_tx_init(struct iwm_softc *sc)
   1913   1.1    pooka {
   1914   1.1    pooka 	int qid;
   1915   1.1    pooka 
   1916   1.1    pooka 	if (!iwm_nic_lock(sc))
   1917   1.1    pooka 		return EBUSY;
   1918   1.1    pooka 
   1919   1.1    pooka 	/* Deactivate TX scheduler. */
   1920   1.1    pooka 	iwm_write_prph(sc, IWM_SCD_TXFACT, 0);
   1921   1.1    pooka 
   1922   1.1    pooka 	/* Set physical address of "keep warm" page (16-byte aligned). */
   1923   1.1    pooka 	IWM_WRITE(sc, IWM_FH_KW_MEM_ADDR_REG, sc->kw_dma.paddr >> 4);
   1924   1.1    pooka 
   1925   1.1    pooka 	for (qid = 0; qid < __arraycount(sc->txq); qid++) {
   1926   1.1    pooka 		struct iwm_tx_ring *txq = &sc->txq[qid];
   1927   1.1    pooka 
   1928   1.1    pooka 		/* Set physical address of TX ring (256-byte aligned). */
   1929   1.1    pooka 		IWM_WRITE(sc, IWM_FH_MEM_CBBC_QUEUE(qid),
   1930   1.1    pooka 		    txq->desc_dma.paddr >> 8);
   1931   1.9   nonaka 		DPRINTF(("loading ring %d descriptors (%p) at %"PRIxMAX"\n",
   1932   1.9   nonaka 		    qid, txq->desc, (uintmax_t)(txq->desc_dma.paddr >> 8)));
   1933   1.1    pooka 	}
   1934  1.45   nonaka 
   1935  1.45   nonaka 	iwm_write_prph(sc, IWM_SCD_GP_CTRL, IWM_SCD_GP_CTRL_AUTO_ACTIVE_MODE);
   1936  1.45   nonaka 
   1937   1.1    pooka 	iwm_nic_unlock(sc);
   1938   1.1    pooka 
   1939   1.1    pooka 	return 0;
   1940   1.1    pooka }
   1941   1.1    pooka 
   1942   1.4   nonaka static int
   1943   1.1    pooka iwm_nic_init(struct iwm_softc *sc)
   1944   1.1    pooka {
   1945  1.45   nonaka 	int err;
   1946   1.1    pooka 
   1947   1.1    pooka 	iwm_apm_init(sc);
   1948  1.61   nonaka 	if (sc->sc_device_family == IWM_DEVICE_FAMILY_7000) {
   1949  1.45   nonaka 		iwm_set_bits_mask_prph(sc, IWM_APMG_PS_CTRL_REG,
   1950  1.45   nonaka 		    IWM_APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
   1951  1.45   nonaka 		    ~IWM_APMG_PS_CTRL_MSK_PWR_SRC);
   1952  1.61   nonaka 	}
   1953   1.1    pooka 
   1954  1.45   nonaka 	iwm_nic_config(sc);
   1955   1.1    pooka 
   1956  1.45   nonaka 	err = iwm_nic_rx_init(sc);
   1957  1.45   nonaka 	if (err)
   1958  1.45   nonaka 		return err;
   1959   1.1    pooka 
   1960  1.45   nonaka 	err = iwm_nic_tx_init(sc);
   1961  1.45   nonaka 	if (err)
   1962  1.45   nonaka 		return err;
   1963   1.1    pooka 
   1964   1.1    pooka 	DPRINTF(("shadow registers enabled\n"));
   1965   1.1    pooka 	IWM_SETBITS(sc, IWM_CSR_MAC_SHADOW_REG_CTRL, 0x800fffff);
   1966   1.1    pooka 
   1967   1.8   nonaka 	return 0;
   1968   1.1    pooka }
   1969   1.1    pooka 
   1970  1.45   nonaka static const uint8_t iwm_ac_to_tx_fifo[] = {
   1971  1.45   nonaka 	IWM_TX_FIFO_VO,
   1972  1.45   nonaka 	IWM_TX_FIFO_VI,
   1973  1.45   nonaka 	IWM_TX_FIFO_BE,
   1974  1.45   nonaka 	IWM_TX_FIFO_BK,
   1975   1.1    pooka };
   1976   1.1    pooka 
   1977  1.45   nonaka static int
   1978  1.45   nonaka iwm_enable_txq(struct iwm_softc *sc, int sta_id, int qid, int fifo)
   1979   1.1    pooka {
   1980   1.1    pooka 	if (!iwm_nic_lock(sc)) {
   1981   1.2   nonaka 		DPRINTF(("%s: cannot enable txq %d\n", DEVNAME(sc), qid));
   1982  1.45   nonaka 		return EBUSY;
   1983   1.1    pooka 	}
   1984   1.1    pooka 
   1985  1.45   nonaka 	IWM_WRITE(sc, IWM_HBUS_TARG_WRPTR, qid << 8 | 0);
   1986  1.45   nonaka 
   1987  1.45   nonaka 	if (qid == IWM_CMD_QUEUE) {
   1988  1.45   nonaka 		iwm_write_prph(sc, IWM_SCD_QUEUE_STATUS_BITS(qid),
   1989  1.45   nonaka 		    (0 << IWM_SCD_QUEUE_STTS_REG_POS_ACTIVE)
   1990  1.45   nonaka 		    | (1 << IWM_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
   1991  1.45   nonaka 
   1992  1.61   nonaka 		iwm_nic_unlock(sc);
   1993  1.61   nonaka 
   1994  1.45   nonaka 		iwm_clear_bits_prph(sc, IWM_SCD_AGGR_SEL, (1 << qid));
   1995  1.45   nonaka 
   1996  1.61   nonaka 		if (!iwm_nic_lock(sc))
   1997  1.61   nonaka 			return EBUSY;
   1998  1.45   nonaka 		iwm_write_prph(sc, IWM_SCD_QUEUE_RDPTR(qid), 0);
   1999  1.61   nonaka 		iwm_nic_unlock(sc);
   2000  1.45   nonaka 
   2001  1.45   nonaka 		iwm_write_mem32(sc,
   2002  1.45   nonaka 		    sc->sched_base + IWM_SCD_CONTEXT_QUEUE_OFFSET(qid), 0);
   2003  1.45   nonaka 
   2004  1.45   nonaka 		/* Set scheduler window size and frame limit. */
   2005  1.45   nonaka 		iwm_write_mem32(sc,
   2006  1.45   nonaka 		    sc->sched_base + IWM_SCD_CONTEXT_QUEUE_OFFSET(qid) +
   2007  1.45   nonaka 		    sizeof(uint32_t),
   2008  1.45   nonaka 		    ((IWM_FRAME_LIMIT << IWM_SCD_QUEUE_CTX_REG2_WIN_SIZE_POS) &
   2009  1.45   nonaka 		    IWM_SCD_QUEUE_CTX_REG2_WIN_SIZE_MSK) |
   2010  1.45   nonaka 		    ((IWM_FRAME_LIMIT
   2011  1.45   nonaka 		        << IWM_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
   2012  1.45   nonaka 		    IWM_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK));
   2013  1.45   nonaka 
   2014  1.61   nonaka 		if (!iwm_nic_lock(sc))
   2015  1.61   nonaka 			return EBUSY;
   2016  1.45   nonaka 		iwm_write_prph(sc, IWM_SCD_QUEUE_STATUS_BITS(qid),
   2017  1.45   nonaka 		    (1 << IWM_SCD_QUEUE_STTS_REG_POS_ACTIVE) |
   2018  1.45   nonaka 		    (fifo << IWM_SCD_QUEUE_STTS_REG_POS_TXF) |
   2019  1.45   nonaka 		    (1 << IWM_SCD_QUEUE_STTS_REG_POS_WSL) |
   2020  1.45   nonaka 		    IWM_SCD_QUEUE_STTS_REG_MSK);
   2021  1.45   nonaka 	} else {
   2022  1.45   nonaka 		struct iwm_scd_txq_cfg_cmd cmd;
   2023  1.45   nonaka 		int err;
   2024   1.1    pooka 
   2025  1.45   nonaka 		iwm_nic_unlock(sc);
   2026   1.1    pooka 
   2027  1.45   nonaka 		memset(&cmd, 0, sizeof(cmd));
   2028  1.45   nonaka 		cmd.scd_queue = qid;
   2029  1.45   nonaka 		cmd.enable = 1;
   2030  1.45   nonaka 		cmd.sta_id = sta_id;
   2031  1.45   nonaka 		cmd.tx_fifo = fifo;
   2032  1.45   nonaka 		cmd.aggregate = 0;
   2033  1.45   nonaka 		cmd.window = IWM_FRAME_LIMIT;
   2034  1.45   nonaka 
   2035  1.45   nonaka 		err = iwm_send_cmd_pdu(sc, IWM_SCD_QUEUE_CFG, 0, sizeof(cmd),
   2036  1.45   nonaka 		    &cmd);
   2037  1.45   nonaka 		if (err)
   2038  1.45   nonaka 			return err;
   2039   1.1    pooka 
   2040  1.45   nonaka 		if (!iwm_nic_lock(sc))
   2041  1.45   nonaka 			return EBUSY;
   2042  1.45   nonaka 	}
   2043   1.1    pooka 
   2044  1.45   nonaka 	iwm_write_prph(sc, IWM_SCD_EN_CTRL,
   2045  1.45   nonaka 	    iwm_read_prph(sc, IWM_SCD_EN_CTRL) | qid);
   2046   1.1    pooka 
   2047   1.1    pooka 	iwm_nic_unlock(sc);
   2048   1.1    pooka 
   2049   1.1    pooka 	DPRINTF(("enabled txq %d FIFO %d\n", qid, fifo));
   2050  1.45   nonaka 
   2051  1.45   nonaka 	return 0;
   2052   1.1    pooka }
   2053   1.1    pooka 
   2054   1.4   nonaka static int
   2055   1.1    pooka iwm_post_alive(struct iwm_softc *sc)
   2056   1.1    pooka {
   2057  1.61   nonaka 	int nwords = (IWM_SCD_TRANS_TBL_MEM_UPPER_BOUND -
   2058  1.61   nonaka 	    IWM_SCD_CONTEXT_MEM_LOWER_BOUND) / sizeof(uint32_t);
   2059  1.45   nonaka 	int err, chnl;
   2060  1.45   nonaka 	uint32_t base;
   2061   1.1    pooka 
   2062   1.1    pooka 	if (!iwm_nic_lock(sc))
   2063   1.1    pooka 		return EBUSY;
   2064   1.1    pooka 
   2065  1.45   nonaka 	base = iwm_read_prph(sc, IWM_SCD_SRAM_BASE_ADDR);
   2066  1.45   nonaka 	if (sc->sched_base != base) {
   2067  1.45   nonaka 		DPRINTF(("%s: sched addr mismatch: 0x%08x != 0x%08x\n",
   2068  1.45   nonaka 		    DEVNAME(sc), sc->sched_base, base));
   2069  1.61   nonaka 		sc->sched_base = base;
   2070   1.1    pooka 	}
   2071   1.1    pooka 
   2072  1.61   nonaka 	iwm_nic_unlock(sc);
   2073  1.61   nonaka 
   2074   1.1    pooka 	iwm_ict_reset(sc);
   2075   1.1    pooka 
   2076   1.1    pooka 	/* Clear TX scheduler state in SRAM. */
   2077  1.45   nonaka 	err = iwm_write_mem(sc,
   2078  1.61   nonaka 	    sc->sched_base + IWM_SCD_CONTEXT_MEM_LOWER_BOUND, NULL, nwords);
   2079  1.45   nonaka 	if (err)
   2080  1.61   nonaka 		return err;
   2081  1.61   nonaka 
   2082  1.61   nonaka 	if (!iwm_nic_lock(sc))
   2083  1.61   nonaka 		return EBUSY;
   2084   1.1    pooka 
   2085   1.1    pooka 	/* Set physical address of TX scheduler rings (1KB aligned). */
   2086   1.1    pooka 	iwm_write_prph(sc, IWM_SCD_DRAM_BASE_ADDR, sc->sched_dma.paddr >> 10);
   2087   1.1    pooka 
   2088   1.1    pooka 	iwm_write_prph(sc, IWM_SCD_CHAINEXT_EN, 0);
   2089   1.1    pooka 
   2090  1.45   nonaka 	iwm_nic_unlock(sc);
   2091  1.45   nonaka 
   2092   1.1    pooka 	/* enable command channel */
   2093  1.45   nonaka 	err = iwm_enable_txq(sc, 0 /* unused */, IWM_CMD_QUEUE, 7);
   2094  1.45   nonaka 	if (err)
   2095  1.45   nonaka 		return err;
   2096  1.45   nonaka 
   2097  1.45   nonaka 	if (!iwm_nic_lock(sc))
   2098  1.45   nonaka 		return EBUSY;
   2099   1.1    pooka 
   2100  1.45   nonaka 	/* Activate TX scheduler. */
   2101   1.1    pooka 	iwm_write_prph(sc, IWM_SCD_TXFACT, 0xff);
   2102   1.1    pooka 
   2103   1.1    pooka 	/* Enable DMA channels. */
   2104   1.1    pooka 	for (chnl = 0; chnl < IWM_FH_TCSR_CHNL_NUM; chnl++) {
   2105   1.1    pooka 		IWM_WRITE(sc, IWM_FH_TCSR_CHNL_TX_CONFIG_REG(chnl),
   2106   1.1    pooka 		    IWM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
   2107   1.1    pooka 		    IWM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE);
   2108   1.1    pooka 	}
   2109   1.1    pooka 
   2110   1.1    pooka 	IWM_SETBITS(sc, IWM_FH_TX_CHICKEN_BITS_REG,
   2111   1.1    pooka 	    IWM_FH_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN);
   2112   1.1    pooka 
   2113   1.8   nonaka 	/* Enable L1-Active */
   2114  1.61   nonaka 	if (sc->sc_device_family != IWM_DEVICE_FAMILY_8000) {
   2115  1.45   nonaka 		iwm_clear_bits_prph(sc, IWM_APMG_PCIDEV_STT_REG,
   2116  1.45   nonaka 		    IWM_APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
   2117  1.61   nonaka 	}
   2118   1.1    pooka 
   2119  1.38    ozaki 	iwm_nic_unlock(sc);
   2120  1.61   nonaka 
   2121  1.61   nonaka 	return 0;
   2122   1.1    pooka }
   2123   1.1    pooka 
   2124   1.1    pooka static struct iwm_phy_db_entry *
   2125  1.45   nonaka iwm_phy_db_get_section(struct iwm_softc *sc, enum iwm_phy_db_section_type type,
   2126  1.45   nonaka     uint16_t chg_id)
   2127   1.1    pooka {
   2128   1.1    pooka 	struct iwm_phy_db *phy_db = &sc->sc_phy_db;
   2129   1.1    pooka 
   2130   1.1    pooka 	if (type >= IWM_PHY_DB_MAX)
   2131   1.1    pooka 		return NULL;
   2132   1.1    pooka 
   2133   1.1    pooka 	switch (type) {
   2134   1.1    pooka 	case IWM_PHY_DB_CFG:
   2135   1.1    pooka 		return &phy_db->cfg;
   2136   1.1    pooka 	case IWM_PHY_DB_CALIB_NCH:
   2137   1.1    pooka 		return &phy_db->calib_nch;
   2138   1.1    pooka 	case IWM_PHY_DB_CALIB_CHG_PAPD:
   2139   1.1    pooka 		if (chg_id >= IWM_NUM_PAPD_CH_GROUPS)
   2140   1.1    pooka 			return NULL;
   2141   1.1    pooka 		return &phy_db->calib_ch_group_papd[chg_id];
   2142   1.1    pooka 	case IWM_PHY_DB_CALIB_CHG_TXP:
   2143   1.1    pooka 		if (chg_id >= IWM_NUM_TXP_CH_GROUPS)
   2144   1.1    pooka 			return NULL;
   2145   1.1    pooka 		return &phy_db->calib_ch_group_txp[chg_id];
   2146   1.1    pooka 	default:
   2147   1.1    pooka 		return NULL;
   2148   1.1    pooka 	}
   2149   1.1    pooka 	return NULL;
   2150   1.1    pooka }
   2151   1.1    pooka 
   2152   1.1    pooka static int
   2153   1.1    pooka iwm_phy_db_set_section(struct iwm_softc *sc,
   2154   1.5   nonaka     struct iwm_calib_res_notif_phy_db *phy_db_notif, uint16_t size)
   2155   1.1    pooka {
   2156  1.45   nonaka 	struct iwm_phy_db_entry *entry;
   2157   1.1    pooka 	enum iwm_phy_db_section_type type = le16toh(phy_db_notif->type);
   2158   1.1    pooka 	uint16_t chg_id = 0;
   2159   1.1    pooka 
   2160   1.1    pooka 	if (type == IWM_PHY_DB_CALIB_CHG_PAPD ||
   2161   1.1    pooka 	    type == IWM_PHY_DB_CALIB_CHG_TXP)
   2162   1.1    pooka 		chg_id = le16toh(*(uint16_t *)phy_db_notif->data);
   2163   1.1    pooka 
   2164   1.1    pooka 	entry = iwm_phy_db_get_section(sc, type, chg_id);
   2165   1.1    pooka 	if (!entry)
   2166   1.1    pooka 		return EINVAL;
   2167   1.1    pooka 
   2168   1.1    pooka 	if (entry->data)
   2169   1.5   nonaka 		kmem_intr_free(entry->data, entry->size);
   2170   1.5   nonaka 	entry->data = kmem_intr_alloc(size, KM_NOSLEEP);
   2171   1.1    pooka 	if (!entry->data) {
   2172   1.1    pooka 		entry->size = 0;
   2173   1.1    pooka 		return ENOMEM;
   2174   1.1    pooka 	}
   2175   1.1    pooka 	memcpy(entry->data, phy_db_notif->data, size);
   2176   1.1    pooka 	entry->size = size;
   2177   1.1    pooka 
   2178   1.5   nonaka 	DPRINTFN(10, ("%s(%d): [PHYDB]SET: Type %d, Size: %d, data: %p\n",
   2179   1.1    pooka 	    __func__, __LINE__, type, size, entry->data));
   2180   1.1    pooka 
   2181   1.1    pooka 	return 0;
   2182   1.1    pooka }
   2183   1.1    pooka 
   2184   1.4   nonaka static int
   2185   1.1    pooka iwm_is_valid_channel(uint16_t ch_id)
   2186   1.1    pooka {
   2187   1.1    pooka 	if (ch_id <= 14 ||
   2188   1.1    pooka 	    (36 <= ch_id && ch_id <= 64 && ch_id % 4 == 0) ||
   2189   1.1    pooka 	    (100 <= ch_id && ch_id <= 140 && ch_id % 4 == 0) ||
   2190   1.1    pooka 	    (145 <= ch_id && ch_id <= 165 && ch_id % 4 == 1))
   2191   1.1    pooka 		return 1;
   2192   1.1    pooka 	return 0;
   2193   1.1    pooka }
   2194   1.1    pooka 
   2195   1.4   nonaka static uint8_t
   2196   1.1    pooka iwm_ch_id_to_ch_index(uint16_t ch_id)
   2197   1.1    pooka {
   2198   1.1    pooka 	if (!iwm_is_valid_channel(ch_id))
   2199   1.1    pooka 		return 0xff;
   2200   1.1    pooka 
   2201   1.1    pooka 	if (ch_id <= 14)
   2202   1.1    pooka 		return ch_id - 1;
   2203   1.1    pooka 	if (ch_id <= 64)
   2204   1.1    pooka 		return (ch_id + 20) / 4;
   2205   1.1    pooka 	if (ch_id <= 140)
   2206   1.1    pooka 		return (ch_id - 12) / 4;
   2207   1.1    pooka 	return (ch_id - 13) / 4;
   2208   1.1    pooka }
   2209   1.1    pooka 
   2210   1.1    pooka 
   2211   1.4   nonaka static uint16_t
   2212   1.1    pooka iwm_channel_id_to_papd(uint16_t ch_id)
   2213   1.1    pooka {
   2214   1.1    pooka 	if (!iwm_is_valid_channel(ch_id))
   2215   1.1    pooka 		return 0xff;
   2216   1.1    pooka 
   2217   1.1    pooka 	if (1 <= ch_id && ch_id <= 14)
   2218   1.1    pooka 		return 0;
   2219   1.1    pooka 	if (36 <= ch_id && ch_id <= 64)
   2220   1.1    pooka 		return 1;
   2221   1.1    pooka 	if (100 <= ch_id && ch_id <= 140)
   2222   1.1    pooka 		return 2;
   2223   1.1    pooka 	return 3;
   2224   1.1    pooka }
   2225   1.1    pooka 
   2226   1.4   nonaka static uint16_t
   2227   1.1    pooka iwm_channel_id_to_txp(struct iwm_softc *sc, uint16_t ch_id)
   2228   1.1    pooka {
   2229   1.1    pooka 	struct iwm_phy_db *phy_db = &sc->sc_phy_db;
   2230   1.1    pooka 	struct iwm_phy_db_chg_txp *txp_chg;
   2231   1.1    pooka 	int i;
   2232   1.1    pooka 	uint8_t ch_index = iwm_ch_id_to_ch_index(ch_id);
   2233   1.1    pooka 
   2234   1.1    pooka 	if (ch_index == 0xff)
   2235   1.1    pooka 		return 0xff;
   2236   1.1    pooka 
   2237   1.1    pooka 	for (i = 0; i < IWM_NUM_TXP_CH_GROUPS; i++) {
   2238   1.1    pooka 		txp_chg = (void *)phy_db->calib_ch_group_txp[i].data;
   2239   1.1    pooka 		if (!txp_chg)
   2240   1.1    pooka 			return 0xff;
   2241   1.1    pooka 		/*
   2242  1.45   nonaka 		 * Looking for the first channel group the max channel
   2243  1.45   nonaka 		 * of which is higher than the requested channel.
   2244   1.1    pooka 		 */
   2245   1.1    pooka 		if (le16toh(txp_chg->max_channel_idx) >= ch_index)
   2246   1.1    pooka 			return i;
   2247   1.1    pooka 	}
   2248   1.1    pooka 	return 0xff;
   2249   1.1    pooka }
   2250   1.1    pooka 
   2251   1.4   nonaka static int
   2252  1.45   nonaka iwm_phy_db_get_section_data(struct iwm_softc *sc, uint32_t type, uint8_t **data,
   2253  1.45   nonaka     uint16_t *size, uint16_t ch_id)
   2254   1.1    pooka {
   2255   1.1    pooka 	struct iwm_phy_db_entry *entry;
   2256   1.1    pooka 	uint16_t ch_group_id = 0;
   2257   1.1    pooka 
   2258   1.1    pooka 	if (type == IWM_PHY_DB_CALIB_CHG_PAPD)
   2259   1.1    pooka 		ch_group_id = iwm_channel_id_to_papd(ch_id);
   2260   1.1    pooka 	else if (type == IWM_PHY_DB_CALIB_CHG_TXP)
   2261   1.1    pooka 		ch_group_id = iwm_channel_id_to_txp(sc, ch_id);
   2262   1.1    pooka 
   2263   1.1    pooka 	entry = iwm_phy_db_get_section(sc, type, ch_group_id);
   2264   1.1    pooka 	if (!entry)
   2265   1.1    pooka 		return EINVAL;
   2266   1.1    pooka 
   2267   1.1    pooka 	*data = entry->data;
   2268   1.1    pooka 	*size = entry->size;
   2269   1.1    pooka 
   2270   1.1    pooka 	DPRINTFN(10, ("%s(%d): [PHYDB] GET: Type %d , Size: %d\n",
   2271   1.1    pooka 		       __func__, __LINE__, type, *size));
   2272   1.1    pooka 
   2273   1.1    pooka 	return 0;
   2274   1.1    pooka }
   2275   1.1    pooka 
   2276   1.4   nonaka static int
   2277  1.45   nonaka iwm_send_phy_db_cmd(struct iwm_softc *sc, uint16_t type, uint16_t length,
   2278  1.45   nonaka     void *data)
   2279   1.1    pooka {
   2280   1.1    pooka 	struct iwm_phy_db_cmd phy_db_cmd;
   2281   1.1    pooka 	struct iwm_host_cmd cmd = {
   2282   1.1    pooka 		.id = IWM_PHY_DB_CMD,
   2283  1.45   nonaka 		.flags = IWM_CMD_ASYNC,
   2284   1.1    pooka 	};
   2285   1.1    pooka 
   2286   1.5   nonaka 	DPRINTFN(10, ("Sending PHY-DB hcmd of type %d, of length %d\n",
   2287   1.5   nonaka 	    type, length));
   2288   1.1    pooka 
   2289   1.1    pooka 	phy_db_cmd.type = le16toh(type);
   2290   1.1    pooka 	phy_db_cmd.length = le16toh(length);
   2291   1.1    pooka 
   2292   1.1    pooka 	cmd.data[0] = &phy_db_cmd;
   2293   1.1    pooka 	cmd.len[0] = sizeof(struct iwm_phy_db_cmd);
   2294   1.1    pooka 	cmd.data[1] = data;
   2295   1.1    pooka 	cmd.len[1] = length;
   2296   1.1    pooka 
   2297   1.1    pooka 	return iwm_send_cmd(sc, &cmd);
   2298   1.1    pooka }
   2299   1.1    pooka 
   2300   1.1    pooka static int
   2301   1.1    pooka iwm_phy_db_send_all_channel_groups(struct iwm_softc *sc,
   2302  1.45   nonaka     enum iwm_phy_db_section_type type, uint8_t max_ch_groups)
   2303   1.1    pooka {
   2304   1.1    pooka 	uint16_t i;
   2305   1.1    pooka 	int err;
   2306   1.1    pooka 	struct iwm_phy_db_entry *entry;
   2307   1.1    pooka 
   2308   1.1    pooka 	/* Send all the channel-specific groups to operational fw */
   2309   1.1    pooka 	for (i = 0; i < max_ch_groups; i++) {
   2310   1.1    pooka 		entry = iwm_phy_db_get_section(sc, type, i);
   2311   1.1    pooka 		if (!entry)
   2312   1.1    pooka 			return EINVAL;
   2313   1.1    pooka 
   2314   1.1    pooka 		if (!entry->size)
   2315   1.1    pooka 			continue;
   2316   1.1    pooka 
   2317   1.1    pooka 		err = iwm_send_phy_db_cmd(sc, type, entry->size, entry->data);
   2318   1.1    pooka 		if (err) {
   2319   1.2   nonaka 			DPRINTF(("%s: Can't SEND phy_db section %d (%d), "
   2320   1.2   nonaka 			    "err %d\n", DEVNAME(sc), type, i, err));
   2321   1.1    pooka 			return err;
   2322   1.1    pooka 		}
   2323   1.1    pooka 
   2324  1.45   nonaka 		DPRINTFN(10, ("%s: Sent PHY_DB HCMD, type = %d num = %d\n",
   2325  1.45   nonaka 		    DEVNAME(sc), type, i));
   2326  1.45   nonaka 
   2327  1.45   nonaka 		DELAY(1000);
   2328   1.1    pooka 	}
   2329   1.1    pooka 
   2330   1.1    pooka 	return 0;
   2331   1.1    pooka }
   2332   1.1    pooka 
   2333   1.4   nonaka static int
   2334   1.1    pooka iwm_send_phy_db_data(struct iwm_softc *sc)
   2335   1.1    pooka {
   2336   1.1    pooka 	uint8_t *data = NULL;
   2337   1.1    pooka 	uint16_t size = 0;
   2338   1.1    pooka 	int err;
   2339   1.1    pooka 
   2340   1.1    pooka 	err = iwm_phy_db_get_section_data(sc, IWM_PHY_DB_CFG, &data, &size, 0);
   2341  1.45   nonaka 	if (err)
   2342   1.1    pooka 		return err;
   2343   1.1    pooka 
   2344   1.1    pooka 	err = iwm_send_phy_db_cmd(sc, IWM_PHY_DB_CFG, size, data);
   2345  1.45   nonaka 	if (err)
   2346   1.1    pooka 		return err;
   2347   1.1    pooka 
   2348   1.1    pooka 	err = iwm_phy_db_get_section_data(sc, IWM_PHY_DB_CALIB_NCH,
   2349   1.1    pooka 	    &data, &size, 0);
   2350  1.45   nonaka 	if (err)
   2351   1.1    pooka 		return err;
   2352   1.1    pooka 
   2353   1.1    pooka 	err = iwm_send_phy_db_cmd(sc, IWM_PHY_DB_CALIB_NCH, size, data);
   2354  1.45   nonaka 	if (err)
   2355   1.1    pooka 		return err;
   2356   1.1    pooka 
   2357   1.1    pooka 	err = iwm_phy_db_send_all_channel_groups(sc,
   2358   1.1    pooka 	    IWM_PHY_DB_CALIB_CHG_PAPD, IWM_NUM_PAPD_CH_GROUPS);
   2359  1.45   nonaka 	if (err)
   2360   1.1    pooka 		return err;
   2361   1.1    pooka 
   2362   1.1    pooka 	err = iwm_phy_db_send_all_channel_groups(sc,
   2363   1.1    pooka 	    IWM_PHY_DB_CALIB_CHG_TXP, IWM_NUM_TXP_CH_GROUPS);
   2364  1.45   nonaka 	if (err)
   2365   1.1    pooka 		return err;
   2366   1.1    pooka 
   2367   1.1    pooka 	return 0;
   2368   1.1    pooka }
   2369   1.1    pooka 
   2370   1.1    pooka /*
   2371   1.1    pooka  * For the high priority TE use a time event type that has similar priority to
   2372   1.1    pooka  * the FW's action scan priority.
   2373   1.1    pooka  */
   2374  1.45   nonaka #define IWM_ROC_TE_TYPE_NORMAL IWM_TE_P2P_DEVICE_DISCOVERABLE
   2375  1.45   nonaka #define IWM_ROC_TE_TYPE_MGMT_TX IWM_TE_P2P_CLIENT_ASSOC
   2376   1.1    pooka 
   2377   1.1    pooka /* used to convert from time event API v2 to v1 */
   2378   1.1    pooka #define IWM_TE_V2_DEP_POLICY_MSK (IWM_TE_V2_DEP_OTHER | IWM_TE_V2_DEP_TSF |\
   2379   1.1    pooka 			     IWM_TE_V2_EVENT_SOCIOPATHIC)
   2380   1.1    pooka static inline uint16_t
   2381   1.1    pooka iwm_te_v2_get_notify(uint16_t policy)
   2382   1.1    pooka {
   2383   1.1    pooka 	return le16toh(policy) & IWM_TE_V2_NOTIF_MSK;
   2384   1.1    pooka }
   2385   1.1    pooka 
   2386   1.1    pooka static inline uint16_t
   2387   1.1    pooka iwm_te_v2_get_dep_policy(uint16_t policy)
   2388   1.1    pooka {
   2389   1.1    pooka 	return (le16toh(policy) & IWM_TE_V2_DEP_POLICY_MSK) >>
   2390   1.1    pooka 		IWM_TE_V2_PLACEMENT_POS;
   2391   1.1    pooka }
   2392   1.1    pooka 
   2393   1.1    pooka static inline uint16_t
   2394   1.1    pooka iwm_te_v2_get_absence(uint16_t policy)
   2395   1.1    pooka {
   2396   1.1    pooka 	return (le16toh(policy) & IWM_TE_V2_ABSENCE) >> IWM_TE_V2_ABSENCE_POS;
   2397   1.1    pooka }
   2398   1.1    pooka 
   2399   1.4   nonaka static void
   2400  1.45   nonaka iwm_te_v2_to_v1(const struct iwm_time_event_cmd_v2 *cmd_v2,
   2401  1.45   nonaka     struct iwm_time_event_cmd_v1 *cmd_v1)
   2402   1.1    pooka {
   2403   1.1    pooka 	cmd_v1->id_and_color = cmd_v2->id_and_color;
   2404   1.1    pooka 	cmd_v1->action = cmd_v2->action;
   2405   1.1    pooka 	cmd_v1->id = cmd_v2->id;
   2406   1.1    pooka 	cmd_v1->apply_time = cmd_v2->apply_time;
   2407   1.1    pooka 	cmd_v1->max_delay = cmd_v2->max_delay;
   2408   1.1    pooka 	cmd_v1->depends_on = cmd_v2->depends_on;
   2409   1.1    pooka 	cmd_v1->interval = cmd_v2->interval;
   2410   1.1    pooka 	cmd_v1->duration = cmd_v2->duration;
   2411   1.1    pooka 	if (cmd_v2->repeat == IWM_TE_V2_REPEAT_ENDLESS)
   2412   1.1    pooka 		cmd_v1->repeat = htole32(IWM_TE_V1_REPEAT_ENDLESS);
   2413   1.1    pooka 	else
   2414   1.1    pooka 		cmd_v1->repeat = htole32(cmd_v2->repeat);
   2415   1.1    pooka 	cmd_v1->max_frags = htole32(cmd_v2->max_frags);
   2416   1.1    pooka 	cmd_v1->interval_reciprocal = 0; /* unused */
   2417   1.1    pooka 
   2418   1.1    pooka 	cmd_v1->dep_policy = htole32(iwm_te_v2_get_dep_policy(cmd_v2->policy));
   2419   1.1    pooka 	cmd_v1->is_present = htole32(!iwm_te_v2_get_absence(cmd_v2->policy));
   2420   1.1    pooka 	cmd_v1->notify = htole32(iwm_te_v2_get_notify(cmd_v2->policy));
   2421   1.1    pooka }
   2422   1.1    pooka 
   2423   1.4   nonaka static int
   2424  1.45   nonaka iwm_send_time_event_cmd(struct iwm_softc *sc,
   2425  1.45   nonaka     const struct iwm_time_event_cmd_v2 *cmd)
   2426   1.1    pooka {
   2427   1.1    pooka 	struct iwm_time_event_cmd_v1 cmd_v1;
   2428   1.1    pooka 
   2429   1.1    pooka 	if (sc->sc_capaflags & IWM_UCODE_TLV_FLAGS_TIME_EVENT_API_V2)
   2430  1.45   nonaka 		return iwm_send_cmd_pdu(sc, IWM_TIME_EVENT_CMD, 0, sizeof(*cmd),
   2431  1.45   nonaka 		    cmd);
   2432   1.1    pooka 
   2433  1.45   nonaka 	iwm_te_v2_to_v1(cmd, &cmd_v1);
   2434  1.45   nonaka 	return iwm_send_cmd_pdu(sc, IWM_TIME_EVENT_CMD, 0, sizeof(cmd_v1),
   2435  1.45   nonaka 	    &cmd_v1);
   2436   1.1    pooka }
   2437   1.1    pooka 
   2438   1.4   nonaka static void
   2439  1.45   nonaka iwm_protect_session(struct iwm_softc *sc, struct iwm_node *in,
   2440  1.45   nonaka     uint32_t duration, uint32_t max_delay)
   2441   1.1    pooka {
   2442   1.1    pooka 	struct iwm_time_event_cmd_v2 time_cmd;
   2443   1.1    pooka 
   2444   1.1    pooka 	memset(&time_cmd, 0, sizeof(time_cmd));
   2445   1.1    pooka 
   2446   1.1    pooka 	time_cmd.action = htole32(IWM_FW_CTXT_ACTION_ADD);
   2447   1.1    pooka 	time_cmd.id_and_color =
   2448   1.1    pooka 	    htole32(IWM_FW_CMD_ID_AND_COLOR(in->in_id, in->in_color));
   2449   1.1    pooka 	time_cmd.id = htole32(IWM_TE_BSS_STA_AGGRESSIVE_ASSOC);
   2450   1.1    pooka 
   2451  1.45   nonaka 	time_cmd.apply_time = htole32(0);
   2452   1.1    pooka 
   2453   1.1    pooka 	time_cmd.max_frags = IWM_TE_V2_FRAG_NONE;
   2454   1.1    pooka 	time_cmd.max_delay = htole32(max_delay);
   2455   1.1    pooka 	/* TODO: why do we need to interval = bi if it is not periodic? */
   2456   1.1    pooka 	time_cmd.interval = htole32(1);
   2457   1.1    pooka 	time_cmd.duration = htole32(duration);
   2458   1.1    pooka 	time_cmd.repeat = 1;
   2459   1.1    pooka 	time_cmd.policy
   2460  1.45   nonaka 	    = htole16(IWM_TE_V2_NOTIF_HOST_EVENT_START |
   2461  1.45   nonaka 	        IWM_TE_V2_NOTIF_HOST_EVENT_END |
   2462  1.45   nonaka 		IWM_T2_V2_START_IMMEDIATELY);
   2463   1.1    pooka 
   2464  1.45   nonaka 	iwm_send_time_event_cmd(sc, &time_cmd);
   2465   1.1    pooka }
   2466   1.1    pooka 
   2467   1.1    pooka /*
   2468   1.1    pooka  * NVM read access and content parsing.  We do not support
   2469   1.1    pooka  * external NVM or writing NVM.
   2470   1.1    pooka  */
   2471   1.1    pooka 
   2472   1.1    pooka /* list of NVM sections we are allowed/need to read */
   2473  1.45   nonaka static const int iwm_nvm_to_read[] = {
   2474   1.1    pooka 	IWM_NVM_SECTION_TYPE_HW,
   2475   1.1    pooka 	IWM_NVM_SECTION_TYPE_SW,
   2476  1.45   nonaka 	IWM_NVM_SECTION_TYPE_REGULATORY,
   2477   1.1    pooka 	IWM_NVM_SECTION_TYPE_CALIBRATION,
   2478   1.1    pooka 	IWM_NVM_SECTION_TYPE_PRODUCTION,
   2479  1.45   nonaka 	IWM_NVM_SECTION_TYPE_HW_8000,
   2480  1.45   nonaka 	IWM_NVM_SECTION_TYPE_MAC_OVERRIDE,
   2481  1.45   nonaka 	IWM_NVM_SECTION_TYPE_PHY_SKU,
   2482   1.1    pooka };
   2483   1.1    pooka 
   2484   1.1    pooka /* Default NVM size to read */
   2485  1.45   nonaka #define IWM_NVM_DEFAULT_CHUNK_SIZE	(2*1024)
   2486  1.61   nonaka #define IWM_MAX_NVM_SECTION_SIZE_7000	(16 * 512 * sizeof(uint16_t)) /*16 KB*/
   2487  1.61   nonaka #define IWM_MAX_NVM_SECTION_SIZE_8000	(32 * 512 * sizeof(uint16_t)) /*32 KB*/
   2488   1.1    pooka 
   2489   1.1    pooka #define IWM_NVM_WRITE_OPCODE 1
   2490   1.1    pooka #define IWM_NVM_READ_OPCODE 0
   2491   1.1    pooka 
   2492   1.4   nonaka static int
   2493  1.45   nonaka iwm_nvm_read_chunk(struct iwm_softc *sc, uint16_t section, uint16_t offset,
   2494  1.45   nonaka     uint16_t length, uint8_t *data, uint16_t *len)
   2495   1.1    pooka {
   2496   1.1    pooka 	offset = 0;
   2497   1.1    pooka 	struct iwm_nvm_access_cmd nvm_access_cmd = {
   2498   1.1    pooka 		.offset = htole16(offset),
   2499   1.1    pooka 		.length = htole16(length),
   2500   1.1    pooka 		.type = htole16(section),
   2501   1.1    pooka 		.op_code = IWM_NVM_READ_OPCODE,
   2502   1.1    pooka 	};
   2503   1.1    pooka 	struct iwm_nvm_access_resp *nvm_resp;
   2504   1.1    pooka 	struct iwm_rx_packet *pkt;
   2505   1.1    pooka 	struct iwm_host_cmd cmd = {
   2506   1.1    pooka 		.id = IWM_NVM_ACCESS_CMD,
   2507  1.45   nonaka 		.flags = (IWM_CMD_WANT_SKB | IWM_CMD_SEND_IN_RFKILL),
   2508   1.1    pooka 		.data = { &nvm_access_cmd, },
   2509   1.1    pooka 	};
   2510  1.45   nonaka 	int err, offset_read;
   2511  1.45   nonaka 	size_t bytes_read;
   2512   1.1    pooka 	uint8_t *resp_data;
   2513   1.1    pooka 
   2514   1.1    pooka 	cmd.len[0] = sizeof(struct iwm_nvm_access_cmd);
   2515   1.1    pooka 
   2516  1.45   nonaka 	err = iwm_send_cmd(sc, &cmd);
   2517  1.45   nonaka 	if (err) {
   2518  1.45   nonaka 		DPRINTF(("%s: Could not send NVM_ACCESS command (error=%d)\n",
   2519  1.45   nonaka 		    DEVNAME(sc), err));
   2520  1.45   nonaka 		return err;
   2521  1.45   nonaka 	}
   2522   1.1    pooka 
   2523   1.1    pooka 	pkt = cmd.resp_pkt;
   2524   1.1    pooka 	if (pkt->hdr.flags & IWM_CMD_FAILED_MSK) {
   2525  1.45   nonaka 		err = EIO;
   2526   1.1    pooka 		goto exit;
   2527   1.1    pooka 	}
   2528   1.1    pooka 
   2529   1.1    pooka 	/* Extract NVM response */
   2530   1.1    pooka 	nvm_resp = (void *)pkt->data;
   2531   1.1    pooka 
   2532  1.45   nonaka 	err = le16toh(nvm_resp->status);
   2533   1.1    pooka 	bytes_read = le16toh(nvm_resp->length);
   2534   1.1    pooka 	offset_read = le16toh(nvm_resp->offset);
   2535   1.1    pooka 	resp_data = nvm_resp->data;
   2536  1.45   nonaka 	if (err) {
   2537  1.45   nonaka 		err = EINVAL;
   2538   1.1    pooka 		goto exit;
   2539   1.1    pooka 	}
   2540   1.1    pooka 
   2541   1.1    pooka 	if (offset_read != offset) {
   2542  1.45   nonaka 		err = EINVAL;
   2543  1.45   nonaka 		goto exit;
   2544  1.45   nonaka 	}
   2545  1.45   nonaka 	if (bytes_read > length) {
   2546  1.45   nonaka 		err = EINVAL;
   2547   1.1    pooka 		goto exit;
   2548   1.1    pooka 	}
   2549   1.1    pooka 
   2550   1.1    pooka 	memcpy(data + offset, resp_data, bytes_read);
   2551   1.1    pooka 	*len = bytes_read;
   2552   1.1    pooka 
   2553   1.1    pooka  exit:
   2554   1.1    pooka 	iwm_free_resp(sc, &cmd);
   2555  1.45   nonaka 	return err;
   2556   1.1    pooka }
   2557   1.1    pooka 
   2558   1.1    pooka /*
   2559   1.1    pooka  * Reads an NVM section completely.
   2560   1.1    pooka  * NICs prior to 7000 family doesn't have a real NVM, but just read
   2561   1.1    pooka  * section 0 which is the EEPROM. Because the EEPROM reading is unlimited
   2562   1.1    pooka  * by uCode, we need to manually check in this case that we don't
   2563   1.1    pooka  * overflow and try to read more than the EEPROM size.
   2564   1.1    pooka  */
   2565   1.4   nonaka static int
   2566  1.45   nonaka iwm_nvm_read_section(struct iwm_softc *sc, uint16_t section, uint8_t *data,
   2567  1.45   nonaka     uint16_t *len, size_t max_len)
   2568   1.1    pooka {
   2569  1.45   nonaka 	uint16_t chunklen, seglen;
   2570  1.45   nonaka 	int err;
   2571   1.1    pooka 
   2572  1.45   nonaka 	chunklen = seglen = IWM_NVM_DEFAULT_CHUNK_SIZE;
   2573   1.1    pooka 	*len = 0;
   2574   1.1    pooka 
   2575  1.45   nonaka 	/* Read NVM chunks until exhausted (reading less than requested) */
   2576  1.45   nonaka 	while (seglen == chunklen && *len < max_len) {
   2577  1.45   nonaka 		err = iwm_nvm_read_chunk(sc, section, *len, chunklen, data,
   2578  1.45   nonaka 		    &seglen);
   2579  1.45   nonaka 		if (err) {
   2580  1.61   nonaka 			DPRINTF(("%s: Cannot read NVM from section %d "
   2581  1.45   nonaka 			    "offset %d, length %d\n",
   2582  1.45   nonaka 			    DEVNAME(sc), section, *len, chunklen));
   2583  1.45   nonaka 			return err;
   2584   1.1    pooka 		}
   2585   1.1    pooka 		*len += seglen;
   2586   1.1    pooka 	}
   2587   1.1    pooka 
   2588   1.1    pooka 	DPRINTFN(4, ("NVM section %d read completed\n", section));
   2589   1.1    pooka 	return 0;
   2590   1.1    pooka }
   2591   1.1    pooka 
   2592  1.45   nonaka static uint8_t
   2593  1.45   nonaka iwm_fw_valid_tx_ant(struct iwm_softc *sc)
   2594  1.45   nonaka {
   2595  1.45   nonaka 	uint8_t tx_ant;
   2596  1.45   nonaka 
   2597  1.45   nonaka 	tx_ant = ((sc->sc_fw_phy_config & IWM_FW_PHY_CFG_TX_CHAIN)
   2598  1.45   nonaka 	    >> IWM_FW_PHY_CFG_TX_CHAIN_POS);
   2599  1.45   nonaka 
   2600  1.45   nonaka 	if (sc->sc_nvm.valid_tx_ant)
   2601  1.45   nonaka 		tx_ant &= sc->sc_nvm.valid_tx_ant;
   2602  1.45   nonaka 
   2603  1.45   nonaka 	return tx_ant;
   2604  1.45   nonaka }
   2605   1.1    pooka 
   2606  1.45   nonaka static uint8_t
   2607  1.45   nonaka iwm_fw_valid_rx_ant(struct iwm_softc *sc)
   2608  1.45   nonaka {
   2609  1.45   nonaka 	uint8_t rx_ant;
   2610   1.1    pooka 
   2611  1.45   nonaka 	rx_ant = ((sc->sc_fw_phy_config & IWM_FW_PHY_CFG_RX_CHAIN)
   2612  1.45   nonaka 	    >> IWM_FW_PHY_CFG_RX_CHAIN_POS);
   2613   1.1    pooka 
   2614  1.45   nonaka 	if (sc->sc_nvm.valid_rx_ant)
   2615  1.45   nonaka 		rx_ant &= sc->sc_nvm.valid_rx_ant;
   2616   1.1    pooka 
   2617  1.45   nonaka 	return rx_ant;
   2618  1.45   nonaka }
   2619   1.1    pooka 
   2620   1.4   nonaka static void
   2621  1.45   nonaka iwm_init_channel_map(struct iwm_softc *sc, const uint16_t * const nvm_ch_flags,
   2622  1.45   nonaka     const uint8_t *nvm_channels, size_t nchan)
   2623   1.1    pooka {
   2624   1.1    pooka 	struct ieee80211com *ic = &sc->sc_ic;
   2625   1.1    pooka 	struct iwm_nvm_data *data = &sc->sc_nvm;
   2626   1.1    pooka 	int ch_idx;
   2627   1.1    pooka 	struct ieee80211_channel *channel;
   2628   1.1    pooka 	uint16_t ch_flags;
   2629   1.1    pooka 	int is_5ghz;
   2630   1.1    pooka 	int flags, hw_value;
   2631   1.1    pooka 
   2632  1.45   nonaka 	for (ch_idx = 0; ch_idx < nchan; ch_idx++) {
   2633   1.1    pooka 		ch_flags = le16_to_cpup(nvm_ch_flags + ch_idx);
   2634  1.64   nonaka 		aprint_debug_dev(sc->sc_dev,
   2635  1.64   nonaka 		    "Ch. %d: %svalid %cibss %s %cradar %cdfs"
   2636  1.64   nonaka 		    " %cwide %c40MHz %c80MHz %c160MHz\n",
   2637  1.64   nonaka 		    nvm_channels[ch_idx],
   2638  1.64   nonaka 		    ch_flags & IWM_NVM_CHANNEL_VALID ? "" : "in",
   2639  1.64   nonaka 		    ch_flags & IWM_NVM_CHANNEL_IBSS ? '+' : '-',
   2640  1.64   nonaka 		    ch_flags & IWM_NVM_CHANNEL_ACTIVE ? "active" : "passive",
   2641  1.64   nonaka 		    ch_flags & IWM_NVM_CHANNEL_RADAR ? '+' : '-',
   2642  1.64   nonaka 		    ch_flags & IWM_NVM_CHANNEL_DFS ? '+' : '-',
   2643  1.64   nonaka 		    ch_flags & IWM_NVM_CHANNEL_WIDE ? '+' : '-',
   2644  1.64   nonaka 		    ch_flags & IWM_NVM_CHANNEL_40MHZ ? '+' : '-',
   2645  1.64   nonaka 		    ch_flags & IWM_NVM_CHANNEL_80MHZ ? '+' : '-',
   2646  1.64   nonaka 		    ch_flags & IWM_NVM_CHANNEL_160MHZ ? '+' : '-');
   2647   1.1    pooka 
   2648   1.1    pooka 		if (ch_idx >= IWM_NUM_2GHZ_CHANNELS &&
   2649   1.1    pooka 		    !data->sku_cap_band_52GHz_enable)
   2650   1.1    pooka 			ch_flags &= ~IWM_NVM_CHANNEL_VALID;
   2651   1.1    pooka 
   2652   1.1    pooka 		if (!(ch_flags & IWM_NVM_CHANNEL_VALID)) {
   2653   1.1    pooka 			DPRINTF(("Ch. %d Flags %x [%sGHz] - No traffic\n",
   2654  1.64   nonaka 			    nvm_channels[ch_idx], ch_flags,
   2655  1.64   nonaka 			    (ch_idx >= IWM_NUM_2GHZ_CHANNELS) ? "5" : "2.4"));
   2656   1.1    pooka 			continue;
   2657   1.1    pooka 		}
   2658   1.1    pooka 
   2659  1.45   nonaka 		hw_value = nvm_channels[ch_idx];
   2660   1.1    pooka 		channel = &ic->ic_channels[hw_value];
   2661   1.1    pooka 
   2662   1.1    pooka 		is_5ghz = ch_idx >= IWM_NUM_2GHZ_CHANNELS;
   2663   1.1    pooka 		if (!is_5ghz) {
   2664   1.1    pooka 			flags = IEEE80211_CHAN_2GHZ;
   2665   1.1    pooka 			channel->ic_flags
   2666   1.1    pooka 			    = IEEE80211_CHAN_CCK
   2667   1.1    pooka 			    | IEEE80211_CHAN_OFDM
   2668   1.1    pooka 			    | IEEE80211_CHAN_DYN
   2669   1.1    pooka 			    | IEEE80211_CHAN_2GHZ;
   2670   1.1    pooka 		} else {
   2671   1.1    pooka 			flags = IEEE80211_CHAN_5GHZ;
   2672   1.1    pooka 			channel->ic_flags =
   2673   1.1    pooka 			    IEEE80211_CHAN_A;
   2674   1.1    pooka 		}
   2675   1.1    pooka 		channel->ic_freq = ieee80211_ieee2mhz(hw_value, flags);
   2676   1.1    pooka 
   2677   1.1    pooka 		if (!(ch_flags & IWM_NVM_CHANNEL_ACTIVE))
   2678   1.1    pooka 			channel->ic_flags |= IEEE80211_CHAN_PASSIVE;
   2679  1.45   nonaka 
   2680  1.45   nonaka #ifndef IEEE80211_NO_HT
   2681  1.45   nonaka 		if (data->sku_cap_11n_enable)
   2682  1.45   nonaka 			channel->ic_flags |= IEEE80211_CHAN_HT;
   2683  1.45   nonaka #endif
   2684  1.45   nonaka 	}
   2685  1.45   nonaka }
   2686  1.45   nonaka 
   2687  1.45   nonaka #ifndef IEEE80211_NO_HT
   2688  1.45   nonaka static void
   2689  1.45   nonaka iwm_setup_ht_rates(struct iwm_softc *sc)
   2690  1.45   nonaka {
   2691  1.45   nonaka 	struct ieee80211com *ic = &sc->sc_ic;
   2692  1.45   nonaka 
   2693  1.45   nonaka 	/* TX is supported with the same MCS as RX. */
   2694  1.45   nonaka 	ic->ic_tx_mcs_set = IEEE80211_TX_MCS_SET_DEFINED;
   2695  1.45   nonaka 
   2696  1.45   nonaka 	ic->ic_sup_mcs[0] = 0xff;		/* MCS 0-7 */
   2697  1.45   nonaka 
   2698  1.45   nonaka #ifdef notyet
   2699  1.45   nonaka 	if (sc->sc_nvm.sku_cap_mimo_disable)
   2700  1.45   nonaka 		return;
   2701  1.45   nonaka 
   2702  1.45   nonaka 	if (iwm_fw_valid_rx_ant(sc) > 1)
   2703  1.45   nonaka 		ic->ic_sup_mcs[1] = 0xff;	/* MCS 8-15 */
   2704  1.45   nonaka 	if (iwm_fw_valid_rx_ant(sc) > 2)
   2705  1.45   nonaka 		ic->ic_sup_mcs[2] = 0xff;	/* MCS 16-23 */
   2706  1.45   nonaka #endif
   2707  1.45   nonaka }
   2708  1.45   nonaka 
   2709  1.45   nonaka #define IWM_MAX_RX_BA_SESSIONS 16
   2710  1.45   nonaka 
   2711  1.45   nonaka static void
   2712  1.45   nonaka iwm_sta_rx_agg(struct iwm_softc *sc, struct ieee80211_node *ni, uint8_t tid,
   2713  1.45   nonaka     uint16_t ssn, int start)
   2714  1.45   nonaka {
   2715  1.45   nonaka 	struct ieee80211com *ic = &sc->sc_ic;
   2716  1.45   nonaka 	struct iwm_add_sta_cmd_v7 cmd;
   2717  1.45   nonaka 	struct iwm_node *in = (struct iwm_node *)ni;
   2718  1.45   nonaka 	int err, s;
   2719  1.45   nonaka 	uint32_t status;
   2720  1.45   nonaka 
   2721  1.45   nonaka 	if (start && sc->sc_rx_ba_sessions >= IWM_MAX_RX_BA_SESSIONS) {
   2722  1.45   nonaka 		ieee80211_addba_req_refuse(ic, ni, tid);
   2723  1.45   nonaka 		return;
   2724  1.45   nonaka 	}
   2725  1.45   nonaka 
   2726  1.45   nonaka 	memset(&cmd, 0, sizeof(cmd));
   2727  1.45   nonaka 
   2728  1.45   nonaka 	cmd.sta_id = IWM_STATION_ID;
   2729  1.45   nonaka 	cmd.mac_id_n_color
   2730  1.45   nonaka 	    = htole32(IWM_FW_CMD_ID_AND_COLOR(in->in_id, in->in_color));
   2731  1.45   nonaka 	cmd.add_modify = IWM_STA_MODE_MODIFY;
   2732  1.45   nonaka 
   2733  1.45   nonaka 	if (start) {
   2734  1.45   nonaka 		cmd.add_immediate_ba_tid = (uint8_t)tid;
   2735  1.45   nonaka 		cmd.add_immediate_ba_ssn = ssn;
   2736  1.45   nonaka 	} else {
   2737  1.45   nonaka 		cmd.remove_immediate_ba_tid = (uint8_t)tid;
   2738  1.45   nonaka 	}
   2739  1.45   nonaka 	cmd.modify_mask = start ? IWM_STA_MODIFY_ADD_BA_TID :
   2740  1.45   nonaka 	    IWM_STA_MODIFY_REMOVE_BA_TID;
   2741  1.45   nonaka 
   2742  1.45   nonaka 	status = IWM_ADD_STA_SUCCESS;
   2743  1.45   nonaka 	err = iwm_send_cmd_pdu_status(sc, IWM_ADD_STA, sizeof(cmd), &cmd,
   2744  1.45   nonaka 	    &status);
   2745  1.45   nonaka 
   2746  1.45   nonaka 	s = splnet();
   2747  1.45   nonaka 	if (err == 0 && status == IWM_ADD_STA_SUCCESS) {
   2748  1.45   nonaka 		if (start) {
   2749  1.45   nonaka 			sc->sc_rx_ba_sessions++;
   2750  1.45   nonaka 			ieee80211_addba_req_accept(ic, ni, tid);
   2751  1.45   nonaka 		} else if (sc->sc_rx_ba_sessions > 0)
   2752  1.45   nonaka 			sc->sc_rx_ba_sessions--;
   2753  1.45   nonaka 	} else if (start)
   2754  1.45   nonaka 		ieee80211_addba_req_refuse(ic, ni, tid);
   2755  1.45   nonaka 	splx(s);
   2756  1.45   nonaka }
   2757  1.45   nonaka 
   2758  1.45   nonaka static void
   2759  1.45   nonaka iwm_htprot_task(void *arg)
   2760  1.45   nonaka {
   2761  1.45   nonaka 	struct iwm_softc *sc = arg;
   2762  1.45   nonaka 	struct ieee80211com *ic = &sc->sc_ic;
   2763  1.45   nonaka 	struct iwm_node *in = (struct iwm_node *)ic->ic_bss;
   2764  1.45   nonaka 	int err;
   2765  1.45   nonaka 
   2766  1.45   nonaka 	/* This call updates HT protection based on in->in_ni.ni_htop1. */
   2767  1.45   nonaka 	err = iwm_mac_ctxt_cmd(sc, in, IWM_FW_CTXT_ACTION_MODIFY, 1);
   2768  1.45   nonaka 	if (err)
   2769  1.45   nonaka 		aprint_error_dev(sc->sc_dev,
   2770  1.45   nonaka 		    "could not change HT protection: error %d\n", err);
   2771  1.45   nonaka }
   2772  1.45   nonaka 
   2773  1.45   nonaka /*
   2774  1.45   nonaka  * This function is called by upper layer when HT protection settings in
   2775  1.45   nonaka  * beacons have changed.
   2776  1.45   nonaka  */
   2777  1.45   nonaka static void
   2778  1.45   nonaka iwm_update_htprot(struct ieee80211com *ic, struct ieee80211_node *ni)
   2779  1.45   nonaka {
   2780  1.45   nonaka 	struct iwm_softc *sc = ic->ic_softc;
   2781  1.45   nonaka 
   2782  1.45   nonaka 	/* assumes that ni == ic->ic_bss */
   2783  1.45   nonaka 	task_add(systq, &sc->htprot_task);
   2784  1.45   nonaka }
   2785  1.45   nonaka 
   2786  1.45   nonaka static void
   2787  1.45   nonaka iwm_ba_task(void *arg)
   2788  1.45   nonaka {
   2789  1.45   nonaka 	struct iwm_softc *sc = arg;
   2790  1.45   nonaka 	struct ieee80211com *ic = &sc->sc_ic;
   2791  1.45   nonaka 	struct ieee80211_node *ni = ic->ic_bss;
   2792  1.45   nonaka 
   2793  1.45   nonaka 	if (sc->ba_start)
   2794  1.45   nonaka 		iwm_sta_rx_agg(sc, ni, sc->ba_tid, sc->ba_ssn, 1);
   2795  1.45   nonaka 	else
   2796  1.45   nonaka 		iwm_sta_rx_agg(sc, ni, sc->ba_tid, 0, 0);
   2797  1.45   nonaka }
   2798  1.45   nonaka 
   2799  1.45   nonaka /*
   2800  1.45   nonaka  * This function is called by upper layer when an ADDBA request is received
   2801  1.45   nonaka  * from another STA and before the ADDBA response is sent.
   2802  1.45   nonaka  */
   2803  1.45   nonaka static int
   2804  1.45   nonaka iwm_ampdu_rx_start(struct ieee80211com *ic, struct ieee80211_node *ni,
   2805  1.45   nonaka     uint8_t tid)
   2806  1.45   nonaka {
   2807  1.45   nonaka 	struct ieee80211_rx_ba *ba = &ni->ni_rx_ba[tid];
   2808  1.45   nonaka 	struct iwm_softc *sc = IC2IFP(ic)->if_softc;
   2809  1.45   nonaka 
   2810  1.45   nonaka 	if (sc->sc_rx_ba_sessions >= IWM_MAX_RX_BA_SESSIONS)
   2811  1.45   nonaka 		return ENOSPC;
   2812  1.45   nonaka 
   2813  1.45   nonaka 	sc->ba_start = 1;
   2814  1.45   nonaka 	sc->ba_tid = tid;
   2815  1.45   nonaka 	sc->ba_ssn = htole16(ba->ba_winstart);
   2816  1.45   nonaka 	task_add(systq, &sc->ba_task);
   2817  1.45   nonaka 
   2818  1.45   nonaka 	return EBUSY;
   2819  1.45   nonaka }
   2820  1.45   nonaka 
   2821  1.45   nonaka /*
   2822  1.45   nonaka  * This function is called by upper layer on teardown of an HT-immediate
   2823  1.45   nonaka  * Block Ack agreement (eg. upon receipt of a DELBA frame).
   2824  1.45   nonaka  */
   2825  1.45   nonaka static void
   2826  1.45   nonaka iwm_ampdu_rx_stop(struct ieee80211com *ic, struct ieee80211_node *ni,
   2827  1.45   nonaka     uint8_t tid)
   2828  1.45   nonaka {
   2829  1.45   nonaka 	struct iwm_softc *sc = IC2IFP(ic)->if_softc;
   2830  1.45   nonaka 
   2831  1.45   nonaka 	sc->ba_start = 0;
   2832  1.45   nonaka 	sc->ba_tid = tid;
   2833  1.45   nonaka 	task_add(systq, &sc->ba_task);
   2834  1.45   nonaka }
   2835  1.45   nonaka #endif
   2836  1.45   nonaka 
   2837  1.45   nonaka static void
   2838  1.71   nonaka iwm_free_fw_paging(struct iwm_softc *sc)
   2839  1.71   nonaka {
   2840  1.71   nonaka 	int i;
   2841  1.71   nonaka 
   2842  1.71   nonaka 	if (sc->fw_paging_db[0].fw_paging_block.vaddr == NULL)
   2843  1.71   nonaka 		return;
   2844  1.71   nonaka 
   2845  1.71   nonaka 	for (i = 0; i < IWM_NUM_OF_FW_PAGING_BLOCKS; i++) {
   2846  1.71   nonaka 		iwm_dma_contig_free(&sc->fw_paging_db[i].fw_paging_block);
   2847  1.71   nonaka 	}
   2848  1.71   nonaka 
   2849  1.71   nonaka 	memset(sc->fw_paging_db, 0, sizeof(sc->fw_paging_db));
   2850  1.71   nonaka }
   2851  1.71   nonaka 
   2852  1.71   nonaka static int
   2853  1.71   nonaka iwm_fill_paging_mem(struct iwm_softc *sc, const struct iwm_fw_sects *fws)
   2854  1.71   nonaka {
   2855  1.71   nonaka 	int sec_idx, idx;
   2856  1.71   nonaka 	uint32_t offset = 0;
   2857  1.71   nonaka 
   2858  1.71   nonaka 	/*
   2859  1.71   nonaka 	 * find where is the paging image start point:
   2860  1.71   nonaka 	 * if CPU2 exist and it's in paging format, then the image looks like:
   2861  1.71   nonaka 	 * CPU1 sections (2 or more)
   2862  1.71   nonaka 	 * CPU1_CPU2_SEPARATOR_SECTION delimiter - separate between CPU1 to CPU2
   2863  1.71   nonaka 	 * CPU2 sections (not paged)
   2864  1.71   nonaka 	 * PAGING_SEPARATOR_SECTION delimiter - separate between CPU2
   2865  1.71   nonaka 	 * non paged to CPU2 paging sec
   2866  1.71   nonaka 	 * CPU2 paging CSS
   2867  1.71   nonaka 	 * CPU2 paging image (including instruction and data)
   2868  1.71   nonaka 	 */
   2869  1.71   nonaka 	for (sec_idx = 0; sec_idx < IWM_UCODE_SECT_MAX; sec_idx++) {
   2870  1.71   nonaka 		if (fws->fw_sect[sec_idx].fws_devoff ==
   2871  1.71   nonaka 		    IWM_PAGING_SEPARATOR_SECTION) {
   2872  1.71   nonaka 			sec_idx++;
   2873  1.71   nonaka 			break;
   2874  1.71   nonaka 		}
   2875  1.71   nonaka 	}
   2876  1.71   nonaka 
   2877  1.71   nonaka 	/*
   2878  1.71   nonaka 	 * If paging is enabled there should be at least 2 more sections left
   2879  1.71   nonaka 	 * (one for CSS and one for Paging data)
   2880  1.71   nonaka 	 */
   2881  1.71   nonaka 	if (sec_idx >= __arraycount(fws->fw_sect) - 1) {
   2882  1.71   nonaka 		aprint_verbose_dev(sc->sc_dev,
   2883  1.71   nonaka 		    "Paging: Missing CSS and/or paging sections\n");
   2884  1.71   nonaka 		iwm_free_fw_paging(sc);
   2885  1.71   nonaka 		return EINVAL;
   2886  1.71   nonaka 	}
   2887  1.71   nonaka 
   2888  1.71   nonaka 	/* copy the CSS block to the dram */
   2889  1.71   nonaka 	DPRINTF(("%s: Paging: load paging CSS to FW, sec = %d\n", DEVNAME(sc),
   2890  1.71   nonaka 	    sec_idx));
   2891  1.71   nonaka 
   2892  1.71   nonaka 	memcpy(sc->fw_paging_db[0].fw_paging_block.vaddr,
   2893  1.71   nonaka 	    fws->fw_sect[sec_idx].fws_data, sc->fw_paging_db[0].fw_paging_size);
   2894  1.71   nonaka 
   2895  1.71   nonaka 	DPRINTF(("%s: Paging: copied %d CSS bytes to first block\n",
   2896  1.71   nonaka 	    DEVNAME(sc), sc->fw_paging_db[0].fw_paging_size));
   2897  1.71   nonaka 
   2898  1.71   nonaka 	sec_idx++;
   2899  1.71   nonaka 
   2900  1.71   nonaka 	/*
   2901  1.71   nonaka 	 * copy the paging blocks to the dram
   2902  1.71   nonaka 	 * loop index start from 1 since that CSS block already copied to dram
   2903  1.71   nonaka 	 * and CSS index is 0.
   2904  1.71   nonaka 	 * loop stop at num_of_paging_blk since that last block is not full.
   2905  1.71   nonaka 	 */
   2906  1.71   nonaka 	for (idx = 1; idx < sc->num_of_paging_blk; idx++) {
   2907  1.71   nonaka 		memcpy(sc->fw_paging_db[idx].fw_paging_block.vaddr,
   2908  1.71   nonaka 		       (const char *)fws->fw_sect[sec_idx].fws_data + offset,
   2909  1.71   nonaka 		       sc->fw_paging_db[idx].fw_paging_size);
   2910  1.71   nonaka 
   2911  1.71   nonaka 		DPRINTF(("%s: Paging: copied %d paging bytes to block %d\n",
   2912  1.71   nonaka 		    DEVNAME(sc), sc->fw_paging_db[idx].fw_paging_size, idx));
   2913  1.71   nonaka 
   2914  1.71   nonaka 		offset += sc->fw_paging_db[idx].fw_paging_size;
   2915  1.71   nonaka 	}
   2916  1.71   nonaka 
   2917  1.71   nonaka 	/* copy the last paging block */
   2918  1.71   nonaka 	if (sc->num_of_pages_in_last_blk > 0) {
   2919  1.71   nonaka 		memcpy(sc->fw_paging_db[idx].fw_paging_block.vaddr,
   2920  1.71   nonaka 		    (const char *)fws->fw_sect[sec_idx].fws_data + offset,
   2921  1.71   nonaka 		    IWM_FW_PAGING_SIZE * sc->num_of_pages_in_last_blk);
   2922  1.71   nonaka 
   2923  1.71   nonaka 		DPRINTF(("%s: Paging: copied %d pages in the last block %d\n",
   2924  1.71   nonaka 		    DEVNAME(sc), sc->num_of_pages_in_last_blk, idx));
   2925  1.71   nonaka 	}
   2926  1.71   nonaka 
   2927  1.71   nonaka 	return 0;
   2928  1.71   nonaka }
   2929  1.71   nonaka 
   2930  1.71   nonaka static int
   2931  1.71   nonaka iwm_alloc_fw_paging_mem(struct iwm_softc *sc, const struct iwm_fw_sects *fws)
   2932  1.71   nonaka {
   2933  1.71   nonaka 	int blk_idx = 0;
   2934  1.71   nonaka 	int error, num_of_pages;
   2935  1.71   nonaka 	bus_dmamap_t dmap;
   2936  1.71   nonaka 
   2937  1.71   nonaka 	if (sc->fw_paging_db[0].fw_paging_block.vaddr != NULL) {
   2938  1.71   nonaka 		int i;
   2939  1.71   nonaka 		/* Device got reset, and we setup firmware paging again */
   2940  1.71   nonaka 		for (i = 0; i < sc->num_of_paging_blk + 1; i++) {
   2941  1.71   nonaka 			dmap = sc->fw_paging_db[i].fw_paging_block.map;
   2942  1.71   nonaka 			bus_dmamap_sync(sc->sc_dmat, dmap, 0, dmap->dm_mapsize,
   2943  1.71   nonaka 			    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2944  1.71   nonaka 		}
   2945  1.71   nonaka 		return 0;
   2946  1.71   nonaka 	}
   2947  1.71   nonaka 
   2948  1.71   nonaka 	/* ensure IWM_BLOCK_2_EXP_SIZE is power of 2 of IWM_PAGING_BLOCK_SIZE */
   2949  1.71   nonaka 	CTASSERT(__BIT(IWM_BLOCK_2_EXP_SIZE) == IWM_PAGING_BLOCK_SIZE);
   2950  1.71   nonaka 
   2951  1.71   nonaka 	num_of_pages = fws->paging_mem_size / IWM_FW_PAGING_SIZE;
   2952  1.71   nonaka 	sc->num_of_paging_blk =
   2953  1.71   nonaka 	    howmany(num_of_pages, IWM_NUM_OF_PAGE_PER_GROUP);
   2954  1.71   nonaka 	sc->num_of_pages_in_last_blk = num_of_pages -
   2955  1.71   nonaka 	    IWM_NUM_OF_PAGE_PER_GROUP * (sc->num_of_paging_blk - 1);
   2956  1.71   nonaka 
   2957  1.71   nonaka 	DPRINTF(("%s: Paging: allocating mem for %d paging blocks, "
   2958  1.71   nonaka 	    "each block holds 8 pages, last block holds %d pages\n",
   2959  1.71   nonaka 	    DEVNAME(sc), sc->num_of_paging_blk, sc->num_of_pages_in_last_blk));
   2960  1.71   nonaka 
   2961  1.71   nonaka 	/* allocate block of 4Kbytes for paging CSS */
   2962  1.71   nonaka 	error = iwm_dma_contig_alloc(sc->sc_dmat,
   2963  1.71   nonaka 	    &sc->fw_paging_db[blk_idx].fw_paging_block, IWM_FW_PAGING_SIZE,
   2964  1.71   nonaka 	    4096);
   2965  1.71   nonaka 	if (error) {
   2966  1.71   nonaka 		/* free all the previous pages since we failed */
   2967  1.71   nonaka 		iwm_free_fw_paging(sc);
   2968  1.71   nonaka 		return ENOMEM;
   2969  1.71   nonaka 	}
   2970  1.71   nonaka 
   2971  1.71   nonaka 	sc->fw_paging_db[blk_idx].fw_paging_size = IWM_FW_PAGING_SIZE;
   2972  1.71   nonaka 
   2973  1.71   nonaka 	DPRINTF(("%s: Paging: allocated 4K(CSS) bytes for firmware paging.\n",
   2974  1.71   nonaka 	    DEVNAME(sc)));
   2975  1.71   nonaka 
   2976  1.71   nonaka 	/*
   2977  1.71   nonaka 	 * allocate blocks in dram.
   2978  1.71   nonaka 	 * since that CSS allocated in fw_paging_db[0] loop start from index 1
   2979  1.71   nonaka 	 */
   2980  1.71   nonaka 	for (blk_idx = 1; blk_idx < sc->num_of_paging_blk + 1; blk_idx++) {
   2981  1.71   nonaka 		/* allocate block of IWM_PAGING_BLOCK_SIZE (32K) */
   2982  1.71   nonaka 		/* XXX Use iwm_dma_contig_alloc for allocating */
   2983  1.71   nonaka 		error = iwm_dma_contig_alloc(sc->sc_dmat,
   2984  1.71   nonaka 		    &sc->fw_paging_db[blk_idx].fw_paging_block,
   2985  1.71   nonaka 		    IWM_PAGING_BLOCK_SIZE, 4096);
   2986  1.71   nonaka 		if (error) {
   2987  1.71   nonaka 			/* free all the previous pages since we failed */
   2988  1.71   nonaka 			iwm_free_fw_paging(sc);
   2989  1.71   nonaka 			return ENOMEM;
   2990  1.71   nonaka 		}
   2991  1.71   nonaka 
   2992  1.71   nonaka 		sc->fw_paging_db[blk_idx].fw_paging_size =
   2993  1.71   nonaka 		    IWM_PAGING_BLOCK_SIZE;
   2994  1.71   nonaka 
   2995  1.71   nonaka 		DPRINTF(("%s: Paging: allocated 32K bytes for firmware "
   2996  1.71   nonaka 		    "paging.\n", DEVNAME(sc)));
   2997  1.71   nonaka 	}
   2998  1.71   nonaka 
   2999  1.71   nonaka 	return 0;
   3000  1.71   nonaka }
   3001  1.71   nonaka 
   3002  1.71   nonaka static int
   3003  1.71   nonaka iwm_save_fw_paging(struct iwm_softc *sc, const struct iwm_fw_sects *fws)
   3004  1.71   nonaka {
   3005  1.71   nonaka 	int err;
   3006  1.71   nonaka 
   3007  1.71   nonaka 	err = iwm_alloc_fw_paging_mem(sc, fws);
   3008  1.71   nonaka 	if (err)
   3009  1.71   nonaka 		return err;
   3010  1.71   nonaka 
   3011  1.71   nonaka 	return iwm_fill_paging_mem(sc, fws);
   3012  1.71   nonaka }
   3013  1.71   nonaka 
   3014  1.71   nonaka static bool
   3015  1.71   nonaka iwm_has_new_tx_api(struct iwm_softc *sc)
   3016  1.71   nonaka {
   3017  1.71   nonaka 	/* XXX */
   3018  1.71   nonaka 	return false;
   3019  1.71   nonaka }
   3020  1.71   nonaka 
   3021  1.71   nonaka /* send paging cmd to FW in case CPU2 has paging image */
   3022  1.71   nonaka static int
   3023  1.71   nonaka iwm_send_paging_cmd(struct iwm_softc *sc, const struct iwm_fw_sects *fws)
   3024  1.71   nonaka {
   3025  1.71   nonaka 	struct iwm_fw_paging_cmd fw_paging_cmd = {
   3026  1.71   nonaka 		.flags = htole32(IWM_PAGING_CMD_IS_SECURED |
   3027  1.71   nonaka 		                 IWM_PAGING_CMD_IS_ENABLED |
   3028  1.71   nonaka 		                 (sc->num_of_pages_in_last_blk <<
   3029  1.71   nonaka 		                  IWM_PAGING_CMD_NUM_OF_PAGES_IN_LAST_GRP_POS)),
   3030  1.71   nonaka 		.block_size = htole32(IWM_BLOCK_2_EXP_SIZE),
   3031  1.71   nonaka 		.block_num = htole32(sc->num_of_paging_blk),
   3032  1.71   nonaka 	};
   3033  1.71   nonaka 	size_t size = sizeof(fw_paging_cmd);
   3034  1.71   nonaka 	int blk_idx;
   3035  1.71   nonaka 	bus_dmamap_t dmap;
   3036  1.71   nonaka 
   3037  1.71   nonaka 	if (!iwm_has_new_tx_api(sc))
   3038  1.71   nonaka 		size -= (sizeof(uint64_t) - sizeof(uint32_t)) *
   3039  1.71   nonaka 		    IWM_NUM_OF_FW_PAGING_BLOCKS;
   3040  1.71   nonaka 
   3041  1.71   nonaka 	/* loop for for all paging blocks + CSS block */
   3042  1.71   nonaka 	for (blk_idx = 0; blk_idx < sc->num_of_paging_blk + 1; blk_idx++) {
   3043  1.71   nonaka 		bus_addr_t dev_phy_addr =
   3044  1.71   nonaka 		    sc->fw_paging_db[blk_idx].fw_paging_block.paddr;
   3045  1.71   nonaka 		if (iwm_has_new_tx_api(sc)) {
   3046  1.71   nonaka 			fw_paging_cmd.device_phy_addr.addr64[blk_idx] =
   3047  1.71   nonaka 			    htole64(dev_phy_addr);
   3048  1.71   nonaka 		} else {
   3049  1.71   nonaka 			dev_phy_addr = dev_phy_addr >> IWM_PAGE_2_EXP_SIZE;
   3050  1.71   nonaka 			fw_paging_cmd.device_phy_addr.addr32[blk_idx] =
   3051  1.71   nonaka 			    htole32(dev_phy_addr);
   3052  1.71   nonaka 		}
   3053  1.71   nonaka 		dmap = sc->fw_paging_db[blk_idx].fw_paging_block.map,
   3054  1.71   nonaka 		bus_dmamap_sync(sc->sc_dmat, dmap, 0, dmap->dm_mapsize,
   3055  1.71   nonaka 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3056  1.71   nonaka 	}
   3057  1.71   nonaka 
   3058  1.71   nonaka 	return iwm_send_cmd_pdu(sc,
   3059  1.71   nonaka 	    iwm_cmd_id(IWM_FW_PAGING_BLOCK_CMD, IWM_ALWAYS_LONG_GROUP, 0),
   3060  1.71   nonaka 	    0, size, &fw_paging_cmd);
   3061  1.71   nonaka }
   3062  1.71   nonaka 
   3063  1.71   nonaka static void
   3064  1.45   nonaka iwm_set_hw_address_8000(struct iwm_softc *sc, struct iwm_nvm_data *data,
   3065  1.45   nonaka     const uint16_t *mac_override, const uint16_t *nvm_hw)
   3066  1.45   nonaka {
   3067  1.45   nonaka 	static const uint8_t reserved_mac[ETHER_ADDR_LEN] = {
   3068  1.45   nonaka 		0x02, 0xcc, 0xaa, 0xff, 0xee, 0x00
   3069  1.45   nonaka 	};
   3070  1.45   nonaka 	static const u_int8_t etheranyaddr[ETHER_ADDR_LEN] = {
   3071  1.45   nonaka 		0x00, 0x00, 0x00, 0x00, 0x00, 0x00
   3072  1.45   nonaka 	};
   3073  1.45   nonaka 	const uint8_t *hw_addr;
   3074  1.45   nonaka 
   3075  1.45   nonaka 	if (mac_override) {
   3076  1.45   nonaka 		hw_addr = (const uint8_t *)(mac_override +
   3077  1.45   nonaka 		    IWM_MAC_ADDRESS_OVERRIDE_8000);
   3078  1.45   nonaka 
   3079  1.45   nonaka 		/*
   3080  1.45   nonaka 		 * Store the MAC address from MAO section.
   3081  1.45   nonaka 		 * No byte swapping is required in MAO section
   3082  1.45   nonaka 		 */
   3083  1.45   nonaka 		memcpy(data->hw_addr, hw_addr, ETHER_ADDR_LEN);
   3084  1.45   nonaka 
   3085  1.45   nonaka 		/*
   3086  1.45   nonaka 		 * Force the use of the OTP MAC address in case of reserved MAC
   3087  1.45   nonaka 		 * address in the NVM, or if address is given but invalid.
   3088  1.45   nonaka 		 */
   3089  1.45   nonaka 		if (memcmp(reserved_mac, hw_addr, ETHER_ADDR_LEN) != 0 &&
   3090  1.45   nonaka 		    (memcmp(etherbroadcastaddr, data->hw_addr,
   3091  1.45   nonaka 		    sizeof(etherbroadcastaddr)) != 0) &&
   3092  1.45   nonaka 		    (memcmp(etheranyaddr, data->hw_addr,
   3093  1.45   nonaka 		    sizeof(etheranyaddr)) != 0) &&
   3094  1.45   nonaka 		    !ETHER_IS_MULTICAST(data->hw_addr))
   3095  1.45   nonaka 			return;
   3096  1.45   nonaka 	}
   3097  1.45   nonaka 
   3098  1.45   nonaka 	if (nvm_hw) {
   3099  1.45   nonaka 		/* Read the mac address from WFMP registers. */
   3100  1.45   nonaka 		uint32_t mac_addr0 =
   3101  1.45   nonaka 		    htole32(iwm_read_prph(sc, IWM_WFMP_MAC_ADDR_0));
   3102  1.45   nonaka 		uint32_t mac_addr1 =
   3103  1.45   nonaka 		    htole32(iwm_read_prph(sc, IWM_WFMP_MAC_ADDR_1));
   3104  1.45   nonaka 
   3105  1.45   nonaka 		hw_addr = (const uint8_t *)&mac_addr0;
   3106  1.45   nonaka 		data->hw_addr[0] = hw_addr[3];
   3107  1.45   nonaka 		data->hw_addr[1] = hw_addr[2];
   3108  1.45   nonaka 		data->hw_addr[2] = hw_addr[1];
   3109  1.45   nonaka 		data->hw_addr[3] = hw_addr[0];
   3110  1.45   nonaka 
   3111  1.45   nonaka 		hw_addr = (const uint8_t *)&mac_addr1;
   3112  1.45   nonaka 		data->hw_addr[4] = hw_addr[1];
   3113  1.45   nonaka 		data->hw_addr[5] = hw_addr[0];
   3114  1.45   nonaka 
   3115  1.45   nonaka 		return;
   3116   1.1    pooka 	}
   3117  1.45   nonaka 
   3118  1.45   nonaka 	aprint_error_dev(sc->sc_dev, "mac address not found\n");
   3119  1.45   nonaka 	memset(data->hw_addr, 0, sizeof(data->hw_addr));
   3120   1.1    pooka }
   3121   1.1    pooka 
   3122   1.4   nonaka static int
   3123  1.45   nonaka iwm_parse_nvm_data(struct iwm_softc *sc, const uint16_t *nvm_hw,
   3124  1.45   nonaka     const uint16_t *nvm_sw, const uint16_t *nvm_calib,
   3125  1.45   nonaka     const uint16_t *mac_override, const uint16_t *phy_sku,
   3126  1.45   nonaka     const uint16_t *regulatory)
   3127   1.1    pooka {
   3128   1.1    pooka 	struct iwm_nvm_data *data = &sc->sc_nvm;
   3129   1.1    pooka 	uint8_t hw_addr[ETHER_ADDR_LEN];
   3130  1.45   nonaka 	uint32_t sku;
   3131   1.1    pooka 
   3132  1.45   nonaka 	if (sc->sc_device_family == IWM_DEVICE_FAMILY_7000) {
   3133  1.45   nonaka 		uint16_t radio_cfg = le16_to_cpup(nvm_sw + IWM_RADIO_CFG);
   3134  1.45   nonaka 		data->radio_cfg_type = IWM_NVM_RF_CFG_TYPE_MSK(radio_cfg);
   3135  1.45   nonaka 		data->radio_cfg_step = IWM_NVM_RF_CFG_STEP_MSK(radio_cfg);
   3136  1.45   nonaka 		data->radio_cfg_dash = IWM_NVM_RF_CFG_DASH_MSK(radio_cfg);
   3137  1.45   nonaka 		data->radio_cfg_pnum = IWM_NVM_RF_CFG_PNUM_MSK(radio_cfg);
   3138  1.45   nonaka 
   3139  1.61   nonaka 		data->nvm_version = le16_to_cpup(nvm_sw + IWM_NVM_VERSION);
   3140  1.45   nonaka 		sku = le16_to_cpup(nvm_sw + IWM_SKU);
   3141  1.45   nonaka 	} else {
   3142  1.61   nonaka 		uint32_t radio_cfg = le32_to_cpup(phy_sku + IWM_RADIO_CFG_8000);
   3143  1.45   nonaka 		data->radio_cfg_type = IWM_NVM_RF_CFG_TYPE_MSK_8000(radio_cfg);
   3144  1.45   nonaka 		data->radio_cfg_step = IWM_NVM_RF_CFG_STEP_MSK_8000(radio_cfg);
   3145  1.45   nonaka 		data->radio_cfg_dash = IWM_NVM_RF_CFG_DASH_MSK_8000(radio_cfg);
   3146  1.45   nonaka 		data->radio_cfg_pnum = IWM_NVM_RF_CFG_PNUM_MSK_8000(radio_cfg);
   3147  1.45   nonaka 		data->valid_tx_ant = IWM_NVM_RF_CFG_TX_ANT_MSK_8000(radio_cfg);
   3148  1.45   nonaka 		data->valid_rx_ant = IWM_NVM_RF_CFG_RX_ANT_MSK_8000(radio_cfg);
   3149  1.45   nonaka 
   3150  1.61   nonaka 		data->nvm_version = le32_to_cpup(nvm_sw + IWM_NVM_VERSION_8000);
   3151  1.61   nonaka 		sku = le32_to_cpup(phy_sku + IWM_SKU_8000);
   3152  1.45   nonaka 	}
   3153   1.1    pooka 
   3154   1.1    pooka 	data->sku_cap_band_24GHz_enable = sku & IWM_NVM_SKU_CAP_BAND_24GHZ;
   3155   1.1    pooka 	data->sku_cap_band_52GHz_enable = sku & IWM_NVM_SKU_CAP_BAND_52GHZ;
   3156  1.45   nonaka 	data->sku_cap_11n_enable = sku & IWM_NVM_SKU_CAP_11N_ENABLE;
   3157  1.45   nonaka 	data->sku_cap_mimo_disable = sku & IWM_NVM_SKU_CAP_MIMO_DISABLE;
   3158   1.1    pooka 
   3159   1.1    pooka 	data->n_hw_addrs = le16_to_cpup(nvm_sw + IWM_N_HW_ADDRS);
   3160   1.1    pooka 
   3161  1.45   nonaka 	if (sc->sc_device_family == IWM_DEVICE_FAMILY_7000) {
   3162  1.45   nonaka 		memcpy(hw_addr, nvm_hw + IWM_HW_ADDR, ETHER_ADDR_LEN);
   3163  1.45   nonaka 		data->hw_addr[0] = hw_addr[1];
   3164  1.45   nonaka 		data->hw_addr[1] = hw_addr[0];
   3165  1.45   nonaka 		data->hw_addr[2] = hw_addr[3];
   3166  1.45   nonaka 		data->hw_addr[3] = hw_addr[2];
   3167  1.45   nonaka 		data->hw_addr[4] = hw_addr[5];
   3168  1.45   nonaka 		data->hw_addr[5] = hw_addr[4];
   3169  1.45   nonaka 	} else
   3170  1.45   nonaka 		iwm_set_hw_address_8000(sc, data, mac_override, nvm_hw);
   3171   1.1    pooka 
   3172  1.60   nonaka 	if (sc->sc_device_family == IWM_DEVICE_FAMILY_8000) {
   3173  1.60   nonaka 		uint16_t lar_offset, lar_config;
   3174  1.60   nonaka 		lar_offset = data->nvm_version < 0xE39 ?
   3175  1.60   nonaka 		    IWM_NVM_LAR_OFFSET_8000_OLD : IWM_NVM_LAR_OFFSET_8000;
   3176  1.60   nonaka 		lar_config = le16_to_cpup(regulatory + lar_offset);
   3177  1.60   nonaka                 data->lar_enabled = !!(lar_config & IWM_NVM_LAR_ENABLED_8000);
   3178  1.60   nonaka 	}
   3179  1.60   nonaka 
   3180  1.45   nonaka 	if (sc->sc_device_family == IWM_DEVICE_FAMILY_7000)
   3181  1.45   nonaka 		iwm_init_channel_map(sc, &nvm_sw[IWM_NVM_CHANNELS],
   3182  1.45   nonaka 		    iwm_nvm_channels, __arraycount(iwm_nvm_channels));
   3183  1.45   nonaka 	else
   3184  1.45   nonaka 		iwm_init_channel_map(sc, &regulatory[IWM_NVM_CHANNELS_8000],
   3185  1.45   nonaka 		    iwm_nvm_channels_8000, __arraycount(iwm_nvm_channels_8000));
   3186   1.1    pooka 
   3187   1.1    pooka 	data->calib_version = 255;   /* TODO:
   3188   1.1    pooka 					this value will prevent some checks from
   3189   1.1    pooka 					failing, we need to check if this
   3190   1.1    pooka 					field is still needed, and if it does,
   3191   1.1    pooka 					where is it in the NVM */
   3192   1.1    pooka 
   3193   1.1    pooka 	return 0;
   3194   1.1    pooka }
   3195   1.1    pooka 
   3196   1.1    pooka static int
   3197   1.1    pooka iwm_parse_nvm_sections(struct iwm_softc *sc, struct iwm_nvm_section *sections)
   3198   1.1    pooka {
   3199  1.45   nonaka 	const uint16_t *hw, *sw, *calib, *mac_override = NULL, *phy_sku = NULL;
   3200  1.45   nonaka 	const uint16_t *regulatory = NULL;
   3201   1.1    pooka 
   3202   1.1    pooka 	/* Checking for required sections */
   3203  1.45   nonaka 	if (sc->sc_device_family == IWM_DEVICE_FAMILY_7000) {
   3204  1.45   nonaka 		if (!sections[IWM_NVM_SECTION_TYPE_SW].data ||
   3205  1.45   nonaka 		    !sections[IWM_NVM_SECTION_TYPE_HW].data) {
   3206  1.45   nonaka 			return ENOENT;
   3207  1.45   nonaka 		}
   3208  1.45   nonaka 
   3209  1.45   nonaka 		hw = (const uint16_t *) sections[IWM_NVM_SECTION_TYPE_HW].data;
   3210  1.45   nonaka 	} else if (sc->sc_device_family == IWM_DEVICE_FAMILY_8000) {
   3211  1.45   nonaka 		/* SW and REGULATORY sections are mandatory */
   3212  1.45   nonaka 		if (!sections[IWM_NVM_SECTION_TYPE_SW].data ||
   3213  1.45   nonaka 		    !sections[IWM_NVM_SECTION_TYPE_REGULATORY].data) {
   3214  1.45   nonaka 			return ENOENT;
   3215  1.45   nonaka 		}
   3216  1.45   nonaka 		/* MAC_OVERRIDE or at least HW section must exist */
   3217  1.45   nonaka 		if (!sections[IWM_NVM_SECTION_TYPE_HW_8000].data &&
   3218  1.45   nonaka 		    !sections[IWM_NVM_SECTION_TYPE_MAC_OVERRIDE].data) {
   3219  1.45   nonaka 			return ENOENT;
   3220  1.45   nonaka 		}
   3221  1.45   nonaka 
   3222  1.45   nonaka 		/* PHY_SKU section is mandatory in B0 */
   3223  1.45   nonaka 		if (!sections[IWM_NVM_SECTION_TYPE_PHY_SKU].data) {
   3224  1.45   nonaka 			return ENOENT;
   3225  1.45   nonaka 		}
   3226  1.45   nonaka 
   3227  1.45   nonaka 		regulatory = (const uint16_t *)
   3228  1.45   nonaka 		    sections[IWM_NVM_SECTION_TYPE_REGULATORY].data;
   3229  1.45   nonaka 		hw = (const uint16_t *)
   3230  1.45   nonaka 		    sections[IWM_NVM_SECTION_TYPE_HW_8000].data;
   3231  1.45   nonaka 		mac_override =
   3232  1.45   nonaka 			(const uint16_t *)
   3233  1.45   nonaka 			sections[IWM_NVM_SECTION_TYPE_MAC_OVERRIDE].data;
   3234  1.45   nonaka 		phy_sku = (const uint16_t *)
   3235  1.45   nonaka 		    sections[IWM_NVM_SECTION_TYPE_PHY_SKU].data;
   3236  1.45   nonaka 	} else {
   3237  1.45   nonaka 		panic("unknown device family %d\n", sc->sc_device_family);
   3238   1.1    pooka 	}
   3239   1.1    pooka 
   3240   1.1    pooka 	sw = (const uint16_t *)sections[IWM_NVM_SECTION_TYPE_SW].data;
   3241  1.45   nonaka 	calib = (const uint16_t *)
   3242  1.45   nonaka 	    sections[IWM_NVM_SECTION_TYPE_CALIBRATION].data;
   3243  1.45   nonaka 
   3244  1.45   nonaka 	return iwm_parse_nvm_data(sc, hw, sw, calib, mac_override,
   3245  1.45   nonaka 	    phy_sku, regulatory);
   3246   1.1    pooka }
   3247   1.1    pooka 
   3248   1.4   nonaka static int
   3249   1.1    pooka iwm_nvm_init(struct iwm_softc *sc)
   3250   1.1    pooka {
   3251   1.1    pooka 	struct iwm_nvm_section nvm_sections[IWM_NVM_NUM_OF_SECTIONS];
   3252  1.45   nonaka 	int i, section, err;
   3253   1.1    pooka 	uint16_t len;
   3254  1.45   nonaka 	uint8_t *buf;
   3255  1.61   nonaka 	const size_t bufsz = (sc->sc_device_family == IWM_DEVICE_FAMILY_8000) ?
   3256  1.61   nonaka 	    IWM_MAX_NVM_SECTION_SIZE_8000 : IWM_MAX_NVM_SECTION_SIZE_7000;
   3257   1.1    pooka 
   3258   1.1    pooka 	/* Read From FW NVM */
   3259   1.1    pooka 	DPRINTF(("Read NVM\n"));
   3260   1.1    pooka 
   3261  1.45   nonaka 	memset(nvm_sections, 0, sizeof(nvm_sections));
   3262  1.45   nonaka 
   3263  1.45   nonaka 	buf = kmem_alloc(bufsz, KM_SLEEP);
   3264  1.45   nonaka 	if (buf == NULL)
   3265  1.45   nonaka 		return ENOMEM;
   3266  1.45   nonaka 
   3267  1.45   nonaka 	for (i = 0; i < __arraycount(iwm_nvm_to_read); i++) {
   3268  1.45   nonaka 		section = iwm_nvm_to_read[i];
   3269  1.45   nonaka 		KASSERT(section <= IWM_NVM_NUM_OF_SECTIONS);
   3270  1.45   nonaka 
   3271  1.45   nonaka 		err = iwm_nvm_read_section(sc, section, buf, &len, bufsz);
   3272  1.45   nonaka 		if (err) {
   3273  1.45   nonaka 			err = 0;
   3274  1.45   nonaka 			continue;
   3275  1.45   nonaka 		}
   3276  1.45   nonaka 		nvm_sections[section].data = kmem_alloc(len, KM_SLEEP);
   3277  1.45   nonaka 		if (nvm_sections[section].data == NULL) {
   3278  1.45   nonaka 			err = ENOMEM;
   3279   1.1    pooka 			break;
   3280  1.45   nonaka 		}
   3281  1.45   nonaka 		memcpy(nvm_sections[section].data, buf, len);
   3282  1.45   nonaka 		nvm_sections[section].length = len;
   3283  1.45   nonaka 	}
   3284  1.45   nonaka 	kmem_free(buf, bufsz);
   3285  1.45   nonaka 	if (err == 0)
   3286  1.45   nonaka 		err = iwm_parse_nvm_sections(sc, nvm_sections);
   3287   1.1    pooka 
   3288  1.45   nonaka 	for (i = 0; i < IWM_NVM_NUM_OF_SECTIONS; i++) {
   3289  1.45   nonaka 		if (nvm_sections[i].data != NULL)
   3290  1.45   nonaka 			kmem_free(nvm_sections[i].data, nvm_sections[i].length);
   3291   1.1    pooka 	}
   3292   1.1    pooka 
   3293  1.45   nonaka 	return err;
   3294   1.1    pooka }
   3295   1.1    pooka 
   3296  1.45   nonaka static int
   3297  1.45   nonaka iwm_firmware_load_sect(struct iwm_softc *sc, uint32_t dst_addr,
   3298  1.45   nonaka     const uint8_t *section, uint32_t byte_cnt)
   3299  1.45   nonaka {
   3300  1.45   nonaka 	int err = EINVAL;
   3301  1.45   nonaka 	uint32_t chunk_sz, offset;
   3302  1.45   nonaka 
   3303  1.45   nonaka 	chunk_sz = MIN(IWM_FH_MEM_TB_MAX_LENGTH, byte_cnt);
   3304  1.45   nonaka 
   3305  1.45   nonaka 	for (offset = 0; offset < byte_cnt; offset += chunk_sz) {
   3306  1.45   nonaka 		uint32_t addr, len;
   3307  1.45   nonaka 		const uint8_t *data;
   3308  1.61   nonaka 		bool is_extended = false;
   3309  1.45   nonaka 
   3310  1.45   nonaka 		addr = dst_addr + offset;
   3311  1.45   nonaka 		len = MIN(chunk_sz, byte_cnt - offset);
   3312  1.45   nonaka 		data = section + offset;
   3313  1.45   nonaka 
   3314  1.61   nonaka 		if (addr >= IWM_FW_MEM_EXTENDED_START &&
   3315  1.61   nonaka 		    addr <= IWM_FW_MEM_EXTENDED_END)
   3316  1.61   nonaka 			is_extended = true;
   3317  1.61   nonaka 
   3318  1.61   nonaka 		if (is_extended)
   3319  1.61   nonaka 			iwm_set_bits_prph(sc, IWM_LMPM_CHICK,
   3320  1.61   nonaka 			    IWM_LMPM_CHICK_EXTENDED_ADDR_SPACE);
   3321  1.61   nonaka 
   3322  1.45   nonaka 		err = iwm_firmware_load_chunk(sc, addr, data, len);
   3323  1.61   nonaka 
   3324  1.61   nonaka 		if (is_extended)
   3325  1.61   nonaka 			iwm_clear_bits_prph(sc, IWM_LMPM_CHICK,
   3326  1.61   nonaka 			    IWM_LMPM_CHICK_EXTENDED_ADDR_SPACE);
   3327  1.61   nonaka 
   3328  1.45   nonaka 		if (err)
   3329  1.45   nonaka 			break;
   3330  1.45   nonaka 	}
   3331  1.45   nonaka 
   3332  1.45   nonaka 	return err;
   3333  1.45   nonaka }
   3334   1.1    pooka 
   3335   1.4   nonaka static int
   3336   1.1    pooka iwm_firmware_load_chunk(struct iwm_softc *sc, uint32_t dst_addr,
   3337  1.45   nonaka     const uint8_t *section, uint32_t byte_cnt)
   3338   1.1    pooka {
   3339   1.1    pooka 	struct iwm_dma_info *dma = &sc->fw_dma;
   3340  1.45   nonaka 	int err;
   3341   1.1    pooka 
   3342  1.45   nonaka 	/* Copy firmware chunk into pre-allocated DMA-safe memory. */
   3343   1.1    pooka 	memcpy(dma->vaddr, section, byte_cnt);
   3344  1.45   nonaka 	bus_dmamap_sync(sc->sc_dmat, dma->map, 0, byte_cnt,
   3345  1.45   nonaka 	    BUS_DMASYNC_PREWRITE);
   3346   1.1    pooka 
   3347   1.1    pooka 	sc->sc_fw_chunk_done = 0;
   3348   1.1    pooka 
   3349  1.61   nonaka 	if (!iwm_nic_lock(sc))
   3350  1.45   nonaka 		return EBUSY;
   3351  1.45   nonaka 
   3352   1.1    pooka 	IWM_WRITE(sc, IWM_FH_TCSR_CHNL_TX_CONFIG_REG(IWM_FH_SRVC_CHNL),
   3353   1.1    pooka 	    IWM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_PAUSE);
   3354   1.1    pooka 	IWM_WRITE(sc, IWM_FH_SRVC_CHNL_SRAM_ADDR_REG(IWM_FH_SRVC_CHNL),
   3355   1.1    pooka 	    dst_addr);
   3356   1.1    pooka 	IWM_WRITE(sc, IWM_FH_TFDIB_CTRL0_REG(IWM_FH_SRVC_CHNL),
   3357   1.1    pooka 	    dma->paddr & IWM_FH_MEM_TFDIB_DRAM_ADDR_LSB_MSK);
   3358   1.1    pooka 	IWM_WRITE(sc, IWM_FH_TFDIB_CTRL1_REG(IWM_FH_SRVC_CHNL),
   3359   1.8   nonaka 	    (iwm_get_dma_hi_addr(dma->paddr)
   3360   1.1    pooka 	      << IWM_FH_MEM_TFDIB_REG1_ADDR_BITSHIFT) | byte_cnt);
   3361   1.1    pooka 	IWM_WRITE(sc, IWM_FH_TCSR_CHNL_TX_BUF_STS_REG(IWM_FH_SRVC_CHNL),
   3362   1.1    pooka 	    1 << IWM_FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_NUM |
   3363   1.1    pooka 	    1 << IWM_FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_IDX |
   3364   1.1    pooka 	    IWM_FH_TCSR_CHNL_TX_BUF_STS_REG_VAL_TFDB_VALID);
   3365   1.1    pooka 	IWM_WRITE(sc, IWM_FH_TCSR_CHNL_TX_CONFIG_REG(IWM_FH_SRVC_CHNL),
   3366   1.1    pooka 	    IWM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE    |
   3367   1.1    pooka 	    IWM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_DISABLE |
   3368   1.1    pooka 	    IWM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_ENDTFD);
   3369   1.8   nonaka 
   3370   1.1    pooka 	iwm_nic_unlock(sc);
   3371   1.1    pooka 
   3372  1.45   nonaka 	/* Wait for this segment to load. */
   3373  1.45   nonaka 	err = 0;
   3374  1.45   nonaka 	while (!sc->sc_fw_chunk_done) {
   3375  1.45   nonaka 		err = tsleep(&sc->sc_fw, 0, "iwmfw", mstohz(5000));
   3376  1.45   nonaka 		if (err)
   3377   1.1    pooka 			break;
   3378  1.45   nonaka 	}
   3379  1.45   nonaka 	if (!sc->sc_fw_chunk_done) {
   3380  1.61   nonaka 		DPRINTF(("%s: fw chunk addr 0x%x len %d failed to load\n",
   3381  1.61   nonaka 		    DEVNAME(sc), dst_addr, byte_cnt));
   3382  1.45   nonaka 	}
   3383   1.1    pooka 
   3384  1.45   nonaka 	return err;
   3385   1.1    pooka }
   3386   1.1    pooka 
   3387   1.4   nonaka static int
   3388  1.71   nonaka iwm_load_cpu_sections_7000(struct iwm_softc *sc, struct iwm_fw_sects *fws,
   3389  1.71   nonaka     int cpu, int *first_ucode_section)
   3390   1.1    pooka {
   3391  1.71   nonaka 	int i, err = 0;
   3392  1.71   nonaka 	uint32_t last_read_idx = 0;
   3393   1.1    pooka 	void *data;
   3394   1.1    pooka 	uint32_t dlen;
   3395   1.1    pooka 	uint32_t offset;
   3396   1.1    pooka 
   3397  1.71   nonaka 	if (cpu == 1) {
   3398  1.71   nonaka 		*first_ucode_section = 0;
   3399  1.71   nonaka 	} else {
   3400  1.71   nonaka 		(*first_ucode_section)++;
   3401  1.71   nonaka 	}
   3402  1.71   nonaka 
   3403  1.71   nonaka 	for (i = *first_ucode_section; i < IWM_UCODE_SECT_MAX; i++) {
   3404  1.71   nonaka 		last_read_idx = i;
   3405   1.1    pooka 		data = fws->fw_sect[i].fws_data;
   3406   1.1    pooka 		dlen = fws->fw_sect[i].fws_len;
   3407   1.1    pooka 		offset = fws->fw_sect[i].fws_devoff;
   3408  1.71   nonaka 
   3409  1.71   nonaka 		/*
   3410  1.71   nonaka 		 * CPU1_CPU2_SEPARATOR_SECTION delimiter - separate between
   3411  1.71   nonaka 		 * CPU1 to CPU2.
   3412  1.71   nonaka 		 * PAGING_SEPARATOR_SECTION delimiter - separate between
   3413  1.71   nonaka 		 * CPU2 non paged to CPU2 paging sec.
   3414  1.71   nonaka 		 */
   3415  1.71   nonaka 		if (!data || offset == IWM_CPU1_CPU2_SEPARATOR_SECTION ||
   3416  1.71   nonaka 		    offset == IWM_PAGING_SEPARATOR_SECTION)
   3417  1.71   nonaka 			break;
   3418  1.71   nonaka 
   3419  1.45   nonaka 		if (dlen > sc->sc_fwdmasegsz) {
   3420  1.45   nonaka 			err = EFBIG;
   3421  1.45   nonaka 		} else
   3422  1.45   nonaka 			err = iwm_firmware_load_sect(sc, offset, data, dlen);
   3423  1.45   nonaka 		if (err) {
   3424  1.71   nonaka 			DPRINTF(("%s: could not load firmware chunk %d "
   3425  1.71   nonaka 			    "(error %d)\n", DEVNAME(sc), i, err));
   3426  1.45   nonaka 			return err;
   3427   1.1    pooka 		}
   3428   1.1    pooka 	}
   3429   1.1    pooka 
   3430  1.71   nonaka 	*first_ucode_section = last_read_idx;
   3431  1.71   nonaka 
   3432  1.71   nonaka 	return 0;
   3433  1.71   nonaka }
   3434  1.71   nonaka 
   3435  1.71   nonaka static int
   3436  1.71   nonaka iwm_load_firmware_7000(struct iwm_softc *sc, enum iwm_ucode_type ucode_type)
   3437  1.71   nonaka {
   3438  1.71   nonaka 	struct iwm_fw_sects *fws;
   3439  1.71   nonaka 	int err = 0;
   3440  1.71   nonaka 	int first_ucode_section;
   3441  1.71   nonaka 
   3442  1.71   nonaka 	fws = &sc->sc_fw.fw_sects[ucode_type];
   3443  1.71   nonaka 
   3444  1.71   nonaka 	DPRINTF(("%s: working with %s CPU\n", DEVNAME(sc),
   3445  1.71   nonaka 	    fws->is_dual_cpus ? "dual" : "single"));
   3446  1.71   nonaka 
   3447  1.71   nonaka 	/* load to FW the binary Secured sections of CPU1 */
   3448  1.71   nonaka 	err = iwm_load_cpu_sections_7000(sc, fws, 1, &first_ucode_section);
   3449  1.71   nonaka 	if (err)
   3450  1.71   nonaka 		return err;
   3451  1.71   nonaka 
   3452  1.71   nonaka 	if (fws->is_dual_cpus) {
   3453  1.71   nonaka 		/* set CPU2 header address */
   3454  1.71   nonaka 		if (iwm_nic_lock(sc)) {
   3455  1.71   nonaka 			iwm_write_prph(sc,
   3456  1.71   nonaka 			    IWM_LMPM_SECURE_UCODE_LOAD_CPU2_HDR_ADDR,
   3457  1.71   nonaka 			    IWM_LMPM_SECURE_CPU2_HDR_MEM_SPACE);
   3458  1.71   nonaka 			iwm_nic_unlock(sc);
   3459  1.71   nonaka 		}
   3460  1.71   nonaka 
   3461  1.71   nonaka 		/* load to FW the binary sections of CPU2 */
   3462  1.71   nonaka 		err = iwm_load_cpu_sections_7000(sc, fws, 2,
   3463  1.71   nonaka 		    &first_ucode_section);
   3464  1.71   nonaka 		if (err)
   3465  1.71   nonaka 			return err;
   3466  1.71   nonaka 	}
   3467  1.71   nonaka 
   3468  1.71   nonaka 	/* release CPU reset */
   3469   1.1    pooka 	IWM_WRITE(sc, IWM_CSR_RESET, 0);
   3470   1.1    pooka 
   3471  1.45   nonaka 	return 0;
   3472   1.1    pooka }
   3473   1.1    pooka 
   3474   1.4   nonaka static int
   3475  1.45   nonaka iwm_load_cpu_sections_8000(struct iwm_softc *sc, struct iwm_fw_sects *fws,
   3476  1.45   nonaka     int cpu, int *first_ucode_section)
   3477   1.1    pooka {
   3478  1.45   nonaka 	int shift_param;
   3479  1.45   nonaka 	int i, err = 0, sec_num = 0x1;
   3480  1.45   nonaka 	uint32_t val, last_read_idx = 0;
   3481  1.45   nonaka 	void *data;
   3482  1.45   nonaka 	uint32_t dlen;
   3483  1.45   nonaka 	uint32_t offset;
   3484   1.1    pooka 
   3485  1.45   nonaka 	if (cpu == 1) {
   3486  1.45   nonaka 		shift_param = 0;
   3487  1.45   nonaka 		*first_ucode_section = 0;
   3488  1.45   nonaka 	} else {
   3489  1.45   nonaka 		shift_param = 16;
   3490  1.45   nonaka 		(*first_ucode_section)++;
   3491  1.45   nonaka 	}
   3492   1.1    pooka 
   3493  1.45   nonaka 	for (i = *first_ucode_section; i < IWM_UCODE_SECT_MAX; i++) {
   3494  1.45   nonaka 		last_read_idx = i;
   3495  1.45   nonaka 		data = fws->fw_sect[i].fws_data;
   3496  1.45   nonaka 		dlen = fws->fw_sect[i].fws_len;
   3497  1.45   nonaka 		offset = fws->fw_sect[i].fws_devoff;
   3498   1.1    pooka 
   3499  1.45   nonaka 		/*
   3500  1.45   nonaka 		 * CPU1_CPU2_SEPARATOR_SECTION delimiter - separate between
   3501  1.45   nonaka 		 * CPU1 to CPU2.
   3502  1.45   nonaka 		 * PAGING_SEPARATOR_SECTION delimiter - separate between
   3503  1.45   nonaka 		 * CPU2 non paged to CPU2 paging sec.
   3504  1.45   nonaka 		 */
   3505  1.45   nonaka 		if (!data || offset == IWM_CPU1_CPU2_SEPARATOR_SECTION ||
   3506  1.45   nonaka 		    offset == IWM_PAGING_SEPARATOR_SECTION)
   3507  1.45   nonaka 			break;
   3508   1.1    pooka 
   3509  1.45   nonaka 		if (dlen > sc->sc_fwdmasegsz) {
   3510  1.45   nonaka 			err = EFBIG;
   3511  1.45   nonaka 		} else
   3512  1.45   nonaka 			err = iwm_firmware_load_sect(sc, offset, data, dlen);
   3513  1.45   nonaka 		if (err) {
   3514  1.61   nonaka 			DPRINTF(("%s: could not load firmware chunk %d "
   3515  1.61   nonaka 			    "(error %d)\n", DEVNAME(sc), i, err));
   3516  1.45   nonaka 			return err;
   3517  1.45   nonaka 		}
   3518   1.1    pooka 
   3519  1.45   nonaka 		/* Notify the ucode of the loaded section number and status */
   3520  1.45   nonaka 		if (iwm_nic_lock(sc)) {
   3521  1.45   nonaka 			val = IWM_READ(sc, IWM_FH_UCODE_LOAD_STATUS);
   3522  1.45   nonaka 			val = val | (sec_num << shift_param);
   3523  1.45   nonaka 			IWM_WRITE(sc, IWM_FH_UCODE_LOAD_STATUS, val);
   3524  1.45   nonaka 			sec_num = (sec_num << 1) | 0x1;
   3525  1.45   nonaka 			iwm_nic_unlock(sc);
   3526   1.1    pooka 
   3527  1.45   nonaka 			/*
   3528  1.45   nonaka 			 * The firmware won't load correctly without this delay.
   3529  1.45   nonaka 			 */
   3530  1.45   nonaka 			DELAY(8000);
   3531  1.45   nonaka 		}
   3532  1.45   nonaka 	}
   3533  1.45   nonaka 
   3534  1.45   nonaka 	*first_ucode_section = last_read_idx;
   3535  1.45   nonaka 
   3536  1.45   nonaka 	if (iwm_nic_lock(sc)) {
   3537  1.45   nonaka 		if (cpu == 1)
   3538  1.45   nonaka 			IWM_WRITE(sc, IWM_FH_UCODE_LOAD_STATUS, 0xFFFF);
   3539  1.45   nonaka 		else
   3540  1.45   nonaka 			IWM_WRITE(sc, IWM_FH_UCODE_LOAD_STATUS, 0xFFFFFFFF);
   3541  1.45   nonaka 		iwm_nic_unlock(sc);
   3542   1.6   nonaka 	}
   3543  1.45   nonaka 
   3544  1.45   nonaka 	return 0;
   3545  1.45   nonaka }
   3546  1.45   nonaka 
   3547  1.45   nonaka static int
   3548  1.45   nonaka iwm_load_firmware_8000(struct iwm_softc *sc, enum iwm_ucode_type ucode_type)
   3549  1.45   nonaka {
   3550  1.45   nonaka 	struct iwm_fw_sects *fws;
   3551  1.45   nonaka 	int err = 0;
   3552  1.45   nonaka 	int first_ucode_section;
   3553  1.45   nonaka 
   3554  1.45   nonaka 	fws = &sc->sc_fw.fw_sects[ucode_type];
   3555  1.45   nonaka 
   3556  1.45   nonaka 	/* configure the ucode to be ready to get the secured image */
   3557  1.45   nonaka 	/* release CPU reset */
   3558  1.61   nonaka 	if (iwm_nic_lock(sc)) {
   3559  1.61   nonaka 		iwm_write_prph(sc, IWM_RELEASE_CPU_RESET,
   3560  1.61   nonaka 		    IWM_RELEASE_CPU_RESET_BIT);
   3561  1.61   nonaka 		iwm_nic_unlock(sc);
   3562  1.61   nonaka 	}
   3563  1.45   nonaka 
   3564  1.45   nonaka 	/* load to FW the binary Secured sections of CPU1 */
   3565  1.45   nonaka 	err = iwm_load_cpu_sections_8000(sc, fws, 1, &first_ucode_section);
   3566  1.45   nonaka 	if (err)
   3567  1.45   nonaka 		return err;
   3568  1.45   nonaka 
   3569  1.45   nonaka 	/* load to FW the binary sections of CPU2 */
   3570  1.45   nonaka 	return iwm_load_cpu_sections_8000(sc, fws, 2, &first_ucode_section);
   3571  1.45   nonaka }
   3572  1.45   nonaka 
   3573  1.45   nonaka static int
   3574  1.45   nonaka iwm_load_firmware(struct iwm_softc *sc, enum iwm_ucode_type ucode_type)
   3575  1.45   nonaka {
   3576  1.45   nonaka 	int err, w;
   3577  1.45   nonaka 
   3578  1.45   nonaka 	sc->sc_uc.uc_intr = 0;
   3579  1.45   nonaka 
   3580  1.45   nonaka 	if (sc->sc_device_family == IWM_DEVICE_FAMILY_8000)
   3581  1.45   nonaka 		err = iwm_load_firmware_8000(sc, ucode_type);
   3582  1.45   nonaka 	else
   3583  1.45   nonaka 		err = iwm_load_firmware_7000(sc, ucode_type);
   3584  1.45   nonaka 	if (err)
   3585  1.45   nonaka 		return err;
   3586  1.45   nonaka 
   3587  1.45   nonaka 	/* wait for the firmware to load */
   3588  1.45   nonaka 	for (w = 0; !sc->sc_uc.uc_intr && w < 10; w++)
   3589  1.45   nonaka 		err = tsleep(&sc->sc_uc, 0, "iwmuc", mstohz(100));
   3590  1.61   nonaka 	if (err || !sc->sc_uc.uc_ok) {
   3591  1.61   nonaka 		aprint_error_dev(sc->sc_dev,
   3592  1.61   nonaka 		    "could not load firmware (error %d, ok %d)\n",
   3593  1.61   nonaka 		    err, sc->sc_uc.uc_ok);
   3594  1.61   nonaka 		if (sc->sc_device_family == IWM_DEVICE_FAMILY_8000) {
   3595  1.61   nonaka 			aprint_error_dev(sc->sc_dev, "cpu1 status: 0x%x\n",
   3596  1.61   nonaka 			    iwm_read_prph(sc, IWM_SB_CPU_1_STATUS));
   3597  1.61   nonaka 			aprint_error_dev(sc->sc_dev, "cpu2 status: 0x%x\n",
   3598  1.61   nonaka 			    iwm_read_prph(sc, IWM_SB_CPU_2_STATUS));
   3599  1.61   nonaka 		}
   3600  1.61   nonaka 	}
   3601  1.45   nonaka 
   3602  1.45   nonaka 	return err;
   3603   1.1    pooka }
   3604   1.1    pooka 
   3605   1.4   nonaka static int
   3606  1.45   nonaka iwm_start_fw(struct iwm_softc *sc, enum iwm_ucode_type ucode_type)
   3607   1.1    pooka {
   3608  1.45   nonaka 	int err;
   3609  1.45   nonaka 
   3610  1.45   nonaka 	IWM_WRITE(sc, IWM_CSR_INT, ~0);
   3611  1.45   nonaka 
   3612  1.45   nonaka 	err = iwm_nic_init(sc);
   3613  1.45   nonaka 	if (err) {
   3614  1.45   nonaka 		aprint_error_dev(sc->sc_dev, "Unable to init nic\n");
   3615  1.45   nonaka 		return err;
   3616  1.45   nonaka 	}
   3617  1.45   nonaka 
   3618  1.45   nonaka 	/* make sure rfkill handshake bits are cleared */
   3619  1.45   nonaka 	IWM_WRITE(sc, IWM_CSR_UCODE_DRV_GP1_CLR, IWM_CSR_UCODE_SW_BIT_RFKILL);
   3620  1.45   nonaka 	IWM_WRITE(sc, IWM_CSR_UCODE_DRV_GP1_CLR,
   3621  1.45   nonaka 	    IWM_CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
   3622  1.45   nonaka 
   3623  1.45   nonaka 	/* clear (again), then enable host interrupts */
   3624  1.45   nonaka 	IWM_WRITE(sc, IWM_CSR_INT, ~0);
   3625  1.45   nonaka 	iwm_enable_interrupts(sc);
   3626  1.45   nonaka 
   3627  1.45   nonaka 	/* really make sure rfkill handshake bits are cleared */
   3628  1.45   nonaka 	/* maybe we should write a few times more?  just to make sure */
   3629  1.45   nonaka 	IWM_WRITE(sc, IWM_CSR_UCODE_DRV_GP1_CLR, IWM_CSR_UCODE_SW_BIT_RFKILL);
   3630  1.45   nonaka 	IWM_WRITE(sc, IWM_CSR_UCODE_DRV_GP1_CLR, IWM_CSR_UCODE_SW_BIT_RFKILL);
   3631  1.45   nonaka 
   3632  1.45   nonaka 	return iwm_load_firmware(sc, ucode_type);
   3633   1.1    pooka }
   3634   1.1    pooka 
   3635   1.4   nonaka static int
   3636   1.1    pooka iwm_send_tx_ant_cfg(struct iwm_softc *sc, uint8_t valid_tx_ant)
   3637   1.1    pooka {
   3638   1.1    pooka 	struct iwm_tx_ant_cfg_cmd tx_ant_cmd = {
   3639   1.1    pooka 		.valid = htole32(valid_tx_ant),
   3640   1.1    pooka 	};
   3641   1.1    pooka 
   3642  1.45   nonaka 	return iwm_send_cmd_pdu(sc, IWM_TX_ANT_CONFIGURATION_CMD, 0,
   3643  1.45   nonaka 	    sizeof(tx_ant_cmd), &tx_ant_cmd);
   3644   1.1    pooka }
   3645   1.1    pooka 
   3646   1.4   nonaka static int
   3647   1.1    pooka iwm_send_phy_cfg_cmd(struct iwm_softc *sc)
   3648   1.1    pooka {
   3649   1.1    pooka 	struct iwm_phy_cfg_cmd phy_cfg_cmd;
   3650   1.1    pooka 	enum iwm_ucode_type ucode_type = sc->sc_uc_current;
   3651   1.1    pooka 
   3652   1.1    pooka 	phy_cfg_cmd.phy_cfg = htole32(sc->sc_fw_phy_config);
   3653   1.1    pooka 	phy_cfg_cmd.calib_control.event_trigger =
   3654   1.1    pooka 	    sc->sc_default_calib[ucode_type].event_trigger;
   3655   1.1    pooka 	phy_cfg_cmd.calib_control.flow_trigger =
   3656   1.1    pooka 	    sc->sc_default_calib[ucode_type].flow_trigger;
   3657   1.1    pooka 
   3658   1.1    pooka 	DPRINTFN(10, ("Sending Phy CFG command: 0x%x\n", phy_cfg_cmd.phy_cfg));
   3659  1.45   nonaka 	return iwm_send_cmd_pdu(sc, IWM_PHY_CONFIGURATION_CMD, 0,
   3660   1.1    pooka 	    sizeof(phy_cfg_cmd), &phy_cfg_cmd);
   3661   1.1    pooka }
   3662   1.1    pooka 
   3663   1.4   nonaka static int
   3664  1.51   nonaka iwm_load_ucode_wait_alive(struct iwm_softc *sc, enum iwm_ucode_type ucode_type)
   3665   1.1    pooka {
   3666  1.71   nonaka 	struct iwm_fw_sects *fws;
   3667   1.1    pooka 	enum iwm_ucode_type old_type = sc->sc_uc_current;
   3668  1.45   nonaka 	int err;
   3669   1.1    pooka 
   3670  1.61   nonaka 	err = iwm_read_firmware(sc, ucode_type);
   3671  1.45   nonaka 	if (err)
   3672  1.45   nonaka 		return err;
   3673   1.1    pooka 
   3674   1.1    pooka 	sc->sc_uc_current = ucode_type;
   3675  1.45   nonaka 	err = iwm_start_fw(sc, ucode_type);
   3676  1.45   nonaka 	if (err) {
   3677   1.1    pooka 		sc->sc_uc_current = old_type;
   3678  1.45   nonaka 		return err;
   3679   1.1    pooka 	}
   3680   1.1    pooka 
   3681  1.71   nonaka 	err = iwm_post_alive(sc);
   3682  1.71   nonaka 	if (err)
   3683  1.71   nonaka 		return err;
   3684  1.71   nonaka 
   3685  1.71   nonaka 	fws = &sc->sc_fw.fw_sects[ucode_type];
   3686  1.71   nonaka 	if (fws->paging_mem_size) {
   3687  1.71   nonaka 		err = iwm_save_fw_paging(sc, fws);
   3688  1.71   nonaka 		if (err)
   3689  1.71   nonaka 			return err;
   3690  1.71   nonaka 
   3691  1.71   nonaka 		err = iwm_send_paging_cmd(sc, fws);
   3692  1.71   nonaka 		if (err) {
   3693  1.71   nonaka 			iwm_free_fw_paging(sc);
   3694  1.71   nonaka 			return err;
   3695  1.71   nonaka 		}
   3696  1.71   nonaka 	}
   3697  1.71   nonaka 
   3698  1.71   nonaka 	return 0;
   3699   1.1    pooka }
   3700   1.1    pooka 
   3701   1.4   nonaka static int
   3702   1.1    pooka iwm_run_init_mvm_ucode(struct iwm_softc *sc, int justnvm)
   3703   1.1    pooka {
   3704  1.45   nonaka 	int err;
   3705   1.1    pooka 
   3706   1.1    pooka 	if ((sc->sc_flags & IWM_FLAG_RFKILL) && !justnvm) {
   3707   1.3   nonaka 		aprint_error_dev(sc->sc_dev,
   3708   1.3   nonaka 		    "radio is disabled by hardware switch\n");
   3709   1.1    pooka 		return EPERM;
   3710   1.1    pooka 	}
   3711   1.1    pooka 
   3712   1.1    pooka 	sc->sc_init_complete = 0;
   3713  1.45   nonaka 	err = iwm_load_ucode_wait_alive(sc, IWM_UCODE_TYPE_INIT);
   3714  1.45   nonaka 	if (err) {
   3715  1.61   nonaka 		DPRINTF(("%s: failed to load init firmware\n", DEVNAME(sc)));
   3716  1.45   nonaka 		return err;
   3717  1.45   nonaka 	}
   3718   1.1    pooka 
   3719   1.1    pooka 	if (justnvm) {
   3720  1.45   nonaka 		err = iwm_nvm_init(sc);
   3721  1.45   nonaka 		if (err) {
   3722   1.3   nonaka 			aprint_error_dev(sc->sc_dev, "failed to read nvm\n");
   3723  1.45   nonaka 			return err;
   3724   1.1    pooka 		}
   3725   1.1    pooka 
   3726  1.45   nonaka 		memcpy(&sc->sc_ic.ic_myaddr, &sc->sc_nvm.hw_addr,
   3727  1.45   nonaka 		    ETHER_ADDR_LEN);
   3728   1.1    pooka 		return 0;
   3729   1.1    pooka 	}
   3730   1.1    pooka 
   3731  1.45   nonaka 	err = iwm_send_bt_init_conf(sc);
   3732  1.45   nonaka 	if (err)
   3733  1.45   nonaka 		return err;
   3734  1.45   nonaka 
   3735  1.45   nonaka 	err = iwm_sf_config(sc, IWM_SF_INIT_OFF);
   3736  1.45   nonaka 	if (err)
   3737  1.45   nonaka 		return err;
   3738  1.45   nonaka 
   3739  1.45   nonaka 	err = iwm_send_tx_ant_cfg(sc, iwm_fw_valid_tx_ant(sc));
   3740  1.45   nonaka 	if (err)
   3741  1.45   nonaka 		return err;
   3742   1.1    pooka 
   3743   1.1    pooka 	/*
   3744  1.45   nonaka 	 * Send phy configurations command to init uCode
   3745  1.45   nonaka 	 * to start the 16.0 uCode init image internal calibrations.
   3746  1.45   nonaka 	 */
   3747  1.45   nonaka 	err = iwm_send_phy_cfg_cmd(sc);
   3748  1.45   nonaka 	if (err)
   3749  1.45   nonaka 		return err;
   3750   1.1    pooka 
   3751   1.1    pooka 	/*
   3752   1.1    pooka 	 * Nothing to do but wait for the init complete notification
   3753   1.1    pooka 	 * from the firmware
   3754   1.1    pooka 	 */
   3755  1.45   nonaka 	while (!sc->sc_init_complete) {
   3756  1.45   nonaka 		err = tsleep(&sc->sc_init_complete, 0, "iwminit", mstohz(2000));
   3757  1.45   nonaka 		if (err)
   3758   1.1    pooka 			break;
   3759  1.45   nonaka 	}
   3760   1.1    pooka 
   3761  1.45   nonaka 	return err;
   3762   1.1    pooka }
   3763   1.1    pooka 
   3764   1.4   nonaka static int
   3765   1.1    pooka iwm_rx_addbuf(struct iwm_softc *sc, int size, int idx)
   3766   1.1    pooka {
   3767   1.1    pooka 	struct iwm_rx_ring *ring = &sc->rxq;
   3768   1.1    pooka 	struct iwm_rx_data *data = &ring->data[idx];
   3769   1.1    pooka 	struct mbuf *m;
   3770  1.45   nonaka 	int err;
   3771   1.1    pooka 	int fatal = 0;
   3772   1.1    pooka 
   3773   1.1    pooka 	m = m_gethdr(M_DONTWAIT, MT_DATA);
   3774   1.1    pooka 	if (m == NULL)
   3775   1.1    pooka 		return ENOBUFS;
   3776   1.1    pooka 
   3777   1.1    pooka 	if (size <= MCLBYTES) {
   3778   1.1    pooka 		MCLGET(m, M_DONTWAIT);
   3779   1.1    pooka 	} else {
   3780   1.1    pooka 		MEXTMALLOC(m, IWM_RBUF_SIZE, M_DONTWAIT);
   3781   1.1    pooka 	}
   3782   1.1    pooka 	if ((m->m_flags & M_EXT) == 0) {
   3783   1.1    pooka 		m_freem(m);
   3784   1.1    pooka 		return ENOBUFS;
   3785   1.1    pooka 	}
   3786   1.1    pooka 
   3787   1.1    pooka 	if (data->m != NULL) {
   3788   1.1    pooka 		bus_dmamap_unload(sc->sc_dmat, data->map);
   3789   1.1    pooka 		fatal = 1;
   3790   1.1    pooka 	}
   3791   1.1    pooka 
   3792   1.1    pooka 	m->m_len = m->m_pkthdr.len = m->m_ext.ext_size;
   3793  1.45   nonaka 	err = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m,
   3794  1.45   nonaka 	    BUS_DMA_READ|BUS_DMA_NOWAIT);
   3795  1.45   nonaka 	if (err) {
   3796   1.1    pooka 		/* XXX */
   3797   1.1    pooka 		if (fatal)
   3798   1.1    pooka 			panic("iwm: could not load RX mbuf");
   3799   1.1    pooka 		m_freem(m);
   3800  1.45   nonaka 		return err;
   3801   1.1    pooka 	}
   3802   1.1    pooka 	data->m = m;
   3803   1.1    pooka 	bus_dmamap_sync(sc->sc_dmat, data->map, 0, size, BUS_DMASYNC_PREREAD);
   3804   1.1    pooka 
   3805   1.8   nonaka 	/* Update RX descriptor. */
   3806   1.1    pooka 	ring->desc[idx] = htole32(data->map->dm_segs[0].ds_addr >> 8);
   3807   1.1    pooka 	bus_dmamap_sync(sc->sc_dmat, ring->desc_dma.map,
   3808   1.1    pooka 	    idx * sizeof(uint32_t), sizeof(uint32_t), BUS_DMASYNC_PREWRITE);
   3809   1.1    pooka 
   3810   1.1    pooka 	return 0;
   3811   1.1    pooka }
   3812   1.1    pooka 
   3813   1.1    pooka #define IWM_RSSI_OFFSET 50
   3814   1.4   nonaka static int
   3815  1.45   nonaka iwm_calc_rssi(struct iwm_softc *sc, struct iwm_rx_phy_info *phy_info)
   3816   1.1    pooka {
   3817   1.1    pooka 	int rssi_a, rssi_b, rssi_a_dbm, rssi_b_dbm, max_rssi_dbm;
   3818   1.1    pooka 	uint32_t agc_a, agc_b;
   3819   1.1    pooka 	uint32_t val;
   3820   1.1    pooka 
   3821   1.1    pooka 	val = le32toh(phy_info->non_cfg_phy[IWM_RX_INFO_AGC_IDX]);
   3822   1.1    pooka 	agc_a = (val & IWM_OFDM_AGC_A_MSK) >> IWM_OFDM_AGC_A_POS;
   3823   1.1    pooka 	agc_b = (val & IWM_OFDM_AGC_B_MSK) >> IWM_OFDM_AGC_B_POS;
   3824   1.1    pooka 
   3825   1.1    pooka 	val = le32toh(phy_info->non_cfg_phy[IWM_RX_INFO_RSSI_AB_IDX]);
   3826   1.1    pooka 	rssi_a = (val & IWM_OFDM_RSSI_INBAND_A_MSK) >> IWM_OFDM_RSSI_A_POS;
   3827   1.1    pooka 	rssi_b = (val & IWM_OFDM_RSSI_INBAND_B_MSK) >> IWM_OFDM_RSSI_B_POS;
   3828   1.1    pooka 
   3829   1.1    pooka 	/*
   3830   1.1    pooka 	 * dBm = rssi dB - agc dB - constant.
   3831   1.1    pooka 	 * Higher AGC (higher radio gain) means lower signal.
   3832   1.1    pooka 	 */
   3833   1.1    pooka 	rssi_a_dbm = rssi_a - IWM_RSSI_OFFSET - agc_a;
   3834   1.1    pooka 	rssi_b_dbm = rssi_b - IWM_RSSI_OFFSET - agc_b;
   3835   1.1    pooka 	max_rssi_dbm = MAX(rssi_a_dbm, rssi_b_dbm);
   3836   1.1    pooka 
   3837   1.1    pooka 	DPRINTF(("Rssi In A %d B %d Max %d AGCA %d AGCB %d\n",
   3838   1.1    pooka 	    rssi_a_dbm, rssi_b_dbm, max_rssi_dbm, agc_a, agc_b));
   3839   1.1    pooka 
   3840   1.1    pooka 	return max_rssi_dbm;
   3841   1.1    pooka }
   3842   1.1    pooka 
   3843   1.1    pooka /*
   3844  1.45   nonaka  * RSSI values are reported by the FW as positive values - need to negate
   3845   1.1    pooka  * to obtain their dBM.  Account for missing antennas by replacing 0
   3846   1.1    pooka  * values by -256dBm: practically 0 power and a non-feasible 8 bit value.
   3847   1.1    pooka  */
   3848   1.4   nonaka static int
   3849  1.51   nonaka iwm_get_signal_strength(struct iwm_softc *sc, struct iwm_rx_phy_info *phy_info)
   3850   1.1    pooka {
   3851   1.1    pooka 	int energy_a, energy_b, energy_c, max_energy;
   3852   1.1    pooka 	uint32_t val;
   3853   1.1    pooka 
   3854   1.1    pooka 	val = le32toh(phy_info->non_cfg_phy[IWM_RX_INFO_ENERGY_ANT_ABC_IDX]);
   3855   1.1    pooka 	energy_a = (val & IWM_RX_INFO_ENERGY_ANT_A_MSK) >>
   3856   1.1    pooka 	    IWM_RX_INFO_ENERGY_ANT_A_POS;
   3857   1.1    pooka 	energy_a = energy_a ? -energy_a : -256;
   3858   1.1    pooka 	energy_b = (val & IWM_RX_INFO_ENERGY_ANT_B_MSK) >>
   3859   1.1    pooka 	    IWM_RX_INFO_ENERGY_ANT_B_POS;
   3860   1.1    pooka 	energy_b = energy_b ? -energy_b : -256;
   3861   1.1    pooka 	energy_c = (val & IWM_RX_INFO_ENERGY_ANT_C_MSK) >>
   3862   1.1    pooka 	    IWM_RX_INFO_ENERGY_ANT_C_POS;
   3863   1.1    pooka 	energy_c = energy_c ? -energy_c : -256;
   3864   1.1    pooka 	max_energy = MAX(energy_a, energy_b);
   3865   1.1    pooka 	max_energy = MAX(max_energy, energy_c);
   3866   1.1    pooka 
   3867   1.5   nonaka 	DPRINTFN(12, ("energy In A %d B %d C %d, and max %d\n",
   3868   1.1    pooka 	    energy_a, energy_b, energy_c, max_energy));
   3869   1.1    pooka 
   3870   1.1    pooka 	return max_energy;
   3871   1.1    pooka }
   3872   1.1    pooka 
   3873   1.4   nonaka static void
   3874  1.45   nonaka iwm_rx_rx_phy_cmd(struct iwm_softc *sc, struct iwm_rx_packet *pkt,
   3875  1.45   nonaka     struct iwm_rx_data *data)
   3876   1.1    pooka {
   3877   1.1    pooka 	struct iwm_rx_phy_info *phy_info = (void *)pkt->data;
   3878   1.1    pooka 
   3879   1.1    pooka 	DPRINTFN(20, ("received PHY stats\n"));
   3880   1.1    pooka 	bus_dmamap_sync(sc->sc_dmat, data->map, sizeof(*pkt),
   3881   1.1    pooka 	    sizeof(*phy_info), BUS_DMASYNC_POSTREAD);
   3882   1.1    pooka 
   3883   1.1    pooka 	memcpy(&sc->sc_last_phy_info, phy_info, sizeof(sc->sc_last_phy_info));
   3884   1.1    pooka }
   3885   1.1    pooka 
   3886   1.1    pooka /*
   3887   1.1    pooka  * Retrieve the average noise (in dBm) among receivers.
   3888   1.1    pooka  */
   3889   1.4   nonaka static int
   3890  1.45   nonaka iwm_get_noise(const struct iwm_statistics_rx_non_phy *stats)
   3891   1.1    pooka {
   3892   1.1    pooka 	int i, total, nbant, noise;
   3893   1.1    pooka 
   3894   1.1    pooka 	total = nbant = noise = 0;
   3895   1.1    pooka 	for (i = 0; i < 3; i++) {
   3896   1.1    pooka 		noise = le32toh(stats->beacon_silence_rssi[i]) & 0xff;
   3897   1.1    pooka 		if (noise) {
   3898   1.1    pooka 			total += noise;
   3899   1.1    pooka 			nbant++;
   3900   1.1    pooka 		}
   3901   1.1    pooka 	}
   3902   1.1    pooka 
   3903   1.1    pooka 	/* There should be at least one antenna but check anyway. */
   3904   1.1    pooka 	return (nbant == 0) ? -127 : (total / nbant) - 107;
   3905   1.1    pooka }
   3906   1.1    pooka 
   3907   1.4   nonaka static void
   3908  1.45   nonaka iwm_rx_rx_mpdu(struct iwm_softc *sc, struct iwm_rx_packet *pkt,
   3909  1.45   nonaka     struct iwm_rx_data *data)
   3910   1.1    pooka {
   3911   1.1    pooka 	struct ieee80211com *ic = &sc->sc_ic;
   3912   1.1    pooka 	struct ieee80211_frame *wh;
   3913   1.1    pooka 	struct ieee80211_node *ni;
   3914   1.1    pooka 	struct ieee80211_channel *c = NULL;
   3915   1.1    pooka 	struct mbuf *m;
   3916   1.1    pooka 	struct iwm_rx_phy_info *phy_info;
   3917   1.1    pooka 	struct iwm_rx_mpdu_res_start *rx_res;
   3918   1.1    pooka 	int device_timestamp;
   3919   1.1    pooka 	uint32_t len;
   3920   1.1    pooka 	uint32_t rx_pkt_status;
   3921   1.1    pooka 	int rssi;
   3922  1.50   nonaka 	int s;
   3923   1.1    pooka 
   3924   1.1    pooka 	bus_dmamap_sync(sc->sc_dmat, data->map, 0, IWM_RBUF_SIZE,
   3925   1.1    pooka 	    BUS_DMASYNC_POSTREAD);
   3926   1.1    pooka 
   3927   1.1    pooka 	phy_info = &sc->sc_last_phy_info;
   3928   1.1    pooka 	rx_res = (struct iwm_rx_mpdu_res_start *)pkt->data;
   3929   1.1    pooka 	wh = (struct ieee80211_frame *)(pkt->data + sizeof(*rx_res));
   3930   1.1    pooka 	len = le16toh(rx_res->byte_count);
   3931  1.45   nonaka 	rx_pkt_status = le32toh(*(uint32_t *)(pkt->data +
   3932  1.45   nonaka 	    sizeof(*rx_res) + len));
   3933   1.1    pooka 
   3934   1.1    pooka 	m = data->m;
   3935   1.1    pooka 	m->m_data = pkt->data + sizeof(*rx_res);
   3936   1.1    pooka 	m->m_pkthdr.len = m->m_len = len;
   3937   1.1    pooka 
   3938   1.1    pooka 	if (__predict_false(phy_info->cfg_phy_cnt > 20)) {
   3939   1.1    pooka 		DPRINTF(("dsp size out of range [0,20]: %d\n",
   3940   1.1    pooka 		    phy_info->cfg_phy_cnt));
   3941   1.1    pooka 		return;
   3942   1.1    pooka 	}
   3943   1.1    pooka 
   3944   1.1    pooka 	if (!(rx_pkt_status & IWM_RX_MPDU_RES_STATUS_CRC_OK) ||
   3945   1.1    pooka 	    !(rx_pkt_status & IWM_RX_MPDU_RES_STATUS_OVERRUN_OK)) {
   3946   1.1    pooka 		DPRINTF(("Bad CRC or FIFO: 0x%08X.\n", rx_pkt_status));
   3947   1.1    pooka 		return; /* drop */
   3948   1.1    pooka 	}
   3949   1.1    pooka 
   3950   1.1    pooka 	device_timestamp = le32toh(phy_info->system_timestamp);
   3951   1.1    pooka 
   3952   1.1    pooka 	if (sc->sc_capaflags & IWM_UCODE_TLV_FLAGS_RX_ENERGY_API) {
   3953  1.45   nonaka 		rssi = iwm_get_signal_strength(sc, phy_info);
   3954   1.1    pooka 	} else {
   3955  1.45   nonaka 		rssi = iwm_calc_rssi(sc, phy_info);
   3956   1.1    pooka 	}
   3957   1.1    pooka 	rssi = -rssi;
   3958   1.1    pooka 
   3959   1.1    pooka 	if (ic->ic_state == IEEE80211_S_SCAN)
   3960  1.45   nonaka 		iwm_fix_channel(sc, m);
   3961   1.1    pooka 
   3962   1.1    pooka 	if (iwm_rx_addbuf(sc, IWM_RBUF_SIZE, sc->rxq.cur) != 0)
   3963   1.1    pooka 		return;
   3964   1.1    pooka 
   3965  1.42    ozaki 	m_set_rcvif(m, IC2IFP(ic));
   3966   1.1    pooka 
   3967  1.45   nonaka 	if (le32toh(phy_info->channel) < __arraycount(ic->ic_channels))
   3968  1.45   nonaka 		c = &ic->ic_channels[le32toh(phy_info->channel)];
   3969   1.1    pooka 
   3970  1.50   nonaka 	s = splnet();
   3971  1.50   nonaka 
   3972   1.1    pooka 	ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh);
   3973   1.1    pooka 	if (c)
   3974   1.1    pooka 		ni->ni_chan = c;
   3975   1.1    pooka 
   3976  1.48   nonaka 	if (__predict_false(sc->sc_drvbpf != NULL)) {
   3977   1.1    pooka 		struct iwm_rx_radiotap_header *tap = &sc->sc_rxtap;
   3978   1.1    pooka 
   3979   1.1    pooka 		tap->wr_flags = 0;
   3980   1.1    pooka 		if (phy_info->phy_flags & htole16(IWM_PHY_INFO_FLAG_SHPREAMBLE))
   3981   1.1    pooka 			tap->wr_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
   3982   1.1    pooka 		tap->wr_chan_freq =
   3983   1.1    pooka 		    htole16(ic->ic_channels[phy_info->channel].ic_freq);
   3984   1.1    pooka 		tap->wr_chan_flags =
   3985   1.1    pooka 		    htole16(ic->ic_channels[phy_info->channel].ic_flags);
   3986   1.1    pooka 		tap->wr_dbm_antsignal = (int8_t)rssi;
   3987   1.1    pooka 		tap->wr_dbm_antnoise = (int8_t)sc->sc_noise;
   3988   1.1    pooka 		tap->wr_tsft = phy_info->system_timestamp;
   3989  1.45   nonaka 		if (phy_info->phy_flags &
   3990  1.45   nonaka 		    htole16(IWM_RX_RES_PHY_FLAGS_OFDM_HT)) {
   3991  1.45   nonaka 			uint8_t mcs = (phy_info->rate_n_flags &
   3992  1.61   nonaka 			    htole32(IWM_RATE_HT_MCS_RATE_CODE_MSK |
   3993  1.61   nonaka 			      IWM_RATE_HT_MCS_NSS_MSK));
   3994  1.45   nonaka 			tap->wr_rate = (0x80 | mcs);
   3995  1.45   nonaka 		} else {
   3996  1.45   nonaka 			uint8_t rate = (phy_info->rate_n_flags &
   3997  1.45   nonaka 			    htole32(IWM_RATE_LEGACY_RATE_MSK));
   3998  1.45   nonaka 			switch (rate) {
   3999  1.45   nonaka 			/* CCK rates. */
   4000  1.45   nonaka 			case  10: tap->wr_rate =   2; break;
   4001  1.45   nonaka 			case  20: tap->wr_rate =   4; break;
   4002  1.45   nonaka 			case  55: tap->wr_rate =  11; break;
   4003  1.45   nonaka 			case 110: tap->wr_rate =  22; break;
   4004  1.45   nonaka 			/* OFDM rates. */
   4005  1.45   nonaka 			case 0xd: tap->wr_rate =  12; break;
   4006  1.45   nonaka 			case 0xf: tap->wr_rate =  18; break;
   4007  1.45   nonaka 			case 0x5: tap->wr_rate =  24; break;
   4008  1.45   nonaka 			case 0x7: tap->wr_rate =  36; break;
   4009  1.45   nonaka 			case 0x9: tap->wr_rate =  48; break;
   4010  1.45   nonaka 			case 0xb: tap->wr_rate =  72; break;
   4011  1.45   nonaka 			case 0x1: tap->wr_rate =  96; break;
   4012  1.45   nonaka 			case 0x3: tap->wr_rate = 108; break;
   4013  1.45   nonaka 			/* Unknown rate: should not happen. */
   4014  1.45   nonaka 			default:  tap->wr_rate =   0;
   4015  1.45   nonaka 			}
   4016   1.1    pooka 		}
   4017   1.1    pooka 
   4018   1.1    pooka 		bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m);
   4019   1.1    pooka 	}
   4020   1.1    pooka 	ieee80211_input(ic, m, ni, rssi, device_timestamp);
   4021   1.1    pooka 	ieee80211_free_node(ni);
   4022  1.50   nonaka 
   4023  1.50   nonaka 	splx(s);
   4024   1.1    pooka }
   4025   1.1    pooka 
   4026   1.4   nonaka static void
   4027  1.45   nonaka iwm_rx_tx_cmd_single(struct iwm_softc *sc, struct iwm_rx_packet *pkt,
   4028  1.45   nonaka     struct iwm_node *in)
   4029   1.1    pooka {
   4030   1.1    pooka 	struct ieee80211com *ic = &sc->sc_ic;
   4031   1.1    pooka 	struct ifnet *ifp = IC2IFP(ic);
   4032  1.45   nonaka 	struct iwm_tx_resp *tx_resp = (void *)pkt->data;
   4033   1.1    pooka 	int status = le16toh(tx_resp->status.status) & IWM_TX_STATUS_MSK;
   4034   1.1    pooka 	int failack = tx_resp->failure_frame;
   4035   1.1    pooka 
   4036   1.1    pooka 	KASSERT(tx_resp->frame_count == 1);
   4037   1.1    pooka 
   4038   1.1    pooka 	/* Update rate control statistics. */
   4039   1.1    pooka 	in->in_amn.amn_txcnt++;
   4040   1.1    pooka 	if (failack > 0) {
   4041   1.1    pooka 		in->in_amn.amn_retrycnt++;
   4042   1.1    pooka 	}
   4043   1.1    pooka 
   4044   1.1    pooka 	if (status != IWM_TX_STATUS_SUCCESS &&
   4045   1.1    pooka 	    status != IWM_TX_STATUS_DIRECT_DONE)
   4046   1.1    pooka 		ifp->if_oerrors++;
   4047   1.1    pooka 	else
   4048   1.1    pooka 		ifp->if_opackets++;
   4049   1.1    pooka }
   4050   1.1    pooka 
   4051   1.4   nonaka static void
   4052  1.45   nonaka iwm_rx_tx_cmd(struct iwm_softc *sc, struct iwm_rx_packet *pkt,
   4053  1.45   nonaka     struct iwm_rx_data *data)
   4054   1.1    pooka {
   4055   1.1    pooka 	struct ieee80211com *ic = &sc->sc_ic;
   4056   1.1    pooka 	struct ifnet *ifp = IC2IFP(ic);
   4057   1.1    pooka 	struct iwm_cmd_header *cmd_hdr = &pkt->hdr;
   4058   1.1    pooka 	int idx = cmd_hdr->idx;
   4059   1.1    pooka 	int qid = cmd_hdr->qid;
   4060   1.1    pooka 	struct iwm_tx_ring *ring = &sc->txq[qid];
   4061   1.1    pooka 	struct iwm_tx_data *txd = &ring->data[idx];
   4062   1.1    pooka 	struct iwm_node *in = txd->in;
   4063  1.61   nonaka 	int s;
   4064  1.61   nonaka 
   4065  1.61   nonaka 	s = splnet();
   4066   1.1    pooka 
   4067   1.1    pooka 	if (txd->done) {
   4068   1.2   nonaka 		DPRINTF(("%s: got tx interrupt that's already been handled!\n",
   4069   1.2   nonaka 		    DEVNAME(sc)));
   4070  1.61   nonaka 		splx(s);
   4071   1.1    pooka 		return;
   4072   1.1    pooka 	}
   4073   1.1    pooka 
   4074   1.1    pooka 	bus_dmamap_sync(sc->sc_dmat, data->map, 0, IWM_RBUF_SIZE,
   4075   1.1    pooka 	    BUS_DMASYNC_POSTREAD);
   4076   1.1    pooka 
   4077   1.1    pooka 	sc->sc_tx_timer = 0;
   4078   1.1    pooka 
   4079  1.45   nonaka 	iwm_rx_tx_cmd_single(sc, pkt, in);
   4080   1.1    pooka 
   4081   1.1    pooka 	bus_dmamap_sync(sc->sc_dmat, txd->map, 0, txd->map->dm_mapsize,
   4082   1.1    pooka 	    BUS_DMASYNC_POSTWRITE);
   4083   1.1    pooka 	bus_dmamap_unload(sc->sc_dmat, txd->map);
   4084   1.1    pooka 	m_freem(txd->m);
   4085   1.1    pooka 
   4086   1.1    pooka 	DPRINTFN(8, ("free txd %p, in %p\n", txd, txd->in));
   4087   1.1    pooka 	KASSERT(txd->done == 0);
   4088   1.1    pooka 	txd->done = 1;
   4089   1.1    pooka 	KASSERT(txd->in);
   4090   1.1    pooka 
   4091   1.1    pooka 	txd->m = NULL;
   4092   1.1    pooka 	txd->in = NULL;
   4093   1.1    pooka 	ieee80211_free_node(&in->in_ni);
   4094   1.1    pooka 
   4095   1.1    pooka 	if (--ring->queued < IWM_TX_RING_LOMARK) {
   4096  1.61   nonaka 		sc->qfullmsk &= ~(1 << qid);
   4097   1.1    pooka 		if (sc->qfullmsk == 0 && (ifp->if_flags & IFF_OACTIVE)) {
   4098   1.1    pooka 			ifp->if_flags &= ~IFF_OACTIVE;
   4099  1.65   nonaka 			KASSERT(KERNEL_LOCKED_P());
   4100  1.65   nonaka 			iwm_start(ifp);
   4101   1.1    pooka 		}
   4102   1.1    pooka 	}
   4103  1.61   nonaka 
   4104  1.61   nonaka 	splx(s);
   4105   1.1    pooka }
   4106   1.1    pooka 
   4107   1.4   nonaka static int
   4108  1.45   nonaka iwm_binding_cmd(struct iwm_softc *sc, struct iwm_node *in, uint32_t action)
   4109   1.1    pooka {
   4110   1.1    pooka 	struct iwm_binding_cmd cmd;
   4111  1.45   nonaka 	struct iwm_phy_ctxt *phyctxt = in->in_phyctxt;
   4112  1.45   nonaka 	int i, err;
   4113   1.1    pooka 	uint32_t status;
   4114   1.1    pooka 
   4115   1.1    pooka 	memset(&cmd, 0, sizeof(cmd));
   4116   1.1    pooka 
   4117   1.1    pooka 	cmd.id_and_color
   4118   1.1    pooka 	    = htole32(IWM_FW_CMD_ID_AND_COLOR(phyctxt->id, phyctxt->color));
   4119   1.1    pooka 	cmd.action = htole32(action);
   4120   1.1    pooka 	cmd.phy = htole32(IWM_FW_CMD_ID_AND_COLOR(phyctxt->id, phyctxt->color));
   4121   1.1    pooka 
   4122   1.1    pooka 	cmd.macs[0] = htole32(IWM_FW_CMD_ID_AND_COLOR(in->in_id, in->in_color));
   4123   1.1    pooka 	for (i = 1; i < IWM_MAX_MACS_IN_BINDING; i++)
   4124   1.1    pooka 		cmd.macs[i] = htole32(IWM_FW_CTXT_INVALID);
   4125   1.1    pooka 
   4126   1.1    pooka 	status = 0;
   4127  1.45   nonaka 	err = iwm_send_cmd_pdu_status(sc, IWM_BINDING_CONTEXT_CMD,
   4128   1.1    pooka 	    sizeof(cmd), &cmd, &status);
   4129  1.45   nonaka 	if (err == 0 && status != 0)
   4130  1.45   nonaka 		err = EIO;
   4131   1.1    pooka 
   4132  1.45   nonaka 	return err;
   4133   1.1    pooka }
   4134   1.1    pooka 
   4135   1.4   nonaka static void
   4136  1.45   nonaka iwm_phy_ctxt_cmd_hdr(struct iwm_softc *sc, struct iwm_phy_ctxt *ctxt,
   4137  1.45   nonaka     struct iwm_phy_context_cmd *cmd, uint32_t action, uint32_t apply_time)
   4138   1.1    pooka {
   4139   1.1    pooka 	memset(cmd, 0, sizeof(struct iwm_phy_context_cmd));
   4140   1.1    pooka 
   4141   1.1    pooka 	cmd->id_and_color = htole32(IWM_FW_CMD_ID_AND_COLOR(ctxt->id,
   4142   1.1    pooka 	    ctxt->color));
   4143   1.1    pooka 	cmd->action = htole32(action);
   4144   1.1    pooka 	cmd->apply_time = htole32(apply_time);
   4145   1.1    pooka }
   4146   1.1    pooka 
   4147   1.4   nonaka static void
   4148  1.45   nonaka iwm_phy_ctxt_cmd_data(struct iwm_softc *sc, struct iwm_phy_context_cmd *cmd,
   4149  1.45   nonaka     struct ieee80211_channel *chan, uint8_t chains_static,
   4150  1.45   nonaka     uint8_t chains_dynamic)
   4151   1.1    pooka {
   4152   1.1    pooka 	struct ieee80211com *ic = &sc->sc_ic;
   4153   1.1    pooka 	uint8_t active_cnt, idle_cnt;
   4154   1.1    pooka 
   4155   1.1    pooka 	cmd->ci.band = IEEE80211_IS_CHAN_2GHZ(chan) ?
   4156   1.1    pooka 	    IWM_PHY_BAND_24 : IWM_PHY_BAND_5;
   4157   1.1    pooka 
   4158   1.1    pooka 	cmd->ci.channel = ieee80211_chan2ieee(ic, chan);
   4159   1.1    pooka 	cmd->ci.width = IWM_PHY_VHT_CHANNEL_MODE20;
   4160   1.1    pooka 	cmd->ci.ctrl_pos = IWM_PHY_VHT_CTRL_POS_1_BELOW;
   4161   1.1    pooka 
   4162   1.1    pooka 	/* Set rx the chains */
   4163   1.1    pooka 	idle_cnt = chains_static;
   4164   1.1    pooka 	active_cnt = chains_dynamic;
   4165   1.1    pooka 
   4166  1.45   nonaka 	cmd->rxchain_info = htole32(iwm_fw_valid_rx_ant(sc) <<
   4167  1.45   nonaka 	    IWM_PHY_RX_CHAIN_VALID_POS);
   4168   1.1    pooka 	cmd->rxchain_info |= htole32(idle_cnt << IWM_PHY_RX_CHAIN_CNT_POS);
   4169   1.1    pooka 	cmd->rxchain_info |= htole32(active_cnt <<
   4170   1.1    pooka 	    IWM_PHY_RX_CHAIN_MIMO_CNT_POS);
   4171   1.1    pooka 
   4172  1.45   nonaka 	cmd->txchain_info = htole32(iwm_fw_valid_tx_ant(sc));
   4173   1.1    pooka }
   4174   1.1    pooka 
   4175   1.4   nonaka static int
   4176  1.45   nonaka iwm_phy_ctxt_cmd(struct iwm_softc *sc, struct iwm_phy_ctxt *ctxt,
   4177  1.45   nonaka     uint8_t chains_static, uint8_t chains_dynamic, uint32_t action,
   4178  1.45   nonaka     uint32_t apply_time)
   4179   1.1    pooka {
   4180   1.1    pooka 	struct iwm_phy_context_cmd cmd;
   4181   1.1    pooka 
   4182  1.45   nonaka 	iwm_phy_ctxt_cmd_hdr(sc, ctxt, &cmd, action, apply_time);
   4183   1.1    pooka 
   4184  1.45   nonaka 	iwm_phy_ctxt_cmd_data(sc, &cmd, ctxt->channel,
   4185   1.1    pooka 	    chains_static, chains_dynamic);
   4186   1.1    pooka 
   4187  1.45   nonaka 	return iwm_send_cmd_pdu(sc, IWM_PHY_CONTEXT_CMD, 0,
   4188   1.1    pooka 	    sizeof(struct iwm_phy_context_cmd), &cmd);
   4189   1.1    pooka }
   4190   1.1    pooka 
   4191   1.4   nonaka static int
   4192   1.1    pooka iwm_send_cmd(struct iwm_softc *sc, struct iwm_host_cmd *hcmd)
   4193   1.1    pooka {
   4194  1.45   nonaka 	struct iwm_tx_ring *ring = &sc->txq[IWM_CMD_QUEUE];
   4195   1.1    pooka 	struct iwm_tfd *desc;
   4196  1.45   nonaka 	struct iwm_tx_data *txdata;
   4197   1.1    pooka 	struct iwm_device_cmd *cmd;
   4198   1.1    pooka 	struct mbuf *m;
   4199   1.1    pooka 	bus_addr_t paddr;
   4200   1.1    pooka 	uint32_t addr_lo;
   4201  1.45   nonaka 	int err = 0, i, paylen, off, s;
   4202   1.1    pooka 	int code;
   4203   1.1    pooka 	int async, wantresp;
   4204  1.45   nonaka 	int group_id;
   4205  1.45   nonaka 	size_t hdrlen, datasz;
   4206  1.45   nonaka 	uint8_t *data;
   4207   1.1    pooka 
   4208   1.1    pooka 	code = hcmd->id;
   4209   1.1    pooka 	async = hcmd->flags & IWM_CMD_ASYNC;
   4210   1.1    pooka 	wantresp = hcmd->flags & IWM_CMD_WANT_SKB;
   4211   1.1    pooka 
   4212   1.1    pooka 	for (i = 0, paylen = 0; i < __arraycount(hcmd->len); i++) {
   4213   1.1    pooka 		paylen += hcmd->len[i];
   4214   1.1    pooka 	}
   4215   1.1    pooka 
   4216   1.1    pooka 	/* if the command wants an answer, busy sc_cmd_resp */
   4217   1.1    pooka 	if (wantresp) {
   4218   1.1    pooka 		KASSERT(!async);
   4219  1.45   nonaka 		while (sc->sc_wantresp != IWM_CMD_RESP_IDLE)
   4220   1.1    pooka 			tsleep(&sc->sc_wantresp, 0, "iwmcmdsl", 0);
   4221   1.1    pooka 		sc->sc_wantresp = ring->qid << 16 | ring->cur;
   4222   1.1    pooka 	}
   4223   1.1    pooka 
   4224   1.1    pooka 	/*
   4225   1.1    pooka 	 * Is the hardware still available?  (after e.g. above wait).
   4226   1.1    pooka 	 */
   4227   1.1    pooka 	s = splnet();
   4228   1.1    pooka 	if (sc->sc_flags & IWM_FLAG_STOPPED) {
   4229  1.45   nonaka 		err = ENXIO;
   4230   1.1    pooka 		goto out;
   4231   1.1    pooka 	}
   4232   1.1    pooka 
   4233   1.1    pooka 	desc = &ring->desc[ring->cur];
   4234  1.45   nonaka 	txdata = &ring->data[ring->cur];
   4235  1.45   nonaka 
   4236  1.45   nonaka 	group_id = iwm_cmd_groupid(code);
   4237  1.45   nonaka 	if (group_id != 0) {
   4238  1.45   nonaka 		hdrlen = sizeof(cmd->hdr_wide);
   4239  1.45   nonaka 		datasz = sizeof(cmd->data_wide);
   4240  1.45   nonaka 	} else {
   4241  1.45   nonaka 		hdrlen = sizeof(cmd->hdr);
   4242  1.45   nonaka 		datasz = sizeof(cmd->data);
   4243  1.45   nonaka 	}
   4244   1.1    pooka 
   4245  1.45   nonaka 	if (paylen > datasz) {
   4246  1.45   nonaka 		/* Command is too large to fit in pre-allocated space. */
   4247  1.45   nonaka 		size_t totlen = hdrlen + paylen;
   4248  1.45   nonaka 		if (paylen > IWM_MAX_CMD_PAYLOAD_SIZE) {
   4249  1.45   nonaka 			aprint_error_dev(sc->sc_dev,
   4250  1.45   nonaka 			    "firmware command too long (%zd bytes)\n", totlen);
   4251  1.45   nonaka 			err = EINVAL;
   4252   1.1    pooka 			goto out;
   4253   1.1    pooka 		}
   4254   1.1    pooka 		m = m_gethdr(M_DONTWAIT, MT_DATA);
   4255   1.1    pooka 		if (m == NULL) {
   4256  1.45   nonaka 			err = ENOMEM;
   4257   1.1    pooka 			goto out;
   4258   1.1    pooka 		}
   4259   1.1    pooka 		MEXTMALLOC(m, IWM_RBUF_SIZE, M_DONTWAIT);
   4260   1.1    pooka 		if (!(m->m_flags & M_EXT)) {
   4261  1.45   nonaka 			aprint_error_dev(sc->sc_dev,
   4262  1.45   nonaka 			    "could not get fw cmd mbuf (%zd bytes)\n", totlen);
   4263   1.1    pooka 			m_freem(m);
   4264  1.45   nonaka 			err = ENOMEM;
   4265   1.1    pooka 			goto out;
   4266   1.1    pooka 		}
   4267   1.1    pooka 		cmd = mtod(m, struct iwm_device_cmd *);
   4268  1.45   nonaka 		err = bus_dmamap_load(sc->sc_dmat, txdata->map, cmd,
   4269  1.45   nonaka 		    totlen, NULL, BUS_DMA_NOWAIT | BUS_DMA_WRITE);
   4270  1.45   nonaka 		if (err) {
   4271  1.45   nonaka 			aprint_error_dev(sc->sc_dev,
   4272  1.45   nonaka 			    "could not load fw cmd mbuf (%zd bytes)\n", totlen);
   4273   1.1    pooka 			m_freem(m);
   4274   1.1    pooka 			goto out;
   4275   1.1    pooka 		}
   4276  1.45   nonaka 		txdata->m = m;
   4277  1.45   nonaka 		paddr = txdata->map->dm_segs[0].ds_addr;
   4278   1.1    pooka 	} else {
   4279   1.1    pooka 		cmd = &ring->cmd[ring->cur];
   4280  1.45   nonaka 		paddr = txdata->cmd_paddr;
   4281   1.1    pooka 	}
   4282   1.1    pooka 
   4283  1.45   nonaka 	if (group_id != 0) {
   4284  1.45   nonaka 		cmd->hdr_wide.opcode = iwm_cmd_opcode(code);
   4285  1.45   nonaka 		cmd->hdr_wide.group_id = group_id;
   4286  1.45   nonaka 		cmd->hdr_wide.qid = ring->qid;
   4287  1.45   nonaka 		cmd->hdr_wide.idx = ring->cur;
   4288  1.45   nonaka 		cmd->hdr_wide.length = htole16(paylen);
   4289  1.45   nonaka 		cmd->hdr_wide.version = iwm_cmd_version(code);
   4290  1.45   nonaka 		data = cmd->data_wide;
   4291  1.45   nonaka 	} else {
   4292  1.45   nonaka 		cmd->hdr.code = code;
   4293  1.45   nonaka 		cmd->hdr.flags = 0;
   4294  1.45   nonaka 		cmd->hdr.qid = ring->qid;
   4295  1.45   nonaka 		cmd->hdr.idx = ring->cur;
   4296  1.45   nonaka 		data = cmd->data;
   4297  1.45   nonaka 	}
   4298   1.1    pooka 
   4299   1.1    pooka 	for (i = 0, off = 0; i < __arraycount(hcmd->data); i++) {
   4300   1.1    pooka 		if (hcmd->len[i] == 0)
   4301   1.1    pooka 			continue;
   4302  1.45   nonaka 		memcpy(data + off, hcmd->data[i], hcmd->len[i]);
   4303   1.1    pooka 		off += hcmd->len[i];
   4304   1.1    pooka 	}
   4305   1.1    pooka 	KASSERT(off == paylen);
   4306   1.1    pooka 
   4307   1.1    pooka 	/* lo field is not aligned */
   4308   1.1    pooka 	addr_lo = htole32((uint32_t)paddr);
   4309   1.1    pooka 	memcpy(&desc->tbs[0].lo, &addr_lo, sizeof(uint32_t));
   4310   1.1    pooka 	desc->tbs[0].hi_n_len  = htole16(iwm_get_dma_hi_addr(paddr)
   4311  1.45   nonaka 	    | ((hdrlen + paylen) << 4));
   4312   1.1    pooka 	desc->num_tbs = 1;
   4313   1.1    pooka 
   4314   1.9   nonaka 	DPRINTFN(8, ("iwm_send_cmd 0x%x size=%zu %s\n",
   4315  1.52   nonaka 	    code, hdrlen + paylen, async ? " (async)" : ""));
   4316   1.1    pooka 
   4317  1.45   nonaka 	if (paylen > datasz) {
   4318  1.61   nonaka 		bus_dmamap_sync(sc->sc_dmat, txdata->map, 0, hdrlen + paylen,
   4319  1.61   nonaka 		    BUS_DMASYNC_PREWRITE);
   4320   1.1    pooka 	} else {
   4321   1.1    pooka 		bus_dmamap_sync(sc->sc_dmat, ring->cmd_dma.map,
   4322  1.61   nonaka 		    (uint8_t *)cmd - (uint8_t *)ring->cmd, hdrlen + paylen,
   4323  1.61   nonaka 		    BUS_DMASYNC_PREWRITE);
   4324   1.1    pooka 	}
   4325   1.1    pooka 	bus_dmamap_sync(sc->sc_dmat, ring->desc_dma.map,
   4326  1.61   nonaka 	    (uint8_t *)desc - (uint8_t *)ring->desc, sizeof(*desc),
   4327  1.61   nonaka 	    BUS_DMASYNC_PREWRITE);
   4328   1.1    pooka 
   4329  1.59   nonaka 	err = iwm_set_cmd_in_flight(sc);
   4330  1.59   nonaka 	if (err)
   4331   1.1    pooka 		goto out;
   4332  1.59   nonaka 	ring->queued++;
   4333   1.1    pooka 
   4334   1.1    pooka #if 0
   4335   1.1    pooka 	iwm_update_sched(sc, ring->qid, ring->cur, 0, 0);
   4336   1.1    pooka #endif
   4337   1.1    pooka 	DPRINTF(("sending command 0x%x qid %d, idx %d\n",
   4338   1.1    pooka 	    code, ring->qid, ring->cur));
   4339   1.1    pooka 
   4340   1.1    pooka 	/* Kick command ring. */
   4341   1.1    pooka 	ring->cur = (ring->cur + 1) % IWM_TX_RING_COUNT;
   4342   1.1    pooka 	IWM_WRITE(sc, IWM_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);
   4343   1.1    pooka 
   4344   1.1    pooka 	if (!async) {
   4345   1.1    pooka 		int generation = sc->sc_generation;
   4346  1.67   nonaka 		err = tsleep(desc, PCATCH, "iwmcmd", mstohz(2000));
   4347  1.45   nonaka 		if (err == 0) {
   4348   1.1    pooka 			/* if hardware is no longer up, return error */
   4349   1.1    pooka 			if (generation != sc->sc_generation) {
   4350  1.45   nonaka 				err = ENXIO;
   4351   1.1    pooka 			} else {
   4352   1.1    pooka 				hcmd->resp_pkt = (void *)sc->sc_cmd_resp;
   4353   1.1    pooka 			}
   4354   1.1    pooka 		}
   4355   1.1    pooka 	}
   4356   1.1    pooka  out:
   4357  1.45   nonaka 	if (wantresp && err) {
   4358   1.1    pooka 		iwm_free_resp(sc, hcmd);
   4359   1.1    pooka 	}
   4360   1.1    pooka 	splx(s);
   4361   1.1    pooka 
   4362  1.45   nonaka 	return err;
   4363   1.1    pooka }
   4364   1.1    pooka 
   4365   1.4   nonaka static int
   4366  1.45   nonaka iwm_send_cmd_pdu(struct iwm_softc *sc, uint32_t id, uint32_t flags,
   4367  1.45   nonaka     uint16_t len, const void *data)
   4368   1.1    pooka {
   4369   1.1    pooka 	struct iwm_host_cmd cmd = {
   4370   1.1    pooka 		.id = id,
   4371   1.1    pooka 		.len = { len, },
   4372   1.1    pooka 		.data = { data, },
   4373   1.1    pooka 		.flags = flags,
   4374   1.1    pooka 	};
   4375   1.1    pooka 
   4376   1.1    pooka 	return iwm_send_cmd(sc, &cmd);
   4377   1.1    pooka }
   4378   1.1    pooka 
   4379   1.4   nonaka static int
   4380  1.45   nonaka iwm_send_cmd_status(struct iwm_softc *sc, struct iwm_host_cmd *cmd,
   4381  1.45   nonaka     uint32_t *status)
   4382   1.1    pooka {
   4383   1.1    pooka 	struct iwm_rx_packet *pkt;
   4384   1.1    pooka 	struct iwm_cmd_response *resp;
   4385  1.45   nonaka 	int err, resp_len;
   4386   1.1    pooka 
   4387   1.1    pooka 	KASSERT((cmd->flags & IWM_CMD_WANT_SKB) == 0);
   4388  1.45   nonaka 	cmd->flags |= IWM_CMD_WANT_SKB;
   4389   1.1    pooka 
   4390  1.45   nonaka 	err = iwm_send_cmd(sc, cmd);
   4391  1.45   nonaka 	if (err)
   4392  1.45   nonaka 		return err;
   4393   1.1    pooka 	pkt = cmd->resp_pkt;
   4394   1.1    pooka 
   4395   1.1    pooka 	/* Can happen if RFKILL is asserted */
   4396   1.1    pooka 	if (!pkt) {
   4397  1.45   nonaka 		err = 0;
   4398   1.1    pooka 		goto out_free_resp;
   4399   1.1    pooka 	}
   4400   1.1    pooka 
   4401   1.1    pooka 	if (pkt->hdr.flags & IWM_CMD_FAILED_MSK) {
   4402  1.45   nonaka 		err = EIO;
   4403   1.1    pooka 		goto out_free_resp;
   4404   1.1    pooka 	}
   4405   1.1    pooka 
   4406   1.1    pooka 	resp_len = iwm_rx_packet_payload_len(pkt);
   4407   1.1    pooka 	if (resp_len != sizeof(*resp)) {
   4408  1.45   nonaka 		err = EIO;
   4409   1.1    pooka 		goto out_free_resp;
   4410   1.1    pooka 	}
   4411   1.1    pooka 
   4412   1.1    pooka 	resp = (void *)pkt->data;
   4413   1.1    pooka 	*status = le32toh(resp->status);
   4414   1.1    pooka  out_free_resp:
   4415   1.1    pooka 	iwm_free_resp(sc, cmd);
   4416  1.45   nonaka 	return err;
   4417   1.1    pooka }
   4418   1.1    pooka 
   4419   1.4   nonaka static int
   4420  1.45   nonaka iwm_send_cmd_pdu_status(struct iwm_softc *sc, uint32_t id, uint16_t len,
   4421  1.45   nonaka     const void *data, uint32_t *status)
   4422   1.1    pooka {
   4423   1.1    pooka 	struct iwm_host_cmd cmd = {
   4424   1.1    pooka 		.id = id,
   4425   1.1    pooka 		.len = { len, },
   4426   1.1    pooka 		.data = { data, },
   4427   1.1    pooka 	};
   4428   1.1    pooka 
   4429  1.45   nonaka 	return iwm_send_cmd_status(sc, &cmd, status);
   4430   1.1    pooka }
   4431   1.1    pooka 
   4432   1.4   nonaka static void
   4433   1.1    pooka iwm_free_resp(struct iwm_softc *sc, struct iwm_host_cmd *hcmd)
   4434   1.1    pooka {
   4435  1.45   nonaka 	KASSERT(sc->sc_wantresp != IWM_CMD_RESP_IDLE);
   4436  1.45   nonaka 	KASSERT((hcmd->flags & IWM_CMD_WANT_SKB) == IWM_CMD_WANT_SKB);
   4437  1.45   nonaka 	sc->sc_wantresp = IWM_CMD_RESP_IDLE;
   4438   1.1    pooka 	wakeup(&sc->sc_wantresp);
   4439   1.1    pooka }
   4440   1.1    pooka 
   4441   1.4   nonaka static void
   4442  1.45   nonaka iwm_cmd_done(struct iwm_softc *sc, int qid, int idx)
   4443   1.1    pooka {
   4444  1.45   nonaka 	struct iwm_tx_ring *ring = &sc->txq[IWM_CMD_QUEUE];
   4445   1.1    pooka 	struct iwm_tx_data *data;
   4446  1.61   nonaka 	int s;
   4447   1.1    pooka 
   4448  1.45   nonaka 	if (qid != IWM_CMD_QUEUE) {
   4449   1.1    pooka 		return;	/* Not a command ack. */
   4450   1.1    pooka 	}
   4451   1.1    pooka 
   4452  1.61   nonaka 	s = splnet();
   4453  1.61   nonaka 
   4454  1.45   nonaka 	data = &ring->data[idx];
   4455   1.1    pooka 
   4456   1.1    pooka 	if (data->m != NULL) {
   4457   1.1    pooka 		bus_dmamap_sync(sc->sc_dmat, data->map, 0,
   4458   1.1    pooka 		    data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
   4459   1.1    pooka 		bus_dmamap_unload(sc->sc_dmat, data->map);
   4460   1.1    pooka 		m_freem(data->m);
   4461   1.1    pooka 		data->m = NULL;
   4462   1.1    pooka 	}
   4463  1.45   nonaka 	wakeup(&ring->desc[idx]);
   4464  1.59   nonaka 
   4465  1.59   nonaka 	if (((idx + ring->queued) % IWM_TX_RING_COUNT) != ring->cur) {
   4466  1.59   nonaka 		aprint_error_dev(sc->sc_dev,
   4467  1.59   nonaka 		    "Some HCMDs skipped?: idx=%d queued=%d cur=%d\n",
   4468  1.59   nonaka 		    idx, ring->queued, ring->cur);
   4469  1.59   nonaka 	}
   4470  1.59   nonaka 
   4471  1.59   nonaka 	KASSERT(ring->queued > 0);
   4472  1.59   nonaka 	if (--ring->queued == 0)
   4473  1.59   nonaka 		iwm_clear_cmd_in_flight(sc);
   4474  1.61   nonaka 
   4475  1.61   nonaka 	splx(s);
   4476   1.1    pooka }
   4477   1.1    pooka 
   4478   1.1    pooka #if 0
   4479   1.1    pooka /*
   4480   1.1    pooka  * necessary only for block ack mode
   4481   1.1    pooka  */
   4482   1.1    pooka void
   4483   1.1    pooka iwm_update_sched(struct iwm_softc *sc, int qid, int idx, uint8_t sta_id,
   4484  1.45   nonaka     uint16_t len)
   4485   1.1    pooka {
   4486   1.1    pooka 	struct iwm_agn_scd_bc_tbl *scd_bc_tbl;
   4487   1.1    pooka 	uint16_t w_val;
   4488   1.1    pooka 
   4489   1.1    pooka 	scd_bc_tbl = sc->sched_dma.vaddr;
   4490   1.1    pooka 
   4491   1.1    pooka 	len += 8; /* magic numbers came naturally from paris */
   4492   1.1    pooka 	if (sc->sc_capaflags & IWM_UCODE_TLV_FLAGS_DW_BC_TABLE)
   4493   1.1    pooka 		len = roundup(len, 4) / 4;
   4494   1.1    pooka 
   4495   1.1    pooka 	w_val = htole16(sta_id << 12 | len);
   4496   1.1    pooka 
   4497   1.1    pooka 	/* Update TX scheduler. */
   4498   1.1    pooka 	scd_bc_tbl[qid].tfd_offset[idx] = w_val;
   4499   1.1    pooka 	bus_dmamap_sync(sc->sc_dmat, sc->sched_dma.map,
   4500   1.1    pooka 	    (char *)(void *)w - (char *)(void *)sc->sched_dma.vaddr,
   4501   1.1    pooka 	    sizeof(uint16_t), BUS_DMASYNC_PREWRITE);
   4502   1.1    pooka 
   4503   1.1    pooka 	/* I really wonder what this is ?!? */
   4504   1.1    pooka 	if (idx < IWM_TFD_QUEUE_SIZE_BC_DUP) {
   4505   1.1    pooka 		scd_bc_tbl[qid].tfd_offset[IWM_TFD_QUEUE_SIZE_MAX + idx] = w_val;
   4506   1.1    pooka 		bus_dmamap_sync(sc->sc_dmat, sc->sched_dma.map,
   4507   1.1    pooka 		    (char *)(void *)(w + IWM_TFD_QUEUE_SIZE_MAX) -
   4508   1.1    pooka 		    (char *)(void *)sc->sched_dma.vaddr,
   4509   1.1    pooka 		    sizeof (uint16_t), BUS_DMASYNC_PREWRITE);
   4510   1.1    pooka 	}
   4511   1.1    pooka }
   4512   1.1    pooka #endif
   4513   1.1    pooka 
   4514   1.1    pooka /*
   4515   1.1    pooka  * Fill in various bit for management frames, and leave them
   4516   1.1    pooka  * unfilled for data frames (firmware takes care of that).
   4517   1.1    pooka  * Return the selected TX rate.
   4518   1.1    pooka  */
   4519   1.4   nonaka static const struct iwm_rate *
   4520   1.1    pooka iwm_tx_fill_cmd(struct iwm_softc *sc, struct iwm_node *in,
   4521  1.45   nonaka     struct ieee80211_frame *wh, struct iwm_tx_cmd *tx)
   4522   1.1    pooka {
   4523  1.24   nonaka 	struct ieee80211com *ic = &sc->sc_ic;
   4524  1.28   nonaka 	struct ieee80211_node *ni = &in->in_ni;
   4525   1.1    pooka 	const struct iwm_rate *rinfo;
   4526   1.1    pooka 	int type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
   4527  1.61   nonaka 	int ridx, rate_flags, i, ind;
   4528  1.28   nonaka 	int nrates = ni->ni_rates.rs_nrates;
   4529   1.1    pooka 
   4530   1.1    pooka 	tx->rts_retry_limit = IWM_RTS_DFAULT_RETRY_LIMIT;
   4531   1.1    pooka 	tx->data_retry_limit = IWM_DEFAULT_TX_RETRY;
   4532   1.1    pooka 
   4533  1.45   nonaka 	if (IEEE80211_IS_MULTICAST(wh->i_addr1) ||
   4534  1.45   nonaka 	    type != IEEE80211_FC0_TYPE_DATA) {
   4535  1.28   nonaka 		/* for non-data, use the lowest supported rate */
   4536  1.45   nonaka 		ridx = (IEEE80211_IS_CHAN_5GHZ(ni->ni_chan)) ?
   4537  1.28   nonaka 		    IWM_RIDX_OFDM : IWM_RIDX_CCK;
   4538  1.45   nonaka 		tx->data_retry_limit = IWM_MGMT_DFAULT_RETRY_LIMIT;
   4539  1.45   nonaka #ifndef IEEE80211_NO_HT
   4540  1.45   nonaka 	} else if (ic->ic_fixed_mcs != -1) {
   4541  1.45   nonaka 		ridx = sc->sc_fixed_ridx;
   4542  1.45   nonaka #endif
   4543  1.28   nonaka 	} else if (ic->ic_fixed_rate != -1) {
   4544  1.28   nonaka 		ridx = sc->sc_fixed_ridx;
   4545  1.28   nonaka 	} else {
   4546  1.28   nonaka 		/* for data frames, use RS table */
   4547  1.45   nonaka 		tx->initial_rate_index = 0;
   4548   1.8   nonaka 		tx->tx_flags |= htole32(IWM_TX_CMD_FLG_STA_RATE);
   4549  1.45   nonaka 		DPRINTFN(12, ("start with txrate %d\n",
   4550  1.45   nonaka 		    tx->initial_rate_index));
   4551  1.45   nonaka #ifndef IEEE80211_NO_HT
   4552  1.45   nonaka 		if (ni->ni_flags & IEEE80211_NODE_HT) {
   4553  1.45   nonaka 			ridx = iwm_mcs2ridx[ni->ni_txmcs];
   4554  1.45   nonaka 			return &iwm_rates[ridx];
   4555  1.45   nonaka 		}
   4556  1.45   nonaka #endif
   4557  1.45   nonaka 		ridx = (IEEE80211_IS_CHAN_5GHZ(ni->ni_chan)) ?
   4558  1.45   nonaka 		    IWM_RIDX_OFDM : IWM_RIDX_CCK;
   4559  1.45   nonaka 		for (i = 0; i < nrates; i++) {
   4560  1.45   nonaka 			if (iwm_rates[i].rate == (ni->ni_txrate &
   4561  1.45   nonaka 			    IEEE80211_RATE_VAL)) {
   4562  1.45   nonaka 				ridx = i;
   4563  1.45   nonaka 				break;
   4564  1.45   nonaka 			}
   4565  1.45   nonaka 		}
   4566  1.28   nonaka 		return &iwm_rates[ridx];
   4567   1.1    pooka 	}
   4568   1.1    pooka 
   4569   1.1    pooka 	rinfo = &iwm_rates[ridx];
   4570  1.61   nonaka 	for (i = 0, ind = sc->sc_mgmt_last_antenna;
   4571  1.61   nonaka 	    i < IWM_RATE_MCS_ANT_NUM; i++) {
   4572  1.61   nonaka 		ind = (ind + 1) % IWM_RATE_MCS_ANT_NUM;
   4573  1.61   nonaka 		if (iwm_fw_valid_tx_ant(sc) & (1 << ind)) {
   4574  1.61   nonaka 			sc->sc_mgmt_last_antenna = ind;
   4575  1.61   nonaka 			break;
   4576  1.61   nonaka 		}
   4577  1.61   nonaka 	}
   4578  1.61   nonaka 	rate_flags = (1 << sc->sc_mgmt_last_antenna) << IWM_RATE_MCS_ANT_POS;
   4579   1.1    pooka 	if (IWM_RIDX_IS_CCK(ridx))
   4580   1.1    pooka 		rate_flags |= IWM_RATE_MCS_CCK_MSK;
   4581  1.45   nonaka #ifndef IEEE80211_NO_HT
   4582  1.45   nonaka 	if ((ni->ni_flags & IEEE80211_NODE_HT) &&
   4583  1.45   nonaka 	    rinfo->ht_plcp != IWM_RATE_HT_SISO_MCS_INV_PLCP) {
   4584  1.45   nonaka 		rate_flags |= IWM_RATE_MCS_HT_MSK;
   4585  1.45   nonaka 		tx->rate_n_flags = htole32(rate_flags | rinfo->ht_plcp);
   4586  1.45   nonaka 	} else
   4587  1.45   nonaka #endif
   4588  1.45   nonaka 		tx->rate_n_flags = htole32(rate_flags | rinfo->plcp);
   4589   1.1    pooka 
   4590   1.1    pooka 	return rinfo;
   4591   1.1    pooka }
   4592   1.1    pooka 
   4593   1.1    pooka #define TB0_SIZE 16
   4594   1.4   nonaka static int
   4595   1.1    pooka iwm_tx(struct iwm_softc *sc, struct mbuf *m, struct ieee80211_node *ni, int ac)
   4596   1.1    pooka {
   4597   1.1    pooka 	struct ieee80211com *ic = &sc->sc_ic;
   4598  1.45   nonaka 	struct iwm_node *in = (struct iwm_node *)ni;
   4599   1.1    pooka 	struct iwm_tx_ring *ring;
   4600   1.1    pooka 	struct iwm_tx_data *data;
   4601   1.1    pooka 	struct iwm_tfd *desc;
   4602   1.1    pooka 	struct iwm_device_cmd *cmd;
   4603   1.1    pooka 	struct iwm_tx_cmd *tx;
   4604   1.1    pooka 	struct ieee80211_frame *wh;
   4605   1.1    pooka 	struct ieee80211_key *k = NULL;
   4606   1.1    pooka 	struct mbuf *m1;
   4607   1.1    pooka 	const struct iwm_rate *rinfo;
   4608   1.1    pooka 	uint32_t flags;
   4609   1.1    pooka 	u_int hdrlen;
   4610   1.1    pooka 	bus_dma_segment_t *seg;
   4611   1.1    pooka 	uint8_t tid, type;
   4612  1.45   nonaka 	int i, totlen, err, pad;
   4613   1.1    pooka 
   4614   1.1    pooka 	wh = mtod(m, struct ieee80211_frame *);
   4615   1.1    pooka 	hdrlen = ieee80211_anyhdrsize(wh);
   4616   1.1    pooka 	type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
   4617   1.1    pooka 
   4618   1.1    pooka 	tid = 0;
   4619   1.1    pooka 
   4620   1.1    pooka 	ring = &sc->txq[ac];
   4621   1.1    pooka 	desc = &ring->desc[ring->cur];
   4622   1.1    pooka 	memset(desc, 0, sizeof(*desc));
   4623   1.1    pooka 	data = &ring->data[ring->cur];
   4624   1.1    pooka 
   4625   1.1    pooka 	cmd = &ring->cmd[ring->cur];
   4626   1.1    pooka 	cmd->hdr.code = IWM_TX_CMD;
   4627   1.1    pooka 	cmd->hdr.flags = 0;
   4628   1.1    pooka 	cmd->hdr.qid = ring->qid;
   4629   1.1    pooka 	cmd->hdr.idx = ring->cur;
   4630   1.1    pooka 
   4631   1.1    pooka 	tx = (void *)cmd->data;
   4632   1.1    pooka 	memset(tx, 0, sizeof(*tx));
   4633   1.1    pooka 
   4634   1.1    pooka 	rinfo = iwm_tx_fill_cmd(sc, in, wh, tx);
   4635   1.1    pooka 
   4636  1.48   nonaka 	if (__predict_false(sc->sc_drvbpf != NULL)) {
   4637   1.1    pooka 		struct iwm_tx_radiotap_header *tap = &sc->sc_txtap;
   4638   1.1    pooka 
   4639   1.1    pooka 		tap->wt_flags = 0;
   4640   1.1    pooka 		tap->wt_chan_freq = htole16(ni->ni_chan->ic_freq);
   4641   1.1    pooka 		tap->wt_chan_flags = htole16(ni->ni_chan->ic_flags);
   4642  1.45   nonaka #ifndef IEEE80211_NO_HT
   4643  1.45   nonaka 		if ((ni->ni_flags & IEEE80211_NODE_HT) &&
   4644  1.45   nonaka 		    !IEEE80211_IS_MULTICAST(wh->i_addr1) &&
   4645  1.45   nonaka 		    type == IEEE80211_FC0_TYPE_DATA &&
   4646  1.45   nonaka 		    rinfo->plcp == IWM_RATE_INVM_PLCP) {
   4647  1.45   nonaka 			tap->wt_rate = (0x80 | rinfo->ht_plcp);
   4648  1.45   nonaka 		} else
   4649  1.45   nonaka #endif
   4650  1.45   nonaka 			tap->wt_rate = rinfo->rate;
   4651   1.1    pooka 		tap->wt_hwqueue = ac;
   4652   1.1    pooka 		if (wh->i_fc[1] & IEEE80211_FC1_WEP)
   4653   1.1    pooka 			tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP;
   4654   1.1    pooka 
   4655   1.1    pooka 		bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m);
   4656   1.1    pooka 	}
   4657   1.1    pooka 
   4658   1.1    pooka 	/* Encrypt the frame if need be. */
   4659   1.1    pooka 	if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
   4660   1.1    pooka 		k = ieee80211_crypto_encap(ic, ni, m);
   4661   1.1    pooka 		if (k == NULL) {
   4662   1.1    pooka 			m_freem(m);
   4663   1.1    pooka 			return ENOBUFS;
   4664   1.1    pooka 		}
   4665   1.1    pooka 		/* Packet header may have moved, reset our local pointer. */
   4666   1.1    pooka 		wh = mtod(m, struct ieee80211_frame *);
   4667   1.1    pooka 	}
   4668   1.1    pooka 	totlen = m->m_pkthdr.len;
   4669   1.1    pooka 
   4670   1.1    pooka 	flags = 0;
   4671   1.1    pooka 	if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
   4672   1.1    pooka 		flags |= IWM_TX_CMD_FLG_ACK;
   4673   1.1    pooka 	}
   4674   1.1    pooka 
   4675  1.45   nonaka 	if (type == IEEE80211_FC0_TYPE_DATA &&
   4676  1.45   nonaka 	    !IEEE80211_IS_MULTICAST(wh->i_addr1) &&
   4677  1.45   nonaka 	    (totlen + IEEE80211_CRC_LEN > ic->ic_rtsthreshold ||
   4678  1.45   nonaka 	     (ic->ic_flags & IEEE80211_F_USEPROT)))
   4679   1.1    pooka 		flags |= IWM_TX_CMD_FLG_PROT_REQUIRE;
   4680   1.1    pooka 
   4681   1.1    pooka 	if (IEEE80211_IS_MULTICAST(wh->i_addr1) ||
   4682   1.1    pooka 	    type != IEEE80211_FC0_TYPE_DATA)
   4683  1.45   nonaka 		tx->sta_id = IWM_AUX_STA_ID;
   4684   1.1    pooka 	else
   4685   1.1    pooka 		tx->sta_id = IWM_STATION_ID;
   4686   1.1    pooka 
   4687   1.1    pooka 	if (type == IEEE80211_FC0_TYPE_MGT) {
   4688   1.1    pooka 		uint8_t subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
   4689   1.1    pooka 
   4690   1.1    pooka 		if (subtype == IEEE80211_FC0_SUBTYPE_ASSOC_REQ ||
   4691   1.1    pooka 		    subtype == IEEE80211_FC0_SUBTYPE_REASSOC_REQ)
   4692  1.54   nonaka 			tx->pm_frame_timeout = htole16(IWM_PM_FRAME_ASSOC);
   4693   1.1    pooka 		else
   4694  1.54   nonaka 			tx->pm_frame_timeout = htole16(IWM_PM_FRAME_MGMT);
   4695   1.1    pooka 	} else {
   4696  1.54   nonaka 		tx->pm_frame_timeout = htole16(IWM_PM_FRAME_NONE);
   4697   1.1    pooka 	}
   4698   1.1    pooka 
   4699   1.8   nonaka 	if (hdrlen & 3) {
   4700   1.8   nonaka 		/* First segment length must be a multiple of 4. */
   4701   1.8   nonaka 		flags |= IWM_TX_CMD_FLG_MH_PAD;
   4702   1.8   nonaka 		pad = 4 - (hdrlen & 3);
   4703   1.8   nonaka 	} else
   4704   1.8   nonaka 		pad = 0;
   4705   1.1    pooka 
   4706   1.1    pooka 	tx->driver_txop = 0;
   4707   1.1    pooka 	tx->next_frame_len = 0;
   4708   1.1    pooka 
   4709   1.1    pooka 	tx->len = htole16(totlen);
   4710   1.1    pooka 	tx->tid_tspec = tid;
   4711   1.1    pooka 	tx->life_time = htole32(IWM_TX_CMD_LIFE_TIME_INFINITE);
   4712   1.1    pooka 
   4713   1.1    pooka 	/* Set physical address of "scratch area". */
   4714   1.1    pooka 	tx->dram_lsb_ptr = htole32(data->scratch_paddr);
   4715   1.1    pooka 	tx->dram_msb_ptr = iwm_get_dma_hi_addr(data->scratch_paddr);
   4716   1.1    pooka 
   4717   1.1    pooka 	/* Copy 802.11 header in TX command. */
   4718  1.61   nonaka 	memcpy(tx + 1, wh, hdrlen);
   4719   1.1    pooka 
   4720   1.1    pooka 	flags |= IWM_TX_CMD_FLG_BT_DIS | IWM_TX_CMD_FLG_SEQ_CTL;
   4721   1.1    pooka 
   4722   1.1    pooka 	tx->sec_ctl = 0;
   4723   1.1    pooka 	tx->tx_flags |= htole32(flags);
   4724   1.1    pooka 
   4725   1.1    pooka 	/* Trim 802.11 header. */
   4726   1.1    pooka 	m_adj(m, hdrlen);
   4727   1.1    pooka 
   4728  1.45   nonaka 	err = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m,
   4729   1.1    pooka 	    BUS_DMA_NOWAIT | BUS_DMA_WRITE);
   4730  1.45   nonaka 	if (err) {
   4731  1.45   nonaka 		if (err != EFBIG) {
   4732   1.3   nonaka 			aprint_error_dev(sc->sc_dev,
   4733  1.45   nonaka 			    "can't map mbuf (error %d)\n", err);
   4734   1.1    pooka 			m_freem(m);
   4735  1.45   nonaka 			return err;
   4736   1.1    pooka 		}
   4737   1.1    pooka 		/* Too many DMA segments, linearize mbuf. */
   4738   1.1    pooka 		MGETHDR(m1, M_DONTWAIT, MT_DATA);
   4739   1.1    pooka 		if (m1 == NULL) {
   4740   1.1    pooka 			m_freem(m);
   4741   1.1    pooka 			return ENOBUFS;
   4742   1.1    pooka 		}
   4743   1.1    pooka 		if (m->m_pkthdr.len > MHLEN) {
   4744   1.1    pooka 			MCLGET(m1, M_DONTWAIT);
   4745   1.1    pooka 			if (!(m1->m_flags & M_EXT)) {
   4746   1.1    pooka 				m_freem(m);
   4747   1.1    pooka 				m_freem(m1);
   4748   1.1    pooka 				return ENOBUFS;
   4749   1.1    pooka 			}
   4750   1.1    pooka 		}
   4751   1.1    pooka 		m_copydata(m, 0, m->m_pkthdr.len, mtod(m1, void *));
   4752   1.1    pooka 		m1->m_pkthdr.len = m1->m_len = m->m_pkthdr.len;
   4753   1.1    pooka 		m_freem(m);
   4754   1.1    pooka 		m = m1;
   4755   1.1    pooka 
   4756  1.45   nonaka 		err = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m,
   4757   1.1    pooka 		    BUS_DMA_NOWAIT | BUS_DMA_WRITE);
   4758  1.45   nonaka 		if (err) {
   4759   1.3   nonaka 			aprint_error_dev(sc->sc_dev,
   4760  1.45   nonaka 			    "can't map mbuf (error %d)\n", err);
   4761   1.1    pooka 			m_freem(m);
   4762  1.45   nonaka 			return err;
   4763   1.1    pooka 		}
   4764   1.1    pooka 	}
   4765   1.1    pooka 	data->m = m;
   4766   1.1    pooka 	data->in = in;
   4767   1.1    pooka 	data->done = 0;
   4768   1.1    pooka 
   4769   1.1    pooka 	DPRINTFN(8, ("sending txd %p, in %p\n", data, data->in));
   4770   1.1    pooka 	KASSERT(data->in != NULL);
   4771   1.1    pooka 
   4772  1.61   nonaka 	DPRINTFN(8, ("sending data: qid=%d idx=%d len=%d nsegs=%d type=%d "
   4773  1.61   nonaka 	    "subtype=%x tx_flags=%08x init_rateidx=%08x rate_n_flags=%08x\n",
   4774  1.61   nonaka 	    ring->qid, ring->cur, totlen, data->map->dm_nsegs, type,
   4775  1.61   nonaka 	    (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) >> 4,
   4776  1.61   nonaka 	    le32toh(tx->tx_flags), le32toh(tx->initial_rate_index),
   4777  1.61   nonaka 	    le32toh(tx->rate_n_flags)));
   4778   1.1    pooka 
   4779   1.1    pooka 	/* Fill TX descriptor. */
   4780   1.1    pooka 	desc->num_tbs = 2 + data->map->dm_nsegs;
   4781   1.1    pooka 
   4782   1.1    pooka 	desc->tbs[0].lo = htole32(data->cmd_paddr);
   4783   1.1    pooka 	desc->tbs[0].hi_n_len = htole16(iwm_get_dma_hi_addr(data->cmd_paddr)) |
   4784   1.1    pooka 	    (TB0_SIZE << 4);
   4785   1.1    pooka 	desc->tbs[1].lo = htole32(data->cmd_paddr + TB0_SIZE);
   4786   1.1    pooka 	desc->tbs[1].hi_n_len = htole16(iwm_get_dma_hi_addr(data->cmd_paddr)) |
   4787   1.1    pooka 	    ((sizeof(struct iwm_cmd_header) + sizeof(*tx)
   4788   1.1    pooka 	      + hdrlen + pad - TB0_SIZE) << 4);
   4789   1.1    pooka 
   4790   1.1    pooka 	/* Other DMA segments are for data payload. */
   4791   1.1    pooka 	seg = data->map->dm_segs;
   4792   1.1    pooka 	for (i = 0; i < data->map->dm_nsegs; i++, seg++) {
   4793   1.1    pooka 		desc->tbs[i+2].lo = htole32(seg->ds_addr);
   4794  1.47   nonaka 		desc->tbs[i+2].hi_n_len =
   4795   1.1    pooka 		    htole16(iwm_get_dma_hi_addr(seg->ds_addr))
   4796   1.1    pooka 		    | ((seg->ds_len) << 4);
   4797   1.1    pooka 	}
   4798   1.1    pooka 
   4799   1.1    pooka 	bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize,
   4800   1.1    pooka 	    BUS_DMASYNC_PREWRITE);
   4801   1.1    pooka 	bus_dmamap_sync(sc->sc_dmat, ring->cmd_dma.map,
   4802  1.61   nonaka 	    (uint8_t *)cmd - (uint8_t *)ring->cmd, sizeof(*cmd),
   4803  1.61   nonaka 	    BUS_DMASYNC_PREWRITE);
   4804   1.1    pooka 	bus_dmamap_sync(sc->sc_dmat, ring->desc_dma.map,
   4805  1.61   nonaka 	    (uint8_t *)desc - (uint8_t *)ring->desc, sizeof(*desc),
   4806  1.61   nonaka 	    BUS_DMASYNC_PREWRITE);
   4807   1.1    pooka 
   4808   1.1    pooka #if 0
   4809  1.45   nonaka 	iwm_update_sched(sc, ring->qid, ring->cur, tx->sta_id,
   4810  1.45   nonaka 	    le16toh(tx->len));
   4811   1.1    pooka #endif
   4812   1.1    pooka 
   4813   1.1    pooka 	/* Kick TX ring. */
   4814   1.1    pooka 	ring->cur = (ring->cur + 1) % IWM_TX_RING_COUNT;
   4815   1.1    pooka 	IWM_WRITE(sc, IWM_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);
   4816   1.1    pooka 
   4817   1.1    pooka 	/* Mark TX ring as full if we reach a certain threshold. */
   4818   1.1    pooka 	if (++ring->queued > IWM_TX_RING_HIMARK) {
   4819   1.1    pooka 		sc->qfullmsk |= 1 << ring->qid;
   4820   1.1    pooka 	}
   4821   1.1    pooka 
   4822   1.1    pooka 	return 0;
   4823   1.1    pooka }
   4824   1.1    pooka 
   4825   1.1    pooka #if 0
   4826   1.1    pooka /* not necessary? */
   4827   1.4   nonaka static int
   4828  1.45   nonaka iwm_flush_tx_path(struct iwm_softc *sc, int tfd_msk, int sync)
   4829   1.1    pooka {
   4830   1.1    pooka 	struct iwm_tx_path_flush_cmd flush_cmd = {
   4831   1.1    pooka 		.queues_ctl = htole32(tfd_msk),
   4832   1.1    pooka 		.flush_ctl = htole16(IWM_DUMP_TX_FIFO_FLUSH),
   4833   1.1    pooka 	};
   4834  1.45   nonaka 	int err;
   4835   1.1    pooka 
   4836  1.45   nonaka 	err = iwm_send_cmd_pdu(sc, IWM_TXPATH_FLUSH, sync ? 0 : IWM_CMD_ASYNC,
   4837   1.1    pooka 	    sizeof(flush_cmd), &flush_cmd);
   4838  1.45   nonaka 	if (err)
   4839   1.3   nonaka 		aprint_error_dev(sc->sc_dev, "Flushing tx queue failed: %d\n",
   4840  1.45   nonaka 		    err);
   4841  1.45   nonaka 	return err;
   4842   1.1    pooka }
   4843   1.1    pooka #endif
   4844   1.1    pooka 
   4845  1.45   nonaka static void
   4846  1.45   nonaka iwm_led_enable(struct iwm_softc *sc)
   4847  1.45   nonaka {
   4848  1.45   nonaka 	IWM_WRITE(sc, IWM_CSR_LED_REG, IWM_CSR_LED_REG_TURN_ON);
   4849  1.45   nonaka }
   4850  1.45   nonaka 
   4851  1.45   nonaka static void
   4852  1.45   nonaka iwm_led_disable(struct iwm_softc *sc)
   4853  1.45   nonaka {
   4854  1.45   nonaka 	IWM_WRITE(sc, IWM_CSR_LED_REG, IWM_CSR_LED_REG_TURN_OFF);
   4855  1.45   nonaka }
   4856  1.45   nonaka 
   4857  1.45   nonaka static int
   4858  1.45   nonaka iwm_led_is_enabled(struct iwm_softc *sc)
   4859  1.45   nonaka {
   4860  1.45   nonaka 	return (IWM_READ(sc, IWM_CSR_LED_REG) == IWM_CSR_LED_REG_TURN_ON);
   4861  1.45   nonaka }
   4862  1.45   nonaka 
   4863  1.45   nonaka static void
   4864  1.45   nonaka iwm_led_blink_timeout(void *arg)
   4865  1.45   nonaka {
   4866  1.45   nonaka 	struct iwm_softc *sc = arg;
   4867  1.45   nonaka 
   4868  1.45   nonaka 	if (iwm_led_is_enabled(sc))
   4869  1.45   nonaka 		iwm_led_disable(sc);
   4870  1.45   nonaka 	else
   4871  1.45   nonaka 		iwm_led_enable(sc);
   4872  1.45   nonaka 
   4873  1.45   nonaka 	callout_schedule(&sc->sc_led_blink_to, mstohz(200));
   4874  1.45   nonaka }
   4875  1.45   nonaka 
   4876  1.45   nonaka static void
   4877  1.45   nonaka iwm_led_blink_start(struct iwm_softc *sc)
   4878  1.45   nonaka {
   4879  1.45   nonaka 	callout_schedule(&sc->sc_led_blink_to, mstohz(200));
   4880  1.45   nonaka }
   4881   1.1    pooka 
   4882  1.45   nonaka static void
   4883  1.45   nonaka iwm_led_blink_stop(struct iwm_softc *sc)
   4884  1.45   nonaka {
   4885  1.45   nonaka 	callout_stop(&sc->sc_led_blink_to);
   4886  1.45   nonaka 	iwm_led_disable(sc);
   4887  1.45   nonaka }
   4888   1.1    pooka 
   4889   1.1    pooka #define IWM_POWER_KEEP_ALIVE_PERIOD_SEC    25
   4890   1.1    pooka 
   4891   1.4   nonaka static int
   4892  1.45   nonaka iwm_beacon_filter_send_cmd(struct iwm_softc *sc,
   4893  1.51   nonaka     struct iwm_beacon_filter_cmd *cmd)
   4894   1.1    pooka {
   4895  1.45   nonaka 	return iwm_send_cmd_pdu(sc, IWM_REPLY_BEACON_FILTERING_CMD,
   4896  1.45   nonaka 	    0, sizeof(struct iwm_beacon_filter_cmd), cmd);
   4897   1.1    pooka }
   4898   1.1    pooka 
   4899   1.4   nonaka static void
   4900  1.45   nonaka iwm_beacon_filter_set_cqm_params(struct iwm_softc *sc, struct iwm_node *in,
   4901  1.45   nonaka     struct iwm_beacon_filter_cmd *cmd)
   4902   1.1    pooka {
   4903   1.1    pooka 	cmd->ba_enable_beacon_abort = htole32(sc->sc_bf.ba_enabled);
   4904   1.1    pooka }
   4905   1.1    pooka 
   4906   1.4   nonaka static int
   4907  1.45   nonaka iwm_update_beacon_abort(struct iwm_softc *sc, struct iwm_node *in, int enable)
   4908   1.1    pooka {
   4909   1.1    pooka 	struct iwm_beacon_filter_cmd cmd = {
   4910   1.1    pooka 		IWM_BF_CMD_CONFIG_DEFAULTS,
   4911   1.1    pooka 		.bf_enable_beacon_filter = htole32(1),
   4912   1.1    pooka 		.ba_enable_beacon_abort = htole32(enable),
   4913   1.1    pooka 	};
   4914   1.1    pooka 
   4915   1.1    pooka 	if (!sc->sc_bf.bf_enabled)
   4916   1.1    pooka 		return 0;
   4917   1.1    pooka 
   4918   1.1    pooka 	sc->sc_bf.ba_enabled = enable;
   4919  1.45   nonaka 	iwm_beacon_filter_set_cqm_params(sc, in, &cmd);
   4920  1.45   nonaka 	return iwm_beacon_filter_send_cmd(sc, &cmd);
   4921   1.1    pooka }
   4922   1.1    pooka 
   4923   1.4   nonaka static void
   4924  1.45   nonaka iwm_power_build_cmd(struct iwm_softc *sc, struct iwm_node *in,
   4925  1.45   nonaka     struct iwm_mac_power_cmd *cmd)
   4926   1.1    pooka {
   4927   1.1    pooka 	struct ieee80211_node *ni = &in->in_ni;
   4928  1.45   nonaka 	int dtim_period, dtim_msec, keep_alive;
   4929   1.1    pooka 
   4930   1.1    pooka 	cmd->id_and_color = htole32(IWM_FW_CMD_ID_AND_COLOR(in->in_id,
   4931   1.1    pooka 	    in->in_color));
   4932  1.45   nonaka 	if (ni->ni_dtim_period)
   4933  1.45   nonaka 		dtim_period = ni->ni_dtim_period;
   4934  1.45   nonaka 	else
   4935  1.45   nonaka 		dtim_period = 1;
   4936   1.1    pooka 
   4937   1.1    pooka 	/*
   4938   1.1    pooka 	 * Regardless of power management state the driver must set
   4939   1.1    pooka 	 * keep alive period. FW will use it for sending keep alive NDPs
   4940   1.1    pooka 	 * immediately after association. Check that keep alive period
   4941  1.45   nonaka 	 * is at least 3 * DTIM.
   4942   1.1    pooka 	 */
   4943  1.45   nonaka 	dtim_msec = dtim_period * ni->ni_intval;
   4944  1.45   nonaka 	keep_alive = MAX(3 * dtim_msec, 1000 * IWM_POWER_KEEP_ALIVE_PERIOD_SEC);
   4945   1.1    pooka 	keep_alive = roundup(keep_alive, 1000) / 1000;
   4946   1.1    pooka 	cmd->keep_alive_seconds = htole16(keep_alive);
   4947  1.45   nonaka 
   4948  1.45   nonaka #ifdef notyet
   4949  1.45   nonaka 	cmd->flags = htole16(IWM_POWER_FLAGS_POWER_SAVE_ENA_MSK);
   4950  1.45   nonaka 	cmd->rx_data_timeout = IWM_DEFAULT_PS_RX_DATA_TIMEOUT;
   4951  1.45   nonaka 	cmd->tx_data_timeout = IWM_DEFAULT_PS_TX_DATA_TIMEOUT;
   4952  1.45   nonaka #endif
   4953   1.1    pooka }
   4954   1.1    pooka 
   4955   1.4   nonaka static int
   4956  1.45   nonaka iwm_power_mac_update_mode(struct iwm_softc *sc, struct iwm_node *in)
   4957   1.1    pooka {
   4958  1.45   nonaka 	int err;
   4959   1.1    pooka 	int ba_enable;
   4960   1.1    pooka 	struct iwm_mac_power_cmd cmd;
   4961   1.1    pooka 
   4962   1.1    pooka 	memset(&cmd, 0, sizeof(cmd));
   4963   1.1    pooka 
   4964  1.45   nonaka 	iwm_power_build_cmd(sc, in, &cmd);
   4965   1.1    pooka 
   4966  1.45   nonaka 	err = iwm_send_cmd_pdu(sc, IWM_MAC_PM_POWER_TABLE, 0,
   4967  1.45   nonaka 	    sizeof(cmd), &cmd);
   4968  1.45   nonaka 	if (err)
   4969  1.45   nonaka 		return err;
   4970   1.1    pooka 
   4971   1.1    pooka 	ba_enable = !!(cmd.flags &
   4972   1.1    pooka 	    htole16(IWM_POWER_FLAGS_POWER_MANAGEMENT_ENA_MSK));
   4973  1.45   nonaka 	return iwm_update_beacon_abort(sc, in, ba_enable);
   4974   1.1    pooka }
   4975   1.1    pooka 
   4976   1.4   nonaka static int
   4977  1.45   nonaka iwm_power_update_device(struct iwm_softc *sc)
   4978   1.1    pooka {
   4979   1.1    pooka 	struct iwm_device_power_cmd cmd = {
   4980  1.45   nonaka #ifdef notyet
   4981   1.1    pooka 		.flags = htole16(IWM_DEVICE_POWER_FLAGS_POWER_SAVE_ENA_MSK),
   4982  1.55  khorben #else
   4983  1.55  khorben 		.flags = 0,
   4984  1.45   nonaka #endif
   4985   1.1    pooka 	};
   4986   1.1    pooka 
   4987   1.1    pooka 	if (!(sc->sc_capaflags & IWM_UCODE_TLV_FLAGS_DEVICE_PS_CMD))
   4988   1.1    pooka 		return 0;
   4989   1.1    pooka 
   4990   1.1    pooka 	cmd.flags |= htole16(IWM_DEVICE_POWER_FLAGS_CAM_MSK);
   4991  1.45   nonaka 	DPRINTF(("Sending device power command with flags = 0x%X\n",
   4992  1.45   nonaka 	    cmd.flags));
   4993   1.1    pooka 
   4994  1.45   nonaka 	return iwm_send_cmd_pdu(sc, IWM_POWER_TABLE_CMD, 0, sizeof(cmd), &cmd);
   4995   1.1    pooka }
   4996   1.1    pooka 
   4997  1.45   nonaka #ifdef notyet
   4998   1.4   nonaka static int
   4999  1.45   nonaka iwm_enable_beacon_filter(struct iwm_softc *sc, struct iwm_node *in)
   5000   1.1    pooka {
   5001   1.1    pooka 	struct iwm_beacon_filter_cmd cmd = {
   5002   1.1    pooka 		IWM_BF_CMD_CONFIG_DEFAULTS,
   5003   1.1    pooka 		.bf_enable_beacon_filter = htole32(1),
   5004   1.1    pooka 	};
   5005  1.45   nonaka 	int err;
   5006   1.1    pooka 
   5007  1.45   nonaka 	iwm_beacon_filter_set_cqm_params(sc, in, &cmd);
   5008  1.45   nonaka 	err = iwm_beacon_filter_send_cmd(sc, &cmd);
   5009   1.1    pooka 
   5010  1.45   nonaka 	if (err == 0)
   5011   1.1    pooka 		sc->sc_bf.bf_enabled = 1;
   5012   1.1    pooka 
   5013  1.45   nonaka 	return err;
   5014   1.1    pooka }
   5015  1.45   nonaka #endif
   5016   1.1    pooka 
   5017   1.4   nonaka static int
   5018  1.45   nonaka iwm_disable_beacon_filter(struct iwm_softc *sc)
   5019   1.1    pooka {
   5020   1.1    pooka 	struct iwm_beacon_filter_cmd cmd;
   5021  1.45   nonaka 	int err;
   5022   1.1    pooka 
   5023   1.1    pooka 	memset(&cmd, 0, sizeof(cmd));
   5024   1.1    pooka 	if ((sc->sc_capaflags & IWM_UCODE_TLV_FLAGS_BF_UPDATED) == 0)
   5025   1.1    pooka 		return 0;
   5026   1.1    pooka 
   5027  1.45   nonaka 	err = iwm_beacon_filter_send_cmd(sc, &cmd);
   5028  1.45   nonaka 	if (err == 0)
   5029   1.1    pooka 		sc->sc_bf.bf_enabled = 0;
   5030   1.1    pooka 
   5031  1.45   nonaka 	return err;
   5032   1.1    pooka }
   5033   1.1    pooka 
   5034   1.4   nonaka static int
   5035  1.45   nonaka iwm_add_sta_cmd(struct iwm_softc *sc, struct iwm_node *in, int update)
   5036   1.1    pooka {
   5037  1.45   nonaka 	struct iwm_add_sta_cmd_v7 add_sta_cmd;
   5038  1.45   nonaka 	int err;
   5039  1.45   nonaka 	uint32_t status;
   5040   1.1    pooka 
   5041  1.45   nonaka 	memset(&add_sta_cmd, 0, sizeof(add_sta_cmd));
   5042   1.1    pooka 
   5043  1.45   nonaka 	add_sta_cmd.sta_id = IWM_STATION_ID;
   5044  1.45   nonaka 	add_sta_cmd.mac_id_n_color
   5045  1.45   nonaka 	    = htole32(IWM_FW_CMD_ID_AND_COLOR(in->in_id, in->in_color));
   5046  1.45   nonaka 	if (!update) {
   5047  1.45   nonaka 		int ac;
   5048  1.45   nonaka 		for (ac = 0; ac < WME_NUM_AC; ac++) {
   5049  1.45   nonaka 			add_sta_cmd.tfd_queue_msk |=
   5050  1.45   nonaka 			    htole32(__BIT(iwm_ac_to_tx_fifo[ac]));
   5051  1.45   nonaka 		}
   5052  1.45   nonaka 		IEEE80211_ADDR_COPY(&add_sta_cmd.addr, in->in_ni.ni_bssid);
   5053  1.45   nonaka 	}
   5054   1.1    pooka 	add_sta_cmd.add_modify = update ? 1 : 0;
   5055   1.1    pooka 	add_sta_cmd.station_flags_msk
   5056   1.1    pooka 	    |= htole32(IWM_STA_FLG_FAT_EN_MSK | IWM_STA_FLG_MIMO_EN_MSK);
   5057  1.45   nonaka 	add_sta_cmd.tid_disable_tx = htole16(0xffff);
   5058  1.45   nonaka 	if (update)
   5059  1.45   nonaka 		add_sta_cmd.modify_mask |= (IWM_STA_MODIFY_TID_DISABLE_TX);
   5060  1.45   nonaka 
   5061  1.45   nonaka #ifndef IEEE80211_NO_HT
   5062  1.45   nonaka 	if (in->in_ni.ni_flags & IEEE80211_NODE_HT) {
   5063  1.45   nonaka 		add_sta_cmd.station_flags_msk
   5064  1.45   nonaka 		    |= htole32(IWM_STA_FLG_MAX_AGG_SIZE_MSK |
   5065  1.45   nonaka 		    IWM_STA_FLG_AGG_MPDU_DENS_MSK);
   5066  1.45   nonaka 
   5067  1.45   nonaka 		add_sta_cmd.station_flags
   5068  1.45   nonaka 		    |= htole32(IWM_STA_FLG_MAX_AGG_SIZE_64K);
   5069  1.45   nonaka 		switch (ic->ic_ampdu_params & IEEE80211_AMPDU_PARAM_SS) {
   5070  1.45   nonaka 		case IEEE80211_AMPDU_PARAM_SS_2:
   5071  1.45   nonaka 			add_sta_cmd.station_flags
   5072  1.45   nonaka 			    |= htole32(IWM_STA_FLG_AGG_MPDU_DENS_2US);
   5073  1.45   nonaka 			break;
   5074  1.45   nonaka 		case IEEE80211_AMPDU_PARAM_SS_4:
   5075  1.45   nonaka 			add_sta_cmd.station_flags
   5076  1.45   nonaka 			    |= htole32(IWM_STA_FLG_AGG_MPDU_DENS_4US);
   5077  1.45   nonaka 			break;
   5078  1.45   nonaka 		case IEEE80211_AMPDU_PARAM_SS_8:
   5079  1.45   nonaka 			add_sta_cmd.station_flags
   5080  1.45   nonaka 			    |= htole32(IWM_STA_FLG_AGG_MPDU_DENS_8US);
   5081  1.45   nonaka 			break;
   5082  1.45   nonaka 		case IEEE80211_AMPDU_PARAM_SS_16:
   5083  1.45   nonaka 			add_sta_cmd.station_flags
   5084  1.45   nonaka 			    |= htole32(IWM_STA_FLG_AGG_MPDU_DENS_16US);
   5085  1.45   nonaka 			break;
   5086  1.45   nonaka 		default:
   5087  1.45   nonaka 			break;
   5088  1.45   nonaka 		}
   5089  1.45   nonaka 	}
   5090  1.45   nonaka #endif
   5091   1.1    pooka 
   5092   1.1    pooka 	status = IWM_ADD_STA_SUCCESS;
   5093  1.45   nonaka 	err = iwm_send_cmd_pdu_status(sc, IWM_ADD_STA, sizeof(add_sta_cmd),
   5094  1.45   nonaka 	    &add_sta_cmd, &status);
   5095  1.45   nonaka 	if (err == 0 && status != IWM_ADD_STA_SUCCESS)
   5096  1.45   nonaka 		err = EIO;
   5097   1.1    pooka 
   5098  1.45   nonaka 	return err;
   5099   1.1    pooka }
   5100   1.1    pooka 
   5101   1.4   nonaka static int
   5102  1.45   nonaka iwm_add_aux_sta(struct iwm_softc *sc)
   5103   1.1    pooka {
   5104  1.45   nonaka 	struct iwm_add_sta_cmd_v7 cmd;
   5105  1.45   nonaka 	int err;
   5106  1.45   nonaka 	uint32_t status;
   5107   1.1    pooka 
   5108  1.45   nonaka 	err = iwm_enable_txq(sc, 0, IWM_AUX_QUEUE, IWM_TX_FIFO_MCAST);
   5109  1.45   nonaka 	if (err)
   5110  1.45   nonaka 		return err;
   5111   1.1    pooka 
   5112   1.1    pooka 	memset(&cmd, 0, sizeof(cmd));
   5113  1.45   nonaka 	cmd.sta_id = IWM_AUX_STA_ID;
   5114  1.45   nonaka 	cmd.mac_id_n_color =
   5115  1.45   nonaka 	    htole32(IWM_FW_CMD_ID_AND_COLOR(IWM_MAC_INDEX_AUX, 0));
   5116  1.45   nonaka 	cmd.tfd_queue_msk = htole32(1 << IWM_AUX_QUEUE);
   5117  1.45   nonaka 	cmd.tid_disable_tx = htole16(0xffff);
   5118   1.1    pooka 
   5119  1.45   nonaka 	status = IWM_ADD_STA_SUCCESS;
   5120  1.45   nonaka 	err = iwm_send_cmd_pdu_status(sc, IWM_ADD_STA, sizeof(cmd), &cmd,
   5121  1.45   nonaka 	    &status);
   5122  1.45   nonaka 	if (err == 0 && status != IWM_ADD_STA_SUCCESS)
   5123  1.45   nonaka 		err = EIO;
   5124   1.1    pooka 
   5125  1.45   nonaka 	return err;
   5126   1.1    pooka }
   5127   1.1    pooka 
   5128   1.1    pooka #define IWM_PLCP_QUIET_THRESH 1
   5129   1.1    pooka #define IWM_ACTIVE_QUIET_TIME 10
   5130   1.1    pooka #define LONG_OUT_TIME_PERIOD 600
   5131   1.1    pooka #define SHORT_OUT_TIME_PERIOD 200
   5132   1.1    pooka #define SUSPEND_TIME_PERIOD 100
   5133   1.1    pooka 
   5134   1.4   nonaka static uint16_t
   5135  1.45   nonaka iwm_scan_rx_chain(struct iwm_softc *sc)
   5136   1.1    pooka {
   5137   1.1    pooka 	uint16_t rx_chain;
   5138   1.1    pooka 	uint8_t rx_ant;
   5139   1.1    pooka 
   5140  1.45   nonaka 	rx_ant = iwm_fw_valid_rx_ant(sc);
   5141   1.1    pooka 	rx_chain = rx_ant << IWM_PHY_RX_CHAIN_VALID_POS;
   5142   1.1    pooka 	rx_chain |= rx_ant << IWM_PHY_RX_CHAIN_FORCE_MIMO_SEL_POS;
   5143   1.1    pooka 	rx_chain |= rx_ant << IWM_PHY_RX_CHAIN_FORCE_SEL_POS;
   5144   1.1    pooka 	rx_chain |= 0x1 << IWM_PHY_RX_CHAIN_DRIVER_FORCE_POS;
   5145   1.1    pooka 	return htole16(rx_chain);
   5146   1.1    pooka }
   5147   1.1    pooka 
   5148   1.4   nonaka static uint32_t
   5149  1.45   nonaka iwm_scan_rate_n_flags(struct iwm_softc *sc, int flags, int no_cck)
   5150   1.1    pooka {
   5151   1.1    pooka 	uint32_t tx_ant;
   5152   1.1    pooka 	int i, ind;
   5153   1.1    pooka 
   5154   1.1    pooka 	for (i = 0, ind = sc->sc_scan_last_antenna;
   5155   1.1    pooka 	    i < IWM_RATE_MCS_ANT_NUM; i++) {
   5156   1.1    pooka 		ind = (ind + 1) % IWM_RATE_MCS_ANT_NUM;
   5157  1.45   nonaka 		if (iwm_fw_valid_tx_ant(sc) & (1 << ind)) {
   5158   1.1    pooka 			sc->sc_scan_last_antenna = ind;
   5159   1.1    pooka 			break;
   5160   1.1    pooka 		}
   5161   1.1    pooka 	}
   5162   1.1    pooka 	tx_ant = (1 << sc->sc_scan_last_antenna) << IWM_RATE_MCS_ANT_POS;
   5163   1.1    pooka 
   5164   1.1    pooka 	if ((flags & IEEE80211_CHAN_2GHZ) && !no_cck)
   5165   1.1    pooka 		return htole32(IWM_RATE_1M_PLCP | IWM_RATE_MCS_CCK_MSK |
   5166   1.1    pooka 				   tx_ant);
   5167   1.1    pooka 	else
   5168   1.1    pooka 		return htole32(IWM_RATE_6M_PLCP | tx_ant);
   5169   1.1    pooka }
   5170   1.1    pooka 
   5171  1.45   nonaka #ifdef notyet
   5172   1.1    pooka /*
   5173   1.1    pooka  * If req->n_ssids > 0, it means we should do an active scan.
   5174   1.1    pooka  * In case of active scan w/o directed scan, we receive a zero-length SSID
   5175   1.1    pooka  * just to notify that this scan is active and not passive.
   5176   1.1    pooka  * In order to notify the FW of the number of SSIDs we wish to scan (including
   5177   1.1    pooka  * the zero-length one), we need to set the corresponding bits in chan->type,
   5178   1.1    pooka  * one for each SSID, and set the active bit (first). If the first SSID is
   5179   1.1    pooka  * already included in the probe template, so we need to set only
   5180   1.1    pooka  * req->n_ssids - 1 bits in addition to the first bit.
   5181   1.1    pooka  */
   5182   1.4   nonaka static uint16_t
   5183  1.45   nonaka iwm_get_active_dwell(struct iwm_softc *sc, int flags, int n_ssids)
   5184   1.1    pooka {
   5185   1.1    pooka 	if (flags & IEEE80211_CHAN_2GHZ)
   5186   1.1    pooka 		return 30  + 3 * (n_ssids + 1);
   5187   1.1    pooka 	return 20  + 2 * (n_ssids + 1);
   5188   1.1    pooka }
   5189   1.1    pooka 
   5190   1.4   nonaka static uint16_t
   5191  1.45   nonaka iwm_get_passive_dwell(struct iwm_softc *sc, int flags)
   5192   1.1    pooka {
   5193   1.1    pooka 	return (flags & IEEE80211_CHAN_2GHZ) ? 100 + 20 : 100 + 10;
   5194   1.1    pooka }
   5195  1.45   nonaka #endif
   5196   1.1    pooka 
   5197  1.45   nonaka static uint8_t
   5198  1.45   nonaka iwm_lmac_scan_fill_channels(struct iwm_softc *sc,
   5199  1.45   nonaka     struct iwm_scan_channel_cfg_lmac *chan, int n_ssids)
   5200   1.1    pooka {
   5201   1.1    pooka 	struct ieee80211com *ic = &sc->sc_ic;
   5202   1.1    pooka 	struct ieee80211_channel *c;
   5203  1.45   nonaka 	uint8_t nchan;
   5204   1.1    pooka 
   5205  1.45   nonaka 	for (nchan = 0, c = &ic->ic_channels[1];
   5206  1.45   nonaka 	    c <= &ic->ic_channels[IEEE80211_CHAN_MAX] &&
   5207  1.45   nonaka 	    nchan < sc->sc_capa_n_scan_channels;
   5208  1.45   nonaka 	    c++) {
   5209  1.45   nonaka 		if (c->ic_flags == 0)
   5210  1.45   nonaka 			continue;
   5211  1.45   nonaka 
   5212  1.45   nonaka 		chan->channel_num = htole16(ieee80211_mhz2ieee(c->ic_freq, 0));
   5213  1.45   nonaka 		chan->iter_count = htole16(1);
   5214  1.61   nonaka 		chan->iter_interval = htole32(0);
   5215  1.45   nonaka 		chan->flags = htole32(IWM_UNIFIED_SCAN_CHANNEL_PARTIAL);
   5216  1.61   nonaka 		chan->flags |= htole32(IWM_SCAN_CHANNEL_NSSIDS(n_ssids));
   5217  1.61   nonaka 		if (!IEEE80211_IS_CHAN_PASSIVE(c) && n_ssids != 0)
   5218  1.61   nonaka 			chan->flags |= htole32(IWM_SCAN_CHANNEL_TYPE_ACTIVE);
   5219  1.45   nonaka 		chan++;
   5220  1.45   nonaka 		nchan++;
   5221  1.45   nonaka 	}
   5222  1.45   nonaka 
   5223  1.45   nonaka 	return nchan;
   5224  1.45   nonaka }
   5225  1.45   nonaka 
   5226  1.45   nonaka static uint8_t
   5227  1.45   nonaka iwm_umac_scan_fill_channels(struct iwm_softc *sc,
   5228  1.45   nonaka     struct iwm_scan_channel_cfg_umac *chan, int n_ssids)
   5229  1.45   nonaka {
   5230  1.45   nonaka 	struct ieee80211com *ic = &sc->sc_ic;
   5231  1.45   nonaka 	struct ieee80211_channel *c;
   5232  1.45   nonaka 	uint8_t nchan;
   5233   1.1    pooka 
   5234   1.1    pooka 	for (nchan = 0, c = &ic->ic_channels[1];
   5235  1.45   nonaka 	    c <= &ic->ic_channels[IEEE80211_CHAN_MAX] &&
   5236  1.45   nonaka 	    nchan < sc->sc_capa_n_scan_channels;
   5237   1.1    pooka 	    c++) {
   5238  1.45   nonaka 		if (c->ic_flags == 0)
   5239   1.1    pooka 			continue;
   5240  1.61   nonaka 
   5241  1.45   nonaka 		chan->channel_num = ieee80211_mhz2ieee(c->ic_freq, 0);
   5242  1.45   nonaka 		chan->iter_count = 1;
   5243  1.45   nonaka 		chan->iter_interval = htole16(0);
   5244  1.61   nonaka 		chan->flags = htole32(IWM_SCAN_CHANNEL_UMAC_NSSIDS(n_ssids));
   5245   1.1    pooka 		chan++;
   5246   1.1    pooka 		nchan++;
   5247   1.1    pooka 	}
   5248  1.45   nonaka 
   5249   1.1    pooka 	return nchan;
   5250   1.1    pooka }
   5251   1.1    pooka 
   5252  1.45   nonaka static int
   5253  1.45   nonaka iwm_fill_probe_req(struct iwm_softc *sc, struct iwm_scan_probe_req *preq)
   5254  1.45   nonaka {
   5255  1.45   nonaka 	struct ieee80211com *ic = &sc->sc_ic;
   5256  1.45   nonaka 	struct ieee80211_frame *wh = (struct ieee80211_frame *)preq->buf;
   5257  1.45   nonaka 	struct ieee80211_rateset *rs;
   5258  1.45   nonaka 	size_t remain = sizeof(preq->buf);
   5259  1.45   nonaka 	uint8_t *frm, *pos;
   5260  1.45   nonaka 
   5261  1.45   nonaka 	memset(preq, 0, sizeof(*preq));
   5262  1.45   nonaka 
   5263  1.45   nonaka 	if (remain < sizeof(*wh) + 2 + ic->ic_des_esslen)
   5264  1.45   nonaka 		return ENOBUFS;
   5265   1.1    pooka 
   5266  1.45   nonaka 	/*
   5267  1.45   nonaka 	 * Build a probe request frame.  Most of the following code is a
   5268  1.45   nonaka 	 * copy & paste of what is done in net80211.
   5269  1.45   nonaka 	 */
   5270  1.45   nonaka 	wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT |
   5271   1.1    pooka 	    IEEE80211_FC0_SUBTYPE_PROBE_REQ;
   5272  1.45   nonaka 	wh->i_fc[1] = IEEE80211_FC1_DIR_NODS;
   5273  1.45   nonaka 	IEEE80211_ADDR_COPY(wh->i_addr1, etherbroadcastaddr);
   5274  1.45   nonaka 	IEEE80211_ADDR_COPY(wh->i_addr2, ic->ic_myaddr);
   5275  1.45   nonaka 	IEEE80211_ADDR_COPY(wh->i_addr3, etherbroadcastaddr);
   5276  1.45   nonaka 	*(uint16_t *)&wh->i_dur[0] = 0;	/* filled by HW */
   5277  1.45   nonaka 	*(uint16_t *)&wh->i_seq[0] = 0;	/* filled by HW */
   5278  1.45   nonaka 
   5279  1.45   nonaka 	frm = (uint8_t *)(wh + 1);
   5280  1.45   nonaka 	frm = ieee80211_add_ssid(frm, ic->ic_des_essid, ic->ic_des_esslen);
   5281  1.45   nonaka 
   5282  1.45   nonaka 	/* Tell the firmware where the MAC header is. */
   5283  1.45   nonaka 	preq->mac_header.offset = 0;
   5284  1.45   nonaka 	preq->mac_header.len = htole16(frm - (uint8_t *)wh);
   5285  1.45   nonaka 	remain -= frm - (uint8_t *)wh;
   5286  1.45   nonaka 
   5287  1.45   nonaka 	/* Fill in 2GHz IEs and tell firmware where they are. */
   5288  1.45   nonaka 	rs = &ic->ic_sup_rates[IEEE80211_MODE_11G];
   5289  1.45   nonaka 	if (rs->rs_nrates > IEEE80211_RATE_SIZE) {
   5290  1.45   nonaka 		if (remain < 4 + rs->rs_nrates)
   5291  1.45   nonaka 			return ENOBUFS;
   5292  1.45   nonaka 	} else if (remain < 2 + rs->rs_nrates)
   5293  1.45   nonaka 		return ENOBUFS;
   5294  1.45   nonaka 	preq->band_data[0].offset = htole16(frm - (uint8_t *)wh);
   5295  1.45   nonaka 	pos = frm;
   5296  1.45   nonaka 	frm = ieee80211_add_rates(frm, rs);
   5297  1.45   nonaka 	if (rs->rs_nrates > IEEE80211_RATE_SIZE)
   5298  1.45   nonaka 		frm = ieee80211_add_xrates(frm, rs);
   5299  1.45   nonaka 	preq->band_data[0].len = htole16(frm - pos);
   5300  1.45   nonaka 	remain -= frm - pos;
   5301  1.45   nonaka 
   5302  1.45   nonaka 	if (isset(sc->sc_enabled_capa,
   5303  1.45   nonaka 	    IWM_UCODE_TLV_CAPA_DS_PARAM_SET_IE_SUPPORT)) {
   5304  1.45   nonaka 		if (remain < 3)
   5305  1.45   nonaka 			return ENOBUFS;
   5306  1.45   nonaka 		*frm++ = IEEE80211_ELEMID_DSPARMS;
   5307  1.45   nonaka 		*frm++ = 1;
   5308  1.45   nonaka 		*frm++ = 0;
   5309  1.45   nonaka 		remain -= 3;
   5310  1.45   nonaka 	}
   5311  1.45   nonaka 
   5312  1.45   nonaka 	if (sc->sc_nvm.sku_cap_band_52GHz_enable) {
   5313  1.45   nonaka 		/* Fill in 5GHz IEs. */
   5314  1.45   nonaka 		rs = &ic->ic_sup_rates[IEEE80211_MODE_11A];
   5315  1.45   nonaka 		if (rs->rs_nrates > IEEE80211_RATE_SIZE) {
   5316  1.45   nonaka 			if (remain < 4 + rs->rs_nrates)
   5317  1.45   nonaka 				return ENOBUFS;
   5318  1.45   nonaka 		} else if (remain < 2 + rs->rs_nrates)
   5319  1.45   nonaka 			return ENOBUFS;
   5320  1.45   nonaka 		preq->band_data[1].offset = htole16(frm - (uint8_t *)wh);
   5321  1.45   nonaka 		pos = frm;
   5322  1.45   nonaka 		frm = ieee80211_add_rates(frm, rs);
   5323  1.45   nonaka 		if (rs->rs_nrates > IEEE80211_RATE_SIZE)
   5324  1.45   nonaka 			frm = ieee80211_add_xrates(frm, rs);
   5325  1.45   nonaka 		preq->band_data[1].len = htole16(frm - pos);
   5326  1.45   nonaka 		remain -= frm - pos;
   5327  1.45   nonaka 	}
   5328  1.45   nonaka 
   5329  1.45   nonaka #ifndef IEEE80211_NO_HT
   5330  1.45   nonaka 	/* Send 11n IEs on both 2GHz and 5GHz bands. */
   5331  1.45   nonaka 	preq->common_data.offset = htole16(frm - (uint8_t *)wh);
   5332  1.45   nonaka 	pos = frm;
   5333  1.45   nonaka 	if (ic->ic_flags & IEEE80211_F_HTON) {
   5334  1.45   nonaka 		if (remain < 28)
   5335  1.45   nonaka 			return ENOBUFS;
   5336  1.45   nonaka 		frm = ieee80211_add_htcaps(frm, ic);
   5337  1.45   nonaka 		/* XXX add WME info? */
   5338  1.45   nonaka 	}
   5339  1.45   nonaka #endif
   5340  1.45   nonaka 
   5341  1.45   nonaka 	preq->common_data.len = htole16(frm - pos);
   5342  1.45   nonaka 
   5343  1.45   nonaka 	return 0;
   5344  1.45   nonaka }
   5345  1.45   nonaka 
   5346  1.45   nonaka static int
   5347  1.45   nonaka iwm_lmac_scan(struct iwm_softc *sc)
   5348  1.45   nonaka {
   5349  1.45   nonaka 	struct ieee80211com *ic = &sc->sc_ic;
   5350  1.45   nonaka 	struct iwm_host_cmd hcmd = {
   5351  1.45   nonaka 		.id = IWM_SCAN_OFFLOAD_REQUEST_CMD,
   5352  1.45   nonaka 		.len = { 0, },
   5353  1.45   nonaka 		.data = { NULL, },
   5354  1.45   nonaka 		.flags = 0,
   5355  1.45   nonaka 	};
   5356  1.45   nonaka 	struct iwm_scan_req_lmac *req;
   5357  1.45   nonaka 	size_t req_len;
   5358  1.45   nonaka 	int err;
   5359  1.45   nonaka 
   5360  1.45   nonaka 	DPRINTF(("%s: %s\n", DEVNAME(sc), __func__));
   5361  1.45   nonaka 
   5362  1.45   nonaka 	req_len = sizeof(struct iwm_scan_req_lmac) +
   5363  1.45   nonaka 	    (sizeof(struct iwm_scan_channel_cfg_lmac) *
   5364  1.45   nonaka 	    sc->sc_capa_n_scan_channels) + sizeof(struct iwm_scan_probe_req);
   5365  1.45   nonaka 	if (req_len > IWM_MAX_CMD_PAYLOAD_SIZE)
   5366  1.45   nonaka 		return ENOMEM;
   5367  1.45   nonaka 	req = kmem_zalloc(req_len, KM_SLEEP);
   5368  1.45   nonaka 	if (req == NULL)
   5369  1.45   nonaka 		return ENOMEM;
   5370  1.45   nonaka 
   5371  1.45   nonaka 	hcmd.len[0] = (uint16_t)req_len;
   5372  1.45   nonaka 	hcmd.data[0] = (void *)req;
   5373  1.45   nonaka 
   5374  1.45   nonaka 	/* These timings correspond to iwlwifi's UNASSOC scan. */
   5375  1.45   nonaka 	req->active_dwell = 10;
   5376  1.45   nonaka 	req->passive_dwell = 110;
   5377  1.45   nonaka 	req->fragmented_dwell = 44;
   5378  1.45   nonaka 	req->extended_dwell = 90;
   5379  1.45   nonaka 	req->max_out_time = 0;
   5380  1.45   nonaka 	req->suspend_time = 0;
   5381  1.45   nonaka 
   5382  1.45   nonaka 	req->scan_prio = htole32(IWM_SCAN_PRIORITY_HIGH);
   5383  1.45   nonaka 	req->rx_chain_select = iwm_scan_rx_chain(sc);
   5384  1.45   nonaka 	req->iter_num = htole32(1);
   5385  1.45   nonaka 	req->delay = 0;
   5386  1.45   nonaka 
   5387  1.45   nonaka 	req->scan_flags = htole32(IWM_LMAC_SCAN_FLAG_PASS_ALL |
   5388  1.45   nonaka 	    IWM_LMAC_SCAN_FLAG_ITER_COMPLETE |
   5389  1.45   nonaka 	    IWM_LMAC_SCAN_FLAG_EXTENDED_DWELL);
   5390  1.45   nonaka 	if (ic->ic_des_esslen == 0)
   5391  1.45   nonaka 		req->scan_flags |= htole32(IWM_LMAC_SCAN_FLAG_PASSIVE);
   5392  1.45   nonaka 	else
   5393  1.45   nonaka 		req->scan_flags |= htole32(IWM_LMAC_SCAN_FLAG_PRE_CONNECTION);
   5394  1.45   nonaka 	if (isset(sc->sc_enabled_capa,
   5395  1.45   nonaka 	    IWM_UCODE_TLV_CAPA_DS_PARAM_SET_IE_SUPPORT))
   5396  1.45   nonaka 		req->scan_flags |= htole32(IWM_LMAC_SCAN_FLAGS_RRM_ENABLED);
   5397  1.45   nonaka 
   5398  1.45   nonaka 	req->flags = htole32(IWM_PHY_BAND_24);
   5399  1.45   nonaka 	if (sc->sc_nvm.sku_cap_band_52GHz_enable)
   5400  1.45   nonaka 		req->flags |= htole32(IWM_PHY_BAND_5);
   5401  1.45   nonaka 	req->filter_flags =
   5402  1.45   nonaka 	    htole32(IWM_MAC_FILTER_ACCEPT_GRP | IWM_MAC_FILTER_IN_BEACON);
   5403  1.45   nonaka 
   5404  1.45   nonaka 	/* Tx flags 2 GHz. */
   5405  1.45   nonaka 	req->tx_cmd[0].tx_flags = htole32(IWM_TX_CMD_FLG_SEQ_CTL |
   5406  1.45   nonaka 	    IWM_TX_CMD_FLG_BT_DIS);
   5407  1.45   nonaka 	req->tx_cmd[0].rate_n_flags =
   5408  1.45   nonaka 	    iwm_scan_rate_n_flags(sc, IEEE80211_CHAN_2GHZ, 1/*XXX*/);
   5409  1.45   nonaka 	req->tx_cmd[0].sta_id = IWM_AUX_STA_ID;
   5410  1.45   nonaka 
   5411  1.45   nonaka 	/* Tx flags 5 GHz. */
   5412  1.45   nonaka 	req->tx_cmd[1].tx_flags = htole32(IWM_TX_CMD_FLG_SEQ_CTL |
   5413  1.45   nonaka 	    IWM_TX_CMD_FLG_BT_DIS);
   5414  1.45   nonaka 	req->tx_cmd[1].rate_n_flags =
   5415  1.45   nonaka 	    iwm_scan_rate_n_flags(sc, IEEE80211_CHAN_5GHZ, 1/*XXX*/);
   5416  1.45   nonaka 	req->tx_cmd[1].sta_id = IWM_AUX_STA_ID;
   5417  1.45   nonaka 
   5418  1.45   nonaka 	/* Check if we're doing an active directed scan. */
   5419  1.45   nonaka 	if (ic->ic_des_esslen != 0) {
   5420  1.45   nonaka 		req->direct_scan[0].id = IEEE80211_ELEMID_SSID;
   5421  1.45   nonaka 		req->direct_scan[0].len = ic->ic_des_esslen;
   5422  1.45   nonaka 		memcpy(req->direct_scan[0].ssid, ic->ic_des_essid,
   5423  1.45   nonaka 		    ic->ic_des_esslen);
   5424  1.45   nonaka 	}
   5425  1.45   nonaka 
   5426  1.45   nonaka 	req->n_channels = iwm_lmac_scan_fill_channels(sc,
   5427  1.45   nonaka 	    (struct iwm_scan_channel_cfg_lmac *)req->data,
   5428  1.45   nonaka 	    ic->ic_des_esslen != 0);
   5429  1.45   nonaka 
   5430  1.45   nonaka 	err = iwm_fill_probe_req(sc,
   5431  1.45   nonaka 	    (struct iwm_scan_probe_req *)(req->data +
   5432  1.45   nonaka 	    (sizeof(struct iwm_scan_channel_cfg_lmac) *
   5433  1.45   nonaka 	     sc->sc_capa_n_scan_channels)));
   5434  1.45   nonaka 	if (err) {
   5435  1.45   nonaka 		kmem_free(req, req_len);
   5436  1.45   nonaka 		return err;
   5437   1.1    pooka 	}
   5438   1.1    pooka 
   5439  1.45   nonaka 	/* Specify the scan plan: We'll do one iteration. */
   5440  1.45   nonaka 	req->schedule[0].iterations = 1;
   5441  1.45   nonaka 	req->schedule[0].full_scan_mul = 1;
   5442   1.1    pooka 
   5443  1.45   nonaka 	/* Disable EBS. */
   5444  1.45   nonaka 	req->channel_opt[0].non_ebs_ratio = 1;
   5445  1.45   nonaka 	req->channel_opt[1].non_ebs_ratio = 1;
   5446   1.1    pooka 
   5447  1.45   nonaka 	err = iwm_send_cmd(sc, &hcmd);
   5448  1.45   nonaka 	kmem_free(req, req_len);
   5449  1.45   nonaka 	return err;
   5450  1.45   nonaka }
   5451  1.45   nonaka 
   5452  1.45   nonaka static int
   5453  1.45   nonaka iwm_config_umac_scan(struct iwm_softc *sc)
   5454  1.45   nonaka {
   5455  1.45   nonaka 	struct ieee80211com *ic = &sc->sc_ic;
   5456  1.45   nonaka 	struct iwm_scan_config *scan_config;
   5457  1.45   nonaka 	int err, nchan;
   5458  1.45   nonaka 	size_t cmd_size;
   5459  1.45   nonaka 	struct ieee80211_channel *c;
   5460  1.45   nonaka 	struct iwm_host_cmd hcmd = {
   5461  1.45   nonaka 		.id = iwm_cmd_id(IWM_SCAN_CFG_CMD, IWM_ALWAYS_LONG_GROUP, 0),
   5462  1.45   nonaka 		.flags = 0,
   5463  1.45   nonaka 	};
   5464  1.45   nonaka 	static const uint32_t rates = (IWM_SCAN_CONFIG_RATE_1M |
   5465  1.45   nonaka 	    IWM_SCAN_CONFIG_RATE_2M | IWM_SCAN_CONFIG_RATE_5M |
   5466  1.45   nonaka 	    IWM_SCAN_CONFIG_RATE_11M | IWM_SCAN_CONFIG_RATE_6M |
   5467  1.45   nonaka 	    IWM_SCAN_CONFIG_RATE_9M | IWM_SCAN_CONFIG_RATE_12M |
   5468  1.45   nonaka 	    IWM_SCAN_CONFIG_RATE_18M | IWM_SCAN_CONFIG_RATE_24M |
   5469  1.45   nonaka 	    IWM_SCAN_CONFIG_RATE_36M | IWM_SCAN_CONFIG_RATE_48M |
   5470  1.45   nonaka 	    IWM_SCAN_CONFIG_RATE_54M);
   5471  1.45   nonaka 
   5472  1.45   nonaka 	cmd_size = sizeof(*scan_config) + sc->sc_capa_n_scan_channels;
   5473  1.45   nonaka 
   5474  1.45   nonaka 	scan_config = kmem_zalloc(cmd_size, KM_SLEEP);
   5475  1.45   nonaka 	if (scan_config == NULL)
   5476  1.45   nonaka 		return ENOMEM;
   5477  1.45   nonaka 
   5478  1.45   nonaka 	scan_config->tx_chains = htole32(iwm_fw_valid_tx_ant(sc));
   5479  1.45   nonaka 	scan_config->rx_chains = htole32(iwm_fw_valid_rx_ant(sc));
   5480  1.45   nonaka 	scan_config->legacy_rates = htole32(rates |
   5481  1.45   nonaka 	    IWM_SCAN_CONFIG_SUPPORTED_RATE(rates));
   5482  1.45   nonaka 
   5483  1.45   nonaka 	/* These timings correspond to iwlwifi's UNASSOC scan. */
   5484  1.45   nonaka 	scan_config->dwell_active = 10;
   5485  1.45   nonaka 	scan_config->dwell_passive = 110;
   5486  1.45   nonaka 	scan_config->dwell_fragmented = 44;
   5487  1.45   nonaka 	scan_config->dwell_extended = 90;
   5488  1.45   nonaka 	scan_config->out_of_channel_time = htole32(0);
   5489  1.45   nonaka 	scan_config->suspend_time = htole32(0);
   5490  1.45   nonaka 
   5491  1.45   nonaka 	IEEE80211_ADDR_COPY(scan_config->mac_addr, sc->sc_ic.ic_myaddr);
   5492  1.45   nonaka 
   5493  1.45   nonaka 	scan_config->bcast_sta_id = IWM_AUX_STA_ID;
   5494  1.45   nonaka 	scan_config->channel_flags = IWM_CHANNEL_FLAG_EBS |
   5495  1.45   nonaka 	    IWM_CHANNEL_FLAG_ACCURATE_EBS | IWM_CHANNEL_FLAG_EBS_ADD |
   5496  1.45   nonaka 	    IWM_CHANNEL_FLAG_PRE_SCAN_PASSIVE2ACTIVE;
   5497  1.45   nonaka 
   5498  1.45   nonaka 	for (c = &ic->ic_channels[1], nchan = 0;
   5499  1.45   nonaka 	    c <= &ic->ic_channels[IEEE80211_CHAN_MAX] &&
   5500  1.45   nonaka 	    nchan < sc->sc_capa_n_scan_channels; c++) {
   5501  1.45   nonaka 		if (c->ic_flags == 0)
   5502  1.45   nonaka 			continue;
   5503  1.45   nonaka 		scan_config->channel_array[nchan++] =
   5504  1.45   nonaka 		    ieee80211_mhz2ieee(c->ic_freq, 0);
   5505   1.1    pooka 	}
   5506   1.1    pooka 
   5507  1.45   nonaka 	scan_config->flags = htole32(IWM_SCAN_CONFIG_FLAG_ACTIVATE |
   5508  1.45   nonaka 	    IWM_SCAN_CONFIG_FLAG_ALLOW_CHUB_REQS |
   5509  1.45   nonaka 	    IWM_SCAN_CONFIG_FLAG_SET_TX_CHAINS |
   5510  1.45   nonaka 	    IWM_SCAN_CONFIG_FLAG_SET_RX_CHAINS |
   5511  1.45   nonaka 	    IWM_SCAN_CONFIG_FLAG_SET_AUX_STA_ID |
   5512  1.45   nonaka 	    IWM_SCAN_CONFIG_FLAG_SET_ALL_TIMES |
   5513  1.45   nonaka 	    IWM_SCAN_CONFIG_FLAG_SET_LEGACY_RATES |
   5514  1.45   nonaka 	    IWM_SCAN_CONFIG_FLAG_SET_MAC_ADDR |
   5515  1.45   nonaka 	    IWM_SCAN_CONFIG_FLAG_SET_CHANNEL_FLAGS|
   5516  1.45   nonaka 	    IWM_SCAN_CONFIG_N_CHANNELS(nchan) |
   5517  1.45   nonaka 	    IWM_SCAN_CONFIG_FLAG_CLEAR_FRAGMENTED);
   5518  1.45   nonaka 
   5519  1.45   nonaka 	hcmd.data[0] = scan_config;
   5520  1.45   nonaka 	hcmd.len[0] = cmd_size;
   5521  1.45   nonaka 
   5522  1.45   nonaka 	err = iwm_send_cmd(sc, &hcmd);
   5523  1.45   nonaka 	kmem_free(scan_config, cmd_size);
   5524  1.45   nonaka 	return err;
   5525   1.1    pooka }
   5526   1.1    pooka 
   5527   1.4   nonaka static int
   5528  1.45   nonaka iwm_umac_scan(struct iwm_softc *sc)
   5529   1.1    pooka {
   5530   1.1    pooka 	struct ieee80211com *ic = &sc->sc_ic;
   5531   1.1    pooka 	struct iwm_host_cmd hcmd = {
   5532  1.45   nonaka 		.id = iwm_cmd_id(IWM_SCAN_REQ_UMAC, IWM_ALWAYS_LONG_GROUP, 0),
   5533   1.1    pooka 		.len = { 0, },
   5534  1.45   nonaka 		.data = { NULL, },
   5535  1.45   nonaka 		.flags = 0,
   5536   1.1    pooka 	};
   5537  1.45   nonaka 	struct iwm_scan_req_umac *req;
   5538  1.45   nonaka 	struct iwm_scan_req_umac_tail *tail;
   5539  1.45   nonaka 	size_t req_len;
   5540  1.45   nonaka 	int err;
   5541   1.1    pooka 
   5542  1.45   nonaka 	DPRINTF(("%s: %s\n", DEVNAME(sc), __func__));
   5543   1.1    pooka 
   5544  1.45   nonaka 	req_len = sizeof(struct iwm_scan_req_umac) +
   5545  1.45   nonaka 	    (sizeof(struct iwm_scan_channel_cfg_umac) *
   5546  1.45   nonaka 	    sc->sc_capa_n_scan_channels) +
   5547  1.45   nonaka 	    sizeof(struct iwm_scan_req_umac_tail);
   5548  1.45   nonaka 	if (req_len > IWM_MAX_CMD_PAYLOAD_SIZE)
   5549  1.45   nonaka 		return ENOMEM;
   5550  1.45   nonaka 	req = kmem_zalloc(req_len, KM_SLEEP);
   5551  1.45   nonaka 	if (req == NULL)
   5552  1.45   nonaka 		return ENOMEM;
   5553   1.1    pooka 
   5554  1.45   nonaka 	hcmd.len[0] = (uint16_t)req_len;
   5555  1.45   nonaka 	hcmd.data[0] = (void *)req;
   5556   1.1    pooka 
   5557  1.45   nonaka 	/* These timings correspond to iwlwifi's UNASSOC scan. */
   5558  1.45   nonaka 	req->active_dwell = 10;
   5559  1.45   nonaka 	req->passive_dwell = 110;
   5560  1.45   nonaka 	req->fragmented_dwell = 44;
   5561  1.45   nonaka 	req->extended_dwell = 90;
   5562  1.45   nonaka 	req->max_out_time = 0;
   5563  1.45   nonaka 	req->suspend_time = 0;
   5564  1.45   nonaka 
   5565  1.45   nonaka 	req->scan_priority = htole32(IWM_SCAN_PRIORITY_HIGH);
   5566  1.45   nonaka 	req->ooc_priority = htole32(IWM_SCAN_PRIORITY_HIGH);
   5567  1.45   nonaka 
   5568  1.45   nonaka 	req->n_channels = iwm_umac_scan_fill_channels(sc,
   5569  1.45   nonaka 	    (struct iwm_scan_channel_cfg_umac *)req->data,
   5570  1.45   nonaka 	    ic->ic_des_esslen != 0);
   5571  1.45   nonaka 
   5572  1.45   nonaka 	req->general_flags = htole32(IWM_UMAC_SCAN_GEN_FLAGS_PASS_ALL |
   5573  1.45   nonaka 	    IWM_UMAC_SCAN_GEN_FLAGS_ITER_COMPLETE |
   5574  1.45   nonaka 	    IWM_UMAC_SCAN_GEN_FLAGS_EXTENDED_DWELL);
   5575  1.45   nonaka 
   5576  1.45   nonaka 	tail = (struct iwm_scan_req_umac_tail *)(req->data +
   5577  1.45   nonaka 		sizeof(struct iwm_scan_channel_cfg_umac) *
   5578  1.45   nonaka 			sc->sc_capa_n_scan_channels);
   5579  1.45   nonaka 
   5580  1.45   nonaka 	/* Check if we're doing an active directed scan. */
   5581  1.45   nonaka 	if (ic->ic_des_esslen != 0) {
   5582  1.45   nonaka 		tail->direct_scan[0].id = IEEE80211_ELEMID_SSID;
   5583  1.45   nonaka 		tail->direct_scan[0].len = ic->ic_des_esslen;
   5584  1.45   nonaka 		memcpy(tail->direct_scan[0].ssid, ic->ic_des_essid,
   5585  1.45   nonaka 		    ic->ic_des_esslen);
   5586  1.45   nonaka 		req->general_flags |=
   5587  1.45   nonaka 		    htole32(IWM_UMAC_SCAN_GEN_FLAGS_PRE_CONNECT);
   5588  1.45   nonaka 	} else
   5589  1.45   nonaka 		req->general_flags |= htole32(IWM_UMAC_SCAN_GEN_FLAGS_PASSIVE);
   5590   1.1    pooka 
   5591  1.45   nonaka 	if (isset(sc->sc_enabled_capa,
   5592  1.45   nonaka 	    IWM_UCODE_TLV_CAPA_DS_PARAM_SET_IE_SUPPORT))
   5593  1.45   nonaka 		req->general_flags |=
   5594  1.45   nonaka 		    htole32(IWM_UMAC_SCAN_GEN_FLAGS_RRM_ENABLED);
   5595   1.1    pooka 
   5596  1.45   nonaka 	err = iwm_fill_probe_req(sc, &tail->preq);
   5597  1.45   nonaka 	if (err) {
   5598  1.45   nonaka 		kmem_free(req, req_len);
   5599  1.45   nonaka 		return err;
   5600   1.1    pooka 	}
   5601   1.1    pooka 
   5602  1.45   nonaka 	/* Specify the scan plan: We'll do one iteration. */
   5603  1.45   nonaka 	tail->schedule[0].interval = 0;
   5604  1.45   nonaka 	tail->schedule[0].iter_count = 1;
   5605  1.45   nonaka 
   5606  1.45   nonaka 	err = iwm_send_cmd(sc, &hcmd);
   5607  1.45   nonaka 	kmem_free(req, req_len);
   5608  1.45   nonaka 	return err;
   5609   1.1    pooka }
   5610   1.1    pooka 
   5611  1.45   nonaka static uint8_t
   5612  1.45   nonaka iwm_ridx2rate(struct ieee80211_rateset *rs, int ridx)
   5613  1.45   nonaka {
   5614  1.45   nonaka 	int i;
   5615  1.45   nonaka 	uint8_t rval;
   5616   1.1    pooka 
   5617  1.45   nonaka 	for (i = 0; i < rs->rs_nrates; i++) {
   5618  1.45   nonaka 		rval = (rs->rs_rates[i] & IEEE80211_RATE_VAL);
   5619  1.45   nonaka 		if (rval == iwm_rates[ridx].rate)
   5620  1.45   nonaka 			return rs->rs_rates[i];
   5621  1.45   nonaka 	}
   5622  1.45   nonaka 	return 0;
   5623  1.45   nonaka }
   5624   1.1    pooka 
   5625   1.4   nonaka static void
   5626  1.45   nonaka iwm_ack_rates(struct iwm_softc *sc, struct iwm_node *in, int *cck_rates,
   5627  1.45   nonaka     int *ofdm_rates)
   5628   1.1    pooka {
   5629  1.24   nonaka 	struct ieee80211_node *ni = &in->in_ni;
   5630  1.45   nonaka 	struct ieee80211_rateset *rs = &ni->ni_rates;
   5631  1.56   nonaka 	int lowest_present_ofdm = -1;
   5632  1.56   nonaka 	int lowest_present_cck = -1;
   5633   1.1    pooka 	uint8_t cck = 0;
   5634   1.1    pooka 	uint8_t ofdm = 0;
   5635   1.1    pooka 	int i;
   5636   1.1    pooka 
   5637  1.45   nonaka 	if (ni->ni_chan == IEEE80211_CHAN_ANYC ||
   5638  1.45   nonaka 	    IEEE80211_IS_CHAN_2GHZ(ni->ni_chan)) {
   5639  1.45   nonaka 		for (i = IWM_FIRST_CCK_RATE; i < IWM_FIRST_OFDM_RATE; i++) {
   5640  1.45   nonaka 			if ((iwm_ridx2rate(rs, i) & IEEE80211_RATE_BASIC) == 0)
   5641  1.45   nonaka 				continue;
   5642  1.24   nonaka 			cck |= (1 << i);
   5643  1.56   nonaka 			if (lowest_present_cck == -1 || lowest_present_cck > i)
   5644  1.24   nonaka 				lowest_present_cck = i;
   5645  1.24   nonaka 		}
   5646   1.1    pooka 	}
   5647   1.1    pooka 	for (i = IWM_FIRST_OFDM_RATE; i <= IWM_LAST_NON_HT_RATE; i++) {
   5648  1.45   nonaka 		if ((iwm_ridx2rate(rs, i) & IEEE80211_RATE_BASIC) == 0)
   5649  1.45   nonaka 			continue;
   5650  1.45   nonaka 		ofdm |= (1 << (i - IWM_FIRST_OFDM_RATE));
   5651  1.56   nonaka 		if (lowest_present_ofdm == -1 || lowest_present_ofdm > i)
   5652  1.20   nonaka 			lowest_present_ofdm = i;
   5653   1.1    pooka 	}
   5654   1.1    pooka 
   5655   1.1    pooka 	/*
   5656   1.1    pooka 	 * Now we've got the basic rates as bitmaps in the ofdm and cck
   5657   1.1    pooka 	 * variables. This isn't sufficient though, as there might not
   5658   1.1    pooka 	 * be all the right rates in the bitmap. E.g. if the only basic
   5659   1.1    pooka 	 * rates are 5.5 Mbps and 11 Mbps, we still need to add 1 Mbps
   5660   1.1    pooka 	 * and 6 Mbps because the 802.11-2007 standard says in 9.6:
   5661   1.1    pooka 	 *
   5662   1.1    pooka 	 *    [...] a STA responding to a received frame shall transmit
   5663   1.1    pooka 	 *    its Control Response frame [...] at the highest rate in the
   5664   1.1    pooka 	 *    BSSBasicRateSet parameter that is less than or equal to the
   5665   1.1    pooka 	 *    rate of the immediately previous frame in the frame exchange
   5666   1.1    pooka 	 *    sequence ([...]) and that is of the same modulation class
   5667   1.1    pooka 	 *    ([...]) as the received frame. If no rate contained in the
   5668   1.1    pooka 	 *    BSSBasicRateSet parameter meets these conditions, then the
   5669   1.1    pooka 	 *    control frame sent in response to a received frame shall be
   5670   1.1    pooka 	 *    transmitted at the highest mandatory rate of the PHY that is
   5671   1.1    pooka 	 *    less than or equal to the rate of the received frame, and
   5672   1.1    pooka 	 *    that is of the same modulation class as the received frame.
   5673   1.1    pooka 	 *
   5674   1.1    pooka 	 * As a consequence, we need to add all mandatory rates that are
   5675   1.1    pooka 	 * lower than all of the basic rates to these bitmaps.
   5676   1.1    pooka 	 */
   5677   1.1    pooka 
   5678   1.1    pooka 	if (IWM_RATE_24M_INDEX < lowest_present_ofdm)
   5679   1.1    pooka 		ofdm |= IWM_RATE_BIT_MSK(24) >> IWM_FIRST_OFDM_RATE;
   5680   1.1    pooka 	if (IWM_RATE_12M_INDEX < lowest_present_ofdm)
   5681   1.1    pooka 		ofdm |= IWM_RATE_BIT_MSK(12) >> IWM_FIRST_OFDM_RATE;
   5682   1.1    pooka 	/* 6M already there or needed so always add */
   5683   1.1    pooka 	ofdm |= IWM_RATE_BIT_MSK(6) >> IWM_FIRST_OFDM_RATE;
   5684   1.1    pooka 
   5685   1.1    pooka 	/*
   5686   1.1    pooka 	 * CCK is a bit more complex with DSSS vs. HR/DSSS vs. ERP.
   5687   1.1    pooka 	 * Note, however:
   5688   1.1    pooka 	 *  - if no CCK rates are basic, it must be ERP since there must
   5689   1.1    pooka 	 *    be some basic rates at all, so they're OFDM => ERP PHY
   5690   1.1    pooka 	 *    (or we're in 5 GHz, and the cck bitmap will never be used)
   5691   1.1    pooka 	 *  - if 11M is a basic rate, it must be ERP as well, so add 5.5M
   5692   1.1    pooka 	 *  - if 5.5M is basic, 1M and 2M are mandatory
   5693   1.1    pooka 	 *  - if 2M is basic, 1M is mandatory
   5694   1.1    pooka 	 *  - if 1M is basic, that's the only valid ACK rate.
   5695   1.1    pooka 	 * As a consequence, it's not as complicated as it sounds, just add
   5696   1.1    pooka 	 * any lower rates to the ACK rate bitmap.
   5697   1.1    pooka 	 */
   5698   1.1    pooka 	if (IWM_RATE_11M_INDEX < lowest_present_cck)
   5699   1.1    pooka 		cck |= IWM_RATE_BIT_MSK(11) >> IWM_FIRST_CCK_RATE;
   5700   1.1    pooka 	if (IWM_RATE_5M_INDEX < lowest_present_cck)
   5701   1.1    pooka 		cck |= IWM_RATE_BIT_MSK(5) >> IWM_FIRST_CCK_RATE;
   5702   1.1    pooka 	if (IWM_RATE_2M_INDEX < lowest_present_cck)
   5703   1.1    pooka 		cck |= IWM_RATE_BIT_MSK(2) >> IWM_FIRST_CCK_RATE;
   5704   1.1    pooka 	/* 1M already there or needed so always add */
   5705   1.1    pooka 	cck |= IWM_RATE_BIT_MSK(1) >> IWM_FIRST_CCK_RATE;
   5706   1.1    pooka 
   5707   1.1    pooka 	*cck_rates = cck;
   5708   1.1    pooka 	*ofdm_rates = ofdm;
   5709   1.1    pooka }
   5710   1.1    pooka 
   5711   1.4   nonaka static void
   5712  1.45   nonaka iwm_mac_ctxt_cmd_common(struct iwm_softc *sc, struct iwm_node *in,
   5713  1.45   nonaka     struct iwm_mac_ctx_cmd *cmd, uint32_t action, int assoc)
   5714   1.1    pooka {
   5715  1.45   nonaka #define IWM_EXP2(x)	((1 << (x)) - 1)	/* CWmin = 2^ECWmin - 1 */
   5716   1.1    pooka 	struct ieee80211com *ic = &sc->sc_ic;
   5717   1.1    pooka 	struct ieee80211_node *ni = ic->ic_bss;
   5718   1.1    pooka 	int cck_ack_rates, ofdm_ack_rates;
   5719   1.1    pooka 	int i;
   5720   1.1    pooka 
   5721   1.1    pooka 	cmd->id_and_color = htole32(IWM_FW_CMD_ID_AND_COLOR(in->in_id,
   5722   1.1    pooka 	    in->in_color));
   5723   1.1    pooka 	cmd->action = htole32(action);
   5724   1.1    pooka 
   5725   1.1    pooka 	cmd->mac_type = htole32(IWM_FW_MAC_TYPE_BSS_STA);
   5726  1.45   nonaka 	cmd->tsf_id = htole32(IWM_TSF_ID_A);
   5727   1.1    pooka 
   5728   1.1    pooka 	IEEE80211_ADDR_COPY(cmd->node_addr, ic->ic_myaddr);
   5729  1.45   nonaka 	IEEE80211_ADDR_COPY(cmd->bssid_addr, ni->ni_bssid);
   5730  1.45   nonaka 
   5731  1.45   nonaka 	iwm_ack_rates(sc, in, &cck_ack_rates, &ofdm_ack_rates);
   5732   1.1    pooka 	cmd->cck_rates = htole32(cck_ack_rates);
   5733   1.1    pooka 	cmd->ofdm_rates = htole32(ofdm_ack_rates);
   5734   1.1    pooka 
   5735   1.1    pooka 	cmd->cck_short_preamble
   5736   1.1    pooka 	    = htole32((ic->ic_flags & IEEE80211_F_SHPREAMBLE)
   5737   1.1    pooka 	      ? IWM_MAC_FLG_SHORT_PREAMBLE : 0);
   5738   1.1    pooka 	cmd->short_slot
   5739   1.1    pooka 	    = htole32((ic->ic_flags & IEEE80211_F_SHSLOT)
   5740   1.1    pooka 	      ? IWM_MAC_FLG_SHORT_SLOT : 0);
   5741   1.1    pooka 
   5742  1.45   nonaka 	for (i = 0; i < WME_NUM_AC; i++) {
   5743  1.45   nonaka 		struct wmeParams *wmep = &ic->ic_wme.wme_params[i];
   5744  1.45   nonaka 		int txf = iwm_ac_to_tx_fifo[i];
   5745  1.45   nonaka 
   5746  1.45   nonaka 		cmd->ac[txf].cw_min = htole16(IWM_EXP2(wmep->wmep_logcwmin));
   5747  1.45   nonaka 		cmd->ac[txf].cw_max = htole16(IWM_EXP2(wmep->wmep_logcwmax));
   5748  1.45   nonaka 		cmd->ac[txf].aifsn = wmep->wmep_aifsn;
   5749   1.1    pooka 		cmd->ac[txf].fifos_mask = (1 << txf);
   5750  1.45   nonaka 		cmd->ac[txf].edca_txop = htole16(wmep->wmep_txopLimit * 32);
   5751   1.1    pooka 	}
   5752  1.45   nonaka 	if (ni->ni_flags & IEEE80211_NODE_QOS)
   5753  1.45   nonaka 		cmd->qos_flags |= htole32(IWM_MAC_QOS_FLG_UPDATE_EDCA);
   5754   1.1    pooka 
   5755  1.45   nonaka #ifndef IEEE80211_NO_HT
   5756  1.45   nonaka 	if (ni->ni_flags & IEEE80211_NODE_HT) {
   5757  1.45   nonaka 		enum ieee80211_htprot htprot =
   5758  1.45   nonaka 		    (ni->ni_htop1 & IEEE80211_HTOP1_PROT_MASK);
   5759  1.45   nonaka 		switch (htprot) {
   5760  1.45   nonaka 		case IEEE80211_HTPROT_NONE:
   5761  1.45   nonaka 			break;
   5762  1.45   nonaka 		case IEEE80211_HTPROT_NONMEMBER:
   5763  1.45   nonaka 		case IEEE80211_HTPROT_NONHT_MIXED:
   5764  1.45   nonaka 			cmd->protection_flags |=
   5765  1.45   nonaka 			    htole32(IWM_MAC_PROT_FLG_HT_PROT);
   5766  1.45   nonaka 		case IEEE80211_HTPROT_20MHZ:
   5767  1.45   nonaka 			cmd->protection_flags |=
   5768  1.45   nonaka 			    htole32(IWM_MAC_PROT_FLG_HT_PROT |
   5769  1.45   nonaka 			    IWM_MAC_PROT_FLG_FAT_PROT);
   5770  1.45   nonaka 			break;
   5771  1.45   nonaka 		default:
   5772  1.45   nonaka 			break;
   5773  1.45   nonaka 		}
   5774   1.1    pooka 
   5775  1.45   nonaka 		cmd->qos_flags |= htole32(IWM_MAC_QOS_FLG_TGN);
   5776   1.1    pooka 	}
   5777  1.45   nonaka #endif
   5778   1.1    pooka 
   5779  1.45   nonaka 	if (ic->ic_flags & IEEE80211_F_USEPROT)
   5780  1.45   nonaka 		cmd->protection_flags |= htole32(IWM_MAC_PROT_FLG_TGG_PROTECT);
   5781   1.1    pooka 
   5782  1.45   nonaka 	cmd->filter_flags = htole32(IWM_MAC_FILTER_ACCEPT_GRP);
   5783  1.45   nonaka #undef IWM_EXP2
   5784   1.1    pooka }
   5785   1.1    pooka 
   5786  1.45   nonaka static void
   5787  1.45   nonaka iwm_mac_ctxt_cmd_fill_sta(struct iwm_softc *sc, struct iwm_node *in,
   5788  1.45   nonaka     struct iwm_mac_data_sta *sta, int assoc)
   5789   1.1    pooka {
   5790  1.45   nonaka 	struct ieee80211_node *ni = &in->in_ni;
   5791  1.45   nonaka 	uint32_t dtim_off;
   5792  1.45   nonaka 	uint64_t tsf;
   5793   1.1    pooka 
   5794  1.45   nonaka 	dtim_off = ni->ni_dtim_count * ni->ni_intval * IEEE80211_DUR_TU;
   5795  1.45   nonaka 	tsf = le64toh(ni->ni_tstamp.tsf);
   5796   1.1    pooka 
   5797  1.45   nonaka 	sta->is_assoc = htole32(assoc);
   5798  1.45   nonaka 	sta->dtim_time = htole32(ni->ni_rstamp + dtim_off);
   5799  1.45   nonaka 	sta->dtim_tsf = htole64(tsf + dtim_off);
   5800  1.45   nonaka 	sta->bi = htole32(ni->ni_intval);
   5801  1.45   nonaka 	sta->bi_reciprocal = htole32(iwm_reciprocal(ni->ni_intval));
   5802  1.45   nonaka 	sta->dtim_interval = htole32(ni->ni_intval * ni->ni_dtim_period);
   5803  1.45   nonaka 	sta->dtim_reciprocal = htole32(iwm_reciprocal(sta->dtim_interval));
   5804  1.45   nonaka 	sta->listen_interval = htole32(10);
   5805  1.45   nonaka 	sta->assoc_id = htole32(ni->ni_associd);
   5806  1.45   nonaka 	sta->assoc_beacon_arrive_time = htole32(ni->ni_rstamp);
   5807   1.1    pooka }
   5808   1.1    pooka 
   5809   1.4   nonaka static int
   5810  1.45   nonaka iwm_mac_ctxt_cmd(struct iwm_softc *sc, struct iwm_node *in, uint32_t action,
   5811  1.45   nonaka     int assoc)
   5812   1.1    pooka {
   5813  1.45   nonaka 	struct ieee80211_node *ni = &in->in_ni;
   5814   1.1    pooka 	struct iwm_mac_ctx_cmd cmd;
   5815   1.1    pooka 
   5816   1.1    pooka 	memset(&cmd, 0, sizeof(cmd));
   5817   1.1    pooka 
   5818  1.45   nonaka 	iwm_mac_ctxt_cmd_common(sc, in, &cmd, action, assoc);
   5819   1.1    pooka 
   5820  1.45   nonaka 	/* Allow beacons to pass through as long as we are not associated or we
   5821  1.45   nonaka 	 * do not have dtim period information */
   5822  1.45   nonaka 	if (!assoc || !ni->ni_associd || !ni->ni_dtim_period)
   5823  1.45   nonaka 		cmd.filter_flags |= htole32(IWM_MAC_FILTER_IN_BEACON);
   5824  1.45   nonaka 	else
   5825  1.45   nonaka 		iwm_mac_ctxt_cmd_fill_sta(sc, in, &cmd.sta, assoc);
   5826   1.1    pooka 
   5827  1.45   nonaka 	return iwm_send_cmd_pdu(sc, IWM_MAC_CONTEXT_CMD, 0, sizeof(cmd), &cmd);
   5828   1.1    pooka }
   5829   1.1    pooka 
   5830  1.45   nonaka #define IWM_MISSED_BEACONS_THRESHOLD 8
   5831   1.1    pooka 
   5832   1.1    pooka static void
   5833  1.45   nonaka iwm_rx_missed_beacons_notif(struct iwm_softc *sc,
   5834   1.1    pooka 	struct iwm_rx_packet *pkt, struct iwm_rx_data *data)
   5835   1.1    pooka {
   5836   1.1    pooka 	struct iwm_missed_beacons_notif *mb = (void *)pkt->data;
   5837  1.68   nonaka 	int s;
   5838   1.1    pooka 
   5839   1.1    pooka 	DPRINTF(("missed bcn mac_id=%u, consecutive=%u (%u, %u, %u)\n",
   5840   1.1    pooka 	    le32toh(mb->mac_id),
   5841   1.1    pooka 	    le32toh(mb->consec_missed_beacons),
   5842   1.1    pooka 	    le32toh(mb->consec_missed_beacons_since_last_rx),
   5843   1.1    pooka 	    le32toh(mb->num_recvd_beacons),
   5844   1.1    pooka 	    le32toh(mb->num_expected_beacons)));
   5845   1.1    pooka 
   5846   1.1    pooka 	/*
   5847   1.1    pooka 	 * TODO: the threshold should be adjusted based on latency conditions,
   5848   1.1    pooka 	 * and/or in case of a CS flow on one of the other AP vifs.
   5849   1.1    pooka 	 */
   5850   1.1    pooka 	if (le32toh(mb->consec_missed_beacons_since_last_rx) >
   5851  1.68   nonaka 	    IWM_MISSED_BEACONS_THRESHOLD) {
   5852  1.68   nonaka 		s = splnet();
   5853   1.1    pooka 		ieee80211_beacon_miss(&sc->sc_ic);
   5854  1.68   nonaka 		splx(s);
   5855  1.68   nonaka 	}
   5856   1.1    pooka }
   5857   1.1    pooka 
   5858   1.4   nonaka static int
   5859  1.45   nonaka iwm_update_quotas(struct iwm_softc *sc, struct iwm_node *in)
   5860   1.1    pooka {
   5861   1.1    pooka 	struct iwm_time_quota_cmd cmd;
   5862  1.45   nonaka 	int i, idx, num_active_macs, quota, quota_rem;
   5863   1.1    pooka 	int colors[IWM_MAX_BINDINGS] = { -1, -1, -1, -1, };
   5864   1.1    pooka 	int n_ifs[IWM_MAX_BINDINGS] = {0, };
   5865   1.1    pooka 	uint16_t id;
   5866   1.1    pooka 
   5867   1.1    pooka 	memset(&cmd, 0, sizeof(cmd));
   5868   1.1    pooka 
   5869   1.1    pooka 	/* currently, PHY ID == binding ID */
   5870   1.1    pooka 	if (in) {
   5871   1.1    pooka 		id = in->in_phyctxt->id;
   5872   1.1    pooka 		KASSERT(id < IWM_MAX_BINDINGS);
   5873   1.1    pooka 		colors[id] = in->in_phyctxt->color;
   5874   1.1    pooka 
   5875   1.1    pooka 		if (1)
   5876   1.1    pooka 			n_ifs[id] = 1;
   5877   1.1    pooka 	}
   5878   1.1    pooka 
   5879   1.1    pooka 	/*
   5880   1.1    pooka 	 * The FW's scheduling session consists of
   5881  1.45   nonaka 	 * IWM_MAX_QUOTA fragments. Divide these fragments
   5882   1.1    pooka 	 * equally between all the bindings that require quota
   5883   1.1    pooka 	 */
   5884   1.1    pooka 	num_active_macs = 0;
   5885   1.1    pooka 	for (i = 0; i < IWM_MAX_BINDINGS; i++) {
   5886   1.1    pooka 		cmd.quotas[i].id_and_color = htole32(IWM_FW_CTXT_INVALID);
   5887   1.1    pooka 		num_active_macs += n_ifs[i];
   5888   1.1    pooka 	}
   5889   1.1    pooka 
   5890   1.1    pooka 	quota = 0;
   5891   1.1    pooka 	quota_rem = 0;
   5892   1.1    pooka 	if (num_active_macs) {
   5893  1.45   nonaka 		quota = IWM_MAX_QUOTA / num_active_macs;
   5894  1.45   nonaka 		quota_rem = IWM_MAX_QUOTA % num_active_macs;
   5895   1.1    pooka 	}
   5896   1.1    pooka 
   5897   1.1    pooka 	for (idx = 0, i = 0; i < IWM_MAX_BINDINGS; i++) {
   5898   1.1    pooka 		if (colors[i] < 0)
   5899   1.1    pooka 			continue;
   5900   1.1    pooka 
   5901   1.1    pooka 		cmd.quotas[idx].id_and_color =
   5902   1.1    pooka 			htole32(IWM_FW_CMD_ID_AND_COLOR(i, colors[i]));
   5903   1.1    pooka 
   5904   1.1    pooka 		if (n_ifs[i] <= 0) {
   5905   1.1    pooka 			cmd.quotas[idx].quota = htole32(0);
   5906   1.1    pooka 			cmd.quotas[idx].max_duration = htole32(0);
   5907   1.1    pooka 		} else {
   5908   1.1    pooka 			cmd.quotas[idx].quota = htole32(quota * n_ifs[i]);
   5909   1.1    pooka 			cmd.quotas[idx].max_duration = htole32(0);
   5910   1.1    pooka 		}
   5911   1.1    pooka 		idx++;
   5912   1.1    pooka 	}
   5913   1.1    pooka 
   5914   1.1    pooka 	/* Give the remainder of the session to the first binding */
   5915   1.1    pooka 	cmd.quotas[0].quota = htole32(le32toh(cmd.quotas[0].quota) + quota_rem);
   5916   1.1    pooka 
   5917  1.45   nonaka 	return iwm_send_cmd_pdu(sc, IWM_TIME_QUOTA_CMD, 0, sizeof(cmd), &cmd);
   5918   1.1    pooka }
   5919   1.1    pooka 
   5920   1.4   nonaka static int
   5921   1.1    pooka iwm_auth(struct iwm_softc *sc)
   5922   1.1    pooka {
   5923   1.1    pooka 	struct ieee80211com *ic = &sc->sc_ic;
   5924  1.45   nonaka 	struct iwm_node *in = (struct iwm_node *)ic->ic_bss;
   5925   1.1    pooka 	uint32_t duration;
   5926  1.45   nonaka 	int err;
   5927   1.1    pooka 
   5928  1.45   nonaka 	err = iwm_sf_config(sc, IWM_SF_FULL_ON);
   5929  1.45   nonaka 	if (err)
   5930  1.45   nonaka 		return err;
   5931  1.11   nonaka 
   5932  1.45   nonaka 	err = iwm_allow_mcast(sc);
   5933  1.45   nonaka 	if (err)
   5934  1.45   nonaka 		return err;
   5935  1.11   nonaka 
   5936  1.45   nonaka 	sc->sc_phyctxt[0].channel = in->in_ni.ni_chan;
   5937  1.45   nonaka 	err = iwm_phy_ctxt_cmd(sc, &sc->sc_phyctxt[0], 1, 1,
   5938  1.45   nonaka 	    IWM_FW_CTXT_ACTION_MODIFY, 0);
   5939  1.45   nonaka 	if (err)
   5940  1.45   nonaka 		return err;
   5941   1.1    pooka 	in->in_phyctxt = &sc->sc_phyctxt[0];
   5942   1.1    pooka 
   5943  1.45   nonaka 	err = iwm_mac_ctxt_cmd(sc, in, IWM_FW_CTXT_ACTION_ADD, 0);
   5944  1.45   nonaka 	if (err) {
   5945  1.45   nonaka 		aprint_error_dev(sc->sc_dev,
   5946  1.45   nonaka 		    "could not add MAC context (error %d)\n", err);
   5947  1.45   nonaka 		return err;
   5948   1.1    pooka 	}
   5949   1.1    pooka 
   5950  1.45   nonaka 	err = iwm_binding_cmd(sc, in, IWM_FW_CTXT_ACTION_ADD);
   5951  1.45   nonaka 	if (err)
   5952  1.45   nonaka 		return err;
   5953   1.1    pooka 
   5954  1.45   nonaka 	err = iwm_add_sta_cmd(sc, in, 0);
   5955  1.45   nonaka 	if (err)
   5956  1.45   nonaka 		return err;
   5957   1.8   nonaka 
   5958  1.45   nonaka 	err = iwm_mac_ctxt_cmd(sc, in, IWM_FW_CTXT_ACTION_MODIFY, 0);
   5959  1.45   nonaka 	if (err) {
   5960  1.45   nonaka 		aprint_error_dev(sc->sc_dev, "failed to update MAC\n");
   5961  1.45   nonaka 		return err;
   5962  1.45   nonaka 	}
   5963   1.1    pooka 
   5964  1.45   nonaka 	/*
   5965  1.45   nonaka 	 * Prevent the FW from wandering off channel during association
   5966  1.45   nonaka 	 * by "protecting" the session with a time event.
   5967  1.45   nonaka 	 */
   5968  1.45   nonaka 	if (in->in_ni.ni_intval)
   5969  1.45   nonaka 		duration = in->in_ni.ni_intval * 2;
   5970  1.45   nonaka 	else
   5971  1.45   nonaka 		duration = IEEE80211_DUR_TU;
   5972  1.45   nonaka 	iwm_protect_session(sc, in, duration, in->in_ni.ni_intval / 2);
   5973  1.45   nonaka 	DELAY(100);
   5974   1.1    pooka 
   5975   1.1    pooka 	return 0;
   5976   1.1    pooka }
   5977   1.1    pooka 
   5978   1.4   nonaka static int
   5979   1.1    pooka iwm_assoc(struct iwm_softc *sc)
   5980   1.1    pooka {
   5981   1.1    pooka 	struct ieee80211com *ic = &sc->sc_ic;
   5982  1.45   nonaka 	struct iwm_node *in = (struct iwm_node *)ic->ic_bss;
   5983  1.45   nonaka 	int err;
   5984   1.1    pooka 
   5985  1.45   nonaka 	err = iwm_add_sta_cmd(sc, in, 1);
   5986  1.45   nonaka 	if (err)
   5987  1.45   nonaka 		return err;
   5988   1.1    pooka 
   5989   1.1    pooka 	return 0;
   5990   1.1    pooka }
   5991   1.1    pooka 
   5992   1.1    pooka static struct ieee80211_node *
   5993   1.1    pooka iwm_node_alloc(struct ieee80211_node_table *nt)
   5994   1.1    pooka {
   5995   1.5   nonaka 	return malloc(sizeof(struct iwm_node), M_80211_NODE, M_NOWAIT | M_ZERO);
   5996   1.1    pooka }
   5997   1.1    pooka 
   5998   1.4   nonaka static void
   5999   1.1    pooka iwm_calib_timeout(void *arg)
   6000   1.1    pooka {
   6001   1.1    pooka 	struct iwm_softc *sc = arg;
   6002   1.1    pooka 	struct ieee80211com *ic = &sc->sc_ic;
   6003  1.45   nonaka 	struct iwm_node *in = (struct iwm_node *)ic->ic_bss;
   6004  1.45   nonaka #ifndef IEEE80211_NO_HT
   6005  1.45   nonaka 	struct ieee80211_node *ni = &in->in_ni;
   6006  1.45   nonaka 	int otxrate;
   6007  1.45   nonaka #endif
   6008   1.1    pooka 	int s;
   6009   1.1    pooka 
   6010   1.1    pooka 	s = splnet();
   6011  1.45   nonaka 	if ((ic->ic_fixed_rate == -1
   6012  1.45   nonaka #ifndef IEEE80211_NO_HT
   6013  1.45   nonaka 	    || ic->ic_fixed_mcs == -1
   6014  1.45   nonaka #endif
   6015  1.45   nonaka 	    ) &&
   6016  1.45   nonaka 	    ic->ic_opmode == IEEE80211_M_STA && ic->ic_bss) {
   6017  1.45   nonaka #ifndef IEEE80211_NO_HT
   6018  1.45   nonaka 		if (ni->ni_flags & IEEE80211_NODE_HT)
   6019  1.45   nonaka 			otxrate = ni->ni_txmcs;
   6020  1.45   nonaka 		else
   6021  1.45   nonaka 			otxrate = ni->ni_txrate;
   6022  1.45   nonaka #endif
   6023   1.1    pooka 		ieee80211_amrr_choose(&sc->sc_amrr, &in->in_ni, &in->in_amn);
   6024  1.45   nonaka 
   6025  1.45   nonaka #ifndef IEEE80211_NO_HT
   6026  1.45   nonaka 		/*
   6027  1.45   nonaka 		 * If AMRR has chosen a new TX rate we must update
   6028  1.45   nonaka 		 * the firwmare's LQ rate table from process context.
   6029  1.45   nonaka 		 */
   6030  1.45   nonaka 		if ((ni->ni_flags & IEEE80211_NODE_HT) &&
   6031  1.45   nonaka 		    otxrate != ni->ni_txmcs)
   6032  1.45   nonaka 			softint_schedule(sc->setrates_task);
   6033  1.45   nonaka 		else if (otxrate != ni->ni_txrate)
   6034  1.45   nonaka 			softint_schedule(sc->setrates_task);
   6035  1.45   nonaka #endif
   6036   1.1    pooka 	}
   6037   1.1    pooka 	splx(s);
   6038   1.1    pooka 
   6039  1.45   nonaka 	callout_schedule(&sc->sc_calib_to, mstohz(500));
   6040   1.1    pooka }
   6041   1.1    pooka 
   6042  1.45   nonaka #ifndef IEEE80211_NO_HT
   6043   1.4   nonaka static void
   6044  1.45   nonaka iwm_setrates_task(void *arg)
   6045  1.45   nonaka {
   6046  1.45   nonaka 	struct iwm_softc *sc = arg;
   6047  1.45   nonaka 	struct ieee80211com *ic = &sc->sc_ic;
   6048  1.45   nonaka 	struct iwm_node *in = (struct iwm_node *)ic->ic_bss;
   6049  1.45   nonaka 
   6050  1.45   nonaka 	/* Update rates table based on new TX rate determined by AMRR. */
   6051  1.45   nonaka 	iwm_setrates(in);
   6052  1.45   nonaka }
   6053  1.45   nonaka 
   6054  1.45   nonaka static int
   6055   1.1    pooka iwm_setrates(struct iwm_node *in)
   6056   1.1    pooka {
   6057   1.1    pooka 	struct ieee80211_node *ni = &in->in_ni;
   6058   1.1    pooka 	struct ieee80211com *ic = ni->ni_ic;
   6059   1.1    pooka 	struct iwm_softc *sc = IC2IFP(ic)->if_softc;
   6060   1.1    pooka 	struct iwm_lq_cmd *lq = &in->in_lq;
   6061  1.45   nonaka 	struct ieee80211_rateset *rs = &ni->ni_rates;
   6062  1.45   nonaka 	int i, j, ridx, ridx_min, tab = 0;
   6063  1.45   nonaka #ifndef IEEE80211_NO_HT
   6064  1.45   nonaka 	int sgi_ok;
   6065  1.45   nonaka #endif
   6066  1.45   nonaka 	struct iwm_host_cmd cmd = {
   6067  1.45   nonaka 		.id = IWM_LQ_CMD,
   6068  1.45   nonaka 		.len = { sizeof(in->in_lq), },
   6069  1.45   nonaka 	};
   6070   1.1    pooka 
   6071  1.45   nonaka 	memset(lq, 0, sizeof(*lq));
   6072  1.45   nonaka 	lq->sta_id = IWM_STATION_ID;
   6073   1.1    pooka 
   6074  1.45   nonaka 	if (ic->ic_flags & IEEE80211_F_USEPROT)
   6075  1.45   nonaka 		lq->flags |= IWM_LQ_FLAG_USE_RTS_MSK;
   6076   1.8   nonaka 
   6077  1.45   nonaka #ifndef IEEE80211_NO_HT
   6078  1.45   nonaka 	sgi_ok = ((ni->ni_flags & IEEE80211_NODE_HT) &&
   6079  1.45   nonaka 	    (ni->ni_htcaps & IEEE80211_HTCAP_SGI20));
   6080  1.45   nonaka #endif
   6081   1.1    pooka 
   6082   1.1    pooka 
   6083   1.1    pooka 	/*
   6084  1.45   nonaka 	 * Fill the LQ rate selection table with legacy and/or HT rates
   6085  1.45   nonaka 	 * in descending order, i.e. with the node's current TX rate first.
   6086  1.45   nonaka 	 * In cases where throughput of an HT rate corresponds to a legacy
   6087  1.45   nonaka 	 * rate it makes no sense to add both. We rely on the fact that
   6088  1.45   nonaka 	 * iwm_rates is laid out such that equivalent HT/legacy rates share
   6089  1.45   nonaka 	 * the same IWM_RATE_*_INDEX value. Also, rates not applicable to
   6090  1.45   nonaka 	 * legacy/HT are assumed to be marked with an 'invalid' PLCP value.
   6091   1.1    pooka 	 */
   6092  1.45   nonaka 	j = 0;
   6093  1.45   nonaka 	ridx_min = (IEEE80211_IS_CHAN_5GHZ(ni->ni_chan)) ?
   6094  1.45   nonaka 	    IWM_RIDX_OFDM : IWM_RIDX_CCK;
   6095  1.45   nonaka 	for (ridx = IWM_RIDX_MAX; ridx >= ridx_min; ridx--) {
   6096  1.45   nonaka 		if (j >= __arraycount(lq->rs_table))
   6097  1.45   nonaka 			break;
   6098  1.45   nonaka 		tab = 0;
   6099  1.45   nonaka #ifndef IEEE80211_NO_HT
   6100  1.45   nonaka 		if ((ni->ni_flags & IEEE80211_NODE_HT) &&
   6101  1.45   nonaka 		    iwm_rates[ridx].ht_plcp != IWM_RATE_HT_SISO_MCS_INV_PLCP) {
   6102  1.45   nonaka 			for (i = ni->ni_txmcs; i >= 0; i--) {
   6103  1.45   nonaka 				if (isclr(ni->ni_rxmcs, i))
   6104  1.45   nonaka 					continue;
   6105  1.45   nonaka 				if (ridx == iwm_mcs2ridx[i]) {
   6106  1.45   nonaka 					tab = iwm_rates[ridx].ht_plcp;
   6107  1.45   nonaka 					tab |= IWM_RATE_MCS_HT_MSK;
   6108  1.45   nonaka 					if (sgi_ok)
   6109  1.45   nonaka 						tab |= IWM_RATE_MCS_SGI_MSK;
   6110  1.45   nonaka 					break;
   6111  1.45   nonaka 				}
   6112  1.45   nonaka 			}
   6113  1.45   nonaka 		}
   6114  1.45   nonaka #endif
   6115  1.45   nonaka 		if (tab == 0 && iwm_rates[ridx].plcp != IWM_RATE_INVM_PLCP) {
   6116  1.45   nonaka 			for (i = ni->ni_txrate; i >= 0; i--) {
   6117  1.45   nonaka 				if (iwm_rates[ridx].rate == (rs->rs_rates[i] &
   6118  1.45   nonaka 				    IEEE80211_RATE_VAL)) {
   6119  1.45   nonaka 					tab = iwm_rates[ridx].plcp;
   6120  1.45   nonaka 					break;
   6121  1.45   nonaka 				}
   6122  1.45   nonaka 			}
   6123  1.45   nonaka 		}
   6124   1.1    pooka 
   6125  1.45   nonaka 		if (tab == 0)
   6126  1.45   nonaka 			continue;
   6127   1.1    pooka 
   6128  1.45   nonaka 		tab |= 1 << IWM_RATE_MCS_ANT_POS;
   6129   1.1    pooka 		if (IWM_RIDX_IS_CCK(ridx))
   6130   1.1    pooka 			tab |= IWM_RATE_MCS_CCK_MSK;
   6131   1.1    pooka 		DPRINTFN(2, ("station rate %d %x\n", i, tab));
   6132  1.45   nonaka 		lq->rs_table[j++] = htole32(tab);
   6133   1.1    pooka 	}
   6134   1.1    pooka 
   6135  1.45   nonaka 	/* Fill the rest with the lowest possible rate */
   6136  1.45   nonaka 	i = j > 0 ? j - 1 : 0;
   6137  1.45   nonaka 	while (j < __arraycount(lq->rs_table))
   6138  1.45   nonaka 		lq->rs_table[j++] = lq->rs_table[i];
   6139  1.45   nonaka 
   6140  1.45   nonaka 	lq->single_stream_ant_msk = IWM_ANT_A;
   6141  1.45   nonaka 	lq->dual_stream_ant_msk = IWM_ANT_AB;
   6142  1.45   nonaka 
   6143  1.45   nonaka 	lq->agg_time_limit = htole16(4000);	/* 4ms */
   6144  1.45   nonaka 	lq->agg_disable_start_th = 3;
   6145  1.45   nonaka #ifdef notyet
   6146  1.45   nonaka 	lq->agg_frame_cnt_limit = 0x3f;
   6147  1.45   nonaka #else
   6148  1.45   nonaka 	lq->agg_frame_cnt_limit = 1; /* tx agg disabled */
   6149  1.45   nonaka #endif
   6150  1.45   nonaka 
   6151  1.45   nonaka 	cmd.data[0] = &in->in_lq;
   6152  1.45   nonaka 	return iwm_send_cmd(sc, &cmd);
   6153   1.1    pooka }
   6154  1.45   nonaka #endif
   6155   1.1    pooka 
   6156   1.4   nonaka static int
   6157   1.1    pooka iwm_media_change(struct ifnet *ifp)
   6158   1.1    pooka {
   6159   1.1    pooka 	struct iwm_softc *sc = ifp->if_softc;
   6160   1.1    pooka 	struct ieee80211com *ic = &sc->sc_ic;
   6161   1.1    pooka 	uint8_t rate, ridx;
   6162  1.45   nonaka 	int err;
   6163   1.1    pooka 
   6164  1.45   nonaka 	err = ieee80211_media_change(ifp);
   6165  1.45   nonaka 	if (err != ENETRESET)
   6166  1.45   nonaka 		return err;
   6167   1.1    pooka 
   6168  1.45   nonaka #ifndef IEEE80211_NO_HT
   6169  1.45   nonaka 	if (ic->ic_fixed_mcs != -1)
   6170  1.45   nonaka 		sc->sc_fixed_ridx = iwm_mcs2ridx[ic->ic_fixed_mcs];
   6171  1.45   nonaka 	else
   6172  1.45   nonaka #endif
   6173   1.1    pooka 	if (ic->ic_fixed_rate != -1) {
   6174   1.1    pooka 		rate = ic->ic_sup_rates[ic->ic_curmode].
   6175   1.1    pooka 		    rs_rates[ic->ic_fixed_rate] & IEEE80211_RATE_VAL;
   6176   1.1    pooka 		/* Map 802.11 rate to HW rate index. */
   6177   1.1    pooka 		for (ridx = 0; ridx <= IWM_RIDX_MAX; ridx++)
   6178   1.1    pooka 			if (iwm_rates[ridx].rate == rate)
   6179   1.1    pooka 				break;
   6180   1.1    pooka 		sc->sc_fixed_ridx = ridx;
   6181   1.1    pooka 	}
   6182   1.1    pooka 
   6183   1.1    pooka 	if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) ==
   6184   1.1    pooka 	    (IFF_UP | IFF_RUNNING)) {
   6185   1.1    pooka 		iwm_stop(ifp, 0);
   6186  1.45   nonaka 		err = iwm_init(ifp);
   6187   1.1    pooka 	}
   6188  1.45   nonaka 	return err;
   6189   1.1    pooka }
   6190   1.1    pooka 
   6191  1.65   nonaka static int
   6192  1.65   nonaka iwm_do_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
   6193   1.1    pooka {
   6194  1.65   nonaka 	struct ifnet *ifp = IC2IFP(ic);
   6195  1.65   nonaka 	struct iwm_softc *sc = ifp->if_softc;
   6196  1.45   nonaka 	enum ieee80211_state ostate = ic->ic_state;
   6197   1.1    pooka 	struct iwm_node *in;
   6198  1.45   nonaka 	int err;
   6199   1.1    pooka 
   6200  1.45   nonaka 	DPRINTF(("switching state %s->%s\n", ieee80211_state_name[ostate],
   6201  1.45   nonaka 	    ieee80211_state_name[nstate]));
   6202   1.1    pooka 
   6203  1.45   nonaka 	if (ostate == IEEE80211_S_SCAN && nstate != ostate)
   6204  1.45   nonaka 		iwm_led_blink_stop(sc);
   6205  1.45   nonaka 
   6206  1.45   nonaka 	if (ostate == IEEE80211_S_RUN && nstate != ostate)
   6207  1.45   nonaka 		iwm_disable_beacon_filter(sc);
   6208  1.45   nonaka 
   6209  1.45   nonaka 	/* Reset the device if moving out of AUTH, ASSOC, or RUN. */
   6210  1.45   nonaka 	/* XXX Is there a way to switch states without a full reset? */
   6211  1.45   nonaka 	if (ostate > IEEE80211_S_SCAN && nstate < ostate) {
   6212   1.1    pooka 		/*
   6213  1.45   nonaka 		 * Upon receiving a deauth frame from AP the net80211 stack
   6214  1.45   nonaka 		 * puts the driver into AUTH state. This will fail with this
   6215  1.45   nonaka 		 * driver so bring the FSM from RUN to SCAN in this case.
   6216   1.1    pooka 		 */
   6217  1.69   nonaka 		if (nstate != IEEE80211_S_INIT) {
   6218   1.1    pooka 			DPRINTF(("Force transition to INIT; MGT=%d\n", arg));
   6219  1.45   nonaka 			/* Always pass arg as -1 since we can't Tx right now. */
   6220  1.45   nonaka 			sc->sc_newstate(ic, IEEE80211_S_INIT, -1);
   6221  1.69   nonaka 			iwm_stop(ifp, 0);
   6222  1.69   nonaka 			iwm_init(ifp);
   6223  1.69   nonaka 			return 0;
   6224   1.1    pooka 		}
   6225  1.69   nonaka 
   6226  1.69   nonaka 		iwm_stop_device(sc);
   6227  1.69   nonaka 		iwm_init_hw(sc);
   6228   1.1    pooka 	}
   6229   1.1    pooka 
   6230   1.1    pooka 	switch (nstate) {
   6231   1.1    pooka 	case IEEE80211_S_INIT:
   6232   1.1    pooka 		break;
   6233   1.1    pooka 
   6234   1.1    pooka 	case IEEE80211_S_SCAN:
   6235  1.45   nonaka 		if (ostate == nstate &&
   6236  1.45   nonaka 		    ISSET(sc->sc_flags, IWM_FLAG_SCANNING))
   6237  1.65   nonaka 			return 0;
   6238  1.45   nonaka 		if (isset(sc->sc_enabled_capa, IWM_UCODE_TLV_CAPA_UMAC_SCAN))
   6239  1.45   nonaka 			err = iwm_umac_scan(sc);
   6240  1.45   nonaka 		else
   6241  1.45   nonaka 			err = iwm_lmac_scan(sc);
   6242  1.45   nonaka 		if (err) {
   6243  1.69   nonaka 			DPRINTF(("%s: could not initiate scan: %d\n",
   6244  1.69   nonaka 			    DEVNAME(sc), err));
   6245  1.65   nonaka 			return err;
   6246   1.1    pooka 		}
   6247  1.45   nonaka 		SET(sc->sc_flags, IWM_FLAG_SCANNING);
   6248   1.1    pooka 		ic->ic_state = nstate;
   6249  1.45   nonaka 		iwm_led_blink_start(sc);
   6250  1.65   nonaka 		return 0;
   6251   1.1    pooka 
   6252   1.1    pooka 	case IEEE80211_S_AUTH:
   6253  1.45   nonaka 		err = iwm_auth(sc);
   6254  1.45   nonaka 		if (err) {
   6255   1.2   nonaka 			DPRINTF(("%s: could not move to auth state: %d\n",
   6256  1.45   nonaka 			    DEVNAME(sc), err));
   6257  1.65   nonaka 			return err;
   6258   1.1    pooka 		}
   6259   1.1    pooka 		break;
   6260   1.1    pooka 
   6261   1.1    pooka 	case IEEE80211_S_ASSOC:
   6262  1.45   nonaka 		err = iwm_assoc(sc);
   6263  1.45   nonaka 		if (err) {
   6264   1.2   nonaka 			DPRINTF(("%s: failed to associate: %d\n", DEVNAME(sc),
   6265  1.45   nonaka 			    err));
   6266  1.65   nonaka 			return err;
   6267   1.1    pooka 		}
   6268   1.1    pooka 		break;
   6269   1.1    pooka 
   6270  1.45   nonaka 	case IEEE80211_S_RUN:
   6271  1.45   nonaka 		in = (struct iwm_node *)ic->ic_bss;
   6272  1.45   nonaka 
   6273  1.45   nonaka 		/* We have now been assigned an associd by the AP. */
   6274  1.45   nonaka 		err = iwm_mac_ctxt_cmd(sc, in, IWM_FW_CTXT_ACTION_MODIFY, 1);
   6275  1.45   nonaka 		if (err) {
   6276  1.45   nonaka 			aprint_error_dev(sc->sc_dev, "failed to update MAC\n");
   6277  1.65   nonaka 			return err;
   6278  1.45   nonaka 		}
   6279   1.1    pooka 
   6280  1.45   nonaka 		err = iwm_power_update_device(sc);
   6281  1.45   nonaka 		if (err) {
   6282  1.45   nonaka 			aprint_error_dev(sc->sc_dev,
   6283  1.45   nonaka 			    "could send power command (error %d)\n", err);
   6284  1.65   nonaka 			return err;
   6285  1.45   nonaka 		}
   6286  1.45   nonaka #ifdef notyet
   6287  1.45   nonaka 		/*
   6288  1.45   nonaka 		 * Disabled for now. Default beacon filter settings
   6289  1.45   nonaka 		 * prevent net80211 from getting ERP and HT protection
   6290  1.45   nonaka 		 * updates from beacons.
   6291  1.45   nonaka 		 */
   6292  1.45   nonaka 		err = iwm_enable_beacon_filter(sc, in);
   6293  1.45   nonaka 		if (err) {
   6294  1.45   nonaka 			aprint_error_dev(sc->sc_dev,
   6295  1.45   nonaka 			    "could not enable beacon filter\n");
   6296  1.65   nonaka 			return err;
   6297  1.45   nonaka 		}
   6298  1.45   nonaka #endif
   6299  1.45   nonaka 		err = iwm_power_mac_update_mode(sc, in);
   6300  1.45   nonaka 		if (err) {
   6301  1.45   nonaka 			aprint_error_dev(sc->sc_dev,
   6302  1.45   nonaka 			    "could not update MAC power (error %d)\n", err);
   6303  1.65   nonaka 			return err;
   6304  1.45   nonaka 		}
   6305   1.1    pooka 
   6306  1.45   nonaka 		err = iwm_update_quotas(sc, in);
   6307  1.45   nonaka 		if (err) {
   6308  1.45   nonaka 			aprint_error_dev(sc->sc_dev,
   6309  1.45   nonaka 			    "could not update quotas (error %d)\n", err);
   6310  1.65   nonaka 			return err;
   6311   1.1    pooka 		}
   6312   1.1    pooka 
   6313  1.45   nonaka 		ieee80211_amrr_node_init(&sc->sc_amrr, &in->in_amn);
   6314   1.1    pooka 
   6315  1.45   nonaka 		/* Start at lowest available bit-rate, AMRR will raise. */
   6316  1.45   nonaka 		in->in_ni.ni_txrate = 0;
   6317  1.45   nonaka #ifndef IEEE80211_NO_HT
   6318  1.45   nonaka 		in->in_ni.ni_txmcs = 0;
   6319  1.45   nonaka 		iwm_setrates(in);
   6320  1.45   nonaka #endif
   6321  1.45   nonaka 
   6322  1.45   nonaka 		callout_schedule(&sc->sc_calib_to, mstohz(500));
   6323  1.45   nonaka 		iwm_led_enable(sc);
   6324  1.45   nonaka 		break;
   6325   1.1    pooka 
   6326   1.1    pooka 	default:
   6327   1.2   nonaka 		break;
   6328   1.1    pooka 	}
   6329   1.1    pooka 
   6330  1.65   nonaka 	return sc->sc_newstate(ic, nstate, arg);
   6331  1.65   nonaka }
   6332  1.65   nonaka 
   6333  1.65   nonaka static void
   6334  1.65   nonaka iwm_newstate_cb(struct work *wk, void *v)
   6335  1.65   nonaka {
   6336  1.65   nonaka 	struct iwm_softc *sc = v;
   6337  1.65   nonaka 	struct ieee80211com *ic = &sc->sc_ic;
   6338  1.65   nonaka 	struct iwm_newstate_state *iwmns = (struct iwm_newstate_state *)wk;
   6339  1.65   nonaka 	enum ieee80211_state nstate = iwmns->ns_nstate;
   6340  1.65   nonaka 	int generation = iwmns->ns_generation;
   6341  1.65   nonaka 	int arg = iwmns->ns_arg;
   6342  1.65   nonaka 	int s;
   6343  1.65   nonaka 
   6344  1.65   nonaka 	kmem_free(iwmns, sizeof(*iwmns));
   6345  1.65   nonaka 
   6346  1.65   nonaka 	s = splnet();
   6347  1.65   nonaka 
   6348  1.65   nonaka 	DPRINTF(("Prepare to switch state %d->%d\n", ic->ic_state, nstate));
   6349  1.65   nonaka 	if (sc->sc_generation != generation) {
   6350  1.65   nonaka 		DPRINTF(("newstate_cb: someone pulled the plug meanwhile\n"));
   6351  1.65   nonaka 		if (nstate == IEEE80211_S_INIT) {
   6352  1.65   nonaka 			DPRINTF(("newstate_cb: nstate == IEEE80211_S_INIT: "
   6353  1.65   nonaka 			    "calling sc_newstate()\n"));
   6354  1.65   nonaka 			(void) sc->sc_newstate(ic, nstate, arg);
   6355  1.65   nonaka 		}
   6356  1.65   nonaka 	} else
   6357  1.65   nonaka 		(void) iwm_do_newstate(ic, nstate, arg);
   6358  1.65   nonaka 
   6359  1.65   nonaka 	splx(s);
   6360   1.1    pooka }
   6361   1.1    pooka 
   6362   1.4   nonaka static int
   6363   1.1    pooka iwm_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
   6364   1.1    pooka {
   6365   1.1    pooka 	struct iwm_newstate_state *iwmns;
   6366   1.1    pooka 	struct ifnet *ifp = IC2IFP(ic);
   6367   1.1    pooka 	struct iwm_softc *sc = ifp->if_softc;
   6368   1.1    pooka 
   6369   1.1    pooka 	callout_stop(&sc->sc_calib_to);
   6370   1.1    pooka 
   6371   1.5   nonaka 	iwmns = kmem_intr_alloc(sizeof(*iwmns), KM_NOSLEEP);
   6372   1.1    pooka 	if (!iwmns) {
   6373   1.2   nonaka 		DPRINTF(("%s: allocating state cb mem failed\n", DEVNAME(sc)));
   6374   1.1    pooka 		return ENOMEM;
   6375   1.1    pooka 	}
   6376   1.1    pooka 
   6377   1.1    pooka 	iwmns->ns_nstate = nstate;
   6378   1.1    pooka 	iwmns->ns_arg = arg;
   6379   1.1    pooka 	iwmns->ns_generation = sc->sc_generation;
   6380   1.1    pooka 
   6381   1.1    pooka 	workqueue_enqueue(sc->sc_nswq, &iwmns->ns_wk, NULL);
   6382   1.1    pooka 
   6383   1.1    pooka 	return 0;
   6384   1.1    pooka }
   6385   1.1    pooka 
   6386   1.4   nonaka static void
   6387  1.50   nonaka iwm_endscan(struct iwm_softc *sc)
   6388   1.1    pooka {
   6389   1.1    pooka 	struct ieee80211com *ic = &sc->sc_ic;
   6390  1.61   nonaka 	int s;
   6391   1.1    pooka 
   6392  1.61   nonaka 	DPRINTF(("%s: scan ended\n", DEVNAME(sc)));
   6393   1.1    pooka 
   6394  1.61   nonaka 	s = splnet();
   6395  1.61   nonaka 	if (ic->ic_state == IEEE80211_S_SCAN)
   6396  1.61   nonaka 		ieee80211_end_scan(ic);
   6397  1.61   nonaka 	splx(s);
   6398  1.45   nonaka }
   6399  1.45   nonaka 
   6400  1.45   nonaka /*
   6401  1.45   nonaka  * Aging and idle timeouts for the different possible scenarios
   6402  1.45   nonaka  * in default configuration
   6403  1.45   nonaka  */
   6404  1.45   nonaka static const uint32_t
   6405  1.45   nonaka iwm_sf_full_timeout_def[IWM_SF_NUM_SCENARIO][IWM_SF_NUM_TIMEOUT_TYPES] = {
   6406  1.45   nonaka 	{
   6407  1.45   nonaka 		htole32(IWM_SF_SINGLE_UNICAST_AGING_TIMER_DEF),
   6408  1.45   nonaka 		htole32(IWM_SF_SINGLE_UNICAST_IDLE_TIMER_DEF)
   6409  1.45   nonaka 	},
   6410  1.45   nonaka 	{
   6411  1.45   nonaka 		htole32(IWM_SF_AGG_UNICAST_AGING_TIMER_DEF),
   6412  1.45   nonaka 		htole32(IWM_SF_AGG_UNICAST_IDLE_TIMER_DEF)
   6413  1.45   nonaka 	},
   6414  1.45   nonaka 	{
   6415  1.45   nonaka 		htole32(IWM_SF_MCAST_AGING_TIMER_DEF),
   6416  1.45   nonaka 		htole32(IWM_SF_MCAST_IDLE_TIMER_DEF)
   6417  1.45   nonaka 	},
   6418  1.45   nonaka 	{
   6419  1.45   nonaka 		htole32(IWM_SF_BA_AGING_TIMER_DEF),
   6420  1.45   nonaka 		htole32(IWM_SF_BA_IDLE_TIMER_DEF)
   6421  1.45   nonaka 	},
   6422  1.45   nonaka 	{
   6423  1.45   nonaka 		htole32(IWM_SF_TX_RE_AGING_TIMER_DEF),
   6424  1.45   nonaka 		htole32(IWM_SF_TX_RE_IDLE_TIMER_DEF)
   6425  1.45   nonaka 	},
   6426  1.45   nonaka };
   6427  1.45   nonaka 
   6428  1.45   nonaka /*
   6429  1.45   nonaka  * Aging and idle timeouts for the different possible scenarios
   6430  1.45   nonaka  * in single BSS MAC configuration.
   6431  1.45   nonaka  */
   6432  1.45   nonaka static const uint32_t
   6433  1.45   nonaka iwm_sf_full_timeout[IWM_SF_NUM_SCENARIO][IWM_SF_NUM_TIMEOUT_TYPES] = {
   6434  1.45   nonaka 	{
   6435  1.45   nonaka 		htole32(IWM_SF_SINGLE_UNICAST_AGING_TIMER),
   6436  1.45   nonaka 		htole32(IWM_SF_SINGLE_UNICAST_IDLE_TIMER)
   6437  1.45   nonaka 	},
   6438  1.45   nonaka 	{
   6439  1.45   nonaka 		htole32(IWM_SF_AGG_UNICAST_AGING_TIMER),
   6440  1.45   nonaka 		htole32(IWM_SF_AGG_UNICAST_IDLE_TIMER)
   6441  1.45   nonaka 	},
   6442  1.45   nonaka 	{
   6443  1.45   nonaka 		htole32(IWM_SF_MCAST_AGING_TIMER),
   6444  1.45   nonaka 		htole32(IWM_SF_MCAST_IDLE_TIMER)
   6445  1.45   nonaka 	},
   6446  1.45   nonaka 	{
   6447  1.45   nonaka 		htole32(IWM_SF_BA_AGING_TIMER),
   6448  1.45   nonaka 		htole32(IWM_SF_BA_IDLE_TIMER)
   6449  1.45   nonaka 	},
   6450  1.45   nonaka 	{
   6451  1.45   nonaka 		htole32(IWM_SF_TX_RE_AGING_TIMER),
   6452  1.45   nonaka 		htole32(IWM_SF_TX_RE_IDLE_TIMER)
   6453  1.45   nonaka 	},
   6454  1.45   nonaka };
   6455  1.45   nonaka 
   6456  1.45   nonaka static void
   6457  1.45   nonaka iwm_fill_sf_command(struct iwm_softc *sc, struct iwm_sf_cfg_cmd *sf_cmd,
   6458  1.45   nonaka     struct ieee80211_node *ni)
   6459  1.45   nonaka {
   6460  1.45   nonaka 	int i, j, watermark;
   6461  1.45   nonaka 
   6462  1.45   nonaka 	sf_cmd->watermark[IWM_SF_LONG_DELAY_ON] = htole32(IWM_SF_W_MARK_SCAN);
   6463  1.45   nonaka 
   6464  1.45   nonaka 	/*
   6465  1.45   nonaka 	 * If we are in association flow - check antenna configuration
   6466  1.45   nonaka 	 * capabilities of the AP station, and choose the watermark accordingly.
   6467  1.45   nonaka 	 */
   6468  1.45   nonaka 	if (ni) {
   6469  1.45   nonaka #ifndef IEEE80211_NO_HT
   6470  1.45   nonaka 		if (ni->ni_flags & IEEE80211_NODE_HT) {
   6471  1.45   nonaka #ifdef notyet
   6472  1.45   nonaka 			if (ni->ni_rxmcs[2] != 0)
   6473  1.45   nonaka 				watermark = IWM_SF_W_MARK_MIMO3;
   6474  1.45   nonaka 			else if (ni->ni_rxmcs[1] != 0)
   6475  1.45   nonaka 				watermark = IWM_SF_W_MARK_MIMO2;
   6476  1.45   nonaka 			else
   6477  1.45   nonaka #endif
   6478  1.45   nonaka 				watermark = IWM_SF_W_MARK_SISO;
   6479  1.45   nonaka 		} else
   6480  1.45   nonaka #endif
   6481  1.45   nonaka 			watermark = IWM_SF_W_MARK_LEGACY;
   6482  1.45   nonaka 	/* default watermark value for unassociated mode. */
   6483  1.45   nonaka 	} else {
   6484  1.45   nonaka 		watermark = IWM_SF_W_MARK_MIMO2;
   6485  1.45   nonaka 	}
   6486  1.45   nonaka 	sf_cmd->watermark[IWM_SF_FULL_ON] = htole32(watermark);
   6487  1.45   nonaka 
   6488  1.45   nonaka 	for (i = 0; i < IWM_SF_NUM_SCENARIO; i++) {
   6489  1.45   nonaka 		for (j = 0; j < IWM_SF_NUM_TIMEOUT_TYPES; j++) {
   6490  1.45   nonaka 			sf_cmd->long_delay_timeouts[i][j] =
   6491  1.45   nonaka 					htole32(IWM_SF_LONG_DELAY_AGING_TIMER);
   6492   1.1    pooka 		}
   6493  1.45   nonaka 	}
   6494  1.45   nonaka 
   6495  1.45   nonaka 	if (ni) {
   6496  1.45   nonaka 		memcpy(sf_cmd->full_on_timeouts, iwm_sf_full_timeout,
   6497  1.45   nonaka 		       sizeof(iwm_sf_full_timeout));
   6498   1.1    pooka 	} else {
   6499  1.45   nonaka 		memcpy(sf_cmd->full_on_timeouts, iwm_sf_full_timeout_def,
   6500  1.45   nonaka 		       sizeof(iwm_sf_full_timeout_def));
   6501  1.45   nonaka 	}
   6502  1.45   nonaka }
   6503  1.45   nonaka 
   6504  1.45   nonaka static int
   6505  1.45   nonaka iwm_sf_config(struct iwm_softc *sc, int new_state)
   6506  1.45   nonaka {
   6507  1.45   nonaka 	struct ieee80211com *ic = &sc->sc_ic;
   6508  1.45   nonaka 	struct iwm_sf_cfg_cmd sf_cmd = {
   6509  1.45   nonaka 		.state = htole32(IWM_SF_FULL_ON),
   6510  1.45   nonaka 	};
   6511  1.45   nonaka 
   6512  1.45   nonaka 	if (sc->sc_device_family == IWM_DEVICE_FAMILY_8000)
   6513  1.45   nonaka 		sf_cmd.state |= htole32(IWM_SF_CFG_DUMMY_NOTIF_OFF);
   6514  1.45   nonaka 
   6515  1.45   nonaka 	switch (new_state) {
   6516  1.45   nonaka 	case IWM_SF_UNINIT:
   6517  1.45   nonaka 	case IWM_SF_INIT_OFF:
   6518  1.45   nonaka 		iwm_fill_sf_command(sc, &sf_cmd, NULL);
   6519  1.45   nonaka 		break;
   6520  1.45   nonaka 	case IWM_SF_FULL_ON:
   6521  1.45   nonaka 		iwm_fill_sf_command(sc, &sf_cmd, ic->ic_bss);
   6522  1.45   nonaka 		break;
   6523  1.45   nonaka 	default:
   6524  1.45   nonaka 		return EINVAL;
   6525   1.1    pooka 	}
   6526   1.1    pooka 
   6527  1.45   nonaka 	return iwm_send_cmd_pdu(sc, IWM_REPLY_SF_CFG_CMD, IWM_CMD_ASYNC,
   6528  1.45   nonaka 	    sizeof(sf_cmd), &sf_cmd);
   6529  1.45   nonaka }
   6530  1.45   nonaka 
   6531  1.45   nonaka static int
   6532  1.45   nonaka iwm_send_bt_init_conf(struct iwm_softc *sc)
   6533  1.45   nonaka {
   6534  1.45   nonaka 	struct iwm_bt_coex_cmd bt_cmd;
   6535  1.45   nonaka 
   6536  1.45   nonaka 	bt_cmd.mode = htole32(IWM_BT_COEX_WIFI);
   6537  1.45   nonaka 	bt_cmd.enabled_modules = htole32(IWM_BT_COEX_HIGH_BAND_RET);
   6538  1.45   nonaka 
   6539  1.45   nonaka 	return iwm_send_cmd_pdu(sc, IWM_BT_CONFIG, 0, sizeof(bt_cmd), &bt_cmd);
   6540  1.45   nonaka }
   6541  1.45   nonaka 
   6542  1.60   nonaka static bool
   6543  1.60   nonaka iwm_is_lar_supported(struct iwm_softc *sc)
   6544  1.60   nonaka {
   6545  1.60   nonaka 	bool nvm_lar = sc->sc_nvm.lar_enabled;
   6546  1.60   nonaka 	bool tlv_lar = isset(sc->sc_enabled_capa,
   6547  1.60   nonaka 	    IWM_UCODE_TLV_CAPA_LAR_SUPPORT);
   6548  1.60   nonaka 
   6549  1.60   nonaka 	if (iwm_lar_disable)
   6550  1.60   nonaka 		return false;
   6551  1.60   nonaka 
   6552  1.60   nonaka 	/*
   6553  1.60   nonaka 	 * Enable LAR only if it is supported by the FW (TLV) &&
   6554  1.60   nonaka 	 * enabled in the NVM
   6555  1.60   nonaka 	 */
   6556  1.60   nonaka 	if (sc->sc_device_family == IWM_DEVICE_FAMILY_8000)
   6557  1.60   nonaka 		return nvm_lar && tlv_lar;
   6558  1.60   nonaka 	else
   6559  1.60   nonaka 		return tlv_lar;
   6560  1.60   nonaka }
   6561  1.60   nonaka 
   6562  1.45   nonaka static int
   6563  1.45   nonaka iwm_send_update_mcc_cmd(struct iwm_softc *sc, const char *alpha2)
   6564  1.45   nonaka {
   6565  1.45   nonaka 	struct iwm_mcc_update_cmd mcc_cmd;
   6566  1.45   nonaka 	struct iwm_host_cmd hcmd = {
   6567  1.45   nonaka 		.id = IWM_MCC_UPDATE_CMD,
   6568  1.45   nonaka 		.flags = IWM_CMD_WANT_SKB,
   6569  1.45   nonaka 		.data = { &mcc_cmd },
   6570  1.45   nonaka 	};
   6571  1.60   nonaka 	int err;
   6572  1.45   nonaka 	int resp_v2 = isset(sc->sc_enabled_capa,
   6573  1.45   nonaka 	    IWM_UCODE_TLV_CAPA_LAR_SUPPORT_V2);
   6574  1.60   nonaka 
   6575  1.60   nonaka 	if (!iwm_is_lar_supported(sc)) {
   6576  1.60   nonaka 		DPRINTF(("%s: no LAR support\n", __func__));
   6577  1.60   nonaka 		return 0;
   6578  1.60   nonaka 	}
   6579  1.45   nonaka 
   6580  1.45   nonaka 	memset(&mcc_cmd, 0, sizeof(mcc_cmd));
   6581  1.45   nonaka 	mcc_cmd.mcc = htole16(alpha2[0] << 8 | alpha2[1]);
   6582  1.71   nonaka 	if (isset(sc->sc_ucode_api, IWM_UCODE_TLV_API_WIFI_MCC_UPDATE) ||
   6583  1.45   nonaka 	    isset(sc->sc_enabled_capa, IWM_UCODE_TLV_CAPA_LAR_MULTI_MCC))
   6584  1.45   nonaka 		mcc_cmd.source_id = IWM_MCC_SOURCE_GET_CURRENT;
   6585  1.45   nonaka 	else
   6586  1.45   nonaka 		mcc_cmd.source_id = IWM_MCC_SOURCE_OLD_FW;
   6587  1.45   nonaka 
   6588  1.45   nonaka 	if (resp_v2)
   6589  1.45   nonaka 		hcmd.len[0] = sizeof(struct iwm_mcc_update_cmd);
   6590  1.45   nonaka 	else
   6591  1.45   nonaka 		hcmd.len[0] = sizeof(struct iwm_mcc_update_cmd_v1);
   6592  1.45   nonaka 
   6593  1.45   nonaka 	err = iwm_send_cmd(sc, &hcmd);
   6594  1.45   nonaka 	if (err)
   6595  1.45   nonaka 		return err;
   6596  1.45   nonaka 
   6597  1.45   nonaka 	iwm_free_resp(sc, &hcmd);
   6598  1.45   nonaka 
   6599  1.45   nonaka 	return 0;
   6600  1.45   nonaka }
   6601  1.45   nonaka 
   6602  1.45   nonaka static void
   6603  1.45   nonaka iwm_tt_tx_backoff(struct iwm_softc *sc, uint32_t backoff)
   6604  1.45   nonaka {
   6605  1.45   nonaka 	struct iwm_host_cmd cmd = {
   6606  1.45   nonaka 		.id = IWM_REPLY_THERMAL_MNG_BACKOFF,
   6607  1.45   nonaka 		.len = { sizeof(uint32_t), },
   6608  1.45   nonaka 		.data = { &backoff, },
   6609  1.45   nonaka 	};
   6610  1.45   nonaka 
   6611  1.45   nonaka 	iwm_send_cmd(sc, &cmd);
   6612   1.1    pooka }
   6613   1.1    pooka 
   6614   1.4   nonaka static int
   6615   1.1    pooka iwm_init_hw(struct iwm_softc *sc)
   6616   1.1    pooka {
   6617   1.1    pooka 	struct ieee80211com *ic = &sc->sc_ic;
   6618  1.45   nonaka 	int err, i, ac;
   6619   1.1    pooka 
   6620  1.45   nonaka 	err = iwm_preinit(sc);
   6621  1.45   nonaka 	if (err)
   6622  1.45   nonaka 		return err;
   6623   1.1    pooka 
   6624  1.45   nonaka 	err = iwm_start_hw(sc);
   6625  1.45   nonaka 	if (err) {
   6626  1.45   nonaka 		aprint_error_dev(sc->sc_dev, "could not initialize hardware\n");
   6627  1.45   nonaka 		return err;
   6628  1.45   nonaka 	}
   6629   1.1    pooka 
   6630  1.45   nonaka 	err = iwm_run_init_mvm_ucode(sc, 0);
   6631  1.45   nonaka 	if (err)
   6632  1.45   nonaka 		return err;
   6633   1.1    pooka 
   6634  1.45   nonaka 	/* Should stop and start HW since INIT image just loaded. */
   6635   1.1    pooka 	iwm_stop_device(sc);
   6636  1.45   nonaka 	err = iwm_start_hw(sc);
   6637  1.45   nonaka 	if (err) {
   6638   1.3   nonaka 		aprint_error_dev(sc->sc_dev, "could not initialize hardware\n");
   6639  1.45   nonaka 		return err;
   6640   1.2   nonaka 	}
   6641   1.1    pooka 
   6642  1.45   nonaka 	/* Restart, this time with the regular firmware */
   6643  1.45   nonaka 	err = iwm_load_ucode_wait_alive(sc, IWM_UCODE_TYPE_REGULAR);
   6644  1.45   nonaka 	if (err) {
   6645  1.61   nonaka 		aprint_error_dev(sc->sc_dev,
   6646  1.61   nonaka 		    "could not load firmware (error %d)\n", err);
   6647  1.45   nonaka 		goto err;
   6648  1.45   nonaka 	}
   6649  1.45   nonaka 
   6650  1.45   nonaka 	err = iwm_send_bt_init_conf(sc);
   6651  1.45   nonaka 	if (err) {
   6652  1.45   nonaka 		aprint_error_dev(sc->sc_dev,
   6653  1.45   nonaka 		    "could not init bt coex (error %d)\n", err);
   6654  1.45   nonaka 		goto err;
   6655   1.1    pooka 	}
   6656   1.1    pooka 
   6657  1.45   nonaka 	err = iwm_send_tx_ant_cfg(sc, iwm_fw_valid_tx_ant(sc));
   6658  1.45   nonaka 	if (err) {
   6659  1.45   nonaka 		aprint_error_dev(sc->sc_dev,
   6660  1.45   nonaka 		    "could not init tx ant config (error %d)\n", err);
   6661  1.45   nonaka 		goto err;
   6662  1.45   nonaka 	}
   6663   1.1    pooka 
   6664   1.8   nonaka 	/* Send phy db control command and then phy db calibration*/
   6665  1.45   nonaka 	err = iwm_send_phy_db_data(sc);
   6666  1.45   nonaka 	if (err) {
   6667  1.45   nonaka 		aprint_error_dev(sc->sc_dev,
   6668  1.45   nonaka 		    "could not init phy db (error %d)\n", err);
   6669  1.45   nonaka 		goto err;
   6670  1.45   nonaka 	}
   6671   1.1    pooka 
   6672  1.45   nonaka 	err = iwm_send_phy_cfg_cmd(sc);
   6673  1.45   nonaka 	if (err) {
   6674  1.45   nonaka 		aprint_error_dev(sc->sc_dev,
   6675  1.45   nonaka 		    "could not send phy config (error %d)\n", err);
   6676  1.45   nonaka 		goto err;
   6677  1.45   nonaka 	}
   6678   1.1    pooka 
   6679   1.1    pooka 	/* Add auxiliary station for scanning */
   6680  1.45   nonaka 	err = iwm_add_aux_sta(sc);
   6681  1.45   nonaka 	if (err) {
   6682  1.45   nonaka 		aprint_error_dev(sc->sc_dev,
   6683  1.45   nonaka 		    "could not add aux station (error %d)\n", err);
   6684  1.45   nonaka 		goto err;
   6685  1.45   nonaka 	}
   6686   1.1    pooka 
   6687   1.1    pooka 	for (i = 0; i < IWM_NUM_PHY_CTX; i++) {
   6688   1.1    pooka 		/*
   6689   1.1    pooka 		 * The channel used here isn't relevant as it's
   6690   1.1    pooka 		 * going to be overwritten in the other flows.
   6691   1.1    pooka 		 * For now use the first channel we have.
   6692   1.1    pooka 		 */
   6693  1.45   nonaka 		sc->sc_phyctxt[i].channel = &ic->ic_channels[1];
   6694  1.45   nonaka 		err = iwm_phy_ctxt_cmd(sc, &sc->sc_phyctxt[i], 1, 1,
   6695  1.45   nonaka 		    IWM_FW_CTXT_ACTION_ADD, 0);
   6696  1.45   nonaka 		if (err) {
   6697  1.45   nonaka 			aprint_error_dev(sc->sc_dev,
   6698  1.45   nonaka 			    "could not add phy context %d (error %d)\n",
   6699  1.45   nonaka 			    i, err);
   6700  1.45   nonaka 			goto err;
   6701  1.45   nonaka 		}
   6702  1.45   nonaka 	}
   6703  1.45   nonaka 
   6704  1.45   nonaka 	/* Initialize tx backoffs to the minimum. */
   6705  1.45   nonaka 	if (sc->sc_device_family == IWM_DEVICE_FAMILY_7000)
   6706  1.45   nonaka 		iwm_tt_tx_backoff(sc, 0);
   6707  1.45   nonaka 
   6708  1.45   nonaka 	err = iwm_power_update_device(sc);
   6709  1.45   nonaka 	if (err) {
   6710  1.45   nonaka 		aprint_error_dev(sc->sc_dev,
   6711  1.45   nonaka 		    "could send power command (error %d)\n", err);
   6712  1.45   nonaka 		goto err;
   6713  1.45   nonaka 	}
   6714  1.45   nonaka 
   6715  1.61   nonaka 	err = iwm_send_update_mcc_cmd(sc, iwm_default_mcc);
   6716  1.60   nonaka 	if (err) {
   6717  1.60   nonaka 		aprint_error_dev(sc->sc_dev,
   6718  1.60   nonaka 		    "could not init LAR (error %d)\n", err);
   6719  1.60   nonaka 		goto err;
   6720  1.45   nonaka 	}
   6721  1.45   nonaka 
   6722  1.45   nonaka 	if (isset(sc->sc_enabled_capa, IWM_UCODE_TLV_CAPA_UMAC_SCAN)) {
   6723  1.45   nonaka 		err = iwm_config_umac_scan(sc);
   6724  1.45   nonaka 		if (err) {
   6725  1.45   nonaka 			aprint_error_dev(sc->sc_dev,
   6726  1.45   nonaka 			    "could not configure scan (error %d)\n", err);
   6727  1.45   nonaka 			goto err;
   6728  1.45   nonaka 		}
   6729  1.45   nonaka 	}
   6730  1.45   nonaka 
   6731  1.45   nonaka 	for (ac = 0; ac < WME_NUM_AC; ac++) {
   6732  1.45   nonaka 		err = iwm_enable_txq(sc, IWM_STATION_ID, ac,
   6733  1.45   nonaka 		    iwm_ac_to_tx_fifo[ac]);
   6734  1.45   nonaka 		if (err) {
   6735  1.45   nonaka 			aprint_error_dev(sc->sc_dev,
   6736  1.45   nonaka 			    "could not enable Tx queue %d (error %d)\n",
   6737  1.45   nonaka 			    i, err);
   6738  1.45   nonaka 			goto err;
   6739  1.45   nonaka 		}
   6740   1.1    pooka 	}
   6741   1.1    pooka 
   6742  1.45   nonaka 	err = iwm_disable_beacon_filter(sc);
   6743  1.45   nonaka 	if (err) {
   6744  1.45   nonaka 		aprint_error_dev(sc->sc_dev,
   6745  1.45   nonaka 		    "could not disable beacon filter (error %d)\n", err);
   6746  1.45   nonaka 		goto err;
   6747   1.1    pooka 	}
   6748   1.1    pooka 
   6749   1.1    pooka 	return 0;
   6750   1.1    pooka 
   6751  1.45   nonaka  err:
   6752   1.1    pooka 	iwm_stop_device(sc);
   6753  1.45   nonaka 	return err;
   6754   1.1    pooka }
   6755   1.1    pooka 
   6756  1.11   nonaka /* Allow multicast from our BSSID. */
   6757  1.11   nonaka static int
   6758  1.11   nonaka iwm_allow_mcast(struct iwm_softc *sc)
   6759  1.11   nonaka {
   6760  1.11   nonaka 	struct ieee80211com *ic = &sc->sc_ic;
   6761  1.11   nonaka 	struct ieee80211_node *ni = ic->ic_bss;
   6762  1.11   nonaka 	struct iwm_mcast_filter_cmd *cmd;
   6763  1.11   nonaka 	size_t size;
   6764  1.45   nonaka 	int err;
   6765  1.11   nonaka 
   6766  1.11   nonaka 	size = roundup(sizeof(*cmd), 4);
   6767  1.11   nonaka 	cmd = kmem_intr_zalloc(size, KM_NOSLEEP);
   6768  1.11   nonaka 	if (cmd == NULL)
   6769  1.11   nonaka 		return ENOMEM;
   6770  1.11   nonaka 	cmd->filter_own = 1;
   6771  1.11   nonaka 	cmd->port_id = 0;
   6772  1.11   nonaka 	cmd->count = 0;
   6773  1.11   nonaka 	cmd->pass_all = 1;
   6774  1.11   nonaka 	IEEE80211_ADDR_COPY(cmd->bssid, ni->ni_bssid);
   6775  1.11   nonaka 
   6776  1.45   nonaka 	err = iwm_send_cmd_pdu(sc, IWM_MCAST_FILTER_CMD, 0, size, cmd);
   6777  1.11   nonaka 	kmem_intr_free(cmd, size);
   6778  1.45   nonaka 	return err;
   6779  1.11   nonaka }
   6780  1.11   nonaka 
   6781   1.4   nonaka static int
   6782   1.1    pooka iwm_init(struct ifnet *ifp)
   6783   1.1    pooka {
   6784   1.1    pooka 	struct iwm_softc *sc = ifp->if_softc;
   6785  1.45   nonaka 	int err;
   6786   1.1    pooka 
   6787  1.45   nonaka 	if (ISSET(sc->sc_flags, IWM_FLAG_HW_INITED))
   6788   1.1    pooka 		return 0;
   6789  1.45   nonaka 
   6790   1.1    pooka 	sc->sc_generation++;
   6791   1.1    pooka 	sc->sc_flags &= ~IWM_FLAG_STOPPED;
   6792   1.1    pooka 
   6793  1.45   nonaka 	err = iwm_init_hw(sc);
   6794  1.45   nonaka 	if (err) {
   6795   1.1    pooka 		iwm_stop(ifp, 1);
   6796  1.45   nonaka 		return err;
   6797   1.1    pooka 	}
   6798   1.1    pooka 
   6799   1.1    pooka 	ifp->if_flags &= ~IFF_OACTIVE;
   6800   1.1    pooka 	ifp->if_flags |= IFF_RUNNING;
   6801   1.1    pooka 
   6802   1.1    pooka 	ieee80211_begin_scan(&sc->sc_ic, 0);
   6803  1.45   nonaka 	SET(sc->sc_flags, IWM_FLAG_HW_INITED);
   6804   1.1    pooka 
   6805   1.1    pooka 	return 0;
   6806   1.1    pooka }
   6807   1.1    pooka 
   6808   1.4   nonaka static void
   6809   1.1    pooka iwm_start(struct ifnet *ifp)
   6810   1.1    pooka {
   6811   1.1    pooka 	struct iwm_softc *sc = ifp->if_softc;
   6812   1.1    pooka 	struct ieee80211com *ic = &sc->sc_ic;
   6813   1.1    pooka 	struct ieee80211_node *ni;
   6814   1.8   nonaka 	struct ether_header *eh;
   6815   1.1    pooka 	struct mbuf *m;
   6816   1.1    pooka 	int ac;
   6817   1.1    pooka 
   6818   1.1    pooka 	if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING)
   6819   1.1    pooka 		return;
   6820   1.1    pooka 
   6821   1.1    pooka 	for (;;) {
   6822   1.1    pooka 		/* why isn't this done per-queue? */
   6823   1.1    pooka 		if (sc->qfullmsk != 0) {
   6824   1.1    pooka 			ifp->if_flags |= IFF_OACTIVE;
   6825   1.1    pooka 			break;
   6826   1.1    pooka 		}
   6827   1.1    pooka 
   6828   1.1    pooka 		/* need to send management frames even if we're not RUNning */
   6829   1.1    pooka 		IF_DEQUEUE(&ic->ic_mgtq, m);
   6830   1.1    pooka 		if (m) {
   6831  1.41    ozaki 			ni = M_GETCTX(m, struct ieee80211_node *);
   6832  1.50   nonaka 			M_CLEARCTX(m);
   6833  1.45   nonaka 			ac = WME_AC_BE;
   6834   1.1    pooka 			goto sendit;
   6835   1.1    pooka 		}
   6836   1.1    pooka 		if (ic->ic_state != IEEE80211_S_RUN) {
   6837   1.1    pooka 			break;
   6838   1.1    pooka 		}
   6839   1.1    pooka 
   6840   1.1    pooka 		IFQ_DEQUEUE(&ifp->if_snd, m);
   6841  1.50   nonaka 		if (m == NULL)
   6842   1.1    pooka 			break;
   6843  1.50   nonaka 
   6844   1.8   nonaka 		if (m->m_len < sizeof (*eh) &&
   6845   1.8   nonaka 		   (m = m_pullup(m, sizeof (*eh))) == NULL) {
   6846   1.8   nonaka 			ifp->if_oerrors++;
   6847   1.8   nonaka 			continue;
   6848   1.8   nonaka 		}
   6849   1.1    pooka 
   6850   1.1    pooka 		eh = mtod(m, struct ether_header *);
   6851   1.1    pooka 		ni = ieee80211_find_txnode(ic, eh->ether_dhost);
   6852   1.1    pooka 		if (ni == NULL) {
   6853   1.1    pooka 			m_freem(m);
   6854   1.1    pooka 			ifp->if_oerrors++;
   6855   1.1    pooka 			continue;
   6856   1.1    pooka 		}
   6857  1.50   nonaka 
   6858   1.1    pooka 		/* classify mbuf so we can find which tx ring to use */
   6859   1.1    pooka 		if (ieee80211_classify(ic, m, ni) != 0) {
   6860   1.1    pooka 			m_freem(m);
   6861   1.1    pooka 			ieee80211_free_node(ni);
   6862   1.1    pooka 			ifp->if_oerrors++;
   6863   1.1    pooka 			continue;
   6864   1.1    pooka 		}
   6865   1.1    pooka 
   6866   1.1    pooka 		/* No QoS encapsulation for EAPOL frames. */
   6867   1.1    pooka 		ac = (eh->ether_type != htons(ETHERTYPE_PAE)) ?
   6868   1.1    pooka 		    M_WME_GETAC(m) : WME_AC_BE;
   6869   1.1    pooka 
   6870  1.48   nonaka 		bpf_mtap(ifp, m);
   6871  1.48   nonaka 
   6872   1.1    pooka 		if ((m = ieee80211_encap(ic, m, ni)) == NULL) {
   6873   1.1    pooka 			ieee80211_free_node(ni);
   6874   1.1    pooka 			ifp->if_oerrors++;
   6875   1.1    pooka 			continue;
   6876   1.1    pooka 		}
   6877   1.1    pooka 
   6878   1.1    pooka  sendit:
   6879  1.48   nonaka 		bpf_mtap3(ic->ic_rawbpf, m);
   6880  1.48   nonaka 
   6881   1.1    pooka 		if (iwm_tx(sc, m, ni, ac) != 0) {
   6882   1.1    pooka 			ieee80211_free_node(ni);
   6883   1.1    pooka 			ifp->if_oerrors++;
   6884   1.1    pooka 			continue;
   6885   1.1    pooka 		}
   6886   1.1    pooka 
   6887   1.1    pooka 		if (ifp->if_flags & IFF_UP) {
   6888   1.1    pooka 			sc->sc_tx_timer = 15;
   6889   1.1    pooka 			ifp->if_timer = 1;
   6890   1.1    pooka 		}
   6891   1.1    pooka 	}
   6892   1.1    pooka }
   6893   1.1    pooka 
   6894   1.4   nonaka static void
   6895   1.1    pooka iwm_stop(struct ifnet *ifp, int disable)
   6896   1.1    pooka {
   6897   1.1    pooka 	struct iwm_softc *sc = ifp->if_softc;
   6898   1.1    pooka 	struct ieee80211com *ic = &sc->sc_ic;
   6899  1.45   nonaka 	struct iwm_node *in = (struct iwm_node *)ic->ic_bss;
   6900   1.1    pooka 
   6901   1.1    pooka 	sc->sc_flags &= ~IWM_FLAG_HW_INITED;
   6902   1.1    pooka 	sc->sc_flags |= IWM_FLAG_STOPPED;
   6903   1.1    pooka 	sc->sc_generation++;
   6904   1.1    pooka 	ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
   6905   1.1    pooka 
   6906  1.45   nonaka 	if (in)
   6907  1.45   nonaka 		in->in_phyctxt = NULL;
   6908  1.45   nonaka 
   6909   1.1    pooka 	if (ic->ic_state != IEEE80211_S_INIT)
   6910   1.1    pooka 		ieee80211_new_state(ic, IEEE80211_S_INIT, -1);
   6911   1.1    pooka 
   6912  1.26   nonaka 	callout_stop(&sc->sc_calib_to);
   6913  1.45   nonaka 	iwm_led_blink_stop(sc);
   6914   1.1    pooka 	ifp->if_timer = sc->sc_tx_timer = 0;
   6915   1.1    pooka 	iwm_stop_device(sc);
   6916   1.1    pooka }
   6917   1.1    pooka 
   6918   1.4   nonaka static void
   6919   1.1    pooka iwm_watchdog(struct ifnet *ifp)
   6920   1.1    pooka {
   6921   1.1    pooka 	struct iwm_softc *sc = ifp->if_softc;
   6922   1.1    pooka 
   6923   1.1    pooka 	ifp->if_timer = 0;
   6924   1.1    pooka 	if (sc->sc_tx_timer > 0) {
   6925   1.1    pooka 		if (--sc->sc_tx_timer == 0) {
   6926   1.5   nonaka 			aprint_error_dev(sc->sc_dev, "device timeout\n");
   6927   1.2   nonaka #ifdef IWM_DEBUG
   6928   1.1    pooka 			iwm_nic_error(sc);
   6929   1.2   nonaka #endif
   6930   1.1    pooka 			ifp->if_flags &= ~IFF_UP;
   6931   1.1    pooka 			iwm_stop(ifp, 1);
   6932   1.1    pooka 			ifp->if_oerrors++;
   6933   1.1    pooka 			return;
   6934   1.1    pooka 		}
   6935   1.1    pooka 		ifp->if_timer = 1;
   6936   1.1    pooka 	}
   6937   1.1    pooka 
   6938   1.1    pooka 	ieee80211_watchdog(&sc->sc_ic);
   6939   1.1    pooka }
   6940   1.1    pooka 
   6941   1.4   nonaka static int
   6942   1.1    pooka iwm_ioctl(struct ifnet *ifp, u_long cmd, void *data)
   6943   1.1    pooka {
   6944   1.1    pooka 	struct iwm_softc *sc = ifp->if_softc;
   6945   1.1    pooka 	struct ieee80211com *ic = &sc->sc_ic;
   6946   1.1    pooka 	const struct sockaddr *sa;
   6947  1.45   nonaka 	int s, err = 0;
   6948   1.1    pooka 
   6949   1.1    pooka 	s = splnet();
   6950   1.1    pooka 
   6951   1.1    pooka 	switch (cmd) {
   6952   1.1    pooka 	case SIOCSIFADDR:
   6953   1.1    pooka 		ifp->if_flags |= IFF_UP;
   6954   1.1    pooka 		/* FALLTHROUGH */
   6955   1.1    pooka 	case SIOCSIFFLAGS:
   6956  1.45   nonaka 		err = ifioctl_common(ifp, cmd, data);
   6957  1.45   nonaka 		if (err)
   6958   1.1    pooka 			break;
   6959   1.1    pooka 		if (ifp->if_flags & IFF_UP) {
   6960   1.1    pooka 			if (!(ifp->if_flags & IFF_RUNNING)) {
   6961  1.45   nonaka 				err = iwm_init(ifp);
   6962  1.45   nonaka 				if (err)
   6963   1.1    pooka 					ifp->if_flags &= ~IFF_UP;
   6964   1.1    pooka 			}
   6965   1.1    pooka 		} else {
   6966   1.1    pooka 			if (ifp->if_flags & IFF_RUNNING)
   6967   1.1    pooka 				iwm_stop(ifp, 1);
   6968   1.1    pooka 		}
   6969   1.1    pooka 		break;
   6970   1.1    pooka 
   6971   1.1    pooka 	case SIOCADDMULTI:
   6972   1.1    pooka 	case SIOCDELMULTI:
   6973  1.36   nonaka 		if (!ISSET(sc->sc_flags, IWM_FLAG_ATTACHED)) {
   6974  1.45   nonaka 			err = ENXIO;
   6975  1.36   nonaka 			break;
   6976  1.36   nonaka 		}
   6977   1.1    pooka 		sa = ifreq_getaddr(SIOCADDMULTI, (struct ifreq *)data);
   6978  1.45   nonaka 		err = (cmd == SIOCADDMULTI) ?
   6979   1.1    pooka 		    ether_addmulti(sa, &sc->sc_ec) :
   6980   1.1    pooka 		    ether_delmulti(sa, &sc->sc_ec);
   6981  1.45   nonaka 		if (err == ENETRESET)
   6982  1.45   nonaka 			err = 0;
   6983   1.1    pooka 		break;
   6984   1.1    pooka 
   6985   1.1    pooka 	default:
   6986  1.36   nonaka 		if (!ISSET(sc->sc_flags, IWM_FLAG_ATTACHED)) {
   6987  1.45   nonaka 			err = ether_ioctl(ifp, cmd, data);
   6988  1.36   nonaka 			break;
   6989  1.36   nonaka 		}
   6990  1.45   nonaka 		err = ieee80211_ioctl(ic, cmd, data);
   6991  1.36   nonaka 		break;
   6992   1.1    pooka 	}
   6993   1.1    pooka 
   6994  1.45   nonaka 	if (err == ENETRESET) {
   6995  1.45   nonaka 		err = 0;
   6996   1.1    pooka 		if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) ==
   6997   1.1    pooka 		    (IFF_UP | IFF_RUNNING)) {
   6998   1.1    pooka 			iwm_stop(ifp, 0);
   6999  1.45   nonaka 			err = iwm_init(ifp);
   7000   1.1    pooka 		}
   7001   1.1    pooka 	}
   7002   1.1    pooka 
   7003   1.1    pooka 	splx(s);
   7004  1.45   nonaka 	return err;
   7005   1.1    pooka }
   7006   1.1    pooka 
   7007   1.1    pooka /*
   7008   1.1    pooka  * Note: This structure is read from the device with IO accesses,
   7009   1.1    pooka  * and the reading already does the endian conversion. As it is
   7010   1.1    pooka  * read with uint32_t-sized accesses, any members with a different size
   7011   1.1    pooka  * need to be ordered correctly though!
   7012   1.1    pooka  */
   7013   1.1    pooka struct iwm_error_event_table {
   7014   1.1    pooka 	uint32_t valid;		/* (nonzero) valid, (0) log is empty */
   7015   1.1    pooka 	uint32_t error_id;		/* type of error */
   7016  1.45   nonaka 	uint32_t trm_hw_status0;	/* TRM HW status */
   7017  1.45   nonaka 	uint32_t trm_hw_status1;	/* TRM HW status */
   7018   1.1    pooka 	uint32_t blink2;		/* branch link */
   7019   1.1    pooka 	uint32_t ilink1;		/* interrupt link */
   7020   1.1    pooka 	uint32_t ilink2;		/* interrupt link */
   7021   1.1    pooka 	uint32_t data1;		/* error-specific data */
   7022   1.1    pooka 	uint32_t data2;		/* error-specific data */
   7023   1.1    pooka 	uint32_t data3;		/* error-specific data */
   7024   1.1    pooka 	uint32_t bcon_time;		/* beacon timer */
   7025   1.1    pooka 	uint32_t tsf_low;		/* network timestamp function timer */
   7026   1.1    pooka 	uint32_t tsf_hi;		/* network timestamp function timer */
   7027   1.1    pooka 	uint32_t gp1;		/* GP1 timer register */
   7028   1.1    pooka 	uint32_t gp2;		/* GP2 timer register */
   7029  1.45   nonaka 	uint32_t fw_rev_type;	/* firmware revision type */
   7030  1.45   nonaka 	uint32_t major;		/* uCode version major */
   7031  1.45   nonaka 	uint32_t minor;		/* uCode version minor */
   7032   1.1    pooka 	uint32_t hw_ver;		/* HW Silicon version */
   7033   1.1    pooka 	uint32_t brd_ver;		/* HW board version */
   7034   1.1    pooka 	uint32_t log_pc;		/* log program counter */
   7035   1.1    pooka 	uint32_t frame_ptr;		/* frame pointer */
   7036   1.1    pooka 	uint32_t stack_ptr;		/* stack pointer */
   7037   1.1    pooka 	uint32_t hcmd;		/* last host command header */
   7038   1.1    pooka 	uint32_t isr0;		/* isr status register LMPM_NIC_ISR0:
   7039   1.1    pooka 				 * rxtx_flag */
   7040   1.1    pooka 	uint32_t isr1;		/* isr status register LMPM_NIC_ISR1:
   7041   1.1    pooka 				 * host_flag */
   7042   1.1    pooka 	uint32_t isr2;		/* isr status register LMPM_NIC_ISR2:
   7043   1.1    pooka 				 * enc_flag */
   7044   1.1    pooka 	uint32_t isr3;		/* isr status register LMPM_NIC_ISR3:
   7045   1.1    pooka 				 * time_flag */
   7046   1.1    pooka 	uint32_t isr4;		/* isr status register LMPM_NIC_ISR4:
   7047   1.1    pooka 				 * wico interrupt */
   7048  1.45   nonaka 	uint32_t last_cmd_id;	/* last HCMD id handled by the firmware */
   7049   1.1    pooka 	uint32_t wait_event;		/* wait event() caller address */
   7050   1.1    pooka 	uint32_t l2p_control;	/* L2pControlField */
   7051   1.1    pooka 	uint32_t l2p_duration;	/* L2pDurationField */
   7052   1.1    pooka 	uint32_t l2p_mhvalid;	/* L2pMhValidBits */
   7053   1.1    pooka 	uint32_t l2p_addr_match;	/* L2pAddrMatchStat */
   7054   1.1    pooka 	uint32_t lmpm_pmg_sel;	/* indicate which clocks are turned on
   7055   1.1    pooka 				 * (LMPM_PMG_SEL) */
   7056   1.1    pooka 	uint32_t u_timestamp;	/* indicate when the date and time of the
   7057   1.1    pooka 				 * compilation */
   7058   1.1    pooka 	uint32_t flow_handler;	/* FH read/write pointers, RX credit */
   7059  1.45   nonaka } __packed /* LOG_ERROR_TABLE_API_S_VER_3 */;
   7060  1.45   nonaka 
   7061  1.45   nonaka /*
   7062  1.45   nonaka  * UMAC error struct - relevant starting from family 8000 chip.
   7063  1.45   nonaka  * Note: This structure is read from the device with IO accesses,
   7064  1.45   nonaka  * and the reading already does the endian conversion. As it is
   7065  1.45   nonaka  * read with u32-sized accesses, any members with a different size
   7066  1.45   nonaka  * need to be ordered correctly though!
   7067  1.45   nonaka  */
   7068  1.45   nonaka struct iwm_umac_error_event_table {
   7069  1.45   nonaka 	uint32_t valid;		/* (nonzero) valid, (0) log is empty */
   7070  1.45   nonaka 	uint32_t error_id;	/* type of error */
   7071  1.45   nonaka 	uint32_t blink1;	/* branch link */
   7072  1.45   nonaka 	uint32_t blink2;	/* branch link */
   7073  1.45   nonaka 	uint32_t ilink1;	/* interrupt link */
   7074  1.45   nonaka 	uint32_t ilink2;	/* interrupt link */
   7075  1.45   nonaka 	uint32_t data1;		/* error-specific data */
   7076  1.45   nonaka 	uint32_t data2;		/* error-specific data */
   7077  1.45   nonaka 	uint32_t data3;		/* error-specific data */
   7078  1.45   nonaka 	uint32_t umac_major;
   7079  1.45   nonaka 	uint32_t umac_minor;
   7080  1.45   nonaka 	uint32_t frame_pointer;	/* core register 27 */
   7081  1.45   nonaka 	uint32_t stack_pointer;	/* core register 28 */
   7082  1.45   nonaka 	uint32_t cmd_header;	/* latest host cmd sent to UMAC */
   7083  1.45   nonaka 	uint32_t nic_isr_pref;	/* ISR status register */
   7084   1.1    pooka } __packed;
   7085   1.1    pooka 
   7086   1.1    pooka #define ERROR_START_OFFSET  (1 * sizeof(uint32_t))
   7087   1.1    pooka #define ERROR_ELEM_SIZE     (7 * sizeof(uint32_t))
   7088   1.1    pooka 
   7089   1.4   nonaka #ifdef IWM_DEBUG
   7090   1.4   nonaka static const struct {
   7091   1.1    pooka 	const char *name;
   7092   1.1    pooka 	uint8_t num;
   7093   1.1    pooka } advanced_lookup[] = {
   7094   1.1    pooka 	{ "NMI_INTERRUPT_WDG", 0x34 },
   7095   1.1    pooka 	{ "SYSASSERT", 0x35 },
   7096   1.1    pooka 	{ "UCODE_VERSION_MISMATCH", 0x37 },
   7097   1.1    pooka 	{ "BAD_COMMAND", 0x38 },
   7098   1.1    pooka 	{ "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C },
   7099   1.1    pooka 	{ "FATAL_ERROR", 0x3D },
   7100   1.1    pooka 	{ "NMI_TRM_HW_ERR", 0x46 },
   7101   1.1    pooka 	{ "NMI_INTERRUPT_TRM", 0x4C },
   7102   1.1    pooka 	{ "NMI_INTERRUPT_BREAK_POINT", 0x54 },
   7103   1.1    pooka 	{ "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C },
   7104   1.1    pooka 	{ "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64 },
   7105   1.1    pooka 	{ "NMI_INTERRUPT_HOST", 0x66 },
   7106   1.1    pooka 	{ "NMI_INTERRUPT_ACTION_PT", 0x7C },
   7107   1.1    pooka 	{ "NMI_INTERRUPT_UNKNOWN", 0x84 },
   7108   1.1    pooka 	{ "NMI_INTERRUPT_INST_ACTION_PT", 0x86 },
   7109   1.1    pooka 	{ "ADVANCED_SYSASSERT", 0 },
   7110   1.1    pooka };
   7111   1.1    pooka 
   7112   1.4   nonaka static const char *
   7113   1.1    pooka iwm_desc_lookup(uint32_t num)
   7114   1.1    pooka {
   7115   1.1    pooka 	int i;
   7116   1.1    pooka 
   7117   1.1    pooka 	for (i = 0; i < __arraycount(advanced_lookup) - 1; i++)
   7118   1.1    pooka 		if (advanced_lookup[i].num == num)
   7119   1.1    pooka 			return advanced_lookup[i].name;
   7120   1.1    pooka 
   7121   1.1    pooka 	/* No entry matches 'num', so it is the last: ADVANCED_SYSASSERT */
   7122   1.1    pooka 	return advanced_lookup[i].name;
   7123   1.1    pooka }
   7124   1.1    pooka 
   7125   1.1    pooka /*
   7126   1.1    pooka  * Support for dumping the error log seemed like a good idea ...
   7127   1.1    pooka  * but it's mostly hex junk and the only sensible thing is the
   7128   1.1    pooka  * hw/ucode revision (which we know anyway).  Since it's here,
   7129   1.1    pooka  * I'll just leave it in, just in case e.g. the Intel guys want to
   7130   1.1    pooka  * help us decipher some "ADVANCED_SYSASSERT" later.
   7131   1.1    pooka  */
   7132   1.4   nonaka static void
   7133   1.1    pooka iwm_nic_error(struct iwm_softc *sc)
   7134   1.1    pooka {
   7135  1.45   nonaka 	struct iwm_error_event_table t;
   7136   1.1    pooka 	uint32_t base;
   7137   1.1    pooka 
   7138   1.3   nonaka 	aprint_error_dev(sc->sc_dev, "dumping device error log\n");
   7139   1.1    pooka 	base = sc->sc_uc.uc_error_event_table;
   7140  1.45   nonaka 	if (base < 0x800000) {
   7141   1.3   nonaka 		aprint_error_dev(sc->sc_dev,
   7142  1.45   nonaka 		    "Invalid error log pointer 0x%08x\n", base);
   7143   1.1    pooka 		return;
   7144   1.1    pooka 	}
   7145   1.1    pooka 
   7146  1.45   nonaka 	if (iwm_read_mem(sc, base, &t, sizeof(t)/sizeof(uint32_t))) {
   7147   1.3   nonaka 		aprint_error_dev(sc->sc_dev, "reading errlog failed\n");
   7148   1.1    pooka 		return;
   7149   1.1    pooka 	}
   7150   1.1    pooka 
   7151  1.45   nonaka 	if (!t.valid) {
   7152   1.3   nonaka 		aprint_error_dev(sc->sc_dev, "errlog not found, skipping\n");
   7153   1.1    pooka 		return;
   7154   1.1    pooka 	}
   7155   1.1    pooka 
   7156  1.45   nonaka 	if (ERROR_START_OFFSET <= t.valid * ERROR_ELEM_SIZE) {
   7157  1.45   nonaka 		aprint_error_dev(sc->sc_dev, "Start Error Log Dump:\n");
   7158   1.3   nonaka 		aprint_error_dev(sc->sc_dev, "Status: 0x%x, count: %d\n",
   7159  1.45   nonaka 		    sc->sc_flags, t.valid);
   7160   1.1    pooka 	}
   7161   1.1    pooka 
   7162  1.45   nonaka 	aprint_error_dev(sc->sc_dev, "%08X | %-28s\n", t.error_id,
   7163  1.45   nonaka 	    iwm_desc_lookup(t.error_id));
   7164  1.45   nonaka 	aprint_error_dev(sc->sc_dev, "%08X | trm_hw_status0\n",
   7165  1.45   nonaka 	    t.trm_hw_status0);
   7166  1.45   nonaka 	aprint_error_dev(sc->sc_dev, "%08X | trm_hw_status1\n",
   7167  1.45   nonaka 	    t.trm_hw_status1);
   7168  1.45   nonaka 	aprint_error_dev(sc->sc_dev, "%08X | branchlink2\n", t.blink2);
   7169  1.45   nonaka 	aprint_error_dev(sc->sc_dev, "%08X | interruptlink1\n", t.ilink1);
   7170  1.45   nonaka 	aprint_error_dev(sc->sc_dev, "%08X | interruptlink2\n", t.ilink2);
   7171  1.45   nonaka 	aprint_error_dev(sc->sc_dev, "%08X | data1\n", t.data1);
   7172  1.45   nonaka 	aprint_error_dev(sc->sc_dev, "%08X | data2\n", t.data2);
   7173  1.45   nonaka 	aprint_error_dev(sc->sc_dev, "%08X | data3\n", t.data3);
   7174  1.45   nonaka 	aprint_error_dev(sc->sc_dev, "%08X | beacon time\n", t.bcon_time);
   7175  1.45   nonaka 	aprint_error_dev(sc->sc_dev, "%08X | tsf low\n", t.tsf_low);
   7176  1.45   nonaka 	aprint_error_dev(sc->sc_dev, "%08X | tsf hi\n", t.tsf_hi);
   7177  1.45   nonaka 	aprint_error_dev(sc->sc_dev, "%08X | time gp1\n", t.gp1);
   7178  1.45   nonaka 	aprint_error_dev(sc->sc_dev, "%08X | time gp2\n", t.gp2);
   7179  1.45   nonaka 	aprint_error_dev(sc->sc_dev, "%08X | uCode revision type\n",
   7180  1.45   nonaka 	    t.fw_rev_type);
   7181  1.45   nonaka 	aprint_error_dev(sc->sc_dev, "%08X | uCode version major\n",
   7182  1.45   nonaka 	    t.major);
   7183  1.45   nonaka 	aprint_error_dev(sc->sc_dev, "%08X | uCode version minor\n",
   7184  1.45   nonaka 	    t.minor);
   7185  1.45   nonaka 	aprint_error_dev(sc->sc_dev, "%08X | hw version\n", t.hw_ver);
   7186  1.45   nonaka 	aprint_error_dev(sc->sc_dev, "%08X | board version\n", t.brd_ver);
   7187  1.45   nonaka 	aprint_error_dev(sc->sc_dev, "%08X | hcmd\n", t.hcmd);
   7188  1.45   nonaka 	aprint_error_dev(sc->sc_dev, "%08X | isr0\n", t.isr0);
   7189  1.45   nonaka 	aprint_error_dev(sc->sc_dev, "%08X | isr1\n", t.isr1);
   7190  1.45   nonaka 	aprint_error_dev(sc->sc_dev, "%08X | isr2\n", t.isr2);
   7191  1.45   nonaka 	aprint_error_dev(sc->sc_dev, "%08X | isr3\n", t.isr3);
   7192  1.45   nonaka 	aprint_error_dev(sc->sc_dev, "%08X | isr4\n", t.isr4);
   7193  1.45   nonaka 	aprint_error_dev(sc->sc_dev, "%08X | last cmd Id\n", t.last_cmd_id);
   7194  1.45   nonaka 	aprint_error_dev(sc->sc_dev, "%08X | wait_event\n", t.wait_event);
   7195  1.45   nonaka 	aprint_error_dev(sc->sc_dev, "%08X | l2p_control\n", t.l2p_control);
   7196  1.45   nonaka 	aprint_error_dev(sc->sc_dev, "%08X | l2p_duration\n", t.l2p_duration);
   7197  1.45   nonaka 	aprint_error_dev(sc->sc_dev, "%08X | l2p_mhvalid\n", t.l2p_mhvalid);
   7198   1.3   nonaka 	aprint_error_dev(sc->sc_dev, "%08X | l2p_addr_match\n",
   7199  1.45   nonaka 	    t.l2p_addr_match);
   7200  1.45   nonaka 	aprint_error_dev(sc->sc_dev, "%08X | lmpm_pmg_sel\n", t.lmpm_pmg_sel);
   7201  1.45   nonaka 	aprint_error_dev(sc->sc_dev, "%08X | timestamp\n", t.u_timestamp);
   7202  1.45   nonaka 	aprint_error_dev(sc->sc_dev, "%08X | flow_handler\n", t.flow_handler);
   7203  1.45   nonaka 
   7204  1.45   nonaka 	if (sc->sc_uc.uc_umac_error_event_table)
   7205  1.45   nonaka 		iwm_nic_umac_error(sc);
   7206  1.45   nonaka }
   7207  1.45   nonaka 
   7208  1.45   nonaka static void
   7209  1.45   nonaka iwm_nic_umac_error(struct iwm_softc *sc)
   7210  1.45   nonaka {
   7211  1.45   nonaka 	struct iwm_umac_error_event_table t;
   7212  1.45   nonaka 	uint32_t base;
   7213  1.45   nonaka 
   7214  1.45   nonaka 	base = sc->sc_uc.uc_umac_error_event_table;
   7215  1.45   nonaka 
   7216  1.45   nonaka 	if (base < 0x800000) {
   7217  1.45   nonaka 		aprint_error_dev(sc->sc_dev,
   7218  1.45   nonaka 		    "Invalid error log pointer 0x%08x\n", base);
   7219  1.45   nonaka 		return;
   7220  1.45   nonaka 	}
   7221  1.45   nonaka 
   7222  1.45   nonaka 	if (iwm_read_mem(sc, base, &t, sizeof(t)/sizeof(uint32_t))) {
   7223  1.45   nonaka 		aprint_error_dev(sc->sc_dev, "reading errlog failed\n");
   7224  1.45   nonaka 		return;
   7225  1.45   nonaka 	}
   7226  1.45   nonaka 
   7227  1.45   nonaka 	if (ERROR_START_OFFSET <= t.valid * ERROR_ELEM_SIZE) {
   7228  1.45   nonaka 		aprint_error_dev(sc->sc_dev, "Start UMAC Error Log Dump:\n");
   7229  1.45   nonaka 		aprint_error_dev(sc->sc_dev, "Status: 0x%x, count: %d\n",
   7230  1.45   nonaka 		    sc->sc_flags, t.valid);
   7231  1.45   nonaka 	}
   7232  1.45   nonaka 
   7233  1.45   nonaka 	aprint_error_dev(sc->sc_dev, "0x%08X | %s\n", t.error_id,
   7234  1.45   nonaka 		iwm_desc_lookup(t.error_id));
   7235  1.45   nonaka 	aprint_error_dev(sc->sc_dev, "0x%08X | umac branchlink1\n", t.blink1);
   7236  1.45   nonaka 	aprint_error_dev(sc->sc_dev, "0x%08X | umac branchlink2\n", t.blink2);
   7237  1.45   nonaka 	aprint_error_dev(sc->sc_dev, "0x%08X | umac interruptlink1\n",
   7238  1.45   nonaka 	    t.ilink1);
   7239  1.45   nonaka 	aprint_error_dev(sc->sc_dev, "0x%08X | umac interruptlink2\n",
   7240  1.45   nonaka 	    t.ilink2);
   7241  1.45   nonaka 	aprint_error_dev(sc->sc_dev, "0x%08X | umac data1\n", t.data1);
   7242  1.45   nonaka 	aprint_error_dev(sc->sc_dev, "0x%08X | umac data2\n", t.data2);
   7243  1.45   nonaka 	aprint_error_dev(sc->sc_dev, "0x%08X | umac data3\n", t.data3);
   7244  1.45   nonaka 	aprint_error_dev(sc->sc_dev, "0x%08X | umac major\n", t.umac_major);
   7245  1.45   nonaka 	aprint_error_dev(sc->sc_dev, "0x%08X | umac minor\n", t.umac_minor);
   7246  1.45   nonaka 	aprint_error_dev(sc->sc_dev, "0x%08X | frame pointer\n",
   7247  1.45   nonaka 	    t.frame_pointer);
   7248  1.45   nonaka 	aprint_error_dev(sc->sc_dev, "0x%08X | stack pointer\n",
   7249  1.45   nonaka 	    t.stack_pointer);
   7250  1.45   nonaka 	aprint_error_dev(sc->sc_dev, "0x%08X | last host cmd\n", t.cmd_header);
   7251  1.45   nonaka 	aprint_error_dev(sc->sc_dev, "0x%08X | isr status reg\n",
   7252  1.45   nonaka 	    t.nic_isr_pref);
   7253   1.1    pooka }
   7254   1.2   nonaka #endif
   7255   1.1    pooka 
   7256   1.1    pooka #define SYNC_RESP_STRUCT(_var_, _pkt_)					\
   7257   1.1    pooka do {									\
   7258   1.1    pooka 	bus_dmamap_sync(sc->sc_dmat, data->map, sizeof(*(_pkt_)),	\
   7259   1.1    pooka 	    sizeof(*(_var_)), BUS_DMASYNC_POSTREAD);			\
   7260   1.1    pooka 	_var_ = (void *)((_pkt_)+1);					\
   7261   1.1    pooka } while (/*CONSTCOND*/0)
   7262   1.1    pooka 
   7263   1.1    pooka #define SYNC_RESP_PTR(_ptr_, _len_, _pkt_)				\
   7264   1.1    pooka do {									\
   7265   1.1    pooka 	bus_dmamap_sync(sc->sc_dmat, data->map, sizeof(*(_pkt_)),	\
   7266   1.1    pooka 	    sizeof(len), BUS_DMASYNC_POSTREAD);				\
   7267   1.1    pooka 	_ptr_ = (void *)((_pkt_)+1);					\
   7268   1.1    pooka } while (/*CONSTCOND*/0)
   7269   1.1    pooka 
   7270   1.1    pooka #define ADVANCE_RXQ(sc) (sc->rxq.cur = (sc->rxq.cur + 1) % IWM_RX_RING_COUNT);
   7271   1.1    pooka 
   7272   1.4   nonaka static void
   7273   1.1    pooka iwm_notif_intr(struct iwm_softc *sc)
   7274   1.1    pooka {
   7275   1.1    pooka 	uint16_t hw;
   7276   1.1    pooka 
   7277   1.1    pooka 	bus_dmamap_sync(sc->sc_dmat, sc->rxq.stat_dma.map,
   7278   1.1    pooka 	    0, sc->rxq.stat_dma.size, BUS_DMASYNC_POSTREAD);
   7279   1.1    pooka 
   7280   1.1    pooka 	hw = le16toh(sc->rxq.stat->closed_rb_num) & 0xfff;
   7281   1.1    pooka 	while (sc->rxq.cur != hw) {
   7282   1.1    pooka 		struct iwm_rx_data *data = &sc->rxq.data[sc->rxq.cur];
   7283  1.45   nonaka 		struct iwm_rx_packet *pkt;
   7284   1.1    pooka 		struct iwm_cmd_response *cresp;
   7285  1.45   nonaka 		int orig_qid, qid, idx, code;
   7286   1.1    pooka 
   7287   1.1    pooka 		bus_dmamap_sync(sc->sc_dmat, data->map, 0, sizeof(*pkt),
   7288   1.1    pooka 		    BUS_DMASYNC_POSTREAD);
   7289   1.1    pooka 		pkt = mtod(data->m, struct iwm_rx_packet *);
   7290   1.1    pooka 
   7291  1.45   nonaka 		orig_qid = pkt->hdr.qid;
   7292  1.45   nonaka 		qid = orig_qid & ~0x80;
   7293   1.1    pooka 		idx = pkt->hdr.idx;
   7294   1.1    pooka 
   7295  1.45   nonaka 		code = IWM_WIDE_ID(pkt->hdr.flags, pkt->hdr.code);
   7296   1.1    pooka 
   7297   1.1    pooka 		/*
   7298   1.1    pooka 		 * randomly get these from the firmware, no idea why.
   7299   1.1    pooka 		 * they at least seem harmless, so just ignore them for now
   7300   1.1    pooka 		 */
   7301   1.1    pooka 		if (__predict_false((pkt->hdr.code == 0 && qid == 0 && idx == 0)
   7302   1.1    pooka 		    || pkt->len_n_flags == htole32(0x55550000))) {
   7303   1.1    pooka 			ADVANCE_RXQ(sc);
   7304   1.1    pooka 			continue;
   7305   1.1    pooka 		}
   7306   1.1    pooka 
   7307  1.45   nonaka 		switch (code) {
   7308   1.1    pooka 		case IWM_REPLY_RX_PHY_CMD:
   7309  1.45   nonaka 			iwm_rx_rx_phy_cmd(sc, pkt, data);
   7310   1.1    pooka 			break;
   7311   1.1    pooka 
   7312   1.1    pooka 		case IWM_REPLY_RX_MPDU_CMD:
   7313  1.45   nonaka 			iwm_rx_rx_mpdu(sc, pkt, data);
   7314   1.1    pooka 			break;
   7315   1.1    pooka 
   7316   1.1    pooka 		case IWM_TX_CMD:
   7317  1.45   nonaka 			iwm_rx_tx_cmd(sc, pkt, data);
   7318   1.1    pooka 			break;
   7319   1.1    pooka 
   7320   1.1    pooka 		case IWM_MISSED_BEACONS_NOTIFICATION:
   7321  1.45   nonaka 			iwm_rx_missed_beacons_notif(sc, pkt, data);
   7322   1.1    pooka 			break;
   7323   1.1    pooka 
   7324  1.45   nonaka 		case IWM_MFUART_LOAD_NOTIFICATION:
   7325  1.45   nonaka 			break;
   7326   1.1    pooka 
   7327  1.45   nonaka 		case IWM_ALIVE: {
   7328  1.45   nonaka 			struct iwm_alive_resp_v1 *resp1;
   7329  1.45   nonaka 			struct iwm_alive_resp_v2 *resp2;
   7330  1.45   nonaka 			struct iwm_alive_resp_v3 *resp3;
   7331  1.45   nonaka 
   7332  1.45   nonaka 			if (iwm_rx_packet_payload_len(pkt) == sizeof(*resp1)) {
   7333  1.45   nonaka 				SYNC_RESP_STRUCT(resp1, pkt);
   7334  1.45   nonaka 				sc->sc_uc.uc_error_event_table
   7335  1.45   nonaka 				    = le32toh(resp1->error_event_table_ptr);
   7336  1.45   nonaka 				sc->sc_uc.uc_log_event_table
   7337  1.45   nonaka 				    = le32toh(resp1->log_event_table_ptr);
   7338  1.45   nonaka 				sc->sched_base = le32toh(resp1->scd_base_ptr);
   7339  1.45   nonaka 				if (resp1->status == IWM_ALIVE_STATUS_OK)
   7340  1.45   nonaka 					sc->sc_uc.uc_ok = 1;
   7341  1.45   nonaka 				else
   7342  1.45   nonaka 					sc->sc_uc.uc_ok = 0;
   7343  1.45   nonaka 			}
   7344  1.45   nonaka 			if (iwm_rx_packet_payload_len(pkt) == sizeof(*resp2)) {
   7345  1.45   nonaka 				SYNC_RESP_STRUCT(resp2, pkt);
   7346  1.45   nonaka 				sc->sc_uc.uc_error_event_table
   7347  1.45   nonaka 				    = le32toh(resp2->error_event_table_ptr);
   7348  1.45   nonaka 				sc->sc_uc.uc_log_event_table
   7349  1.45   nonaka 				    = le32toh(resp2->log_event_table_ptr);
   7350  1.45   nonaka 				sc->sched_base = le32toh(resp2->scd_base_ptr);
   7351  1.45   nonaka 				sc->sc_uc.uc_umac_error_event_table
   7352  1.45   nonaka 				    = le32toh(resp2->error_info_addr);
   7353  1.45   nonaka 				if (resp2->status == IWM_ALIVE_STATUS_OK)
   7354  1.45   nonaka 					sc->sc_uc.uc_ok = 1;
   7355  1.45   nonaka 				else
   7356  1.45   nonaka 					sc->sc_uc.uc_ok = 0;
   7357  1.45   nonaka 			}
   7358  1.45   nonaka 			if (iwm_rx_packet_payload_len(pkt) == sizeof(*resp3)) {
   7359  1.45   nonaka 				SYNC_RESP_STRUCT(resp3, pkt);
   7360  1.45   nonaka 				sc->sc_uc.uc_error_event_table
   7361  1.45   nonaka 				    = le32toh(resp3->error_event_table_ptr);
   7362  1.45   nonaka 				sc->sc_uc.uc_log_event_table
   7363  1.45   nonaka 				    = le32toh(resp3->log_event_table_ptr);
   7364  1.45   nonaka 				sc->sched_base = le32toh(resp3->scd_base_ptr);
   7365  1.45   nonaka 				sc->sc_uc.uc_umac_error_event_table
   7366  1.45   nonaka 				    = le32toh(resp3->error_info_addr);
   7367  1.45   nonaka 				if (resp3->status == IWM_ALIVE_STATUS_OK)
   7368  1.45   nonaka 					sc->sc_uc.uc_ok = 1;
   7369  1.45   nonaka 				else
   7370  1.45   nonaka 					sc->sc_uc.uc_ok = 0;
   7371  1.45   nonaka 			}
   7372   1.1    pooka 
   7373   1.1    pooka 			sc->sc_uc.uc_intr = 1;
   7374   1.1    pooka 			wakeup(&sc->sc_uc);
   7375  1.45   nonaka 			break;
   7376  1.45   nonaka 		}
   7377   1.1    pooka 
   7378   1.1    pooka 		case IWM_CALIB_RES_NOTIF_PHY_DB: {
   7379   1.1    pooka 			struct iwm_calib_res_notif_phy_db *phy_db_notif;
   7380   1.1    pooka 			SYNC_RESP_STRUCT(phy_db_notif, pkt);
   7381   1.5   nonaka 			uint16_t size = le16toh(phy_db_notif->length);
   7382   1.5   nonaka 			bus_dmamap_sync(sc->sc_dmat, data->map,
   7383   1.5   nonaka 			    sizeof(*pkt) + sizeof(*phy_db_notif),
   7384   1.5   nonaka 			    size, BUS_DMASYNC_POSTREAD);
   7385   1.5   nonaka 			iwm_phy_db_set_section(sc, phy_db_notif, size);
   7386  1.45   nonaka 			break;
   7387  1.45   nonaka 		}
   7388   1.1    pooka 
   7389   1.1    pooka 		case IWM_STATISTICS_NOTIFICATION: {
   7390   1.1    pooka 			struct iwm_notif_statistics *stats;
   7391   1.1    pooka 			SYNC_RESP_STRUCT(stats, pkt);
   7392   1.1    pooka 			memcpy(&sc->sc_stats, stats, sizeof(sc->sc_stats));
   7393   1.1    pooka 			sc->sc_noise = iwm_get_noise(&stats->rx.general);
   7394  1.45   nonaka 			break;
   7395  1.45   nonaka 		}
   7396   1.1    pooka 
   7397   1.1    pooka 		case IWM_NVM_ACCESS_CMD:
   7398  1.45   nonaka 		case IWM_MCC_UPDATE_CMD:
   7399   1.1    pooka 			if (sc->sc_wantresp == ((qid << 16) | idx)) {
   7400   1.1    pooka 				bus_dmamap_sync(sc->sc_dmat, data->map, 0,
   7401   1.1    pooka 				    sizeof(sc->sc_cmd_resp),
   7402   1.1    pooka 				    BUS_DMASYNC_POSTREAD);
   7403   1.1    pooka 				memcpy(sc->sc_cmd_resp,
   7404   1.1    pooka 				    pkt, sizeof(sc->sc_cmd_resp));
   7405   1.1    pooka 			}
   7406   1.1    pooka 			break;
   7407   1.1    pooka 
   7408  1.45   nonaka 		case IWM_MCC_CHUB_UPDATE_CMD: {
   7409  1.45   nonaka 			struct iwm_mcc_chub_notif *notif;
   7410  1.45   nonaka 			SYNC_RESP_STRUCT(notif, pkt);
   7411  1.45   nonaka 
   7412  1.45   nonaka 			sc->sc_fw_mcc[0] = (notif->mcc & 0xff00) >> 8;
   7413  1.45   nonaka 			sc->sc_fw_mcc[1] = notif->mcc & 0xff;
   7414  1.45   nonaka 			sc->sc_fw_mcc[2] = '\0';
   7415  1.45   nonaka 			break;
   7416  1.45   nonaka 		}
   7417  1.45   nonaka 
   7418  1.45   nonaka 		case IWM_DTS_MEASUREMENT_NOTIFICATION:
   7419  1.61   nonaka 		case IWM_WIDE_ID(IWM_PHY_OPS_GROUP,
   7420  1.61   nonaka 		    IWM_DTS_MEASUREMENT_NOTIF_WIDE): {
   7421  1.61   nonaka 			struct iwm_dts_measurement_notif_v1 *notif1;
   7422  1.61   nonaka 			struct iwm_dts_measurement_notif_v2 *notif2;
   7423  1.61   nonaka 
   7424  1.61   nonaka 			if (iwm_rx_packet_payload_len(pkt) == sizeof(*notif1)) {
   7425  1.61   nonaka 				SYNC_RESP_STRUCT(notif1, pkt);
   7426  1.61   nonaka 				DPRINTF(("%s: DTS temp=%d \n",
   7427  1.61   nonaka 				    DEVNAME(sc), notif1->temp));
   7428  1.61   nonaka 				break;
   7429  1.61   nonaka 			}
   7430  1.61   nonaka 			if (iwm_rx_packet_payload_len(pkt) == sizeof(*notif2)) {
   7431  1.61   nonaka 				SYNC_RESP_STRUCT(notif2, pkt);
   7432  1.61   nonaka 				DPRINTF(("%s: DTS temp=%d \n",
   7433  1.61   nonaka 				    DEVNAME(sc), notif2->temp));
   7434  1.61   nonaka 				break;
   7435  1.61   nonaka 			}
   7436  1.45   nonaka 			break;
   7437  1.61   nonaka 		}
   7438  1.45   nonaka 
   7439   1.1    pooka 		case IWM_PHY_CONFIGURATION_CMD:
   7440   1.1    pooka 		case IWM_TX_ANT_CONFIGURATION_CMD:
   7441   1.1    pooka 		case IWM_ADD_STA:
   7442   1.1    pooka 		case IWM_MAC_CONTEXT_CMD:
   7443   1.1    pooka 		case IWM_REPLY_SF_CFG_CMD:
   7444   1.1    pooka 		case IWM_POWER_TABLE_CMD:
   7445   1.1    pooka 		case IWM_PHY_CONTEXT_CMD:
   7446   1.1    pooka 		case IWM_BINDING_CONTEXT_CMD:
   7447   1.1    pooka 		case IWM_TIME_EVENT_CMD:
   7448   1.1    pooka 		case IWM_SCAN_REQUEST_CMD:
   7449  1.45   nonaka 		case IWM_WIDE_ID(IWM_ALWAYS_LONG_GROUP, IWM_SCAN_CFG_CMD):
   7450  1.45   nonaka 		case IWM_WIDE_ID(IWM_ALWAYS_LONG_GROUP, IWM_SCAN_REQ_UMAC):
   7451  1.61   nonaka 		case IWM_WIDE_ID(IWM_ALWAYS_LONG_GROUP, IWM_SCAN_ABORT_UMAC):
   7452  1.45   nonaka 		case IWM_SCAN_OFFLOAD_REQUEST_CMD:
   7453  1.61   nonaka 		case IWM_SCAN_OFFLOAD_ABORT_CMD:
   7454   1.1    pooka 		case IWM_REPLY_BEACON_FILTERING_CMD:
   7455   1.1    pooka 		case IWM_MAC_PM_POWER_TABLE:
   7456   1.1    pooka 		case IWM_TIME_QUOTA_CMD:
   7457   1.1    pooka 		case IWM_REMOVE_STA:
   7458   1.1    pooka 		case IWM_TXPATH_FLUSH:
   7459   1.1    pooka 		case IWM_LQ_CMD:
   7460  1.71   nonaka 		case IWM_WIDE_ID(IWM_ALWAYS_LONG_GROUP, IWM_FW_PAGING_BLOCK_CMD):
   7461  1.45   nonaka 		case IWM_BT_CONFIG:
   7462  1.45   nonaka 		case IWM_REPLY_THERMAL_MNG_BACKOFF:
   7463   1.1    pooka 			SYNC_RESP_STRUCT(cresp, pkt);
   7464   1.1    pooka 			if (sc->sc_wantresp == ((qid << 16) | idx)) {
   7465   1.1    pooka 				memcpy(sc->sc_cmd_resp,
   7466  1.45   nonaka 				    pkt, sizeof(*pkt) + sizeof(*cresp));
   7467   1.1    pooka 			}
   7468   1.1    pooka 			break;
   7469   1.1    pooka 
   7470   1.1    pooka 		/* ignore */
   7471  1.61   nonaka 		case IWM_PHY_DB_CMD:
   7472   1.1    pooka 			break;
   7473   1.1    pooka 
   7474   1.1    pooka 		case IWM_INIT_COMPLETE_NOTIF:
   7475   1.1    pooka 			sc->sc_init_complete = 1;
   7476   1.1    pooka 			wakeup(&sc->sc_init_complete);
   7477   1.1    pooka 			break;
   7478   1.1    pooka 
   7479  1.45   nonaka 		case IWM_SCAN_OFFLOAD_COMPLETE: {
   7480  1.45   nonaka 			struct iwm_periodic_scan_complete *notif;
   7481  1.45   nonaka 			SYNC_RESP_STRUCT(notif, pkt);
   7482  1.45   nonaka 			break;
   7483  1.45   nonaka 		}
   7484  1.45   nonaka 
   7485  1.45   nonaka 		case IWM_SCAN_ITERATION_COMPLETE: {
   7486  1.45   nonaka 			struct iwm_lmac_scan_complete_notif *notif;
   7487  1.45   nonaka 			SYNC_RESP_STRUCT(notif, pkt);
   7488  1.61   nonaka 			if (ISSET(sc->sc_flags, IWM_FLAG_SCANNING)) {
   7489  1.61   nonaka 				CLR(sc->sc_flags, IWM_FLAG_SCANNING);
   7490  1.61   nonaka 				iwm_endscan(sc);
   7491  1.61   nonaka 			}
   7492  1.45   nonaka 			break;
   7493  1.45   nonaka 		}
   7494  1.45   nonaka 
   7495  1.45   nonaka 		case IWM_SCAN_COMPLETE_UMAC: {
   7496  1.45   nonaka 			struct iwm_umac_scan_complete *notif;
   7497   1.1    pooka 			SYNC_RESP_STRUCT(notif, pkt);
   7498  1.61   nonaka 			if (ISSET(sc->sc_flags, IWM_FLAG_SCANNING)) {
   7499  1.61   nonaka 				CLR(sc->sc_flags, IWM_FLAG_SCANNING);
   7500  1.61   nonaka 				iwm_endscan(sc);
   7501  1.61   nonaka 			}
   7502  1.45   nonaka 			break;
   7503  1.45   nonaka 		}
   7504   1.1    pooka 
   7505  1.45   nonaka 		case IWM_SCAN_ITERATION_COMPLETE_UMAC: {
   7506  1.45   nonaka 			struct iwm_umac_scan_iter_complete_notif *notif;
   7507  1.45   nonaka 			SYNC_RESP_STRUCT(notif, pkt);
   7508  1.61   nonaka 			if (ISSET(sc->sc_flags, IWM_FLAG_SCANNING)) {
   7509  1.61   nonaka 				CLR(sc->sc_flags, IWM_FLAG_SCANNING);
   7510  1.61   nonaka 				iwm_endscan(sc);
   7511  1.61   nonaka 			}
   7512  1.45   nonaka 			break;
   7513  1.45   nonaka 		}
   7514   1.1    pooka 
   7515   1.1    pooka 		case IWM_REPLY_ERROR: {
   7516   1.1    pooka 			struct iwm_error_resp *resp;
   7517   1.1    pooka 			SYNC_RESP_STRUCT(resp, pkt);
   7518   1.3   nonaka 			aprint_error_dev(sc->sc_dev,
   7519   1.3   nonaka 			    "firmware error 0x%x, cmd 0x%x\n",
   7520   1.3   nonaka 			    le32toh(resp->error_type), resp->cmd_id);
   7521  1.45   nonaka 			break;
   7522  1.45   nonaka 		}
   7523   1.1    pooka 
   7524   1.1    pooka 		case IWM_TIME_EVENT_NOTIFICATION: {
   7525   1.1    pooka 			struct iwm_time_event_notif *notif;
   7526   1.1    pooka 			SYNC_RESP_STRUCT(notif, pkt);
   7527  1.45   nonaka 			break;
   7528  1.45   nonaka 		}
   7529   1.8   nonaka 
   7530  1.71   nonaka 		case IWM_DEBUG_LOG_MSG:
   7531  1.71   nonaka 			break;
   7532  1.71   nonaka 
   7533  1.45   nonaka 		case IWM_MCAST_FILTER_CMD:
   7534  1.45   nonaka 			break;
   7535   1.1    pooka 
   7536  1.45   nonaka 		case IWM_SCD_QUEUE_CFG: {
   7537  1.45   nonaka 			struct iwm_scd_txq_cfg_rsp *rsp;
   7538  1.45   nonaka 			SYNC_RESP_STRUCT(rsp, pkt);
   7539  1.11   nonaka 			break;
   7540  1.45   nonaka 		}
   7541  1.11   nonaka 
   7542   1.1    pooka 		default:
   7543   1.3   nonaka 			aprint_error_dev(sc->sc_dev,
   7544  1.45   nonaka 			    "unhandled firmware response 0x%x 0x%x/0x%x "
   7545  1.45   nonaka 			    "rx ring %d[%d]\n",
   7546  1.45   nonaka 			    code, pkt->hdr.code, pkt->len_n_flags, qid, idx);
   7547   1.1    pooka 			break;
   7548   1.1    pooka 		}
   7549   1.1    pooka 
   7550   1.1    pooka 		/*
   7551  1.45   nonaka 		 * uCode sets bit 0x80 when it originates the notification,
   7552  1.45   nonaka 		 * i.e. when the notification is not a direct response to a
   7553  1.45   nonaka 		 * command sent by the driver.
   7554  1.45   nonaka 		 * For example, uCode issues IWM_REPLY_RX when it sends a
   7555  1.45   nonaka 		 * received frame to the driver.
   7556   1.1    pooka 		 */
   7557  1.45   nonaka 		if (!(orig_qid & (1 << 7))) {
   7558  1.45   nonaka 			iwm_cmd_done(sc, qid, idx);
   7559   1.1    pooka 		}
   7560   1.1    pooka 
   7561   1.1    pooka 		ADVANCE_RXQ(sc);
   7562   1.1    pooka 	}
   7563   1.1    pooka 
   7564   1.1    pooka 	/*
   7565  1.45   nonaka 	 * Seems like the hardware gets upset unless we align the write by 8??
   7566   1.1    pooka 	 */
   7567   1.1    pooka 	hw = (hw == 0) ? IWM_RX_RING_COUNT - 1 : hw - 1;
   7568   1.1    pooka 	IWM_WRITE(sc, IWM_FH_RSCSR_CHNL0_WPTR, hw & ~7);
   7569   1.1    pooka }
   7570   1.1    pooka 
   7571  1.61   nonaka static int
   7572  1.61   nonaka iwm_intr(void *arg)
   7573  1.61   nonaka {
   7574  1.61   nonaka 	struct iwm_softc *sc = arg;
   7575  1.61   nonaka 
   7576  1.70   nonaka 	/* Disable interrupts */
   7577  1.61   nonaka 	IWM_WRITE(sc, IWM_CSR_INT_MASK, 0);
   7578  1.61   nonaka 
   7579  1.70   nonaka 	softint_schedule(sc->sc_soft_ih);
   7580  1.70   nonaka 	return 1;
   7581  1.70   nonaka }
   7582  1.70   nonaka 
   7583  1.70   nonaka static void
   7584  1.70   nonaka iwm_softintr(void *arg)
   7585  1.70   nonaka {
   7586  1.70   nonaka 	struct iwm_softc *sc = arg;
   7587  1.70   nonaka 	struct ifnet *ifp = IC2IFP(&sc->sc_ic);
   7588  1.70   nonaka 	uint32_t r1, r2;
   7589  1.70   nonaka 	int isperiodic = 0, s;
   7590  1.70   nonaka 
   7591  1.63   nonaka 	if (__predict_true(sc->sc_flags & IWM_FLAG_USE_ICT)) {
   7592  1.61   nonaka 		uint32_t *ict = sc->ict_dma.vaddr;
   7593  1.61   nonaka 		int tmp;
   7594  1.61   nonaka 
   7595  1.61   nonaka 		bus_dmamap_sync(sc->sc_dmat, sc->ict_dma.map,
   7596  1.61   nonaka 		    0, sc->ict_dma.size, BUS_DMASYNC_POSTREAD);
   7597  1.61   nonaka 		tmp = htole32(ict[sc->ict_cur]);
   7598  1.70   nonaka 		if (tmp == 0)
   7599  1.70   nonaka 			goto out_ena;	/* Interrupt not for us. */
   7600  1.61   nonaka 
   7601  1.61   nonaka 		/*
   7602  1.61   nonaka 		 * ok, there was something.  keep plowing until we have all.
   7603  1.61   nonaka 		 */
   7604  1.61   nonaka 		r1 = r2 = 0;
   7605  1.61   nonaka 		while (tmp) {
   7606  1.61   nonaka 			r1 |= tmp;
   7607  1.61   nonaka 			ict[sc->ict_cur] = 0;	/* Acknowledge. */
   7608  1.61   nonaka 			sc->ict_cur = (sc->ict_cur + 1) % IWM_ICT_COUNT;
   7609  1.61   nonaka 			tmp = htole32(ict[sc->ict_cur]);
   7610  1.61   nonaka 		}
   7611  1.61   nonaka 
   7612  1.62   nonaka 		bus_dmamap_sync(sc->sc_dmat, sc->ict_dma.map,
   7613  1.62   nonaka 		    0, sc->ict_dma.size, BUS_DMASYNC_PREWRITE);
   7614  1.62   nonaka 
   7615  1.61   nonaka 		/* this is where the fun begins.  don't ask */
   7616  1.61   nonaka 		if (r1 == 0xffffffff)
   7617  1.61   nonaka 			r1 = 0;
   7618  1.61   nonaka 
   7619  1.61   nonaka 		/* i am not expected to understand this */
   7620  1.61   nonaka 		if (r1 & 0xc0000)
   7621  1.61   nonaka 			r1 |= 0x8000;
   7622  1.61   nonaka 		r1 = (0xff & r1) | ((0xff00 & r1) << 16);
   7623  1.61   nonaka 	} else {
   7624  1.61   nonaka 		r1 = IWM_READ(sc, IWM_CSR_INT);
   7625  1.61   nonaka 		if (r1 == 0xffffffff || (r1 & 0xfffffff0) == 0xa5a5a5a0)
   7626  1.70   nonaka 			return;	/* Hardware gone! */
   7627  1.61   nonaka 		r2 = IWM_READ(sc, IWM_CSR_FH_INT_STATUS);
   7628  1.61   nonaka 	}
   7629  1.61   nonaka 	if (r1 == 0 && r2 == 0) {
   7630  1.70   nonaka 		goto out_ena;	/* Interrupt not for us. */
   7631  1.61   nonaka 	}
   7632  1.61   nonaka 
   7633  1.63   nonaka 	/* Acknowledge interrupts. */
   7634  1.61   nonaka 	IWM_WRITE(sc, IWM_CSR_INT, r1 | ~sc->sc_intmask);
   7635  1.63   nonaka 	if (__predict_false(!(sc->sc_flags & IWM_FLAG_USE_ICT)))
   7636  1.63   nonaka 		IWM_WRITE(sc, IWM_CSR_FH_INT_STATUS, r2);
   7637  1.61   nonaka 
   7638   1.1    pooka 	if (r1 & IWM_CSR_INT_BIT_SW_ERR) {
   7639   1.1    pooka #ifdef IWM_DEBUG
   7640   1.1    pooka 		int i;
   7641   1.1    pooka 
   7642   1.1    pooka 		iwm_nic_error(sc);
   7643   1.1    pooka 
   7644   1.1    pooka 		/* Dump driver status (TX and RX rings) while we're here. */
   7645   1.1    pooka 		DPRINTF(("driver status:\n"));
   7646  1.45   nonaka 		for (i = 0; i < IWM_MAX_QUEUES; i++) {
   7647   1.1    pooka 			struct iwm_tx_ring *ring = &sc->txq[i];
   7648   1.1    pooka 			DPRINTF(("  tx ring %2d: qid=%-2d cur=%-3d "
   7649   1.1    pooka 			    "queued=%-3d\n",
   7650   1.1    pooka 			    i, ring->qid, ring->cur, ring->queued));
   7651   1.1    pooka 		}
   7652   1.1    pooka 		DPRINTF(("  rx ring: cur=%d\n", sc->rxq.cur));
   7653  1.45   nonaka 		DPRINTF(("  802.11 state %s\n",
   7654  1.45   nonaka 		    ieee80211_state_name[sc->sc_ic.ic_state]));
   7655   1.1    pooka #endif
   7656   1.1    pooka 
   7657   1.3   nonaka 		aprint_error_dev(sc->sc_dev, "fatal firmware error\n");
   7658  1.50   nonaka  fatal:
   7659  1.68   nonaka 		s = splnet();
   7660   1.1    pooka 		ifp->if_flags &= ~IFF_UP;
   7661   1.1    pooka 		iwm_stop(ifp, 1);
   7662  1.68   nonaka 		splx(s);
   7663  1.50   nonaka 		/* Don't restore interrupt mask */
   7664  1.50   nonaka 		return;
   7665   1.1    pooka 
   7666   1.1    pooka 	}
   7667   1.1    pooka 
   7668   1.1    pooka 	if (r1 & IWM_CSR_INT_BIT_HW_ERR) {
   7669   1.3   nonaka 		aprint_error_dev(sc->sc_dev,
   7670   1.3   nonaka 		    "hardware error, stopping device\n");
   7671  1.50   nonaka 		goto fatal;
   7672   1.1    pooka 	}
   7673   1.1    pooka 
   7674   1.1    pooka 	/* firmware chunk loaded */
   7675   1.1    pooka 	if (r1 & IWM_CSR_INT_BIT_FH_TX) {
   7676   1.1    pooka 		IWM_WRITE(sc, IWM_CSR_FH_INT_STATUS, IWM_CSR_FH_INT_TX_MASK);
   7677   1.1    pooka 		sc->sc_fw_chunk_done = 1;
   7678   1.1    pooka 		wakeup(&sc->sc_fw);
   7679   1.1    pooka 	}
   7680   1.1    pooka 
   7681   1.1    pooka 	if (r1 & IWM_CSR_INT_BIT_RF_KILL) {
   7682  1.68   nonaka 		if (iwm_check_rfkill(sc) && (ifp->if_flags & IFF_UP))
   7683  1.68   nonaka 			goto fatal;
   7684   1.1    pooka 	}
   7685   1.1    pooka 
   7686   1.1    pooka 	if (r1 & IWM_CSR_INT_BIT_RX_PERIODIC) {
   7687   1.1    pooka 		IWM_WRITE(sc, IWM_CSR_INT, IWM_CSR_INT_BIT_RX_PERIODIC);
   7688   1.1    pooka 		if ((r1 & (IWM_CSR_INT_BIT_FH_RX | IWM_CSR_INT_BIT_SW_RX)) == 0)
   7689   1.1    pooka 			IWM_WRITE_1(sc,
   7690   1.1    pooka 			    IWM_CSR_INT_PERIODIC_REG, IWM_CSR_INT_PERIODIC_DIS);
   7691   1.1    pooka 		isperiodic = 1;
   7692   1.1    pooka 	}
   7693   1.1    pooka 
   7694  1.45   nonaka 	if ((r1 & (IWM_CSR_INT_BIT_FH_RX | IWM_CSR_INT_BIT_SW_RX)) ||
   7695  1.45   nonaka 	    isperiodic) {
   7696   1.1    pooka 		IWM_WRITE(sc, IWM_CSR_FH_INT_STATUS, IWM_CSR_FH_INT_RX_MASK);
   7697   1.1    pooka 
   7698   1.1    pooka 		iwm_notif_intr(sc);
   7699   1.1    pooka 
   7700   1.1    pooka 		/* enable periodic interrupt, see above */
   7701  1.45   nonaka 		if (r1 & (IWM_CSR_INT_BIT_FH_RX | IWM_CSR_INT_BIT_SW_RX) &&
   7702  1.45   nonaka 		    !isperiodic)
   7703   1.1    pooka 			IWM_WRITE_1(sc, IWM_CSR_INT_PERIODIC_REG,
   7704   1.1    pooka 			    IWM_CSR_INT_PERIODIC_ENA);
   7705   1.1    pooka 	}
   7706   1.1    pooka 
   7707  1.70   nonaka out_ena:
   7708   1.1    pooka 	iwm_restore_interrupts(sc);
   7709   1.1    pooka }
   7710   1.1    pooka 
   7711   1.1    pooka /*
   7712   1.1    pooka  * Autoconf glue-sniffing
   7713   1.1    pooka  */
   7714   1.1    pooka 
   7715   1.1    pooka static const pci_product_id_t iwm_devices[] = {
   7716   1.5   nonaka 	PCI_PRODUCT_INTEL_WIFI_LINK_7260_1,
   7717   1.5   nonaka 	PCI_PRODUCT_INTEL_WIFI_LINK_7260_2,
   7718   1.5   nonaka 	PCI_PRODUCT_INTEL_WIFI_LINK_3160_1,
   7719   1.5   nonaka 	PCI_PRODUCT_INTEL_WIFI_LINK_3160_2,
   7720   1.5   nonaka 	PCI_PRODUCT_INTEL_WIFI_LINK_7265_1,
   7721   1.5   nonaka 	PCI_PRODUCT_INTEL_WIFI_LINK_7265_2,
   7722  1.45   nonaka 	PCI_PRODUCT_INTEL_WIFI_LINK_3165_1,
   7723  1.45   nonaka 	PCI_PRODUCT_INTEL_WIFI_LINK_3165_2,
   7724  1.45   nonaka 	PCI_PRODUCT_INTEL_WIFI_LINK_8260_1,
   7725  1.45   nonaka 	PCI_PRODUCT_INTEL_WIFI_LINK_8260_2,
   7726  1.58   nonaka 	PCI_PRODUCT_INTEL_WIFI_LINK_4165_1,
   7727  1.58   nonaka 	PCI_PRODUCT_INTEL_WIFI_LINK_4165_2,
   7728   1.1    pooka };
   7729   1.1    pooka 
   7730   1.1    pooka static int
   7731   1.4   nonaka iwm_match(device_t parent, cfdata_t match __unused, void *aux)
   7732   1.1    pooka {
   7733   1.1    pooka 	struct pci_attach_args *pa = aux;
   7734   1.1    pooka 
   7735   1.1    pooka 	if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_INTEL)
   7736   1.1    pooka 		return 0;
   7737   1.1    pooka 
   7738   1.5   nonaka 	for (size_t i = 0; i < __arraycount(iwm_devices); i++)
   7739   1.1    pooka 		if (PCI_PRODUCT(pa->pa_id) == iwm_devices[i])
   7740   1.1    pooka 			return 1;
   7741   1.1    pooka 
   7742   1.1    pooka 	return 0;
   7743   1.1    pooka }
   7744   1.1    pooka 
   7745   1.4   nonaka static int
   7746   1.1    pooka iwm_preinit(struct iwm_softc *sc)
   7747   1.1    pooka {
   7748  1.36   nonaka 	struct ieee80211com *ic = &sc->sc_ic;
   7749  1.45   nonaka 	int err;
   7750   1.1    pooka 
   7751  1.45   nonaka 	if (ISSET(sc->sc_flags, IWM_FLAG_ATTACHED))
   7752   1.2   nonaka 		return 0;
   7753   1.1    pooka 
   7754  1.45   nonaka 	err = iwm_start_hw(sc);
   7755  1.45   nonaka 	if (err) {
   7756   1.3   nonaka 		aprint_error_dev(sc->sc_dev, "could not initialize hardware\n");
   7757  1.45   nonaka 		return err;
   7758   1.1    pooka 	}
   7759   1.1    pooka 
   7760  1.45   nonaka 	err = iwm_run_init_mvm_ucode(sc, 1);
   7761   1.1    pooka 	iwm_stop_device(sc);
   7762  1.45   nonaka 	if (err)
   7763  1.45   nonaka 		return err;
   7764   1.1    pooka 
   7765   1.2   nonaka 	sc->sc_flags |= IWM_FLAG_ATTACHED;
   7766   1.1    pooka 
   7767  1.45   nonaka 	aprint_normal_dev(sc->sc_dev, "hw rev 0x%x, fw ver %s, address %s\n",
   7768  1.45   nonaka 	    sc->sc_hw_rev & IWM_CSR_HW_REV_TYPE_MSK, sc->sc_fwver,
   7769   1.1    pooka 	    ether_sprintf(sc->sc_nvm.hw_addr));
   7770   1.8   nonaka 
   7771  1.45   nonaka #ifndef IEEE80211_NO_HT
   7772  1.45   nonaka 	if (sc->sc_nvm.sku_cap_11n_enable)
   7773  1.45   nonaka 		iwm_setup_ht_rates(sc);
   7774  1.45   nonaka #endif
   7775  1.45   nonaka 
   7776  1.29   nonaka 	/* not all hardware can do 5GHz band */
   7777  1.29   nonaka 	if (sc->sc_nvm.sku_cap_band_52GHz_enable)
   7778  1.29   nonaka 		ic->ic_sup_rates[IEEE80211_MODE_11A] = ieee80211_std_rateset_11a;
   7779   1.1    pooka 
   7780   1.1    pooka 	ieee80211_ifattach(ic);
   7781   1.1    pooka 
   7782   1.1    pooka 	ic->ic_node_alloc = iwm_node_alloc;
   7783   1.1    pooka 
   7784   1.1    pooka 	/* Override 802.11 state transition machine. */
   7785   1.1    pooka 	sc->sc_newstate = ic->ic_newstate;
   7786   1.1    pooka 	ic->ic_newstate = iwm_newstate;
   7787   1.1    pooka 	ieee80211_media_init(ic, iwm_media_change, ieee80211_media_status);
   7788   1.1    pooka 	ieee80211_announce(ic);
   7789   1.1    pooka 
   7790   1.1    pooka 	iwm_radiotap_attach(sc);
   7791   1.1    pooka 
   7792  1.36   nonaka 	return 0;
   7793  1.36   nonaka }
   7794  1.36   nonaka 
   7795  1.36   nonaka static void
   7796  1.36   nonaka iwm_attach_hook(device_t dev)
   7797  1.36   nonaka {
   7798  1.36   nonaka 	struct iwm_softc *sc = device_private(dev);
   7799  1.30   nonaka 
   7800  1.36   nonaka 	iwm_preinit(sc);
   7801   1.1    pooka }
   7802   1.1    pooka 
   7803   1.4   nonaka static void
   7804   1.4   nonaka iwm_attach(device_t parent, device_t self, void *aux)
   7805   1.1    pooka {
   7806   1.1    pooka 	struct iwm_softc *sc = device_private(self);
   7807   1.1    pooka 	struct pci_attach_args *pa = aux;
   7808  1.36   nonaka 	struct ieee80211com *ic = &sc->sc_ic;
   7809  1.36   nonaka 	struct ifnet *ifp = &sc->sc_ec.ec_if;
   7810   1.1    pooka 	pcireg_t reg, memtype;
   7811  1.37   nonaka 	char intrbuf[PCI_INTRSTR_LEN];
   7812   1.1    pooka 	const char *intrstr;
   7813  1.45   nonaka 	int err;
   7814   1.2   nonaka 	int txq_i;
   7815  1.36   nonaka 	const struct sysctlnode *node;
   7816   1.1    pooka 
   7817   1.3   nonaka 	sc->sc_dev = self;
   7818   1.1    pooka 	sc->sc_pct = pa->pa_pc;
   7819   1.1    pooka 	sc->sc_pcitag = pa->pa_tag;
   7820   1.1    pooka 	sc->sc_dmat = pa->pa_dmat;
   7821   1.5   nonaka 	sc->sc_pciid = pa->pa_id;
   7822   1.1    pooka 
   7823   1.1    pooka 	pci_aprint_devinfo(pa, NULL);
   7824   1.1    pooka 
   7825  1.45   nonaka 	if (workqueue_create(&sc->sc_nswq, "iwmns",
   7826  1.45   nonaka 	    iwm_newstate_cb, sc, PRI_NONE, IPL_NET, 0))
   7827  1.45   nonaka 		panic("%s: could not create workqueue: newstate",
   7828  1.45   nonaka 		    device_xname(self));
   7829  1.50   nonaka 	sc->sc_soft_ih = softint_establish(SOFTINT_NET, iwm_softintr, sc);
   7830  1.50   nonaka 	if (sc->sc_soft_ih == NULL)
   7831  1.50   nonaka 		panic("%s: could not establish softint", device_xname(self));
   7832  1.45   nonaka 
   7833   1.1    pooka 	/*
   7834   1.1    pooka 	 * Get the offset of the PCI Express Capability Structure in PCI
   7835   1.1    pooka 	 * Configuration Space.
   7836   1.1    pooka 	 */
   7837  1.45   nonaka 	err = pci_get_capability(sc->sc_pct, sc->sc_pcitag,
   7838   1.1    pooka 	    PCI_CAP_PCIEXPRESS, &sc->sc_cap_off, NULL);
   7839  1.45   nonaka 	if (err == 0) {
   7840   1.3   nonaka 		aprint_error_dev(self,
   7841   1.3   nonaka 		    "PCIe capability structure not found!\n");
   7842   1.1    pooka 		return;
   7843   1.1    pooka 	}
   7844   1.1    pooka 
   7845   1.1    pooka 	/* Clear device-specific "PCI retry timeout" register (41h). */
   7846   1.1    pooka 	reg = pci_conf_read(sc->sc_pct, sc->sc_pcitag, 0x40);
   7847   1.1    pooka 	pci_conf_write(sc->sc_pct, sc->sc_pcitag, 0x40, reg & ~0xff00);
   7848   1.1    pooka 
   7849  1.45   nonaka 	/* Enable bus-mastering */
   7850   1.1    pooka 	reg = pci_conf_read(sc->sc_pct, sc->sc_pcitag, PCI_COMMAND_STATUS_REG);
   7851   1.1    pooka 	reg |= PCI_COMMAND_MASTER_ENABLE;
   7852   1.1    pooka 	pci_conf_write(sc->sc_pct, sc->sc_pcitag, PCI_COMMAND_STATUS_REG, reg);
   7853   1.1    pooka 
   7854   1.1    pooka 	memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, PCI_MAPREG_START);
   7855  1.45   nonaka 	err = pci_mapreg_map(pa, PCI_MAPREG_START, memtype, 0,
   7856   1.1    pooka 	    &sc->sc_st, &sc->sc_sh, NULL, &sc->sc_sz);
   7857  1.45   nonaka 	if (err) {
   7858   1.3   nonaka 		aprint_error_dev(self, "can't map mem space\n");
   7859   1.1    pooka 		return;
   7860   1.1    pooka 	}
   7861   1.1    pooka 
   7862   1.1    pooka 	/* Install interrupt handler. */
   7863  1.45   nonaka 	err = pci_intr_alloc(pa, &sc->sc_pihp, NULL, 0);
   7864  1.45   nonaka 	if (err) {
   7865  1.37   nonaka 		aprint_error_dev(self, "can't allocate interrupt\n");
   7866   1.1    pooka 		return;
   7867   1.1    pooka 	}
   7868  1.61   nonaka 	reg = pci_conf_read(sc->sc_pct, sc->sc_pcitag, PCI_COMMAND_STATUS_REG);
   7869  1.61   nonaka 	if (pci_intr_type(sc->sc_pct, sc->sc_pihp[0]) == PCI_INTR_TYPE_INTX)
   7870  1.61   nonaka 		CLR(reg, PCI_COMMAND_INTERRUPT_DISABLE);
   7871  1.61   nonaka 	else
   7872  1.61   nonaka 		SET(reg, PCI_COMMAND_INTERRUPT_DISABLE);
   7873  1.61   nonaka 	pci_conf_write(sc->sc_pct, sc->sc_pcitag, PCI_COMMAND_STATUS_REG, reg);
   7874  1.31   nonaka 	intrstr = pci_intr_string(sc->sc_pct, sc->sc_pihp[0], intrbuf,
   7875  1.31   nonaka 	    sizeof(intrbuf));
   7876  1.49   nonaka 	sc->sc_ih = pci_intr_establish_xname(sc->sc_pct, sc->sc_pihp[0],
   7877  1.49   nonaka 	    IPL_NET, iwm_intr, sc, device_xname(self));
   7878   1.1    pooka 	if (sc->sc_ih == NULL) {
   7879   1.3   nonaka 		aprint_error_dev(self, "can't establish interrupt");
   7880   1.1    pooka 		if (intrstr != NULL)
   7881   1.3   nonaka 			aprint_error(" at %s", intrstr);
   7882   1.3   nonaka 		aprint_error("\n");
   7883   1.1    pooka 		return;
   7884   1.1    pooka 	}
   7885   1.3   nonaka 	aprint_normal_dev(self, "interrupting at %s\n", intrstr);
   7886   1.1    pooka 
   7887  1.45   nonaka 	sc->sc_wantresp = IWM_CMD_RESP_IDLE;
   7888   1.5   nonaka 
   7889  1.45   nonaka 	sc->sc_hw_rev = IWM_READ(sc, IWM_CSR_HW_REV);
   7890   1.5   nonaka 	switch (PCI_PRODUCT(sc->sc_pciid)) {
   7891  1.45   nonaka 	case PCI_PRODUCT_INTEL_WIFI_LINK_3160_1:
   7892  1.45   nonaka 	case PCI_PRODUCT_INTEL_WIFI_LINK_3160_2:
   7893  1.71   nonaka 		sc->sc_fwname = "iwlwifi-3160-17.ucode";
   7894  1.45   nonaka 		sc->host_interrupt_operation_mode = 1;
   7895  1.59   nonaka 		sc->apmg_wake_up_wa = 1;
   7896  1.45   nonaka 		sc->sc_device_family = IWM_DEVICE_FAMILY_7000;
   7897  1.45   nonaka 		sc->sc_fwdmasegsz = IWM_FWDMASEGSZ;
   7898  1.45   nonaka 		break;
   7899  1.45   nonaka 	case PCI_PRODUCT_INTEL_WIFI_LINK_3165_1:
   7900  1.45   nonaka 	case PCI_PRODUCT_INTEL_WIFI_LINK_3165_2:
   7901  1.71   nonaka 		sc->sc_fwname = "iwlwifi-7265D-22.ucode";
   7902  1.71   nonaka 		sc->host_interrupt_operation_mode = 0;
   7903  1.71   nonaka 		sc->apmg_wake_up_wa = 1;
   7904  1.71   nonaka 		sc->sc_device_family = IWM_DEVICE_FAMILY_7000;
   7905  1.71   nonaka 		sc->sc_fwdmasegsz = IWM_FWDMASEGSZ;
   7906  1.71   nonaka 		break;
   7907  1.71   nonaka 	case PCI_PRODUCT_INTEL_WIFI_LINK_3168:
   7908  1.71   nonaka 		sc->sc_fwname = "iwlwifi-3168-22.ucode";
   7909  1.45   nonaka 		sc->host_interrupt_operation_mode = 0;
   7910  1.59   nonaka 		sc->apmg_wake_up_wa = 1;
   7911  1.45   nonaka 		sc->sc_device_family = IWM_DEVICE_FAMILY_7000;
   7912  1.45   nonaka 		sc->sc_fwdmasegsz = IWM_FWDMASEGSZ;
   7913  1.45   nonaka 		break;
   7914   1.5   nonaka 	case PCI_PRODUCT_INTEL_WIFI_LINK_7260_1:
   7915   1.5   nonaka 	case PCI_PRODUCT_INTEL_WIFI_LINK_7260_2:
   7916  1.71   nonaka 		sc->sc_fwname = "iwlwifi-7260-17.ucode";
   7917  1.17   nonaka 		sc->host_interrupt_operation_mode = 1;
   7918  1.59   nonaka 		sc->apmg_wake_up_wa = 1;
   7919  1.45   nonaka 		sc->sc_device_family = IWM_DEVICE_FAMILY_7000;
   7920  1.45   nonaka 		sc->sc_fwdmasegsz = IWM_FWDMASEGSZ;
   7921   1.5   nonaka 		break;
   7922   1.5   nonaka 	case PCI_PRODUCT_INTEL_WIFI_LINK_7265_1:
   7923   1.5   nonaka 	case PCI_PRODUCT_INTEL_WIFI_LINK_7265_2:
   7924  1.45   nonaka 		sc->sc_fwname = (sc->sc_hw_rev & IWM_CSR_HW_REV_TYPE_MSK) ==
   7925  1.45   nonaka 		    IWM_CSR_HW_REV_TYPE_7265D ?
   7926  1.71   nonaka 		    "iwlwifi-7265D-22.ucode": "iwlwifi-7265-17.ucode";
   7927  1.45   nonaka 		sc->host_interrupt_operation_mode = 0;
   7928  1.59   nonaka 		sc->apmg_wake_up_wa = 1;
   7929  1.45   nonaka 		sc->sc_device_family = IWM_DEVICE_FAMILY_7000;
   7930  1.45   nonaka 		sc->sc_fwdmasegsz = IWM_FWDMASEGSZ;
   7931  1.45   nonaka 		break;
   7932  1.45   nonaka 	case PCI_PRODUCT_INTEL_WIFI_LINK_8260_1:
   7933  1.45   nonaka 	case PCI_PRODUCT_INTEL_WIFI_LINK_8260_2:
   7934  1.58   nonaka 	case PCI_PRODUCT_INTEL_WIFI_LINK_4165_1:
   7935  1.58   nonaka 	case PCI_PRODUCT_INTEL_WIFI_LINK_4165_2:
   7936  1.71   nonaka 		sc->sc_fwname = "iwlwifi-8000C-22.ucode";
   7937  1.71   nonaka 		sc->host_interrupt_operation_mode = 0;
   7938  1.71   nonaka 		sc->apmg_wake_up_wa = 0;
   7939  1.71   nonaka 		sc->sc_device_family = IWM_DEVICE_FAMILY_8000;
   7940  1.71   nonaka 		sc->sc_fwdmasegsz = IWM_FWDMASEGSZ_8000;
   7941  1.71   nonaka 		break;
   7942  1.71   nonaka 	case PCI_PRODUCT_INTEL_WIFI_LINK_8265:
   7943  1.71   nonaka 		sc->sc_fwname = "iwlwifi-8265-22.ucode";
   7944  1.17   nonaka 		sc->host_interrupt_operation_mode = 0;
   7945  1.59   nonaka 		sc->apmg_wake_up_wa = 0;
   7946  1.45   nonaka 		sc->sc_device_family = IWM_DEVICE_FAMILY_8000;
   7947  1.45   nonaka 		sc->sc_fwdmasegsz = IWM_FWDMASEGSZ_8000;
   7948   1.5   nonaka 		break;
   7949   1.5   nonaka 	default:
   7950   1.5   nonaka 		aprint_error_dev(self, "unknown product %#x",
   7951   1.5   nonaka 		    PCI_PRODUCT(sc->sc_pciid));
   7952   1.5   nonaka 		return;
   7953   1.5   nonaka 	}
   7954   1.5   nonaka 	DPRINTF(("%s: firmware=%s\n", DEVNAME(sc), sc->sc_fwname));
   7955   1.2   nonaka 
   7956   1.2   nonaka 	/*
   7957  1.45   nonaka 	 * In the 8000 HW family the format of the 4 bytes of CSR_HW_REV have
   7958  1.45   nonaka 	 * changed, and now the revision step also includes bit 0-1 (no more
   7959  1.45   nonaka 	 * "dash" value). To keep hw_rev backwards compatible - we'll store it
   7960  1.45   nonaka 	 * in the old format.
   7961   1.2   nonaka 	 */
   7962   1.2   nonaka 
   7963  1.45   nonaka 	if (sc->sc_device_family == IWM_DEVICE_FAMILY_8000)
   7964  1.45   nonaka 		sc->sc_hw_rev = (sc->sc_hw_rev & 0xfff0) |
   7965  1.45   nonaka 		    (IWM_CSR_HW_REV_STEP(sc->sc_hw_rev << 2) << 2);
   7966  1.45   nonaka 
   7967   1.2   nonaka 	if (iwm_prepare_card_hw(sc) != 0) {
   7968   1.3   nonaka 		aprint_error_dev(sc->sc_dev, "could not initialize hardware\n");
   7969   1.2   nonaka 		return;
   7970   1.2   nonaka 	}
   7971   1.2   nonaka 
   7972  1.45   nonaka 	if (sc->sc_device_family == IWM_DEVICE_FAMILY_8000) {
   7973  1.45   nonaka 		uint32_t hw_step;
   7974  1.45   nonaka 
   7975  1.45   nonaka 		/*
   7976  1.45   nonaka 		 * In order to recognize C step the driver should read the
   7977  1.45   nonaka 		 * chip version id located at the AUX bus MISC address.
   7978  1.45   nonaka 		 */
   7979  1.45   nonaka 		IWM_SETBITS(sc, IWM_CSR_GP_CNTRL,
   7980  1.45   nonaka 			    IWM_CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
   7981  1.45   nonaka 		DELAY(2);
   7982  1.45   nonaka 
   7983  1.45   nonaka 		err = iwm_poll_bit(sc, IWM_CSR_GP_CNTRL,
   7984  1.45   nonaka 				   IWM_CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
   7985  1.45   nonaka 				   IWM_CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
   7986  1.45   nonaka 				   25000);
   7987  1.45   nonaka 		if (!err) {
   7988  1.45   nonaka 			aprint_error_dev(sc->sc_dev,
   7989  1.45   nonaka 			    "failed to wake up the nic\n");
   7990  1.45   nonaka 			return;
   7991  1.45   nonaka 		}
   7992  1.45   nonaka 
   7993  1.45   nonaka 		if (iwm_nic_lock(sc)) {
   7994  1.45   nonaka 			hw_step = iwm_read_prph(sc, IWM_WFPM_CTRL_REG);
   7995  1.45   nonaka 			hw_step |= IWM_ENABLE_WFPM;
   7996  1.45   nonaka 			iwm_write_prph(sc, IWM_WFPM_CTRL_REG, hw_step);
   7997  1.45   nonaka 			hw_step = iwm_read_prph(sc, IWM_AUX_MISC_REG);
   7998  1.45   nonaka 			hw_step = (hw_step >> IWM_HW_STEP_LOCATION_BITS) & 0xF;
   7999  1.45   nonaka 			if (hw_step == 0x3)
   8000  1.45   nonaka 				sc->sc_hw_rev = (sc->sc_hw_rev & 0xFFFFFFF3) |
   8001  1.45   nonaka 				    (IWM_SILICON_C_STEP << 2);
   8002  1.45   nonaka 			iwm_nic_unlock(sc);
   8003  1.45   nonaka 		} else {
   8004  1.45   nonaka 			aprint_error_dev(sc->sc_dev,
   8005  1.45   nonaka 			    "failed to lock the nic\n");
   8006  1.45   nonaka 			return;
   8007  1.45   nonaka 		}
   8008  1.45   nonaka 	}
   8009  1.45   nonaka 
   8010  1.45   nonaka 	/*
   8011  1.45   nonaka 	 * Allocate DMA memory for firmware transfers.
   8012  1.45   nonaka 	 * Must be aligned on a 16-byte boundary.
   8013  1.45   nonaka 	 */
   8014  1.45   nonaka 	err = iwm_dma_contig_alloc(sc->sc_dmat, &sc->fw_dma, sc->sc_fwdmasegsz,
   8015  1.45   nonaka 	    16);
   8016  1.45   nonaka 	if (err) {
   8017   1.3   nonaka 		aprint_error_dev(sc->sc_dev,
   8018   1.3   nonaka 		    "could not allocate memory for firmware\n");
   8019   1.2   nonaka 		return;
   8020   1.2   nonaka 	}
   8021   1.2   nonaka 
   8022  1.45   nonaka 	/* Allocate "Keep Warm" page, used internally by the card. */
   8023  1.45   nonaka 	err = iwm_dma_contig_alloc(sc->sc_dmat, &sc->kw_dma, 4096, 4096);
   8024  1.45   nonaka 	if (err) {
   8025   1.3   nonaka 		aprint_error_dev(sc->sc_dev,
   8026   1.3   nonaka 		    "could not allocate keep warm page\n");
   8027   1.2   nonaka 		goto fail1;
   8028   1.2   nonaka 	}
   8029   1.2   nonaka 
   8030  1.45   nonaka 	/* Allocate interrupt cause table (ICT).*/
   8031  1.45   nonaka 	err = iwm_dma_contig_alloc(sc->sc_dmat, &sc->ict_dma, IWM_ICT_SIZE,
   8032  1.45   nonaka 	    1 << IWM_ICT_PADDR_SHIFT);
   8033  1.45   nonaka 	if (err) {
   8034   1.3   nonaka 		aprint_error_dev(sc->sc_dev, "could not allocate ICT table\n");
   8035   1.2   nonaka 		goto fail2;
   8036   1.2   nonaka 	}
   8037   1.2   nonaka 
   8038  1.45   nonaka 	/* TX scheduler rings must be aligned on a 1KB boundary. */
   8039  1.45   nonaka 	err = iwm_dma_contig_alloc(sc->sc_dmat, &sc->sched_dma,
   8040  1.45   nonaka 	    __arraycount(sc->txq) * sizeof(struct iwm_agn_scd_bc_tbl), 1024);
   8041  1.45   nonaka 	if (err) {
   8042   1.3   nonaka 		aprint_error_dev(sc->sc_dev,
   8043   1.3   nonaka 		    "could not allocate TX scheduler rings\n");
   8044   1.2   nonaka 		goto fail3;
   8045   1.2   nonaka 	}
   8046   1.2   nonaka 
   8047   1.2   nonaka 	for (txq_i = 0; txq_i < __arraycount(sc->txq); txq_i++) {
   8048  1.45   nonaka 		err = iwm_alloc_tx_ring(sc, &sc->txq[txq_i], txq_i);
   8049  1.45   nonaka 		if (err) {
   8050   1.3   nonaka 			aprint_error_dev(sc->sc_dev,
   8051   1.3   nonaka 			    "could not allocate TX ring %d\n", txq_i);
   8052   1.2   nonaka 			goto fail4;
   8053   1.2   nonaka 		}
   8054   1.2   nonaka 	}
   8055   1.2   nonaka 
   8056  1.45   nonaka 	err = iwm_alloc_rx_ring(sc, &sc->rxq);
   8057  1.45   nonaka 	if (err) {
   8058   1.3   nonaka 		aprint_error_dev(sc->sc_dev, "could not allocate RX ring\n");
   8059   1.2   nonaka 		goto fail4;
   8060   1.2   nonaka 	}
   8061   1.2   nonaka 
   8062   1.2   nonaka 	/* Clear pending interrupts. */
   8063   1.2   nonaka 	IWM_WRITE(sc, IWM_CSR_INT, 0xffffffff);
   8064   1.2   nonaka 
   8065  1.45   nonaka 	if ((err = sysctl_createv(&sc->sc_clog, 0, NULL, &node,
   8066  1.36   nonaka 	    0, CTLTYPE_NODE, device_xname(sc->sc_dev),
   8067  1.36   nonaka 	    SYSCTL_DESCR("iwm per-controller controls"),
   8068  1.36   nonaka 	    NULL, 0, NULL, 0,
   8069  1.36   nonaka 	    CTL_HW, iwm_sysctl_root_num, CTL_CREATE,
   8070  1.36   nonaka 	    CTL_EOL)) != 0) {
   8071  1.36   nonaka 		aprint_normal_dev(sc->sc_dev,
   8072  1.36   nonaka 		    "couldn't create iwm per-controller sysctl node\n");
   8073  1.36   nonaka 	}
   8074  1.45   nonaka 	if (err == 0) {
   8075  1.36   nonaka 		int iwm_nodenum = node->sysctl_num;
   8076  1.36   nonaka 
   8077  1.36   nonaka 		/* Reload firmware sysctl node */
   8078  1.45   nonaka 		if ((err = sysctl_createv(&sc->sc_clog, 0, NULL, &node,
   8079  1.36   nonaka 		    CTLFLAG_READWRITE, CTLTYPE_INT, "fw_loaded",
   8080  1.36   nonaka 		    SYSCTL_DESCR("Reload firmware"),
   8081  1.36   nonaka 		    iwm_sysctl_fw_loaded_handler, 0, (void *)sc, 0,
   8082  1.36   nonaka 		    CTL_HW, iwm_sysctl_root_num, iwm_nodenum, CTL_CREATE,
   8083  1.36   nonaka 		    CTL_EOL)) != 0) {
   8084  1.36   nonaka 			aprint_normal_dev(sc->sc_dev,
   8085  1.36   nonaka 			    "couldn't create load_fw sysctl node\n");
   8086  1.36   nonaka 		}
   8087  1.36   nonaka 	}
   8088  1.36   nonaka 
   8089  1.36   nonaka 	/*
   8090  1.36   nonaka 	 * Attach interface
   8091  1.36   nonaka 	 */
   8092  1.36   nonaka 	ic->ic_ifp = ifp;
   8093  1.36   nonaka 	ic->ic_phytype = IEEE80211_T_OFDM;	/* not only, but not used */
   8094  1.36   nonaka 	ic->ic_opmode = IEEE80211_M_STA;	/* default to BSS mode */
   8095  1.36   nonaka 	ic->ic_state = IEEE80211_S_INIT;
   8096  1.36   nonaka 
   8097  1.36   nonaka 	/* Set device capabilities. */
   8098  1.36   nonaka 	ic->ic_caps =
   8099  1.36   nonaka 	    IEEE80211_C_WEP |		/* WEP */
   8100  1.36   nonaka 	    IEEE80211_C_WPA |		/* 802.11i */
   8101  1.45   nonaka #ifdef notyet
   8102  1.45   nonaka 	    IEEE80211_C_SCANALL |	/* device scans all channels at once */
   8103  1.45   nonaka 	    IEEE80211_C_SCANALLBAND |	/* device scans all bands at once */
   8104  1.45   nonaka #endif
   8105  1.36   nonaka 	    IEEE80211_C_SHSLOT |	/* short slot time supported */
   8106  1.36   nonaka 	    IEEE80211_C_SHPREAMBLE;	/* short preamble supported */
   8107  1.36   nonaka 
   8108  1.45   nonaka #ifndef IEEE80211_NO_HT
   8109  1.45   nonaka 	ic->ic_htcaps = IEEE80211_HTCAP_SGI20;
   8110  1.45   nonaka 	ic->ic_htxcaps = 0;
   8111  1.45   nonaka 	ic->ic_txbfcaps = 0;
   8112  1.45   nonaka 	ic->ic_aselcaps = 0;
   8113  1.45   nonaka 	ic->ic_ampdu_params = (IEEE80211_AMPDU_PARAM_SS_4 | 0x3 /* 64k */);
   8114  1.45   nonaka #endif
   8115  1.45   nonaka 
   8116  1.36   nonaka 	/* all hardware can do 2.4GHz band */
   8117  1.36   nonaka 	ic->ic_sup_rates[IEEE80211_MODE_11B] = ieee80211_std_rateset_11b;
   8118  1.36   nonaka 	ic->ic_sup_rates[IEEE80211_MODE_11G] = ieee80211_std_rateset_11g;
   8119  1.36   nonaka 
   8120  1.36   nonaka 	for (int i = 0; i < __arraycount(sc->sc_phyctxt); i++) {
   8121  1.36   nonaka 		sc->sc_phyctxt[i].id = i;
   8122  1.36   nonaka 	}
   8123  1.36   nonaka 
   8124  1.36   nonaka 	sc->sc_amrr.amrr_min_success_threshold =  1;
   8125  1.36   nonaka 	sc->sc_amrr.amrr_max_success_threshold = 15;
   8126  1.36   nonaka 
   8127  1.36   nonaka 	/* IBSS channel undefined for now. */
   8128  1.36   nonaka 	ic->ic_ibss_chan = &ic->ic_channels[1];
   8129  1.36   nonaka 
   8130  1.36   nonaka #if 0
   8131  1.36   nonaka 	ic->ic_max_rssi = IWM_MAX_DBM - IWM_MIN_DBM;
   8132  1.36   nonaka #endif
   8133  1.36   nonaka 
   8134  1.36   nonaka 	ifp->if_softc = sc;
   8135  1.36   nonaka 	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
   8136  1.36   nonaka 	ifp->if_init = iwm_init;
   8137  1.36   nonaka 	ifp->if_stop = iwm_stop;
   8138  1.36   nonaka 	ifp->if_ioctl = iwm_ioctl;
   8139  1.36   nonaka 	ifp->if_start = iwm_start;
   8140  1.36   nonaka 	ifp->if_watchdog = iwm_watchdog;
   8141  1.36   nonaka 	IFQ_SET_READY(&ifp->if_snd);
   8142  1.36   nonaka 	memcpy(ifp->if_xname, DEVNAME(sc), IFNAMSIZ);
   8143  1.36   nonaka 
   8144  1.36   nonaka 	if_initialize(ifp);
   8145  1.36   nonaka #if 0
   8146  1.36   nonaka 	ieee80211_ifattach(ic);
   8147  1.36   nonaka #else
   8148  1.36   nonaka 	ether_ifattach(ifp, ic->ic_myaddr);	/* XXX */
   8149  1.36   nonaka #endif
   8150  1.40    ozaki 	/* Use common softint-based if_input */
   8151  1.40    ozaki 	ifp->if_percpuq = if_percpuq_create(ifp);
   8152  1.44    ozaki 	if_register(ifp);
   8153  1.36   nonaka 
   8154  1.36   nonaka 	callout_init(&sc->sc_calib_to, 0);
   8155  1.36   nonaka 	callout_setfunc(&sc->sc_calib_to, iwm_calib_timeout, sc);
   8156  1.45   nonaka 	callout_init(&sc->sc_led_blink_to, 0);
   8157  1.45   nonaka 	callout_setfunc(&sc->sc_led_blink_to, iwm_led_blink_timeout, sc);
   8158  1.45   nonaka #ifndef IEEE80211_NO_HT
   8159  1.45   nonaka 	if (workqueue_create(&sc->sc_setratewq, "iwmsr",
   8160  1.45   nonaka 	    iwm_setrates_task, sc, PRI_NONE, IPL_NET, 0))
   8161  1.45   nonaka 		panic("%s: could not create workqueue: setrates",
   8162  1.45   nonaka 		    device_xname(self));
   8163  1.45   nonaka 	if (workqueue_create(&sc->sc_bawq, "iwmba",
   8164  1.45   nonaka 	    iwm_ba_task, sc, PRI_NONE, IPL_NET, 0))
   8165  1.45   nonaka 		panic("%s: could not create workqueue: blockack",
   8166  1.45   nonaka 		    device_xname(self));
   8167  1.45   nonaka 	if (workqueue_create(&sc->sc_htprowq, "iwmhtpro",
   8168  1.45   nonaka 	    iwm_htprot_task, sc, PRI_NONE, IPL_NET, 0))
   8169  1.45   nonaka 		panic("%s: could not create workqueue: htprot",
   8170  1.45   nonaka 		    device_xname(self));
   8171  1.45   nonaka #endif
   8172  1.36   nonaka 
   8173  1.36   nonaka 	if (pmf_device_register(self, NULL, NULL))
   8174  1.36   nonaka 		pmf_class_network_register(self, ifp);
   8175  1.36   nonaka 	else
   8176  1.36   nonaka 		aprint_error_dev(self, "couldn't establish power handler\n");
   8177  1.36   nonaka 
   8178   1.1    pooka 	/*
   8179   1.1    pooka 	 * We can't do normal attach before the file system is mounted
   8180   1.1    pooka 	 * because we cannot read the MAC address without loading the
   8181   1.1    pooka 	 * firmware from disk.  So we postpone until mountroot is done.
   8182   1.1    pooka 	 * Notably, this will require a full driver unload/load cycle
   8183   1.1    pooka 	 * (or reboot) in case the firmware is not present when the
   8184   1.1    pooka 	 * hook runs.
   8185   1.1    pooka 	 */
   8186   1.1    pooka 	config_mountroot(self, iwm_attach_hook);
   8187   1.2   nonaka 
   8188   1.2   nonaka 	return;
   8189   1.2   nonaka 
   8190   1.2   nonaka fail4:	while (--txq_i >= 0)
   8191   1.2   nonaka 		iwm_free_tx_ring(sc, &sc->txq[txq_i]);
   8192  1.45   nonaka 	iwm_free_rx_ring(sc, &sc->rxq);
   8193  1.45   nonaka 	iwm_dma_contig_free(&sc->sched_dma);
   8194   1.2   nonaka fail3:	if (sc->ict_dma.vaddr != NULL)
   8195  1.45   nonaka 		iwm_dma_contig_free(&sc->ict_dma);
   8196  1.45   nonaka fail2:	iwm_dma_contig_free(&sc->kw_dma);
   8197  1.45   nonaka fail1:	iwm_dma_contig_free(&sc->fw_dma);
   8198   1.1    pooka }
   8199   1.1    pooka 
   8200   1.1    pooka void
   8201   1.1    pooka iwm_radiotap_attach(struct iwm_softc *sc)
   8202   1.1    pooka {
   8203  1.47   nonaka 	struct ifnet *ifp = IC2IFP(&sc->sc_ic);
   8204   1.1    pooka 
   8205   1.1    pooka 	bpf_attach2(ifp, DLT_IEEE802_11_RADIO,
   8206   1.1    pooka 	    sizeof (struct ieee80211_frame) + IEEE80211_RADIOTAP_HDRLEN,
   8207   1.1    pooka 	    &sc->sc_drvbpf);
   8208   1.1    pooka 
   8209   1.1    pooka 	sc->sc_rxtap_len = sizeof sc->sc_rxtapu;
   8210   1.1    pooka 	sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len);
   8211   1.1    pooka 	sc->sc_rxtap.wr_ihdr.it_present = htole32(IWM_RX_RADIOTAP_PRESENT);
   8212   1.1    pooka 
   8213   1.1    pooka 	sc->sc_txtap_len = sizeof sc->sc_txtapu;
   8214   1.1    pooka 	sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len);
   8215   1.1    pooka 	sc->sc_txtap.wt_ihdr.it_present = htole32(IWM_TX_RADIOTAP_PRESENT);
   8216   1.1    pooka }
   8217   1.1    pooka 
   8218   1.1    pooka #if 0
   8219   1.4   nonaka static void
   8220  1.47   nonaka iwm_init_task(void *arg)
   8221   1.1    pooka {
   8222  1.47   nonaka 	struct iwm_softc *sc = arg;
   8223  1.47   nonaka 	struct ifnet *ifp = IC2IFP(&sc->sc_ic);
   8224   1.1    pooka 	int s;
   8225   1.8   nonaka 
   8226  1.45   nonaka 	rw_enter_write(&sc->ioctl_rwl);
   8227   1.1    pooka 	s = splnet();
   8228   1.8   nonaka 
   8229   1.1    pooka 	iwm_stop(ifp, 0);
   8230   1.1    pooka 	if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == IFF_UP)
   8231   1.1    pooka 		iwm_init(ifp);
   8232   1.1    pooka 
   8233   1.1    pooka 	splx(s);
   8234  1.45   nonaka 	rw_exit(&sc->ioctl_rwl);
   8235   1.1    pooka }
   8236   1.1    pooka 
   8237   1.4   nonaka static void
   8238   1.1    pooka iwm_wakeup(struct iwm_softc *sc)
   8239   1.1    pooka {
   8240   1.1    pooka 	pcireg_t reg;
   8241   1.1    pooka 
   8242   1.1    pooka 	/* Clear device-specific "PCI retry timeout" register (41h). */
   8243   1.1    pooka 	reg = pci_conf_read(sc->sc_pct, sc->sc_pcitag, 0x40);
   8244   1.1    pooka 	pci_conf_write(sc->sc_pct, sc->sc_pcitag, 0x40, reg & ~0xff00);
   8245   1.1    pooka 
   8246   1.1    pooka 	iwm_init_task(sc);
   8247   1.1    pooka }
   8248   1.1    pooka 
   8249   1.4   nonaka static int
   8250   1.4   nonaka iwm_activate(device_t self, enum devact act)
   8251   1.1    pooka {
   8252   1.4   nonaka 	struct iwm_softc *sc = device_private(self);
   8253   1.4   nonaka 	struct ifnet *ifp = IC2IFP(&sc->sc_ic);
   8254   1.1    pooka 
   8255   1.1    pooka 	switch (act) {
   8256   1.4   nonaka 	case DVACT_DEACTIVATE:
   8257   1.1    pooka 		if (ifp->if_flags & IFF_RUNNING)
   8258   1.1    pooka 			iwm_stop(ifp, 0);
   8259   1.4   nonaka 		return 0;
   8260   1.4   nonaka 	default:
   8261   1.4   nonaka 		return EOPNOTSUPP;
   8262   1.1    pooka 	}
   8263   1.1    pooka }
   8264   1.1    pooka #endif
   8265   1.1    pooka 
   8266   1.1    pooka CFATTACH_DECL_NEW(iwm, sizeof(struct iwm_softc), iwm_match, iwm_attach,
   8267   1.1    pooka 	NULL, NULL);
   8268  1.32   nonaka 
   8269  1.36   nonaka static int
   8270  1.36   nonaka iwm_sysctl_fw_loaded_handler(SYSCTLFN_ARGS)
   8271  1.36   nonaka {
   8272  1.36   nonaka 	struct sysctlnode node;
   8273  1.36   nonaka 	struct iwm_softc *sc;
   8274  1.45   nonaka 	int err, t;
   8275  1.36   nonaka 
   8276  1.36   nonaka 	node = *rnode;
   8277  1.36   nonaka 	sc = node.sysctl_data;
   8278  1.36   nonaka 	t = ISSET(sc->sc_flags, IWM_FLAG_FW_LOADED) ? 1 : 0;
   8279  1.36   nonaka 	node.sysctl_data = &t;
   8280  1.45   nonaka 	err = sysctl_lookup(SYSCTLFN_CALL(&node));
   8281  1.45   nonaka 	if (err || newp == NULL)
   8282  1.45   nonaka 		return err;
   8283  1.36   nonaka 
   8284  1.36   nonaka 	if (t == 0)
   8285  1.36   nonaka 		CLR(sc->sc_flags, IWM_FLAG_FW_LOADED);
   8286  1.36   nonaka 	return 0;
   8287  1.36   nonaka }
   8288  1.36   nonaka 
   8289  1.32   nonaka SYSCTL_SETUP(sysctl_iwm, "sysctl iwm(4) subtree setup")
   8290  1.32   nonaka {
   8291  1.36   nonaka 	const struct sysctlnode *rnode;
   8292  1.36   nonaka #ifdef IWM_DEBUG
   8293  1.36   nonaka 	const struct sysctlnode *cnode;
   8294  1.36   nonaka #endif /* IWM_DEBUG */
   8295  1.32   nonaka 	int rc;
   8296  1.32   nonaka 
   8297  1.32   nonaka 	if ((rc = sysctl_createv(clog, 0, NULL, &rnode,
   8298  1.32   nonaka 	    CTLFLAG_PERMANENT, CTLTYPE_NODE, "iwm",
   8299  1.32   nonaka 	    SYSCTL_DESCR("iwm global controls"),
   8300  1.32   nonaka 	    NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL)) != 0)
   8301  1.32   nonaka 		goto err;
   8302  1.32   nonaka 
   8303  1.36   nonaka 	iwm_sysctl_root_num = rnode->sysctl_num;
   8304  1.36   nonaka 
   8305  1.36   nonaka #ifdef IWM_DEBUG
   8306  1.32   nonaka 	/* control debugging printfs */
   8307  1.32   nonaka 	if ((rc = sysctl_createv(clog, 0, &rnode, &cnode,
   8308  1.32   nonaka 	    CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT,
   8309  1.32   nonaka 	    "debug", SYSCTL_DESCR("Enable debugging output"),
   8310  1.32   nonaka 	    NULL, 0, &iwm_debug, 0, CTL_CREATE, CTL_EOL)) != 0)
   8311  1.32   nonaka 		goto err;
   8312  1.36   nonaka #endif /* IWM_DEBUG */
   8313  1.32   nonaka 
   8314  1.32   nonaka 	return;
   8315  1.32   nonaka 
   8316  1.32   nonaka  err:
   8317  1.32   nonaka 	aprint_error("%s: sysctl_createv failed (rc = %d)\n", __func__, rc);
   8318  1.32   nonaka }
   8319