if_iwn.c revision 1.16 1 1.16 christos /* $NetBSD: if_iwn.c,v 1.16 2008/07/29 12:01:41 christos Exp $ */
2 1.1 ober
3 1.1 ober /*-
4 1.1 ober * Copyright (c) 2007
5 1.1 ober * Damien Bergamini <damien.bergamini (at) free.fr>
6 1.1 ober *
7 1.1 ober * Permission to use, copy, modify, and distribute this software for any
8 1.1 ober * purpose with or without fee is hereby granted, provided that the above
9 1.1 ober * copyright notice and this permission notice appear in all copies.
10 1.1 ober *
11 1.1 ober * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 1.1 ober * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 1.1 ober * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 1.1 ober * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 1.1 ober * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 1.1 ober * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 1.1 ober * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18 1.1 ober */
19 1.1 ober
20 1.1 ober #include <sys/cdefs.h>
21 1.16 christos __KERNEL_RCSID(0, "$NetBSD: if_iwn.c,v 1.16 2008/07/29 12:01:41 christos Exp $");
22 1.1 ober
23 1.1 ober
24 1.1 ober /*
25 1.1 ober * Driver for Intel Wireless WiFi Link 4965AGN 802.11 network adapters.
26 1.1 ober */
27 1.1 ober
28 1.1 ober #include "bpfilter.h"
29 1.1 ober
30 1.1 ober #include <sys/param.h>
31 1.1 ober #include <sys/sockio.h>
32 1.1 ober #include <sys/sysctl.h>
33 1.1 ober #include <sys/mbuf.h>
34 1.1 ober #include <sys/kernel.h>
35 1.1 ober #include <sys/socket.h>
36 1.1 ober #include <sys/systm.h>
37 1.1 ober #include <sys/malloc.h>
38 1.1 ober #include <sys/conf.h>
39 1.1 ober #include <sys/kauth.h>
40 1.1 ober #include <sys/callout.h>
41 1.1 ober
42 1.1 ober #include <machine/bus.h>
43 1.1 ober #include <machine/endian.h>
44 1.1 ober #include <machine/intr.h>
45 1.1 ober
46 1.1 ober #include <dev/pci/pcireg.h>
47 1.1 ober #include <dev/pci/pcivar.h>
48 1.1 ober #include <dev/pci/pcidevs.h>
49 1.1 ober
50 1.1 ober #if NBPFILTER > 0
51 1.1 ober #include <net/bpf.h>
52 1.1 ober #endif
53 1.1 ober #include <net/if.h>
54 1.1 ober #include <net/if_arp.h>
55 1.1 ober #include <net/if_dl.h>
56 1.1 ober #include <net/if_media.h>
57 1.1 ober #include <net/if_types.h>
58 1.1 ober
59 1.1 ober #include <netinet/in.h>
60 1.1 ober #include <netinet/in_systm.h>
61 1.1 ober #include <netinet/in_var.h>
62 1.1 ober #include <net/if_ether.h>
63 1.1 ober #include <netinet/ip.h>
64 1.1 ober
65 1.1 ober #include <net80211/ieee80211_var.h>
66 1.1 ober #include <net80211/ieee80211_amrr.h>
67 1.1 ober #include <net80211/ieee80211_radiotap.h>
68 1.1 ober
69 1.1 ober #include <dev/firmload.h>
70 1.1 ober
71 1.1 ober #include <dev/pci/if_iwnreg.h>
72 1.1 ober #include <dev/pci/if_iwnvar.h>
73 1.1 ober
74 1.8 blymn #if 0
75 1.1 ober static const struct pci_matchid iwn_devices[] = {
76 1.1 ober { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_WL_4965AGN_1 },
77 1.1 ober { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_WL_4965AGN_2 }
78 1.1 ober };
79 1.1 ober #endif
80 1.1 ober
81 1.1 ober /*
82 1.1 ober * Supported rates for 802.11a/b/g modes (in 500Kbps unit).
83 1.1 ober */
84 1.1 ober static const struct ieee80211_rateset iwn_rateset_11a =
85 1.1 ober { 8, { 12, 18, 24, 36, 48, 72, 96, 108 } };
86 1.1 ober
87 1.1 ober static const struct ieee80211_rateset iwn_rateset_11b =
88 1.1 ober { 4, { 2, 4, 11, 22 } };
89 1.1 ober
90 1.1 ober static const struct ieee80211_rateset iwn_rateset_11g =
91 1.1 ober { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } };
92 1.1 ober
93 1.1 ober
94 1.15 christos #define EDCA_NUM_AC 4
95 1.1 ober static int iwn_match(device_t , struct cfdata *, void *);
96 1.1 ober static void iwn_attach(device_t , device_t, void *);
97 1.1 ober static int iwn_detach(device_t, int);
98 1.1 ober
99 1.1 ober static void iwn_radiotap_attach(struct iwn_softc *);
100 1.1 ober static int iwn_dma_contig_alloc(bus_dma_tag_t, struct iwn_dma_info *,
101 1.2 ober void **, bus_size_t, bus_size_t, int);
102 1.1 ober static void iwn_dma_contig_free(struct iwn_dma_info *);
103 1.1 ober static int iwn_alloc_shared(struct iwn_softc *);
104 1.1 ober static void iwn_free_shared(struct iwn_softc *);
105 1.1 ober static int iwn_alloc_kw(struct iwn_softc *);
106 1.1 ober static void iwn_free_kw(struct iwn_softc *);
107 1.1 ober static int iwn_alloc_fwmem(struct iwn_softc *);
108 1.1 ober static void iwn_free_fwmem(struct iwn_softc *);
109 1.1 ober static struct iwn_rbuf *iwn_alloc_rbuf(struct iwn_softc *);
110 1.1 ober static void iwn_free_rbuf(struct mbuf *, void *, size_t, void *);
111 1.1 ober static int iwn_alloc_rpool(struct iwn_softc *);
112 1.1 ober static void iwn_free_rpool(struct iwn_softc *);
113 1.1 ober static int iwn_alloc_rx_ring(struct iwn_softc *, struct iwn_rx_ring *);
114 1.1 ober static void iwn_reset_rx_ring(struct iwn_softc *, struct iwn_rx_ring *);
115 1.1 ober static void iwn_free_rx_ring(struct iwn_softc *, struct iwn_rx_ring *);
116 1.1 ober static int iwn_alloc_tx_ring(struct iwn_softc *, struct iwn_tx_ring *,
117 1.2 ober int, int);
118 1.1 ober static void iwn_reset_tx_ring(struct iwn_softc *, struct iwn_tx_ring *);
119 1.1 ober static void iwn_free_tx_ring(struct iwn_softc *, struct iwn_tx_ring *);
120 1.1 ober static struct ieee80211_node *iwn_node_alloc(struct ieee80211_node_table *);
121 1.1 ober static void iwn_newassoc(struct ieee80211_node *, int);
122 1.1 ober static int iwn_media_change(struct ifnet *);
123 1.1 ober static int iwn_newstate(struct ieee80211com *, enum ieee80211_state, int);
124 1.1 ober static void iwn_mem_lock(struct iwn_softc *);
125 1.1 ober static void iwn_mem_unlock(struct iwn_softc *);
126 1.15 christos static uint32_t iwn_mem_read(struct iwn_softc *, uint32_t);
127 1.1 ober static void iwn_mem_write(struct iwn_softc *, uint32_t, uint32_t);
128 1.1 ober static void iwn_mem_write_region_4(struct iwn_softc *, uint32_t,
129 1.2 ober const uint32_t *, int);
130 1.1 ober static int iwn_eeprom_lock(struct iwn_softc *);
131 1.1 ober static void iwn_eeprom_unlock(struct iwn_softc *);
132 1.1 ober static int iwn_read_prom_data(struct iwn_softc *, uint32_t, void *, int);
133 1.1 ober static int iwn_load_microcode(struct iwn_softc *, const uint8_t *, int);
134 1.1 ober static int iwn_load_firmware(struct iwn_softc *);
135 1.1 ober static void iwn_calib_timeout(void *);
136 1.1 ober static void iwn_iter_func(void *, struct ieee80211_node *);
137 1.1 ober static void iwn_ampdu_rx_start(struct iwn_softc *, struct iwn_rx_desc *);
138 1.1 ober static void iwn_rx_intr(struct iwn_softc *, struct iwn_rx_desc *,
139 1.2 ober struct iwn_rx_data *);
140 1.1 ober static void iwn_rx_statistics(struct iwn_softc *, struct iwn_rx_desc *);
141 1.1 ober static void iwn_tx_intr(struct iwn_softc *, struct iwn_rx_desc *);
142 1.1 ober static void iwn_cmd_intr(struct iwn_softc *, struct iwn_rx_desc *);
143 1.1 ober static void iwn_notif_intr(struct iwn_softc *);
144 1.1 ober static int iwn_intr(void *);
145 1.1 ober static void iwn_read_eeprom(struct iwn_softc *);
146 1.1 ober static void iwn_read_eeprom_channels(struct iwn_softc *, int);
147 1.1 ober static uint8_t iwn_plcp_signal(int);
148 1.1 ober static int iwn_tx_data(struct iwn_softc *, struct mbuf *,
149 1.2 ober struct ieee80211_node *, int);
150 1.1 ober static void iwn_start(struct ifnet *);
151 1.1 ober static void iwn_watchdog(struct ifnet *);
152 1.1 ober static int iwn_ioctl(struct ifnet *, u_long, void *);
153 1.1 ober static int iwn_cmd(struct iwn_softc *, int, const void *, int, int);
154 1.15 christos static int iwn_wme_update(struct ieee80211com *);
155 1.1 ober static int iwn_setup_node_mrr(struct iwn_softc *, uint8_t, int);
156 1.1 ober static void iwn_set_led(struct iwn_softc *, uint8_t, uint8_t, uint8_t);
157 1.1 ober static int iwn_set_critical_temp(struct iwn_softc *);
158 1.1 ober static void iwn_enable_tsf(struct iwn_softc *, struct ieee80211_node *);
159 1.1 ober static void iwn_power_calibration(struct iwn_softc *, int);
160 1.1 ober static int iwn_set_txpower(struct iwn_softc *,
161 1.2 ober struct ieee80211_channel *, int);
162 1.1 ober static int iwn_get_rssi(const struct iwn_rx_stat *);
163 1.1 ober static int iwn_get_noise(const struct iwn_rx_general_stats *);
164 1.1 ober static int iwn_get_temperature(struct iwn_softc *);
165 1.1 ober static int iwn_init_sensitivity(struct iwn_softc *);
166 1.1 ober static void iwn_compute_differential_gain(struct iwn_softc *,
167 1.2 ober const struct iwn_rx_general_stats *);
168 1.1 ober static void iwn_tune_sensitivity(struct iwn_softc *,
169 1.2 ober const struct iwn_rx_stats *);
170 1.1 ober static int iwn_send_sensitivity(struct iwn_softc *);
171 1.15 christos /*static int iwn_setup_beacon(struct iwn_softc *, struct ieee80211_node *);*/
172 1.1 ober static int iwn_auth(struct iwn_softc *);
173 1.1 ober static int iwn_run(struct iwn_softc *);
174 1.1 ober static int iwn_scan(struct iwn_softc *, uint16_t);
175 1.1 ober static int iwn_config(struct iwn_softc *);
176 1.1 ober static void iwn_post_alive(struct iwn_softc *);
177 1.1 ober static void iwn_stop_master(struct iwn_softc *);
178 1.1 ober static int iwn_reset(struct iwn_softc *);
179 1.1 ober static void iwn_hw_config(struct iwn_softc *);
180 1.1 ober static int iwn_init(struct ifnet *);
181 1.1 ober static void iwn_stop(struct ifnet *, int);
182 1.1 ober static void iwn_fix_channel(struct ieee80211com *, struct mbuf *);
183 1.7 taca static bool iwn_resume(device_t PMF_FN_PROTO);
184 1.11 blymn static int iwn_add_node(struct iwn_softc *sc,
185 1.11 blymn struct ieee80211_node *ni, bool broadcast, bool async);
186 1.1 ober
187 1.1 ober
188 1.1 ober
189 1.1 ober #define IWN_DEBUG
190 1.1 ober
191 1.1 ober #ifdef IWN_DEBUG
192 1.1 ober #define DPRINTF(x) do { if (iwn_debug > 0) printf x; } while (0)
193 1.1 ober #define DPRINTFN(n, x) do { if (iwn_debug >= (n)) printf x; } while (0)
194 1.11 blymn int iwn_debug = 0;
195 1.1 ober #else
196 1.1 ober #define DPRINTF(x)
197 1.1 ober #define DPRINTFN(n, x)
198 1.1 ober #endif
199 1.1 ober
200 1.11 blymn #ifdef IWN_DEBUG
201 1.11 blymn static void iwn_print_power_group(struct iwn_softc *, int);
202 1.11 blymn #endif
203 1.11 blymn
204 1.8 blymn CFATTACH_DECL_NEW(iwn, sizeof(struct iwn_softc), iwn_match, iwn_attach,
205 1.2 ober iwn_detach, NULL);
206 1.1 ober
207 1.1 ober static int
208 1.1 ober iwn_match(device_t parent, struct cfdata *match __unused, void *aux)
209 1.1 ober {
210 1.2 ober struct pci_attach_args *pa = aux;
211 1.8 blymn
212 1.2 ober if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_INTEL)
213 1.2 ober return 0;
214 1.1 ober
215 1.8 blymn if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_INTEL_PRO_WL_4965AGN_1 ||
216 1.2 ober PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_INTEL_PRO_WL_4965AGN_2)
217 1.2 ober return 1;
218 1.1 ober
219 1.2 ober return 0;
220 1.1 ober }
221 1.1 ober
222 1.1 ober /* Base Address Register */
223 1.1 ober #define IWN_PCI_BAR0 0x10
224 1.1 ober
225 1.1 ober static void
226 1.1 ober iwn_attach(device_t parent __unused, device_t self, void *aux)
227 1.1 ober {
228 1.1 ober struct iwn_softc *sc = device_private(self);
229 1.1 ober struct ieee80211com *ic = &sc->sc_ic;
230 1.1 ober struct ifnet *ifp = &sc->sc_ec.ec_if;
231 1.1 ober struct pci_attach_args *pa = aux;
232 1.1 ober const char *intrstr;
233 1.1 ober char devinfo[256];
234 1.1 ober pci_intr_handle_t ih;
235 1.1 ober pcireg_t memtype, data;
236 1.8 blymn int i, error, revision;
237 1.1 ober
238 1.1 ober sc->sc_dev = self;
239 1.2 ober sc->sc_pct = pa->pa_pc;
240 1.1 ober sc->sc_pcitag = pa->pa_tag;
241 1.1 ober
242 1.1 ober callout_init(&sc->calib_to, 0);
243 1.1 ober callout_setfunc(&sc->calib_to, iwn_calib_timeout, sc);
244 1.8 blymn
245 1.1 ober pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof devinfo);
246 1.1 ober revision = PCI_REVISION(pa->pa_class);
247 1.1 ober aprint_normal(": %s (rev. 0x%2x)\n", devinfo, revision);
248 1.8 blymn
249 1.1 ober
250 1.1 ober /* clear device specific PCI configuration register 0x41 */
251 1.1 ober data = pci_conf_read(sc->sc_pct, sc->sc_pcitag, 0x40);
252 1.1 ober data &= ~0x0000ff00;
253 1.1 ober pci_conf_write(sc->sc_pct, sc->sc_pcitag, 0x40, data);
254 1.1 ober
255 1.1 ober data = pci_conf_read(sc->sc_pct, sc->sc_pcitag, PCI_COMMAND_STATUS_REG);
256 1.1 ober data |= PCI_COMMAND_MASTER_ENABLE;
257 1.1 ober pci_conf_write(sc->sc_pct, sc->sc_pcitag, PCI_COMMAND_STATUS_REG, data);
258 1.1 ober
259 1.1 ober /* enable bus-mastering */
260 1.1 ober data = pci_conf_read(sc->sc_pct, sc->sc_pcitag, PCI_COMMAND_STATUS_REG);
261 1.1 ober data |= PCI_COMMAND_MASTER_ENABLE;
262 1.1 ober pci_conf_write(sc->sc_pct, sc->sc_pcitag, PCI_COMMAND_STATUS_REG, data);
263 1.1 ober
264 1.1 ober /* map the register window */
265 1.1 ober memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, IWN_PCI_BAR0);
266 1.1 ober error = pci_mapreg_map(pa, IWN_PCI_BAR0, memtype, 0, &sc->sc_st,
267 1.1 ober &sc->sc_sh, NULL, &sc->sc_sz);
268 1.1 ober if (error != 0) {
269 1.1 ober aprint_error_dev(self, "could not map memory space\n");
270 1.1 ober return;
271 1.1 ober }
272 1.1 ober
273 1.1 ober sc->sc_dmat = pa->pa_dmat;
274 1.1 ober
275 1.1 ober if (pci_intr_map(pa, &ih) != 0) {
276 1.1 ober aprint_error_dev(self, "could not map interrupt\n");
277 1.1 ober return;
278 1.1 ober }
279 1.1 ober
280 1.1 ober intrstr = pci_intr_string(sc->sc_pct, ih);
281 1.1 ober sc->sc_ih = pci_intr_establish(sc->sc_pct, ih, IPL_NET, iwn_intr, sc);
282 1.3 skrll
283 1.1 ober if (sc->sc_ih == NULL) {
284 1.8 blymn aprint_error_dev(self, "could not establish interrupt");
285 1.1 ober if (intrstr != NULL)
286 1.1 ober aprint_error(" at %s", intrstr);
287 1.1 ober aprint_error("\n");
288 1.1 ober return;
289 1.1 ober }
290 1.1 ober aprint_normal_dev(self, "interrupting at %s\n", intrstr);
291 1.1 ober
292 1.1 ober if (iwn_reset(sc) != 0) {
293 1.2 ober aprint_error_dev(self, "could not reset adapter\n");
294 1.2 ober return;
295 1.1 ober }
296 1.8 blymn
297 1.1 ober /*
298 1.1 ober * Allocate DMA memory for firmware transfers.
299 1.1 ober */
300 1.1 ober if ((error = iwn_alloc_fwmem(sc)) != 0) {
301 1.1 ober aprint_error_dev(self, "could not allocate firmware memory\n");
302 1.1 ober return;
303 1.1 ober }
304 1.1 ober
305 1.1 ober /*
306 1.1 ober * Allocate a "keep warm" page.
307 1.1 ober */
308 1.1 ober if ((error = iwn_alloc_kw(sc)) != 0) {
309 1.1 ober aprint_error_dev(self, "could not allocate keep warm page\n");
310 1.1 ober goto fail1;
311 1.1 ober }
312 1.1 ober
313 1.1 ober /*
314 1.1 ober * Allocate shared area (communication area).
315 1.1 ober */
316 1.1 ober if ((error = iwn_alloc_shared(sc)) != 0) {
317 1.1 ober aprint_error_dev(self, "could not allocate shared area\n");
318 1.1 ober goto fail2;
319 1.1 ober }
320 1.1 ober
321 1.1 ober /*
322 1.1 ober * Allocate Rx buffers and Tx/Rx rings.
323 1.1 ober */
324 1.1 ober if ((error = iwn_alloc_rpool(sc)) != 0) {
325 1.1 ober aprint_error_dev(self, "could not allocate Rx buffers\n");
326 1.1 ober goto fail3;
327 1.1 ober }
328 1.1 ober
329 1.1 ober for (i = 0; i < IWN_NTXQUEUES; i++) {
330 1.1 ober struct iwn_tx_ring *txq = &sc->txq[i];
331 1.1 ober error = iwn_alloc_tx_ring(sc, txq, IWN_TX_RING_COUNT, i);
332 1.1 ober if (error != 0) {
333 1.1 ober aprint_error_dev(self, "could not allocate Tx ring %d\n", i);
334 1.1 ober goto fail4;
335 1.1 ober }
336 1.1 ober }
337 1.8 blymn
338 1.1 ober if (iwn_alloc_rx_ring(sc, &sc->rxq) != 0) {
339 1.2 ober aprint_error_dev(self, "could not allocate Rx ring\n");
340 1.2 ober goto fail4;
341 1.1 ober }
342 1.1 ober
343 1.1 ober
344 1.1 ober ic->ic_ifp = ifp;
345 1.1 ober ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
346 1.1 ober ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */
347 1.1 ober ic->ic_state = IEEE80211_S_INIT;
348 1.1 ober
349 1.1 ober /* set device capabilities */
350 1.1 ober ic->ic_caps =
351 1.1 ober IEEE80211_C_IBSS | /* IBSS mode support */
352 1.15 christos IEEE80211_C_WPA | /* 802.11i */
353 1.1 ober IEEE80211_C_MONITOR | /* monitor mode supported */
354 1.1 ober IEEE80211_C_TXPMGT | /* tx power management */
355 1.1 ober IEEE80211_C_SHSLOT | /* short slot time supported */
356 1.1 ober IEEE80211_C_SHPREAMBLE| /* short preamble supported */
357 1.15 christos IEEE80211_C_WME; /* 802.11e */
358 1.8 blymn
359 1.1 ober /* read supported channels and MAC address from EEPROM */
360 1.1 ober iwn_read_eeprom(sc);
361 1.1 ober
362 1.1 ober /* set supported .11a, .11b and .11g rates */
363 1.1 ober ic->ic_sup_rates[IEEE80211_MODE_11A] = iwn_rateset_11a;
364 1.1 ober ic->ic_sup_rates[IEEE80211_MODE_11B] = iwn_rateset_11b;
365 1.1 ober ic->ic_sup_rates[IEEE80211_MODE_11G] = iwn_rateset_11g;
366 1.1 ober
367 1.1 ober /* IBSS channel undefined for now */
368 1.1 ober ic->ic_ibss_chan = &ic->ic_channels[0];
369 1.1 ober
370 1.1 ober ifp->if_softc = sc;
371 1.1 ober ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
372 1.1 ober ifp->if_init = iwn_init;
373 1.1 ober ifp->if_stop = iwn_stop;
374 1.1 ober ifp->if_ioctl = iwn_ioctl;
375 1.1 ober ifp->if_start = iwn_start;
376 1.1 ober ifp->if_watchdog = iwn_watchdog;
377 1.1 ober IFQ_SET_READY(&ifp->if_snd);
378 1.1 ober memcpy(ifp->if_xname, device_xname(self), IFNAMSIZ);
379 1.1 ober
380 1.1 ober if_attach(ifp);
381 1.1 ober ieee80211_ifattach(ic);
382 1.1 ober ic->ic_node_alloc = iwn_node_alloc;
383 1.1 ober ic->ic_newassoc = iwn_newassoc;
384 1.1 ober ic->ic_wme.wme_update = iwn_wme_update;
385 1.1 ober
386 1.1 ober /* override state transition machine */
387 1.1 ober sc->sc_newstate = ic->ic_newstate;
388 1.1 ober ic->ic_newstate = iwn_newstate;
389 1.1 ober ieee80211_media_init(ic, iwn_media_change, ieee80211_media_status);
390 1.1 ober
391 1.1 ober sc->amrr.amrr_min_success_threshold = 1;
392 1.1 ober sc->amrr.amrr_max_success_threshold = 15;
393 1.1 ober
394 1.1 ober if (!pmf_device_register(self, NULL, iwn_resume))
395 1.1 ober aprint_error_dev(self, "couldn't establish power handler\n");
396 1.1 ober else
397 1.1 ober pmf_class_network_register(self, ifp);
398 1.1 ober
399 1.1 ober iwn_radiotap_attach(sc);
400 1.8 blymn
401 1.1 ober ieee80211_announce(ic);
402 1.1 ober
403 1.1 ober return;
404 1.1 ober
405 1.1 ober /* free allocated memory if something failed during attachment */
406 1.1 ober fail4: while (--i >= 0)
407 1.1 ober iwn_free_tx_ring(sc, &sc->txq[i]);
408 1.1 ober iwn_free_rpool(sc);
409 1.1 ober fail3: iwn_free_shared(sc);
410 1.1 ober fail2: iwn_free_kw(sc);
411 1.1 ober fail1: iwn_free_fwmem(sc);
412 1.1 ober }
413 1.1 ober
414 1.1 ober static int
415 1.1 ober iwn_detach(struct device* self, int flags __unused)
416 1.1 ober {
417 1.1 ober struct iwn_softc *sc = (struct iwn_softc *)self;
418 1.1 ober struct ifnet *ifp = sc->sc_ic.ic_ifp;
419 1.1 ober int ac;
420 1.1 ober
421 1.1 ober iwn_stop(ifp, 1);
422 1.1 ober
423 1.1 ober #if NBPFILTER > 0
424 1.1 ober if (ifp != NULL)
425 1.1 ober bpfdetach(ifp);
426 1.1 ober #endif
427 1.1 ober ieee80211_ifdetach(&sc->sc_ic);
428 1.1 ober if (ifp != NULL)
429 1.1 ober if_detach(ifp);
430 1.1 ober
431 1.1 ober for (ac = 0; ac < IWN_NTXQUEUES; ac++)
432 1.1 ober iwn_free_tx_ring(sc, &sc->txq[ac]);
433 1.1 ober iwn_free_rx_ring(sc, &sc->rxq);
434 1.1 ober iwn_free_rpool(sc);
435 1.1 ober iwn_free_shared(sc);
436 1.1 ober
437 1.1 ober if (sc->sc_ih != NULL) {
438 1.1 ober pci_intr_disestablish(sc->sc_pct, sc->sc_ih);
439 1.1 ober sc->sc_ih = NULL;
440 1.1 ober }
441 1.1 ober
442 1.1 ober bus_space_unmap(sc->sc_st, sc->sc_sh, sc->sc_sz);
443 1.1 ober
444 1.1 ober return 0;
445 1.1 ober }
446 1.1 ober
447 1.1 ober /*
448 1.1 ober * Attach the interface to 802.11 radiotap.
449 1.1 ober */
450 1.1 ober static void
451 1.1 ober iwn_radiotap_attach(struct iwn_softc *sc)
452 1.1 ober {
453 1.1 ober struct ifnet *ifp = sc->sc_ic.ic_ifp;
454 1.1 ober
455 1.1 ober #if NBPFILTER > 0
456 1.1 ober bpfattach2(ifp, DLT_IEEE802_11_RADIO,
457 1.8 blymn sizeof (struct ieee80211_frame) + IEEE80211_RADIOTAP_HDRLEN,
458 1.2 ober &sc->sc_drvbpf);
459 1.1 ober
460 1.1 ober sc->sc_rxtap_len = sizeof sc->sc_rxtapu;
461 1.1 ober sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len);
462 1.1 ober sc->sc_rxtap.wr_ihdr.it_present = htole32(IWN_RX_RADIOTAP_PRESENT);
463 1.1 ober
464 1.1 ober sc->sc_txtap_len = sizeof sc->sc_txtapu;
465 1.1 ober sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len);
466 1.1 ober sc->sc_txtap.wt_ihdr.it_present = htole32(IWN_TX_RADIOTAP_PRESENT);
467 1.1 ober #endif
468 1.1 ober }
469 1.1 ober
470 1.1 ober
471 1.1 ober /*
472 1.1 ober * Build a beacon frame that the firmware will broadcast periodically in
473 1.1 ober * IBSS or HostAP modes.
474 1.1 ober */
475 1.1 ober static int
476 1.1 ober iwn_setup_beacon(struct iwn_softc *sc, struct ieee80211_node *ni)
477 1.1 ober {
478 1.1 ober struct ieee80211com *ic = &sc->sc_ic;
479 1.1 ober struct iwn_tx_ring *ring = &sc->txq[4];
480 1.1 ober struct iwn_tx_desc *desc;
481 1.1 ober struct iwn_tx_data *data;
482 1.1 ober struct iwn_tx_cmd *cmd;
483 1.1 ober struct iwn_cmd_beacon *bcn;
484 1.1 ober struct ieee80211_beacon_offsets bo;
485 1.1 ober struct mbuf *m0;
486 1.1 ober bus_addr_t paddr;
487 1.1 ober int error;
488 1.1 ober
489 1.1 ober desc = &ring->desc[ring->cur];
490 1.1 ober data = &ring->data[ring->cur];
491 1.1 ober
492 1.1 ober m0 = ieee80211_beacon_alloc(ic, ni, &bo);
493 1.1 ober if (m0 == NULL) {
494 1.1 ober aprint_error_dev(sc->sc_dev, "could not allocate beacon frame\n");
495 1.1 ober return ENOMEM;
496 1.1 ober }
497 1.1 ober
498 1.1 ober cmd = &ring->cmd[ring->cur];
499 1.1 ober cmd->code = IWN_CMD_SET_BEACON;
500 1.1 ober cmd->flags = 0;
501 1.1 ober cmd->qid = ring->qid;
502 1.1 ober cmd->idx = ring->cur;
503 1.1 ober
504 1.1 ober bcn = (struct iwn_cmd_beacon *)cmd->data;
505 1.1 ober memset(bcn, 0, sizeof (struct iwn_cmd_beacon));
506 1.1 ober bcn->id = IWN_ID_BROADCAST;
507 1.1 ober bcn->ofdm_mask = 0xff;
508 1.1 ober bcn->cck_mask = 0x0f;
509 1.1 ober bcn->lifetime = htole32(IWN_LIFETIME_INFINITE);
510 1.1 ober bcn->len = htole16(m0->m_pkthdr.len);
511 1.1 ober bcn->rate = (ic->ic_curmode == IEEE80211_MODE_11A) ?
512 1.2 ober iwn_plcp_signal(12) : iwn_plcp_signal(2);
513 1.1 ober bcn->flags = htole32(IWN_TX_AUTO_SEQ | IWN_TX_INSERT_TSTAMP);
514 1.1 ober
515 1.1 ober /* save and trim IEEE802.11 header */
516 1.1 ober m_copydata(m0, 0, sizeof (struct ieee80211_frame), (void *)&bcn->wh);
517 1.1 ober m_adj(m0, sizeof (struct ieee80211_frame));
518 1.1 ober
519 1.1 ober /* assume beacon frame is contiguous */
520 1.1 ober error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0,
521 1.2 ober BUS_DMA_READ | BUS_DMA_NOWAIT);
522 1.1 ober if (error) {
523 1.1 ober aprint_error_dev(sc->sc_dev, "could not map beacon\n");
524 1.1 ober m_freem(m0);
525 1.1 ober return error;
526 1.1 ober }
527 1.1 ober
528 1.1 ober data->m = m0;
529 1.1 ober
530 1.1 ober /* first scatter/gather segment is used by the beacon command */
531 1.1 ober paddr = ring->cmd_dma.paddr + ring->cur * sizeof (struct iwn_tx_cmd);
532 1.8 blymn
533 1.1 ober IWN_SET_DESC_NSEGS(desc, 2);
534 1.1 ober IWN_SET_DESC_SEG(desc, 0, paddr , 4 + sizeof(struct iwn_cmd_beacon));
535 1.1 ober IWN_SET_DESC_SEG(desc, 1, data->map->dm_segs[0].ds_addr,
536 1.2 ober data->map->dm_segs[1].ds_len);
537 1.8 blymn
538 1.1 ober
539 1.1 ober /* kick cmd ring */
540 1.1 ober ring->cur = (ring->cur + 1) % IWN_TX_RING_COUNT;
541 1.1 ober IWN_WRITE(sc, IWN_TX_WIDX, ring->qid << 8 | ring->cur);
542 1.1 ober
543 1.1 ober return 0;
544 1.1 ober }
545 1.1 ober
546 1.1 ober static int
547 1.1 ober iwn_dma_contig_alloc(bus_dma_tag_t tag, struct iwn_dma_info *dma, void **kvap,
548 1.1 ober bus_size_t size, bus_size_t alignment, int flags)
549 1.1 ober {
550 1.1 ober int nsegs, error;
551 1.1 ober
552 1.1 ober dma->tag = tag;
553 1.1 ober dma->size = size;
554 1.1 ober
555 1.1 ober error = bus_dmamap_create(tag, size, 1, size, 0, flags, &dma->map);
556 1.1 ober if (error != 0)
557 1.1 ober goto fail;
558 1.1 ober
559 1.1 ober error = bus_dmamem_alloc(tag, size, alignment, 0, &dma->seg, 1, &nsegs,
560 1.1 ober flags);
561 1.1 ober if (error != 0)
562 1.1 ober goto fail;
563 1.1 ober
564 1.1 ober error = bus_dmamem_map(tag, &dma->seg, 1, size, &dma->vaddr, flags);
565 1.1 ober if (error != 0)
566 1.1 ober goto fail;
567 1.1 ober
568 1.1 ober error = bus_dmamap_load(tag, dma->map, dma->vaddr, size, NULL, flags);
569 1.1 ober if (error != 0)
570 1.1 ober goto fail;
571 1.1 ober
572 1.1 ober memset(dma->vaddr, 0, size);
573 1.1 ober
574 1.1 ober dma->paddr = dma->map->dm_segs[0].ds_addr;
575 1.1 ober if (kvap != NULL)
576 1.1 ober *kvap = dma->vaddr;
577 1.1 ober
578 1.1 ober return 0;
579 1.1 ober
580 1.1 ober fail: iwn_dma_contig_free(dma);
581 1.1 ober return error;
582 1.1 ober }
583 1.1 ober
584 1.1 ober static void
585 1.1 ober iwn_dma_contig_free(struct iwn_dma_info *dma)
586 1.1 ober {
587 1.1 ober if (dma->map != NULL) {
588 1.1 ober if (dma->vaddr != NULL) {
589 1.1 ober bus_dmamap_unload(dma->tag, dma->map);
590 1.1 ober bus_dmamem_unmap(dma->tag, dma->vaddr, dma->size);
591 1.1 ober bus_dmamem_free(dma->tag, &dma->seg, 1);
592 1.1 ober dma->vaddr = NULL;
593 1.1 ober }
594 1.1 ober bus_dmamap_destroy(dma->tag, dma->map);
595 1.1 ober dma->map = NULL;
596 1.1 ober }
597 1.1 ober }
598 1.1 ober
599 1.1 ober static int
600 1.1 ober iwn_alloc_shared(struct iwn_softc *sc)
601 1.1 ober {
602 1.15 christos int error;
603 1.14 christos void *p;
604 1.15 christos /* must be aligned on a 1KB boundary */
605 1.1 ober error = iwn_dma_contig_alloc(sc->sc_dmat, &sc->shared_dma,
606 1.14 christos &p, sizeof (struct iwn_shared), 1024,BUS_DMA_NOWAIT);
607 1.16 christos sc->shared = p;
608 1.1 ober if (error != 0)
609 1.2 ober aprint_error_dev(sc->sc_dev,
610 1.2 ober "could not allocate shared area DMA memory\n");
611 1.1 ober
612 1.1 ober return error;
613 1.1 ober
614 1.1 ober }
615 1.1 ober
616 1.1 ober static void
617 1.1 ober iwn_free_shared(struct iwn_softc *sc)
618 1.1 ober {
619 1.1 ober iwn_dma_contig_free(&sc->shared_dma);
620 1.1 ober }
621 1.1 ober
622 1.1 ober static int
623 1.1 ober iwn_alloc_kw(struct iwn_softc *sc)
624 1.1 ober {
625 1.1 ober /* must be aligned on a 16-byte boundary */
626 1.1 ober return iwn_dma_contig_alloc(sc->sc_dmat, &sc->kw_dma, NULL,
627 1.1 ober PAGE_SIZE, PAGE_SIZE, BUS_DMA_NOWAIT);
628 1.1 ober }
629 1.1 ober
630 1.1 ober static void
631 1.1 ober iwn_free_kw(struct iwn_softc *sc)
632 1.1 ober {
633 1.1 ober iwn_dma_contig_free(&sc->kw_dma);
634 1.1 ober }
635 1.1 ober
636 1.1 ober static int
637 1.1 ober iwn_alloc_fwmem(struct iwn_softc *sc)
638 1.1 ober {
639 1.1 ober int error;
640 1.1 ober /* allocate enough contiguous space to store text and data */
641 1.1 ober error = iwn_dma_contig_alloc(sc->sc_dmat, &sc->fw_dma, NULL,
642 1.2 ober IWN_FW_MAIN_TEXT_MAXSZ + IWN_FW_MAIN_DATA_MAXSZ, 16,
643 1.2 ober BUS_DMA_NOWAIT);
644 1.1 ober
645 1.1 ober if (error != 0){
646 1.1 ober aprint_error_dev(sc->sc_dev,
647 1.2 ober "could not allocate firmware transfer area DMA memory\n" );
648 1.8 blymn
649 1.1 ober }
650 1.1 ober return error;
651 1.1 ober }
652 1.1 ober
653 1.1 ober static void
654 1.1 ober iwn_free_fwmem(struct iwn_softc *sc)
655 1.1 ober {
656 1.1 ober iwn_dma_contig_free(&sc->fw_dma);
657 1.1 ober }
658 1.1 ober
659 1.1 ober static struct iwn_rbuf *
660 1.1 ober iwn_alloc_rbuf(struct iwn_softc *sc)
661 1.1 ober {
662 1.1 ober struct iwn_rbuf *rbuf;
663 1.1 ober
664 1.1 ober rbuf = SLIST_FIRST(&sc->rxq.freelist);
665 1.1 ober if (rbuf == NULL)
666 1.1 ober return NULL;
667 1.1 ober SLIST_REMOVE_HEAD(&sc->rxq.freelist, next);
668 1.1 ober sc->rxq.nb_free_entries --;
669 1.1 ober return rbuf;
670 1.1 ober }
671 1.1 ober
672 1.1 ober /*
673 1.1 ober * This is called automatically by the network stack when the mbuf to which
674 1.1 ober * our Rx buffer is attached is freed.
675 1.1 ober */
676 1.1 ober static void
677 1.1 ober iwn_free_rbuf(struct mbuf* m, void *buf, size_t size, void *arg)
678 1.1 ober {
679 1.1 ober struct iwn_rbuf *rbuf = arg;
680 1.1 ober struct iwn_softc *sc = rbuf->sc;
681 1.1 ober
682 1.1 ober /* put the buffer back in the free list */
683 1.1 ober SLIST_INSERT_HEAD(&sc->rxq.freelist, rbuf, next);
684 1.1 ober
685 1.1 ober sc->rxq.nb_free_entries ++;
686 1.1 ober
687 1.1 ober if (__predict_true(m != NULL))
688 1.1 ober pool_cache_put(mb_cache, m);
689 1.1 ober }
690 1.1 ober
691 1.1 ober
692 1.1 ober static int
693 1.1 ober iwn_alloc_rpool(struct iwn_softc *sc)
694 1.1 ober {
695 1.1 ober struct iwn_rx_ring *ring = &sc->rxq;
696 1.1 ober struct iwn_rbuf *rbuf;
697 1.1 ober int i, error;
698 1.1 ober
699 1.1 ober /* allocate a big chunk of DMA'able memory.. */
700 1.1 ober error = iwn_dma_contig_alloc(sc->sc_dmat, &ring->buf_dma, NULL,
701 1.1 ober IWN_RBUF_COUNT * IWN_RBUF_SIZE, IWN_BUF_ALIGN, BUS_DMA_NOWAIT);
702 1.1 ober if (error != 0) {
703 1.3 skrll aprint_error_dev(sc->sc_dev,
704 1.3 skrll "could not allocate Rx buffers DMA memory\n");
705 1.1 ober return error;
706 1.1 ober }
707 1.1 ober
708 1.1 ober /* ..and split it into chunks of "rbufsz" bytes */
709 1.1 ober SLIST_INIT(&ring->freelist);
710 1.1 ober for (i = 0; i < IWN_RBUF_COUNT; i++) {
711 1.1 ober rbuf = &ring->rbuf[i];
712 1.1 ober
713 1.1 ober rbuf->sc = sc; /* backpointer for callbacks */
714 1.1 ober rbuf->vaddr = (char *)ring->buf_dma.vaddr + i * IWN_RBUF_SIZE;
715 1.1 ober rbuf->paddr = ring->buf_dma.paddr + i * IWN_RBUF_SIZE;
716 1.1 ober
717 1.1 ober SLIST_INSERT_HEAD(&ring->freelist, rbuf, next);
718 1.1 ober }
719 1.1 ober ring->nb_free_entries = IWN_RBUF_COUNT;
720 1.1 ober return 0;
721 1.1 ober }
722 1.1 ober
723 1.1 ober static void
724 1.1 ober iwn_free_rpool(struct iwn_softc *sc)
725 1.1 ober {
726 1.1 ober iwn_dma_contig_free(&sc->rxq.buf_dma);
727 1.1 ober }
728 1.1 ober
729 1.1 ober static int
730 1.1 ober iwn_alloc_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)
731 1.1 ober {
732 1.15 christos struct iwn_rx_data *data;
733 1.15 christos struct iwn_rbuf *rbuf;
734 1.15 christos int i, error;
735 1.14 christos void *p;
736 1.8 blymn
737 1.1 ober ring->cur = 0;
738 1.1 ober
739 1.1 ober error = iwn_dma_contig_alloc(sc->sc_dmat, &ring->desc_dma,
740 1.14 christos &p, IWN_RX_RING_COUNT * sizeof (struct iwn_rx_desc),
741 1.1 ober IWN_RING_DMA_ALIGN, BUS_DMA_NOWAIT);
742 1.1 ober if (error != 0) {
743 1.3 skrll aprint_error_dev(sc->sc_dev,
744 1.3 skrll "could not allocate rx ring DMA memory\n");
745 1.1 ober goto fail;
746 1.1 ober }
747 1.14 christos ring->desc = p;
748 1.1 ober
749 1.1 ober /*
750 1.1 ober * Setup Rx buffers.
751 1.1 ober */
752 1.1 ober for (i = 0; i < IWN_RX_RING_COUNT; i++) {
753 1.1 ober data = &ring->data[i];
754 1.8 blymn
755 1.1 ober MGETHDR(data->m, M_DONTWAIT, MT_DATA);
756 1.1 ober if (data->m == NULL) {
757 1.1 ober aprint_error_dev(sc->sc_dev, "could not allocate rx mbuf\n");
758 1.1 ober error = ENOMEM;
759 1.1 ober goto fail;
760 1.1 ober }
761 1.1 ober if ((rbuf = iwn_alloc_rbuf(sc)) == NULL) {
762 1.1 ober m_freem(data->m);
763 1.1 ober data->m = NULL;
764 1.1 ober aprint_error_dev(sc->sc_dev, "could not allocate rx buffer\n");
765 1.1 ober error = ENOMEM;
766 1.1 ober goto fail;
767 1.1 ober }
768 1.1 ober /* attach Rx buffer to mbuf */
769 1.1 ober MEXTADD(data->m, rbuf->vaddr, IWN_RBUF_SIZE, 0, iwn_free_rbuf,
770 1.1 ober rbuf);
771 1.1 ober
772 1.1 ober data->m->m_flags |= M_EXT_RW;
773 1.1 ober /* Rx buffers are aligned on a 256-byte boundary */
774 1.1 ober ring->desc[i] = htole32(rbuf->paddr >> 8);
775 1.1 ober }
776 1.1 ober
777 1.1 ober return 0;
778 1.1 ober
779 1.1 ober fail: iwn_free_rx_ring(sc, ring);
780 1.1 ober return error;
781 1.1 ober }
782 1.1 ober
783 1.1 ober static void
784 1.1 ober iwn_reset_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)
785 1.1 ober {
786 1.1 ober int ntries;
787 1.1 ober
788 1.1 ober iwn_mem_lock(sc);
789 1.1 ober
790 1.1 ober IWN_WRITE(sc, IWN_RX_CONFIG, 0);
791 1.1 ober for (ntries = 0; ntries < 100; ntries++) {
792 1.1 ober if (IWN_READ(sc, IWN_RX_STATUS) & IWN_RX_IDLE)
793 1.1 ober break;
794 1.1 ober DELAY(10);
795 1.1 ober }
796 1.1 ober #ifdef IWN_DEBUG
797 1.1 ober if (ntries == 100 && iwn_debug > 0)
798 1.1 ober aprint_error_dev(sc->sc_dev, "timeout resetting Rx ring\n");
799 1.1 ober #endif
800 1.1 ober iwn_mem_unlock(sc);
801 1.1 ober
802 1.1 ober ring->cur = 0;
803 1.1 ober }
804 1.1 ober
805 1.1 ober static void
806 1.1 ober iwn_free_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)
807 1.1 ober {
808 1.1 ober int i;
809 1.1 ober
810 1.1 ober iwn_dma_contig_free(&ring->desc_dma);
811 1.1 ober
812 1.1 ober for (i = 0; i < IWN_RX_RING_COUNT; i++) {
813 1.1 ober if (ring->data[i].m != NULL)
814 1.1 ober m_freem(ring->data[i].m);
815 1.1 ober }
816 1.1 ober }
817 1.1 ober
818 1.1 ober static int
819 1.1 ober iwn_alloc_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring, int count,
820 1.1 ober int qid)
821 1.1 ober {
822 1.2 ober struct iwn_tx_data *data;
823 1.1 ober int i, error;
824 1.14 christos void *p;
825 1.1 ober
826 1.1 ober ring->qid = qid;
827 1.1 ober ring->count = count;
828 1.1 ober ring->queued = 0;
829 1.1 ober ring->cur = 0;
830 1.1 ober
831 1.1 ober error = iwn_dma_contig_alloc(sc->sc_dmat, &ring->desc_dma,
832 1.14 christos &p, count * sizeof (struct iwn_tx_desc),
833 1.1 ober IWN_RING_DMA_ALIGN, BUS_DMA_NOWAIT);
834 1.1 ober if (error != 0) {
835 1.1 ober aprint_error_dev(sc->sc_dev, "could not allocate tx ring DMA memory\n");
836 1.1 ober goto fail;
837 1.1 ober }
838 1.14 christos ring->desc = p;
839 1.1 ober
840 1.1 ober error = iwn_dma_contig_alloc(sc->sc_dmat, &ring->cmd_dma,
841 1.14 christos &p, count * sizeof (struct iwn_tx_cmd), 4, BUS_DMA_NOWAIT);
842 1.1 ober if (error != 0) {
843 1.1 ober aprint_error_dev(sc->sc_dev, "could not allocate tx cmd DMA memory\n");
844 1.1 ober goto fail;
845 1.1 ober }
846 1.14 christos ring->cmd = p;
847 1.1 ober
848 1.1 ober ring->data = malloc(count * sizeof (struct iwn_tx_data), M_DEVBUF, M_NOWAIT);
849 1.8 blymn
850 1.1 ober if (ring->data == NULL) {
851 1.1 ober aprint_error_dev(sc->sc_dev,"could not allocate tx data slots\n");
852 1.1 ober goto fail;
853 1.1 ober }
854 1.1 ober
855 1.1 ober memset(ring->data, 0, count * sizeof (struct iwn_tx_data));
856 1.1 ober
857 1.1 ober for (i = 0; i < count; i++) {
858 1.2 ober data = &ring->data[i];
859 1.1 ober
860 1.1 ober error = bus_dmamap_create(sc->sc_dmat, MCLBYTES,
861 1.1 ober IWN_MAX_SCATTER - 1, MCLBYTES, 0, BUS_DMA_NOWAIT,
862 1.1 ober &data->map);
863 1.1 ober if (error != 0) {
864 1.1 ober aprint_error_dev(sc->sc_dev, "could not create tx buf DMA map\n");
865 1.1 ober goto fail;
866 1.1 ober }
867 1.1 ober }
868 1.1 ober
869 1.1 ober return 0;
870 1.1 ober
871 1.1 ober fail: iwn_free_tx_ring(sc, ring);
872 1.1 ober return error;
873 1.1 ober }
874 1.1 ober
875 1.1 ober static void
876 1.1 ober iwn_reset_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring)
877 1.1 ober {
878 1.15 christos struct iwn_tx_data *data;
879 1.1 ober uint32_t tmp;
880 1.1 ober int i, ntries;
881 1.1 ober
882 1.1 ober iwn_mem_lock(sc);
883 1.1 ober
884 1.1 ober IWN_WRITE(sc, IWN_TX_CONFIG(ring->qid), 0);
885 1.1 ober for (ntries = 0; ntries < 100; ntries++) {
886 1.1 ober tmp = IWN_READ(sc, IWN_TX_STATUS);
887 1.1 ober if ((tmp & IWN_TX_IDLE(ring->qid)) == IWN_TX_IDLE(ring->qid))
888 1.1 ober break;
889 1.1 ober DELAY(10);
890 1.1 ober }
891 1.1 ober #ifdef IWN_DEBUG
892 1.1 ober if (ntries == 100 && iwn_debug > 1) {
893 1.1 ober aprint_error_dev(sc->sc_dev, "timeout resetting Tx ring %d\n", ring->qid);
894 1.1 ober }
895 1.1 ober #endif
896 1.1 ober iwn_mem_unlock(sc);
897 1.1 ober
898 1.1 ober for (i = 0; i < ring->count; i++) {
899 1.1 ober data = &ring->data[i];
900 1.1 ober
901 1.1 ober if (data->m != NULL) {
902 1.1 ober bus_dmamap_unload(sc->sc_dmat, data->map);
903 1.1 ober m_freem(data->m);
904 1.1 ober data->m = NULL;
905 1.1 ober }
906 1.1 ober }
907 1.1 ober
908 1.1 ober ring->queued = 0;
909 1.1 ober ring->cur = 0;
910 1.1 ober }
911 1.1 ober
912 1.1 ober static void
913 1.1 ober iwn_free_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring)
914 1.1 ober {
915 1.2 ober struct iwn_tx_data *data;
916 1.2 ober int i;
917 1.1 ober
918 1.1 ober iwn_dma_contig_free(&ring->desc_dma);
919 1.1 ober iwn_dma_contig_free(&ring->cmd_dma);
920 1.1 ober
921 1.1 ober if (ring->data != NULL) {
922 1.1 ober for (i = 0; i < ring->count; i++) {
923 1.1 ober data = &ring->data[i];
924 1.1 ober
925 1.1 ober if (data->m != NULL) {
926 1.1 ober bus_dmamap_unload(sc->sc_dmat, data->map);
927 1.1 ober m_freem(data->m);
928 1.1 ober }
929 1.1 ober }
930 1.1 ober free(ring->data, M_DEVBUF);
931 1.1 ober }
932 1.1 ober }
933 1.1 ober
934 1.1 ober /*ARGUSED*/
935 1.1 ober struct ieee80211_node *
936 1.1 ober iwn_node_alloc(struct ieee80211_node_table *nt __unused)
937 1.1 ober {
938 1.1 ober struct iwn_node *wn;
939 1.1 ober
940 1.1 ober wn = malloc(sizeof (struct iwn_node), M_DEVBUF, M_NOWAIT);
941 1.1 ober
942 1.1 ober if (wn != NULL)
943 1.1 ober memset(wn, 0, sizeof (struct iwn_node));
944 1.1 ober return (struct ieee80211_node *)wn;
945 1.1 ober
946 1.1 ober }
947 1.1 ober
948 1.1 ober static void
949 1.1 ober iwn_newassoc(struct ieee80211_node *ni, int isnew)
950 1.1 ober {
951 1.1 ober struct iwn_softc *sc = ni->ni_ic->ic_ifp->if_softc;
952 1.1 ober int i;
953 1.1 ober
954 1.1 ober ieee80211_amrr_node_init(&sc->amrr, &((struct iwn_node *)ni)->amn);
955 1.1 ober
956 1.1 ober /* set rate to some reasonable initial value */
957 1.1 ober for (i = ni->ni_rates.rs_nrates - 1;
958 1.1 ober i > 0 && (ni->ni_rates.rs_rates[i] & IEEE80211_RATE_VAL) > 72;
959 1.1 ober i--);
960 1.1 ober ni->ni_txrate = i;
961 1.1 ober }
962 1.1 ober
963 1.1 ober static int
964 1.1 ober iwn_media_change(struct ifnet *ifp)
965 1.1 ober {
966 1.1 ober int error;
967 1.1 ober
968 1.1 ober error = ieee80211_media_change(ifp);
969 1.1 ober if (error != ENETRESET)
970 1.1 ober return error;
971 1.1 ober
972 1.1 ober if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING))
973 1.1 ober iwn_init(ifp);
974 1.1 ober
975 1.1 ober return 0;
976 1.1 ober }
977 1.1 ober
978 1.1 ober static int
979 1.1 ober iwn_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
980 1.1 ober {
981 1.1 ober struct ifnet *ifp = ic->ic_ifp;
982 1.1 ober struct iwn_softc *sc = ifp->if_softc;
983 1.1 ober int error;
984 1.1 ober
985 1.1 ober callout_stop(&sc->calib_to);
986 1.1 ober
987 1.11 blymn DPRINTF(("iwn_newstate: nstate = %d, ic->ic_state = %d\n", nstate,
988 1.11 blymn ic->ic_state));
989 1.11 blymn
990 1.1 ober switch (nstate) {
991 1.1 ober
992 1.1 ober case IEEE80211_S_SCAN:
993 1.8 blymn
994 1.1 ober if (sc->is_scanning)
995 1.1 ober break;
996 1.1 ober
997 1.1 ober sc->is_scanning = true;
998 1.1 ober ieee80211_node_table_reset(&ic->ic_scan);
999 1.1 ober ic->ic_flags |= IEEE80211_F_SCAN | IEEE80211_F_ASCAN;
1000 1.1 ober
1001 1.1 ober /* make the link LED blink while we're scanning */
1002 1.1 ober iwn_set_led(sc, IWN_LED_LINK, 20, 2);
1003 1.1 ober
1004 1.1 ober if ((error = iwn_scan(sc, IEEE80211_CHAN_G)) != 0) {
1005 1.1 ober aprint_error_dev(sc->sc_dev, "could not initiate scan\n");
1006 1.8 blymn ic->ic_flags &= ~(IEEE80211_F_SCAN | IEEE80211_F_ASCAN);
1007 1.1 ober return error;
1008 1.1 ober }
1009 1.1 ober ic->ic_state = nstate;
1010 1.1 ober return 0;
1011 1.1 ober
1012 1.1 ober case IEEE80211_S_ASSOC:
1013 1.1 ober if (ic->ic_state != IEEE80211_S_RUN)
1014 1.1 ober break;
1015 1.1 ober /* FALLTHROUGH */
1016 1.1 ober case IEEE80211_S_AUTH:
1017 1.1 ober /* reset state to handle reassociations correctly */
1018 1.1 ober sc->config.associd = 0;
1019 1.1 ober sc->config.filter &= ~htole32(IWN_FILTER_BSS);
1020 1.1 ober /*sc->calib.state = IWN_CALIB_STATE_INIT;*/
1021 1.1 ober
1022 1.1 ober if ((error = iwn_auth(sc)) != 0) {
1023 1.1 ober aprint_error_dev(sc->sc_dev, "could not move to auth state\n");
1024 1.1 ober return error;
1025 1.1 ober }
1026 1.1 ober break;
1027 1.1 ober
1028 1.1 ober case IEEE80211_S_RUN:
1029 1.1 ober if ((error = iwn_run(sc)) != 0) {
1030 1.1 ober aprint_error_dev(sc->sc_dev, "could not move to run state\n");
1031 1.1 ober return error;
1032 1.1 ober }
1033 1.1 ober break;
1034 1.1 ober
1035 1.1 ober case IEEE80211_S_INIT:
1036 1.1 ober sc->is_scanning = false;
1037 1.1 ober break;
1038 1.1 ober }
1039 1.1 ober
1040 1.1 ober return sc->sc_newstate(ic, nstate, arg);
1041 1.1 ober }
1042 1.1 ober
1043 1.1 ober /*
1044 1.1 ober * Grab exclusive access to NIC memory.
1045 1.1 ober */
1046 1.1 ober static void
1047 1.1 ober iwn_mem_lock(struct iwn_softc *sc)
1048 1.1 ober {
1049 1.1 ober uint32_t tmp;
1050 1.1 ober int ntries;
1051 1.1 ober
1052 1.1 ober tmp = IWN_READ(sc, IWN_GPIO_CTL);
1053 1.1 ober IWN_WRITE(sc, IWN_GPIO_CTL, tmp | IWN_GPIO_MAC);
1054 1.1 ober
1055 1.1 ober /* spin until we actually get the lock */
1056 1.1 ober for (ntries = 0; ntries < 1000; ntries++) {
1057 1.1 ober if ((IWN_READ(sc, IWN_GPIO_CTL) &
1058 1.2 ober (IWN_GPIO_CLOCK | IWN_GPIO_SLEEP)) == IWN_GPIO_CLOCK)
1059 1.1 ober break;
1060 1.1 ober DELAY(10);
1061 1.1 ober }
1062 1.1 ober if (ntries == 1000)
1063 1.1 ober aprint_error_dev(sc->sc_dev, "could not lock memory\n");
1064 1.1 ober }
1065 1.1 ober
1066 1.1 ober /*
1067 1.1 ober * Release lock on NIC memory.
1068 1.1 ober */
1069 1.1 ober static void
1070 1.1 ober iwn_mem_unlock(struct iwn_softc *sc)
1071 1.1 ober {
1072 1.1 ober uint32_t tmp = IWN_READ(sc, IWN_GPIO_CTL);
1073 1.1 ober IWN_WRITE(sc, IWN_GPIO_CTL, tmp & ~IWN_GPIO_MAC);
1074 1.1 ober }
1075 1.1 ober
1076 1.1 ober static uint32_t
1077 1.1 ober iwn_mem_read(struct iwn_softc *sc, uint32_t addr)
1078 1.1 ober {
1079 1.1 ober IWN_WRITE(sc, IWN_READ_MEM_ADDR, IWN_MEM_4 | addr);
1080 1.1 ober return IWN_READ(sc, IWN_READ_MEM_DATA);
1081 1.1 ober }
1082 1.1 ober
1083 1.1 ober static void
1084 1.1 ober iwn_mem_write(struct iwn_softc *sc, uint32_t addr, uint32_t data)
1085 1.1 ober {
1086 1.1 ober IWN_WRITE(sc, IWN_WRITE_MEM_ADDR, IWN_MEM_4 | addr);
1087 1.1 ober IWN_WRITE(sc, IWN_WRITE_MEM_DATA, data);
1088 1.1 ober }
1089 1.1 ober
1090 1.1 ober static void
1091 1.1 ober iwn_mem_write_region_4(struct iwn_softc *sc, uint32_t addr,
1092 1.1 ober const uint32_t *data, int wlen)
1093 1.1 ober {
1094 1.1 ober for (; wlen > 0; wlen--, data++, addr += 4)
1095 1.1 ober iwn_mem_write(sc, addr, *data);
1096 1.1 ober }
1097 1.1 ober
1098 1.1 ober static int
1099 1.1 ober iwn_eeprom_lock(struct iwn_softc *sc)
1100 1.1 ober {
1101 1.1 ober uint32_t tmp;
1102 1.1 ober int ntries;
1103 1.1 ober
1104 1.1 ober tmp = IWN_READ(sc, IWN_HWCONFIG);
1105 1.1 ober IWN_WRITE(sc, IWN_HWCONFIG, tmp | IWN_HW_EEPROM_LOCKED);
1106 1.1 ober
1107 1.1 ober /* spin until we actually get the lock */
1108 1.1 ober for (ntries = 0; ntries < 100; ntries++) {
1109 1.1 ober if (IWN_READ(sc, IWN_HWCONFIG) & IWN_HW_EEPROM_LOCKED)
1110 1.1 ober return 0;
1111 1.1 ober DELAY(10);
1112 1.1 ober }
1113 1.1 ober return ETIMEDOUT;
1114 1.1 ober }
1115 1.1 ober
1116 1.1 ober static void
1117 1.1 ober iwn_eeprom_unlock(struct iwn_softc *sc)
1118 1.1 ober {
1119 1.1 ober uint32_t tmp = IWN_READ(sc, IWN_HWCONFIG);
1120 1.1 ober IWN_WRITE(sc, IWN_HWCONFIG, tmp & ~IWN_HW_EEPROM_LOCKED);
1121 1.1 ober }
1122 1.1 ober
1123 1.1 ober /*
1124 1.15 christos * Read `len' bytes from the EEPROM. We access the EEPROM through the MAC
1125 1.1 ober * instead of using the traditional bit-bang method.
1126 1.1 ober */
1127 1.1 ober static int
1128 1.1 ober iwn_read_prom_data(struct iwn_softc *sc, uint32_t addr, void *data, int len)
1129 1.1 ober {
1130 1.1 ober uint8_t *out = data;
1131 1.1 ober uint32_t val;
1132 1.1 ober int ntries;
1133 1.1 ober
1134 1.1 ober iwn_mem_lock(sc);
1135 1.1 ober for (; len > 0; len -= 2, addr++) {
1136 1.1 ober IWN_WRITE(sc, IWN_EEPROM_CTL, addr << 2);
1137 1.1 ober IWN_WRITE(sc, IWN_EEPROM_CTL,
1138 1.1 ober IWN_READ(sc, IWN_EEPROM_CTL) & ~IWN_EEPROM_CMD);
1139 1.1 ober
1140 1.1 ober for (ntries = 0; ntries < 10; ntries++) {
1141 1.1 ober if ((val = IWN_READ(sc, IWN_EEPROM_CTL)) &
1142 1.1 ober IWN_EEPROM_READY)
1143 1.1 ober break;
1144 1.1 ober DELAY(5);
1145 1.1 ober }
1146 1.1 ober if (ntries == 10) {
1147 1.1 ober aprint_error_dev(sc->sc_dev, "could not read EEPROM\n");
1148 1.1 ober return ETIMEDOUT;
1149 1.1 ober }
1150 1.1 ober *out++ = val >> 16;
1151 1.1 ober if (len > 1)
1152 1.1 ober *out++ = val >> 24;
1153 1.1 ober }
1154 1.1 ober iwn_mem_unlock(sc);
1155 1.1 ober
1156 1.1 ober return 0;
1157 1.1 ober }
1158 1.1 ober
1159 1.1 ober /*
1160 1.1 ober * The firmware boot code is small and is intended to be copied directly into
1161 1.1 ober * the NIC internal memory.
1162 1.1 ober */
1163 1.1 ober static int
1164 1.1 ober iwn_load_microcode(struct iwn_softc *sc, const uint8_t *ucode, int size)
1165 1.1 ober {
1166 1.1 ober int ntries;
1167 1.1 ober
1168 1.1 ober size /= sizeof (uint32_t);
1169 1.1 ober
1170 1.1 ober iwn_mem_lock(sc);
1171 1.1 ober
1172 1.1 ober /* copy microcode image into NIC memory */
1173 1.1 ober iwn_mem_write_region_4(sc, IWN_MEM_UCODE_BASE,
1174 1.1 ober (const uint32_t *)ucode, size);
1175 1.1 ober
1176 1.1 ober iwn_mem_write(sc, IWN_MEM_UCODE_SRC, 0);
1177 1.1 ober iwn_mem_write(sc, IWN_MEM_UCODE_DST, IWN_FW_TEXT);
1178 1.1 ober iwn_mem_write(sc, IWN_MEM_UCODE_SIZE, size);
1179 1.1 ober
1180 1.1 ober /* run microcode */
1181 1.1 ober iwn_mem_write(sc, IWN_MEM_UCODE_CTL, IWN_UC_RUN);
1182 1.1 ober
1183 1.1 ober /* wait for transfer to complete */
1184 1.1 ober for (ntries = 0; ntries < 1000; ntries++) {
1185 1.1 ober if (!(iwn_mem_read(sc, IWN_MEM_UCODE_CTL) & IWN_UC_RUN))
1186 1.1 ober break;
1187 1.1 ober DELAY(10);
1188 1.1 ober }
1189 1.1 ober if (ntries == 1000) {
1190 1.1 ober iwn_mem_unlock(sc);
1191 1.1 ober aprint_error_dev(sc->sc_dev, "could not load boot firmware\n");
1192 1.1 ober return ETIMEDOUT;
1193 1.1 ober }
1194 1.1 ober iwn_mem_write(sc, IWN_MEM_UCODE_CTL, IWN_UC_ENABLE);
1195 1.1 ober
1196 1.1 ober iwn_mem_unlock(sc);
1197 1.1 ober
1198 1.1 ober return 0;
1199 1.1 ober }
1200 1.1 ober
1201 1.1 ober static int
1202 1.1 ober iwn_load_firmware(struct iwn_softc *sc)
1203 1.1 ober {
1204 1.1 ober struct iwn_dma_info *dma = &sc->fw_dma;
1205 1.1 ober struct iwn_firmware_hdr hdr;
1206 1.1 ober const uint8_t *init_text, *init_data, *main_text, *main_data;
1207 1.1 ober const uint8_t *boot_text;
1208 1.1 ober uint32_t init_textsz, init_datasz, main_textsz, main_datasz;
1209 1.1 ober uint32_t boot_textsz;
1210 1.1 ober firmware_handle_t fw;
1211 1.1 ober u_char *dfw;
1212 1.1 ober size_t size;
1213 1.1 ober int error;
1214 1.1 ober
1215 1.1 ober /* load firmware image from disk */
1216 1.13 christos if ((error = firmware_open("if_iwn","iwlwifi-4965.ucode", &fw)) != 0) {
1217 1.1 ober aprint_error_dev(sc->sc_dev, "could not read firmware file\n");
1218 1.1 ober goto fail1;
1219 1.1 ober }
1220 1.8 blymn
1221 1.1 ober size = firmware_get_size(fw);
1222 1.1 ober
1223 1.1 ober /* extract firmware header information */
1224 1.1 ober if (size < sizeof (struct iwn_firmware_hdr)) {
1225 1.1 ober aprint_error_dev(sc->sc_dev, "truncated firmware header: %zu bytes\n", size);
1226 1.8 blymn
1227 1.1 ober error = EINVAL;
1228 1.1 ober goto fail2;
1229 1.1 ober }
1230 1.1 ober
1231 1.1 ober
1232 1.1 ober if ((error = firmware_read(fw, 0, &hdr,
1233 1.2 ober sizeof (struct iwn_firmware_hdr))) != 0) {
1234 1.1 ober aprint_error_dev(sc->sc_dev, "can't get firmware header\n");
1235 1.1 ober goto fail2;
1236 1.1 ober }
1237 1.1 ober
1238 1.1 ober main_textsz = le32toh(hdr.main_textsz);
1239 1.1 ober main_datasz = le32toh(hdr.main_datasz);
1240 1.1 ober init_textsz = le32toh(hdr.init_textsz);
1241 1.1 ober init_datasz = le32toh(hdr.init_datasz);
1242 1.1 ober boot_textsz = le32toh(hdr.boot_textsz);
1243 1.1 ober
1244 1.1 ober /* sanity-check firmware segments sizes */
1245 1.1 ober if (main_textsz > IWN_FW_MAIN_TEXT_MAXSZ ||
1246 1.1 ober main_datasz > IWN_FW_MAIN_DATA_MAXSZ ||
1247 1.1 ober init_textsz > IWN_FW_INIT_TEXT_MAXSZ ||
1248 1.1 ober init_datasz > IWN_FW_INIT_DATA_MAXSZ ||
1249 1.1 ober boot_textsz > IWN_FW_BOOT_TEXT_MAXSZ ||
1250 1.1 ober (boot_textsz & 3) != 0) {
1251 1.1 ober aprint_error_dev(sc->sc_dev, "invalid firmware header\n");
1252 1.1 ober error = EINVAL;
1253 1.1 ober goto fail2;
1254 1.1 ober }
1255 1.1 ober
1256 1.1 ober /* check that all firmware segments are present */
1257 1.1 ober if (size < sizeof (struct iwn_firmware_hdr) + main_textsz +
1258 1.1 ober main_datasz + init_textsz + init_datasz + boot_textsz) {
1259 1.1 ober aprint_error_dev(sc->sc_dev, "firmware file too short: %zu bytes\n", size);
1260 1.1 ober error = EINVAL;
1261 1.1 ober goto fail2;
1262 1.1 ober }
1263 1.1 ober
1264 1.1 ober dfw = firmware_malloc(size);
1265 1.1 ober if (dfw == NULL) {
1266 1.1 ober aprint_error_dev(sc->sc_dev, "not enough memory to stock firmware\n");
1267 1.1 ober error = ENOMEM;
1268 1.1 ober goto fail2;
1269 1.1 ober }
1270 1.1 ober
1271 1.1 ober if ((error = firmware_read(fw, 0, dfw, size)) != 0) {
1272 1.1 ober aprint_error_dev(sc->sc_dev, "can't get firmware\n");
1273 1.1 ober goto fail2;
1274 1.1 ober }
1275 1.1 ober
1276 1.1 ober /* get pointers to firmware segments */
1277 1.1 ober main_text = dfw + sizeof (struct iwn_firmware_hdr);
1278 1.1 ober main_data = main_text + main_textsz;
1279 1.1 ober init_text = main_data + main_datasz;
1280 1.1 ober init_data = init_text + init_textsz;
1281 1.1 ober boot_text = init_data + init_datasz;
1282 1.1 ober
1283 1.1 ober /* copy initialization images into pre-allocated DMA-safe memory */
1284 1.1 ober memcpy(dma->vaddr, init_data, init_datasz);
1285 1.1 ober memcpy((char *)dma->vaddr + IWN_FW_INIT_DATA_MAXSZ, init_text, init_textsz);
1286 1.1 ober
1287 1.1 ober /* tell adapter where to find initialization images */
1288 1.1 ober iwn_mem_lock(sc);
1289 1.1 ober iwn_mem_write(sc, IWN_MEM_DATA_BASE, dma->paddr >> 4);
1290 1.1 ober iwn_mem_write(sc, IWN_MEM_DATA_SIZE, init_datasz);
1291 1.1 ober iwn_mem_write(sc, IWN_MEM_TEXT_BASE,
1292 1.1 ober (dma->paddr + IWN_FW_INIT_DATA_MAXSZ) >> 4);
1293 1.1 ober iwn_mem_write(sc, IWN_MEM_TEXT_SIZE, init_textsz);
1294 1.1 ober iwn_mem_unlock(sc);
1295 1.1 ober
1296 1.1 ober /* load firmware boot code */
1297 1.1 ober if ((error = iwn_load_microcode(sc, boot_text, boot_textsz)) != 0) {
1298 1.1 ober aprint_error_dev(sc->sc_dev, "could not load boot firmware\n");
1299 1.1 ober goto fail3;
1300 1.1 ober }
1301 1.1 ober
1302 1.1 ober /* now press "execute" ;-) */
1303 1.1 ober IWN_WRITE(sc, IWN_RESET, 0);
1304 1.1 ober
1305 1.8 blymn /* ..and wait at most one second for adapter to initialize */
1306 1.1 ober if ((error = tsleep(sc, PCATCH, "iwninit", hz)) != 0) {
1307 1.1 ober /* this isn't what was supposed to happen.. */
1308 1.1 ober aprint_error_dev(sc->sc_dev, "timeout waiting for adapter to initialize\n");
1309 1.1 ober }
1310 1.1 ober
1311 1.1 ober /* copy runtime images into pre-allocated DMA-safe memory */
1312 1.1 ober memcpy((char *)dma->vaddr, main_data, main_datasz);
1313 1.1 ober memcpy((char *)dma->vaddr + IWN_FW_MAIN_DATA_MAXSZ, main_text, main_textsz);
1314 1.1 ober
1315 1.1 ober /* tell adapter where to find runtime images */
1316 1.1 ober iwn_mem_lock(sc);
1317 1.1 ober iwn_mem_write(sc, IWN_MEM_DATA_BASE, dma->paddr >> 4);
1318 1.1 ober iwn_mem_write(sc, IWN_MEM_DATA_SIZE, main_datasz);
1319 1.1 ober iwn_mem_write(sc, IWN_MEM_TEXT_BASE,
1320 1.1 ober (dma->paddr + IWN_FW_MAIN_DATA_MAXSZ) >> 4);
1321 1.1 ober iwn_mem_write(sc, IWN_MEM_TEXT_SIZE, IWN_FW_UPDATED | main_textsz);
1322 1.1 ober iwn_mem_unlock(sc);
1323 1.1 ober
1324 1.1 ober /* wait at most one second for second alive notification */
1325 1.1 ober if ((error = tsleep(sc, PCATCH, "iwninit", hz)) != 0) {
1326 1.1 ober /* this isn't what was supposed to happen.. */
1327 1.1 ober aprint_error_dev(sc->sc_dev, "timeout waiting for adapter to initialize\n");
1328 1.1 ober }
1329 1.1 ober
1330 1.1 ober fail3: firmware_free(dfw,size);
1331 1.1 ober fail2: firmware_close(fw);
1332 1.1 ober fail1: return error;
1333 1.1 ober }
1334 1.1 ober
1335 1.1 ober static void
1336 1.1 ober iwn_calib_timeout(void *arg)
1337 1.1 ober {
1338 1.1 ober struct iwn_softc *sc = arg;
1339 1.1 ober struct ieee80211com *ic = &sc->sc_ic;
1340 1.1 ober int s;
1341 1.1 ober
1342 1.1 ober /* automatic rate control triggered every 500ms */
1343 1.1 ober if (ic->ic_fixed_rate == -1) {
1344 1.1 ober s = splnet();
1345 1.1 ober if (ic->ic_opmode == IEEE80211_M_STA)
1346 1.1 ober iwn_iter_func(sc, ic->ic_bss);
1347 1.1 ober else
1348 1.1 ober ieee80211_iterate_nodes(&ic->ic_sta, iwn_iter_func, sc);
1349 1.1 ober splx(s);
1350 1.1 ober }
1351 1.1 ober
1352 1.1 ober /* automatic calibration every 60s */
1353 1.1 ober if (++sc->calib_cnt >= 120) {
1354 1.1 ober DPRINTF(("sending request for statistics\n"));
1355 1.1 ober (void)iwn_cmd(sc, IWN_CMD_GET_STATISTICS, NULL, 0, 1);
1356 1.1 ober sc->calib_cnt = 0;
1357 1.1 ober }
1358 1.1 ober
1359 1.1 ober callout_schedule(&sc->calib_to, hz/2);
1360 1.1 ober
1361 1.1 ober }
1362 1.1 ober
1363 1.1 ober static void
1364 1.1 ober iwn_iter_func(void *arg, struct ieee80211_node *ni)
1365 1.1 ober {
1366 1.1 ober struct iwn_softc *sc = arg;
1367 1.1 ober struct iwn_node *wn = (struct iwn_node *)ni;
1368 1.1 ober
1369 1.1 ober ieee80211_amrr_choose(&sc->amrr, ni, &wn->amn);
1370 1.1 ober }
1371 1.1 ober
1372 1.1 ober static void
1373 1.1 ober iwn_ampdu_rx_start(struct iwn_softc *sc, struct iwn_rx_desc *desc)
1374 1.1 ober {
1375 1.1 ober struct iwn_rx_stat *stat;
1376 1.1 ober
1377 1.1 ober DPRINTFN(2, ("received AMPDU stats\n"));
1378 1.1 ober /* save Rx statistics, they will be used on IWN_AMPDU_RX_DONE */
1379 1.1 ober stat = (struct iwn_rx_stat *)(desc + 1);
1380 1.1 ober memcpy(&sc->last_rx_stat, stat, sizeof (*stat));
1381 1.1 ober sc->last_rx_valid = 1;
1382 1.1 ober }
1383 1.1 ober
1384 1.1 ober void
1385 1.1 ober iwn_rx_intr(struct iwn_softc *sc, struct iwn_rx_desc *desc,
1386 1.1 ober struct iwn_rx_data *data)
1387 1.1 ober {
1388 1.1 ober struct ieee80211com *ic = &sc->sc_ic;
1389 1.1 ober struct ifnet *ifp = ic->ic_ifp;
1390 1.1 ober struct iwn_rx_ring *ring = &sc->rxq;
1391 1.1 ober struct iwn_rbuf *rbuf;
1392 1.1 ober struct ieee80211_frame *wh;
1393 1.1 ober struct ieee80211_node *ni;
1394 1.1 ober struct mbuf *m, *mnew;
1395 1.1 ober struct iwn_rx_stat *stat;
1396 1.1 ober char *head;
1397 1.1 ober uint32_t *tail;
1398 1.1 ober int len, rssi;
1399 1.1 ober
1400 1.1 ober if (desc->type == IWN_AMPDU_RX_DONE) {
1401 1.1 ober /* check for prior AMPDU_RX_START */
1402 1.1 ober if (!sc->last_rx_valid) {
1403 1.1 ober DPRINTF(("missing AMPDU_RX_START\n"));
1404 1.1 ober ifp->if_ierrors++;
1405 1.1 ober return;
1406 1.1 ober }
1407 1.1 ober sc->last_rx_valid = 0;
1408 1.1 ober stat = &sc->last_rx_stat;
1409 1.1 ober } else
1410 1.1 ober stat = (struct iwn_rx_stat *)(desc + 1);
1411 1.1 ober
1412 1.1 ober if (stat->cfg_phy_len > IWN_STAT_MAXLEN) {
1413 1.1 ober aprint_error_dev(sc->sc_dev, "invalid rx statistic header\n");
1414 1.1 ober ifp->if_ierrors++;
1415 1.1 ober return;
1416 1.1 ober }
1417 1.1 ober
1418 1.1 ober if (desc->type == IWN_AMPDU_RX_DONE) {
1419 1.1 ober struct iwn_rx_ampdu *ampdu =
1420 1.1 ober (struct iwn_rx_ampdu *)(desc + 1);
1421 1.1 ober head = (char *)(ampdu + 1);
1422 1.1 ober len = le16toh(ampdu->len);
1423 1.1 ober } else {
1424 1.1 ober head = (char *)(stat + 1) + stat->cfg_phy_len;
1425 1.1 ober len = le16toh(stat->len);
1426 1.1 ober }
1427 1.1 ober
1428 1.11 blymn DPRINTF(("rx packet len %d\n", len));
1429 1.1 ober /* discard Rx frames with bad CRC early */
1430 1.1 ober tail = (uint32_t *)(head + len);
1431 1.1 ober if ((le32toh(*tail) & IWN_RX_NOERROR) != IWN_RX_NOERROR) {
1432 1.1 ober DPRINTFN(2, ("rx flags error %x\n", le32toh(*tail)));
1433 1.1 ober ifp->if_ierrors++;
1434 1.1 ober return;
1435 1.1 ober }
1436 1.1 ober /* XXX for ieee80211_find_rxnode() */
1437 1.1 ober if (len < sizeof (struct ieee80211_frame)) {
1438 1.1 ober DPRINTF(("frame too short: %d\n", len));
1439 1.1 ober ic->ic_stats.is_rx_tooshort++;
1440 1.1 ober ifp->if_ierrors++;
1441 1.1 ober return;
1442 1.1 ober }
1443 1.1 ober
1444 1.1 ober m = data->m;
1445 1.1 ober
1446 1.1 ober /* finalize mbuf */
1447 1.1 ober m->m_pkthdr.rcvif = ifp;
1448 1.1 ober m->m_data = head;
1449 1.1 ober m->m_pkthdr.len = m->m_len = len;
1450 1.1 ober
1451 1.1 ober if ((rbuf = SLIST_FIRST(&sc->rxq.freelist)) != NULL) {
1452 1.1 ober MGETHDR(mnew, M_DONTWAIT, MT_DATA);
1453 1.1 ober if (mnew == NULL) {
1454 1.1 ober ic->ic_stats.is_rx_nobuf++;
1455 1.1 ober ifp->if_ierrors++;
1456 1.1 ober return;
1457 1.1 ober }
1458 1.1 ober
1459 1.1 ober /* attach Rx buffer to mbuf */
1460 1.1 ober MEXTADD(mnew, rbuf->vaddr, IWN_RBUF_SIZE, 0, iwn_free_rbuf,
1461 1.1 ober rbuf);
1462 1.1 ober mnew->m_flags |= M_EXT_RW;
1463 1.1 ober SLIST_REMOVE_HEAD(&sc->rxq.freelist, next);
1464 1.1 ober
1465 1.1 ober data->m = mnew;
1466 1.1 ober
1467 1.1 ober /* update Rx descriptor */
1468 1.1 ober ring->desc[ring->cur] = htole32(rbuf->paddr >> 8);
1469 1.1 ober } else {
1470 1.1 ober /* no free rbufs, copy frame */
1471 1.1 ober m = m_dup(m, 0, M_COPYALL, M_DONTWAIT);
1472 1.1 ober if (m == NULL) {
1473 1.1 ober /* no free mbufs either, drop frame */
1474 1.1 ober ic->ic_stats.is_rx_nobuf++;
1475 1.1 ober ifp->if_ierrors++;
1476 1.1 ober return;
1477 1.1 ober }
1478 1.1 ober }
1479 1.1 ober
1480 1.1 ober rssi = iwn_get_rssi(stat);
1481 1.1 ober
1482 1.1 ober if (ic->ic_state == IEEE80211_S_SCAN)
1483 1.1 ober iwn_fix_channel(ic, m);
1484 1.1 ober
1485 1.1 ober #if NBPFILTER > 0
1486 1.1 ober if (sc->sc_drvbpf != NULL) {
1487 1.2 ober struct iwn_rx_radiotap_header *tap = &sc->sc_rxtap;
1488 1.1 ober
1489 1.1 ober tap->wr_flags = 0;
1490 1.1 ober tap->wr_chan_freq =
1491 1.1 ober htole16(ic->ic_channels[stat->chan].ic_freq);
1492 1.1 ober tap->wr_chan_flags =
1493 1.1 ober htole16(ic->ic_channels[stat->chan].ic_flags);
1494 1.1 ober tap->wr_dbm_antsignal = (int8_t)rssi;
1495 1.1 ober tap->wr_dbm_antnoise = (int8_t)sc->noise;
1496 1.1 ober tap->wr_tsft = stat->tstamp;
1497 1.1 ober switch (stat->rate) {
1498 1.2 ober /* CCK rates */
1499 1.1 ober case 10: tap->wr_rate = 2; break;
1500 1.1 ober case 20: tap->wr_rate = 4; break;
1501 1.1 ober case 55: tap->wr_rate = 11; break;
1502 1.1 ober case 110: tap->wr_rate = 22; break;
1503 1.2 ober /* OFDM rates */
1504 1.1 ober case 0xd: tap->wr_rate = 12; break;
1505 1.1 ober case 0xf: tap->wr_rate = 18; break;
1506 1.1 ober case 0x5: tap->wr_rate = 24; break;
1507 1.1 ober case 0x7: tap->wr_rate = 36; break;
1508 1.1 ober case 0x9: tap->wr_rate = 48; break;
1509 1.1 ober case 0xb: tap->wr_rate = 72; break;
1510 1.1 ober case 0x1: tap->wr_rate = 96; break;
1511 1.1 ober case 0x3: tap->wr_rate = 108; break;
1512 1.2 ober /* unknown rate: should not happen */
1513 1.1 ober default: tap->wr_rate = 0;
1514 1.1 ober }
1515 1.1 ober
1516 1.1 ober bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m);
1517 1.1 ober }
1518 1.1 ober #endif
1519 1.1 ober
1520 1.1 ober /* grab a reference to the source node */
1521 1.1 ober wh = mtod(m, struct ieee80211_frame *);
1522 1.1 ober ni = ieee80211_find_rxnode(ic,(struct ieee80211_frame_min *)wh);
1523 1.1 ober
1524 1.1 ober /* send the frame to the 802.11 layer */
1525 1.1 ober ieee80211_input(ic, m, ni, rssi, 0);
1526 1.1 ober
1527 1.1 ober /* node is no longer needed */
1528 1.1 ober ieee80211_free_node(ni);
1529 1.1 ober }
1530 1.1 ober
1531 1.1 ober
1532 1.1 ober /*
1533 1.1 ober * XXX: Hack to set the current channel to the value advertised in beacons or
1534 1.1 ober * probe responses. Only used during AP detection.
1535 1.1 ober * XXX: Duplicated from if_iwi.c
1536 1.1 ober */
1537 1.1 ober static void
1538 1.1 ober iwn_fix_channel(struct ieee80211com *ic, struct mbuf *m)
1539 1.1 ober {
1540 1.1 ober struct ieee80211_frame *wh;
1541 1.1 ober uint8_t subtype;
1542 1.1 ober uint8_t *frm, *efrm;
1543 1.1 ober
1544 1.1 ober wh = mtod(m, struct ieee80211_frame *);
1545 1.1 ober
1546 1.1 ober if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) != IEEE80211_FC0_TYPE_MGT)
1547 1.1 ober return;
1548 1.1 ober
1549 1.1 ober subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
1550 1.1 ober
1551 1.1 ober if (subtype != IEEE80211_FC0_SUBTYPE_BEACON &&
1552 1.1 ober subtype != IEEE80211_FC0_SUBTYPE_PROBE_RESP)
1553 1.1 ober return;
1554 1.1 ober
1555 1.1 ober frm = (uint8_t *)(wh + 1);
1556 1.1 ober efrm = mtod(m, uint8_t *) + m->m_len;
1557 1.1 ober
1558 1.1 ober frm += 12; /* skip tstamp, bintval and capinfo fields */
1559 1.1 ober while (frm < efrm) {
1560 1.1 ober if (*frm == IEEE80211_ELEMID_DSPARMS)
1561 1.1 ober #if IEEE80211_CHAN_MAX < 255
1562 1.2 ober if (frm[2] <= IEEE80211_CHAN_MAX)
1563 1.1 ober #endif
1564 1.2 ober ic->ic_curchan = &ic->ic_channels[frm[2]];
1565 1.1 ober
1566 1.1 ober frm += frm[1] + 2;
1567 1.1 ober }
1568 1.1 ober }
1569 1.1 ober
1570 1.1 ober static void
1571 1.1 ober iwn_rx_statistics(struct iwn_softc *sc, struct iwn_rx_desc *desc)
1572 1.1 ober {
1573 1.1 ober struct ieee80211com *ic = &sc->sc_ic;
1574 1.1 ober struct iwn_calib_state *calib = &sc->calib;
1575 1.1 ober struct iwn_stats *stats = (struct iwn_stats *)(desc + 1);
1576 1.1 ober
1577 1.1 ober /* ignore beacon statistics received during a scan */
1578 1.1 ober if (ic->ic_state != IEEE80211_S_RUN)
1579 1.1 ober return;
1580 1.1 ober
1581 1.1 ober DPRINTFN(3, ("received statistics (cmd=%d)\n", desc->type));
1582 1.1 ober sc->calib_cnt = 0; /* reset timeout */
1583 1.1 ober
1584 1.1 ober /* test if temperature has changed */
1585 1.1 ober if (stats->general.temp != sc->rawtemp) {
1586 1.1 ober int temp;
1587 1.1 ober
1588 1.1 ober sc->rawtemp = stats->general.temp;
1589 1.1 ober temp = iwn_get_temperature(sc);
1590 1.1 ober DPRINTFN(2, ("temperature=%d\n", temp));
1591 1.1 ober
1592 1.1 ober /* update Tx power if need be */
1593 1.1 ober iwn_power_calibration(sc, temp);
1594 1.1 ober }
1595 1.1 ober
1596 1.1 ober if (desc->type != IWN_BEACON_STATISTICS)
1597 1.15 christos return; /* reply to a statistics request */
1598 1.1 ober
1599 1.1 ober sc->noise = iwn_get_noise(&stats->rx.general);
1600 1.1 ober DPRINTFN(3, ("noise=%d\n", sc->noise));
1601 1.1 ober
1602 1.1 ober /* test that RSSI and noise are present in stats report */
1603 1.1 ober if (le32toh(stats->rx.general.flags) != 1) {
1604 1.1 ober DPRINTF(("received statistics without RSSI\n"));
1605 1.1 ober return;
1606 1.1 ober }
1607 1.1 ober
1608 1.1 ober if (calib->state == IWN_CALIB_STATE_ASSOC)
1609 1.1 ober iwn_compute_differential_gain(sc, &stats->rx.general);
1610 1.1 ober else if (calib->state == IWN_CALIB_STATE_RUN)
1611 1.1 ober iwn_tune_sensitivity(sc, &stats->rx);
1612 1.1 ober }
1613 1.1 ober
1614 1.1 ober static void
1615 1.1 ober iwn_tx_intr(struct iwn_softc *sc, struct iwn_rx_desc *desc)
1616 1.1 ober {
1617 1.1 ober struct ifnet *ifp = sc->sc_ic.ic_ifp;
1618 1.1 ober struct iwn_tx_ring *ring = &sc->txq[desc->qid & 0xf];
1619 1.1 ober struct iwn_tx_data *txdata = &ring->data[desc->idx];
1620 1.1 ober struct iwn_tx_stat *stat = (struct iwn_tx_stat *)(desc + 1);
1621 1.1 ober struct iwn_node *wn = (struct iwn_node *)txdata->ni;
1622 1.1 ober uint32_t status;
1623 1.1 ober
1624 1.1 ober DPRINTFN(4, ("tx done: qid=%d idx=%d retries=%d nkill=%d rate=%x "
1625 1.2 ober "duration=%d status=%x\n", desc->qid, desc->idx, stat->ntries,
1626 1.2 ober stat->nkill, stat->rate, le16toh(stat->duration),
1627 1.2 ober le32toh(stat->status)));
1628 1.1 ober
1629 1.1 ober /*
1630 1.1 ober * Update rate control statistics for the node.
1631 1.1 ober */
1632 1.1 ober wn->amn.amn_txcnt++;
1633 1.1 ober if (stat->ntries > 0) {
1634 1.1 ober DPRINTFN(3, ("tx intr ntries %d\n", stat->ntries));
1635 1.1 ober wn->amn.amn_retrycnt++;
1636 1.1 ober }
1637 1.1 ober
1638 1.1 ober status = le32toh(stat->status) & 0xff;
1639 1.1 ober if (status != 1 && status != 2)
1640 1.1 ober ifp->if_oerrors++;
1641 1.1 ober else
1642 1.1 ober ifp->if_opackets++;
1643 1.1 ober
1644 1.1 ober bus_dmamap_unload(sc->sc_dmat, txdata->map);
1645 1.1 ober m_freem(txdata->m);
1646 1.1 ober txdata->m = NULL;
1647 1.1 ober ieee80211_free_node(txdata->ni);
1648 1.1 ober txdata->ni = NULL;
1649 1.1 ober
1650 1.1 ober ring->queued--;
1651 1.1 ober
1652 1.1 ober sc->sc_tx_timer = 0;
1653 1.1 ober ifp->if_flags &= ~IFF_OACTIVE;
1654 1.1 ober iwn_start(ifp);
1655 1.1 ober }
1656 1.1 ober
1657 1.1 ober static void
1658 1.1 ober iwn_cmd_intr(struct iwn_softc *sc, struct iwn_rx_desc *desc)
1659 1.1 ober {
1660 1.1 ober struct iwn_tx_ring *ring = &sc->txq[4];
1661 1.1 ober struct iwn_tx_data *data;
1662 1.1 ober
1663 1.1 ober if ((desc->qid & 0xf) != 4)
1664 1.15 christos return; /* not a command ack */
1665 1.1 ober
1666 1.1 ober data = &ring->data[desc->idx];
1667 1.1 ober
1668 1.1 ober /* if the command was mapped in a mbuf, free it */
1669 1.1 ober if (data->m != NULL) {
1670 1.1 ober bus_dmamap_unload(sc->sc_dmat, data->map);
1671 1.1 ober m_freem(data->m);
1672 1.1 ober data->m = NULL;
1673 1.1 ober }
1674 1.1 ober
1675 1.1 ober wakeup(&ring->cmd[desc->idx]);
1676 1.1 ober }
1677 1.1 ober
1678 1.1 ober static void
1679 1.1 ober iwn_notif_intr(struct iwn_softc *sc)
1680 1.1 ober {
1681 1.1 ober struct ieee80211com *ic = &sc->sc_ic;
1682 1.1 ober struct ifnet *ifp = ic->ic_ifp;
1683 1.1 ober uint16_t hw;
1684 1.1 ober
1685 1.1 ober hw = le16toh(sc->shared->closed_count);
1686 1.1 ober while (sc->rxq.cur != hw) {
1687 1.1 ober struct iwn_rx_data *data = &sc->rxq.data[sc->rxq.cur];
1688 1.1 ober struct iwn_rx_desc *desc = (void *)data->m->m_ext.ext_buf;
1689 1.1 ober
1690 1.1 ober DPRINTFN(4,("rx notification qid=%x idx=%d flags=%x type=%d "
1691 1.2 ober "len=%d\n", desc->qid, desc->idx, desc->flags, desc->type,
1692 1.2 ober le32toh(desc->len)));
1693 1.1 ober
1694 1.1 ober if (!(desc->qid & 0x80)) /* reply to a command */
1695 1.1 ober iwn_cmd_intr(sc, desc);
1696 1.1 ober
1697 1.1 ober switch (desc->type) {
1698 1.1 ober case IWN_RX_DONE:
1699 1.1 ober case IWN_AMPDU_RX_DONE:
1700 1.1 ober iwn_rx_intr(sc, desc, data);
1701 1.1 ober break;
1702 1.1 ober
1703 1.1 ober case IWN_AMPDU_RX_START:
1704 1.1 ober iwn_ampdu_rx_start(sc, desc);
1705 1.1 ober break;
1706 1.1 ober
1707 1.1 ober case IWN_TX_DONE:
1708 1.1 ober /* a 802.11 frame has been transmitted */
1709 1.1 ober iwn_tx_intr(sc, desc);
1710 1.1 ober break;
1711 1.1 ober
1712 1.1 ober case IWN_RX_STATISTICS:
1713 1.1 ober case IWN_BEACON_STATISTICS:
1714 1.1 ober iwn_rx_statistics(sc, desc);
1715 1.1 ober break;
1716 1.1 ober
1717 1.1 ober case IWN_BEACON_MISSED:
1718 1.1 ober {
1719 1.1 ober struct iwn_beacon_missed *miss =
1720 1.1 ober (struct iwn_beacon_missed *)(desc + 1);
1721 1.1 ober /*
1722 1.1 ober * If more than 5 consecutive beacons are missed,
1723 1.1 ober * reinitialize the sensitivity state machine.
1724 1.1 ober */
1725 1.1 ober DPRINTFN(2, ("beacons missed %d/%d\n",
1726 1.2 ober le32toh(miss->consecutive), le32toh(miss->total)));
1727 1.1 ober if (ic->ic_state == IEEE80211_S_RUN &&
1728 1.1 ober le32toh(miss->consecutive) > 5)
1729 1.1 ober (void)iwn_init_sensitivity(sc);
1730 1.1 ober break;
1731 1.1 ober }
1732 1.1 ober
1733 1.1 ober case IWN_UC_READY:
1734 1.1 ober {
1735 1.1 ober struct iwn_ucode_info *uc =
1736 1.1 ober (struct iwn_ucode_info *)(desc + 1);
1737 1.1 ober
1738 1.1 ober /* the microcontroller is ready */
1739 1.1 ober DPRINTF(("microcode alive notification version=%d.%d "
1740 1.2 ober "subtype=%x alive=%x\n", uc->major, uc->minor,
1741 1.2 ober uc->subtype, le32toh(uc->valid)));
1742 1.1 ober
1743 1.1 ober if (le32toh(uc->valid) != 1) {
1744 1.1 ober aprint_error_dev(sc->sc_dev, "microcontroller initialization "
1745 1.1 ober "failed\n");
1746 1.1 ober break;
1747 1.1 ober }
1748 1.1 ober if (uc->subtype == IWN_UCODE_INIT) {
1749 1.1 ober /* save microcontroller's report */
1750 1.1 ober memcpy(&sc->ucode_info, uc, sizeof (*uc));
1751 1.1 ober }
1752 1.1 ober break;
1753 1.1 ober }
1754 1.1 ober case IWN_STATE_CHANGED:
1755 1.1 ober {
1756 1.1 ober uint32_t *status = (uint32_t *)(desc + 1);
1757 1.1 ober
1758 1.1 ober /* enabled/disabled notification */
1759 1.1 ober DPRINTF(("state changed to %x\n", le32toh(*status)));
1760 1.1 ober
1761 1.1 ober if (le32toh(*status) & 1) {
1762 1.1 ober /* the radio button has to be pushed */
1763 1.1 ober aprint_error_dev(sc->sc_dev, "Radio transmitter is off\n");
1764 1.1 ober /* turn the interface down */
1765 1.1 ober ifp->if_flags &= ~IFF_UP;
1766 1.1 ober iwn_stop(ifp, 1);
1767 1.15 christos return; /* no further processing */
1768 1.1 ober }
1769 1.1 ober break;
1770 1.1 ober }
1771 1.1 ober case IWN_START_SCAN:
1772 1.1 ober {
1773 1.1 ober struct iwn_start_scan *scan =
1774 1.1 ober (struct iwn_start_scan *)(desc + 1);
1775 1.1 ober
1776 1.1 ober DPRINTFN(2, ("scanning channel %d status %x\n",
1777 1.2 ober scan->chan, le32toh(scan->status)));
1778 1.1 ober
1779 1.1 ober /* fix current channel */
1780 1.1 ober ic->ic_bss->ni_chan = &ic->ic_channels[scan->chan];
1781 1.1 ober break;
1782 1.1 ober }
1783 1.1 ober case IWN_STOP_SCAN:
1784 1.1 ober {
1785 1.1 ober struct iwn_stop_scan *scan =
1786 1.1 ober (struct iwn_stop_scan *)(desc + 1);
1787 1.1 ober
1788 1.1 ober DPRINTF(("scan finished nchan=%d status=%d chan=%d\n",
1789 1.2 ober scan->nchan, scan->status, scan->chan));
1790 1.1 ober
1791 1.1 ober if (scan->status == 1 && scan->chan <= 14) {
1792 1.1 ober /*
1793 1.1 ober * We just finished scanning 802.11g channels,
1794 1.1 ober * start scanning 802.11a ones.
1795 1.1 ober */
1796 1.1 ober if (iwn_scan(sc, IEEE80211_CHAN_A) == 0)
1797 1.1 ober break;
1798 1.1 ober }
1799 1.1 ober sc->is_scanning = false;
1800 1.1 ober ieee80211_end_scan(ic);
1801 1.1 ober break;
1802 1.1 ober }
1803 1.1 ober }
1804 1.1 ober
1805 1.1 ober sc->rxq.cur = (sc->rxq.cur + 1) % IWN_RX_RING_COUNT;
1806 1.1 ober }
1807 1.1 ober
1808 1.1 ober /* tell the firmware what we have processed */
1809 1.1 ober hw = (hw == 0) ? IWN_RX_RING_COUNT - 1 : hw - 1;
1810 1.1 ober IWN_WRITE(sc, IWN_RX_WIDX, hw & ~7);
1811 1.1 ober }
1812 1.1 ober
1813 1.1 ober static int
1814 1.1 ober iwn_intr(void *arg)
1815 1.1 ober {
1816 1.1 ober struct iwn_softc *sc = arg;
1817 1.1 ober struct ifnet *ifp = sc->sc_ic.ic_ifp;
1818 1.1 ober uint32_t r1, r2;
1819 1.1 ober
1820 1.1 ober /* disable interrupts */
1821 1.1 ober IWN_WRITE(sc, IWN_MASK, 0);
1822 1.1 ober
1823 1.1 ober r1 = IWN_READ(sc, IWN_INTR);
1824 1.1 ober r2 = IWN_READ(sc, IWN_INTR_STATUS);
1825 1.1 ober
1826 1.1 ober if (r1 == 0 && r2 == 0) {
1827 1.1 ober if (ifp->if_flags & IFF_UP)
1828 1.1 ober IWN_WRITE(sc, IWN_MASK, IWN_INTR_MASK);
1829 1.1 ober return 0; /* not for us */
1830 1.1 ober }
1831 1.1 ober
1832 1.1 ober if (r1 == 0xffffffff)
1833 1.1 ober return 0; /* hardware gone */
1834 1.1 ober
1835 1.1 ober /* ack interrupts */
1836 1.1 ober IWN_WRITE(sc, IWN_INTR, r1);
1837 1.1 ober IWN_WRITE(sc, IWN_INTR_STATUS, r2);
1838 1.1 ober
1839 1.1 ober DPRINTFN(5, ("interrupt reg1=%x reg2=%x\n", r1, r2));
1840 1.1 ober
1841 1.1 ober if (r1 & IWN_RF_TOGGLED) {
1842 1.1 ober uint32_t tmp = IWN_READ(sc, IWN_GPIO_CTL);
1843 1.8 blymn aprint_error_dev(sc->sc_dev, "RF switch: radio %s\n",
1844 1.1 ober (tmp & IWN_GPIO_RF_ENABLED) ? "enabled" : "disabled");
1845 1.1 ober }
1846 1.1 ober if (r1 & IWN_CT_REACHED) {
1847 1.1 ober aprint_error_dev(sc->sc_dev, "critical temperature reached!\n");
1848 1.1 ober }
1849 1.1 ober if (r1 & (IWN_SW_ERROR | IWN_HW_ERROR)) {
1850 1.1 ober aprint_error_dev(sc->sc_dev, "fatal firmware error\n");
1851 1.1 ober sc->sc_ic.ic_ifp->if_flags &= ~IFF_UP;
1852 1.1 ober iwn_stop(sc->sc_ic.ic_ifp, 1);
1853 1.1 ober return 1;
1854 1.1 ober }
1855 1.1 ober
1856 1.1 ober if ((r1 & (IWN_RX_INTR | IWN_SW_RX_INTR)) ||
1857 1.1 ober (r2 & IWN_RX_STATUS_INTR))
1858 1.1 ober iwn_notif_intr(sc);
1859 1.1 ober
1860 1.1 ober if (r1 & IWN_ALIVE_INTR)
1861 1.1 ober wakeup(sc);
1862 1.1 ober
1863 1.1 ober /* re-enable interrupts */
1864 1.1 ober if (ifp->if_flags & IFF_UP)
1865 1.1 ober IWN_WRITE(sc, IWN_MASK, IWN_INTR_MASK);
1866 1.1 ober
1867 1.1 ober return 1;
1868 1.1 ober }
1869 1.1 ober
1870 1.1 ober static uint8_t
1871 1.1 ober iwn_plcp_signal(int rate)
1872 1.1 ober {
1873 1.1 ober switch (rate) {
1874 1.2 ober /* CCK rates (returned values are device-dependent) */
1875 1.1 ober case 2: return 10;
1876 1.1 ober case 4: return 20;
1877 1.1 ober case 11: return 55;
1878 1.1 ober case 22: return 110;
1879 1.1 ober
1880 1.2 ober /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */
1881 1.2 ober /* R1-R4, (u)ral is R4-R1 */
1882 1.1 ober case 12: return 0xd;
1883 1.1 ober case 18: return 0xf;
1884 1.1 ober case 24: return 0x5;
1885 1.1 ober case 36: return 0x7;
1886 1.1 ober case 48: return 0x9;
1887 1.1 ober case 72: return 0xb;
1888 1.1 ober case 96: return 0x1;
1889 1.1 ober case 108: return 0x3;
1890 1.1 ober case 120: return 0x3;
1891 1.1 ober }
1892 1.1 ober /* unknown rate (should not get there) */
1893 1.1 ober return 0;
1894 1.1 ober }
1895 1.1 ober
1896 1.1 ober /* determine if a given rate is CCK or OFDM */
1897 1.1 ober #define IWN_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22)
1898 1.1 ober
1899 1.1 ober static int
1900 1.1 ober iwn_tx_data(struct iwn_softc *sc, struct mbuf *m0, struct ieee80211_node *ni,
1901 1.1 ober int ac)
1902 1.1 ober {
1903 1.1 ober struct ieee80211com *ic = &sc->sc_ic;
1904 1.1 ober struct iwn_tx_ring *ring = &sc->txq[ac];
1905 1.1 ober struct iwn_tx_desc *desc;
1906 1.1 ober struct iwn_tx_data *data;
1907 1.1 ober struct iwn_tx_cmd *cmd;
1908 1.1 ober struct iwn_cmd_data *tx;
1909 1.1 ober struct ieee80211_frame *wh;
1910 1.1 ober struct ieee80211_key *k;
1911 1.1 ober const struct chanAccParams *cap;
1912 1.1 ober struct mbuf *mnew;
1913 1.1 ober bus_addr_t paddr;
1914 1.1 ober uint32_t flags;
1915 1.1 ober uint8_t type;
1916 1.1 ober int i, error, pad, rate, hdrlen, noack = 0;
1917 1.1 ober
1918 1.11 blymn DPRINTFN(5, ("iwn_tx_data entry\n"));
1919 1.11 blymn
1920 1.1 ober desc = &ring->desc[ring->cur];
1921 1.1 ober data = &ring->data[ring->cur];
1922 1.1 ober
1923 1.1 ober wh = mtod(m0, struct ieee80211_frame *);
1924 1.1 ober type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
1925 1.1 ober
1926 1.1 ober if (IEEE80211_QOS_HAS_SEQ(wh)) {
1927 1.1 ober hdrlen = sizeof (struct ieee80211_qosframe);
1928 1.1 ober cap = &ic->ic_wme.wme_chanParams;
1929 1.1 ober noack = cap->cap_wmeParams[ac].wmep_noackPolicy;
1930 1.1 ober } else
1931 1.1 ober hdrlen = sizeof (struct ieee80211_frame);
1932 1.1 ober
1933 1.1 ober if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1934 1.1 ober k = ieee80211_crypto_encap(ic, ni, m0);
1935 1.1 ober if (k == NULL) {
1936 1.1 ober m_freem(m0);
1937 1.1 ober return ENOBUFS;
1938 1.1 ober }
1939 1.1 ober /* packet header may have moved, reset our local pointer */
1940 1.1 ober wh = mtod(m0, struct ieee80211_frame *);
1941 1.1 ober }
1942 1.1 ober
1943 1.1 ober /* pickup a rate */
1944 1.11 blymn if (type == IEEE80211_FC0_TYPE_MGT) {
1945 1.1 ober /* mgmt frames are sent at the lowest available bit-rate */
1946 1.1 ober rate = ni->ni_rates.rs_rates[0];
1947 1.1 ober } else {
1948 1.2 ober if (ic->ic_fixed_rate != -1) {
1949 1.2 ober rate = ic->ic_sup_rates[ic->ic_curmode].
1950 1.2 ober rs_rates[ic->ic_fixed_rate];
1951 1.2 ober } else
1952 1.2 ober rate = ni->ni_rates.rs_rates[ni->ni_txrate];
1953 1.1 ober }
1954 1.1 ober rate &= IEEE80211_RATE_VAL;
1955 1.1 ober
1956 1.1 ober #if NBPFILTER > 0
1957 1.1 ober if (sc->sc_drvbpf != NULL) {
1958 1.1 ober struct iwn_tx_radiotap_header *tap = &sc->sc_txtap;
1959 1.1 ober
1960 1.1 ober tap->wt_flags = 0;
1961 1.1 ober tap->wt_chan_freq = htole16(ni->ni_chan->ic_freq);
1962 1.1 ober tap->wt_chan_flags = htole16(ni->ni_chan->ic_flags);
1963 1.1 ober tap->wt_rate = rate;
1964 1.1 ober tap->wt_hwqueue = ac;
1965 1.1 ober if (wh->i_fc[1] & IEEE80211_FC1_WEP)
1966 1.1 ober tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP;
1967 1.1 ober
1968 1.1 ober bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0);
1969 1.1 ober }
1970 1.1 ober #endif
1971 1.1 ober
1972 1.1 ober cmd = &ring->cmd[ring->cur];
1973 1.1 ober cmd->code = IWN_CMD_TX_DATA;
1974 1.1 ober cmd->flags = 0;
1975 1.1 ober cmd->qid = ring->qid;
1976 1.1 ober cmd->idx = ring->cur;
1977 1.8 blymn
1978 1.1 ober tx = (struct iwn_cmd_data *)cmd->data;
1979 1.8 blymn
1980 1.1 ober flags = IWN_TX_AUTO_SEQ;
1981 1.1 ober if (!noack && !IEEE80211_IS_MULTICAST(wh->i_addr1)){
1982 1.1 ober flags |= IWN_TX_NEED_ACK;
1983 1.1 ober }else if (m0->m_pkthdr.len + IEEE80211_CRC_LEN > ic->ic_rtsthreshold)
1984 1.9 blymn flags |= (IWN_TX_NEED_RTS | IWN_TX_FULL_TXOP);
1985 1.8 blymn
1986 1.1 ober tx->id = IEEE80211_IS_MULTICAST(wh->i_addr1) ? IWN_ID_BROADCAST : IWN_ID_BSS;
1987 1.1 ober
1988 1.11 blymn DPRINTFN(5, ("addr1: %x:%x:%x:%x:%x:%x, id = 0x%x\n",
1989 1.11 blymn wh->i_addr1[0], wh->i_addr1[1], wh->i_addr1[2],
1990 1.11 blymn wh->i_addr1[3], wh->i_addr1[4], wh->i_addr1[5], tx->id));
1991 1.11 blymn
1992 1.1 ober if (type == IEEE80211_FC0_TYPE_MGT) {
1993 1.1 ober uint8_t subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
1994 1.1 ober
1995 1.1 ober /* tell h/w to set timestamp in probe responses */
1996 1.11 blymn if ((subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP) ||
1997 1.11 blymn (subtype == IEEE80211_FC0_SUBTYPE_PROBE_REQ))
1998 1.1 ober flags |= IWN_TX_INSERT_TSTAMP;
1999 1.1 ober
2000 1.1 ober if (subtype == IEEE80211_FC0_SUBTYPE_ASSOC_REQ ||
2001 1.11 blymn subtype == IEEE80211_FC0_SUBTYPE_REASSOC_REQ) {
2002 1.11 blymn flags &= ~IWN_TX_NEED_RTS;
2003 1.11 blymn flags |= IWN_TX_NEED_CTS;
2004 1.1 ober tx->timeout = htole16(3);
2005 1.11 blymn } else
2006 1.1 ober tx->timeout = htole16(2);
2007 1.1 ober } else
2008 1.1 ober tx->timeout = htole16(0);
2009 1.8 blymn
2010 1.1 ober if (hdrlen & 3) {
2011 1.1 ober /* first segment's length must be a multiple of 4 */
2012 1.1 ober flags |= IWN_TX_NEED_PADDING;
2013 1.1 ober pad = 4 - (hdrlen & 3);
2014 1.1 ober } else
2015 1.1 ober pad = 0;
2016 1.1 ober
2017 1.11 blymn if (type == IEEE80211_FC0_TYPE_CTL) {
2018 1.11 blymn uint8_t subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
2019 1.11 blymn
2020 1.11 blymn /* tell h/w to set timestamp in probe responses */
2021 1.11 blymn if (subtype == 0x0080) /* linux says this is "back request" */
2022 1.11 blymn /* linux says (1 << 6) is IMM_BA_RSP_MASK */
2023 1.11 blymn flags |= (IWN_TX_NEED_ACK | (1 << 6));
2024 1.11 blymn }
2025 1.11 blymn
2026 1.11 blymn
2027 1.1 ober tx->flags = htole32(flags);
2028 1.1 ober tx->len = htole16(m0->m_pkthdr.len);
2029 1.1 ober tx->rate = iwn_plcp_signal(rate);
2030 1.1 ober tx->rts_ntries = 60;
2031 1.1 ober tx->data_ntries = 15;
2032 1.1 ober tx->lifetime = htole32(IWN_LIFETIME_INFINITE);
2033 1.1 ober
2034 1.1 ober /* XXX alternate between Ant A and Ant B ? */
2035 1.1 ober tx->rflags = IWN_RFLAG_ANT_B;
2036 1.1 ober if (tx->id == IWN_ID_BROADCAST) {
2037 1.1 ober tx->ridx = IWN_MAX_TX_RETRIES - 1;
2038 1.1 ober if (!IWN_RATE_IS_OFDM(rate))
2039 1.1 ober tx->rflags |= IWN_RFLAG_CCK;
2040 1.1 ober } else {
2041 1.1 ober tx->ridx = 0;
2042 1.1 ober /* tell adapter to ignore rflags */
2043 1.1 ober tx->flags |= htole32(IWN_TX_USE_NODE_RATE);
2044 1.1 ober }
2045 1.1 ober
2046 1.1 ober /* copy and trim IEEE802.11 header */
2047 1.1 ober memcpy((uint8_t *)(tx + 1), wh, hdrlen);
2048 1.1 ober m_adj(m0, hdrlen);
2049 1.1 ober
2050 1.1 ober error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0,
2051 1.1 ober BUS_DMA_WRITE | BUS_DMA_NOWAIT);
2052 1.1 ober if (error != 0 && error != EFBIG) {
2053 1.1 ober aprint_error_dev(sc->sc_dev, "could not map mbuf (error %d)\n", error);
2054 1.1 ober m_freem(m0);
2055 1.1 ober return error;
2056 1.1 ober }
2057 1.1 ober if (error != 0) {
2058 1.1 ober /* too many fragments, linearize */
2059 1.1 ober
2060 1.1 ober MGETHDR(mnew, M_DONTWAIT, MT_DATA);
2061 1.1 ober if (mnew == NULL) {
2062 1.1 ober m_freem(m0);
2063 1.1 ober return ENOMEM;
2064 1.1 ober }
2065 1.1 ober M_COPY_PKTHDR(mnew, m0);
2066 1.1 ober if (m0->m_pkthdr.len > MHLEN) {
2067 1.1 ober MCLGET(mnew, M_DONTWAIT);
2068 1.1 ober if (!(mnew->m_flags & M_EXT)) {
2069 1.1 ober m_freem(m0);
2070 1.1 ober m_freem(mnew);
2071 1.1 ober return ENOMEM;
2072 1.1 ober }
2073 1.1 ober }
2074 1.1 ober
2075 1.1 ober m_copydata(m0, 0, m0->m_pkthdr.len, mtod(mnew, void *));
2076 1.1 ober m_freem(m0);
2077 1.1 ober mnew->m_len = mnew->m_pkthdr.len;
2078 1.1 ober m0 = mnew;
2079 1.1 ober
2080 1.1 ober error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0,
2081 1.1 ober BUS_DMA_WRITE | BUS_DMA_NOWAIT);
2082 1.1 ober if (error != 0) {
2083 1.1 ober aprint_error_dev(sc->sc_dev, "could not map mbuf (error %d)\n", error);
2084 1.1 ober m_freem(m0);
2085 1.1 ober return error;
2086 1.1 ober }
2087 1.1 ober }
2088 1.1 ober
2089 1.1 ober data->m = m0;
2090 1.1 ober data->ni = ni;
2091 1.1 ober
2092 1.1 ober DPRINTFN(4, ("sending data: qid=%d idx=%d len=%d nsegs=%d\n",
2093 1.2 ober ring->qid, ring->cur, m0->m_pkthdr.len, data->map->dm_nsegs));
2094 1.1 ober
2095 1.1 ober paddr = ring->cmd_dma.paddr + ring->cur * sizeof (struct iwn_tx_cmd);
2096 1.1 ober tx->loaddr = htole32(paddr + 4 +
2097 1.1 ober offsetof(struct iwn_cmd_data, ntries));
2098 1.15 christos tx->hiaddr = 0; /* limit to 32-bit physical addresses */
2099 1.1 ober
2100 1.1 ober /* first scatter/gather segment is used by the tx data command */
2101 1.1 ober IWN_SET_DESC_NSEGS(desc, 1 + data->map->dm_nsegs);
2102 1.1 ober IWN_SET_DESC_SEG(desc, 0, paddr, 4 + sizeof (*tx) + hdrlen + pad);
2103 1.1 ober for (i = 1; i <= data->map->dm_nsegs; i++) {
2104 1.1 ober IWN_SET_DESC_SEG(desc, i, data->map->dm_segs[i - 1].ds_addr,
2105 1.2 ober data->map->dm_segs[i - 1].ds_len);
2106 1.1 ober }
2107 1.1 ober sc->shared->len[ring->qid][ring->cur] =
2108 1.1 ober htole16(hdrlen + m0->m_pkthdr.len + 8);
2109 1.1 ober if (ring->cur < IWN_TX_WINDOW) {
2110 1.1 ober sc->shared->len[ring->qid][ring->cur + IWN_TX_RING_COUNT] =
2111 1.1 ober htole16(hdrlen + m0->m_pkthdr.len + 8);
2112 1.1 ober }
2113 1.1 ober
2114 1.1 ober ring->queued++;
2115 1.1 ober
2116 1.1 ober /* kick ring */
2117 1.1 ober ring->cur = (ring->cur + 1) % IWN_TX_RING_COUNT;
2118 1.1 ober IWN_WRITE(sc, IWN_TX_WIDX, ring->qid << 8 | ring->cur);
2119 1.1 ober
2120 1.1 ober return 0;
2121 1.1 ober }
2122 1.1 ober
2123 1.1 ober static void
2124 1.1 ober iwn_start(struct ifnet *ifp)
2125 1.1 ober {
2126 1.1 ober struct iwn_softc *sc = ifp->if_softc;
2127 1.1 ober struct ieee80211com *ic = &sc->sc_ic;
2128 1.1 ober struct ieee80211_node *ni;
2129 1.1 ober struct ether_header *eh;
2130 1.1 ober struct mbuf *m0;
2131 1.1 ober int ac;
2132 1.1 ober
2133 1.11 blymn DPRINTFN(5, ("iwn_start enter\n"));
2134 1.11 blymn
2135 1.1 ober /*
2136 1.1 ober * net80211 may still try to send management frames even if the
2137 1.1 ober * IFF_RUNNING flag is not set...
2138 1.1 ober */
2139 1.1 ober if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING)
2140 1.1 ober return;
2141 1.1 ober
2142 1.1 ober for (;;) {
2143 1.1 ober IF_DEQUEUE(&ic->ic_mgtq, m0);
2144 1.1 ober if (m0 != NULL) {
2145 1.1 ober /* management frames go into ring 0 */
2146 1.8 blymn
2147 1.1 ober
2148 1.1 ober ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif;
2149 1.1 ober m0->m_pkthdr.rcvif = NULL;
2150 1.1 ober
2151 1.1 ober /* management goes into ring 0 */
2152 1.1 ober if (sc->txq[0].queued > sc->txq[0].count - 8) {
2153 1.2 ober ifp->if_oerrors++;
2154 1.2 ober continue;
2155 1.1 ober }
2156 1.1 ober
2157 1.1 ober #if NBPFILTER > 0
2158 1.1 ober if (ic->ic_rawbpf != NULL)
2159 1.1 ober bpf_mtap(ic->ic_rawbpf, m0);
2160 1.1 ober #endif
2161 1.1 ober if (iwn_tx_data(sc, m0, ni, 0) != 0) {
2162 1.2 ober ifp->if_oerrors++;
2163 1.2 ober break;
2164 1.1 ober }
2165 1.1 ober } else {
2166 1.1 ober if (ic->ic_state != IEEE80211_S_RUN)
2167 1.1 ober break;
2168 1.1 ober IFQ_POLL(&ifp->if_snd, m0);
2169 1.1 ober if (m0 == NULL)
2170 1.1 ober break;
2171 1.8 blymn
2172 1.1 ober if (m0->m_len < sizeof (*eh) &&
2173 1.10 degroote (m0 = m_pullup(m0, sizeof (*eh))) == NULL) {
2174 1.2 ober ifp->if_oerrors++;
2175 1.2 ober continue;
2176 1.1 ober }
2177 1.1 ober eh = mtod(m0, struct ether_header *);
2178 1.1 ober ni = ieee80211_find_txnode(ic, eh->ether_dhost);
2179 1.1 ober if (ni == NULL) {
2180 1.1 ober m_freem(m0);
2181 1.1 ober ifp->if_oerrors++;
2182 1.1 ober continue;
2183 1.1 ober }
2184 1.1 ober /* classify mbuf so we can find which tx ring to use */
2185 1.1 ober if (ieee80211_classify(ic, m0, ni) != 0) {
2186 1.1 ober m_freem(m0);
2187 1.1 ober ieee80211_free_node(ni);
2188 1.1 ober ifp->if_oerrors++;
2189 1.1 ober continue;
2190 1.1 ober }
2191 1.8 blymn
2192 1.1 ober /* no QoS encapsulation for EAPOL frames */
2193 1.1 ober ac = (eh->ether_type != htons(ETHERTYPE_PAE)) ?
2194 1.2 ober M_WME_GETAC(m0) : WME_AC_BE;
2195 1.8 blymn
2196 1.1 ober if (sc->txq[ac].queued > sc->txq[ac].count - 8) {
2197 1.8 blymn
2198 1.1 ober /* there is no place left in this ring */
2199 1.1 ober ifp->if_flags |= IFF_OACTIVE;
2200 1.2 ober break;
2201 1.1 ober }
2202 1.1 ober IFQ_DEQUEUE(&ifp->if_snd, m0);
2203 1.1 ober #if NBPFILTER > 0
2204 1.1 ober if (ifp->if_bpf != NULL)
2205 1.1 ober bpf_mtap(ifp->if_bpf, m0);
2206 1.1 ober #endif
2207 1.1 ober m0 = ieee80211_encap(ic, m0, ni);
2208 1.1 ober if (m0 == NULL) {
2209 1.1 ober ieee80211_free_node(ni);
2210 1.1 ober ifp->if_oerrors++;
2211 1.1 ober continue;
2212 1.1 ober }
2213 1.1 ober #if NBPFILTER > 0
2214 1.1 ober if (ic->ic_rawbpf != NULL)
2215 1.1 ober bpf_mtap(ic->ic_rawbpf, m0);
2216 1.1 ober #endif
2217 1.1 ober if (iwn_tx_data(sc, m0, ni, ac) != 0) {
2218 1.1 ober ieee80211_free_node(ni);
2219 1.1 ober ifp->if_oerrors++;
2220 1.1 ober break;
2221 1.1 ober }
2222 1.1 ober }
2223 1.1 ober
2224 1.1 ober sc->sc_tx_timer = 5;
2225 1.1 ober ifp->if_timer = 1;
2226 1.1 ober }
2227 1.1 ober }
2228 1.1 ober
2229 1.1 ober static void
2230 1.1 ober iwn_watchdog(struct ifnet *ifp)
2231 1.1 ober {
2232 1.1 ober struct iwn_softc *sc = ifp->if_softc;
2233 1.1 ober
2234 1.1 ober ifp->if_timer = 0;
2235 1.1 ober
2236 1.1 ober if (sc->sc_tx_timer > 0) {
2237 1.1 ober if (--sc->sc_tx_timer == 0) {
2238 1.8 blymn aprint_error_dev(sc->sc_dev, "device timeout\n");
2239 1.1 ober ifp->if_flags &= ~IFF_UP;
2240 1.1 ober iwn_stop(ifp, 1);
2241 1.1 ober ifp->if_oerrors++;
2242 1.1 ober return;
2243 1.1 ober }
2244 1.1 ober ifp->if_timer = 1;
2245 1.1 ober }
2246 1.1 ober
2247 1.1 ober ieee80211_watchdog(&sc->sc_ic);
2248 1.1 ober }
2249 1.1 ober
2250 1.1 ober static int
2251 1.1 ober iwn_ioctl(struct ifnet *ifp, u_long cmd, void * data)
2252 1.1 ober {
2253 1.1 ober
2254 1.2 ober #define IS_RUNNING(ifp) \
2255 1.1 ober ((ifp->if_flags & IFF_UP) && (ifp->if_flags & IFF_RUNNING))
2256 1.8 blymn
2257 1.1 ober struct iwn_softc *sc = ifp->if_softc;
2258 1.1 ober struct ieee80211com *ic = &sc->sc_ic;
2259 1.1 ober int s, error = 0;
2260 1.1 ober
2261 1.1 ober s = splnet();
2262 1.1 ober
2263 1.1 ober switch (cmd) {
2264 1.1 ober case SIOCSIFFLAGS:
2265 1.1 ober if (ifp->if_flags & IFF_UP) {
2266 1.1 ober if (!(ifp->if_flags & IFF_RUNNING))
2267 1.1 ober iwn_init(ifp);
2268 1.1 ober } else {
2269 1.1 ober if (ifp->if_flags & IFF_RUNNING)
2270 1.1 ober iwn_stop(ifp, 1);
2271 1.1 ober }
2272 1.1 ober break;
2273 1.1 ober
2274 1.1 ober case SIOCADDMULTI:
2275 1.1 ober case SIOCDELMULTI:
2276 1.1 ober /* XXX no h/w multicast filter? --dyoung */
2277 1.1 ober if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) {
2278 1.1 ober /* setup multicast filter, etc */
2279 1.1 ober error = 0;
2280 1.1 ober }
2281 1.1 ober break;
2282 1.1 ober
2283 1.1 ober default:
2284 1.1 ober error = ieee80211_ioctl(ic, cmd, data);
2285 1.1 ober }
2286 1.1 ober
2287 1.1 ober if (error == ENETRESET) {
2288 1.8 blymn if (IS_RUNNING(ifp) &&
2289 1.1 ober (ic->ic_roaming != IEEE80211_ROAMING_MANUAL))
2290 1.1 ober iwn_init(ifp);
2291 1.1 ober error = 0;
2292 1.1 ober }
2293 1.1 ober
2294 1.1 ober splx(s);
2295 1.1 ober return error;
2296 1.1 ober
2297 1.1 ober #undef IS_RUNNING
2298 1.1 ober }
2299 1.1 ober
2300 1.1 ober static void
2301 1.1 ober iwn_read_eeprom(struct iwn_softc *sc)
2302 1.1 ober {
2303 1.1 ober struct ieee80211com *ic = &sc->sc_ic;
2304 1.1 ober char domain[4];
2305 1.1 ober uint16_t val;
2306 1.1 ober int i, error;
2307 1.1 ober
2308 1.1 ober if ((error = iwn_eeprom_lock(sc)) != 0) {
2309 1.1 ober aprint_error_dev(sc->sc_dev, "could not lock EEPROM (error=%d)\n", error);
2310 1.1 ober return;
2311 1.1 ober }
2312 1.1 ober /* read and print regulatory domain */
2313 1.1 ober iwn_read_prom_data(sc, IWN_EEPROM_DOMAIN, domain, 4);
2314 1.1 ober aprint_error_dev(sc->sc_dev, "%.4s", domain);
2315 1.1 ober
2316 1.1 ober /* read and print MAC address */
2317 1.1 ober iwn_read_prom_data(sc, IWN_EEPROM_MAC, ic->ic_myaddr, 6);
2318 1.1 ober aprint_error(", address %s\n", ether_sprintf(ic->ic_myaddr));
2319 1.1 ober
2320 1.1 ober /* read the list of authorized channels */
2321 1.1 ober for (i = 0; i < IWN_CHAN_BANDS_COUNT; i++)
2322 1.1 ober iwn_read_eeprom_channels(sc, i);
2323 1.1 ober
2324 1.1 ober /* read maximum allowed Tx power for 2GHz and 5GHz bands */
2325 1.1 ober iwn_read_prom_data(sc, IWN_EEPROM_MAXPOW, &val, 2);
2326 1.1 ober sc->maxpwr2GHz = val & 0xff;
2327 1.1 ober sc->maxpwr5GHz = val >> 8;
2328 1.1 ober /* check that EEPROM values are correct */
2329 1.1 ober if (sc->maxpwr5GHz < 20 || sc->maxpwr5GHz > 50)
2330 1.1 ober sc->maxpwr5GHz = 38;
2331 1.1 ober if (sc->maxpwr2GHz < 20 || sc->maxpwr2GHz > 50)
2332 1.1 ober sc->maxpwr2GHz = 38;
2333 1.1 ober DPRINTF(("maxpwr 2GHz=%d 5GHz=%d\n", sc->maxpwr2GHz, sc->maxpwr5GHz));
2334 1.1 ober
2335 1.1 ober /* read voltage at which samples were taken */
2336 1.1 ober iwn_read_prom_data(sc, IWN_EEPROM_VOLTAGE, &val, 2);
2337 1.1 ober sc->eeprom_voltage = (int16_t)le16toh(val);
2338 1.1 ober DPRINTF(("voltage=%d (in 0.3V)\n", sc->eeprom_voltage));
2339 1.1 ober
2340 1.1 ober /* read power groups */
2341 1.1 ober iwn_read_prom_data(sc, IWN_EEPROM_BANDS, sc->bands, sizeof sc->bands);
2342 1.1 ober #ifdef IWN_DEBUG
2343 1.1 ober if (iwn_debug > 0) {
2344 1.1 ober for (i = 0; i < IWN_NBANDS; i++)
2345 1.1 ober iwn_print_power_group(sc, i);
2346 1.1 ober }
2347 1.1 ober #endif
2348 1.1 ober iwn_eeprom_unlock(sc);
2349 1.1 ober }
2350 1.1 ober
2351 1.1 ober static void
2352 1.1 ober iwn_read_eeprom_channels(struct iwn_softc *sc, int n)
2353 1.1 ober {
2354 1.1 ober struct ieee80211com *ic = &sc->sc_ic;
2355 1.1 ober const struct iwn_chan_band *band = &iwn_bands[n];
2356 1.1 ober struct iwn_eeprom_chan channels[IWN_MAX_CHAN_PER_BAND];
2357 1.1 ober int chan, i;
2358 1.1 ober
2359 1.1 ober iwn_read_prom_data(sc, band->addr, channels,
2360 1.1 ober band->nchan * sizeof (struct iwn_eeprom_chan));
2361 1.1 ober
2362 1.1 ober for (i = 0; i < band->nchan; i++) {
2363 1.1 ober if (!(channels[i].flags & IWN_EEPROM_CHAN_VALID))
2364 1.1 ober continue;
2365 1.1 ober
2366 1.1 ober chan = band->chan[i];
2367 1.1 ober
2368 1.1 ober if (n == 0) { /* 2GHz band */
2369 1.1 ober ic->ic_channels[chan].ic_freq =
2370 1.1 ober ieee80211_ieee2mhz(chan, IEEE80211_CHAN_2GHZ);
2371 1.1 ober ic->ic_channels[chan].ic_flags =
2372 1.1 ober IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM |
2373 1.1 ober IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ;
2374 1.1 ober
2375 1.1 ober } else { /* 5GHz band */
2376 1.1 ober /*
2377 1.1 ober * Some adapters support channels 7, 8, 11 and 12
2378 1.1 ober * both in the 2GHz *and* 5GHz bands.
2379 1.1 ober * Because of limitations in our net80211(9) stack,
2380 1.1 ober * we can't support these channels in 5GHz band.
2381 1.1 ober */
2382 1.1 ober if (chan <= 14)
2383 1.1 ober continue;
2384 1.1 ober
2385 1.1 ober ic->ic_channels[chan].ic_freq =
2386 1.1 ober ieee80211_ieee2mhz(chan, IEEE80211_CHAN_5GHZ);
2387 1.1 ober ic->ic_channels[chan].ic_flags = IEEE80211_CHAN_A;
2388 1.1 ober }
2389 1.1 ober
2390 1.1 ober /* is active scan allowed on this channel? */
2391 1.1 ober if (!(channels[i].flags & IWN_EEPROM_CHAN_ACTIVE)) {
2392 1.1 ober ic->ic_channels[chan].ic_flags |=
2393 1.1 ober IEEE80211_CHAN_PASSIVE;
2394 1.1 ober }
2395 1.1 ober
2396 1.1 ober /* save maximum allowed power for this channel */
2397 1.1 ober sc->maxpwr[chan] = channels[i].maxpwr;
2398 1.1 ober
2399 1.1 ober DPRINTF(("adding chan %d flags=0x%x maxpwr=%d\n",
2400 1.2 ober chan, channels[i].flags, sc->maxpwr[chan]));
2401 1.1 ober }
2402 1.1 ober }
2403 1.1 ober
2404 1.1 ober #ifdef IWN_DEBUG
2405 1.1 ober static void
2406 1.1 ober iwn_print_power_group(struct iwn_softc *sc, int i)
2407 1.1 ober {
2408 1.1 ober struct iwn_eeprom_band *band = &sc->bands[i];
2409 1.1 ober struct iwn_eeprom_chan_samples *chans = band->chans;
2410 1.1 ober int j, c;
2411 1.1 ober
2412 1.1 ober DPRINTF(("===band %d===\n", i));
2413 1.1 ober DPRINTF(("chan lo=%d, chan hi=%d\n", band->lo, band->hi));
2414 1.1 ober DPRINTF(("chan1 num=%d\n", chans[0].num));
2415 1.1 ober for (c = 0; c < IWN_NTXCHAINS; c++) {
2416 1.1 ober for (j = 0; j < IWN_NSAMPLES; j++) {
2417 1.1 ober DPRINTF(("chain %d, sample %d: temp=%d gain=%d "
2418 1.2 ober "power=%d pa_det=%d\n", c, j,
2419 1.2 ober chans[0].samples[c][j].temp,
2420 1.2 ober chans[0].samples[c][j].gain,
2421 1.2 ober chans[0].samples[c][j].power,
2422 1.2 ober chans[0].samples[c][j].pa_det));
2423 1.1 ober }
2424 1.1 ober }
2425 1.1 ober DPRINTF(("chan2 num=%d\n", chans[1].num));
2426 1.1 ober for (c = 0; c < IWN_NTXCHAINS; c++) {
2427 1.1 ober for (j = 0; j < IWN_NSAMPLES; j++) {
2428 1.1 ober DPRINTF(("chain %d, sample %d: temp=%d gain=%d "
2429 1.2 ober "power=%d pa_det=%d\n", c, j,
2430 1.2 ober chans[1].samples[c][j].temp,
2431 1.2 ober chans[1].samples[c][j].gain,
2432 1.2 ober chans[1].samples[c][j].power,
2433 1.2 ober chans[1].samples[c][j].pa_det));
2434 1.1 ober }
2435 1.1 ober }
2436 1.1 ober }
2437 1.1 ober #endif
2438 1.1 ober
2439 1.1 ober /*
2440 1.1 ober * Send a command to the firmware.
2441 1.1 ober */
2442 1.1 ober static int
2443 1.1 ober iwn_cmd(struct iwn_softc *sc, int code, const void *buf, int size, int async)
2444 1.1 ober {
2445 1.1 ober struct iwn_tx_ring *ring = &sc->txq[4];
2446 1.1 ober struct iwn_tx_desc *desc;
2447 1.1 ober struct iwn_tx_cmd *cmd;
2448 1.1 ober bus_addr_t paddr;
2449 1.1 ober
2450 1.1 ober KASSERT(size <= sizeof cmd->data);
2451 1.1 ober
2452 1.1 ober desc = &ring->desc[ring->cur];
2453 1.1 ober cmd = &ring->cmd[ring->cur];
2454 1.1 ober
2455 1.1 ober cmd->code = code;
2456 1.1 ober cmd->flags = 0;
2457 1.1 ober cmd->qid = ring->qid;
2458 1.1 ober cmd->idx = ring->cur;
2459 1.1 ober memcpy(cmd->data, buf, size);
2460 1.1 ober
2461 1.1 ober paddr = ring->cmd_dma.paddr + ring->cur * sizeof (struct iwn_tx_cmd);
2462 1.1 ober
2463 1.1 ober IWN_SET_DESC_NSEGS(desc, 1);
2464 1.1 ober IWN_SET_DESC_SEG(desc, 0, paddr, 4 + size);
2465 1.1 ober sc->shared->len[ring->qid][ring->cur] = htole16(8);
2466 1.1 ober if (ring->cur < IWN_TX_WINDOW) {
2467 1.1 ober sc->shared->len[ring->qid][ring->cur + IWN_TX_RING_COUNT] =
2468 1.1 ober htole16(8);
2469 1.1 ober }
2470 1.1 ober
2471 1.1 ober /* kick cmd ring */
2472 1.1 ober ring->cur = (ring->cur + 1) % IWN_TX_RING_COUNT;
2473 1.1 ober IWN_WRITE(sc, IWN_TX_WIDX, ring->qid << 8 | ring->cur);
2474 1.1 ober
2475 1.1 ober return async ? 0 : tsleep(cmd, PCATCH, "iwncmd", hz);
2476 1.1 ober }
2477 1.1 ober
2478 1.1 ober /*
2479 1.1 ober * Configure hardware multi-rate retries for one node.
2480 1.1 ober */
2481 1.1 ober static int
2482 1.1 ober iwn_setup_node_mrr(struct iwn_softc *sc, uint8_t id, int async)
2483 1.1 ober {
2484 1.1 ober struct ieee80211com *ic = &sc->sc_ic;
2485 1.1 ober struct iwn_cmd_mrr mrr;
2486 1.1 ober int i, ridx;
2487 1.1 ober
2488 1.1 ober memset(&mrr, 0, sizeof mrr);
2489 1.1 ober mrr.id = id;
2490 1.1 ober mrr.ssmask = 2;
2491 1.1 ober mrr.dsmask = 3;
2492 1.1 ober mrr.ampdu_disable = 3;
2493 1.12 christos mrr.ampdu_limit = htole16(4000);
2494 1.1 ober
2495 1.1 ober if (id == IWN_ID_BSS)
2496 1.1 ober ridx = IWN_OFDM54;
2497 1.1 ober else if (ic->ic_curmode == IEEE80211_MODE_11A)
2498 1.1 ober ridx = IWN_OFDM6;
2499 1.1 ober else
2500 1.1 ober ridx = IWN_CCK1;
2501 1.1 ober for (i = 0; i < IWN_MAX_TX_RETRIES; i++) {
2502 1.1 ober mrr.table[i].rate = iwn_ridx_to_plcp[ridx];
2503 1.1 ober mrr.table[i].rflags = IWN_RFLAG_ANT_B;
2504 1.1 ober if (ridx <= IWN_CCK11)
2505 1.1 ober mrr.table[i].rflags |= IWN_RFLAG_CCK;
2506 1.1 ober ridx = iwn_prev_ridx[ridx];
2507 1.1 ober }
2508 1.1 ober return iwn_cmd(sc, IWN_CMD_NODE_MRR_SETUP, &mrr, sizeof mrr, async);
2509 1.1 ober }
2510 1.1 ober
2511 1.1 ober static int
2512 1.1 ober iwn_wme_update(struct ieee80211com *ic)
2513 1.1 ober {
2514 1.1 ober #define IWN_EXP2(v) htole16((1 << (v)) - 1)
2515 1.1 ober #define IWN_USEC(v) htole16(IEEE80211_TXOP_TO_US(v))
2516 1.1 ober struct iwn_softc *sc = ic->ic_ifp->if_softc;
2517 1.1 ober const struct wmeParams *wmep;
2518 1.1 ober struct iwn_wme_setup wme;
2519 1.1 ober int ac;
2520 1.1 ober
2521 1.1 ober /* don't override default WME values if WME is not actually enabled */
2522 1.1 ober if (!(ic->ic_flags & IEEE80211_F_WME))
2523 1.1 ober return 0;
2524 1.1 ober
2525 1.1 ober wme.flags = 0;
2526 1.1 ober for (ac = 0; ac < WME_NUM_AC; ac++) {
2527 1.1 ober wmep = &ic->ic_wme.wme_chanParams.cap_wmeParams[ac];
2528 1.1 ober wme.ac[ac].aifsn = wmep->wmep_aifsn;
2529 1.1 ober wme.ac[ac].cwmin = IWN_EXP2(wmep->wmep_logcwmin);
2530 1.1 ober wme.ac[ac].cwmax = IWN_EXP2(wmep->wmep_logcwmax);
2531 1.15 christos wme.ac[ac].txop = IWN_USEC(wmep->wmep_txopLimit);
2532 1.1 ober
2533 1.1 ober DPRINTF(("setting WME for queue %d aifsn=%d cwmin=%d cwmax=%d "
2534 1.2 ober "txop=%d\n", ac, wme.ac[ac].aifsn, wme.ac[ac].cwmin,
2535 1.2 ober wme.ac[ac].cwmax, wme.ac[ac].txop));
2536 1.1 ober }
2537 1.1 ober
2538 1.1 ober return iwn_cmd(sc, IWN_CMD_SET_WME, &wme, sizeof wme, 1);
2539 1.1 ober #undef IWN_USEC
2540 1.1 ober #undef IWN_EXP2
2541 1.1 ober }
2542 1.1 ober
2543 1.1 ober
2544 1.1 ober
2545 1.1 ober static void
2546 1.1 ober iwn_set_led(struct iwn_softc *sc, uint8_t which, uint8_t off, uint8_t on)
2547 1.1 ober {
2548 1.1 ober struct iwn_cmd_led led;
2549 1.1 ober
2550 1.1 ober led.which = which;
2551 1.1 ober led.unit = htole32(100000); /* on/off in unit of 100ms */
2552 1.1 ober led.off = off;
2553 1.1 ober led.on = on;
2554 1.1 ober
2555 1.1 ober (void)iwn_cmd(sc, IWN_CMD_SET_LED, &led, sizeof led, 1);
2556 1.1 ober }
2557 1.1 ober
2558 1.1 ober /*
2559 1.1 ober * Set the critical temperature at which the firmware will automatically stop
2560 1.1 ober * the radio transmitter.
2561 1.1 ober */
2562 1.1 ober static int
2563 1.1 ober iwn_set_critical_temp(struct iwn_softc *sc)
2564 1.1 ober {
2565 1.1 ober struct iwn_ucode_info *uc = &sc->ucode_info;
2566 1.1 ober struct iwn_critical_temp crit;
2567 1.1 ober uint32_t r1, r2, r3, temp;
2568 1.1 ober
2569 1.1 ober IWN_WRITE(sc, IWN_UCODE_CLR, IWN_CTEMP_STOP_RF);
2570 1.1 ober
2571 1.1 ober r1 = le32toh(uc->temp[0].chan20MHz);
2572 1.1 ober r2 = le32toh(uc->temp[1].chan20MHz);
2573 1.1 ober r3 = le32toh(uc->temp[2].chan20MHz);
2574 1.1 ober /* inverse function of iwn_get_temperature() */
2575 1.1 ober
2576 1.1 ober temp = r2 + ((IWN_CTOK(110) * (r3 - r1)) / 259);
2577 1.1 ober
2578 1.1 ober memset(&crit, 0, sizeof crit);
2579 1.1 ober crit.tempR = htole32(temp);
2580 1.1 ober DPRINTF(("setting critical temperature to %u\n", temp));
2581 1.1 ober return iwn_cmd(sc, IWN_CMD_SET_CRITICAL_TEMP, &crit, sizeof crit, 0);
2582 1.1 ober }
2583 1.1 ober
2584 1.1 ober static void
2585 1.1 ober iwn_enable_tsf(struct iwn_softc *sc, struct ieee80211_node *ni)
2586 1.1 ober {
2587 1.1 ober struct iwn_cmd_tsf tsf;
2588 1.1 ober uint64_t val, mod;
2589 1.1 ober
2590 1.1 ober memset(&tsf, 0, sizeof tsf);
2591 1.1 ober memcpy(&tsf.tstamp, ni->ni_tstamp.data, 8);
2592 1.1 ober tsf.bintval = htole16(ni->ni_intval);
2593 1.1 ober tsf.lintval = htole16(10);
2594 1.1 ober
2595 1.1 ober /* compute remaining time until next beacon */
2596 1.1 ober val = (uint64_t)ni->ni_intval * 1024; /* msecs -> usecs */
2597 1.1 ober mod = le64toh(tsf.tstamp) % val;
2598 1.1 ober tsf.binitval = htole32((uint32_t)(val - mod));
2599 1.1 ober
2600 1.4 skrll DPRINTF(("TSF bintval=%u tstamp=%" PRIu64 ", init=%" PRIu64 "\n",
2601 1.4 skrll ni->ni_intval, le64toh(tsf.tstamp), val - mod));
2602 1.1 ober
2603 1.1 ober if (iwn_cmd(sc, IWN_CMD_TSF, &tsf, sizeof tsf, 1) != 0)
2604 1.1 ober aprint_error_dev(sc->sc_dev, "could not enable TSF\n");
2605 1.1 ober }
2606 1.1 ober
2607 1.1 ober static void
2608 1.1 ober iwn_power_calibration(struct iwn_softc *sc, int temp)
2609 1.1 ober {
2610 1.1 ober struct ieee80211com *ic = &sc->sc_ic;
2611 1.1 ober
2612 1.1 ober DPRINTF(("temperature %d->%d\n", sc->temp, temp));
2613 1.1 ober
2614 1.1 ober /* adjust Tx power if need be (delta >= 3C) */
2615 1.1 ober if (abs(temp - sc->temp) < 3)
2616 1.1 ober return;
2617 1.1 ober
2618 1.1 ober sc->temp = temp;
2619 1.1 ober
2620 1.1 ober DPRINTF(("setting Tx power for channel %d\n",
2621 1.2 ober ieee80211_chan2ieee(ic, ic->ic_bss->ni_chan)));
2622 1.1 ober if (iwn_set_txpower(sc, ic->ic_bss->ni_chan, 1) != 0) {
2623 1.1 ober /* just warn, too bad for the automatic calibration... */
2624 1.1 ober aprint_error_dev(sc->sc_dev, "could not adjust Tx power\n");
2625 1.1 ober }
2626 1.1 ober }
2627 1.1 ober
2628 1.1 ober /*
2629 1.1 ober * Set Tx power for a given channel (each rate has its own power settings).
2630 1.1 ober * This function takes into account the regulatory information from EEPROM,
2631 1.1 ober * the current temperature and the current voltage.
2632 1.1 ober */
2633 1.1 ober static int
2634 1.1 ober iwn_set_txpower(struct iwn_softc *sc, struct ieee80211_channel *ch, int async)
2635 1.1 ober {
2636 1.1 ober /* fixed-point arithmetic division using a n-bit fractional part */
2637 1.2 ober #define fdivround(a, b, n) \
2638 1.1 ober ((((1 << n) * (a)) / (b) + (1 << n) / 2) / (1 << n))
2639 1.1 ober /* linear interpolation */
2640 1.2 ober #define interpolate(x, x1, y1, x2, y2, n) \
2641 1.1 ober ((y1) + fdivround(((int)(x) - (x1)) * ((y2) - (y1)), (x2) - (x1), n))
2642 1.1 ober
2643 1.1 ober static const int tdiv[IWN_NATTEN_GROUPS] = { 9, 8, 8, 8, 6 };
2644 1.1 ober struct ieee80211com *ic = &sc->sc_ic;
2645 1.1 ober struct iwn_ucode_info *uc = &sc->ucode_info;
2646 1.1 ober struct iwn_cmd_txpower cmd;
2647 1.1 ober struct iwn_eeprom_chan_samples *chans;
2648 1.1 ober const uint8_t *rf_gain, *dsp_gain;
2649 1.1 ober int32_t vdiff, tdiff;
2650 1.1 ober int i, c, grp, maxpwr;
2651 1.1 ober u_int chan;
2652 1.1 ober
2653 1.1 ober /* get channel number */
2654 1.1 ober chan = ieee80211_chan2ieee(ic, ch);
2655 1.1 ober
2656 1.1 ober memset(&cmd, 0, sizeof cmd);
2657 1.1 ober cmd.band = IEEE80211_IS_CHAN_5GHZ(ch) ? 0 : 1;
2658 1.1 ober cmd.chan = chan;
2659 1.1 ober
2660 1.1 ober if (IEEE80211_IS_CHAN_5GHZ(ch)) {
2661 1.15 christos maxpwr = sc->maxpwr5GHz;
2662 1.15 christos rf_gain = iwn_rf_gain_5ghz;
2663 1.1 ober dsp_gain = iwn_dsp_gain_5ghz;
2664 1.1 ober } else {
2665 1.15 christos maxpwr = sc->maxpwr2GHz;
2666 1.15 christos rf_gain = iwn_rf_gain_2ghz;
2667 1.1 ober dsp_gain = iwn_dsp_gain_2ghz;
2668 1.1 ober }
2669 1.1 ober
2670 1.1 ober /* compute voltage compensation */
2671 1.1 ober vdiff = ((int32_t)le32toh(uc->volt) - sc->eeprom_voltage) / 7;
2672 1.1 ober if (vdiff > 0)
2673 1.1 ober vdiff *= 2;
2674 1.1 ober if (abs(vdiff) > 2)
2675 1.1 ober vdiff = 0;
2676 1.1 ober DPRINTF(("voltage compensation=%d (UCODE=%d, EEPROM=%d)\n",
2677 1.2 ober vdiff, le32toh(uc->volt), sc->eeprom_voltage));
2678 1.1 ober
2679 1.1 ober /* get channel's attenuation group */
2680 1.1 ober if (chan <= 20) /* 1-20 */
2681 1.1 ober grp = 4;
2682 1.1 ober else if (chan <= 43) /* 34-43 */
2683 1.1 ober grp = 0;
2684 1.1 ober else if (chan <= 70) /* 44-70 */
2685 1.1 ober grp = 1;
2686 1.1 ober else if (chan <= 124) /* 71-124 */
2687 1.1 ober grp = 2;
2688 1.1 ober else /* 125-200 */
2689 1.1 ober grp = 3;
2690 1.1 ober DPRINTF(("chan %d, attenuation group=%d\n", chan, grp));
2691 1.1 ober
2692 1.1 ober /* get channel's sub-band */
2693 1.1 ober for (i = 0; i < IWN_NBANDS; i++)
2694 1.1 ober if (sc->bands[i].lo != 0 &&
2695 1.1 ober sc->bands[i].lo <= chan && chan <= sc->bands[i].hi)
2696 1.1 ober break;
2697 1.1 ober chans = sc->bands[i].chans;
2698 1.1 ober DPRINTF(("chan %d sub-band=%d\n", chan, i));
2699 1.1 ober
2700 1.1 ober for (c = 0; c < IWN_NTXCHAINS; c++) {
2701 1.1 ober uint8_t power, gain, temp;
2702 1.1 ober int maxchpwr, pwr, ridx, idx;
2703 1.1 ober
2704 1.1 ober power = interpolate(chan,
2705 1.1 ober chans[0].num, chans[0].samples[c][1].power,
2706 1.1 ober chans[1].num, chans[1].samples[c][1].power, 1);
2707 1.1 ober gain = interpolate(chan,
2708 1.1 ober chans[0].num, chans[0].samples[c][1].gain,
2709 1.1 ober chans[1].num, chans[1].samples[c][1].gain, 1);
2710 1.1 ober temp = interpolate(chan,
2711 1.1 ober chans[0].num, chans[0].samples[c][1].temp,
2712 1.1 ober chans[1].num, chans[1].samples[c][1].temp, 1);
2713 1.1 ober DPRINTF(("Tx chain %d: power=%d gain=%d temp=%d\n",
2714 1.2 ober c, power, gain, temp));
2715 1.1 ober
2716 1.1 ober /* compute temperature compensation */
2717 1.1 ober tdiff = ((sc->temp - temp) * 2) / tdiv[grp];
2718 1.1 ober DPRINTF(("temperature compensation=%d (current=%d, "
2719 1.2 ober "EEPROM=%d)\n", tdiff, sc->temp, temp));
2720 1.1 ober
2721 1.1 ober for (ridx = 0; ridx <= IWN_RIDX_MAX; ridx++) {
2722 1.1 ober maxchpwr = sc->maxpwr[chan] * 2;
2723 1.1 ober if ((ridx / 8) & 1) {
2724 1.1 ober /* MIMO: decrease Tx power (-3dB) */
2725 1.1 ober maxchpwr -= 6;
2726 1.1 ober }
2727 1.1 ober
2728 1.1 ober pwr = maxpwr - 10;
2729 1.1 ober
2730 1.1 ober /* decrease power for highest OFDM rates */
2731 1.1 ober if ((ridx % 8) == 5) /* 48Mbit/s */
2732 1.1 ober pwr -= 5;
2733 1.1 ober else if ((ridx % 8) == 6) /* 54Mbit/s */
2734 1.1 ober pwr -= 7;
2735 1.1 ober else if ((ridx % 8) == 7) /* 60Mbit/s */
2736 1.1 ober pwr -= 10;
2737 1.1 ober
2738 1.1 ober if (pwr > maxchpwr)
2739 1.1 ober pwr = maxchpwr;
2740 1.1 ober
2741 1.1 ober idx = gain - (pwr - power) - tdiff - vdiff;
2742 1.1 ober if ((ridx / 8) & 1) /* MIMO */
2743 1.1 ober idx += (int32_t)le32toh(uc->atten[grp][c]);
2744 1.1 ober
2745 1.1 ober if (cmd.band == 0)
2746 1.1 ober idx += 9; /* 5GHz */
2747 1.1 ober if (ridx == IWN_RIDX_MAX)
2748 1.1 ober idx += 5; /* CCK */
2749 1.1 ober
2750 1.1 ober /* make sure idx stays in a valid range */
2751 1.1 ober if (idx < 0)
2752 1.1 ober idx = 0;
2753 1.1 ober else if (idx > IWN_MAX_PWR_INDEX)
2754 1.1 ober idx = IWN_MAX_PWR_INDEX;
2755 1.1 ober
2756 1.1 ober DPRINTF(("Tx chain %d, rate idx %d: power=%d\n",
2757 1.2 ober c, ridx, idx));
2758 1.1 ober cmd.power[ridx].rf_gain[c] = rf_gain[idx];
2759 1.1 ober cmd.power[ridx].dsp_gain[c] = dsp_gain[idx];
2760 1.1 ober }
2761 1.1 ober }
2762 1.1 ober
2763 1.1 ober DPRINTF(("setting tx power for chan %d\n", chan));
2764 1.1 ober return iwn_cmd(sc, IWN_CMD_TXPOWER, &cmd, sizeof cmd, async);
2765 1.1 ober
2766 1.1 ober #undef interpolate
2767 1.1 ober #undef fdivround
2768 1.1 ober }
2769 1.1 ober
2770 1.1 ober /*
2771 1.1 ober * Get the best (maximum) RSSI among Rx antennas (in dBm).
2772 1.1 ober */
2773 1.1 ober static int
2774 1.1 ober iwn_get_rssi(const struct iwn_rx_stat *stat)
2775 1.1 ober {
2776 1.1 ober uint8_t mask, agc;
2777 1.1 ober int rssi;
2778 1.1 ober
2779 1.1 ober mask = (le16toh(stat->antenna) >> 4) & 0x7;
2780 1.1 ober agc = (le16toh(stat->agc) >> 7) & 0x7f;
2781 1.1 ober
2782 1.1 ober rssi = 0;
2783 1.1 ober if (mask & (1 << 0)) /* Ant A */
2784 1.1 ober rssi = max(rssi, stat->rssi[0]);
2785 1.1 ober if (mask & (1 << 1)) /* Ant B */
2786 1.1 ober rssi = max(rssi, stat->rssi[2]);
2787 1.1 ober if (mask & (1 << 2)) /* Ant C */
2788 1.1 ober rssi = max(rssi, stat->rssi[4]);
2789 1.1 ober
2790 1.1 ober return rssi - agc - IWN_RSSI_TO_DBM;
2791 1.1 ober }
2792 1.1 ober
2793 1.1 ober /*
2794 1.1 ober * Get the average noise among Rx antennas (in dBm).
2795 1.1 ober */
2796 1.1 ober static int
2797 1.1 ober iwn_get_noise(const struct iwn_rx_general_stats *stats)
2798 1.1 ober {
2799 1.1 ober int i, total, nbant, noise;
2800 1.1 ober
2801 1.1 ober total = nbant = 0;
2802 1.1 ober for (i = 0; i < 3; i++) {
2803 1.1 ober if ((noise = le32toh(stats->noise[i]) & 0xff) == 0)
2804 1.1 ober continue;
2805 1.1 ober total += noise;
2806 1.1 ober nbant++;
2807 1.1 ober }
2808 1.1 ober /* there should be at least one antenna but check anyway */
2809 1.1 ober return (nbant == 0) ? -127 : (total / nbant) - 107;
2810 1.1 ober }
2811 1.1 ober
2812 1.1 ober /*
2813 1.1 ober * Read temperature (in degC) from the on-board thermal sensor.
2814 1.1 ober */
2815 1.1 ober static int
2816 1.1 ober iwn_get_temperature(struct iwn_softc *sc)
2817 1.1 ober {
2818 1.1 ober struct iwn_ucode_info *uc = &sc->ucode_info;
2819 1.1 ober int32_t r1, r2, r3, r4, temp;
2820 1.1 ober
2821 1.1 ober r1 = le32toh(uc->temp[0].chan20MHz);
2822 1.1 ober r2 = le32toh(uc->temp[1].chan20MHz);
2823 1.1 ober r3 = le32toh(uc->temp[2].chan20MHz);
2824 1.1 ober r4 = le32toh(sc->rawtemp);
2825 1.1 ober
2826 1.1 ober if (r1 == r3) /* prevents division by 0 (should not happen) */
2827 1.1 ober return 0;
2828 1.1 ober
2829 1.1 ober /* sign-extend 23-bit R4 value to 32-bit */
2830 1.1 ober r4 = (r4 << 8) >> 8;
2831 1.1 ober /* compute temperature */
2832 1.1 ober temp = (259 * (r4 - r2)) / (r3 - r1);
2833 1.1 ober temp = (temp * 97) / 100 + 8;
2834 1.1 ober
2835 1.1 ober DPRINTF(("temperature %dK/%dC\n", temp, IWN_KTOC(temp)));
2836 1.1 ober return IWN_KTOC(temp);
2837 1.1 ober }
2838 1.1 ober
2839 1.1 ober /*
2840 1.1 ober * Initialize sensitivity calibration state machine.
2841 1.1 ober */
2842 1.1 ober static int
2843 1.1 ober iwn_init_sensitivity(struct iwn_softc *sc)
2844 1.1 ober {
2845 1.1 ober struct iwn_calib_state *calib = &sc->calib;
2846 1.1 ober struct iwn_phy_calib_cmd cmd;
2847 1.1 ober int error;
2848 1.1 ober
2849 1.1 ober /* reset calibration state */
2850 1.1 ober memset(calib, 0, sizeof (*calib));
2851 1.1 ober calib->state = IWN_CALIB_STATE_INIT;
2852 1.1 ober calib->cck_state = IWN_CCK_STATE_HIFA;
2853 1.1 ober /* initial values taken from the reference driver */
2854 1.15 christos calib->corr_ofdm_x1 = 105;
2855 1.1 ober calib->corr_ofdm_mrc_x1 = 220;
2856 1.15 christos calib->corr_ofdm_x4 = 90;
2857 1.1 ober calib->corr_ofdm_mrc_x4 = 170;
2858 1.15 christos calib->corr_cck_x4 = 125;
2859 1.15 christos calib->corr_cck_mrc_x4 = 200;
2860 1.15 christos calib->energy_cck = 100;
2861 1.1 ober
2862 1.1 ober /* write initial sensitivity values */
2863 1.1 ober if ((error = iwn_send_sensitivity(sc)) != 0)
2864 1.1 ober return error;
2865 1.1 ober
2866 1.1 ober memset(&cmd, 0, sizeof cmd);
2867 1.1 ober cmd.code = IWN_SET_DIFF_GAIN;
2868 1.1 ober /* differential gains initially set to 0 for all 3 antennas */
2869 1.1 ober DPRINTF(("setting differential gains\n"));
2870 1.1 ober return iwn_cmd(sc, IWN_PHY_CALIB, &cmd, sizeof cmd, 1);
2871 1.1 ober }
2872 1.1 ober
2873 1.1 ober /*
2874 1.1 ober * Collect noise and RSSI statistics for the first 20 beacons received
2875 1.1 ober * after association and use them to determine connected antennas and
2876 1.1 ober * set differential gains.
2877 1.1 ober */
2878 1.1 ober static void
2879 1.1 ober iwn_compute_differential_gain(struct iwn_softc *sc,
2880 1.1 ober const struct iwn_rx_general_stats *stats)
2881 1.1 ober {
2882 1.1 ober struct iwn_calib_state *calib = &sc->calib;
2883 1.1 ober struct iwn_phy_calib_cmd cmd;
2884 1.1 ober int i, val;
2885 1.1 ober
2886 1.1 ober /* accumulate RSSI and noise for all 3 antennas */
2887 1.1 ober for (i = 0; i < 3; i++) {
2888 1.1 ober calib->rssi[i] += le32toh(stats->rssi[i]) & 0xff;
2889 1.1 ober calib->noise[i] += le32toh(stats->noise[i]) & 0xff;
2890 1.1 ober }
2891 1.1 ober
2892 1.1 ober /* we update differential gain only once after 20 beacons */
2893 1.1 ober if (++calib->nbeacons < 20)
2894 1.1 ober return;
2895 1.1 ober
2896 1.1 ober /* determine antenna with highest average RSSI */
2897 1.1 ober val = max(calib->rssi[0], calib->rssi[1]);
2898 1.1 ober val = max(calib->rssi[2], val);
2899 1.1 ober
2900 1.1 ober /* determine which antennas are connected */
2901 1.1 ober sc->antmsk = 0;
2902 1.1 ober for (i = 0; i < 3; i++)
2903 1.1 ober if (val - calib->rssi[i] <= 15 * 20)
2904 1.1 ober sc->antmsk |= 1 << i;
2905 1.1 ober /* if neither Ant A and Ant B are connected.. */
2906 1.1 ober if ((sc->antmsk & (1 << 0 | 1 << 1)) == 0)
2907 1.1 ober sc->antmsk |= 1 << 1; /* ..mark Ant B as connected! */
2908 1.1 ober
2909 1.1 ober /* get minimal noise among connected antennas */
2910 1.1 ober val = INT_MAX; /* ok, there's at least one */
2911 1.1 ober for (i = 0; i < 3; i++)
2912 1.1 ober if (sc->antmsk & (1 << i))
2913 1.1 ober val = min(calib->noise[i], val);
2914 1.1 ober
2915 1.1 ober memset(&cmd, 0, sizeof cmd);
2916 1.1 ober cmd.code = IWN_SET_DIFF_GAIN;
2917 1.1 ober /* set differential gains for connected antennas */
2918 1.1 ober for (i = 0; i < 3; i++) {
2919 1.1 ober if (sc->antmsk & (1 << i)) {
2920 1.1 ober cmd.gain[i] = (calib->noise[i] - val) / 30;
2921 1.1 ober /* limit differential gain to 3 */
2922 1.1 ober cmd.gain[i] = min(cmd.gain[i], 3);
2923 1.1 ober cmd.gain[i] |= IWN_GAIN_SET;
2924 1.1 ober }
2925 1.1 ober }
2926 1.1 ober DPRINTF(("setting differential gains Ant A/B/C: %x/%x/%x (%x)\n",
2927 1.2 ober cmd.gain[0], cmd.gain[1], cmd.gain[2], sc->antmsk));
2928 1.1 ober if (iwn_cmd(sc, IWN_PHY_CALIB, &cmd, sizeof cmd, 1) == 0)
2929 1.1 ober calib->state = IWN_CALIB_STATE_RUN;
2930 1.1 ober }
2931 1.1 ober
2932 1.1 ober /*
2933 1.1 ober * Tune RF Rx sensitivity based on the number of false alarms detected
2934 1.1 ober * during the last beacon period.
2935 1.1 ober */
2936 1.1 ober static void
2937 1.1 ober iwn_tune_sensitivity(struct iwn_softc *sc, const struct iwn_rx_stats *stats)
2938 1.1 ober {
2939 1.2 ober #define inc_clip(val, inc, max) \
2940 1.2 ober if ((val) < (max)) { \
2941 1.2 ober if ((val) < (max) - (inc)) \
2942 1.2 ober (val) += (inc); \
2943 1.2 ober else \
2944 1.2 ober (val) = (max); \
2945 1.2 ober needs_update = 1; \
2946 1.2 ober }
2947 1.2 ober #define dec_clip(val, dec, min) \
2948 1.2 ober if ((val) > (min)) { \
2949 1.2 ober if ((val) > (min) + (dec)) \
2950 1.2 ober (val) -= (dec); \
2951 1.2 ober else \
2952 1.2 ober (val) = (min); \
2953 1.2 ober needs_update = 1; \
2954 1.1 ober }
2955 1.1 ober
2956 1.1 ober struct iwn_calib_state *calib = &sc->calib;
2957 1.1 ober uint32_t val, rxena, fa;
2958 1.1 ober uint32_t energy[3], energy_min;
2959 1.1 ober uint8_t noise[3], noise_ref;
2960 1.1 ober int i, needs_update = 0;
2961 1.1 ober
2962 1.1 ober /* check that we've been enabled long enough */
2963 1.1 ober if ((rxena = le32toh(stats->general.load)) == 0)
2964 1.1 ober return;
2965 1.1 ober
2966 1.1 ober /* compute number of false alarms since last call for OFDM */
2967 1.1 ober fa = le32toh(stats->ofdm.bad_plcp) - calib->bad_plcp_ofdm;
2968 1.1 ober fa += le32toh(stats->ofdm.fa) - calib->fa_ofdm;
2969 1.1 ober fa *= 200 * 1024; /* 200TU */
2970 1.1 ober
2971 1.1 ober /* save counters values for next call */
2972 1.1 ober calib->bad_plcp_ofdm = le32toh(stats->ofdm.bad_plcp);
2973 1.1 ober calib->fa_ofdm = le32toh(stats->ofdm.fa);
2974 1.1 ober
2975 1.1 ober if (fa > 50 * rxena) {
2976 1.1 ober /* high false alarm count, decrease sensitivity */
2977 1.1 ober DPRINTFN(2, ("OFDM high false alarm count: %u\n", fa));
2978 1.15 christos inc_clip(calib->corr_ofdm_x1, 1, 140);
2979 1.1 ober inc_clip(calib->corr_ofdm_mrc_x1, 1, 270);
2980 1.15 christos inc_clip(calib->corr_ofdm_x4, 1, 120);
2981 1.1 ober inc_clip(calib->corr_ofdm_mrc_x4, 1, 210);
2982 1.1 ober
2983 1.1 ober } else if (fa < 5 * rxena) {
2984 1.1 ober /* low false alarm count, increase sensitivity */
2985 1.1 ober DPRINTFN(2, ("OFDM low false alarm count: %u\n", fa));
2986 1.15 christos dec_clip(calib->corr_ofdm_x1, 1, 105);
2987 1.1 ober dec_clip(calib->corr_ofdm_mrc_x1, 1, 220);
2988 1.15 christos dec_clip(calib->corr_ofdm_x4, 1, 85);
2989 1.1 ober dec_clip(calib->corr_ofdm_mrc_x4, 1, 170);
2990 1.1 ober }
2991 1.1 ober
2992 1.1 ober /* compute maximum noise among 3 antennas */
2993 1.1 ober for (i = 0; i < 3; i++)
2994 1.1 ober noise[i] = (le32toh(stats->general.noise[i]) >> 8) & 0xff;
2995 1.1 ober val = max(noise[0], noise[1]);
2996 1.1 ober val = max(noise[2], val);
2997 1.1 ober /* insert it into our samples table */
2998 1.1 ober calib->noise_samples[calib->cur_noise_sample] = val;
2999 1.1 ober calib->cur_noise_sample = (calib->cur_noise_sample + 1) % 20;
3000 1.1 ober
3001 1.1 ober /* compute maximum noise among last 20 samples */
3002 1.1 ober noise_ref = calib->noise_samples[0];
3003 1.1 ober for (i = 1; i < 20; i++)
3004 1.1 ober noise_ref = max(noise_ref, calib->noise_samples[i]);
3005 1.1 ober
3006 1.1 ober /* compute maximum energy among 3 antennas */
3007 1.1 ober for (i = 0; i < 3; i++)
3008 1.1 ober energy[i] = le32toh(stats->general.energy[i]);
3009 1.1 ober val = min(energy[0], energy[1]);
3010 1.1 ober val = min(energy[2], val);
3011 1.1 ober /* insert it into our samples table */
3012 1.1 ober calib->energy_samples[calib->cur_energy_sample] = val;
3013 1.1 ober calib->cur_energy_sample = (calib->cur_energy_sample + 1) % 10;
3014 1.1 ober
3015 1.1 ober /* compute minimum energy among last 10 samples */
3016 1.1 ober energy_min = calib->energy_samples[0];
3017 1.1 ober for (i = 1; i < 10; i++)
3018 1.1 ober energy_min = max(energy_min, calib->energy_samples[i]);
3019 1.1 ober energy_min += 6;
3020 1.1 ober
3021 1.1 ober /* compute number of false alarms since last call for CCK */
3022 1.1 ober fa = le32toh(stats->cck.bad_plcp) - calib->bad_plcp_cck;
3023 1.1 ober fa += le32toh(stats->cck.fa) - calib->fa_cck;
3024 1.1 ober fa *= 200 * 1024; /* 200TU */
3025 1.1 ober
3026 1.1 ober /* save counters values for next call */
3027 1.1 ober calib->bad_plcp_cck = le32toh(stats->cck.bad_plcp);
3028 1.1 ober calib->fa_cck = le32toh(stats->cck.fa);
3029 1.1 ober
3030 1.1 ober if (fa > 50 * rxena) {
3031 1.1 ober /* high false alarm count, decrease sensitivity */
3032 1.1 ober DPRINTFN(2, ("CCK high false alarm count: %u\n", fa));
3033 1.1 ober calib->cck_state = IWN_CCK_STATE_HIFA;
3034 1.1 ober calib->low_fa = 0;
3035 1.1 ober
3036 1.1 ober if (calib->corr_cck_x4 > 160) {
3037 1.1 ober calib->noise_ref = noise_ref;
3038 1.1 ober if (calib->energy_cck > 2)
3039 1.1 ober dec_clip(calib->energy_cck, 2, energy_min);
3040 1.1 ober }
3041 1.1 ober if (calib->corr_cck_x4 < 160) {
3042 1.1 ober calib->corr_cck_x4 = 161;
3043 1.1 ober needs_update = 1;
3044 1.1 ober } else
3045 1.1 ober inc_clip(calib->corr_cck_x4, 3, 200);
3046 1.1 ober
3047 1.1 ober inc_clip(calib->corr_cck_mrc_x4, 3, 400);
3048 1.1 ober
3049 1.1 ober } else if (fa < 5 * rxena) {
3050 1.1 ober /* low false alarm count, increase sensitivity */
3051 1.1 ober DPRINTFN(2, ("CCK low false alarm count: %u\n", fa));
3052 1.1 ober calib->cck_state = IWN_CCK_STATE_LOFA;
3053 1.1 ober calib->low_fa++;
3054 1.1 ober
3055 1.1 ober if (calib->cck_state != 0 &&
3056 1.1 ober ((calib->noise_ref - noise_ref) > 2 ||
3057 1.2 ober calib->low_fa > 100)) {
3058 1.15 christos inc_clip(calib->energy_cck, 2, 97);
3059 1.15 christos dec_clip(calib->corr_cck_x4, 3, 125);
3060 1.1 ober dec_clip(calib->corr_cck_mrc_x4, 3, 200);
3061 1.1 ober }
3062 1.1 ober } else {
3063 1.1 ober /* not worth to increase or decrease sensitivity */
3064 1.1 ober DPRINTFN(2, ("CCK normal false alarm count: %u\n", fa));
3065 1.1 ober calib->low_fa = 0;
3066 1.1 ober calib->noise_ref = noise_ref;
3067 1.1 ober
3068 1.1 ober if (calib->cck_state == IWN_CCK_STATE_HIFA) {
3069 1.1 ober /* previous interval had many false alarms */
3070 1.1 ober dec_clip(calib->energy_cck, 8, energy_min);
3071 1.1 ober }
3072 1.1 ober calib->cck_state = IWN_CCK_STATE_INIT;
3073 1.1 ober }
3074 1.1 ober
3075 1.1 ober if (needs_update)
3076 1.1 ober (void)iwn_send_sensitivity(sc);
3077 1.1 ober #undef dec_clip
3078 1.1 ober #undef inc_clip
3079 1.1 ober }
3080 1.1 ober
3081 1.1 ober static int
3082 1.1 ober iwn_send_sensitivity(struct iwn_softc *sc)
3083 1.1 ober {
3084 1.1 ober struct iwn_calib_state *calib = &sc->calib;
3085 1.1 ober struct iwn_sensitivity_cmd cmd;
3086 1.1 ober
3087 1.1 ober memset(&cmd, 0, sizeof cmd);
3088 1.1 ober cmd.which = IWN_SENSITIVITY_WORKTBL;
3089 1.1 ober /* OFDM modulation */
3090 1.1 ober cmd.corr_ofdm_x1 = le16toh(calib->corr_ofdm_x1);
3091 1.1 ober cmd.corr_ofdm_mrc_x1 = le16toh(calib->corr_ofdm_mrc_x1);
3092 1.1 ober cmd.corr_ofdm_x4 = le16toh(calib->corr_ofdm_x4);
3093 1.1 ober cmd.corr_ofdm_mrc_x4 = le16toh(calib->corr_ofdm_mrc_x4);
3094 1.15 christos cmd.energy_ofdm = le16toh(100);
3095 1.1 ober cmd.energy_ofdm_th = le16toh(62);
3096 1.1 ober /* CCK modulation */
3097 1.15 christos cmd.corr_cck_x4 = le16toh(calib->corr_cck_x4);
3098 1.1 ober cmd.corr_cck_mrc_x4 = le16toh(calib->corr_cck_mrc_x4);
3099 1.15 christos cmd.energy_cck = le16toh(calib->energy_cck);
3100 1.1 ober /* Barker modulation: use default values */
3101 1.15 christos cmd.corr_barker = le16toh(190);
3102 1.1 ober cmd.corr_barker_mrc = le16toh(390);
3103 1.1 ober
3104 1.1 ober DPRINTFN(2, ("setting sensitivity\n"));
3105 1.1 ober return iwn_cmd(sc, IWN_SENSITIVITY, &cmd, sizeof cmd, 1);
3106 1.1 ober }
3107 1.1 ober
3108 1.1 ober static int
3109 1.11 blymn iwn_add_node(struct iwn_softc *sc, struct ieee80211_node *ni, bool broadcast,
3110 1.11 blymn bool async)
3111 1.11 blymn {
3112 1.11 blymn struct iwn_node_info node;
3113 1.11 blymn int error;
3114 1.11 blymn
3115 1.11 blymn error = 0;
3116 1.11 blymn
3117 1.11 blymn memset(&node, 0, sizeof node);
3118 1.11 blymn if (broadcast == true) {
3119 1.11 blymn IEEE80211_ADDR_COPY(node.macaddr, etherbroadcastaddr);
3120 1.11 blymn node.id = IWN_ID_BROADCAST;
3121 1.11 blymn DPRINTF(("adding broadcast node\n"));
3122 1.11 blymn } else {
3123 1.11 blymn IEEE80211_ADDR_COPY(node.macaddr, ni->ni_macaddr);
3124 1.11 blymn node.id = IWN_ID_BSS;
3125 1.11 blymn node.htflags = htole32(3 << IWN_AMDPU_SIZE_FACTOR_SHIFT |
3126 1.11 blymn 5 << IWN_AMDPU_DENSITY_SHIFT);
3127 1.11 blymn DPRINTF(("adding BSS node\n"));
3128 1.11 blymn }
3129 1.11 blymn
3130 1.11 blymn error = iwn_cmd(sc, IWN_CMD_ADD_NODE, &node, sizeof node, async);
3131 1.11 blymn if (error != 0) {
3132 1.11 blymn aprint_error_dev(sc->sc_dev, "could not add %s node\n",
3133 1.11 blymn (broadcast == 1)? "broadcast" : "BSS");
3134 1.11 blymn return error;
3135 1.11 blymn }
3136 1.11 blymn DPRINTF(("setting MRR for node %d\n", node.id));
3137 1.11 blymn if ((error = iwn_setup_node_mrr(sc, node.id, async)) != 0) {
3138 1.11 blymn aprint_error_dev(sc->sc_dev,
3139 1.11 blymn "could not setup MRR for %s node\n",
3140 1.11 blymn (broadcast == 1)? "broadcast" : "BSS");
3141 1.11 blymn return error;
3142 1.11 blymn }
3143 1.11 blymn
3144 1.11 blymn return error;
3145 1.11 blymn }
3146 1.11 blymn
3147 1.11 blymn static int
3148 1.1 ober iwn_auth(struct iwn_softc *sc)
3149 1.1 ober {
3150 1.1 ober struct ieee80211com *ic = &sc->sc_ic;
3151 1.1 ober struct ieee80211_node *ni = ic->ic_bss;
3152 1.1 ober int error;
3153 1.1 ober
3154 1.1 ober /* update adapter's configuration */
3155 1.1 ober IEEE80211_ADDR_COPY(sc->config.bssid, ni->ni_bssid);
3156 1.1 ober sc->config.chan = ieee80211_chan2ieee(ic, ni->ni_chan);
3157 1.1 ober sc->config.flags = htole32(IWN_CONFIG_TSF);
3158 1.1 ober if (IEEE80211_IS_CHAN_2GHZ(ni->ni_chan)) {
3159 1.1 ober sc->config.flags |= htole32(IWN_CONFIG_AUTO |
3160 1.1 ober IWN_CONFIG_24GHZ);
3161 1.1 ober }
3162 1.1 ober switch (ic->ic_curmode) {
3163 1.1 ober case IEEE80211_MODE_11A:
3164 1.1 ober sc->config.cck_mask = 0;
3165 1.1 ober sc->config.ofdm_mask = 0x15;
3166 1.1 ober break;
3167 1.1 ober case IEEE80211_MODE_11B:
3168 1.1 ober sc->config.cck_mask = 0x03;
3169 1.1 ober sc->config.ofdm_mask = 0;
3170 1.1 ober break;
3171 1.1 ober default: /* assume 802.11b/g */
3172 1.1 ober sc->config.cck_mask = 0xf;
3173 1.1 ober sc->config.ofdm_mask = 0x15;
3174 1.1 ober }
3175 1.1 ober DPRINTF(("config chan %d flags %x cck %x ofdm %x\n", sc->config.chan,
3176 1.2 ober sc->config.flags, sc->config.cck_mask, sc->config.ofdm_mask));
3177 1.1 ober error = iwn_cmd(sc, IWN_CMD_CONFIGURE, &sc->config,
3178 1.1 ober sizeof (struct iwn_config), 1);
3179 1.1 ober if (error != 0) {
3180 1.1 ober aprint_error_dev(sc->sc_dev, "could not configure\n");
3181 1.1 ober return error;
3182 1.1 ober }
3183 1.1 ober
3184 1.1 ober /* configuration has changed, set Tx power accordingly */
3185 1.1 ober if ((error = iwn_set_txpower(sc, ni->ni_chan, 1)) != 0) {
3186 1.8 blymn aprint_error_dev(sc->sc_dev, "could not set Tx power\n");
3187 1.1 ober return error;
3188 1.1 ober }
3189 1.1 ober
3190 1.1 ober /*
3191 1.1 ober * Reconfiguring clears the adapter's nodes table so we must
3192 1.1 ober * add the broadcast node again.
3193 1.1 ober */
3194 1.11 blymn if ((error = iwn_add_node(sc, ni, true, true)) != 0)
3195 1.11 blymn return error;
3196 1.11 blymn
3197 1.11 blymn /* add BSS node */
3198 1.11 blymn if ((error = iwn_add_node(sc, ni, false, true)) != 0)
3199 1.1 ober return error;
3200 1.11 blymn
3201 1.11 blymn if (ic->ic_opmode == IEEE80211_M_STA) {
3202 1.11 blymn /* fake a join to init the tx rate */
3203 1.11 blymn iwn_newassoc(ni, 1);
3204 1.1 ober }
3205 1.11 blymn
3206 1.11 blymn if ((error = iwn_init_sensitivity(sc)) != 0) {
3207 1.11 blymn aprint_error_dev(sc->sc_dev, "could not set sensitivity\n");
3208 1.1 ober return error;
3209 1.1 ober }
3210 1.1 ober
3211 1.11 blymn
3212 1.1 ober return 0;
3213 1.1 ober }
3214 1.1 ober
3215 1.1 ober /*
3216 1.1 ober * Configure the adapter for associated state.
3217 1.1 ober */
3218 1.1 ober static int
3219 1.1 ober iwn_run(struct iwn_softc *sc)
3220 1.1 ober {
3221 1.1 ober struct ieee80211com *ic = &sc->sc_ic;
3222 1.1 ober struct ieee80211_node *ni = ic->ic_bss;
3223 1.1 ober int error;
3224 1.1 ober
3225 1.1 ober if (ic->ic_opmode == IEEE80211_M_MONITOR) {
3226 1.1 ober /* link LED blinks while monitoring */
3227 1.1 ober iwn_set_led(sc, IWN_LED_LINK, 5, 5);
3228 1.1 ober return 0;
3229 1.1 ober }
3230 1.1 ober
3231 1.1 ober iwn_enable_tsf(sc, ni);
3232 1.1 ober
3233 1.1 ober /* update adapter's configuration */
3234 1.1 ober sc->config.associd = htole16(ni->ni_associd & ~0xc000);
3235 1.1 ober /* short preamble/slot time are negotiated when associating */
3236 1.1 ober sc->config.flags &= ~htole32(IWN_CONFIG_SHPREAMBLE |
3237 1.1 ober IWN_CONFIG_SHSLOT);
3238 1.1 ober if (ic->ic_flags & IEEE80211_F_SHSLOT)
3239 1.1 ober sc->config.flags |= htole32(IWN_CONFIG_SHSLOT);
3240 1.1 ober if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
3241 1.1 ober sc->config.flags |= htole32(IWN_CONFIG_SHPREAMBLE);
3242 1.1 ober sc->config.filter |= htole32(IWN_FILTER_BSS);
3243 1.1 ober
3244 1.1 ober DPRINTF(("config chan %d flags %x\n", sc->config.chan,
3245 1.2 ober sc->config.flags));
3246 1.1 ober error = iwn_cmd(sc, IWN_CMD_CONFIGURE, &sc->config,
3247 1.1 ober sizeof (struct iwn_config), 1);
3248 1.1 ober if (error != 0) {
3249 1.11 blymn aprint_error_dev(sc->sc_dev,
3250 1.11 blymn "could not update configuration\n");
3251 1.1 ober return error;
3252 1.1 ober }
3253 1.1 ober
3254 1.1 ober /* configuration has changed, set Tx power accordingly */
3255 1.1 ober if ((error = iwn_set_txpower(sc, ni->ni_chan, 1)) != 0) {
3256 1.1 ober aprint_error_dev(sc->sc_dev, "could not set Tx power\n");
3257 1.1 ober return error;
3258 1.1 ober }
3259 1.1 ober
3260 1.1 ober /* add BSS node */
3261 1.11 blymn iwn_add_node(sc, ni, false, true);
3262 1.1 ober
3263 1.1 ober if (ic->ic_opmode == IEEE80211_M_STA) {
3264 1.1 ober /* fake a join to init the tx rate */
3265 1.2 ober iwn_newassoc(ni, 1);
3266 1.1 ober }
3267 1.1 ober
3268 1.1 ober if ((error = iwn_init_sensitivity(sc)) != 0) {
3269 1.1 ober aprint_error_dev(sc->sc_dev, "could not set sensitivity\n");
3270 1.1 ober return error;
3271 1.1 ober }
3272 1.1 ober
3273 1.1 ober /* start periodic calibration timer */
3274 1.8 blymn sc->calib.state = IWN_CALIB_STATE_ASSOC;
3275 1.1 ober sc->calib_cnt = 0;
3276 1.1 ober callout_schedule(&sc->calib_to, hz / 2);
3277 1.1 ober
3278 1.11 blymn if (0 == 1) { /* XXX don't do the beacon - we get a firmware error
3279 1.15 christos XXX when we try. Something is wrong with the
3280 1.15 christos XXX setup of the frame. Just don't ever call
3281 1.11 blymn XXX the function but reference it to keep gcc happy
3282 1.11 blymn */
3283 1.11 blymn /* now we are associated set up the beacon frame */
3284 1.11 blymn if ((error = iwn_setup_beacon(sc, ni))) {
3285 1.11 blymn aprint_error_dev(sc->sc_dev,
3286 1.11 blymn "could not setup beacon frame\n");
3287 1.11 blymn return error;
3288 1.11 blymn }
3289 1.11 blymn }
3290 1.11 blymn
3291 1.11 blymn
3292 1.1 ober /* link LED always on while associated */
3293 1.1 ober iwn_set_led(sc, IWN_LED_LINK, 0, 1);
3294 1.1 ober
3295 1.1 ober return 0;
3296 1.1 ober }
3297 1.1 ober
3298 1.1 ober /*
3299 1.15 christos * Send a scan request to the firmware. Since this command is huge, we map it
3300 1.1 ober * into a mbuf instead of using the pre-allocated set of commands.
3301 1.1 ober */
3302 1.1 ober static int
3303 1.1 ober iwn_scan(struct iwn_softc *sc, uint16_t flags)
3304 1.1 ober {
3305 1.1 ober struct ieee80211com *ic = &sc->sc_ic;
3306 1.1 ober struct iwn_tx_ring *ring = &sc->txq[4];
3307 1.1 ober struct iwn_tx_desc *desc;
3308 1.1 ober struct iwn_tx_data *data;
3309 1.1 ober struct iwn_tx_cmd *cmd;
3310 1.1 ober struct iwn_cmd_data *tx;
3311 1.1 ober struct iwn_scan_hdr *hdr;
3312 1.1 ober struct iwn_scan_essid *essid;
3313 1.1 ober struct iwn_scan_chan *chan;
3314 1.1 ober struct ieee80211_frame *wh;
3315 1.1 ober struct ieee80211_rateset *rs;
3316 1.1 ober struct ieee80211_channel *c;
3317 1.1 ober enum ieee80211_phymode mode;
3318 1.1 ober uint8_t *frm;
3319 1.1 ober int pktlen, error, nrates;
3320 1.1 ober
3321 1.1 ober desc = &ring->desc[ring->cur];
3322 1.1 ober data = &ring->data[ring->cur];
3323 1.1 ober
3324 1.1 ober MGETHDR(data->m, M_DONTWAIT, MT_DATA);
3325 1.1 ober if (data->m == NULL) {
3326 1.1 ober aprint_error_dev(sc->sc_dev, "could not allocate mbuf for scan command\n");
3327 1.1 ober return ENOMEM;
3328 1.1 ober }
3329 1.1 ober MCLGET(data->m, M_DONTWAIT);
3330 1.1 ober if (!(data->m->m_flags & M_EXT)) {
3331 1.1 ober m_freem(data->m);
3332 1.1 ober data->m = NULL;
3333 1.1 ober aprint_error_dev(sc->sc_dev, "could not allocate mbuf for scan command\n");
3334 1.1 ober return ENOMEM;
3335 1.1 ober }
3336 1.1 ober
3337 1.1 ober cmd = mtod(data->m, struct iwn_tx_cmd *);
3338 1.1 ober cmd->code = IWN_CMD_SCAN;
3339 1.1 ober cmd->flags = 0;
3340 1.1 ober cmd->qid = ring->qid;
3341 1.1 ober cmd->idx = ring->cur;
3342 1.1 ober
3343 1.1 ober hdr = (struct iwn_scan_hdr *)cmd->data;
3344 1.1 ober memset(hdr, 0, sizeof (struct iwn_scan_hdr));
3345 1.1 ober /*
3346 1.1 ober * Move to the next channel if no packets are received within 5 msecs
3347 1.1 ober * after sending the probe request (this helps to reduce the duration
3348 1.1 ober * of active scans).
3349 1.1 ober */
3350 1.1 ober hdr->quiet = htole16(5); /* timeout in milliseconds */
3351 1.1 ober hdr->plcp_threshold = htole16(1); /* min # of packets */
3352 1.1 ober
3353 1.1 ober /* select Ant B and Ant C for scanning */
3354 1.1 ober hdr->rxchain = htole16(0x3e1 | 7 << IWN_RXCHAIN_ANTMSK_SHIFT);
3355 1.1 ober
3356 1.1 ober tx = (struct iwn_cmd_data *)(hdr + 1);
3357 1.1 ober memset(tx, 0, sizeof (struct iwn_cmd_data));
3358 1.1 ober tx->flags = htole32(IWN_TX_AUTO_SEQ | 0x200); // XXX
3359 1.1 ober tx->id = IWN_ID_BROADCAST;
3360 1.1 ober tx->lifetime = htole32(IWN_LIFETIME_INFINITE);
3361 1.1 ober tx->rflags = IWN_RFLAG_ANT_B;
3362 1.1 ober
3363 1.1 ober if (flags & IEEE80211_CHAN_A) {
3364 1.1 ober hdr->crc_threshold = htole16(1);
3365 1.1 ober /* send probe requests at 6Mbps */
3366 1.1 ober tx->rate = iwn_ridx_to_plcp[IWN_OFDM6];
3367 1.1 ober } else {
3368 1.1 ober hdr->flags = htole32(IWN_CONFIG_24GHZ | IWN_CONFIG_AUTO);
3369 1.1 ober /* send probe requests at 1Mbps */
3370 1.1 ober tx->rate = iwn_ridx_to_plcp[IWN_CCK1];
3371 1.1 ober tx->rflags |= IWN_RFLAG_CCK;
3372 1.1 ober }
3373 1.1 ober
3374 1.1 ober essid = (struct iwn_scan_essid *)(tx + 1);
3375 1.1 ober memset(essid, 0, 4 * sizeof (struct iwn_scan_essid));
3376 1.1 ober essid[0].id = IEEE80211_ELEMID_SSID;
3377 1.1 ober essid[0].len = ic->ic_des_esslen;
3378 1.1 ober memcpy(essid[0].data, ic->ic_des_essid, ic->ic_des_esslen);
3379 1.1 ober
3380 1.1 ober /*
3381 1.15 christos * Build a probe request frame. Most of the following code is a
3382 1.1 ober * copy & paste of what is done in net80211.
3383 1.1 ober */
3384 1.1 ober wh = (struct ieee80211_frame *)&essid[4];
3385 1.1 ober wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT |
3386 1.1 ober IEEE80211_FC0_SUBTYPE_PROBE_REQ;
3387 1.1 ober wh->i_fc[1] = IEEE80211_FC1_DIR_NODS;
3388 1.1 ober IEEE80211_ADDR_COPY(wh->i_addr1, etherbroadcastaddr);
3389 1.1 ober IEEE80211_ADDR_COPY(wh->i_addr2, ic->ic_myaddr);
3390 1.1 ober IEEE80211_ADDR_COPY(wh->i_addr3, etherbroadcastaddr);
3391 1.1 ober *(u_int16_t *)&wh->i_dur[0] = 0; /* filled by h/w */
3392 1.1 ober *(u_int16_t *)&wh->i_seq[0] = 0; /* filled by h/w */
3393 1.1 ober
3394 1.1 ober frm = (uint8_t *)(wh + 1);
3395 1.1 ober
3396 1.1 ober /* add empty SSID IE (firmware generates it for directed scans) */
3397 1.1 ober *frm++ = IEEE80211_ELEMID_SSID;
3398 1.1 ober *frm++ = 0;
3399 1.1 ober
3400 1.1 ober mode = ieee80211_chan2mode(ic, ic->ic_ibss_chan);
3401 1.1 ober rs = &ic->ic_sup_rates[mode];
3402 1.1 ober
3403 1.1 ober /* add supported rates IE */
3404 1.1 ober
3405 1.1 ober *frm++ = IEEE80211_ELEMID_RATES;
3406 1.1 ober nrates = rs->rs_nrates;
3407 1.1 ober if (nrates > IEEE80211_RATE_SIZE)
3408 1.1 ober nrates = IEEE80211_RATE_SIZE;
3409 1.1 ober *frm++ = nrates;
3410 1.1 ober memcpy(frm, rs->rs_rates, nrates);
3411 1.1 ober frm += nrates;
3412 1.1 ober
3413 1.1 ober /* add supported xrates IE */
3414 1.1 ober
3415 1.1 ober if (rs->rs_nrates > IEEE80211_RATE_SIZE) {
3416 1.1 ober nrates = rs->rs_nrates - IEEE80211_RATE_SIZE;
3417 1.1 ober *frm++ = IEEE80211_ELEMID_XRATES;
3418 1.1 ober *frm++ = nrates;
3419 1.1 ober memcpy(frm, rs->rs_rates + IEEE80211_RATE_SIZE, nrates);
3420 1.1 ober frm += nrates;
3421 1.1 ober }
3422 1.1 ober
3423 1.1 ober /* setup length of probe request */
3424 1.1 ober tx->len = htole16(frm - (uint8_t *)wh);
3425 1.1 ober
3426 1.1 ober chan = (struct iwn_scan_chan *)frm;
3427 1.15 christos for (c = &ic->ic_channels[1];
3428 1.1 ober c <= &ic->ic_channels[IEEE80211_CHAN_MAX]; c++) {
3429 1.1 ober if ((c->ic_flags & flags) != flags)
3430 1.1 ober continue;
3431 1.1 ober
3432 1.1 ober chan->chan = ieee80211_chan2ieee(ic, c);
3433 1.1 ober chan->flags = 0;
3434 1.1 ober if (!(c->ic_flags & IEEE80211_CHAN_PASSIVE)) {
3435 1.1 ober chan->flags |= IWN_CHAN_ACTIVE;
3436 1.1 ober if (ic->ic_des_esslen != 0)
3437 1.1 ober chan->flags |= IWN_CHAN_DIRECT;
3438 1.1 ober }
3439 1.1 ober chan->dsp_gain = 0x6e;
3440 1.1 ober if (IEEE80211_IS_CHAN_5GHZ(c)) {
3441 1.1 ober chan->rf_gain = 0x3b;
3442 1.1 ober chan->active = htole16(10);
3443 1.1 ober chan->passive = htole16(110);
3444 1.1 ober } else {
3445 1.1 ober chan->rf_gain = 0x28;
3446 1.1 ober chan->active = htole16(20);
3447 1.1 ober chan->passive = htole16(120);
3448 1.1 ober }
3449 1.1 ober hdr->nchan++;
3450 1.1 ober chan++;
3451 1.1 ober
3452 1.1 ober frm += sizeof (struct iwn_scan_chan);
3453 1.1 ober }
3454 1.1 ober
3455 1.1 ober hdr->len = htole16(frm - (uint8_t *)hdr);
3456 1.1 ober pktlen = frm - (uint8_t *)cmd;
3457 1.1 ober
3458 1.1 ober error = bus_dmamap_load(sc->sc_dmat, data->map, cmd, pktlen, NULL,
3459 1.1 ober BUS_DMA_NOWAIT);
3460 1.1 ober if (error) {
3461 1.1 ober aprint_error_dev(sc->sc_dev, "could not map scan command\n");
3462 1.1 ober m_freem(data->m);
3463 1.1 ober data->m = NULL;
3464 1.1 ober return error;
3465 1.1 ober }
3466 1.1 ober
3467 1.1 ober IWN_SET_DESC_NSEGS(desc, 1);
3468 1.1 ober IWN_SET_DESC_SEG(desc, 0, data->map->dm_segs[0].ds_addr,
3469 1.1 ober data->map->dm_segs[0].ds_len);
3470 1.1 ober sc->shared->len[ring->qid][ring->cur] = htole16(8);
3471 1.1 ober if (ring->cur < IWN_TX_WINDOW) {
3472 1.1 ober sc->shared->len[ring->qid][ring->cur + IWN_TX_RING_COUNT] =
3473 1.1 ober htole16(8);
3474 1.1 ober }
3475 1.1 ober
3476 1.1 ober /* kick cmd ring */
3477 1.1 ober ring->cur = (ring->cur + 1) % IWN_TX_RING_COUNT;
3478 1.1 ober IWN_WRITE(sc, IWN_TX_WIDX, ring->qid << 8 | ring->cur);
3479 1.1 ober
3480 1.1 ober return 0; /* will be notified async. of failure/success */
3481 1.1 ober }
3482 1.1 ober
3483 1.1 ober static int
3484 1.1 ober iwn_config(struct iwn_softc *sc)
3485 1.1 ober {
3486 1.1 ober struct ieee80211com *ic = &sc->sc_ic;
3487 1.1 ober struct ifnet *ifp = ic->ic_ifp;
3488 1.1 ober struct iwn_power power;
3489 1.1 ober struct iwn_bluetooth bluetooth;
3490 1.1 ober int error;
3491 1.1 ober
3492 1.1 ober /* set power mode */
3493 1.1 ober memset(&power, 0, sizeof power);
3494 1.1 ober power.flags = htole16(IWN_POWER_CAM | 0x8);
3495 1.1 ober DPRINTF(("setting power mode\n"));
3496 1.1 ober error = iwn_cmd(sc, IWN_CMD_SET_POWER_MODE, &power, sizeof power, 0);
3497 1.1 ober if (error != 0) {
3498 1.1 ober aprint_error_dev(sc->sc_dev, "could not set power mode\n");
3499 1.1 ober return error;
3500 1.1 ober }
3501 1.1 ober
3502 1.1 ober /* configure bluetooth coexistence */
3503 1.1 ober memset(&bluetooth, 0, sizeof bluetooth);
3504 1.1 ober bluetooth.flags = 3;
3505 1.1 ober bluetooth.lead = 0xaa;
3506 1.1 ober bluetooth.kill = 1;
3507 1.1 ober DPRINTF(("configuring bluetooth coexistence\n"));
3508 1.1 ober error = iwn_cmd(sc, IWN_CMD_BLUETOOTH, &bluetooth, sizeof bluetooth,
3509 1.1 ober 0);
3510 1.1 ober if (error != 0) {
3511 1.1 ober aprint_error_dev(sc->sc_dev, "could not configure bluetooth coexistence\n");
3512 1.1 ober return error;
3513 1.1 ober }
3514 1.1 ober
3515 1.1 ober /* configure adapter */
3516 1.1 ober memset(&sc->config, 0, sizeof (struct iwn_config));
3517 1.1 ober IEEE80211_ADDR_COPY(ic->ic_myaddr, CLLADDR(ifp->if_sadl));
3518 1.1 ober IEEE80211_ADDR_COPY(sc->config.myaddr, ic->ic_myaddr);
3519 1.1 ober IEEE80211_ADDR_COPY(sc->config.wlap, ic->ic_myaddr);
3520 1.1 ober /* set default channel */
3521 1.1 ober sc->config.chan = ieee80211_chan2ieee(ic, ic->ic_ibss_chan);
3522 1.1 ober sc->config.flags = htole32(IWN_CONFIG_TSF);
3523 1.1 ober if (IEEE80211_IS_CHAN_2GHZ(ic->ic_ibss_chan)) {
3524 1.1 ober sc->config.flags |= htole32(IWN_CONFIG_AUTO |
3525 1.1 ober IWN_CONFIG_24GHZ);
3526 1.1 ober }
3527 1.1 ober sc->config.filter = 0;
3528 1.1 ober switch (ic->ic_opmode) {
3529 1.1 ober case IEEE80211_M_STA:
3530 1.1 ober sc->config.mode = IWN_MODE_STA;
3531 1.1 ober sc->config.filter |= htole32(IWN_FILTER_MULTICAST);
3532 1.1 ober break;
3533 1.1 ober case IEEE80211_M_IBSS:
3534 1.1 ober case IEEE80211_M_AHDEMO:
3535 1.1 ober sc->config.mode = IWN_MODE_IBSS;
3536 1.1 ober break;
3537 1.1 ober case IEEE80211_M_HOSTAP:
3538 1.1 ober sc->config.mode = IWN_MODE_HOSTAP;
3539 1.1 ober break;
3540 1.1 ober case IEEE80211_M_MONITOR:
3541 1.1 ober sc->config.mode = IWN_MODE_MONITOR;
3542 1.1 ober sc->config.filter |= htole32(IWN_FILTER_MULTICAST |
3543 1.1 ober IWN_FILTER_CTL | IWN_FILTER_PROMISC);
3544 1.1 ober break;
3545 1.1 ober }
3546 1.1 ober sc->config.cck_mask = 0x0f; /* not yet negotiated */
3547 1.1 ober sc->config.ofdm_mask = 0xff; /* not yet negotiated */
3548 1.1 ober sc->config.ht_single_mask = 0xff;
3549 1.1 ober sc->config.ht_dual_mask = 0xff;
3550 1.1 ober sc->config.rxchain = htole16(0x2800 | 7 << IWN_RXCHAIN_ANTMSK_SHIFT);
3551 1.1 ober DPRINTF(("setting configuration\n"));
3552 1.1 ober error = iwn_cmd(sc, IWN_CMD_CONFIGURE, &sc->config,
3553 1.1 ober sizeof (struct iwn_config), 0);
3554 1.1 ober if (error != 0) {
3555 1.1 ober aprint_error_dev(sc->sc_dev, "configure command failed\n");
3556 1.1 ober return error;
3557 1.1 ober }
3558 1.1 ober
3559 1.1 ober /* configuration has changed, set Tx power accordingly */
3560 1.1 ober if ((error = iwn_set_txpower(sc, ic->ic_ibss_chan, 0)) != 0) {
3561 1.1 ober aprint_error_dev(sc->sc_dev, "could not set Tx power\n");
3562 1.1 ober return error;
3563 1.1 ober }
3564 1.1 ober
3565 1.1 ober /* add broadcast node */
3566 1.11 blymn if ((error = iwn_add_node(sc, NULL, true, false)) != 0)
3567 1.1 ober return error;
3568 1.1 ober
3569 1.1 ober if ((error = iwn_set_critical_temp(sc)) != 0) {
3570 1.1 ober aprint_error_dev(sc->sc_dev, "could not set critical temperature\n");
3571 1.1 ober return error;
3572 1.1 ober }
3573 1.1 ober
3574 1.1 ober return 0;
3575 1.1 ober }
3576 1.1 ober
3577 1.1 ober /*
3578 1.1 ober * Do post-alive initialization of the NIC (after firmware upload).
3579 1.1 ober */
3580 1.1 ober static void
3581 1.1 ober iwn_post_alive(struct iwn_softc *sc)
3582 1.1 ober {
3583 1.1 ober uint32_t base;
3584 1.1 ober uint16_t offset;
3585 1.1 ober int qid;
3586 1.1 ober
3587 1.1 ober iwn_mem_lock(sc);
3588 1.1 ober
3589 1.1 ober /* clear SRAM */
3590 1.1 ober base = iwn_mem_read(sc, IWN_SRAM_BASE);
3591 1.1 ober for (offset = 0x380; offset < 0x520; offset += 4) {
3592 1.1 ober IWN_WRITE(sc, IWN_MEM_WADDR, base + offset);
3593 1.1 ober IWN_WRITE(sc, IWN_MEM_WDATA, 0);
3594 1.1 ober }
3595 1.1 ober
3596 1.1 ober /* shared area is aligned on a 1K boundary */
3597 1.1 ober iwn_mem_write(sc, IWN_SRAM_BASE, sc->shared_dma.paddr >> 10);
3598 1.1 ober iwn_mem_write(sc, IWN_SELECT_QCHAIN, 0);
3599 1.1 ober
3600 1.1 ober for (qid = 0; qid < IWN_NTXQUEUES; qid++) {
3601 1.1 ober iwn_mem_write(sc, IWN_QUEUE_RIDX(qid), 0);
3602 1.1 ober IWN_WRITE(sc, IWN_TX_WIDX, qid << 8 | 0);
3603 1.1 ober
3604 1.1 ober /* set sched. window size */
3605 1.1 ober IWN_WRITE(sc, IWN_MEM_WADDR, base + IWN_QUEUE_OFFSET(qid));
3606 1.1 ober IWN_WRITE(sc, IWN_MEM_WDATA, 64);
3607 1.1 ober /* set sched. frame limit */
3608 1.1 ober IWN_WRITE(sc, IWN_MEM_WADDR, base + IWN_QUEUE_OFFSET(qid) + 4);
3609 1.1 ober IWN_WRITE(sc, IWN_MEM_WDATA, 64 << 16);
3610 1.1 ober }
3611 1.1 ober
3612 1.1 ober /* enable interrupts for all 16 queues */
3613 1.1 ober iwn_mem_write(sc, IWN_QUEUE_INTR_MASK, 0xffff);
3614 1.1 ober
3615 1.1 ober /* identify active Tx rings (0-7) */
3616 1.1 ober iwn_mem_write(sc, IWN_TX_ACTIVE, 0xff);
3617 1.1 ober
3618 1.1 ober /* mark Tx rings (4 EDCA + cmd + 2 HCCA) as active */
3619 1.1 ober for (qid = 0; qid < 7; qid++) {
3620 1.1 ober iwn_mem_write(sc, IWN_TXQ_STATUS(qid),
3621 1.1 ober IWN_TXQ_STATUS_ACTIVE | qid << 1);
3622 1.1 ober }
3623 1.1 ober
3624 1.1 ober iwn_mem_unlock(sc);
3625 1.1 ober }
3626 1.1 ober
3627 1.1 ober static void
3628 1.1 ober iwn_stop_master(struct iwn_softc *sc)
3629 1.1 ober {
3630 1.1 ober uint32_t tmp;
3631 1.1 ober int ntries;
3632 1.1 ober
3633 1.1 ober tmp = IWN_READ(sc, IWN_RESET);
3634 1.1 ober IWN_WRITE(sc, IWN_RESET, tmp | IWN_STOP_MASTER);
3635 1.1 ober
3636 1.1 ober tmp = IWN_READ(sc, IWN_GPIO_CTL);
3637 1.1 ober if ((tmp & IWN_GPIO_PWR_STATUS) == IWN_GPIO_PWR_SLEEP)
3638 1.15 christos return; /* already asleep */
3639 1.1 ober
3640 1.1 ober for (ntries = 0; ntries < 100; ntries++) {
3641 1.1 ober if (IWN_READ(sc, IWN_RESET) & IWN_MASTER_DISABLED)
3642 1.1 ober break;
3643 1.1 ober DELAY(10);
3644 1.1 ober }
3645 1.1 ober if (ntries == 100) {
3646 1.1 ober aprint_error_dev(sc->sc_dev, "timeout waiting for master\n");
3647 1.1 ober }
3648 1.1 ober }
3649 1.1 ober
3650 1.1 ober static int
3651 1.1 ober iwn_reset(struct iwn_softc *sc)
3652 1.1 ober {
3653 1.1 ober uint32_t tmp;
3654 1.1 ober int ntries;
3655 1.1 ober
3656 1.1 ober /* clear any pending interrupts */
3657 1.1 ober IWN_WRITE(sc, IWN_INTR, 0xffffffff);
3658 1.1 ober
3659 1.1 ober tmp = IWN_READ(sc, IWN_CHICKEN);
3660 1.1 ober IWN_WRITE(sc, IWN_CHICKEN, tmp | IWN_CHICKEN_DISLOS);
3661 1.1 ober
3662 1.1 ober tmp = IWN_READ(sc, IWN_GPIO_CTL);
3663 1.1 ober IWN_WRITE(sc, IWN_GPIO_CTL, tmp | IWN_GPIO_INIT);
3664 1.1 ober
3665 1.1 ober /* wait for clock stabilization */
3666 1.1 ober for (ntries = 0; ntries < 1000; ntries++) {
3667 1.1 ober if (IWN_READ(sc, IWN_GPIO_CTL) & IWN_GPIO_CLOCK)
3668 1.1 ober break;
3669 1.1 ober DELAY(10);
3670 1.1 ober }
3671 1.1 ober if (ntries == 1000) {
3672 1.1 ober aprint_error_dev(sc->sc_dev, "timeout waiting for clock stabilization\n");
3673 1.1 ober return ETIMEDOUT;
3674 1.1 ober }
3675 1.1 ober return 0;
3676 1.1 ober }
3677 1.1 ober
3678 1.1 ober static void
3679 1.1 ober iwn_hw_config(struct iwn_softc *sc)
3680 1.1 ober {
3681 1.1 ober uint32_t tmp, hw;
3682 1.1 ober
3683 1.1 ober /* enable interrupts mitigation */
3684 1.1 ober IWN_WRITE(sc, IWN_INTR_MIT, 512 / 32);
3685 1.1 ober
3686 1.1 ober /* voodoo from the reference driver */
3687 1.1 ober tmp = pci_conf_read(sc->sc_pct, sc->sc_pcitag, PCI_CLASS_REG);
3688 1.1 ober tmp = PCI_REVISION(tmp);
3689 1.1 ober if ((tmp & 0x80) && (tmp & 0x7f) < 8) {
3690 1.1 ober /* enable "no snoop" field */
3691 1.1 ober tmp = pci_conf_read(sc->sc_pct, sc->sc_pcitag, 0xe8);
3692 1.1 ober tmp &= ~IWN_DIS_NOSNOOP;
3693 1.1 ober pci_conf_write(sc->sc_pct, sc->sc_pcitag, 0xe8, tmp);
3694 1.1 ober }
3695 1.1 ober
3696 1.1 ober /* disable L1 entry to work around a hardware bug */
3697 1.1 ober tmp = pci_conf_read(sc->sc_pct, sc->sc_pcitag, 0xf0);
3698 1.1 ober tmp &= ~IWN_ENA_L1;
3699 1.1 ober pci_conf_write(sc->sc_pct, sc->sc_pcitag, 0xf0, tmp);
3700 1.1 ober
3701 1.1 ober hw = IWN_READ(sc, IWN_HWCONFIG);
3702 1.1 ober IWN_WRITE(sc, IWN_HWCONFIG, hw | 0x310);
3703 1.1 ober
3704 1.1 ober iwn_mem_lock(sc);
3705 1.1 ober tmp = iwn_mem_read(sc, IWN_MEM_POWER);
3706 1.1 ober iwn_mem_write(sc, IWN_MEM_POWER, tmp | IWN_POWER_RESET);
3707 1.1 ober DELAY(5);
3708 1.1 ober tmp = iwn_mem_read(sc, IWN_MEM_POWER);
3709 1.1 ober iwn_mem_write(sc, IWN_MEM_POWER, tmp & ~IWN_POWER_RESET);
3710 1.1 ober iwn_mem_unlock(sc);
3711 1.1 ober }
3712 1.1 ober
3713 1.1 ober static int
3714 1.1 ober iwn_init(struct ifnet *ifp)
3715 1.1 ober {
3716 1.1 ober struct iwn_softc *sc = ifp->if_softc;
3717 1.1 ober struct ieee80211com *ic = &sc->sc_ic;
3718 1.1 ober uint32_t tmp;
3719 1.1 ober int error, qid;
3720 1.1 ober
3721 1.1 ober iwn_stop(ifp, 1);
3722 1.1 ober if ((error = iwn_reset(sc)) != 0) {
3723 1.1 ober aprint_error_dev(sc->sc_dev, "could not reset adapter\n");
3724 1.1 ober goto fail1;
3725 1.1 ober }
3726 1.1 ober
3727 1.1 ober iwn_mem_lock(sc);
3728 1.1 ober iwn_mem_read(sc, IWN_CLOCK_CTL);
3729 1.1 ober iwn_mem_write(sc, IWN_CLOCK_CTL, 0xa00);
3730 1.1 ober iwn_mem_read(sc, IWN_CLOCK_CTL);
3731 1.1 ober iwn_mem_unlock(sc);
3732 1.1 ober
3733 1.1 ober DELAY(20);
3734 1.1 ober
3735 1.1 ober iwn_mem_lock(sc);
3736 1.1 ober tmp = iwn_mem_read(sc, IWN_MEM_PCIDEV);
3737 1.1 ober iwn_mem_write(sc, IWN_MEM_PCIDEV, tmp | 0x800);
3738 1.1 ober iwn_mem_unlock(sc);
3739 1.1 ober
3740 1.1 ober iwn_mem_lock(sc);
3741 1.1 ober tmp = iwn_mem_read(sc, IWN_MEM_POWER);
3742 1.1 ober iwn_mem_write(sc, IWN_MEM_POWER, tmp & ~0x03000000);
3743 1.1 ober iwn_mem_unlock(sc);
3744 1.1 ober
3745 1.1 ober iwn_hw_config(sc);
3746 1.1 ober
3747 1.1 ober /* init Rx ring */
3748 1.1 ober iwn_mem_lock(sc);
3749 1.1 ober IWN_WRITE(sc, IWN_RX_CONFIG, 0);
3750 1.1 ober IWN_WRITE(sc, IWN_RX_WIDX, 0);
3751 1.1 ober /* Rx ring is aligned on a 256-byte boundary */
3752 1.1 ober IWN_WRITE(sc, IWN_RX_BASE, sc->rxq.desc_dma.paddr >> 8);
3753 1.1 ober /* shared area is aligned on a 16-byte boundary */
3754 1.1 ober IWN_WRITE(sc, IWN_RW_WIDX_PTR, (sc->shared_dma.paddr +
3755 1.2 ober offsetof(struct iwn_shared, closed_count)) >> 4);
3756 1.1 ober IWN_WRITE(sc, IWN_RX_CONFIG, 0x80601000);
3757 1.1 ober iwn_mem_unlock(sc);
3758 1.1 ober
3759 1.1 ober IWN_WRITE(sc, IWN_RX_WIDX, (IWN_RX_RING_COUNT - 1) & ~7);
3760 1.1 ober
3761 1.1 ober iwn_mem_lock(sc);
3762 1.1 ober iwn_mem_write(sc, IWN_TX_ACTIVE, 0);
3763 1.1 ober
3764 1.1 ober /* set physical address of "keep warm" page */
3765 1.1 ober IWN_WRITE(sc, IWN_KW_BASE, sc->kw_dma.paddr >> 4);
3766 1.1 ober
3767 1.1 ober /* init Tx rings */
3768 1.1 ober for (qid = 0; qid < IWN_NTXQUEUES; qid++) {
3769 1.1 ober struct iwn_tx_ring *txq = &sc->txq[qid];
3770 1.1 ober IWN_WRITE(sc, IWN_TX_BASE(qid), txq->desc_dma.paddr >> 8);
3771 1.1 ober IWN_WRITE(sc, IWN_TX_CONFIG(qid), 0x80000008);
3772 1.1 ober }
3773 1.1 ober iwn_mem_unlock(sc);
3774 1.1 ober
3775 1.1 ober /* clear "radio off" and "disable command" bits (reversed logic) */
3776 1.1 ober IWN_WRITE(sc, IWN_UCODE_CLR, IWN_RADIO_OFF);
3777 1.1 ober IWN_WRITE(sc, IWN_UCODE_CLR, IWN_DISABLE_CMD);
3778 1.1 ober
3779 1.1 ober /* clear any pending interrupts */
3780 1.1 ober IWN_WRITE(sc, IWN_INTR, 0xffffffff);
3781 1.1 ober /* enable interrupts */
3782 1.1 ober IWN_WRITE(sc, IWN_MASK, IWN_INTR_MASK);
3783 1.1 ober
3784 1.1 ober /* not sure why/if this is necessary... */
3785 1.1 ober IWN_WRITE(sc, IWN_UCODE_CLR, IWN_RADIO_OFF);
3786 1.1 ober IWN_WRITE(sc, IWN_UCODE_CLR, IWN_RADIO_OFF);
3787 1.1 ober
3788 1.1 ober /* check that the radio is not disabled by RF switch */
3789 1.1 ober if (!(IWN_READ(sc, IWN_GPIO_CTL) & IWN_GPIO_RF_ENABLED)) {
3790 1.1 ober aprint_error_dev(sc->sc_dev, "radio is disabled by hardware switch\n");
3791 1.1 ober error = EBUSY; /* XXX ;-) */
3792 1.1 ober goto fail1;
3793 1.1 ober }
3794 1.1 ober
3795 1.1 ober if ((error = iwn_load_firmware(sc)) != 0) {
3796 1.1 ober aprint_error_dev(sc->sc_dev, "could not load firmware\n");
3797 1.1 ober goto fail1;
3798 1.1 ober }
3799 1.1 ober
3800 1.1 ober /* firmware has notified us that it is alive.. */
3801 1.1 ober iwn_post_alive(sc); /* ..do post alive initialization */
3802 1.1 ober
3803 1.1 ober sc->rawtemp = sc->ucode_info.temp[3].chan20MHz;
3804 1.1 ober sc->temp = iwn_get_temperature(sc);
3805 1.1 ober DPRINTF(("temperature=%d\n", sc->temp));
3806 1.8 blymn
3807 1.1 ober if ((error = iwn_config(sc)) != 0) {
3808 1.1 ober aprint_error_dev(sc->sc_dev, "could not configure device\n");
3809 1.1 ober goto fail1;
3810 1.1 ober }
3811 1.1 ober
3812 1.1 ober DPRINTF(("iwn_config end\n"));
3813 1.1 ober
3814 1.1 ober ifp->if_flags &= ~IFF_OACTIVE;
3815 1.1 ober ifp->if_flags |= IFF_RUNNING;
3816 1.1 ober
3817 1.1 ober if (ic->ic_opmode != IEEE80211_M_MONITOR) {
3818 1.13 christos if (ic->ic_roaming != IEEE80211_ROAMING_MANUAL)
3819 1.1 ober ieee80211_new_state(ic, IEEE80211_S_SCAN, -1);
3820 1.1 ober }
3821 1.1 ober else
3822 1.1 ober ieee80211_new_state(ic, IEEE80211_S_RUN, -1);
3823 1.1 ober
3824 1.1 ober DPRINTF(("iwn_init ok\n"));
3825 1.1 ober return 0;
3826 1.1 ober
3827 1.8 blymn fail1:
3828 1.1 ober DPRINTF(("iwn_init error\n"));
3829 1.1 ober iwn_stop(ifp, 1);
3830 1.1 ober return error;
3831 1.1 ober }
3832 1.1 ober
3833 1.1 ober static void
3834 1.1 ober iwn_stop(struct ifnet *ifp, int disable)
3835 1.1 ober {
3836 1.1 ober struct iwn_softc *sc = ifp->if_softc;
3837 1.1 ober struct ieee80211com *ic = &sc->sc_ic;
3838 1.1 ober uint32_t tmp;
3839 1.1 ober int i;
3840 1.1 ober
3841 1.1 ober ifp->if_timer = sc->sc_tx_timer = 0;
3842 1.1 ober ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
3843 1.1 ober
3844 1.1 ober ieee80211_new_state(ic, IEEE80211_S_INIT, -1);
3845 1.1 ober
3846 1.1 ober IWN_WRITE(sc, IWN_RESET, IWN_NEVO_RESET);
3847 1.1 ober
3848 1.1 ober /* disable interrupts */
3849 1.1 ober IWN_WRITE(sc, IWN_MASK, 0);
3850 1.1 ober IWN_WRITE(sc, IWN_INTR, 0xffffffff);
3851 1.1 ober IWN_WRITE(sc, IWN_INTR_STATUS, 0xffffffff);
3852 1.1 ober
3853 1.1 ober /* make sure we no longer hold the memory lock */
3854 1.1 ober iwn_mem_unlock(sc);
3855 1.1 ober
3856 1.1 ober /* reset all Tx rings */
3857 1.1 ober for (i = 0; i < IWN_NTXQUEUES; i++)
3858 1.1 ober iwn_reset_tx_ring(sc, &sc->txq[i]);
3859 1.1 ober
3860 1.1 ober /* reset Rx ring */
3861 1.1 ober iwn_reset_rx_ring(sc, &sc->rxq);
3862 1.1 ober
3863 1.1 ober iwn_mem_lock(sc);
3864 1.1 ober iwn_mem_write(sc, IWN_MEM_CLOCK2, 0x200);
3865 1.1 ober iwn_mem_unlock(sc);
3866 1.1 ober
3867 1.1 ober DELAY(5);
3868 1.1 ober
3869 1.1 ober iwn_stop_master(sc);
3870 1.1 ober tmp = IWN_READ(sc, IWN_RESET);
3871 1.1 ober IWN_WRITE(sc, IWN_RESET, tmp | IWN_SW_RESET);
3872 1.1 ober }
3873 1.1 ober
3874 1.1 ober static bool
3875 1.7 taca iwn_resume(device_t dv PMF_FN_ARGS)
3876 1.1 ober {
3877 1.1 ober struct iwn_softc *sc = device_private(dv);
3878 1.1 ober
3879 1.1 ober (void)iwn_reset(sc);
3880 1.1 ober
3881 1.1 ober return true;
3882 1.1 ober }
3883