if_lii.c revision 1.17.14.1
1 1.17.14.1 pgoyette /* $NetBSD: if_lii.c,v 1.17.14.1 2018/07/28 04:37:46 pgoyette Exp $ */ 2 1.1 cube 3 1.1 cube /* 4 1.1 cube * Copyright (c) 2008 The NetBSD Foundation. 5 1.1 cube * All rights reserved. 6 1.1 cube * 7 1.1 cube * Redistribution and use in source and binary forms, with or without 8 1.1 cube * modification, are permitted provided that the following conditions 9 1.1 cube * are met: 10 1.1 cube * 1. Redistributions of source code must retain the above copyright 11 1.1 cube * notice, this list of conditions and the following disclaimer. 12 1.1 cube * 2. Redistributions in binary form must reproduce the above copyright 13 1.1 cube * notice, this list of conditions and the following disclaimer in the 14 1.1 cube * documentation and/or other materials provided with the distribution. 15 1.1 cube * 16 1.1 cube * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 17 1.1 cube * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 1.1 cube * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 1.1 cube * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 20 1.1 cube * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 1.1 cube * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 1.1 cube * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 1.1 cube * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 1.1 cube * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 1.1 cube * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 1.1 cube * POSSIBILITY OF SUCH DAMAGE. 27 1.1 cube */ 28 1.1 cube 29 1.1 cube /* 30 1.1 cube * Driver for Attansic/Atheros's L2 Fast Ethernet controller 31 1.1 cube */ 32 1.1 cube 33 1.1 cube #include <sys/cdefs.h> 34 1.17.14.1 pgoyette __KERNEL_RCSID(0, "$NetBSD: if_lii.c,v 1.17.14.1 2018/07/28 04:37:46 pgoyette Exp $"); 35 1.1 cube 36 1.1 cube 37 1.1 cube #include <sys/param.h> 38 1.1 cube #include <sys/systm.h> 39 1.1 cube #include <sys/types.h> 40 1.1 cube #include <sys/device.h> 41 1.1 cube #include <sys/endian.h> 42 1.1 cube #include <sys/kernel.h> 43 1.1 cube #include <sys/sockio.h> 44 1.1 cube 45 1.1 cube #include <net/if.h> 46 1.1 cube #include <net/if_media.h> 47 1.1 cube #include <net/if_ether.h> 48 1.1 cube 49 1.1 cube #include <net/bpf.h> 50 1.1 cube 51 1.1 cube #include <dev/mii/mii.h> 52 1.1 cube #include <dev/mii/miivar.h> 53 1.1 cube 54 1.1 cube #include <dev/pci/pcireg.h> 55 1.1 cube #include <dev/pci/pcivar.h> 56 1.1 cube #include <dev/pci/pcidevs.h> 57 1.1 cube 58 1.1 cube #include <dev/pci/if_liireg.h> 59 1.1 cube 60 1.1 cube /* #define LII_DEBUG */ 61 1.1 cube #ifdef LII_DEBUG 62 1.1 cube #define DPRINTF(x) printf x 63 1.1 cube #else 64 1.1 cube #define DPRINTF(x) 65 1.1 cube #endif 66 1.1 cube 67 1.1 cube struct lii_softc { 68 1.1 cube device_t sc_dev; 69 1.1 cube pci_chipset_tag_t sc_pc; 70 1.1 cube pcitag_t sc_tag; 71 1.1 cube 72 1.1 cube bus_space_tag_t sc_mmiot; 73 1.1 cube bus_space_handle_t sc_mmioh; 74 1.1 cube 75 1.1 cube /* 76 1.1 cube * We allocate a big chunk of DMA-safe memory for all data exchanges. 77 1.1 cube * It is unfortunate that this chip doesn't seem to do scatter-gather. 78 1.1 cube */ 79 1.1 cube bus_dma_tag_t sc_dmat; 80 1.1 cube bus_dmamap_t sc_ringmap; 81 1.1 cube bus_dma_segment_t sc_ringseg; 82 1.1 cube 83 1.1 cube uint8_t *sc_ring; /* the whole area */ 84 1.1 cube size_t sc_ringsize; 85 1.1 cube 86 1.1 cube struct rx_pkt *sc_rxp; /* the part used for RX */ 87 1.1 cube struct tx_pkt_status *sc_txs; /* the parts used for TX */ 88 1.1 cube bus_addr_t sc_txsp; 89 1.1 cube char *sc_txdbase; 90 1.1 cube bus_addr_t sc_txdp; 91 1.1 cube 92 1.1 cube unsigned int sc_rxcur; 93 1.1 cube /* the active area is [ack; cur[ */ 94 1.1 cube int sc_txs_cur; 95 1.1 cube int sc_txs_ack; 96 1.1 cube int sc_txd_cur; 97 1.1 cube int sc_txd_ack; 98 1.1 cube bool sc_free_tx_slots; 99 1.1 cube 100 1.1 cube void *sc_ih; 101 1.1 cube 102 1.1 cube struct ethercom sc_ec; 103 1.1 cube struct mii_data sc_mii; 104 1.1 cube callout_t sc_tick_ch; 105 1.1 cube uint8_t sc_eaddr[ETHER_ADDR_LEN]; 106 1.1 cube 107 1.1 cube int (*sc_memread)(struct lii_softc *, uint32_t, 108 1.1 cube uint32_t *); 109 1.1 cube }; 110 1.1 cube 111 1.1 cube static int lii_match(device_t, cfdata_t, void *); 112 1.1 cube static void lii_attach(device_t, device_t, void *); 113 1.1 cube 114 1.1 cube static int lii_reset(struct lii_softc *); 115 1.1 cube static bool lii_eeprom_present(struct lii_softc *); 116 1.1 cube static int lii_read_macaddr(struct lii_softc *, uint8_t *); 117 1.1 cube static int lii_eeprom_read(struct lii_softc *, uint32_t, uint32_t *); 118 1.1 cube static void lii_spi_configure(struct lii_softc *); 119 1.1 cube static int lii_spi_read(struct lii_softc *, uint32_t, uint32_t *); 120 1.1 cube static void lii_setmulti(struct lii_softc *); 121 1.1 cube static void lii_tick(void *); 122 1.1 cube 123 1.1 cube static int lii_alloc_rings(struct lii_softc *); 124 1.1 cube static int lii_free_tx_space(struct lii_softc *); 125 1.1 cube 126 1.1 cube static int lii_mii_readreg(device_t, int, int); 127 1.1 cube static void lii_mii_writereg(device_t, int, int, int); 128 1.11 matt static void lii_mii_statchg(struct ifnet *); 129 1.1 cube 130 1.1 cube static int lii_media_change(struct ifnet *); 131 1.1 cube static void lii_media_status(struct ifnet *, struct ifmediareq *); 132 1.1 cube 133 1.1 cube static int lii_init(struct ifnet *); 134 1.1 cube static void lii_start(struct ifnet *); 135 1.1 cube static void lii_stop(struct ifnet *, int); 136 1.1 cube static void lii_watchdog(struct ifnet *); 137 1.1 cube static int lii_ioctl(struct ifnet *, u_long, void *); 138 1.1 cube 139 1.1 cube static int lii_intr(void *); 140 1.1 cube static void lii_rxintr(struct lii_softc *); 141 1.1 cube static void lii_txintr(struct lii_softc *); 142 1.1 cube 143 1.1 cube CFATTACH_DECL_NEW(lii, sizeof(struct lii_softc), 144 1.1 cube lii_match, lii_attach, NULL, NULL); 145 1.1 cube 146 1.1 cube /* #define LII_DEBUG_REGS */ 147 1.1 cube #ifndef LII_DEBUG_REGS 148 1.1 cube #define AT_READ_4(sc,reg) \ 149 1.1 cube bus_space_read_4((sc)->sc_mmiot, (sc)->sc_mmioh, (reg)) 150 1.1 cube #define AT_READ_2(sc,reg) \ 151 1.1 cube bus_space_read_2((sc)->sc_mmiot, (sc)->sc_mmioh, (reg)) 152 1.1 cube #define AT_READ_1(sc,reg) \ 153 1.1 cube bus_space_read_1((sc)->sc_mmiot, (sc)->sc_mmioh, (reg)) 154 1.1 cube #define AT_WRITE_4(sc,reg,val) \ 155 1.1 cube bus_space_write_4((sc)->sc_mmiot, (sc)->sc_mmioh, (reg), (val)) 156 1.1 cube #define AT_WRITE_2(sc,reg,val) \ 157 1.1 cube bus_space_write_2((sc)->sc_mmiot, (sc)->sc_mmioh, (reg), (val)) 158 1.1 cube #define AT_WRITE_1(sc,reg,val) \ 159 1.1 cube bus_space_write_1((sc)->sc_mmiot, (sc)->sc_mmioh, (reg), (val)) 160 1.1 cube #else 161 1.1 cube static inline uint32_t 162 1.1 cube AT_READ_4(struct lii_softc *sc, bus_size_t reg) 163 1.1 cube { 164 1.1 cube uint32_t r = bus_space_read_4(sc->sc_mmiot, sc->sc_mmioh, reg); 165 1.1 cube printf("AT_READ_4(%x) = %x\n", (unsigned int)reg, r); 166 1.1 cube return r; 167 1.1 cube } 168 1.1 cube 169 1.1 cube static inline uint16_t 170 1.1 cube AT_READ_2(struct lii_softc *sc, bus_size_t reg) 171 1.1 cube { 172 1.1 cube uint16_t r = bus_space_read_2(sc->sc_mmiot, sc->sc_mmioh, reg); 173 1.1 cube printf("AT_READ_2(%x) = %x\n", (unsigned int)reg, r); 174 1.1 cube return r; 175 1.1 cube } 176 1.1 cube 177 1.1 cube static inline uint8_t 178 1.1 cube AT_READ_1(struct lii_softc *sc, bus_size_t reg) 179 1.1 cube { 180 1.1 cube uint8_t r = bus_space_read_1(sc->sc_mmiot, sc->sc_mmioh, reg); 181 1.1 cube printf("AT_READ_1(%x) = %x\n", (unsigned int)reg, r); 182 1.1 cube return r; 183 1.1 cube } 184 1.1 cube 185 1.1 cube static inline void 186 1.1 cube AT_WRITE_4(struct lii_softc *sc, bus_size_t reg, uint32_t val) 187 1.1 cube { 188 1.1 cube printf("AT_WRITE_4(%x, %x)\n", (unsigned int)reg, val); 189 1.1 cube bus_space_write_4(sc->sc_mmiot, sc->sc_mmioh, reg, val); 190 1.1 cube } 191 1.1 cube 192 1.1 cube static inline void 193 1.1 cube AT_WRITE_2(struct lii_softc *sc, bus_size_t reg, uint16_t val) 194 1.1 cube { 195 1.1 cube printf("AT_WRITE_2(%x, %x)\n", (unsigned int)reg, val); 196 1.1 cube bus_space_write_2(sc->sc_mmiot, sc->sc_mmioh, reg, val); 197 1.1 cube } 198 1.1 cube 199 1.1 cube static inline void 200 1.1 cube AT_WRITE_1(struct lii_softc *sc, bus_size_t reg, uint8_t val) 201 1.1 cube { 202 1.1 cube printf("AT_WRITE_1(%x, %x)\n", (unsigned int)reg, val); 203 1.1 cube bus_space_write_1(sc->sc_mmiot, sc->sc_mmioh, reg, val); 204 1.1 cube } 205 1.1 cube #endif 206 1.1 cube 207 1.1 cube /* 208 1.1 cube * Those are the default Linux parameters. 209 1.1 cube */ 210 1.1 cube 211 1.1 cube #define AT_TXD_NUM 64 212 1.1 cube #define AT_TXD_BUFFER_SIZE 8192 213 1.1 cube #define AT_RXD_NUM 64 214 1.1 cube 215 1.1 cube /* 216 1.1 cube * Assuming (you know what that word makes of you) the chunk of memory 217 1.1 cube * bus_dmamem_alloc returns us is 128-byte aligned, we won't use the 218 1.1 cube * first 120 bytes of it, so that the space for the packets, and not the 219 1.1 cube * whole descriptors themselves, are on a 128-byte boundary. 220 1.1 cube */ 221 1.1 cube 222 1.1 cube #define AT_RXD_PADDING 120 223 1.1 cube 224 1.1 cube static int 225 1.1 cube lii_match(device_t parent, cfdata_t cfmatch, void *aux) 226 1.1 cube { 227 1.1 cube struct pci_attach_args *pa = aux; 228 1.1 cube 229 1.1 cube return (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ATTANSIC && 230 1.1 cube PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ATTANSIC_ETHERNET_100); 231 1.1 cube } 232 1.1 cube 233 1.1 cube static void 234 1.1 cube lii_attach(device_t parent, device_t self, void *aux) 235 1.1 cube { 236 1.1 cube struct lii_softc *sc = device_private(self); 237 1.1 cube struct pci_attach_args *pa = aux; 238 1.1 cube uint8_t eaddr[ETHER_ADDR_LEN]; 239 1.1 cube struct ifnet *ifp = &sc->sc_ec.ec_if; 240 1.1 cube pci_intr_handle_t ih; 241 1.1 cube const char *intrstr; 242 1.1 cube pcireg_t cmd; 243 1.6 cegger bus_size_t memsize = 0; 244 1.13 christos char intrbuf[PCI_INTRSTR_LEN]; 245 1.1 cube 246 1.1 cube aprint_naive("\n"); 247 1.1 cube aprint_normal(": Attansic/Atheros L2 Fast Ethernet\n"); 248 1.1 cube 249 1.1 cube sc->sc_dev = self; 250 1.1 cube sc->sc_pc = pa->pa_pc; 251 1.1 cube sc->sc_tag = pa->pa_tag; 252 1.1 cube sc->sc_dmat = pa->pa_dmat; 253 1.1 cube 254 1.1 cube cmd = pci_conf_read(sc->sc_pc, sc->sc_tag, PCI_COMMAND_STATUS_REG); 255 1.1 cube cmd |= PCI_COMMAND_MEM_ENABLE | PCI_COMMAND_MASTER_ENABLE; 256 1.1 cube cmd &= ~PCI_COMMAND_IO_ENABLE; 257 1.1 cube pci_conf_write(sc->sc_pc, sc->sc_tag, PCI_COMMAND_STATUS_REG, cmd); 258 1.1 cube 259 1.1 cube switch (cmd = pci_mapreg_type(sc->sc_pc, sc->sc_tag, PCI_MAPREG_START)) { 260 1.1 cube case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT: 261 1.1 cube case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT_1M: 262 1.1 cube case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_64BIT: 263 1.1 cube break; 264 1.1 cube default: 265 1.1 cube aprint_error_dev(self, "invalid base address register\n"); 266 1.1 cube break; 267 1.1 cube } 268 1.1 cube if (pci_mapreg_map(pa, PCI_MAPREG_START, cmd, 0, 269 1.6 cegger &sc->sc_mmiot, &sc->sc_mmioh, NULL, &memsize) != 0) { 270 1.1 cube aprint_error_dev(self, "failed to map registers\n"); 271 1.1 cube return; 272 1.1 cube } 273 1.1 cube 274 1.1 cube if (lii_reset(sc)) 275 1.1 cube return; 276 1.1 cube 277 1.1 cube lii_spi_configure(sc); 278 1.1 cube 279 1.1 cube if (lii_eeprom_present(sc)) 280 1.1 cube sc->sc_memread = lii_eeprom_read; 281 1.1 cube else 282 1.1 cube sc->sc_memread = lii_spi_read; 283 1.1 cube 284 1.1 cube if (lii_read_macaddr(sc, eaddr)) 285 1.1 cube return; 286 1.1 cube memcpy(sc->sc_eaddr, eaddr, ETHER_ADDR_LEN); 287 1.1 cube 288 1.1 cube aprint_normal_dev(self, "Ethernet address %s\n", 289 1.1 cube ether_sprintf(eaddr)); 290 1.1 cube 291 1.1 cube if (pci_intr_map(pa, &ih) != 0) { 292 1.1 cube aprint_error_dev(self, "failed to map interrupt\n"); 293 1.6 cegger goto fail; 294 1.1 cube } 295 1.13 christos intrstr = pci_intr_string(sc->sc_pc, ih, intrbuf, sizeof(intrbuf)); 296 1.1 cube sc->sc_ih = pci_intr_establish(sc->sc_pc, ih, IPL_NET, lii_intr, sc); 297 1.1 cube if (sc->sc_ih == NULL) { 298 1.1 cube aprint_error_dev(self, "failed to establish interrupt"); 299 1.1 cube if (intrstr != NULL) 300 1.1 cube aprint_error(" at %s", intrstr); 301 1.1 cube aprint_error("\n"); 302 1.6 cegger goto fail; 303 1.1 cube } 304 1.1 cube aprint_normal_dev(self, "interrupting at %s\n", intrstr); 305 1.1 cube 306 1.6 cegger if (lii_alloc_rings(sc)) 307 1.6 cegger goto fail; 308 1.1 cube 309 1.1 cube callout_init(&sc->sc_tick_ch, 0); 310 1.1 cube callout_setfunc(&sc->sc_tick_ch, lii_tick, sc); 311 1.1 cube 312 1.1 cube sc->sc_mii.mii_ifp = ifp; 313 1.1 cube sc->sc_mii.mii_readreg = lii_mii_readreg; 314 1.1 cube sc->sc_mii.mii_writereg = lii_mii_writereg; 315 1.1 cube sc->sc_mii.mii_statchg = lii_mii_statchg; 316 1.1 cube ifmedia_init(&sc->sc_mii.mii_media, IFM_IMASK, lii_media_change, 317 1.1 cube lii_media_status); 318 1.1 cube mii_attach(sc->sc_dev, &sc->sc_mii, 0xffffffff, 1, 319 1.1 cube MII_OFFSET_ANY, 0); 320 1.1 cube ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO); 321 1.1 cube 322 1.1 cube strlcpy(ifp->if_xname, device_xname(self), IFNAMSIZ); 323 1.1 cube ifp->if_softc = sc; 324 1.1 cube ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 325 1.1 cube ifp->if_ioctl = lii_ioctl; 326 1.1 cube ifp->if_start = lii_start; 327 1.1 cube ifp->if_watchdog = lii_watchdog; 328 1.1 cube ifp->if_init = lii_init; 329 1.1 cube ifp->if_stop = lii_stop; 330 1.1 cube IFQ_SET_READY(&ifp->if_snd); 331 1.1 cube 332 1.1 cube /* 333 1.1 cube * While the device does support HW VLAN tagging, there is no 334 1.1 cube * real point using that feature. 335 1.1 cube */ 336 1.1 cube sc->sc_ec.ec_capabilities = ETHERCAP_VLAN_MTU; 337 1.1 cube 338 1.1 cube if_attach(ifp); 339 1.16 ozaki if_deferred_start_init(ifp, NULL); 340 1.1 cube ether_ifattach(ifp, eaddr); 341 1.1 cube 342 1.7 tsutsui if (pmf_device_register(self, NULL, NULL)) 343 1.7 tsutsui pmf_class_network_register(self, ifp); 344 1.7 tsutsui else 345 1.2 mjf aprint_error_dev(self, "couldn't establish power handler\n"); 346 1.2 mjf 347 1.1 cube return; 348 1.6 cegger 349 1.6 cegger fail: 350 1.6 cegger if (sc->sc_ih != NULL) { 351 1.6 cegger pci_intr_disestablish(sc->sc_pc, sc->sc_ih); 352 1.6 cegger sc->sc_ih = NULL; 353 1.6 cegger } 354 1.6 cegger if (memsize) 355 1.6 cegger bus_space_unmap(sc->sc_mmiot, sc->sc_mmioh, memsize); 356 1.1 cube } 357 1.1 cube 358 1.1 cube static int 359 1.1 cube lii_reset(struct lii_softc *sc) 360 1.1 cube { 361 1.1 cube int i; 362 1.1 cube 363 1.1 cube DPRINTF(("lii_reset\n")); 364 1.1 cube 365 1.1 cube AT_WRITE_4(sc, ATL2_SMC, SMC_SOFT_RST); 366 1.1 cube DELAY(1000); 367 1.1 cube 368 1.1 cube for (i = 0; i < 10; ++i) { 369 1.1 cube if (AT_READ_4(sc, ATL2_BIS) == 0) 370 1.1 cube break; 371 1.1 cube DELAY(1000); 372 1.1 cube } 373 1.1 cube 374 1.1 cube if (i == 10) { 375 1.1 cube aprint_error_dev(sc->sc_dev, "reset failed\n"); 376 1.1 cube return 1; 377 1.1 cube } 378 1.1 cube 379 1.1 cube AT_WRITE_4(sc, ATL2_PHYC, PHYC_ENABLE); 380 1.1 cube DELAY(10); 381 1.1 cube 382 1.1 cube /* Init PCI-Express module */ 383 1.1 cube /* Magic Numbers Warning */ 384 1.1 cube AT_WRITE_4(sc, ATL2_PCELTM, PCELTM_DEF); 385 1.1 cube AT_WRITE_4(sc, ATL2_PCEDTXC, PCEDTX_DEF); 386 1.1 cube 387 1.1 cube return 0; 388 1.1 cube } 389 1.1 cube 390 1.1 cube static bool 391 1.1 cube lii_eeprom_present(struct lii_softc *sc) 392 1.1 cube { 393 1.1 cube /* 394 1.1 cube * The Linux driver does this, but then it has a very weird way of 395 1.1 cube * checking whether the PCI configuration space exposes the Vital 396 1.1 cube * Product Data capability, so maybe it's not really needed. 397 1.1 cube */ 398 1.1 cube 399 1.1 cube #ifdef weirdloonix 400 1.1 cube uint32_t val; 401 1.1 cube 402 1.1 cube val = AT_READ_4(sc, ATL2_SFC); 403 1.1 cube if (val & SFC_EN_VPD) 404 1.1 cube AT_WRITE_4(sc, ATL2_SFC, val & ~(SFC_EN_VPD)); 405 1.1 cube #endif 406 1.1 cube 407 1.1 cube return pci_get_capability(sc->sc_pc, sc->sc_tag, PCI_CAP_VPD, 408 1.1 cube NULL, NULL) == 1; 409 1.1 cube } 410 1.1 cube 411 1.1 cube static int 412 1.1 cube lii_eeprom_read(struct lii_softc *sc, uint32_t reg, uint32_t *val) 413 1.1 cube { 414 1.1 cube int r = pci_vpd_read(sc->sc_pc, sc->sc_tag, reg, 1, (pcireg_t *)val); 415 1.1 cube 416 1.1 cube DPRINTF(("lii_eeprom_read(%x) = %x\n", reg, *val)); 417 1.1 cube 418 1.1 cube return r; 419 1.1 cube } 420 1.1 cube 421 1.1 cube static void 422 1.1 cube lii_spi_configure(struct lii_softc *sc) 423 1.1 cube { 424 1.1 cube /* 425 1.1 cube * We don't offer a way to configure the SPI Flash vendor parameter, so 426 1.1 cube * the table is given for reference 427 1.1 cube */ 428 1.1 cube static const struct lii_spi_flash_vendor { 429 1.1 cube const char *sfv_name; 430 1.1 cube const uint8_t sfv_opcodes[9]; 431 1.1 cube } lii_sfv[] = { 432 1.1 cube { "Atmel", { 0x00, 0x03, 0x02, 0x06, 0x04, 0x05, 0x15, 0x52, 0x62 } }, 433 1.1 cube { "SST", { 0x01, 0x03, 0x02, 0x06, 0x04, 0x05, 0x90, 0x20, 0x60 } }, 434 1.1 cube { "ST", { 0x01, 0x03, 0x02, 0x06, 0x04, 0x05, 0xab, 0xd8, 0xc7 } }, 435 1.1 cube }; 436 1.1 cube #define SF_OPCODE_WRSR 0 437 1.1 cube #define SF_OPCODE_READ 1 438 1.1 cube #define SF_OPCODE_PRGM 2 439 1.1 cube #define SF_OPCODE_WREN 3 440 1.1 cube #define SF_OPCODE_WRDI 4 441 1.1 cube #define SF_OPCODE_RDSR 5 442 1.1 cube #define SF_OPCODE_RDID 6 443 1.1 cube #define SF_OPCODE_SECT_ER 7 444 1.1 cube #define SF_OPCODE_CHIP_ER 8 445 1.1 cube 446 1.1 cube #define SF_DEFAULT_VENDOR 0 447 1.1 cube static const uint8_t vendor = SF_DEFAULT_VENDOR; 448 1.1 cube 449 1.1 cube /* 450 1.1 cube * Why isn't WRDI used? Heck if I know. 451 1.1 cube */ 452 1.1 cube 453 1.1 cube AT_WRITE_1(sc, ATL2_SFOP_WRSR, 454 1.1 cube lii_sfv[vendor].sfv_opcodes[SF_OPCODE_WRSR]); 455 1.1 cube AT_WRITE_1(sc, ATL2_SFOP_READ, 456 1.1 cube lii_sfv[vendor].sfv_opcodes[SF_OPCODE_READ]); 457 1.1 cube AT_WRITE_1(sc, ATL2_SFOP_PROGRAM, 458 1.1 cube lii_sfv[vendor].sfv_opcodes[SF_OPCODE_PRGM]); 459 1.1 cube AT_WRITE_1(sc, ATL2_SFOP_WREN, 460 1.1 cube lii_sfv[vendor].sfv_opcodes[SF_OPCODE_WREN]); 461 1.1 cube AT_WRITE_1(sc, ATL2_SFOP_RDSR, 462 1.1 cube lii_sfv[vendor].sfv_opcodes[SF_OPCODE_RDSR]); 463 1.1 cube AT_WRITE_1(sc, ATL2_SFOP_RDID, 464 1.1 cube lii_sfv[vendor].sfv_opcodes[SF_OPCODE_RDID]); 465 1.1 cube AT_WRITE_1(sc, ATL2_SFOP_SC_ERASE, 466 1.1 cube lii_sfv[vendor].sfv_opcodes[SF_OPCODE_SECT_ER]); 467 1.1 cube AT_WRITE_1(sc, ATL2_SFOP_CHIP_ERASE, 468 1.1 cube lii_sfv[vendor].sfv_opcodes[SF_OPCODE_CHIP_ER]); 469 1.1 cube } 470 1.1 cube 471 1.1 cube #define MAKE_SFC(cssetup, clkhi, clklo, cshold, cshi, ins) \ 472 1.1 cube ( (((cssetup) & SFC_CS_SETUP_MASK) \ 473 1.1 cube << SFC_CS_SETUP_SHIFT) \ 474 1.1 cube | (((clkhi) & SFC_CLK_HI_MASK) \ 475 1.1 cube << SFC_CLK_HI_SHIFT) \ 476 1.1 cube | (((clklo) & SFC_CLK_LO_MASK) \ 477 1.1 cube << SFC_CLK_LO_SHIFT) \ 478 1.1 cube | (((cshold) & SFC_CS_HOLD_MASK) \ 479 1.1 cube << SFC_CS_HOLD_SHIFT) \ 480 1.1 cube | (((cshi) & SFC_CS_HI_MASK) \ 481 1.1 cube << SFC_CS_HI_SHIFT) \ 482 1.1 cube | (((ins) & SFC_INS_MASK) \ 483 1.1 cube << SFC_INS_SHIFT)) 484 1.1 cube 485 1.1 cube /* Magic settings from the Linux driver */ 486 1.1 cube 487 1.1 cube #define CUSTOM_SPI_CS_SETUP 2 488 1.1 cube #define CUSTOM_SPI_CLK_HI 2 489 1.1 cube #define CUSTOM_SPI_CLK_LO 2 490 1.1 cube #define CUSTOM_SPI_CS_HOLD 2 491 1.1 cube #define CUSTOM_SPI_CS_HI 3 492 1.1 cube 493 1.1 cube static int 494 1.1 cube lii_spi_read(struct lii_softc *sc, uint32_t reg, uint32_t *val) 495 1.1 cube { 496 1.1 cube uint32_t v; 497 1.1 cube int i; 498 1.1 cube 499 1.1 cube AT_WRITE_4(sc, ATL2_SF_DATA, 0); 500 1.1 cube AT_WRITE_4(sc, ATL2_SF_ADDR, reg); 501 1.1 cube 502 1.1 cube v = SFC_WAIT_READY | 503 1.1 cube MAKE_SFC(CUSTOM_SPI_CS_SETUP, CUSTOM_SPI_CLK_HI, 504 1.1 cube CUSTOM_SPI_CLK_LO, CUSTOM_SPI_CS_HOLD, CUSTOM_SPI_CS_HI, 1); 505 1.1 cube 506 1.1 cube AT_WRITE_4(sc, ATL2_SFC, v); 507 1.1 cube v |= SFC_START; 508 1.1 cube AT_WRITE_4(sc, ATL2_SFC, v); 509 1.1 cube 510 1.1 cube for (i = 0; i < 10; ++i) { 511 1.1 cube DELAY(1000); 512 1.1 cube if (!(AT_READ_4(sc, ATL2_SFC) & SFC_START)) 513 1.1 cube break; 514 1.1 cube } 515 1.1 cube if (i == 10) 516 1.1 cube return EBUSY; 517 1.1 cube 518 1.1 cube *val = AT_READ_4(sc, ATL2_SF_DATA); 519 1.1 cube return 0; 520 1.1 cube } 521 1.1 cube 522 1.1 cube static int 523 1.1 cube lii_read_macaddr(struct lii_softc *sc, uint8_t *ea) 524 1.1 cube { 525 1.1 cube uint32_t offset = 0x100; 526 1.1 cube uint32_t val, val1, addr0 = 0, addr1 = 0; 527 1.1 cube uint8_t found = 0; 528 1.1 cube 529 1.1 cube while ((*sc->sc_memread)(sc, offset, &val) == 0) { 530 1.1 cube offset += 4; 531 1.1 cube 532 1.1 cube /* Each chunk of data starts with a signature */ 533 1.1 cube if ((val & 0xff) != 0x5a) 534 1.1 cube break; 535 1.1 cube if ((*sc->sc_memread)(sc, offset, &val1)) 536 1.1 cube break; 537 1.1 cube 538 1.1 cube offset += 4; 539 1.1 cube 540 1.1 cube val >>= 16; 541 1.1 cube switch (val) { 542 1.1 cube case ATL2_MAC_ADDR_0: 543 1.1 cube addr0 = val1; 544 1.1 cube ++found; 545 1.1 cube break; 546 1.1 cube case ATL2_MAC_ADDR_1: 547 1.1 cube addr1 = val1; 548 1.1 cube ++found; 549 1.1 cube break; 550 1.1 cube default: 551 1.1 cube continue; 552 1.1 cube } 553 1.1 cube } 554 1.1 cube 555 1.1 cube if (found < 2) { 556 1.10 christos /* Make sure we try the BIOS method before giving up */ 557 1.1 cube addr0 = htole32(AT_READ_4(sc, ATL2_MAC_ADDR_0)); 558 1.1 cube addr1 = htole32(AT_READ_4(sc, ATL2_MAC_ADDR_1)); 559 1.10 christos if ((addr0 == 0xffffff && (addr1 & 0xffff) == 0xffff) || 560 1.10 christos (addr0 == 0 && (addr1 & 0xffff) == 0)) { 561 1.10 christos aprint_error_dev(sc->sc_dev, 562 1.10 christos "error reading MAC address\n"); 563 1.10 christos return 1; 564 1.10 christos } 565 1.10 christos } else { 566 1.10 christos addr0 = htole32(addr0); 567 1.10 christos addr1 = htole32(addr1); 568 1.1 cube } 569 1.1 cube 570 1.1 cube ea[0] = (addr1 & 0x0000ff00) >> 8; 571 1.1 cube ea[1] = (addr1 & 0x000000ff); 572 1.1 cube ea[2] = (addr0 & 0xff000000) >> 24; 573 1.1 cube ea[3] = (addr0 & 0x00ff0000) >> 16; 574 1.1 cube ea[4] = (addr0 & 0x0000ff00) >> 8; 575 1.1 cube ea[5] = (addr0 & 0x000000ff); 576 1.1 cube 577 1.1 cube return 0; 578 1.1 cube } 579 1.1 cube 580 1.1 cube static int 581 1.1 cube lii_mii_readreg(device_t dev, int phy, int reg) 582 1.1 cube { 583 1.1 cube struct lii_softc *sc = device_private(dev); 584 1.1 cube uint32_t val; 585 1.1 cube int i; 586 1.1 cube 587 1.1 cube val = (reg & MDIOC_REG_MASK) << MDIOC_REG_SHIFT; 588 1.1 cube 589 1.1 cube val |= MDIOC_START | MDIOC_SUP_PREAMBLE; 590 1.1 cube val |= MDIOC_CLK_25_4 << MDIOC_CLK_SEL_SHIFT; 591 1.1 cube 592 1.1 cube val |= MDIOC_READ; 593 1.1 cube 594 1.1 cube AT_WRITE_4(sc, ATL2_MDIOC, val); 595 1.1 cube 596 1.1 cube for (i = 0; i < MDIO_WAIT_TIMES; ++i) { 597 1.1 cube DELAY(2); 598 1.1 cube val = AT_READ_4(sc, ATL2_MDIOC); 599 1.1 cube if ((val & (MDIOC_START | MDIOC_BUSY)) == 0) 600 1.1 cube break; 601 1.1 cube } 602 1.1 cube 603 1.1 cube if (i == MDIO_WAIT_TIMES) 604 1.1 cube aprint_error_dev(dev, "timeout reading PHY %d reg %d\n", phy, 605 1.1 cube reg); 606 1.1 cube 607 1.1 cube return (val & 0x0000ffff); 608 1.1 cube } 609 1.1 cube 610 1.1 cube static void 611 1.1 cube lii_mii_writereg(device_t dev, int phy, int reg, int data) 612 1.1 cube { 613 1.1 cube struct lii_softc *sc = device_private(dev); 614 1.1 cube uint32_t val; 615 1.1 cube int i; 616 1.1 cube 617 1.1 cube val = (reg & MDIOC_REG_MASK) << MDIOC_REG_SHIFT; 618 1.1 cube val |= (data & MDIOC_DATA_MASK) << MDIOC_DATA_SHIFT; 619 1.1 cube 620 1.1 cube val |= MDIOC_START | MDIOC_SUP_PREAMBLE; 621 1.1 cube val |= MDIOC_CLK_25_4 << MDIOC_CLK_SEL_SHIFT; 622 1.1 cube 623 1.1 cube /* val |= MDIOC_WRITE; */ 624 1.1 cube 625 1.1 cube AT_WRITE_4(sc, ATL2_MDIOC, val); 626 1.1 cube 627 1.1 cube for (i = 0; i < MDIO_WAIT_TIMES; ++i) { 628 1.1 cube DELAY(2); 629 1.1 cube val = AT_READ_4(sc, ATL2_MDIOC); 630 1.1 cube if ((val & (MDIOC_START | MDIOC_BUSY)) == 0) 631 1.1 cube break; 632 1.1 cube } 633 1.1 cube 634 1.1 cube if (i == MDIO_WAIT_TIMES) 635 1.1 cube aprint_error_dev(dev, "timeout writing PHY %d reg %d\n", phy, 636 1.1 cube reg); 637 1.1 cube } 638 1.1 cube 639 1.1 cube static void 640 1.11 matt lii_mii_statchg(struct ifnet *ifp) 641 1.1 cube { 642 1.11 matt struct lii_softc *sc = ifp->if_softc; 643 1.1 cube uint32_t val; 644 1.1 cube 645 1.1 cube DPRINTF(("lii_mii_statchg\n")); 646 1.1 cube 647 1.1 cube val = AT_READ_4(sc, ATL2_MACC); 648 1.1 cube 649 1.1 cube if ((sc->sc_mii.mii_media_active & IFM_GMASK) == IFM_FDX) 650 1.1 cube val |= MACC_FDX; 651 1.1 cube else 652 1.1 cube val &= ~MACC_FDX; 653 1.1 cube 654 1.1 cube AT_WRITE_4(sc, ATL2_MACC, val); 655 1.1 cube } 656 1.1 cube 657 1.1 cube static int 658 1.1 cube lii_media_change(struct ifnet *ifp) 659 1.1 cube { 660 1.1 cube struct lii_softc *sc = ifp->if_softc; 661 1.1 cube 662 1.1 cube DPRINTF(("lii_media_change\n")); 663 1.1 cube 664 1.1 cube if (ifp->if_flags & IFF_UP) 665 1.1 cube mii_mediachg(&sc->sc_mii); 666 1.1 cube return 0; 667 1.1 cube } 668 1.1 cube 669 1.1 cube static void 670 1.1 cube lii_media_status(struct ifnet *ifp, struct ifmediareq *imr) 671 1.1 cube { 672 1.1 cube struct lii_softc *sc = ifp->if_softc; 673 1.1 cube 674 1.1 cube DPRINTF(("lii_media_status\n")); 675 1.1 cube 676 1.1 cube mii_pollstat(&sc->sc_mii); 677 1.1 cube imr->ifm_status = sc->sc_mii.mii_media_status; 678 1.1 cube imr->ifm_active = sc->sc_mii.mii_media_active; 679 1.1 cube } 680 1.1 cube 681 1.1 cube static int 682 1.1 cube lii_init(struct ifnet *ifp) 683 1.1 cube { 684 1.1 cube struct lii_softc *sc = ifp->if_softc; 685 1.1 cube uint32_t val; 686 1.1 cube int error; 687 1.1 cube 688 1.1 cube DPRINTF(("lii_init\n")); 689 1.1 cube 690 1.1 cube lii_stop(ifp, 0); 691 1.1 cube 692 1.1 cube memset(sc->sc_ring, 0, sc->sc_ringsize); 693 1.1 cube 694 1.1 cube /* Disable all interrupts */ 695 1.1 cube AT_WRITE_4(sc, ATL2_ISR, 0xffffffff); 696 1.1 cube 697 1.1 cube /* XXX endianness */ 698 1.1 cube AT_WRITE_4(sc, ATL2_MAC_ADDR_0, 699 1.1 cube sc->sc_eaddr[2] << 24 | 700 1.1 cube sc->sc_eaddr[3] << 16 | 701 1.1 cube sc->sc_eaddr[4] << 8 | 702 1.1 cube sc->sc_eaddr[5]); 703 1.1 cube AT_WRITE_4(sc, ATL2_MAC_ADDR_1, 704 1.1 cube sc->sc_eaddr[0] << 8 | 705 1.1 cube sc->sc_eaddr[1]); 706 1.1 cube 707 1.1 cube AT_WRITE_4(sc, ATL2_DESC_BASE_ADDR_HI, 0); 708 1.1 cube /* XXX 709 1.1 cube sc->sc_ringmap->dm_segs[0].ds_addr >> 32); 710 1.1 cube */ 711 1.1 cube AT_WRITE_4(sc, ATL2_RXD_BASE_ADDR_LO, 712 1.1 cube (sc->sc_ringmap->dm_segs[0].ds_addr & 0xffffffff) 713 1.1 cube + AT_RXD_PADDING); 714 1.1 cube AT_WRITE_4(sc, ATL2_TXS_BASE_ADDR_LO, 715 1.1 cube sc->sc_txsp & 0xffffffff); 716 1.1 cube AT_WRITE_4(sc, ATL2_TXD_BASE_ADDR_LO, 717 1.1 cube sc->sc_txdp & 0xffffffff); 718 1.1 cube 719 1.1 cube AT_WRITE_2(sc, ATL2_TXD_BUFFER_SIZE, AT_TXD_BUFFER_SIZE / 4); 720 1.1 cube AT_WRITE_2(sc, ATL2_TXS_NUM_ENTRIES, AT_TXD_NUM); 721 1.1 cube AT_WRITE_2(sc, ATL2_RXD_NUM_ENTRIES, AT_RXD_NUM); 722 1.1 cube 723 1.1 cube /* 724 1.1 cube * Inter Paket Gap Time = 0x60 (IPGT) 725 1.1 cube * Minimum inter-frame gap for RX = 0x50 (MIFG) 726 1.1 cube * 64-bit Carrier-Sense window = 0x40 (IPGR1) 727 1.1 cube * 96-bit IPG window = 0x60 (IPGR2) 728 1.1 cube */ 729 1.1 cube AT_WRITE_4(sc, ATL2_MIPFG, 0x60405060); 730 1.1 cube 731 1.1 cube /* 732 1.1 cube * Collision window = 0x37 (LCOL) 733 1.1 cube * Maximum # of retrans = 0xf (RETRY) 734 1.1 cube * Maximum binary expansion # = 0xa (ABEBT) 735 1.1 cube * IPG to start jam = 0x7 (JAMIPG) 736 1.1 cube */ 737 1.1 cube AT_WRITE_4(sc, ATL2_MHDC, 0x07a0f037 | 738 1.1 cube MHDC_EXC_DEF_EN); 739 1.1 cube 740 1.1 cube /* 100 means 200us */ 741 1.1 cube AT_WRITE_2(sc, ATL2_IMTIV, 100); 742 1.1 cube AT_WRITE_2(sc, ATL2_SMC, SMC_ITIMER_EN); 743 1.1 cube 744 1.1 cube /* 500000 means 100ms */ 745 1.1 cube AT_WRITE_2(sc, ATL2_IALTIV, 50000); 746 1.1 cube 747 1.1 cube AT_WRITE_4(sc, ATL2_MTU, ifp->if_mtu + ETHER_HDR_LEN 748 1.1 cube + ETHER_CRC_LEN + ETHER_VLAN_ENCAP_LEN); 749 1.1 cube 750 1.1 cube /* unit unknown for TX cur-through threshold */ 751 1.1 cube AT_WRITE_4(sc, ATL2_TX_CUT_THRESH, 0x177); 752 1.1 cube 753 1.1 cube AT_WRITE_2(sc, ATL2_PAUSE_ON_TH, AT_RXD_NUM * 7 / 8); 754 1.1 cube AT_WRITE_2(sc, ATL2_PAUSE_OFF_TH, AT_RXD_NUM / 12); 755 1.1 cube 756 1.1 cube sc->sc_rxcur = 0; 757 1.1 cube sc->sc_txs_cur = sc->sc_txs_ack = 0; 758 1.1 cube sc->sc_txd_cur = sc->sc_txd_ack = 0; 759 1.1 cube sc->sc_free_tx_slots = true; 760 1.1 cube AT_WRITE_2(sc, ATL2_MB_TXD_WR_IDX, sc->sc_txd_cur); 761 1.1 cube AT_WRITE_2(sc, ATL2_MB_RXD_RD_IDX, sc->sc_rxcur); 762 1.1 cube 763 1.1 cube AT_WRITE_1(sc, ATL2_DMAR, DMAR_EN); 764 1.1 cube AT_WRITE_1(sc, ATL2_DMAW, DMAW_EN); 765 1.1 cube 766 1.1 cube AT_WRITE_4(sc, ATL2_SMC, AT_READ_4(sc, ATL2_SMC) | SMC_MANUAL_INT); 767 1.1 cube 768 1.1 cube error = ((AT_READ_4(sc, ATL2_ISR) & ISR_PHY_LINKDOWN) != 0); 769 1.1 cube AT_WRITE_4(sc, ATL2_ISR, 0x3fffffff); 770 1.1 cube AT_WRITE_4(sc, ATL2_ISR, 0); 771 1.1 cube if (error) { 772 1.1 cube aprint_error_dev(sc->sc_dev, "init failed\n"); 773 1.1 cube goto out; 774 1.1 cube } 775 1.1 cube 776 1.1 cube lii_setmulti(sc); 777 1.1 cube 778 1.1 cube val = AT_READ_4(sc, ATL2_MACC) & MACC_FDX; 779 1.1 cube 780 1.1 cube val |= MACC_RX_EN | MACC_TX_EN | MACC_MACLP_CLK_PHY | 781 1.1 cube MACC_TX_FLOW_EN | MACC_RX_FLOW_EN | 782 1.1 cube MACC_ADD_CRC | MACC_PAD | MACC_BCAST_EN; 783 1.1 cube 784 1.1 cube if (ifp->if_flags & IFF_PROMISC) 785 1.1 cube val |= MACC_PROMISC_EN; 786 1.1 cube else if (ifp->if_flags & IFF_ALLMULTI) 787 1.1 cube val |= MACC_ALLMULTI_EN; 788 1.1 cube 789 1.1 cube val |= 7 << MACC_PREAMBLE_LEN_SHIFT; 790 1.1 cube val |= 2 << MACC_HDX_LEFT_BUF_SHIFT; 791 1.1 cube 792 1.1 cube AT_WRITE_4(sc, ATL2_MACC, val); 793 1.1 cube 794 1.1 cube mii_mediachg(&sc->sc_mii); 795 1.1 cube 796 1.1 cube AT_WRITE_4(sc, ATL2_IMR, IMR_NORMAL_MASK); 797 1.1 cube 798 1.1 cube callout_schedule(&sc->sc_tick_ch, hz); 799 1.1 cube 800 1.1 cube ifp->if_flags |= IFF_RUNNING; 801 1.1 cube ifp->if_flags &= ~IFF_OACTIVE; 802 1.1 cube 803 1.1 cube out: 804 1.1 cube return error; 805 1.1 cube } 806 1.1 cube 807 1.1 cube static void 808 1.1 cube lii_tx_put(struct lii_softc *sc, struct mbuf *m) 809 1.1 cube { 810 1.1 cube int left; 811 1.1 cube struct tx_pkt_header *tph = 812 1.1 cube (struct tx_pkt_header *)(sc->sc_txdbase + sc->sc_txd_cur); 813 1.1 cube 814 1.1 cube memset(tph, 0, sizeof *tph); 815 1.1 cube tph->txph_size = m->m_pkthdr.len; 816 1.1 cube 817 1.1 cube sc->sc_txd_cur = (sc->sc_txd_cur + 4) % AT_TXD_BUFFER_SIZE; 818 1.1 cube 819 1.1 cube /* 820 1.1 cube * We already know we have enough space, so if there is a part of the 821 1.1 cube * space ahead of txd_cur that is active, it doesn't matter because 822 1.1 cube * left will be large enough even without it. 823 1.1 cube */ 824 1.1 cube left = AT_TXD_BUFFER_SIZE - sc->sc_txd_cur; 825 1.1 cube 826 1.1 cube if (left > m->m_pkthdr.len) { 827 1.1 cube m_copydata(m, 0, m->m_pkthdr.len, 828 1.1 cube sc->sc_txdbase + sc->sc_txd_cur); 829 1.1 cube sc->sc_txd_cur += m->m_pkthdr.len; 830 1.1 cube } else { 831 1.1 cube m_copydata(m, 0, left, sc->sc_txdbase + sc->sc_txd_cur); 832 1.1 cube m_copydata(m, left, m->m_pkthdr.len - left, sc->sc_txdbase); 833 1.1 cube sc->sc_txd_cur = m->m_pkthdr.len - left; 834 1.1 cube } 835 1.1 cube 836 1.1 cube /* Round to a 32-bit boundary */ 837 1.3 mjf sc->sc_txd_cur = ((sc->sc_txd_cur + 3) & ~3) % AT_TXD_BUFFER_SIZE; 838 1.1 cube if (sc->sc_txd_cur == sc->sc_txd_ack) 839 1.1 cube sc->sc_free_tx_slots = false; 840 1.1 cube } 841 1.1 cube 842 1.1 cube static int 843 1.1 cube lii_free_tx_space(struct lii_softc *sc) 844 1.1 cube { 845 1.1 cube int space; 846 1.1 cube 847 1.1 cube if (sc->sc_txd_cur >= sc->sc_txd_ack) 848 1.1 cube space = (AT_TXD_BUFFER_SIZE - sc->sc_txd_cur) + 849 1.1 cube sc->sc_txd_ack; 850 1.1 cube else 851 1.1 cube space = sc->sc_txd_ack - sc->sc_txd_cur; 852 1.1 cube 853 1.1 cube /* Account for the tx_pkt_header */ 854 1.1 cube return (space - 4); 855 1.1 cube } 856 1.1 cube 857 1.1 cube static void 858 1.1 cube lii_start(struct ifnet *ifp) 859 1.1 cube { 860 1.1 cube struct lii_softc *sc = ifp->if_softc; 861 1.1 cube struct mbuf *m0; 862 1.1 cube 863 1.1 cube DPRINTF(("lii_start\n")); 864 1.1 cube 865 1.1 cube if ((ifp->if_flags & (IFF_RUNNING|IFF_OACTIVE)) != IFF_RUNNING) 866 1.1 cube return; 867 1.1 cube 868 1.1 cube for (;;) { 869 1.1 cube IFQ_POLL(&ifp->if_snd, m0); 870 1.1 cube if (m0 == NULL) 871 1.1 cube break; 872 1.1 cube 873 1.1 cube if (!sc->sc_free_tx_slots || 874 1.1 cube lii_free_tx_space(sc) < m0->m_pkthdr.len) { 875 1.1 cube ifp->if_flags |= IFF_OACTIVE; 876 1.1 cube break; 877 1.1 cube } 878 1.1 cube 879 1.1 cube lii_tx_put(sc, m0); 880 1.1 cube 881 1.1 cube DPRINTF(("lii_start: put %d\n", sc->sc_txs_cur)); 882 1.1 cube 883 1.1 cube sc->sc_txs[sc->sc_txs_cur].txps_update = 0; 884 1.1 cube sc->sc_txs_cur = (sc->sc_txs_cur + 1) % AT_TXD_NUM; 885 1.1 cube if (sc->sc_txs_cur == sc->sc_txs_ack) 886 1.1 cube sc->sc_free_tx_slots = false; 887 1.1 cube 888 1.1 cube AT_WRITE_2(sc, ATL2_MB_TXD_WR_IDX, sc->sc_txd_cur/4); 889 1.1 cube 890 1.1 cube IFQ_DEQUEUE(&ifp->if_snd, m0); 891 1.1 cube 892 1.17.14.1 pgoyette bpf_mtap(ifp, m0, BPF_D_OUT); 893 1.1 cube m_freem(m0); 894 1.1 cube } 895 1.1 cube } 896 1.1 cube 897 1.1 cube static void 898 1.1 cube lii_stop(struct ifnet *ifp, int disable) 899 1.1 cube { 900 1.1 cube struct lii_softc *sc = ifp->if_softc; 901 1.1 cube 902 1.1 cube callout_stop(&sc->sc_tick_ch); 903 1.1 cube 904 1.1 cube ifp->if_timer = 0; 905 1.1 cube ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 906 1.1 cube 907 1.1 cube mii_down(&sc->sc_mii); 908 1.1 cube 909 1.1 cube lii_reset(sc); 910 1.1 cube 911 1.1 cube AT_WRITE_4(sc, ATL2_IMR, 0); 912 1.1 cube } 913 1.1 cube 914 1.1 cube static int 915 1.1 cube lii_intr(void *v) 916 1.1 cube { 917 1.1 cube struct lii_softc *sc = v; 918 1.1 cube uint32_t status; 919 1.1 cube 920 1.1 cube status = AT_READ_4(sc, ATL2_ISR); 921 1.1 cube if (status == 0) 922 1.1 cube return 0; 923 1.1 cube 924 1.1 cube DPRINTF(("lii_intr (%x)\n", status)); 925 1.1 cube 926 1.1 cube /* Clear the interrupt and disable them */ 927 1.1 cube AT_WRITE_4(sc, ATL2_ISR, status | ISR_DIS_INT); 928 1.1 cube 929 1.1 cube if (status & (ISR_PHY | ISR_MANUAL)) { 930 1.1 cube /* Ack PHY interrupt. Magic register */ 931 1.1 cube if (status & ISR_PHY) 932 1.1 cube (void)lii_mii_readreg(sc->sc_dev, 1, 19); 933 1.1 cube mii_mediachg(&sc->sc_mii); 934 1.1 cube } 935 1.1 cube 936 1.1 cube if (status & (ISR_DMAR_TO_RST | ISR_DMAW_TO_RST | ISR_PHY_LINKDOWN)) { 937 1.1 cube lii_init(&sc->sc_ec.ec_if); 938 1.1 cube return 1; 939 1.1 cube } 940 1.1 cube 941 1.1 cube if (status & ISR_RX_EVENT) { 942 1.1 cube #ifdef LII_DEBUG 943 1.1 cube if (!(status & ISR_RS_UPDATE)) 944 1.1 cube printf("rxintr %08x\n", status); 945 1.1 cube #endif 946 1.1 cube lii_rxintr(sc); 947 1.1 cube } 948 1.1 cube 949 1.1 cube if (status & ISR_TX_EVENT) 950 1.1 cube lii_txintr(sc); 951 1.1 cube 952 1.1 cube /* Re-enable interrupts */ 953 1.1 cube AT_WRITE_4(sc, ATL2_ISR, 0); 954 1.1 cube 955 1.1 cube return 1; 956 1.1 cube } 957 1.1 cube 958 1.1 cube static void 959 1.1 cube lii_rxintr(struct lii_softc *sc) 960 1.1 cube { 961 1.1 cube struct ifnet *ifp = &sc->sc_ec.ec_if; 962 1.1 cube struct rx_pkt *rxp; 963 1.1 cube struct mbuf *m; 964 1.1 cube uint16_t size; 965 1.1 cube 966 1.1 cube DPRINTF(("lii_rxintr\n")); 967 1.1 cube 968 1.1 cube for (;;) { 969 1.1 cube rxp = &sc->sc_rxp[sc->sc_rxcur]; 970 1.1 cube if (rxp->rxp_update == 0) 971 1.1 cube break; 972 1.1 cube 973 1.1 cube DPRINTF(("lii_rxintr: getting %u (%u) [%x]\n", sc->sc_rxcur, 974 1.1 cube rxp->rxp_size, rxp->rxp_flags)); 975 1.1 cube sc->sc_rxcur = (sc->sc_rxcur + 1) % AT_RXD_NUM; 976 1.1 cube rxp->rxp_update = 0; 977 1.1 cube if (!(rxp->rxp_flags & ATL2_RXF_SUCCESS)) { 978 1.1 cube ++ifp->if_ierrors; 979 1.1 cube continue; 980 1.1 cube } 981 1.1 cube 982 1.1 cube MGETHDR(m, M_DONTWAIT, MT_DATA); 983 1.1 cube if (m == NULL) { 984 1.1 cube ++ifp->if_ierrors; 985 1.1 cube continue; 986 1.1 cube } 987 1.1 cube size = rxp->rxp_size - ETHER_CRC_LEN; 988 1.1 cube if (size > MHLEN) { 989 1.1 cube MCLGET(m, M_DONTWAIT); 990 1.1 cube if ((m->m_flags & M_EXT) == 0) { 991 1.1 cube m_freem(m); 992 1.1 cube ++ifp->if_ierrors; 993 1.1 cube continue; 994 1.1 cube } 995 1.1 cube } 996 1.1 cube 997 1.15 ozaki m_set_rcvif(m, ifp); 998 1.1 cube /* Copy the packet withhout the FCS */ 999 1.1 cube m->m_pkthdr.len = m->m_len = size; 1000 1.1 cube memcpy(mtod(m, void *), &rxp->rxp_data[0], size); 1001 1.1 cube 1002 1.14 ozaki if_percpuq_enqueue(ifp->if_percpuq, m); 1003 1.1 cube } 1004 1.1 cube 1005 1.1 cube AT_WRITE_4(sc, ATL2_MB_RXD_RD_IDX, sc->sc_rxcur); 1006 1.1 cube } 1007 1.1 cube 1008 1.1 cube static void 1009 1.1 cube lii_txintr(struct lii_softc *sc) 1010 1.1 cube { 1011 1.1 cube struct ifnet *ifp = &sc->sc_ec.ec_if; 1012 1.1 cube struct tx_pkt_status *txs; 1013 1.1 cube struct tx_pkt_header *txph; 1014 1.1 cube 1015 1.1 cube DPRINTF(("lii_txintr\n")); 1016 1.1 cube 1017 1.1 cube for (;;) { 1018 1.1 cube txs = &sc->sc_txs[sc->sc_txs_ack]; 1019 1.1 cube if (txs->txps_update == 0) 1020 1.1 cube break; 1021 1.1 cube DPRINTF(("lii_txintr: ack'd %d\n", sc->sc_txs_ack)); 1022 1.1 cube sc->sc_txs_ack = (sc->sc_txs_ack + 1) % AT_TXD_NUM; 1023 1.1 cube sc->sc_free_tx_slots = true; 1024 1.1 cube 1025 1.1 cube txs->txps_update = 0; 1026 1.1 cube 1027 1.1 cube txph = (struct tx_pkt_header *) 1028 1.1 cube (sc->sc_txdbase + sc->sc_txd_ack); 1029 1.1 cube 1030 1.1 cube if (txph->txph_size != txs->txps_size) 1031 1.1 cube aprint_error_dev(sc->sc_dev, 1032 1.1 cube "mismatched status and packet\n"); 1033 1.1 cube /* 1034 1.1 cube * Move ack by the packet size, taking the packet header in 1035 1.1 cube * account and round to the next 32-bit boundary 1036 1.1 cube * (7 = sizeof(header) + 3) 1037 1.1 cube */ 1038 1.1 cube sc->sc_txd_ack = (sc->sc_txd_ack + txph->txph_size + 7 ) & ~3; 1039 1.1 cube sc->sc_txd_ack %= AT_TXD_BUFFER_SIZE; 1040 1.1 cube 1041 1.1 cube if (txs->txps_flags & ATL2_TXF_SUCCESS) 1042 1.1 cube ++ifp->if_opackets; 1043 1.1 cube else 1044 1.1 cube ++ifp->if_oerrors; 1045 1.1 cube ifp->if_flags &= ~IFF_OACTIVE; 1046 1.1 cube } 1047 1.1 cube 1048 1.1 cube if (sc->sc_free_tx_slots) 1049 1.16 ozaki if_schedule_deferred_start(ifp); 1050 1.1 cube } 1051 1.1 cube 1052 1.1 cube static int 1053 1.1 cube lii_alloc_rings(struct lii_softc *sc) 1054 1.1 cube { 1055 1.1 cube int nsegs; 1056 1.1 cube bus_size_t bs; 1057 1.1 cube 1058 1.1 cube /* 1059 1.1 cube * We need a big chunk of DMA-friendly memory because descriptors 1060 1.1 cube * are not separate from data on that crappy hardware, which means 1061 1.1 cube * we'll have to copy data from and to that memory zone to and from 1062 1.1 cube * the mbufs. 1063 1.1 cube * 1064 1.1 cube * How lame is that? Using the default values from the Linux driver, 1065 1.1 cube * we allocate space for receiving up to 64 full-size Ethernet frames, 1066 1.1 cube * and only 8kb for transmitting up to 64 Ethernet frames. 1067 1.1 cube */ 1068 1.1 cube 1069 1.1 cube sc->sc_ringsize = bs = AT_RXD_PADDING 1070 1.1 cube + AT_RXD_NUM * sizeof(struct rx_pkt) 1071 1.1 cube + AT_TXD_NUM * sizeof(struct tx_pkt_status) 1072 1.1 cube + AT_TXD_BUFFER_SIZE; 1073 1.1 cube 1074 1.1 cube if (bus_dmamap_create(sc->sc_dmat, bs, 1, bs, (1<<30), 1075 1.1 cube BUS_DMA_NOWAIT, &sc->sc_ringmap) != 0) { 1076 1.1 cube aprint_error_dev(sc->sc_dev, "bus_dmamap_create failed\n"); 1077 1.1 cube return 1; 1078 1.1 cube } 1079 1.1 cube 1080 1.1 cube if (bus_dmamem_alloc(sc->sc_dmat, bs, PAGE_SIZE, (1<<30), 1081 1.1 cube &sc->sc_ringseg, 1, &nsegs, BUS_DMA_NOWAIT) != 0) { 1082 1.1 cube aprint_error_dev(sc->sc_dev, "bus_dmamem_alloc failed\n"); 1083 1.1 cube goto fail; 1084 1.1 cube } 1085 1.1 cube 1086 1.1 cube if (bus_dmamem_map(sc->sc_dmat, &sc->sc_ringseg, nsegs, bs, 1087 1.1 cube (void **)&sc->sc_ring, BUS_DMA_NOWAIT) != 0) { 1088 1.1 cube aprint_error_dev(sc->sc_dev, "bus_dmamem_map failed\n"); 1089 1.1 cube goto fail1; 1090 1.1 cube } 1091 1.1 cube 1092 1.1 cube if (bus_dmamap_load(sc->sc_dmat, sc->sc_ringmap, sc->sc_ring, 1093 1.1 cube bs, NULL, BUS_DMA_NOWAIT) != 0) { 1094 1.1 cube aprint_error_dev(sc->sc_dev, "bus_dmamap_load failed\n"); 1095 1.1 cube goto fail2; 1096 1.1 cube } 1097 1.1 cube 1098 1.1 cube sc->sc_rxp = (void *)(sc->sc_ring + AT_RXD_PADDING); 1099 1.1 cube sc->sc_txs = (void *)(sc->sc_ring + AT_RXD_PADDING 1100 1.1 cube + AT_RXD_NUM * sizeof(struct rx_pkt)); 1101 1.1 cube sc->sc_txdbase = ((char *)sc->sc_txs) 1102 1.1 cube + AT_TXD_NUM * sizeof(struct tx_pkt_status); 1103 1.1 cube sc->sc_txsp = sc->sc_ringmap->dm_segs[0].ds_addr 1104 1.1 cube + ((char *)sc->sc_txs - (char *)sc->sc_ring); 1105 1.1 cube sc->sc_txdp = sc->sc_ringmap->dm_segs[0].ds_addr 1106 1.1 cube + ((char *)sc->sc_txdbase - (char *)sc->sc_ring); 1107 1.1 cube 1108 1.1 cube return 0; 1109 1.1 cube 1110 1.1 cube fail2: 1111 1.1 cube bus_dmamem_unmap(sc->sc_dmat, sc->sc_ring, bs); 1112 1.1 cube fail1: 1113 1.1 cube bus_dmamem_free(sc->sc_dmat, &sc->sc_ringseg, nsegs); 1114 1.1 cube fail: 1115 1.1 cube bus_dmamap_destroy(sc->sc_dmat, sc->sc_ringmap); 1116 1.1 cube return 1; 1117 1.1 cube } 1118 1.1 cube 1119 1.1 cube static void 1120 1.1 cube lii_watchdog(struct ifnet *ifp) 1121 1.1 cube { 1122 1.1 cube struct lii_softc *sc = ifp->if_softc; 1123 1.1 cube 1124 1.1 cube aprint_error_dev(sc->sc_dev, "watchdog timeout\n"); 1125 1.1 cube ++ifp->if_oerrors; 1126 1.1 cube lii_init(ifp); 1127 1.1 cube } 1128 1.1 cube 1129 1.1 cube static int 1130 1.1 cube lii_ioctl(struct ifnet *ifp, u_long cmd, void *data) 1131 1.1 cube { 1132 1.1 cube struct lii_softc *sc = ifp->if_softc; 1133 1.1 cube int s, error; 1134 1.1 cube 1135 1.1 cube s = splnet(); 1136 1.1 cube 1137 1.1 cube switch(cmd) { 1138 1.1 cube case SIOCADDMULTI: 1139 1.1 cube case SIOCDELMULTI: 1140 1.1 cube if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) { 1141 1.1 cube if (ifp->if_flags & IFF_RUNNING) 1142 1.1 cube lii_setmulti(sc); 1143 1.1 cube error = 0; 1144 1.1 cube } 1145 1.1 cube break; 1146 1.1 cube case SIOCSIFMEDIA: 1147 1.1 cube case SIOCGIFMEDIA: 1148 1.12 christos error = ifmedia_ioctl(ifp, (struct ifreq *)data, 1149 1.1 cube &sc->sc_mii.mii_media, cmd); 1150 1.1 cube break; 1151 1.1 cube default: 1152 1.1 cube error = ether_ioctl(ifp, cmd, data); 1153 1.1 cube if (error == ENETRESET) { 1154 1.1 cube if (ifp->if_flags & IFF_RUNNING) 1155 1.1 cube lii_setmulti(sc); 1156 1.1 cube error = 0; 1157 1.1 cube } 1158 1.1 cube break; 1159 1.1 cube } 1160 1.1 cube 1161 1.1 cube splx(s); 1162 1.1 cube 1163 1.1 cube return error; 1164 1.1 cube } 1165 1.1 cube 1166 1.1 cube static void 1167 1.1 cube lii_setmulti(struct lii_softc *sc) 1168 1.1 cube { 1169 1.1 cube struct ethercom *ec = &sc->sc_ec; 1170 1.1 cube struct ifnet *ifp = &ec->ec_if; 1171 1.1 cube uint32_t mht0 = 0, mht1 = 0, crc; 1172 1.1 cube struct ether_multi *enm; 1173 1.1 cube struct ether_multistep step; 1174 1.1 cube 1175 1.1 cube /* Clear multicast hash table */ 1176 1.1 cube AT_WRITE_4(sc, ATL2_MHT, 0); 1177 1.1 cube AT_WRITE_4(sc, ATL2_MHT + 4, 0); 1178 1.1 cube 1179 1.1 cube ifp->if_flags &= ~IFF_ALLMULTI; 1180 1.1 cube 1181 1.1 cube ETHER_FIRST_MULTI(step, ec, enm); 1182 1.1 cube while (enm != NULL) { 1183 1.1 cube if (memcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 1184 1.1 cube ifp->if_flags |= IFF_ALLMULTI; 1185 1.1 cube mht0 = mht1 = 0; 1186 1.1 cube goto alldone; 1187 1.1 cube } 1188 1.1 cube 1189 1.1 cube crc = ether_crc32_be(enm->enm_addrlo, ETHER_ADDR_LEN); 1190 1.1 cube 1191 1.1 cube if (crc & (1 << 31)) 1192 1.5 sborrill mht1 |= (1 << ((crc >> 26) & 0x0000001f)); 1193 1.1 cube else 1194 1.5 sborrill mht0 |= (1 << ((crc >> 26) & 0x0000001f)); 1195 1.1 cube 1196 1.1 cube ETHER_NEXT_MULTI(step, enm); 1197 1.1 cube } 1198 1.1 cube 1199 1.1 cube alldone: 1200 1.1 cube AT_WRITE_4(sc, ATL2_MHT, mht0); 1201 1.1 cube AT_WRITE_4(sc, ATL2_MHT+4, mht1); 1202 1.1 cube } 1203 1.1 cube 1204 1.1 cube static void 1205 1.1 cube lii_tick(void *v) 1206 1.1 cube { 1207 1.1 cube struct lii_softc *sc = v; 1208 1.1 cube int s; 1209 1.1 cube 1210 1.1 cube s = splnet(); 1211 1.1 cube mii_tick(&sc->sc_mii); 1212 1.1 cube splx(s); 1213 1.1 cube 1214 1.1 cube callout_schedule(&sc->sc_tick_ch, hz); 1215 1.1 cube } 1216
Indexes created Thu Oct 23 22:10:10 GMT 2025