if_mskvar.h revision 1.4 1 1.2 msaitoh /* $OpenBSD: if_mskvar.h,v 1.3 2006/12/28 16:34:42 kettenis Exp $ */
2 1.4 christos /* $NetBSD: if_mskvar.h,v 1.4 2007/03/04 06:02:22 christos Exp $ */
3 1.1 riz
4 1.1 riz /*-
5 1.1 riz * Copyright (c) 2003 The NetBSD Foundation, Inc.
6 1.1 riz * All rights reserved.
7 1.1 riz *
8 1.1 riz * Redistribution and use in source and binary forms, with or without
9 1.1 riz * modification, are permitted provided that the following conditions
10 1.1 riz * are met:
11 1.1 riz * 1. Redistributions of source code must retain the above copyright
12 1.1 riz * notice, this list of conditions and the following disclaimer.
13 1.1 riz * 2. Redistributions in binary form must reproduce the above copyright
14 1.1 riz * notice, this list of conditions and the following disclaimer in the
15 1.1 riz * documentation and/or other materials provided with the distribution.
16 1.1 riz * 3. All advertising materials mentioning features or use of this software
17 1.1 riz * must display the following acknowledgement:
18 1.1 riz * This product includes software developed by the NetBSD
19 1.1 riz * Foundation, Inc. and its contributors.
20 1.1 riz * 4. Neither the name of The NetBSD Foundation nor the names of its
21 1.1 riz * contributors may be used to endorse or promote products derived
22 1.1 riz * from this software without specific prior written permission.
23 1.1 riz *
24 1.1 riz * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
25 1.1 riz * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
26 1.1 riz * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
27 1.1 riz * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
28 1.1 riz * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 1.1 riz * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 1.1 riz * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 1.1 riz * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 1.1 riz * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 1.1 riz * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 1.1 riz * POSSIBILITY OF SUCH DAMAGE.
35 1.1 riz */
36 1.1 riz /* $OpenBSD: if_mskvar.h,v 1.1 2006/08/16 21:06:23 kettenis Exp $ */
37 1.1 riz
38 1.1 riz /*
39 1.1 riz * Copyright (c) 1997, 1998, 1999, 2000
40 1.1 riz * Bill Paul <wpaul (at) ctr.columbia.edu>. All rights reserved.
41 1.1 riz *
42 1.1 riz * Redistribution and use in source and binary forms, with or without
43 1.1 riz * modification, are permitted provided that the following conditions
44 1.1 riz * are met:
45 1.1 riz * 1. Redistributions of source code must retain the above copyright
46 1.1 riz * notice, this list of conditions and the following disclaimer.
47 1.1 riz * 2. Redistributions in binary form must reproduce the above copyright
48 1.1 riz * notice, this list of conditions and the following disclaimer in the
49 1.1 riz * documentation and/or other materials provided with the distribution.
50 1.1 riz * 3. All advertising materials mentioning features or use of this software
51 1.1 riz * must display the following acknowledgement:
52 1.1 riz * This product includes software developed by Bill Paul.
53 1.1 riz * 4. Neither the name of the author nor the names of any co-contributors
54 1.1 riz * may be used to endorse or promote products derived from this software
55 1.1 riz * without specific prior written permission.
56 1.1 riz *
57 1.1 riz * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
58 1.1 riz * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
59 1.1 riz * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
60 1.1 riz * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
61 1.1 riz * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
62 1.1 riz * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
63 1.1 riz * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
64 1.1 riz * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
65 1.1 riz * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
66 1.1 riz * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
67 1.1 riz * THE POSSIBILITY OF SUCH DAMAGE.
68 1.1 riz *
69 1.1 riz * $FreeBSD: /c/ncvs/src/sys/pci/if_skreg.h,v 1.9 2000/04/22 02:16:37 wpaul Exp $
70 1.1 riz */
71 1.1 riz
72 1.1 riz /*
73 1.1 riz * Copyright (c) 2003 Nathan L. Binkert <binkertn (at) umich.edu>
74 1.1 riz *
75 1.1 riz * Permission to use, copy, modify, and distribute this software for any
76 1.1 riz * purpose with or without fee is hereby granted, provided that the above
77 1.1 riz * copyright notice and this permission notice appear in all copies.
78 1.1 riz *
79 1.1 riz * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
80 1.1 riz * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
81 1.1 riz * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
82 1.1 riz * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
83 1.1 riz * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
84 1.1 riz * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
85 1.1 riz * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
86 1.1 riz */
87 1.1 riz
88 1.1 riz #ifndef _DEV_PCI_IF_MSKVAR_H_
89 1.1 riz #define _DEV_PCI_IF_MSKVAR_H_
90 1.1 riz
91 1.1 riz #include "rnd.h"
92 1.1 riz
93 1.1 riz #if NRND > 0
94 1.1 riz #include <sys/rnd.h>
95 1.1 riz #endif
96 1.1 riz
97 1.1 riz struct sk_jpool_entry {
98 1.1 riz int slot;
99 1.1 riz LIST_ENTRY(sk_jpool_entry) jpool_entries;
100 1.1 riz };
101 1.1 riz
102 1.1 riz struct sk_chain {
103 1.1 riz void *sk_le;
104 1.1 riz struct mbuf *sk_mbuf;
105 1.1 riz struct sk_chain *sk_next;
106 1.1 riz };
107 1.1 riz
108 1.1 riz /*
109 1.1 riz * Number of DMA segments in a TxCB. Note that this is carefully
110 1.1 riz * chosen to make the total struct size an even power of two. It's
111 1.1 riz * critical that no TxCB be split across a page boundary since
112 1.1 riz * no attempt is made to allocate physically contiguous memory.
113 1.1 riz *
114 1.1 riz */
115 1.1 riz #define SK_NTXSEG 30
116 1.1 riz
117 1.1 riz struct sk_txmap_entry {
118 1.1 riz bus_dmamap_t dmamap;
119 1.1 riz SIMPLEQ_ENTRY(sk_txmap_entry) link;
120 1.1 riz };
121 1.1 riz
122 1.1 riz struct msk_chain_data {
123 1.1 riz struct sk_chain sk_tx_chain[MSK_TX_RING_CNT];
124 1.1 riz struct sk_chain sk_rx_chain[MSK_RX_RING_CNT];
125 1.1 riz struct sk_txmap_entry *sk_tx_map[MSK_TX_RING_CNT];
126 1.1 riz bus_dmamap_t sk_rx_map[MSK_RX_RING_CNT];
127 1.1 riz bus_dmamap_t sk_rx_jumbo_map;
128 1.1 riz int sk_tx_prod;
129 1.1 riz int sk_tx_cons;
130 1.1 riz int sk_tx_cnt;
131 1.1 riz int sk_rx_prod;
132 1.1 riz int sk_rx_cons;
133 1.1 riz int sk_rx_cnt;
134 1.1 riz /* Stick the jumbo mem management stuff here too. */
135 1.4 christos void * sk_jslots[MSK_JSLOTS];
136 1.1 riz void *sk_jumbo_buf;
137 1.1 riz };
138 1.1 riz
139 1.1 riz struct msk_ring_data {
140 1.1 riz struct msk_tx_desc sk_tx_ring[MSK_TX_RING_CNT];
141 1.1 riz struct msk_rx_desc sk_rx_ring[MSK_RX_RING_CNT];
142 1.1 riz };
143 1.1 riz
144 1.1 riz #define MSK_TX_RING_ADDR(sc, i) \
145 1.1 riz ((sc)->sk_ring_map->dm_segs[0].ds_addr + \
146 1.1 riz offsetof(struct msk_ring_data, sk_tx_ring[(i)]))
147 1.1 riz
148 1.1 riz #define MSK_RX_RING_ADDR(sc, i) \
149 1.1 riz ((sc)->sk_ring_map->dm_segs[0].ds_addr + \
150 1.1 riz offsetof(struct msk_ring_data, sk_rx_ring[(i)]))
151 1.1 riz
152 1.1 riz #define MSK_CDOFF(x) offsetof(struct msk_ring_data, x)
153 1.1 riz #define MSK_CDTXOFF(x) MSK_CDOFF(sk_tx_ring[(x)])
154 1.1 riz #define MSK_CDRXOFF(x) MSK_CDOFF(sk_rx_ring[(x)])
155 1.1 riz #define MSK_CDSTOFF(x) ((x) * sizeof(struct msk_status_desc))
156 1.1 riz
157 1.1 riz #define MSK_CDTXSYNC(sc, x, n, ops) \
158 1.1 riz do { \
159 1.1 riz int __x, __n; \
160 1.1 riz \
161 1.1 riz __x = (x); \
162 1.1 riz __n = (n); \
163 1.1 riz \
164 1.1 riz /* If it will wrap around, sync to the end of the ring. */ \
165 1.1 riz if ((__x + __n) > MSK_TX_RING_CNT) { \
166 1.1 riz bus_dmamap_sync((sc)->sk_softc->sc_dmatag, \
167 1.1 riz (sc)->sk_ring_map, MSK_CDTXOFF(__x), \
168 1.1 riz sizeof(struct msk_tx_desc) * (MSK_TX_RING_CNT - __x), \
169 1.1 riz (ops)); \
170 1.1 riz __n -= (MSK_TX_RING_CNT - __x); \
171 1.1 riz __x = 0; \
172 1.1 riz } \
173 1.1 riz \
174 1.1 riz /* Now sync whatever is left. */ \
175 1.1 riz bus_dmamap_sync((sc)->sk_softc->sc_dmatag, (sc)->sk_ring_map, \
176 1.1 riz MSK_CDTXOFF((__x)), sizeof(struct msk_tx_desc) * __n, (ops)); \
177 1.1 riz } while (/*CONSTCOND*/0)
178 1.1 riz
179 1.1 riz #define MSK_CDRXSYNC(sc, x, ops) \
180 1.1 riz do { \
181 1.1 riz bus_dmamap_sync((sc)->sk_softc->sc_dmatag, (sc)->sk_ring_map, \
182 1.1 riz MSK_CDRXOFF((x)), sizeof(struct msk_rx_desc), (ops)); \
183 1.1 riz } while (/*CONSTCOND*/0)
184 1.1 riz
185 1.1 riz #define MSK_CDSTSYNC(sc, x, ops) \
186 1.1 riz do { \
187 1.1 riz bus_dmamap_sync((sc)->sc_dmatag, (sc)->sk_status_map, \
188 1.1 riz MSK_CDSTOFF((x)), sizeof(struct msk_status_desc), (ops)); \
189 1.1 riz } while (/*CONSTCOND*/0)
190 1.1 riz
191 1.1 riz #define SK_INC(x, y) (x) = (x + 1) % y
192 1.1 riz
193 1.1 riz /* Forward decl. */
194 1.1 riz struct sk_if_softc;
195 1.1 riz
196 1.1 riz /* Softc for the Yukon-II controller. */
197 1.1 riz struct sk_softc {
198 1.1 riz struct device sk_dev; /* generic device */
199 1.1 riz bus_space_handle_t sk_bhandle; /* bus space handle */
200 1.1 riz bus_space_tag_t sk_btag; /* bus space tag */
201 1.1 riz void *sk_intrhand; /* irq handler handle */
202 1.1 riz u_int8_t sk_type;
203 1.1 riz u_int8_t sk_rev;
204 1.3 msaitoh u_int32_t sk_workaround;
205 1.1 riz u_int8_t sk_macs; /* # of MACs */
206 1.1 riz const char *sk_name;
207 1.1 riz u_int32_t sk_rboff; /* RAMbuffer offset */
208 1.1 riz u_int32_t sk_ramsize; /* amount of RAM on NIC */
209 1.1 riz u_int32_t sk_intrmask;
210 1.1 riz struct sysctllog *sk_clog;
211 1.1 riz int sk_int_mod;
212 1.1 riz int sk_int_mod_pending;
213 1.1 riz bus_dma_tag_t sc_dmatag;
214 1.1 riz struct sk_if_softc *sk_if[2];
215 1.1 riz struct msk_status_desc *sk_status_ring;
216 1.1 riz bus_dmamap_t sk_status_map;
217 1.1 riz int sk_status_idx;
218 1.1 riz #if NRND > 0
219 1.1 riz rndsource_element_t rnd_source;
220 1.1 riz #endif
221 1.1 riz };
222 1.1 riz
223 1.1 riz /* Softc for each logical interface */
224 1.1 riz struct sk_if_softc {
225 1.1 riz struct device sk_dev; /* generic device */
226 1.1 riz struct ethercom sk_ethercom; /* interface info */
227 1.1 riz struct mii_data sk_mii;
228 1.1 riz u_int8_t sk_enaddr[ETHER_ADDR_LEN]; /* station addr */
229 1.1 riz u_int8_t sk_port; /* port # on controller */
230 1.1 riz u_int32_t sk_rx_ramstart;
231 1.1 riz u_int32_t sk_rx_ramend;
232 1.1 riz u_int32_t sk_tx_ramstart;
233 1.1 riz u_int32_t sk_tx_ramend;
234 1.1 riz int sk_cnt;
235 1.1 riz int sk_link;
236 1.1 riz struct callout sk_tick_ch;
237 1.1 riz struct msk_chain_data sk_cdata;
238 1.1 riz struct msk_ring_data *sk_rdata;
239 1.1 riz bus_dmamap_t sk_ring_map;
240 1.1 riz int sk_status_idx;
241 1.1 riz struct sk_softc *sk_softc; /* parent controller */
242 1.1 riz int sk_if_flags;
243 1.1 riz LIST_HEAD(__sk_jfreehead, sk_jpool_entry) sk_jfree_listhead;
244 1.1 riz LIST_HEAD(__sk_jinusehead, sk_jpool_entry) sk_jinuse_listhead;
245 1.1 riz SIMPLEQ_HEAD(__sk_txmaphead, sk_txmap_entry) sk_txmap_head;
246 1.1 riz };
247 1.1 riz
248 1.1 riz struct skc_attach_args {
249 1.1 riz u_int16_t skc_port;
250 1.1 riz u_int8_t skc_type;
251 1.1 riz u_int8_t skc_rev;
252 1.1 riz };
253 1.1 riz
254 1.1 riz #endif /* _DEV_PCI_IF_MSKVAR_H_ */
255