if_nfe.c revision 1.3.2.2
1 1.3.2.2 elad /* $NetBSD: if_nfe.c,v 1.3.2.2 2006/04/19 03:25:35 elad Exp $ */ 2 1.3.2.2 elad /* $OpenBSD: if_nfe.c,v 1.52 2006/03/02 09:04:00 jsg Exp $ */ 3 1.3.2.2 elad 4 1.3.2.2 elad /*- 5 1.3.2.2 elad * Copyright (c) 2006 Damien Bergamini <damien.bergamini (at) free.fr> 6 1.3.2.2 elad * Copyright (c) 2005, 2006 Jonathan Gray <jsg (at) openbsd.org> 7 1.3.2.2 elad * 8 1.3.2.2 elad * Permission to use, copy, modify, and distribute this software for any 9 1.3.2.2 elad * purpose with or without fee is hereby granted, provided that the above 10 1.3.2.2 elad * copyright notice and this permission notice appear in all copies. 11 1.3.2.2 elad * 12 1.3.2.2 elad * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 13 1.3.2.2 elad * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 14 1.3.2.2 elad * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 15 1.3.2.2 elad * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 16 1.3.2.2 elad * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 17 1.3.2.2 elad * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 18 1.3.2.2 elad * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 19 1.3.2.2 elad */ 20 1.3.2.2 elad 21 1.3.2.2 elad /* Driver for NVIDIA nForce MCP Fast Ethernet and Gigabit Ethernet */ 22 1.3.2.2 elad 23 1.3.2.2 elad #include <sys/cdefs.h> 24 1.3.2.2 elad __KERNEL_RCSID(0, "$NetBSD: if_nfe.c,v 1.3.2.2 2006/04/19 03:25:35 elad Exp $"); 25 1.3.2.2 elad 26 1.3.2.2 elad #include "opt_inet.h" 27 1.3.2.2 elad #include "bpfilter.h" 28 1.3.2.2 elad #include "vlan.h" 29 1.3.2.2 elad 30 1.3.2.2 elad #include <sys/param.h> 31 1.3.2.2 elad #include <sys/endian.h> 32 1.3.2.2 elad #include <sys/systm.h> 33 1.3.2.2 elad #include <sys/types.h> 34 1.3.2.2 elad #include <sys/sockio.h> 35 1.3.2.2 elad #include <sys/mbuf.h> 36 1.3.2.2 elad #include <sys/queue.h> 37 1.3.2.2 elad #include <sys/malloc.h> 38 1.3.2.2 elad #include <sys/kernel.h> 39 1.3.2.2 elad #include <sys/device.h> 40 1.3.2.2 elad #include <sys/socket.h> 41 1.3.2.2 elad 42 1.3.2.2 elad #include <machine/bus.h> 43 1.3.2.2 elad 44 1.3.2.2 elad #include <net/if.h> 45 1.3.2.2 elad #include <net/if_dl.h> 46 1.3.2.2 elad #include <net/if_media.h> 47 1.3.2.2 elad #include <net/if_ether.h> 48 1.3.2.2 elad #include <net/if_arp.h> 49 1.3.2.2 elad 50 1.3.2.2 elad #ifdef INET 51 1.3.2.2 elad #include <netinet/in.h> 52 1.3.2.2 elad #include <netinet/in_systm.h> 53 1.3.2.2 elad #include <netinet/in_var.h> 54 1.3.2.2 elad #include <netinet/ip.h> 55 1.3.2.2 elad #include <netinet/if_inarp.h> 56 1.3.2.2 elad #endif 57 1.3.2.2 elad 58 1.3.2.2 elad #if NVLAN > 0 59 1.3.2.2 elad #include <net/if_types.h> 60 1.3.2.2 elad #endif 61 1.3.2.2 elad 62 1.3.2.2 elad #if NBPFILTER > 0 63 1.3.2.2 elad #include <net/bpf.h> 64 1.3.2.2 elad #endif 65 1.3.2.2 elad 66 1.3.2.2 elad #include <dev/mii/mii.h> 67 1.3.2.2 elad #include <dev/mii/miivar.h> 68 1.3.2.2 elad 69 1.3.2.2 elad #include <dev/pci/pcireg.h> 70 1.3.2.2 elad #include <dev/pci/pcivar.h> 71 1.3.2.2 elad #include <dev/pci/pcidevs.h> 72 1.3.2.2 elad 73 1.3.2.2 elad #include <dev/pci/if_nfereg.h> 74 1.3.2.2 elad #include <dev/pci/if_nfevar.h> 75 1.3.2.2 elad 76 1.3.2.2 elad int nfe_match(struct device *, struct cfdata *, void *); 77 1.3.2.2 elad void nfe_attach(struct device *, struct device *, void *); 78 1.3.2.2 elad void nfe_power(int, void *); 79 1.3.2.2 elad void nfe_miibus_statchg(struct device *); 80 1.3.2.2 elad int nfe_miibus_readreg(struct device *, int, int); 81 1.3.2.2 elad void nfe_miibus_writereg(struct device *, int, int, int); 82 1.3.2.2 elad int nfe_intr(void *); 83 1.3.2.2 elad int nfe_ioctl(struct ifnet *, u_long, caddr_t); 84 1.3.2.2 elad void nfe_txdesc32_sync(struct nfe_softc *, struct nfe_desc32 *, int); 85 1.3.2.2 elad void nfe_txdesc64_sync(struct nfe_softc *, struct nfe_desc64 *, int); 86 1.3.2.2 elad void nfe_txdesc32_rsync(struct nfe_softc *, int, int, int); 87 1.3.2.2 elad void nfe_txdesc64_rsync(struct nfe_softc *, int, int, int); 88 1.3.2.2 elad void nfe_rxdesc32_sync(struct nfe_softc *, struct nfe_desc32 *, int); 89 1.3.2.2 elad void nfe_rxdesc64_sync(struct nfe_softc *, struct nfe_desc64 *, int); 90 1.3.2.2 elad void nfe_rxeof(struct nfe_softc *); 91 1.3.2.2 elad void nfe_txeof(struct nfe_softc *); 92 1.3.2.2 elad int nfe_encap(struct nfe_softc *, struct mbuf *); 93 1.3.2.2 elad void nfe_start(struct ifnet *); 94 1.3.2.2 elad void nfe_watchdog(struct ifnet *); 95 1.3.2.2 elad int nfe_init(struct ifnet *); 96 1.3.2.2 elad void nfe_stop(struct ifnet *, int); 97 1.3.2.2 elad struct nfe_jbuf *nfe_jalloc(struct nfe_softc *); 98 1.3.2.2 elad void nfe_jfree(struct mbuf *, caddr_t, size_t, void *); 99 1.3.2.2 elad int nfe_jpool_alloc(struct nfe_softc *); 100 1.3.2.2 elad void nfe_jpool_free(struct nfe_softc *); 101 1.3.2.2 elad int nfe_alloc_rx_ring(struct nfe_softc *, struct nfe_rx_ring *); 102 1.3.2.2 elad void nfe_reset_rx_ring(struct nfe_softc *, struct nfe_rx_ring *); 103 1.3.2.2 elad void nfe_free_rx_ring(struct nfe_softc *, struct nfe_rx_ring *); 104 1.3.2.2 elad int nfe_alloc_tx_ring(struct nfe_softc *, struct nfe_tx_ring *); 105 1.3.2.2 elad void nfe_reset_tx_ring(struct nfe_softc *, struct nfe_tx_ring *); 106 1.3.2.2 elad void nfe_free_tx_ring(struct nfe_softc *, struct nfe_tx_ring *); 107 1.3.2.2 elad int nfe_ifmedia_upd(struct ifnet *); 108 1.3.2.2 elad void nfe_ifmedia_sts(struct ifnet *, struct ifmediareq *); 109 1.3.2.2 elad void nfe_setmulti(struct nfe_softc *); 110 1.3.2.2 elad void nfe_get_macaddr(struct nfe_softc *, uint8_t *); 111 1.3.2.2 elad void nfe_set_macaddr(struct nfe_softc *, const uint8_t *); 112 1.3.2.2 elad void nfe_tick(void *); 113 1.3.2.2 elad 114 1.3.2.2 elad CFATTACH_DECL(nfe, sizeof(struct nfe_softc), nfe_match, nfe_attach, NULL, NULL); 115 1.3.2.2 elad 116 1.3.2.2 elad /*#define NFE_NO_JUMBO*/ 117 1.3.2.2 elad 118 1.3.2.2 elad #ifdef NFE_DEBUG 119 1.3.2.2 elad int nfedebug = 0; 120 1.3.2.2 elad #define DPRINTF(x) do { if (nfedebug) printf x; } while (0) 121 1.3.2.2 elad #define DPRINTFN(n,x) do { if (nfedebug >= (n)) printf x; } while (0) 122 1.3.2.2 elad #else 123 1.3.2.2 elad #define DPRINTF(x) 124 1.3.2.2 elad #define DPRINTFN(n,x) 125 1.3.2.2 elad #endif 126 1.3.2.2 elad 127 1.3.2.2 elad /* deal with naming differences */ 128 1.3.2.2 elad 129 1.3.2.2 elad #define PCI_PRODUCT_NVIDIA_NFORCE3_LAN2 \ 130 1.3.2.2 elad PCI_PRODUCT_NVIDIA_NFORCE2_400_LAN1 131 1.3.2.2 elad #define PCI_PRODUCT_NVIDIA_NFORCE3_LAN3 \ 132 1.3.2.2 elad PCI_PRODUCT_NVIDIA_NFORCE2_400_LAN2 133 1.3.2.2 elad #define PCI_PRODUCT_NVIDIA_NFORCE3_LAN5 \ 134 1.3.2.2 elad PCI_PRODUCT_NVIDIA_NFORCE3_250_LAN 135 1.3.2.2 elad 136 1.3.2.2 elad #define PCI_PRODUCT_NVIDIA_CK804_LAN1 \ 137 1.3.2.2 elad PCI_PRODUCT_NVIDIA_NFORCE4_LAN1 138 1.3.2.2 elad #define PCI_PRODUCT_NVIDIA_CK804_LAN2 \ 139 1.3.2.2 elad PCI_PRODUCT_NVIDIA_NFORCE4_LAN2 140 1.3.2.2 elad 141 1.3.2.2 elad #define PCI_PRODUCT_NVIDIA_MCP51_LAN1 \ 142 1.3.2.2 elad PCI_PRODUCT_NVIDIA_NFORCE430_LAN1 143 1.3.2.2 elad #define PCI_PRODUCT_NVIDIA_MCP51_LAN2 \ 144 1.3.2.2 elad PCI_PRODUCT_NVIDIA_NFORCE430_LAN2 145 1.3.2.2 elad 146 1.3.2.2 elad #ifdef _LP64 147 1.3.2.2 elad #define __LP64__ 1 148 1.3.2.2 elad #endif 149 1.3.2.2 elad 150 1.3.2.2 elad const struct nfe_product { 151 1.3.2.2 elad pci_vendor_id_t vendor; 152 1.3.2.2 elad pci_product_id_t product; 153 1.3.2.2 elad } nfe_devices[] = { 154 1.3.2.2 elad { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE_LAN }, 155 1.3.2.2 elad { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE2_LAN }, 156 1.3.2.2 elad { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_LAN1 }, 157 1.3.2.2 elad { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_LAN2 }, 158 1.3.2.2 elad { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_LAN3 }, 159 1.3.2.2 elad { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_LAN4 }, 160 1.3.2.2 elad { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_LAN5 }, 161 1.3.2.2 elad { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_CK804_LAN1 }, 162 1.3.2.2 elad { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_CK804_LAN2 }, 163 1.3.2.2 elad { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP04_LAN1 }, 164 1.3.2.2 elad { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP04_LAN2 }, 165 1.3.2.2 elad { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP51_LAN1 }, 166 1.3.2.2 elad { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP51_LAN2 }, 167 1.3.2.2 elad { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP55_LAN1 }, 168 1.3.2.2 elad { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP55_LAN2 } 169 1.3.2.2 elad }; 170 1.3.2.2 elad 171 1.3.2.2 elad int 172 1.3.2.2 elad nfe_match(struct device *dev, struct cfdata *match, void *aux) 173 1.3.2.2 elad { 174 1.3.2.2 elad struct pci_attach_args *pa = aux; 175 1.3.2.2 elad const struct nfe_product *np; 176 1.3.2.2 elad int i; 177 1.3.2.2 elad 178 1.3.2.2 elad for (i = 0; i < sizeof(nfe_devices) / sizeof(nfe_devices[0]); i++) { 179 1.3.2.2 elad np = &nfe_devices[i]; 180 1.3.2.2 elad if (PCI_VENDOR(pa->pa_id) == np->vendor && 181 1.3.2.2 elad PCI_PRODUCT(pa->pa_id) == np->product) 182 1.3.2.2 elad return 1; 183 1.3.2.2 elad } 184 1.3.2.2 elad return 0; 185 1.3.2.2 elad } 186 1.3.2.2 elad 187 1.3.2.2 elad void 188 1.3.2.2 elad nfe_attach(struct device *parent, struct device *self, void *aux) 189 1.3.2.2 elad { 190 1.3.2.2 elad struct nfe_softc *sc = (struct nfe_softc *)self; 191 1.3.2.2 elad struct pci_attach_args *pa = aux; 192 1.3.2.2 elad pci_chipset_tag_t pc = pa->pa_pc; 193 1.3.2.2 elad pci_intr_handle_t ih; 194 1.3.2.2 elad const char *intrstr; 195 1.3.2.2 elad struct ifnet *ifp; 196 1.3.2.2 elad bus_size_t memsize; 197 1.3.2.2 elad pcireg_t memtype; 198 1.3.2.2 elad 199 1.3.2.2 elad memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, NFE_PCI_BA); 200 1.3.2.2 elad switch (memtype) { 201 1.3.2.2 elad case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT: 202 1.3.2.2 elad case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_64BIT: 203 1.3.2.2 elad if (pci_mapreg_map(pa, NFE_PCI_BA, memtype, 0, &sc->sc_memt, 204 1.3.2.2 elad &sc->sc_memh, NULL, &memsize) == 0) 205 1.3.2.2 elad break; 206 1.3.2.2 elad /* FALLTHROUGH */ 207 1.3.2.2 elad default: 208 1.3.2.2 elad printf(": could not map mem space\n"); 209 1.3.2.2 elad return; 210 1.3.2.2 elad } 211 1.3.2.2 elad 212 1.3.2.2 elad if (pci_intr_map(pa, &ih) != 0) { 213 1.3.2.2 elad printf(": could not map interrupt\n"); 214 1.3.2.2 elad return; 215 1.3.2.2 elad } 216 1.3.2.2 elad 217 1.3.2.2 elad intrstr = pci_intr_string(pc, ih); 218 1.3.2.2 elad sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, nfe_intr, sc); 219 1.3.2.2 elad if (sc->sc_ih == NULL) { 220 1.3.2.2 elad printf(": could not establish interrupt"); 221 1.3.2.2 elad if (intrstr != NULL) 222 1.3.2.2 elad printf(" at %s", intrstr); 223 1.3.2.2 elad printf("\n"); 224 1.3.2.2 elad return; 225 1.3.2.2 elad } 226 1.3.2.2 elad printf(": %s", intrstr); 227 1.3.2.2 elad 228 1.3.2.2 elad sc->sc_dmat = pa->pa_dmat; 229 1.3.2.2 elad 230 1.3.2.2 elad nfe_get_macaddr(sc, sc->sc_enaddr); 231 1.3.2.2 elad printf(", address %s\n", ether_sprintf(sc->sc_enaddr)); 232 1.3.2.2 elad 233 1.3.2.2 elad sc->sc_flags = 0; 234 1.3.2.2 elad 235 1.3.2.2 elad switch (PCI_PRODUCT(pa->pa_id)) { 236 1.3.2.2 elad case PCI_PRODUCT_NVIDIA_NFORCE3_LAN2: 237 1.3.2.2 elad case PCI_PRODUCT_NVIDIA_NFORCE3_LAN3: 238 1.3.2.2 elad case PCI_PRODUCT_NVIDIA_NFORCE3_LAN4: 239 1.3.2.2 elad case PCI_PRODUCT_NVIDIA_NFORCE3_LAN5: 240 1.3.2.2 elad sc->sc_flags |= NFE_JUMBO_SUP | NFE_HW_CSUM; 241 1.3.2.2 elad break; 242 1.3.2.2 elad case PCI_PRODUCT_NVIDIA_MCP51_LAN1: 243 1.3.2.2 elad case PCI_PRODUCT_NVIDIA_MCP51_LAN2: 244 1.3.2.2 elad sc->sc_flags |= NFE_40BIT_ADDR; 245 1.3.2.2 elad break; 246 1.3.2.2 elad case PCI_PRODUCT_NVIDIA_CK804_LAN1: 247 1.3.2.2 elad case PCI_PRODUCT_NVIDIA_CK804_LAN2: 248 1.3.2.2 elad case PCI_PRODUCT_NVIDIA_MCP04_LAN1: 249 1.3.2.2 elad case PCI_PRODUCT_NVIDIA_MCP04_LAN2: 250 1.3.2.2 elad sc->sc_flags |= NFE_JUMBO_SUP | NFE_40BIT_ADDR | NFE_HW_CSUM; 251 1.3.2.2 elad break; 252 1.3.2.2 elad case PCI_PRODUCT_NVIDIA_MCP55_LAN1: 253 1.3.2.2 elad case PCI_PRODUCT_NVIDIA_MCP55_LAN2: 254 1.3.2.2 elad sc->sc_flags |= NFE_JUMBO_SUP | NFE_40BIT_ADDR | NFE_HW_CSUM | 255 1.3.2.2 elad NFE_HW_VLAN; 256 1.3.2.2 elad break; 257 1.3.2.2 elad } 258 1.3.2.2 elad 259 1.3.2.2 elad #ifndef NFE_NO_JUMBO 260 1.3.2.2 elad /* enable jumbo frames for adapters that support it */ 261 1.3.2.2 elad if (sc->sc_flags & NFE_JUMBO_SUP) 262 1.3.2.2 elad sc->sc_flags |= NFE_USE_JUMBO; 263 1.3.2.2 elad #endif 264 1.3.2.2 elad 265 1.3.2.2 elad /* 266 1.3.2.2 elad * Allocate Tx and Rx rings. 267 1.3.2.2 elad */ 268 1.3.2.2 elad if (nfe_alloc_tx_ring(sc, &sc->txq) != 0) { 269 1.3.2.2 elad printf("%s: could not allocate Tx ring\n", 270 1.3.2.2 elad sc->sc_dev.dv_xname); 271 1.3.2.2 elad return; 272 1.3.2.2 elad } 273 1.3.2.2 elad 274 1.3.2.2 elad if (nfe_alloc_rx_ring(sc, &sc->rxq) != 0) { 275 1.3.2.2 elad printf("%s: could not allocate Rx ring\n", 276 1.3.2.2 elad sc->sc_dev.dv_xname); 277 1.3.2.2 elad nfe_free_tx_ring(sc, &sc->txq); 278 1.3.2.2 elad return; 279 1.3.2.2 elad } 280 1.3.2.2 elad 281 1.3.2.2 elad ifp = &sc->sc_ethercom.ec_if; 282 1.3.2.2 elad ifp->if_softc = sc; 283 1.3.2.2 elad ifp->if_mtu = ETHERMTU; 284 1.3.2.2 elad ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 285 1.3.2.2 elad ifp->if_ioctl = nfe_ioctl; 286 1.3.2.2 elad ifp->if_start = nfe_start; 287 1.3.2.2 elad ifp->if_watchdog = nfe_watchdog; 288 1.3.2.2 elad ifp->if_init = nfe_init; 289 1.3.2.2 elad ifp->if_baudrate = IF_Gbps(1); 290 1.3.2.2 elad IFQ_SET_MAXLEN(&ifp->if_snd, NFE_IFQ_MAXLEN); 291 1.3.2.2 elad IFQ_SET_READY(&ifp->if_snd); 292 1.3.2.2 elad strlcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ); 293 1.3.2.2 elad 294 1.3.2.2 elad #if NVLAN > 0 295 1.3.2.2 elad if (sc->sc_flags & NFE_HW_VLAN) 296 1.3.2.2 elad sc->sc_ethercom.ec_capabilities |= 297 1.3.2.2 elad ETHERCAP_VLAN_HWTAGGING | ETHERCAP_VLAN_MTU; 298 1.3.2.2 elad #endif 299 1.3.2.2 elad #ifdef NFE_CSUM 300 1.3.2.2 elad if (sc->sc_flags & NFE_HW_CSUM) { 301 1.3.2.2 elad ifp->if_capabilities |= IFCAP_CSUM_IPv4 | IFCAP_CSUM_TCPv4 | 302 1.3.2.2 elad IFCAP_CSUM_UDPv4; 303 1.3.2.2 elad } 304 1.3.2.2 elad #endif 305 1.3.2.2 elad 306 1.3.2.2 elad sc->sc_mii.mii_ifp = ifp; 307 1.3.2.2 elad sc->sc_mii.mii_readreg = nfe_miibus_readreg; 308 1.3.2.2 elad sc->sc_mii.mii_writereg = nfe_miibus_writereg; 309 1.3.2.2 elad sc->sc_mii.mii_statchg = nfe_miibus_statchg; 310 1.3.2.2 elad 311 1.3.2.2 elad ifmedia_init(&sc->sc_mii.mii_media, 0, nfe_ifmedia_upd, 312 1.3.2.2 elad nfe_ifmedia_sts); 313 1.3.2.2 elad mii_attach(self, &sc->sc_mii, 0xffffffff, MII_PHY_ANY, 314 1.3.2.2 elad MII_OFFSET_ANY, 0); 315 1.3.2.2 elad if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 316 1.3.2.2 elad printf("%s: no PHY found!\n", sc->sc_dev.dv_xname); 317 1.3.2.2 elad ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER | IFM_MANUAL, 318 1.3.2.2 elad 0, NULL); 319 1.3.2.2 elad ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER | IFM_MANUAL); 320 1.3.2.2 elad } else 321 1.3.2.2 elad ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER | IFM_AUTO); 322 1.3.2.2 elad 323 1.3.2.2 elad if_attach(ifp); 324 1.3.2.2 elad ether_ifattach(ifp, sc->sc_enaddr); 325 1.3.2.2 elad 326 1.3.2.2 elad callout_init(&sc->sc_tick_ch); 327 1.3.2.2 elad callout_setfunc(&sc->sc_tick_ch, nfe_tick, sc); 328 1.3.2.2 elad 329 1.3.2.2 elad sc->sc_powerhook = powerhook_establish(nfe_power, sc); 330 1.3.2.2 elad } 331 1.3.2.2 elad 332 1.3.2.2 elad void 333 1.3.2.2 elad nfe_power(int why, void *arg) 334 1.3.2.2 elad { 335 1.3.2.2 elad struct nfe_softc *sc = arg; 336 1.3.2.2 elad struct ifnet *ifp; 337 1.3.2.2 elad 338 1.3.2.2 elad if (why == PWR_RESUME) { 339 1.3.2.2 elad ifp = &sc->sc_ethercom.ec_if; 340 1.3.2.2 elad if (ifp->if_flags & IFF_UP) { 341 1.3.2.2 elad ifp->if_flags &= ~IFF_RUNNING; 342 1.3.2.2 elad nfe_init(ifp); 343 1.3.2.2 elad if (ifp->if_flags & IFF_RUNNING) 344 1.3.2.2 elad nfe_start(ifp); 345 1.3.2.2 elad } 346 1.3.2.2 elad } 347 1.3.2.2 elad } 348 1.3.2.2 elad 349 1.3.2.2 elad void 350 1.3.2.2 elad nfe_miibus_statchg(struct device *dev) 351 1.3.2.2 elad { 352 1.3.2.2 elad struct nfe_softc *sc = (struct nfe_softc *)dev; 353 1.3.2.2 elad struct mii_data *mii = &sc->sc_mii; 354 1.3.2.2 elad uint32_t phy, seed, misc = NFE_MISC1_MAGIC, link = NFE_MEDIA_SET; 355 1.3.2.2 elad 356 1.3.2.2 elad phy = NFE_READ(sc, NFE_PHY_IFACE); 357 1.3.2.2 elad phy &= ~(NFE_PHY_HDX | NFE_PHY_100TX | NFE_PHY_1000T); 358 1.3.2.2 elad 359 1.3.2.2 elad seed = NFE_READ(sc, NFE_RNDSEED); 360 1.3.2.2 elad seed &= ~NFE_SEED_MASK; 361 1.3.2.2 elad 362 1.3.2.2 elad if ((mii->mii_media_active & IFM_GMASK) == IFM_HDX) { 363 1.3.2.2 elad phy |= NFE_PHY_HDX; /* half-duplex */ 364 1.3.2.2 elad misc |= NFE_MISC1_HDX; 365 1.3.2.2 elad } 366 1.3.2.2 elad 367 1.3.2.2 elad switch (IFM_SUBTYPE(mii->mii_media_active)) { 368 1.3.2.2 elad case IFM_1000_T: /* full-duplex only */ 369 1.3.2.2 elad link |= NFE_MEDIA_1000T; 370 1.3.2.2 elad seed |= NFE_SEED_1000T; 371 1.3.2.2 elad phy |= NFE_PHY_1000T; 372 1.3.2.2 elad break; 373 1.3.2.2 elad case IFM_100_TX: 374 1.3.2.2 elad link |= NFE_MEDIA_100TX; 375 1.3.2.2 elad seed |= NFE_SEED_100TX; 376 1.3.2.2 elad phy |= NFE_PHY_100TX; 377 1.3.2.2 elad break; 378 1.3.2.2 elad case IFM_10_T: 379 1.3.2.2 elad link |= NFE_MEDIA_10T; 380 1.3.2.2 elad seed |= NFE_SEED_10T; 381 1.3.2.2 elad break; 382 1.3.2.2 elad } 383 1.3.2.2 elad 384 1.3.2.2 elad NFE_WRITE(sc, NFE_RNDSEED, seed); /* XXX: gigabit NICs only? */ 385 1.3.2.2 elad 386 1.3.2.2 elad NFE_WRITE(sc, NFE_PHY_IFACE, phy); 387 1.3.2.2 elad NFE_WRITE(sc, NFE_MISC1, misc); 388 1.3.2.2 elad NFE_WRITE(sc, NFE_LINKSPEED, link); 389 1.3.2.2 elad } 390 1.3.2.2 elad 391 1.3.2.2 elad int 392 1.3.2.2 elad nfe_miibus_readreg(struct device *dev, int phy, int reg) 393 1.3.2.2 elad { 394 1.3.2.2 elad struct nfe_softc *sc = (struct nfe_softc *)dev; 395 1.3.2.2 elad uint32_t val; 396 1.3.2.2 elad int ntries; 397 1.3.2.2 elad 398 1.3.2.2 elad NFE_WRITE(sc, NFE_PHY_STATUS, 0xf); 399 1.3.2.2 elad 400 1.3.2.2 elad if (NFE_READ(sc, NFE_PHY_CTL) & NFE_PHY_BUSY) { 401 1.3.2.2 elad NFE_WRITE(sc, NFE_PHY_CTL, NFE_PHY_BUSY); 402 1.3.2.2 elad DELAY(100); 403 1.3.2.2 elad } 404 1.3.2.2 elad 405 1.3.2.2 elad NFE_WRITE(sc, NFE_PHY_CTL, (phy << NFE_PHYADD_SHIFT) | reg); 406 1.3.2.2 elad 407 1.3.2.2 elad for (ntries = 0; ntries < 1000; ntries++) { 408 1.3.2.2 elad DELAY(100); 409 1.3.2.2 elad if (!(NFE_READ(sc, NFE_PHY_CTL) & NFE_PHY_BUSY)) 410 1.3.2.2 elad break; 411 1.3.2.2 elad } 412 1.3.2.2 elad if (ntries == 1000) { 413 1.3.2.2 elad DPRINTFN(2, ("%s: timeout waiting for PHY\n", 414 1.3.2.2 elad sc->sc_dev.dv_xname)); 415 1.3.2.2 elad return 0; 416 1.3.2.2 elad } 417 1.3.2.2 elad 418 1.3.2.2 elad if (NFE_READ(sc, NFE_PHY_STATUS) & NFE_PHY_ERROR) { 419 1.3.2.2 elad DPRINTFN(2, ("%s: could not read PHY\n", 420 1.3.2.2 elad sc->sc_dev.dv_xname)); 421 1.3.2.2 elad return 0; 422 1.3.2.2 elad } 423 1.3.2.2 elad 424 1.3.2.2 elad val = NFE_READ(sc, NFE_PHY_DATA); 425 1.3.2.2 elad if (val != 0xffffffff && val != 0) 426 1.3.2.2 elad sc->mii_phyaddr = phy; 427 1.3.2.2 elad 428 1.3.2.2 elad DPRINTFN(2, ("%s: mii read phy %d reg 0x%x ret 0x%x\n", 429 1.3.2.2 elad sc->sc_dev.dv_xname, phy, reg, val)); 430 1.3.2.2 elad 431 1.3.2.2 elad return val; 432 1.3.2.2 elad } 433 1.3.2.2 elad 434 1.3.2.2 elad void 435 1.3.2.2 elad nfe_miibus_writereg(struct device *dev, int phy, int reg, int val) 436 1.3.2.2 elad { 437 1.3.2.2 elad struct nfe_softc *sc = (struct nfe_softc *)dev; 438 1.3.2.2 elad uint32_t ctl; 439 1.3.2.2 elad int ntries; 440 1.3.2.2 elad 441 1.3.2.2 elad NFE_WRITE(sc, NFE_PHY_STATUS, 0xf); 442 1.3.2.2 elad 443 1.3.2.2 elad if (NFE_READ(sc, NFE_PHY_CTL) & NFE_PHY_BUSY) { 444 1.3.2.2 elad NFE_WRITE(sc, NFE_PHY_CTL, NFE_PHY_BUSY); 445 1.3.2.2 elad DELAY(100); 446 1.3.2.2 elad } 447 1.3.2.2 elad 448 1.3.2.2 elad NFE_WRITE(sc, NFE_PHY_DATA, val); 449 1.3.2.2 elad ctl = NFE_PHY_WRITE | (phy << NFE_PHYADD_SHIFT) | reg; 450 1.3.2.2 elad NFE_WRITE(sc, NFE_PHY_CTL, ctl); 451 1.3.2.2 elad 452 1.3.2.2 elad for (ntries = 0; ntries < 1000; ntries++) { 453 1.3.2.2 elad DELAY(100); 454 1.3.2.2 elad if (!(NFE_READ(sc, NFE_PHY_CTL) & NFE_PHY_BUSY)) 455 1.3.2.2 elad break; 456 1.3.2.2 elad } 457 1.3.2.2 elad #ifdef NFE_DEBUG 458 1.3.2.2 elad if (nfedebug >= 2 && ntries == 1000) 459 1.3.2.2 elad printf("could not write to PHY\n"); 460 1.3.2.2 elad #endif 461 1.3.2.2 elad } 462 1.3.2.2 elad 463 1.3.2.2 elad int 464 1.3.2.2 elad nfe_intr(void *arg) 465 1.3.2.2 elad { 466 1.3.2.2 elad struct nfe_softc *sc = arg; 467 1.3.2.2 elad struct ifnet *ifp = &sc->sc_ethercom.ec_if; 468 1.3.2.2 elad uint32_t r; 469 1.3.2.2 elad 470 1.3.2.2 elad if ((r = NFE_READ(sc, NFE_IRQ_STATUS)) == 0) 471 1.3.2.2 elad return 0; /* not for us */ 472 1.3.2.2 elad NFE_WRITE(sc, NFE_IRQ_STATUS, r); 473 1.3.2.2 elad 474 1.3.2.2 elad DPRINTFN(5, ("nfe_intr: interrupt register %x\n", r)); 475 1.3.2.2 elad 476 1.3.2.2 elad if (r & NFE_IRQ_LINK) { 477 1.3.2.2 elad NFE_READ(sc, NFE_PHY_STATUS); 478 1.3.2.2 elad NFE_WRITE(sc, NFE_PHY_STATUS, 0xf); 479 1.3.2.2 elad DPRINTF(("%s: link state changed\n", sc->sc_dev.dv_xname)); 480 1.3.2.2 elad } 481 1.3.2.2 elad 482 1.3.2.2 elad if (ifp->if_flags & IFF_RUNNING) { 483 1.3.2.2 elad /* check Rx ring */ 484 1.3.2.2 elad nfe_rxeof(sc); 485 1.3.2.2 elad 486 1.3.2.2 elad /* check Tx ring */ 487 1.3.2.2 elad nfe_txeof(sc); 488 1.3.2.2 elad } 489 1.3.2.2 elad 490 1.3.2.2 elad return 1; 491 1.3.2.2 elad } 492 1.3.2.2 elad 493 1.3.2.2 elad int 494 1.3.2.2 elad nfe_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 495 1.3.2.2 elad { 496 1.3.2.2 elad struct nfe_softc *sc = ifp->if_softc; 497 1.3.2.2 elad struct ifreq *ifr = (struct ifreq *)data; 498 1.3.2.2 elad struct ifaddr *ifa = (struct ifaddr *)data; 499 1.3.2.2 elad int s, error = 0; 500 1.3.2.2 elad 501 1.3.2.2 elad s = splnet(); 502 1.3.2.2 elad 503 1.3.2.2 elad switch (cmd) { 504 1.3.2.2 elad case SIOCSIFADDR: 505 1.3.2.2 elad ifp->if_flags |= IFF_UP; 506 1.3.2.2 elad nfe_init(ifp); 507 1.3.2.2 elad switch (ifa->ifa_addr->sa_family) { 508 1.3.2.2 elad #ifdef INET 509 1.3.2.2 elad case AF_INET: 510 1.3.2.2 elad arp_ifinit(ifp, ifa); 511 1.3.2.2 elad break; 512 1.3.2.2 elad #endif 513 1.3.2.2 elad default: 514 1.3.2.2 elad break; 515 1.3.2.2 elad } 516 1.3.2.2 elad break; 517 1.3.2.2 elad case SIOCSIFMTU: 518 1.3.2.2 elad if (ifr->ifr_mtu < ETHERMIN || 519 1.3.2.2 elad ((sc->sc_flags & NFE_USE_JUMBO) && 520 1.3.2.2 elad ifr->ifr_mtu > ETHERMTU_JUMBO) || 521 1.3.2.2 elad (!(sc->sc_flags & NFE_USE_JUMBO) && 522 1.3.2.2 elad ifr->ifr_mtu > ETHERMTU)) 523 1.3.2.2 elad error = EINVAL; 524 1.3.2.2 elad else if (ifp->if_mtu != ifr->ifr_mtu) 525 1.3.2.2 elad ifp->if_mtu = ifr->ifr_mtu; 526 1.3.2.2 elad break; 527 1.3.2.2 elad case SIOCSIFFLAGS: 528 1.3.2.2 elad if (ifp->if_flags & IFF_UP) { 529 1.3.2.2 elad /* 530 1.3.2.2 elad * If only the PROMISC or ALLMULTI flag changes, then 531 1.3.2.2 elad * don't do a full re-init of the chip, just update 532 1.3.2.2 elad * the Rx filter. 533 1.3.2.2 elad */ 534 1.3.2.2 elad if ((ifp->if_flags & IFF_RUNNING) && 535 1.3.2.2 elad ((ifp->if_flags ^ sc->sc_if_flags) & 536 1.3.2.2 elad (IFF_ALLMULTI | IFF_PROMISC)) != 0) 537 1.3.2.2 elad nfe_setmulti(sc); 538 1.3.2.2 elad else 539 1.3.2.2 elad nfe_init(ifp); 540 1.3.2.2 elad } else { 541 1.3.2.2 elad if (ifp->if_flags & IFF_RUNNING) 542 1.3.2.2 elad nfe_stop(ifp, 1); 543 1.3.2.2 elad } 544 1.3.2.2 elad sc->sc_if_flags = ifp->if_flags; 545 1.3.2.2 elad break; 546 1.3.2.2 elad case SIOCADDMULTI: 547 1.3.2.2 elad case SIOCDELMULTI: 548 1.3.2.2 elad error = (cmd == SIOCADDMULTI) ? 549 1.3.2.2 elad ether_addmulti(ifr, &sc->sc_ethercom) : 550 1.3.2.2 elad ether_delmulti(ifr, &sc->sc_ethercom); 551 1.3.2.2 elad 552 1.3.2.2 elad if (error == ENETRESET) { 553 1.3.2.2 elad if (ifp->if_flags & IFF_RUNNING) 554 1.3.2.2 elad nfe_setmulti(sc); 555 1.3.2.2 elad error = 0; 556 1.3.2.2 elad } 557 1.3.2.2 elad break; 558 1.3.2.2 elad case SIOCSIFMEDIA: 559 1.3.2.2 elad case SIOCGIFMEDIA: 560 1.3.2.2 elad error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd); 561 1.3.2.2 elad break; 562 1.3.2.2 elad default: 563 1.3.2.2 elad error = ether_ioctl(ifp, cmd, data); 564 1.3.2.2 elad if (error == ENETRESET) { 565 1.3.2.2 elad if (ifp->if_flags & IFF_RUNNING) 566 1.3.2.2 elad nfe_setmulti(sc); 567 1.3.2.2 elad error = 0; 568 1.3.2.2 elad } 569 1.3.2.2 elad break; 570 1.3.2.2 elad 571 1.3.2.2 elad } 572 1.3.2.2 elad 573 1.3.2.2 elad splx(s); 574 1.3.2.2 elad 575 1.3.2.2 elad return error; 576 1.3.2.2 elad } 577 1.3.2.2 elad 578 1.3.2.2 elad void 579 1.3.2.2 elad nfe_txdesc32_sync(struct nfe_softc *sc, struct nfe_desc32 *desc32, int ops) 580 1.3.2.2 elad { 581 1.3.2.2 elad bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 582 1.3.2.2 elad (caddr_t)desc32 - (caddr_t)sc->txq.desc32, 583 1.3.2.2 elad sizeof (struct nfe_desc32), ops); 584 1.3.2.2 elad } 585 1.3.2.2 elad 586 1.3.2.2 elad void 587 1.3.2.2 elad nfe_txdesc64_sync(struct nfe_softc *sc, struct nfe_desc64 *desc64, int ops) 588 1.3.2.2 elad { 589 1.3.2.2 elad bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 590 1.3.2.2 elad (caddr_t)desc64 - (caddr_t)sc->txq.desc64, 591 1.3.2.2 elad sizeof (struct nfe_desc64), ops); 592 1.3.2.2 elad } 593 1.3.2.2 elad 594 1.3.2.2 elad void 595 1.3.2.2 elad nfe_txdesc32_rsync(struct nfe_softc *sc, int start, int end, int ops) 596 1.3.2.2 elad { 597 1.3.2.2 elad if (end > start) { 598 1.3.2.2 elad bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 599 1.3.2.2 elad (caddr_t)&sc->txq.desc32[start] - (caddr_t)sc->txq.desc32, 600 1.3.2.2 elad (caddr_t)&sc->txq.desc32[end] - 601 1.3.2.2 elad (caddr_t)&sc->txq.desc32[start], ops); 602 1.3.2.2 elad return; 603 1.3.2.2 elad } 604 1.3.2.2 elad /* sync from 'start' to end of ring */ 605 1.3.2.2 elad bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 606 1.3.2.2 elad (caddr_t)&sc->txq.desc32[start] - (caddr_t)sc->txq.desc32, 607 1.3.2.2 elad (caddr_t)&sc->txq.desc32[NFE_TX_RING_COUNT] - 608 1.3.2.2 elad (caddr_t)&sc->txq.desc32[start], ops); 609 1.3.2.2 elad 610 1.3.2.2 elad /* sync from start of ring to 'end' */ 611 1.3.2.2 elad bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 0, 612 1.3.2.2 elad (caddr_t)&sc->txq.desc32[end] - (caddr_t)sc->txq.desc32, ops); 613 1.3.2.2 elad } 614 1.3.2.2 elad 615 1.3.2.2 elad void 616 1.3.2.2 elad nfe_txdesc64_rsync(struct nfe_softc *sc, int start, int end, int ops) 617 1.3.2.2 elad { 618 1.3.2.2 elad if (end > start) { 619 1.3.2.2 elad bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 620 1.3.2.2 elad (caddr_t)&sc->txq.desc64[start] - (caddr_t)sc->txq.desc64, 621 1.3.2.2 elad (caddr_t)&sc->txq.desc64[end] - 622 1.3.2.2 elad (caddr_t)&sc->txq.desc64[start], ops); 623 1.3.2.2 elad return; 624 1.3.2.2 elad } 625 1.3.2.2 elad /* sync from 'start' to end of ring */ 626 1.3.2.2 elad bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 627 1.3.2.2 elad (caddr_t)&sc->txq.desc64[start] - (caddr_t)sc->txq.desc64, 628 1.3.2.2 elad (caddr_t)&sc->txq.desc64[NFE_TX_RING_COUNT] - 629 1.3.2.2 elad (caddr_t)&sc->txq.desc64[start], ops); 630 1.3.2.2 elad 631 1.3.2.2 elad /* sync from start of ring to 'end' */ 632 1.3.2.2 elad bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 0, 633 1.3.2.2 elad (caddr_t)&sc->txq.desc64[end] - (caddr_t)sc->txq.desc64, ops); 634 1.3.2.2 elad } 635 1.3.2.2 elad 636 1.3.2.2 elad void 637 1.3.2.2 elad nfe_rxdesc32_sync(struct nfe_softc *sc, struct nfe_desc32 *desc32, int ops) 638 1.3.2.2 elad { 639 1.3.2.2 elad bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 640 1.3.2.2 elad (caddr_t)desc32 - (caddr_t)sc->rxq.desc32, 641 1.3.2.2 elad sizeof (struct nfe_desc32), ops); 642 1.3.2.2 elad } 643 1.3.2.2 elad 644 1.3.2.2 elad void 645 1.3.2.2 elad nfe_rxdesc64_sync(struct nfe_softc *sc, struct nfe_desc64 *desc64, int ops) 646 1.3.2.2 elad { 647 1.3.2.2 elad bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 648 1.3.2.2 elad (caddr_t)desc64 - (caddr_t)sc->rxq.desc64, 649 1.3.2.2 elad sizeof (struct nfe_desc64), ops); 650 1.3.2.2 elad } 651 1.3.2.2 elad 652 1.3.2.2 elad void 653 1.3.2.2 elad nfe_rxeof(struct nfe_softc *sc) 654 1.3.2.2 elad { 655 1.3.2.2 elad struct ifnet *ifp = &sc->sc_ethercom.ec_if; 656 1.3.2.2 elad struct nfe_desc32 *desc32; 657 1.3.2.2 elad struct nfe_desc64 *desc64; 658 1.3.2.2 elad struct nfe_rx_data *data; 659 1.3.2.2 elad struct nfe_jbuf *jbuf; 660 1.3.2.2 elad struct mbuf *m, *mnew; 661 1.3.2.2 elad bus_addr_t physaddr; 662 1.3.2.2 elad uint16_t flags; 663 1.3.2.2 elad int error, len; 664 1.3.2.2 elad 665 1.3.2.2 elad desc32 = NULL; 666 1.3.2.2 elad desc64 = NULL; 667 1.3.2.2 elad for (;;) { 668 1.3.2.2 elad data = &sc->rxq.data[sc->rxq.cur]; 669 1.3.2.2 elad 670 1.3.2.2 elad if (sc->sc_flags & NFE_40BIT_ADDR) { 671 1.3.2.2 elad desc64 = &sc->rxq.desc64[sc->rxq.cur]; 672 1.3.2.2 elad nfe_rxdesc64_sync(sc, desc64, BUS_DMASYNC_POSTREAD); 673 1.3.2.2 elad 674 1.3.2.2 elad flags = le16toh(desc64->flags); 675 1.3.2.2 elad len = le16toh(desc64->length) & 0x3fff; 676 1.3.2.2 elad } else { 677 1.3.2.2 elad desc32 = &sc->rxq.desc32[sc->rxq.cur]; 678 1.3.2.2 elad nfe_rxdesc32_sync(sc, desc32, BUS_DMASYNC_POSTREAD); 679 1.3.2.2 elad 680 1.3.2.2 elad flags = le16toh(desc32->flags); 681 1.3.2.2 elad len = le16toh(desc32->length) & 0x3fff; 682 1.3.2.2 elad } 683 1.3.2.2 elad 684 1.3.2.2 elad if (flags & NFE_RX_READY) 685 1.3.2.2 elad break; 686 1.3.2.2 elad 687 1.3.2.2 elad if ((sc->sc_flags & (NFE_JUMBO_SUP | NFE_40BIT_ADDR)) == 0) { 688 1.3.2.2 elad if (!(flags & NFE_RX_VALID_V1)) 689 1.3.2.2 elad goto skip; 690 1.3.2.2 elad 691 1.3.2.2 elad if ((flags & NFE_RX_FIXME_V1) == NFE_RX_FIXME_V1) { 692 1.3.2.2 elad flags &= ~NFE_RX_ERROR; 693 1.3.2.2 elad len--; /* fix buffer length */ 694 1.3.2.2 elad } 695 1.3.2.2 elad } else { 696 1.3.2.2 elad if (!(flags & NFE_RX_VALID_V2)) 697 1.3.2.2 elad goto skip; 698 1.3.2.2 elad 699 1.3.2.2 elad if ((flags & NFE_RX_FIXME_V2) == NFE_RX_FIXME_V2) { 700 1.3.2.2 elad flags &= ~NFE_RX_ERROR; 701 1.3.2.2 elad len--; /* fix buffer length */ 702 1.3.2.2 elad } 703 1.3.2.2 elad } 704 1.3.2.2 elad 705 1.3.2.2 elad if (flags & NFE_RX_ERROR) { 706 1.3.2.2 elad ifp->if_ierrors++; 707 1.3.2.2 elad goto skip; 708 1.3.2.2 elad } 709 1.3.2.2 elad 710 1.3.2.2 elad /* 711 1.3.2.2 elad * Try to allocate a new mbuf for this ring element and load 712 1.3.2.2 elad * it before processing the current mbuf. If the ring element 713 1.3.2.2 elad * cannot be loaded, drop the received packet and reuse the 714 1.3.2.2 elad * old mbuf. In the unlikely case that the old mbuf can't be 715 1.3.2.2 elad * reloaded either, explicitly panic. 716 1.3.2.2 elad */ 717 1.3.2.2 elad MGETHDR(mnew, M_DONTWAIT, MT_DATA); 718 1.3.2.2 elad if (mnew == NULL) { 719 1.3.2.2 elad ifp->if_ierrors++; 720 1.3.2.2 elad goto skip; 721 1.3.2.2 elad } 722 1.3.2.2 elad 723 1.3.2.2 elad if (sc->sc_flags & NFE_USE_JUMBO) { 724 1.3.2.2 elad if ((jbuf = nfe_jalloc(sc)) == NULL) { 725 1.3.2.2 elad m_freem(mnew); 726 1.3.2.2 elad ifp->if_ierrors++; 727 1.3.2.2 elad goto skip; 728 1.3.2.2 elad } 729 1.3.2.2 elad MEXTADD(mnew, jbuf->buf, NFE_JBYTES, 0, nfe_jfree, sc); 730 1.3.2.2 elad 731 1.3.2.2 elad bus_dmamap_sync(sc->sc_dmat, sc->rxq.jmap, 732 1.3.2.2 elad mtod(data->m, caddr_t) - sc->rxq.jpool, NFE_JBYTES, 733 1.3.2.2 elad BUS_DMASYNC_POSTREAD); 734 1.3.2.2 elad 735 1.3.2.2 elad physaddr = jbuf->physaddr; 736 1.3.2.2 elad } else { 737 1.3.2.2 elad MCLGET(mnew, M_DONTWAIT); 738 1.3.2.2 elad if (!(mnew->m_flags & M_EXT)) { 739 1.3.2.2 elad m_freem(mnew); 740 1.3.2.2 elad ifp->if_ierrors++; 741 1.3.2.2 elad goto skip; 742 1.3.2.2 elad } 743 1.3.2.2 elad 744 1.3.2.2 elad bus_dmamap_sync(sc->sc_dmat, data->map, 0, 745 1.3.2.2 elad data->map->dm_mapsize, BUS_DMASYNC_POSTREAD); 746 1.3.2.2 elad bus_dmamap_unload(sc->sc_dmat, data->map); 747 1.3.2.2 elad 748 1.3.2.2 elad error = bus_dmamap_load(sc->sc_dmat, data->map, 749 1.3.2.2 elad mtod(mnew, void *), MCLBYTES, NULL, 750 1.3.2.2 elad BUS_DMA_READ | BUS_DMA_NOWAIT); 751 1.3.2.2 elad if (error != 0) { 752 1.3.2.2 elad m_freem(mnew); 753 1.3.2.2 elad 754 1.3.2.2 elad /* try to reload the old mbuf */ 755 1.3.2.2 elad error = bus_dmamap_load(sc->sc_dmat, data->map, 756 1.3.2.2 elad mtod(data->m, void *), MCLBYTES, NULL, 757 1.3.2.2 elad BUS_DMA_READ | BUS_DMA_NOWAIT); 758 1.3.2.2 elad if (error != 0) { 759 1.3.2.2 elad /* very unlikely that it will fail.. */ 760 1.3.2.2 elad panic("%s: could not load old rx mbuf", 761 1.3.2.2 elad sc->sc_dev.dv_xname); 762 1.3.2.2 elad } 763 1.3.2.2 elad ifp->if_ierrors++; 764 1.3.2.2 elad goto skip; 765 1.3.2.2 elad } 766 1.3.2.2 elad physaddr = data->map->dm_segs[0].ds_addr; 767 1.3.2.2 elad } 768 1.3.2.2 elad 769 1.3.2.2 elad /* 770 1.3.2.2 elad * New mbuf successfully loaded, update Rx ring and continue 771 1.3.2.2 elad * processing. 772 1.3.2.2 elad */ 773 1.3.2.2 elad m = data->m; 774 1.3.2.2 elad data->m = mnew; 775 1.3.2.2 elad 776 1.3.2.2 elad /* finalize mbuf */ 777 1.3.2.2 elad m->m_pkthdr.len = m->m_len = len; 778 1.3.2.2 elad m->m_pkthdr.rcvif = ifp; 779 1.3.2.2 elad 780 1.3.2.2 elad #ifdef notyet 781 1.3.2.2 elad if (sc->sc_flags & NFE_HW_CSUM) { 782 1.3.2.2 elad if (flags & NFE_RX_IP_CSUMOK) 783 1.3.2.2 elad m->m_pkthdr.csum_flags |= M_IPV4_CSUM_IN_OK; 784 1.3.2.2 elad if (flags & NFE_RX_UDP_CSUMOK) 785 1.3.2.2 elad m->m_pkthdr.csum_flags |= M_UDP_CSUM_IN_OK; 786 1.3.2.2 elad if (flags & NFE_RX_TCP_CSUMOK) 787 1.3.2.2 elad m->m_pkthdr.csum_flags |= M_TCP_CSUM_IN_OK; 788 1.3.2.2 elad } 789 1.3.2.2 elad #elif defined(NFE_CSUM) 790 1.3.2.2 elad if ((sc->sc_flags & NFE_HW_CSUM) && (flags & NFE_RX_CSUMOK)) 791 1.3.2.2 elad m->m_pkthdr.csum_flags = M_IPV4_CSUM_IN_OK; 792 1.3.2.2 elad #endif 793 1.3.2.2 elad 794 1.3.2.2 elad #if NBPFILTER > 0 795 1.3.2.2 elad if (ifp->if_bpf) 796 1.3.2.2 elad bpf_mtap(ifp->if_bpf, m); 797 1.3.2.2 elad #endif 798 1.3.2.2 elad ifp->if_ipackets++; 799 1.3.2.2 elad (*ifp->if_input)(ifp, m); 800 1.3.2.2 elad 801 1.3.2.2 elad /* update mapping address in h/w descriptor */ 802 1.3.2.2 elad if (sc->sc_flags & NFE_40BIT_ADDR) { 803 1.3.2.2 elad #if defined(__LP64__) 804 1.3.2.2 elad desc64->physaddr[0] = htole32(physaddr >> 32); 805 1.3.2.2 elad #endif 806 1.3.2.2 elad desc64->physaddr[1] = htole32(physaddr & 0xffffffff); 807 1.3.2.2 elad } else { 808 1.3.2.2 elad desc32->physaddr = htole32(physaddr); 809 1.3.2.2 elad } 810 1.3.2.2 elad 811 1.3.2.2 elad skip: if (sc->sc_flags & NFE_40BIT_ADDR) { 812 1.3.2.2 elad desc64->length = htole16(sc->rxq.bufsz); 813 1.3.2.2 elad desc64->flags = htole16(NFE_RX_READY); 814 1.3.2.2 elad 815 1.3.2.2 elad nfe_rxdesc64_sync(sc, desc64, BUS_DMASYNC_PREWRITE); 816 1.3.2.2 elad } else { 817 1.3.2.2 elad desc32->length = htole16(sc->rxq.bufsz); 818 1.3.2.2 elad desc32->flags = htole16(NFE_RX_READY); 819 1.3.2.2 elad 820 1.3.2.2 elad nfe_rxdesc32_sync(sc, desc32, BUS_DMASYNC_PREWRITE); 821 1.3.2.2 elad } 822 1.3.2.2 elad 823 1.3.2.2 elad sc->rxq.cur = (sc->rxq.cur + 1) % NFE_RX_RING_COUNT; 824 1.3.2.2 elad } 825 1.3.2.2 elad } 826 1.3.2.2 elad 827 1.3.2.2 elad void 828 1.3.2.2 elad nfe_txeof(struct nfe_softc *sc) 829 1.3.2.2 elad { 830 1.3.2.2 elad struct ifnet *ifp = &sc->sc_ethercom.ec_if; 831 1.3.2.2 elad struct nfe_desc32 *desc32; 832 1.3.2.2 elad struct nfe_desc64 *desc64; 833 1.3.2.2 elad struct nfe_tx_data *data = NULL; 834 1.3.2.2 elad uint16_t flags; 835 1.3.2.2 elad 836 1.3.2.2 elad while (sc->txq.next != sc->txq.cur) { 837 1.3.2.2 elad if (sc->sc_flags & NFE_40BIT_ADDR) { 838 1.3.2.2 elad desc64 = &sc->txq.desc64[sc->txq.next]; 839 1.3.2.2 elad nfe_txdesc64_sync(sc, desc64, BUS_DMASYNC_POSTREAD); 840 1.3.2.2 elad 841 1.3.2.2 elad flags = le16toh(desc64->flags); 842 1.3.2.2 elad } else { 843 1.3.2.2 elad desc32 = &sc->txq.desc32[sc->txq.next]; 844 1.3.2.2 elad nfe_txdesc32_sync(sc, desc32, BUS_DMASYNC_POSTREAD); 845 1.3.2.2 elad 846 1.3.2.2 elad flags = le16toh(desc32->flags); 847 1.3.2.2 elad } 848 1.3.2.2 elad 849 1.3.2.2 elad if (flags & NFE_TX_VALID) 850 1.3.2.2 elad break; 851 1.3.2.2 elad 852 1.3.2.2 elad data = &sc->txq.data[sc->txq.next]; 853 1.3.2.2 elad 854 1.3.2.2 elad if ((sc->sc_flags & (NFE_JUMBO_SUP | NFE_40BIT_ADDR)) == 0) { 855 1.3.2.2 elad if (!(flags & NFE_TX_LASTFRAG_V1) && data->m == NULL) 856 1.3.2.2 elad goto skip; 857 1.3.2.2 elad 858 1.3.2.2 elad if ((flags & NFE_TX_ERROR_V1) != 0) { 859 1.3.2.2 elad printf("%s: tx v1 error 0x%04x\n", 860 1.3.2.2 elad sc->sc_dev.dv_xname, flags); 861 1.3.2.2 elad ifp->if_oerrors++; 862 1.3.2.2 elad } else 863 1.3.2.2 elad ifp->if_opackets++; 864 1.3.2.2 elad } else { 865 1.3.2.2 elad if (!(flags & NFE_TX_LASTFRAG_V2) && data->m == NULL) 866 1.3.2.2 elad goto skip; 867 1.3.2.2 elad 868 1.3.2.2 elad if ((flags & NFE_TX_ERROR_V2) != 0) { 869 1.3.2.2 elad printf("%s: tx v2 error 0x%04x\n", 870 1.3.2.2 elad sc->sc_dev.dv_xname, flags); 871 1.3.2.2 elad ifp->if_oerrors++; 872 1.3.2.2 elad } else 873 1.3.2.2 elad ifp->if_opackets++; 874 1.3.2.2 elad } 875 1.3.2.2 elad 876 1.3.2.2 elad if (data->m == NULL) { /* should not get there */ 877 1.3.2.2 elad printf("%s: last fragment bit w/o associated mbuf!\n", 878 1.3.2.2 elad sc->sc_dev.dv_xname); 879 1.3.2.2 elad goto skip; 880 1.3.2.2 elad } 881 1.3.2.2 elad 882 1.3.2.2 elad /* last fragment of the mbuf chain transmitted */ 883 1.3.2.2 elad bus_dmamap_sync(sc->sc_dmat, data->active, 0, 884 1.3.2.2 elad data->active->dm_mapsize, BUS_DMASYNC_POSTWRITE); 885 1.3.2.2 elad bus_dmamap_unload(sc->sc_dmat, data->active); 886 1.3.2.2 elad m_freem(data->m); 887 1.3.2.2 elad data->m = NULL; 888 1.3.2.2 elad 889 1.3.2.2 elad ifp->if_timer = 0; 890 1.3.2.2 elad 891 1.3.2.2 elad skip: sc->txq.queued--; 892 1.3.2.2 elad sc->txq.next = (sc->txq.next + 1) % NFE_TX_RING_COUNT; 893 1.3.2.2 elad } 894 1.3.2.2 elad 895 1.3.2.2 elad if (data != NULL) { /* at least one slot freed */ 896 1.3.2.2 elad ifp->if_flags &= ~IFF_OACTIVE; 897 1.3.2.2 elad nfe_start(ifp); 898 1.3.2.2 elad } 899 1.3.2.2 elad } 900 1.3.2.2 elad 901 1.3.2.2 elad int 902 1.3.2.2 elad nfe_encap(struct nfe_softc *sc, struct mbuf *m0) 903 1.3.2.2 elad { 904 1.3.2.2 elad struct nfe_desc32 *desc32; 905 1.3.2.2 elad struct nfe_desc64 *desc64; 906 1.3.2.2 elad struct nfe_tx_data *data; 907 1.3.2.2 elad bus_dmamap_t map; 908 1.3.2.2 elad uint16_t flags = NFE_TX_VALID; 909 1.3.2.2 elad #if NVLAN > 0 910 1.3.2.2 elad struct m_tag *mtag; 911 1.3.2.2 elad uint32_t vtag = 0; 912 1.3.2.2 elad #endif 913 1.3.2.2 elad int error, i; 914 1.3.2.2 elad 915 1.3.2.2 elad desc32 = NULL; 916 1.3.2.2 elad desc64 = NULL; 917 1.3.2.2 elad data = NULL; 918 1.3.2.2 elad map = sc->txq.data[sc->txq.cur].map; 919 1.3.2.2 elad 920 1.3.2.2 elad error = bus_dmamap_load_mbuf(sc->sc_dmat, map, m0, BUS_DMA_NOWAIT); 921 1.3.2.2 elad if (error != 0) { 922 1.3.2.2 elad printf("%s: could not map mbuf (error %d)\n", 923 1.3.2.2 elad sc->sc_dev.dv_xname, error); 924 1.3.2.2 elad return error; 925 1.3.2.2 elad } 926 1.3.2.2 elad 927 1.3.2.2 elad if (sc->txq.queued + map->dm_nsegs >= NFE_TX_RING_COUNT - 1) { 928 1.3.2.2 elad bus_dmamap_unload(sc->sc_dmat, map); 929 1.3.2.2 elad return ENOBUFS; 930 1.3.2.2 elad } 931 1.3.2.2 elad 932 1.3.2.2 elad #if NVLAN > 0 933 1.3.2.2 elad /* setup h/w VLAN tagging */ 934 1.3.2.2 elad if (sc->sc_ethercom.ec_nvlans) { 935 1.3.2.2 elad mtag = m_tag_find(m0, PACKET_TAG_VLAN, NULL); 936 1.3.2.2 elad vtag = NFE_TX_VTAG | VLAN_TAG_VALUE(mtag); 937 1.3.2.2 elad } 938 1.3.2.2 elad #endif 939 1.3.2.2 elad #ifdef NFE_CSUM 940 1.3.2.2 elad if (m0->m_pkthdr.csum_flags & M_IPV4_CSUM_OUT) 941 1.3.2.2 elad flags |= NFE_TX_IP_CSUM; 942 1.3.2.2 elad if (m0->m_pkthdr.csum_flags & (M_TCPV4_CSUM_OUT | M_UDPV4_CSUM_OUT)) 943 1.3.2.2 elad flags |= NFE_TX_TCP_CSUM; 944 1.3.2.2 elad #endif 945 1.3.2.2 elad 946 1.3.2.2 elad for (i = 0; i < map->dm_nsegs; i++) { 947 1.3.2.2 elad data = &sc->txq.data[sc->txq.cur]; 948 1.3.2.2 elad 949 1.3.2.2 elad if (sc->sc_flags & NFE_40BIT_ADDR) { 950 1.3.2.2 elad desc64 = &sc->txq.desc64[sc->txq.cur]; 951 1.3.2.2 elad #if defined(__LP64__) 952 1.3.2.2 elad desc64->physaddr[0] = 953 1.3.2.2 elad htole32(map->dm_segs[i].ds_addr >> 32); 954 1.3.2.2 elad #endif 955 1.3.2.2 elad desc64->physaddr[1] = 956 1.3.2.2 elad htole32(map->dm_segs[i].ds_addr & 0xffffffff); 957 1.3.2.2 elad desc64->length = htole16(map->dm_segs[i].ds_len - 1); 958 1.3.2.2 elad desc64->flags = htole16(flags); 959 1.3.2.2 elad #if NVLAN > 0 960 1.3.2.2 elad desc64->vtag = htole32(vtag); 961 1.3.2.2 elad #endif 962 1.3.2.2 elad } else { 963 1.3.2.2 elad desc32 = &sc->txq.desc32[sc->txq.cur]; 964 1.3.2.2 elad 965 1.3.2.2 elad desc32->physaddr = htole32(map->dm_segs[i].ds_addr); 966 1.3.2.2 elad desc32->length = htole16(map->dm_segs[i].ds_len - 1); 967 1.3.2.2 elad desc32->flags = htole16(flags); 968 1.3.2.2 elad } 969 1.3.2.2 elad 970 1.3.2.2 elad /* csum flags and vtag belong to the first fragment only */ 971 1.3.2.2 elad if (map->dm_nsegs > 1) { 972 1.3.2.2 elad flags &= ~(NFE_TX_IP_CSUM | NFE_TX_TCP_CSUM); 973 1.3.2.2 elad #if NVLAN > 0 974 1.3.2.2 elad vtag = 0; 975 1.3.2.2 elad #endif 976 1.3.2.2 elad } 977 1.3.2.2 elad 978 1.3.2.2 elad sc->txq.queued++; 979 1.3.2.2 elad sc->txq.cur = (sc->txq.cur + 1) % NFE_TX_RING_COUNT; 980 1.3.2.2 elad } 981 1.3.2.2 elad 982 1.3.2.2 elad /* the whole mbuf chain has been DMA mapped, fix last descriptor */ 983 1.3.2.2 elad if (sc->sc_flags & NFE_40BIT_ADDR) { 984 1.3.2.2 elad flags |= NFE_TX_LASTFRAG_V2; 985 1.3.2.2 elad desc64->flags = htole16(flags); 986 1.3.2.2 elad } else { 987 1.3.2.2 elad if (sc->sc_flags & NFE_JUMBO_SUP) 988 1.3.2.2 elad flags |= NFE_TX_LASTFRAG_V2; 989 1.3.2.2 elad else 990 1.3.2.2 elad flags |= NFE_TX_LASTFRAG_V1; 991 1.3.2.2 elad desc32->flags = htole16(flags); 992 1.3.2.2 elad } 993 1.3.2.2 elad 994 1.3.2.2 elad data->m = m0; 995 1.3.2.2 elad data->active = map; 996 1.3.2.2 elad 997 1.3.2.2 elad bus_dmamap_sync(sc->sc_dmat, map, 0, map->dm_mapsize, 998 1.3.2.2 elad BUS_DMASYNC_PREWRITE); 999 1.3.2.2 elad 1000 1.3.2.2 elad return 0; 1001 1.3.2.2 elad } 1002 1.3.2.2 elad 1003 1.3.2.2 elad void 1004 1.3.2.2 elad nfe_start(struct ifnet *ifp) 1005 1.3.2.2 elad { 1006 1.3.2.2 elad struct nfe_softc *sc = ifp->if_softc; 1007 1.3.2.2 elad int old = sc->txq.cur; 1008 1.3.2.2 elad struct mbuf *m0; 1009 1.3.2.2 elad 1010 1.3.2.2 elad for (;;) { 1011 1.3.2.2 elad IFQ_POLL(&ifp->if_snd, m0); 1012 1.3.2.2 elad if (m0 == NULL) 1013 1.3.2.2 elad break; 1014 1.3.2.2 elad 1015 1.3.2.2 elad if (nfe_encap(sc, m0) != 0) { 1016 1.3.2.2 elad ifp->if_flags |= IFF_OACTIVE; 1017 1.3.2.2 elad break; 1018 1.3.2.2 elad } 1019 1.3.2.2 elad 1020 1.3.2.2 elad /* packet put in h/w queue, remove from s/w queue */ 1021 1.3.2.2 elad IFQ_DEQUEUE(&ifp->if_snd, m0); 1022 1.3.2.2 elad 1023 1.3.2.2 elad #if NBPFILTER > 0 1024 1.3.2.2 elad if (ifp->if_bpf != NULL) 1025 1.3.2.2 elad bpf_mtap(ifp->if_bpf, m0); 1026 1.3.2.2 elad #endif 1027 1.3.2.2 elad } 1028 1.3.2.2 elad if (sc->txq.cur == old) /* nothing sent */ 1029 1.3.2.2 elad return; 1030 1.3.2.2 elad 1031 1.3.2.2 elad if (sc->sc_flags & NFE_40BIT_ADDR) 1032 1.3.2.2 elad nfe_txdesc64_rsync(sc, old, sc->txq.cur, BUS_DMASYNC_PREWRITE); 1033 1.3.2.2 elad else 1034 1.3.2.2 elad nfe_txdesc32_rsync(sc, old, sc->txq.cur, BUS_DMASYNC_PREWRITE); 1035 1.3.2.2 elad 1036 1.3.2.2 elad /* kick Tx */ 1037 1.3.2.2 elad NFE_WRITE(sc, NFE_RXTX_CTL, NFE_RXTX_KICKTX | sc->rxtxctl); 1038 1.3.2.2 elad 1039 1.3.2.2 elad /* 1040 1.3.2.2 elad * Set a timeout in case the chip goes out to lunch. 1041 1.3.2.2 elad */ 1042 1.3.2.2 elad ifp->if_timer = 5; 1043 1.3.2.2 elad } 1044 1.3.2.2 elad 1045 1.3.2.2 elad void 1046 1.3.2.2 elad nfe_watchdog(struct ifnet *ifp) 1047 1.3.2.2 elad { 1048 1.3.2.2 elad struct nfe_softc *sc = ifp->if_softc; 1049 1.3.2.2 elad 1050 1.3.2.2 elad printf("%s: watchdog timeout\n", sc->sc_dev.dv_xname); 1051 1.3.2.2 elad 1052 1.3.2.2 elad ifp->if_flags &= ~IFF_RUNNING; 1053 1.3.2.2 elad nfe_init(ifp); 1054 1.3.2.2 elad 1055 1.3.2.2 elad ifp->if_oerrors++; 1056 1.3.2.2 elad } 1057 1.3.2.2 elad 1058 1.3.2.2 elad int 1059 1.3.2.2 elad nfe_init(struct ifnet *ifp) 1060 1.3.2.2 elad { 1061 1.3.2.2 elad struct nfe_softc *sc = ifp->if_softc; 1062 1.3.2.2 elad uint32_t tmp; 1063 1.3.2.2 elad 1064 1.3.2.2 elad if (ifp->if_flags & IFF_RUNNING) 1065 1.3.2.2 elad return 0; 1066 1.3.2.2 elad 1067 1.3.2.2 elad nfe_stop(ifp, 0); 1068 1.3.2.2 elad 1069 1.3.2.2 elad NFE_WRITE(sc, NFE_TX_UNK, 0); 1070 1.3.2.2 elad NFE_WRITE(sc, NFE_STATUS, 0); 1071 1.3.2.2 elad 1072 1.3.2.2 elad sc->rxtxctl = NFE_RXTX_BIT2; 1073 1.3.2.2 elad if (sc->sc_flags & NFE_40BIT_ADDR) 1074 1.3.2.2 elad sc->rxtxctl |= NFE_RXTX_V3MAGIC; 1075 1.3.2.2 elad else if (sc->sc_flags & NFE_JUMBO_SUP) 1076 1.3.2.2 elad sc->rxtxctl |= NFE_RXTX_V2MAGIC; 1077 1.3.2.2 elad #ifdef NFE_CSUM 1078 1.3.2.2 elad if (sc->sc_flags & NFE_HW_CSUM) 1079 1.3.2.2 elad sc->rxtxctl |= NFE_RXTX_RXCSUM; 1080 1.3.2.2 elad #endif 1081 1.3.2.2 elad #if NVLAN > 0 1082 1.3.2.2 elad /* 1083 1.3.2.2 elad * Although the adapter is capable of stripping VLAN tags from received 1084 1.3.2.2 elad * frames (NFE_RXTX_VTAG_STRIP), we do not enable this functionality on 1085 1.3.2.2 elad * purpose. This will be done in software by our network stack. 1086 1.3.2.2 elad */ 1087 1.3.2.2 elad if (sc->sc_flags & NFE_HW_VLAN) 1088 1.3.2.2 elad sc->rxtxctl |= NFE_RXTX_VTAG_INSERT; 1089 1.3.2.2 elad #endif 1090 1.3.2.2 elad NFE_WRITE(sc, NFE_RXTX_CTL, NFE_RXTX_RESET | sc->rxtxctl); 1091 1.3.2.2 elad DELAY(10); 1092 1.3.2.2 elad NFE_WRITE(sc, NFE_RXTX_CTL, sc->rxtxctl); 1093 1.3.2.2 elad 1094 1.3.2.2 elad #if NVLAN 1095 1.3.2.2 elad if (sc->sc_flags & NFE_HW_VLAN) 1096 1.3.2.2 elad NFE_WRITE(sc, NFE_VTAG_CTL, NFE_VTAG_ENABLE); 1097 1.3.2.2 elad #endif 1098 1.3.2.2 elad 1099 1.3.2.2 elad NFE_WRITE(sc, NFE_SETUP_R6, 0); 1100 1.3.2.2 elad 1101 1.3.2.2 elad /* set MAC address */ 1102 1.3.2.2 elad nfe_set_macaddr(sc, sc->sc_enaddr); 1103 1.3.2.2 elad 1104 1.3.2.2 elad /* tell MAC where rings are in memory */ 1105 1.3.2.2 elad #ifdef __LP64__ 1106 1.3.2.2 elad NFE_WRITE(sc, NFE_RX_RING_ADDR_HI, sc->rxq.physaddr >> 32); 1107 1.3.2.2 elad #endif 1108 1.3.2.2 elad NFE_WRITE(sc, NFE_RX_RING_ADDR_LO, sc->rxq.physaddr & 0xffffffff); 1109 1.3.2.2 elad #ifdef __LP64__ 1110 1.3.2.2 elad NFE_WRITE(sc, NFE_TX_RING_ADDR_HI, sc->txq.physaddr >> 32); 1111 1.3.2.2 elad #endif 1112 1.3.2.2 elad NFE_WRITE(sc, NFE_TX_RING_ADDR_LO, sc->txq.physaddr & 0xffffffff); 1113 1.3.2.2 elad 1114 1.3.2.2 elad NFE_WRITE(sc, NFE_RING_SIZE, 1115 1.3.2.2 elad (NFE_RX_RING_COUNT - 1) << 16 | 1116 1.3.2.2 elad (NFE_TX_RING_COUNT - 1)); 1117 1.3.2.2 elad 1118 1.3.2.2 elad NFE_WRITE(sc, NFE_RXBUFSZ, sc->rxq.bufsz); 1119 1.3.2.2 elad 1120 1.3.2.2 elad /* force MAC to wakeup */ 1121 1.3.2.2 elad tmp = NFE_READ(sc, NFE_PWR_STATE); 1122 1.3.2.2 elad NFE_WRITE(sc, NFE_PWR_STATE, tmp | NFE_PWR_WAKEUP); 1123 1.3.2.2 elad DELAY(10); 1124 1.3.2.2 elad tmp = NFE_READ(sc, NFE_PWR_STATE); 1125 1.3.2.2 elad NFE_WRITE(sc, NFE_PWR_STATE, tmp | NFE_PWR_VALID); 1126 1.3.2.2 elad 1127 1.3.2.2 elad #if 1 1128 1.3.2.2 elad /* configure interrupts coalescing/mitigation */ 1129 1.3.2.2 elad NFE_WRITE(sc, NFE_IMTIMER, NFE_IM_DEFAULT); 1130 1.3.2.2 elad #else 1131 1.3.2.2 elad /* no interrupt mitigation: one interrupt per packet */ 1132 1.3.2.2 elad NFE_WRITE(sc, NFE_IMTIMER, 970); 1133 1.3.2.2 elad #endif 1134 1.3.2.2 elad 1135 1.3.2.2 elad NFE_WRITE(sc, NFE_SETUP_R1, NFE_R1_MAGIC); 1136 1.3.2.2 elad NFE_WRITE(sc, NFE_SETUP_R2, NFE_R2_MAGIC); 1137 1.3.2.2 elad NFE_WRITE(sc, NFE_SETUP_R6, NFE_R6_MAGIC); 1138 1.3.2.2 elad 1139 1.3.2.2 elad /* update MAC knowledge of PHY; generates a NFE_IRQ_LINK interrupt */ 1140 1.3.2.2 elad NFE_WRITE(sc, NFE_STATUS, sc->mii_phyaddr << 24 | NFE_STATUS_MAGIC); 1141 1.3.2.2 elad 1142 1.3.2.2 elad NFE_WRITE(sc, NFE_SETUP_R4, NFE_R4_MAGIC); 1143 1.3.2.2 elad NFE_WRITE(sc, NFE_WOL_CTL, NFE_WOL_MAGIC); 1144 1.3.2.2 elad 1145 1.3.2.2 elad sc->rxtxctl &= ~NFE_RXTX_BIT2; 1146 1.3.2.2 elad NFE_WRITE(sc, NFE_RXTX_CTL, sc->rxtxctl); 1147 1.3.2.2 elad DELAY(10); 1148 1.3.2.2 elad NFE_WRITE(sc, NFE_RXTX_CTL, NFE_RXTX_BIT1 | sc->rxtxctl); 1149 1.3.2.2 elad 1150 1.3.2.2 elad /* set Rx filter */ 1151 1.3.2.2 elad nfe_setmulti(sc); 1152 1.3.2.2 elad 1153 1.3.2.2 elad nfe_ifmedia_upd(ifp); 1154 1.3.2.2 elad 1155 1.3.2.2 elad /* enable Rx */ 1156 1.3.2.2 elad NFE_WRITE(sc, NFE_RX_CTL, NFE_RX_START); 1157 1.3.2.2 elad 1158 1.3.2.2 elad /* enable Tx */ 1159 1.3.2.2 elad NFE_WRITE(sc, NFE_TX_CTL, NFE_TX_START); 1160 1.3.2.2 elad 1161 1.3.2.2 elad NFE_WRITE(sc, NFE_PHY_STATUS, 0xf); 1162 1.3.2.2 elad 1163 1.3.2.2 elad /* enable interrupts */ 1164 1.3.2.2 elad NFE_WRITE(sc, NFE_IRQ_MASK, NFE_IRQ_WANTED); 1165 1.3.2.2 elad 1166 1.3.2.2 elad callout_schedule(&sc->sc_tick_ch, hz); 1167 1.3.2.2 elad 1168 1.3.2.2 elad ifp->if_flags |= IFF_RUNNING; 1169 1.3.2.2 elad ifp->if_flags &= ~IFF_OACTIVE; 1170 1.3.2.2 elad 1171 1.3.2.2 elad return 0; 1172 1.3.2.2 elad } 1173 1.3.2.2 elad 1174 1.3.2.2 elad void 1175 1.3.2.2 elad nfe_stop(struct ifnet *ifp, int disable) 1176 1.3.2.2 elad { 1177 1.3.2.2 elad struct nfe_softc *sc = ifp->if_softc; 1178 1.3.2.2 elad 1179 1.3.2.2 elad callout_stop(&sc->sc_tick_ch); 1180 1.3.2.2 elad 1181 1.3.2.2 elad ifp->if_timer = 0; 1182 1.3.2.2 elad ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1183 1.3.2.2 elad 1184 1.3.2.2 elad mii_down(&sc->sc_mii); 1185 1.3.2.2 elad 1186 1.3.2.2 elad /* abort Tx */ 1187 1.3.2.2 elad NFE_WRITE(sc, NFE_TX_CTL, 0); 1188 1.3.2.2 elad 1189 1.3.2.2 elad /* disable Rx */ 1190 1.3.2.2 elad NFE_WRITE(sc, NFE_RX_CTL, 0); 1191 1.3.2.2 elad 1192 1.3.2.2 elad /* disable interrupts */ 1193 1.3.2.2 elad NFE_WRITE(sc, NFE_IRQ_MASK, 0); 1194 1.3.2.2 elad 1195 1.3.2.2 elad /* reset Tx and Rx rings */ 1196 1.3.2.2 elad nfe_reset_tx_ring(sc, &sc->txq); 1197 1.3.2.2 elad nfe_reset_rx_ring(sc, &sc->rxq); 1198 1.3.2.2 elad } 1199 1.3.2.2 elad 1200 1.3.2.2 elad int 1201 1.3.2.2 elad nfe_alloc_rx_ring(struct nfe_softc *sc, struct nfe_rx_ring *ring) 1202 1.3.2.2 elad { 1203 1.3.2.2 elad struct nfe_desc32 *desc32; 1204 1.3.2.2 elad struct nfe_desc64 *desc64; 1205 1.3.2.2 elad struct nfe_rx_data *data; 1206 1.3.2.2 elad struct nfe_jbuf *jbuf; 1207 1.3.2.2 elad void **desc; 1208 1.3.2.2 elad bus_addr_t physaddr; 1209 1.3.2.2 elad int i, nsegs, error, descsize; 1210 1.3.2.2 elad 1211 1.3.2.2 elad if (sc->sc_flags & NFE_40BIT_ADDR) { 1212 1.3.2.2 elad desc = (void **)&ring->desc64; 1213 1.3.2.2 elad descsize = sizeof (struct nfe_desc64); 1214 1.3.2.2 elad } else { 1215 1.3.2.2 elad desc = (void **)&ring->desc32; 1216 1.3.2.2 elad descsize = sizeof (struct nfe_desc32); 1217 1.3.2.2 elad } 1218 1.3.2.2 elad 1219 1.3.2.2 elad ring->cur = ring->next = 0; 1220 1.3.2.2 elad ring->bufsz = MCLBYTES; 1221 1.3.2.2 elad 1222 1.3.2.2 elad error = bus_dmamap_create(sc->sc_dmat, NFE_RX_RING_COUNT * descsize, 1, 1223 1.3.2.2 elad NFE_RX_RING_COUNT * descsize, 0, BUS_DMA_NOWAIT, &ring->map); 1224 1.3.2.2 elad if (error != 0) { 1225 1.3.2.2 elad printf("%s: could not create desc DMA map\n", 1226 1.3.2.2 elad sc->sc_dev.dv_xname); 1227 1.3.2.2 elad goto fail; 1228 1.3.2.2 elad } 1229 1.3.2.2 elad 1230 1.3.2.2 elad error = bus_dmamem_alloc(sc->sc_dmat, NFE_RX_RING_COUNT * descsize, 1231 1.3.2.2 elad PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT); 1232 1.3.2.2 elad if (error != 0) { 1233 1.3.2.2 elad printf("%s: could not allocate DMA memory\n", 1234 1.3.2.2 elad sc->sc_dev.dv_xname); 1235 1.3.2.2 elad goto fail; 1236 1.3.2.2 elad } 1237 1.3.2.2 elad 1238 1.3.2.2 elad error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, 1239 1.3.2.2 elad NFE_RX_RING_COUNT * descsize, (caddr_t *)desc, BUS_DMA_NOWAIT); 1240 1.3.2.2 elad if (error != 0) { 1241 1.3.2.2 elad printf("%s: could not map desc DMA memory\n", 1242 1.3.2.2 elad sc->sc_dev.dv_xname); 1243 1.3.2.2 elad goto fail; 1244 1.3.2.2 elad } 1245 1.3.2.2 elad 1246 1.3.2.2 elad error = bus_dmamap_load(sc->sc_dmat, ring->map, *desc, 1247 1.3.2.2 elad NFE_RX_RING_COUNT * descsize, NULL, BUS_DMA_NOWAIT); 1248 1.3.2.2 elad if (error != 0) { 1249 1.3.2.2 elad printf("%s: could not load desc DMA map\n", 1250 1.3.2.2 elad sc->sc_dev.dv_xname); 1251 1.3.2.2 elad goto fail; 1252 1.3.2.2 elad } 1253 1.3.2.2 elad 1254 1.3.2.2 elad bzero(*desc, NFE_RX_RING_COUNT * descsize); 1255 1.3.2.2 elad ring->physaddr = ring->map->dm_segs[0].ds_addr; 1256 1.3.2.2 elad 1257 1.3.2.2 elad if (sc->sc_flags & NFE_USE_JUMBO) { 1258 1.3.2.2 elad ring->bufsz = NFE_JBYTES; 1259 1.3.2.2 elad if ((error = nfe_jpool_alloc(sc)) != 0) { 1260 1.3.2.2 elad printf("%s: could not allocate jumbo frames\n", 1261 1.3.2.2 elad sc->sc_dev.dv_xname); 1262 1.3.2.2 elad goto fail; 1263 1.3.2.2 elad } 1264 1.3.2.2 elad } 1265 1.3.2.2 elad 1266 1.3.2.2 elad /* 1267 1.3.2.2 elad * Pre-allocate Rx buffers and populate Rx ring. 1268 1.3.2.2 elad */ 1269 1.3.2.2 elad for (i = 0; i < NFE_RX_RING_COUNT; i++) { 1270 1.3.2.2 elad data = &sc->rxq.data[i]; 1271 1.3.2.2 elad 1272 1.3.2.2 elad MGETHDR(data->m, M_DONTWAIT, MT_DATA); 1273 1.3.2.2 elad if (data->m == NULL) { 1274 1.3.2.2 elad printf("%s: could not allocate rx mbuf\n", 1275 1.3.2.2 elad sc->sc_dev.dv_xname); 1276 1.3.2.2 elad error = ENOMEM; 1277 1.3.2.2 elad goto fail; 1278 1.3.2.2 elad } 1279 1.3.2.2 elad 1280 1.3.2.2 elad if (sc->sc_flags & NFE_USE_JUMBO) { 1281 1.3.2.2 elad if ((jbuf = nfe_jalloc(sc)) == NULL) { 1282 1.3.2.2 elad printf("%s: could not allocate jumbo buffer\n", 1283 1.3.2.2 elad sc->sc_dev.dv_xname); 1284 1.3.2.2 elad goto fail; 1285 1.3.2.2 elad } 1286 1.3.2.2 elad MEXTADD(data->m, jbuf->buf, NFE_JBYTES, 0, nfe_jfree, 1287 1.3.2.2 elad sc); 1288 1.3.2.2 elad 1289 1.3.2.2 elad physaddr = jbuf->physaddr; 1290 1.3.2.2 elad } else { 1291 1.3.2.2 elad error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, 1292 1.3.2.2 elad MCLBYTES, 0, BUS_DMA_NOWAIT, &data->map); 1293 1.3.2.2 elad if (error != 0) { 1294 1.3.2.2 elad printf("%s: could not create DMA map\n", 1295 1.3.2.2 elad sc->sc_dev.dv_xname); 1296 1.3.2.2 elad goto fail; 1297 1.3.2.2 elad } 1298 1.3.2.2 elad MCLGET(data->m, M_DONTWAIT); 1299 1.3.2.2 elad if (!(data->m->m_flags & M_EXT)) { 1300 1.3.2.2 elad printf("%s: could not allocate mbuf cluster\n", 1301 1.3.2.2 elad sc->sc_dev.dv_xname); 1302 1.3.2.2 elad error = ENOMEM; 1303 1.3.2.2 elad goto fail; 1304 1.3.2.2 elad } 1305 1.3.2.2 elad 1306 1.3.2.2 elad error = bus_dmamap_load(sc->sc_dmat, data->map, 1307 1.3.2.2 elad mtod(data->m, void *), MCLBYTES, NULL, 1308 1.3.2.2 elad BUS_DMA_READ | BUS_DMA_NOWAIT); 1309 1.3.2.2 elad if (error != 0) { 1310 1.3.2.2 elad printf("%s: could not load rx buf DMA map", 1311 1.3.2.2 elad sc->sc_dev.dv_xname); 1312 1.3.2.2 elad goto fail; 1313 1.3.2.2 elad } 1314 1.3.2.2 elad physaddr = data->map->dm_segs[0].ds_addr; 1315 1.3.2.2 elad } 1316 1.3.2.2 elad 1317 1.3.2.2 elad if (sc->sc_flags & NFE_40BIT_ADDR) { 1318 1.3.2.2 elad desc64 = &sc->rxq.desc64[i]; 1319 1.3.2.2 elad #if defined(__LP64__) 1320 1.3.2.2 elad desc64->physaddr[0] = htole32(physaddr >> 32); 1321 1.3.2.2 elad #endif 1322 1.3.2.2 elad desc64->physaddr[1] = htole32(physaddr & 0xffffffff); 1323 1.3.2.2 elad desc64->length = htole16(sc->rxq.bufsz); 1324 1.3.2.2 elad desc64->flags = htole16(NFE_RX_READY); 1325 1.3.2.2 elad } else { 1326 1.3.2.2 elad desc32 = &sc->rxq.desc32[i]; 1327 1.3.2.2 elad desc32->physaddr = htole32(physaddr); 1328 1.3.2.2 elad desc32->length = htole16(sc->rxq.bufsz); 1329 1.3.2.2 elad desc32->flags = htole16(NFE_RX_READY); 1330 1.3.2.2 elad } 1331 1.3.2.2 elad } 1332 1.3.2.2 elad 1333 1.3.2.2 elad bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 1334 1.3.2.2 elad BUS_DMASYNC_PREWRITE); 1335 1.3.2.2 elad 1336 1.3.2.2 elad return 0; 1337 1.3.2.2 elad 1338 1.3.2.2 elad fail: nfe_free_rx_ring(sc, ring); 1339 1.3.2.2 elad return error; 1340 1.3.2.2 elad } 1341 1.3.2.2 elad 1342 1.3.2.2 elad void 1343 1.3.2.2 elad nfe_reset_rx_ring(struct nfe_softc *sc, struct nfe_rx_ring *ring) 1344 1.3.2.2 elad { 1345 1.3.2.2 elad int i; 1346 1.3.2.2 elad 1347 1.3.2.2 elad for (i = 0; i < NFE_RX_RING_COUNT; i++) { 1348 1.3.2.2 elad if (sc->sc_flags & NFE_40BIT_ADDR) { 1349 1.3.2.2 elad ring->desc64[i].length = htole16(ring->bufsz); 1350 1.3.2.2 elad ring->desc64[i].flags = htole16(NFE_RX_READY); 1351 1.3.2.2 elad } else { 1352 1.3.2.2 elad ring->desc32[i].length = htole16(ring->bufsz); 1353 1.3.2.2 elad ring->desc32[i].flags = htole16(NFE_RX_READY); 1354 1.3.2.2 elad } 1355 1.3.2.2 elad } 1356 1.3.2.2 elad 1357 1.3.2.2 elad bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 1358 1.3.2.2 elad BUS_DMASYNC_PREWRITE); 1359 1.3.2.2 elad 1360 1.3.2.2 elad ring->cur = ring->next = 0; 1361 1.3.2.2 elad } 1362 1.3.2.2 elad 1363 1.3.2.2 elad void 1364 1.3.2.2 elad nfe_free_rx_ring(struct nfe_softc *sc, struct nfe_rx_ring *ring) 1365 1.3.2.2 elad { 1366 1.3.2.2 elad struct nfe_rx_data *data; 1367 1.3.2.2 elad void *desc; 1368 1.3.2.2 elad int i, descsize; 1369 1.3.2.2 elad 1370 1.3.2.2 elad if (sc->sc_flags & NFE_40BIT_ADDR) { 1371 1.3.2.2 elad desc = ring->desc64; 1372 1.3.2.2 elad descsize = sizeof (struct nfe_desc64); 1373 1.3.2.2 elad } else { 1374 1.3.2.2 elad desc = ring->desc32; 1375 1.3.2.2 elad descsize = sizeof (struct nfe_desc32); 1376 1.3.2.2 elad } 1377 1.3.2.2 elad 1378 1.3.2.2 elad if (desc != NULL) { 1379 1.3.2.2 elad bus_dmamap_sync(sc->sc_dmat, ring->map, 0, 1380 1.3.2.2 elad ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1381 1.3.2.2 elad bus_dmamap_unload(sc->sc_dmat, ring->map); 1382 1.3.2.2 elad bus_dmamem_unmap(sc->sc_dmat, (caddr_t)desc, 1383 1.3.2.2 elad NFE_RX_RING_COUNT * descsize); 1384 1.3.2.2 elad bus_dmamem_free(sc->sc_dmat, &ring->seg, 1); 1385 1.3.2.2 elad } 1386 1.3.2.2 elad 1387 1.3.2.2 elad for (i = 0; i < NFE_RX_RING_COUNT; i++) { 1388 1.3.2.2 elad data = &ring->data[i]; 1389 1.3.2.2 elad 1390 1.3.2.2 elad if (data->map != NULL) { 1391 1.3.2.2 elad bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1392 1.3.2.2 elad data->map->dm_mapsize, BUS_DMASYNC_POSTREAD); 1393 1.3.2.2 elad bus_dmamap_unload(sc->sc_dmat, data->map); 1394 1.3.2.2 elad bus_dmamap_destroy(sc->sc_dmat, data->map); 1395 1.3.2.2 elad } 1396 1.3.2.2 elad if (data->m != NULL) 1397 1.3.2.2 elad m_freem(data->m); 1398 1.3.2.2 elad } 1399 1.3.2.2 elad } 1400 1.3.2.2 elad 1401 1.3.2.2 elad struct nfe_jbuf * 1402 1.3.2.2 elad nfe_jalloc(struct nfe_softc *sc) 1403 1.3.2.2 elad { 1404 1.3.2.2 elad struct nfe_jbuf *jbuf; 1405 1.3.2.2 elad 1406 1.3.2.2 elad jbuf = SLIST_FIRST(&sc->rxq.jfreelist); 1407 1.3.2.2 elad if (jbuf == NULL) 1408 1.3.2.2 elad return NULL; 1409 1.3.2.2 elad SLIST_REMOVE_HEAD(&sc->rxq.jfreelist, jnext); 1410 1.3.2.2 elad return jbuf; 1411 1.3.2.2 elad } 1412 1.3.2.2 elad 1413 1.3.2.2 elad /* 1414 1.3.2.2 elad * This is called automatically by the network stack when the mbuf is freed. 1415 1.3.2.2 elad * Caution must be taken that the NIC might be reset by the time the mbuf is 1416 1.3.2.2 elad * freed. 1417 1.3.2.2 elad */ 1418 1.3.2.2 elad void 1419 1.3.2.2 elad nfe_jfree(struct mbuf *m, caddr_t buf, size_t size, void *arg) 1420 1.3.2.2 elad { 1421 1.3.2.2 elad struct nfe_softc *sc = arg; 1422 1.3.2.2 elad struct nfe_jbuf *jbuf; 1423 1.3.2.2 elad int i; 1424 1.3.2.2 elad 1425 1.3.2.2 elad /* find the jbuf from the base pointer */ 1426 1.3.2.2 elad i = (buf - sc->rxq.jpool) / NFE_JBYTES; 1427 1.3.2.2 elad if (i < 0 || i >= NFE_JPOOL_COUNT) { 1428 1.3.2.2 elad printf("%s: request to free a buffer (%p) not managed by us\n", 1429 1.3.2.2 elad sc->sc_dev.dv_xname, buf); 1430 1.3.2.2 elad return; 1431 1.3.2.2 elad } 1432 1.3.2.2 elad jbuf = &sc->rxq.jbuf[i]; 1433 1.3.2.2 elad 1434 1.3.2.2 elad /* ..and put it back in the free list */ 1435 1.3.2.2 elad SLIST_INSERT_HEAD(&sc->rxq.jfreelist, jbuf, jnext); 1436 1.3.2.2 elad 1437 1.3.2.2 elad if (m != NULL) 1438 1.3.2.2 elad pool_cache_put(&mbpool_cache, m); 1439 1.3.2.2 elad } 1440 1.3.2.2 elad 1441 1.3.2.2 elad int 1442 1.3.2.2 elad nfe_jpool_alloc(struct nfe_softc *sc) 1443 1.3.2.2 elad { 1444 1.3.2.2 elad struct nfe_rx_ring *ring = &sc->rxq; 1445 1.3.2.2 elad struct nfe_jbuf *jbuf; 1446 1.3.2.2 elad bus_addr_t physaddr; 1447 1.3.2.2 elad caddr_t buf; 1448 1.3.2.2 elad int i, nsegs, error; 1449 1.3.2.2 elad 1450 1.3.2.2 elad /* 1451 1.3.2.2 elad * Allocate a big chunk of DMA'able memory. 1452 1.3.2.2 elad */ 1453 1.3.2.2 elad error = bus_dmamap_create(sc->sc_dmat, NFE_JPOOL_SIZE, 1, 1454 1.3.2.2 elad NFE_JPOOL_SIZE, 0, BUS_DMA_NOWAIT, &ring->jmap); 1455 1.3.2.2 elad if (error != 0) { 1456 1.3.2.2 elad printf("%s: could not create jumbo DMA map\n", 1457 1.3.2.2 elad sc->sc_dev.dv_xname); 1458 1.3.2.2 elad goto fail; 1459 1.3.2.2 elad } 1460 1.3.2.2 elad 1461 1.3.2.2 elad error = bus_dmamem_alloc(sc->sc_dmat, NFE_JPOOL_SIZE, PAGE_SIZE, 0, 1462 1.3.2.2 elad &ring->jseg, 1, &nsegs, BUS_DMA_NOWAIT); 1463 1.3.2.2 elad if (error != 0) { 1464 1.3.2.2 elad printf("%s could not allocate jumbo DMA memory\n", 1465 1.3.2.2 elad sc->sc_dev.dv_xname); 1466 1.3.2.2 elad goto fail; 1467 1.3.2.2 elad } 1468 1.3.2.2 elad 1469 1.3.2.2 elad error = bus_dmamem_map(sc->sc_dmat, &ring->jseg, nsegs, NFE_JPOOL_SIZE, 1470 1.3.2.2 elad &ring->jpool, BUS_DMA_NOWAIT); 1471 1.3.2.2 elad if (error != 0) { 1472 1.3.2.2 elad printf("%s: could not map jumbo DMA memory\n", 1473 1.3.2.2 elad sc->sc_dev.dv_xname); 1474 1.3.2.2 elad goto fail; 1475 1.3.2.2 elad } 1476 1.3.2.2 elad 1477 1.3.2.2 elad error = bus_dmamap_load(sc->sc_dmat, ring->jmap, ring->jpool, 1478 1.3.2.2 elad NFE_JPOOL_SIZE, NULL, BUS_DMA_READ | BUS_DMA_NOWAIT); 1479 1.3.2.2 elad if (error != 0) { 1480 1.3.2.2 elad printf("%s: could not load jumbo DMA map\n", 1481 1.3.2.2 elad sc->sc_dev.dv_xname); 1482 1.3.2.2 elad goto fail; 1483 1.3.2.2 elad } 1484 1.3.2.2 elad 1485 1.3.2.2 elad /* ..and split it into 9KB chunks */ 1486 1.3.2.2 elad SLIST_INIT(&ring->jfreelist); 1487 1.3.2.2 elad 1488 1.3.2.2 elad buf = ring->jpool; 1489 1.3.2.2 elad physaddr = ring->jmap->dm_segs[0].ds_addr; 1490 1.3.2.2 elad for (i = 0; i < NFE_JPOOL_COUNT; i++) { 1491 1.3.2.2 elad jbuf = &ring->jbuf[i]; 1492 1.3.2.2 elad 1493 1.3.2.2 elad jbuf->buf = buf; 1494 1.3.2.2 elad jbuf->physaddr = physaddr; 1495 1.3.2.2 elad 1496 1.3.2.2 elad SLIST_INSERT_HEAD(&ring->jfreelist, jbuf, jnext); 1497 1.3.2.2 elad 1498 1.3.2.2 elad buf += NFE_JBYTES; 1499 1.3.2.2 elad physaddr += NFE_JBYTES; 1500 1.3.2.2 elad } 1501 1.3.2.2 elad 1502 1.3.2.2 elad return 0; 1503 1.3.2.2 elad 1504 1.3.2.2 elad fail: nfe_jpool_free(sc); 1505 1.3.2.2 elad return error; 1506 1.3.2.2 elad } 1507 1.3.2.2 elad 1508 1.3.2.2 elad void 1509 1.3.2.2 elad nfe_jpool_free(struct nfe_softc *sc) 1510 1.3.2.2 elad { 1511 1.3.2.2 elad struct nfe_rx_ring *ring = &sc->rxq; 1512 1.3.2.2 elad 1513 1.3.2.2 elad if (ring->jmap != NULL) { 1514 1.3.2.2 elad bus_dmamap_sync(sc->sc_dmat, ring->jmap, 0, 1515 1.3.2.2 elad ring->jmap->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1516 1.3.2.2 elad bus_dmamap_unload(sc->sc_dmat, ring->jmap); 1517 1.3.2.2 elad bus_dmamap_destroy(sc->sc_dmat, ring->jmap); 1518 1.3.2.2 elad } 1519 1.3.2.2 elad if (ring->jpool != NULL) { 1520 1.3.2.2 elad bus_dmamem_unmap(sc->sc_dmat, ring->jpool, NFE_JPOOL_SIZE); 1521 1.3.2.2 elad bus_dmamem_free(sc->sc_dmat, &ring->jseg, 1); 1522 1.3.2.2 elad } 1523 1.3.2.2 elad } 1524 1.3.2.2 elad 1525 1.3.2.2 elad int 1526 1.3.2.2 elad nfe_alloc_tx_ring(struct nfe_softc *sc, struct nfe_tx_ring *ring) 1527 1.3.2.2 elad { 1528 1.3.2.2 elad int i, nsegs, error; 1529 1.3.2.2 elad void **desc; 1530 1.3.2.2 elad int descsize; 1531 1.3.2.2 elad 1532 1.3.2.2 elad if (sc->sc_flags & NFE_40BIT_ADDR) { 1533 1.3.2.2 elad desc = (void **)&ring->desc64; 1534 1.3.2.2 elad descsize = sizeof (struct nfe_desc64); 1535 1.3.2.2 elad } else { 1536 1.3.2.2 elad desc = (void **)&ring->desc32; 1537 1.3.2.2 elad descsize = sizeof (struct nfe_desc32); 1538 1.3.2.2 elad } 1539 1.3.2.2 elad 1540 1.3.2.2 elad ring->queued = 0; 1541 1.3.2.2 elad ring->cur = ring->next = 0; 1542 1.3.2.2 elad 1543 1.3.2.2 elad error = bus_dmamap_create(sc->sc_dmat, NFE_TX_RING_COUNT * descsize, 1, 1544 1.3.2.2 elad NFE_TX_RING_COUNT * descsize, 0, BUS_DMA_NOWAIT, &ring->map); 1545 1.3.2.2 elad 1546 1.3.2.2 elad if (error != 0) { 1547 1.3.2.2 elad printf("%s: could not create desc DMA map\n", 1548 1.3.2.2 elad sc->sc_dev.dv_xname); 1549 1.3.2.2 elad goto fail; 1550 1.3.2.2 elad } 1551 1.3.2.2 elad 1552 1.3.2.2 elad error = bus_dmamem_alloc(sc->sc_dmat, NFE_TX_RING_COUNT * descsize, 1553 1.3.2.2 elad PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT); 1554 1.3.2.2 elad if (error != 0) { 1555 1.3.2.2 elad printf("%s: could not allocate DMA memory\n", 1556 1.3.2.2 elad sc->sc_dev.dv_xname); 1557 1.3.2.2 elad goto fail; 1558 1.3.2.2 elad } 1559 1.3.2.2 elad 1560 1.3.2.2 elad error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, 1561 1.3.2.2 elad NFE_TX_RING_COUNT * descsize, (caddr_t *)desc, BUS_DMA_NOWAIT); 1562 1.3.2.2 elad if (error != 0) { 1563 1.3.2.2 elad printf("%s: could not map desc DMA memory\n", 1564 1.3.2.2 elad sc->sc_dev.dv_xname); 1565 1.3.2.2 elad goto fail; 1566 1.3.2.2 elad } 1567 1.3.2.2 elad 1568 1.3.2.2 elad error = bus_dmamap_load(sc->sc_dmat, ring->map, *desc, 1569 1.3.2.2 elad NFE_TX_RING_COUNT * descsize, NULL, BUS_DMA_NOWAIT); 1570 1.3.2.2 elad if (error != 0) { 1571 1.3.2.2 elad printf("%s: could not load desc DMA map\n", 1572 1.3.2.2 elad sc->sc_dev.dv_xname); 1573 1.3.2.2 elad goto fail; 1574 1.3.2.2 elad } 1575 1.3.2.2 elad 1576 1.3.2.2 elad bzero(*desc, NFE_TX_RING_COUNT * descsize); 1577 1.3.2.2 elad ring->physaddr = ring->map->dm_segs[0].ds_addr; 1578 1.3.2.2 elad 1579 1.3.2.2 elad for (i = 0; i < NFE_TX_RING_COUNT; i++) { 1580 1.3.2.2 elad error = bus_dmamap_create(sc->sc_dmat, NFE_JBYTES, 1581 1.3.2.2 elad NFE_MAX_SCATTER, NFE_JBYTES, 0, BUS_DMA_NOWAIT, 1582 1.3.2.2 elad &ring->data[i].map); 1583 1.3.2.2 elad if (error != 0) { 1584 1.3.2.2 elad printf("%s: could not create DMA map\n", 1585 1.3.2.2 elad sc->sc_dev.dv_xname); 1586 1.3.2.2 elad goto fail; 1587 1.3.2.2 elad } 1588 1.3.2.2 elad } 1589 1.3.2.2 elad 1590 1.3.2.2 elad return 0; 1591 1.3.2.2 elad 1592 1.3.2.2 elad fail: nfe_free_tx_ring(sc, ring); 1593 1.3.2.2 elad return error; 1594 1.3.2.2 elad } 1595 1.3.2.2 elad 1596 1.3.2.2 elad void 1597 1.3.2.2 elad nfe_reset_tx_ring(struct nfe_softc *sc, struct nfe_tx_ring *ring) 1598 1.3.2.2 elad { 1599 1.3.2.2 elad struct nfe_tx_data *data; 1600 1.3.2.2 elad int i; 1601 1.3.2.2 elad 1602 1.3.2.2 elad for (i = 0; i < NFE_TX_RING_COUNT; i++) { 1603 1.3.2.2 elad if (sc->sc_flags & NFE_40BIT_ADDR) 1604 1.3.2.2 elad ring->desc64[i].flags = 0; 1605 1.3.2.2 elad else 1606 1.3.2.2 elad ring->desc32[i].flags = 0; 1607 1.3.2.2 elad 1608 1.3.2.2 elad data = &ring->data[i]; 1609 1.3.2.2 elad 1610 1.3.2.2 elad if (data->m != NULL) { 1611 1.3.2.2 elad bus_dmamap_sync(sc->sc_dmat, data->active, 0, 1612 1.3.2.2 elad data->active->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1613 1.3.2.2 elad bus_dmamap_unload(sc->sc_dmat, data->active); 1614 1.3.2.2 elad m_freem(data->m); 1615 1.3.2.2 elad data->m = NULL; 1616 1.3.2.2 elad } 1617 1.3.2.2 elad } 1618 1.3.2.2 elad 1619 1.3.2.2 elad bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 1620 1.3.2.2 elad BUS_DMASYNC_PREWRITE); 1621 1.3.2.2 elad 1622 1.3.2.2 elad ring->queued = 0; 1623 1.3.2.2 elad ring->cur = ring->next = 0; 1624 1.3.2.2 elad } 1625 1.3.2.2 elad 1626 1.3.2.2 elad void 1627 1.3.2.2 elad nfe_free_tx_ring(struct nfe_softc *sc, struct nfe_tx_ring *ring) 1628 1.3.2.2 elad { 1629 1.3.2.2 elad struct nfe_tx_data *data; 1630 1.3.2.2 elad void *desc; 1631 1.3.2.2 elad int i, descsize; 1632 1.3.2.2 elad 1633 1.3.2.2 elad if (sc->sc_flags & NFE_40BIT_ADDR) { 1634 1.3.2.2 elad desc = ring->desc64; 1635 1.3.2.2 elad descsize = sizeof (struct nfe_desc64); 1636 1.3.2.2 elad } else { 1637 1.3.2.2 elad desc = ring->desc32; 1638 1.3.2.2 elad descsize = sizeof (struct nfe_desc32); 1639 1.3.2.2 elad } 1640 1.3.2.2 elad 1641 1.3.2.2 elad if (desc != NULL) { 1642 1.3.2.2 elad bus_dmamap_sync(sc->sc_dmat, ring->map, 0, 1643 1.3.2.2 elad ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1644 1.3.2.2 elad bus_dmamap_unload(sc->sc_dmat, ring->map); 1645 1.3.2.2 elad bus_dmamem_unmap(sc->sc_dmat, (caddr_t)desc, 1646 1.3.2.2 elad NFE_TX_RING_COUNT * descsize); 1647 1.3.2.2 elad bus_dmamem_free(sc->sc_dmat, &ring->seg, 1); 1648 1.3.2.2 elad } 1649 1.3.2.2 elad 1650 1.3.2.2 elad for (i = 0; i < NFE_TX_RING_COUNT; i++) { 1651 1.3.2.2 elad data = &ring->data[i]; 1652 1.3.2.2 elad 1653 1.3.2.2 elad if (data->m != NULL) { 1654 1.3.2.2 elad bus_dmamap_sync(sc->sc_dmat, data->active, 0, 1655 1.3.2.2 elad data->active->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1656 1.3.2.2 elad bus_dmamap_unload(sc->sc_dmat, data->active); 1657 1.3.2.2 elad m_freem(data->m); 1658 1.3.2.2 elad } 1659 1.3.2.2 elad } 1660 1.3.2.2 elad 1661 1.3.2.2 elad /* ..and now actually destroy the DMA mappings */ 1662 1.3.2.2 elad for (i = 0; i < NFE_TX_RING_COUNT; i++) { 1663 1.3.2.2 elad data = &ring->data[i]; 1664 1.3.2.2 elad if (data->map == NULL) 1665 1.3.2.2 elad continue; 1666 1.3.2.2 elad bus_dmamap_destroy(sc->sc_dmat, data->map); 1667 1.3.2.2 elad } 1668 1.3.2.2 elad } 1669 1.3.2.2 elad 1670 1.3.2.2 elad int 1671 1.3.2.2 elad nfe_ifmedia_upd(struct ifnet *ifp) 1672 1.3.2.2 elad { 1673 1.3.2.2 elad struct nfe_softc *sc = ifp->if_softc; 1674 1.3.2.2 elad struct mii_data *mii = &sc->sc_mii; 1675 1.3.2.2 elad struct mii_softc *miisc; 1676 1.3.2.2 elad 1677 1.3.2.2 elad if (mii->mii_instance != 0) { 1678 1.3.2.2 elad LIST_FOREACH(miisc, &mii->mii_phys, mii_list) 1679 1.3.2.2 elad mii_phy_reset(miisc); 1680 1.3.2.2 elad } 1681 1.3.2.2 elad return mii_mediachg(mii); 1682 1.3.2.2 elad } 1683 1.3.2.2 elad 1684 1.3.2.2 elad void 1685 1.3.2.2 elad nfe_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 1686 1.3.2.2 elad { 1687 1.3.2.2 elad struct nfe_softc *sc = ifp->if_softc; 1688 1.3.2.2 elad struct mii_data *mii = &sc->sc_mii; 1689 1.3.2.2 elad 1690 1.3.2.2 elad mii_pollstat(mii); 1691 1.3.2.2 elad ifmr->ifm_status = mii->mii_media_status; 1692 1.3.2.2 elad ifmr->ifm_active = mii->mii_media_active; 1693 1.3.2.2 elad } 1694 1.3.2.2 elad 1695 1.3.2.2 elad void 1696 1.3.2.2 elad nfe_setmulti(struct nfe_softc *sc) 1697 1.3.2.2 elad { 1698 1.3.2.2 elad struct ethercom *ec = &sc->sc_ethercom; 1699 1.3.2.2 elad struct ifnet *ifp = &ec->ec_if; 1700 1.3.2.2 elad struct ether_multi *enm; 1701 1.3.2.2 elad struct ether_multistep step; 1702 1.3.2.2 elad uint8_t addr[ETHER_ADDR_LEN], mask[ETHER_ADDR_LEN]; 1703 1.3.2.2 elad uint32_t filter = NFE_RXFILTER_MAGIC; 1704 1.3.2.2 elad int i; 1705 1.3.2.2 elad 1706 1.3.2.2 elad if ((ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC)) != 0) { 1707 1.3.2.2 elad bzero(addr, ETHER_ADDR_LEN); 1708 1.3.2.2 elad bzero(mask, ETHER_ADDR_LEN); 1709 1.3.2.2 elad goto done; 1710 1.3.2.2 elad } 1711 1.3.2.2 elad 1712 1.3.2.2 elad bcopy(etherbroadcastaddr, addr, ETHER_ADDR_LEN); 1713 1.3.2.2 elad bcopy(etherbroadcastaddr, mask, ETHER_ADDR_LEN); 1714 1.3.2.2 elad 1715 1.3.2.2 elad ETHER_FIRST_MULTI(step, ec, enm); 1716 1.3.2.2 elad while (enm != NULL) { 1717 1.3.2.2 elad if (bcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 1718 1.3.2.2 elad ifp->if_flags |= IFF_ALLMULTI; 1719 1.3.2.2 elad bzero(addr, ETHER_ADDR_LEN); 1720 1.3.2.2 elad bzero(mask, ETHER_ADDR_LEN); 1721 1.3.2.2 elad goto done; 1722 1.3.2.2 elad } 1723 1.3.2.2 elad for (i = 0; i < ETHER_ADDR_LEN; i++) { 1724 1.3.2.2 elad addr[i] &= enm->enm_addrlo[i]; 1725 1.3.2.2 elad mask[i] &= ~enm->enm_addrlo[i]; 1726 1.3.2.2 elad } 1727 1.3.2.2 elad ETHER_NEXT_MULTI(step, enm); 1728 1.3.2.2 elad } 1729 1.3.2.2 elad for (i = 0; i < ETHER_ADDR_LEN; i++) 1730 1.3.2.2 elad mask[i] |= addr[i]; 1731 1.3.2.2 elad 1732 1.3.2.2 elad done: 1733 1.3.2.2 elad addr[0] |= 0x01; /* make sure multicast bit is set */ 1734 1.3.2.2 elad 1735 1.3.2.2 elad NFE_WRITE(sc, NFE_MULTIADDR_HI, 1736 1.3.2.2 elad addr[3] << 24 | addr[2] << 16 | addr[1] << 8 | addr[0]); 1737 1.3.2.2 elad NFE_WRITE(sc, NFE_MULTIADDR_LO, 1738 1.3.2.2 elad addr[5] << 8 | addr[4]); 1739 1.3.2.2 elad NFE_WRITE(sc, NFE_MULTIMASK_HI, 1740 1.3.2.2 elad mask[3] << 24 | mask[2] << 16 | mask[1] << 8 | mask[0]); 1741 1.3.2.2 elad NFE_WRITE(sc, NFE_MULTIMASK_LO, 1742 1.3.2.2 elad mask[5] << 8 | mask[4]); 1743 1.3.2.2 elad 1744 1.3.2.2 elad filter |= (ifp->if_flags & IFF_PROMISC) ? NFE_PROMISC : NFE_U2M; 1745 1.3.2.2 elad NFE_WRITE(sc, NFE_RXFILTER, filter); 1746 1.3.2.2 elad } 1747 1.3.2.2 elad 1748 1.3.2.2 elad void 1749 1.3.2.2 elad nfe_get_macaddr(struct nfe_softc *sc, uint8_t *addr) 1750 1.3.2.2 elad { 1751 1.3.2.2 elad uint32_t tmp; 1752 1.3.2.2 elad 1753 1.3.2.2 elad tmp = NFE_READ(sc, NFE_MACADDR_LO); 1754 1.3.2.2 elad addr[0] = (tmp >> 8) & 0xff; 1755 1.3.2.2 elad addr[1] = (tmp & 0xff); 1756 1.3.2.2 elad 1757 1.3.2.2 elad tmp = NFE_READ(sc, NFE_MACADDR_HI); 1758 1.3.2.2 elad addr[2] = (tmp >> 24) & 0xff; 1759 1.3.2.2 elad addr[3] = (tmp >> 16) & 0xff; 1760 1.3.2.2 elad addr[4] = (tmp >> 8) & 0xff; 1761 1.3.2.2 elad addr[5] = (tmp & 0xff); 1762 1.3.2.2 elad } 1763 1.3.2.2 elad 1764 1.3.2.2 elad void 1765 1.3.2.2 elad nfe_set_macaddr(struct nfe_softc *sc, const uint8_t *addr) 1766 1.3.2.2 elad { 1767 1.3.2.2 elad NFE_WRITE(sc, NFE_MACADDR_LO, 1768 1.3.2.2 elad addr[5] << 8 | addr[4]); 1769 1.3.2.2 elad NFE_WRITE(sc, NFE_MACADDR_HI, 1770 1.3.2.2 elad addr[3] << 24 | addr[2] << 16 | addr[1] << 8 | addr[0]); 1771 1.3.2.2 elad } 1772 1.3.2.2 elad 1773 1.3.2.2 elad void 1774 1.3.2.2 elad nfe_tick(void *arg) 1775 1.3.2.2 elad { 1776 1.3.2.2 elad struct nfe_softc *sc = arg; 1777 1.3.2.2 elad int s; 1778 1.3.2.2 elad 1779 1.3.2.2 elad s = splnet(); 1780 1.3.2.2 elad mii_tick(&sc->sc_mii); 1781 1.3.2.2 elad splx(s); 1782 1.3.2.2 elad 1783 1.3.2.2 elad callout_schedule(&sc->sc_tick_ch, hz); 1784 1.3.2.2 elad } 1785
Indexes created Wed Oct 22 13:09:56 GMT 2025