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if_nfevar.h revision 1.10.60.1
      1  1.10.60.1    martin /*	$NetBSD: if_nfevar.h,v 1.10.60.1 2020/04/08 14:08:09 martin Exp $	*/
      2        1.8  christos /*	$OpenBSD: if_nfevar.h,v 1.13 2007/12/05 08:30:33 jsg Exp $	*/
      3        1.1       chs 
      4        1.1       chs /*-
      5        1.1       chs  * Copyright (c) 2005 Jonathan Gray <jsg (at) openbsd.org>
      6        1.1       chs  *
      7        1.1       chs  * Permission to use, copy, modify, and distribute this software for any
      8        1.1       chs  * purpose with or without fee is hereby granted, provided that the above
      9        1.1       chs  * copyright notice and this permission notice appear in all copies.
     10        1.1       chs  *
     11        1.1       chs  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
     12        1.1       chs  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
     13        1.1       chs  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
     14        1.1       chs  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
     15        1.1       chs  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
     16        1.1       chs  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
     17        1.1       chs  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
     18        1.1       chs  */
     19        1.1       chs 
     20        1.1       chs #define NFE_IFQ_MAXLEN	64
     21        1.1       chs 
     22        1.1       chs struct nfe_tx_data {
     23        1.1       chs 	bus_dmamap_t	map;
     24        1.1       chs 	bus_dmamap_t	active;
     25        1.1       chs 	struct mbuf	*m;
     26        1.1       chs };
     27        1.1       chs 
     28        1.1       chs struct nfe_tx_ring {
     29        1.1       chs 	bus_dmamap_t		map;
     30        1.1       chs 	bus_dma_segment_t	seg;
     31        1.1       chs 	bus_addr_t		physaddr;
     32        1.1       chs 	struct nfe_desc32	*desc32;
     33        1.1       chs 	struct nfe_desc64	*desc64;
     34        1.1       chs 	struct nfe_tx_data	data[NFE_TX_RING_COUNT];
     35        1.1       chs 	int			queued;
     36        1.1       chs 	int			cur;
     37        1.1       chs 	int			next;
     38        1.1       chs };
     39        1.1       chs 
     40        1.1       chs struct nfe_jbuf {
     41        1.8  christos 	void			*buf;
     42        1.1       chs 	bus_addr_t		physaddr;
     43        1.1       chs 	SLIST_ENTRY(nfe_jbuf)	jnext;
     44        1.1       chs };
     45        1.1       chs 
     46        1.1       chs struct nfe_rx_data {
     47        1.1       chs 	bus_dmamap_t	map;
     48        1.1       chs 	struct mbuf	*m;
     49        1.1       chs };
     50        1.1       chs 
     51        1.1       chs struct nfe_rx_ring {
     52        1.1       chs 	bus_dmamap_t		map;
     53        1.1       chs 	bus_dma_segment_t	seg;
     54        1.1       chs 	bus_dmamap_t		jmap;
     55        1.1       chs 	bus_dma_segment_t	jseg;
     56        1.1       chs 	bus_addr_t		physaddr;
     57        1.1       chs 	struct nfe_desc32	*desc32;
     58        1.1       chs 	struct nfe_desc64	*desc64;
     59        1.8  christos 	void			*jpool;
     60        1.1       chs 	struct nfe_rx_data	data[NFE_RX_RING_COUNT];
     61        1.1       chs 	struct nfe_jbuf		jbuf[NFE_JPOOL_COUNT];
     62        1.3      cube 	int			jbufmap[NFE_RX_RING_COUNT];
     63        1.1       chs 	SLIST_HEAD(, nfe_jbuf)	jfreelist;
     64        1.1       chs 	int			bufsz;
     65        1.1       chs 	int			cur;
     66        1.1       chs 	int			next;
     67        1.9      cube 	kmutex_t		mtx;
     68        1.1       chs };
     69        1.1       chs 
     70        1.1       chs struct nfe_softc {
     71        1.7      cube 	device_t		sc_dev;
     72        1.1       chs 	struct ethercom		sc_ethercom;
     73        1.1       chs 	uint8_t			sc_enaddr[ETHER_ADDR_LEN];
     74       1.10  jakllsch 	pci_chipset_tag_t	sc_pc;
     75        1.1       chs 	bus_space_handle_t	sc_memh;
     76        1.1       chs 	bus_space_tag_t		sc_memt;
     77       1.10  jakllsch 	bus_size_t		sc_mems;
     78        1.1       chs 	void			*sc_ih;
     79        1.1       chs 	bus_dma_tag_t		sc_dmat;
     80  1.10.60.1    martin 	bool			sc_dmat_needs_free;
     81        1.1       chs 	struct mii_data		sc_mii;
     82        1.1       chs 	struct callout		sc_tick_ch;
     83        1.1       chs 
     84        1.1       chs 	int			sc_if_flags;
     85        1.1       chs 	u_int			sc_flags;
     86        1.5   tsutsui #define NFE_JUMBO_SUP		0x01
     87        1.5   tsutsui #define NFE_40BIT_ADDR		0x02
     88        1.5   tsutsui #define NFE_HW_CSUM		0x04
     89        1.5   tsutsui #define NFE_HW_VLAN		0x08
     90        1.5   tsutsui #define NFE_USE_JUMBO		0x10
     91        1.5   tsutsui #define NFE_CORRECT_MACADDR	0x20
     92        1.6   tsutsui #define NFE_PWR_MGMT		0x40
     93        1.1       chs 
     94        1.1       chs 	uint32_t		rxtxctl;
     95        1.1       chs 	uint8_t			mii_phyaddr;
     96        1.1       chs 
     97        1.1       chs 	struct nfe_tx_ring	txq;
     98        1.1       chs 	struct nfe_rx_ring	rxq;
     99        1.1       chs };
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