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if_ntwoc_pci.c revision 1.2.8.1
      1  1.2.8.1    bouyer /*	$NetBSD: if_ntwoc_pci.c,v 1.2.8.1 2000/11/20 11:42:23 bouyer Exp $	*/
      2      1.1  explorer 
      3      1.1  explorer /*
      4      1.1  explorer  * Copyright (c) 1998 Vixie Enterprises
      5      1.1  explorer  * All rights reserved.
      6      1.1  explorer  *
      7      1.1  explorer  * Redistribution and use in source and binary forms, with or without
      8      1.1  explorer  * modification, are permitted provided that the following conditions
      9      1.1  explorer  * are met:
     10      1.1  explorer  *
     11      1.1  explorer  * 1. Redistributions of source code must retain the above copyright
     12      1.1  explorer  *    notice, this list of conditions and the following disclaimer.
     13      1.1  explorer  * 2. Redistributions in binary form must reproduce the above copyright
     14      1.1  explorer  *    notice, this list of conditions and the following disclaimer in the
     15      1.1  explorer  *    documentation and/or other materials provided with the distribution.
     16      1.1  explorer  * 3. Neither the name of Vixie Enterprises nor the names
     17      1.1  explorer  *    of its contributors may be used to endorse or promote products derived
     18      1.1  explorer  *    from this software without specific prior written permission.
     19      1.1  explorer  *
     20      1.1  explorer  * THIS SOFTWARE IS PROVIDED BY VIXIE ENTERPRISES AND
     21      1.1  explorer  * CONTRIBUTORS ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
     22      1.1  explorer  * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
     23      1.1  explorer  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
     24      1.1  explorer  * DISCLAIMED.  IN NO EVENT SHALL VIXIE ENTERPRISES OR
     25      1.1  explorer  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
     26      1.1  explorer  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
     27      1.1  explorer  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
     28      1.1  explorer  * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
     29      1.1  explorer  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     30      1.1  explorer  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
     31      1.1  explorer  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     32      1.1  explorer  * SUCH DAMAGE.
     33      1.1  explorer  *
     34      1.1  explorer  * This software has been written for Vixie Enterprises by Michael Graff
     35      1.1  explorer  * <explorer (at) flame.org>.  To learn more about Vixie Enterprises, see
     36      1.1  explorer  * ``http://www.vix.com''.
     37      1.1  explorer  */
     38      1.1  explorer 
     39      1.1  explorer #include <sys/param.h>
     40      1.1  explorer #include <sys/systm.h>
     41      1.1  explorer #include <sys/device.h>
     42      1.1  explorer #include <sys/mbuf.h>
     43      1.1  explorer #include <sys/socket.h>
     44      1.1  explorer 
     45      1.1  explorer #include <net/if.h>
     46      1.1  explorer 
     47      1.1  explorer #include <machine/cpu.h>
     48      1.1  explorer #include <machine/bus.h>
     49      1.1  explorer #include <machine/intr.h>
     50      1.1  explorer 
     51      1.1  explorer #include <dev/pci/pcivar.h>
     52      1.1  explorer #include <dev/pci/pcireg.h>
     53      1.1  explorer #include <dev/pci/pcidevs.h>
     54      1.1  explorer 
     55      1.1  explorer #include <dev/ic/hd64570reg.h>
     56      1.1  explorer #include <dev/ic/hd64570var.h>
     57      1.1  explorer 
     58      1.1  explorer #include <dev/pci/if_ntwoc_pcireg.h>
     59      1.1  explorer 
     60      1.1  explorer #if 0
     61      1.1  explorer #define NTWO_DEBUG
     62      1.1  explorer #endif
     63      1.1  explorer 
     64      1.1  explorer #ifdef NTWO_DEBUG
     65      1.1  explorer #define NTWO_DPRINTF(x) printf x
     66      1.1  explorer #else
     67      1.1  explorer #define NTWO_DPRINTF(x)
     68      1.1  explorer #endif
     69      1.1  explorer 
     70      1.1  explorer /*
     71  1.2.8.1    bouyer  * buffers per tx and rx channels, per port, and the size of each.
     72  1.2.8.1    bouyer  * Don't use these constants directly, as they are really only hints.
     73  1.2.8.1    bouyer  * Use the calculated values stored in struct sca_softc instead.
     74  1.2.8.1    bouyer  *
     75  1.2.8.1    bouyer  * Each must be at least 2, receive would be better at around 20 or so.
     76  1.2.8.1    bouyer  *
     77  1.2.8.1    bouyer  * XXX Due to a damned near impossible to track down bug, transmit buffers
     78  1.2.8.1    bouyer  * MUST be 2, no more, no less.
     79  1.2.8.1    bouyer  */
     80  1.2.8.1    bouyer #ifndef NTWOC_NtxBUFS
     81  1.2.8.1    bouyer #define NTWOC_NtxBUFS     40
     82  1.2.8.1    bouyer #endif
     83  1.2.8.1    bouyer #ifndef NTWOC_NrxBUFS
     84  1.2.8.1    bouyer #define NTWOC_NrxBUFS     20
     85  1.2.8.1    bouyer #endif
     86  1.2.8.1    bouyer 
     87  1.2.8.1    bouyer #if __NetBSD_Version__ >= 104160000
     88  1.2.8.1    bouyer static	void ntwoc_pci_config_interrupts __P((struct device *));
     89  1.2.8.1    bouyer #else
     90  1.2.8.1    bouyer #define	SCA_BASECLOCK	16000000
     91  1.2.8.1    bouyer #endif
     92  1.2.8.1    bouyer 
     93  1.2.8.1    bouyer /*
     94      1.1  explorer  * Card specific config register location
     95      1.1  explorer  */
     96      1.1  explorer #define PCI_CBMA_ASIC	0x10	/* Configuration Base Memory Address */
     97      1.1  explorer #define PCI_CBMA_SCA	0x18
     98      1.1  explorer 
     99      1.1  explorer struct ntwoc_pci_softc {
    100      1.1  explorer 	/* Generic device stuff */
    101      1.1  explorer 	struct device sc_dev;		/* Common to all devices */
    102      1.1  explorer 
    103      1.1  explorer 	/* PCI chipset glue */
    104      1.1  explorer 	pci_intr_handle_t *sc_ih;	/* Interrupt handler */
    105      1.1  explorer 	pci_chipset_tag_t sc_sr;	/* PCI chipset handle */
    106      1.1  explorer 
    107      1.1  explorer 	bus_space_tag_t sc_asic_iot;	/* space cookie (for ASIC) */
    108      1.1  explorer 	bus_space_handle_t sc_asic_ioh;	/* bus space handle (for ASIC) */
    109      1.1  explorer 
    110      1.1  explorer 	struct sca_softc sc_sca;	/* the SCA itself */
    111      1.1  explorer };
    112      1.1  explorer 
    113      1.1  explorer static  int ntwoc_pci_match __P((struct device *, struct cfdata *, void *));
    114      1.1  explorer static  void ntwoc_pci_attach __P((struct device *, struct device *, void *));
    115      1.1  explorer 
    116  1.2.8.1    bouyer static	int ntwoc_pci_alloc_dma __P((struct sca_softc *));
    117  1.2.8.1    bouyer static	void ntwoc_pci_clock_callback __P((void *, int, int));
    118  1.2.8.1    bouyer static	void ntwoc_pci_dtr_callback __P((void *, int, int));
    119  1.2.8.1    bouyer static	void ntwoc_pci_get_clock __P((struct sca_port *, u_int8_t, u_int8_t,
    120  1.2.8.1    bouyer     u_int8_t, u_int8_t));
    121  1.2.8.1    bouyer static	int ntwoc_pci_intr __P((void *));
    122  1.2.8.1    bouyer static	void ntwoc_pci_setup_dma __P((struct sca_softc *));
    123  1.2.8.1    bouyer static	void ntwoc_pci_shutdown __P((void *sc));
    124      1.1  explorer 
    125      1.1  explorer struct cfattach ntwoc_pci_ca = {
    126      1.1  explorer   sizeof(struct ntwoc_pci_softc), ntwoc_pci_match, ntwoc_pci_attach,
    127      1.1  explorer };
    128      1.1  explorer 
    129      1.1  explorer /*
    130      1.1  explorer  * Names for daughter card types.  These match the NTWOC_DB_* defines.
    131      1.1  explorer  */
    132  1.2.8.1    bouyer char *ntwoc_pci_db_names[] = {
    133      1.1  explorer 	"V.35", "Unknown 0x01", "Test", "Unknown 0x03",
    134      1.1  explorer 	"RS232", "Unknown 0x05", "RS422", "None"
    135      1.1  explorer };
    136      1.1  explorer 
    137  1.2.8.1    bouyer /*
    138  1.2.8.1    bouyer  * At least one implementation uses a somewhat strange register address
    139  1.2.8.1    bouyer  * mapping.  If a card doesn't, define this to be a pass-through
    140  1.2.8.1    bouyer  * macro.  (The ntwo driver needs this...)
    141  1.2.8.1    bouyer  */
    142  1.2.8.1    bouyer #define SCA_REG(y)  (((y) & 0x0002) ? (((y) & 0x00fd) + 0x100) : (y))
    143  1.2.8.1    bouyer 
    144  1.2.8.1    bouyer /*
    145  1.2.8.1    bouyer  * functions that read and write to the sca registers
    146  1.2.8.1    bouyer  */
    147  1.2.8.1    bouyer static void
    148  1.2.8.1    bouyer ntwoc_pci_sca_write_1(struct sca_softc *sc, u_int reg, u_int8_t val)
    149  1.2.8.1    bouyer {
    150  1.2.8.1    bouyer 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, SCA_REG(reg), val);
    151  1.2.8.1    bouyer }
    152  1.2.8.1    bouyer 
    153  1.2.8.1    bouyer static void
    154  1.2.8.1    bouyer ntwoc_pci_sca_write_2(struct sca_softc *sc, u_int reg, u_int16_t val)
    155  1.2.8.1    bouyer {
    156  1.2.8.1    bouyer 	bus_space_write_2(sc->sc_iot, sc->sc_ioh, SCA_REG(reg), val);
    157  1.2.8.1    bouyer }
    158  1.2.8.1    bouyer 
    159  1.2.8.1    bouyer static u_int8_t
    160  1.2.8.1    bouyer ntwoc_pci_sca_read_1(struct sca_softc *sc, u_int reg)
    161  1.2.8.1    bouyer {
    162  1.2.8.1    bouyer 	return
    163  1.2.8.1    bouyer 	    bus_space_read_1(sc->sc_iot, sc->sc_ioh, SCA_REG(reg));
    164  1.2.8.1    bouyer }
    165  1.2.8.1    bouyer 
    166  1.2.8.1    bouyer static u_int16_t
    167  1.2.8.1    bouyer ntwoc_pci_sca_read_2(struct sca_softc *sc, u_int reg)
    168  1.2.8.1    bouyer {
    169  1.2.8.1    bouyer 	return
    170  1.2.8.1    bouyer 	    bus_space_read_2(sc->sc_iot, sc->sc_ioh, SCA_REG(reg));
    171  1.2.8.1    bouyer }
    172  1.2.8.1    bouyer 
    173  1.2.8.1    bouyer 
    174  1.2.8.1    bouyer 
    175      1.1  explorer static int
    176      1.1  explorer ntwoc_pci_match(struct device *parent, struct cfdata *match, void *aux)
    177      1.1  explorer {
    178      1.1  explorer 	struct pci_attach_args *pa = (struct pci_attach_args *)aux;
    179      1.1  explorer 
    180      1.1  explorer 	if ((PCI_VENDOR(pa->pa_id) == PCI_VENDOR_RISCOM)
    181      1.1  explorer 	    && (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_RISCOM_N2))
    182      1.1  explorer 		return 1;
    183      1.1  explorer 
    184      1.1  explorer 	return 0;
    185      1.1  explorer }
    186      1.1  explorer 
    187      1.1  explorer static void
    188      1.1  explorer ntwoc_pci_attach(struct device *parent, struct device *self, void *aux)
    189      1.1  explorer {
    190      1.1  explorer 	struct ntwoc_pci_softc *sc = (void *)self;
    191      1.1  explorer 	struct pci_attach_args *pa = aux;
    192      1.1  explorer 	struct sca_softc *sca = &sc->sc_sca;
    193      1.1  explorer 	pci_intr_handle_t ih;
    194      1.1  explorer 	const char *intrstr;
    195      1.1  explorer 	pcireg_t csr;
    196  1.2.8.1    bouyer 	u_int8_t tmc, rdiv, tdiv;
    197      1.1  explorer 	u_int16_t frontend_cr;
    198      1.1  explorer 	u_int16_t db0, db1;
    199  1.2.8.1    bouyer 	u_int32_t flags;
    200      1.1  explorer 	u_int numports;
    201      1.1  explorer 
    202      1.1  explorer 	printf(": N2 Serial Interface\n");
    203  1.2.8.1    bouyer 	flags = sc->sc_dev.dv_cfdata->cf_flags;
    204      1.1  explorer 
    205      1.1  explorer 	/*
    206      1.1  explorer 	 * Map in the ASIC configuration space
    207      1.1  explorer 	 */
    208      1.1  explorer 	if (pci_mapreg_map(pa, PCI_CBMA_ASIC, PCI_MAPREG_TYPE_MEM, 0,
    209      1.1  explorer 			   &sc->sc_asic_iot, &sc->sc_asic_ioh, NULL, NULL)) {
    210      1.1  explorer 		printf("%s: Can't map register space (ASIC)\n",
    211      1.1  explorer 		       sc->sc_dev.dv_xname);
    212      1.1  explorer 		return;
    213      1.1  explorer 	}
    214      1.1  explorer 	/*
    215      1.1  explorer 	 * Map in the serial controller configuration space
    216      1.1  explorer 	 */
    217      1.1  explorer 	if (pci_mapreg_map(pa, PCI_CBMA_SCA, PCI_MAPREG_TYPE_MEM, 0,
    218      1.1  explorer 			   &sca->sc_iot, &sca->sc_ioh, NULL, NULL)) {
    219      1.1  explorer 		printf("%s: Can't map register space (SCA)\n",
    220      1.1  explorer 		       sc->sc_dev.dv_xname);
    221      1.1  explorer 		return;
    222      1.1  explorer 	}
    223      1.1  explorer 
    224      1.1  explorer 	/*
    225      1.1  explorer 	 * Enable the card
    226      1.1  explorer 	 */
    227      1.1  explorer 	csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
    228      1.1  explorer 	pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, csr);
    229      1.1  explorer 
    230      1.1  explorer 	/*
    231      1.1  explorer 	 * Map and establish the interrupt
    232      1.1  explorer 	 */
    233      1.1  explorer 	if (pci_intr_map(pa->pa_pc, pa->pa_intrtag, pa->pa_intrpin,
    234      1.1  explorer 			 pa->pa_intrline, &ih)) {
    235      1.1  explorer 		printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname);
    236      1.1  explorer 		return;
    237      1.1  explorer 	}
    238      1.1  explorer 	intrstr = pci_intr_string(pa->pa_pc, ih);
    239  1.2.8.1    bouyer 	sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_NET, ntwoc_pci_intr,
    240  1.2.8.1    bouyer 	    sc);
    241      1.1  explorer 	if (sc->sc_ih == NULL) {
    242      1.1  explorer 		printf("%s: couldn't establish interrupt",
    243      1.1  explorer 		       sc->sc_dev.dv_xname);
    244      1.1  explorer 		if (intrstr != NULL)
    245      1.1  explorer 			printf(" at %s", intrstr);
    246      1.1  explorer 		printf("\n");
    247      1.1  explorer 		return;
    248      1.1  explorer 	}
    249      1.1  explorer 	printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr);
    250      1.1  explorer 
    251      1.1  explorer 	/*
    252      1.1  explorer 	 * Perform total black magic.  This is not only extremely
    253      1.1  explorer 	 * disgusting, but it should be explained a lot more in the
    254      1.1  explorer 	 * card's documentation.
    255      1.1  explorer 	 *
    256      1.1  explorer 	 * From what I gather, this does nothing more than configure the
    257      1.1  explorer 	 * PCI to ISA translator ASIC the N2pci card uses.
    258      1.1  explorer 	 *
    259      1.1  explorer 	 * From the FreeBSD driver:
    260      1.1  explorer 	 * offset
    261      1.1  explorer 	 *  0x00 - Map Range    - Mem-mapped to locate anywhere
    262      1.1  explorer 	 *  0x04 - Re-Map       - PCI address decode enable
    263      1.1  explorer 	 *  0x18 - Bus Region   - 32-bit bus, ready enable
    264      1.1  explorer 	 *  0x1c - Master Range - include all 16 MB
    265      1.1  explorer 	 *  0x20 - Master RAM   - Map SCA Base at 0
    266      1.1  explorer 	 *  0x28 - Master Remap - direct master memory enable
    267      1.1  explorer 	 *  0x68 - Interrupt    - Enable interrupt (0 to disable)
    268      1.1  explorer 	 */
    269      1.1  explorer 	bus_space_write_4(sc->sc_asic_iot, sc->sc_asic_ioh,
    270      1.1  explorer 			  0x00, 0xfffff000);
    271      1.1  explorer 	bus_space_write_4(sc->sc_asic_iot, sc->sc_asic_ioh,
    272      1.1  explorer 			  0x04, 1);
    273      1.1  explorer 	bus_space_write_4(sc->sc_asic_iot, sc->sc_asic_ioh,
    274      1.1  explorer 			  0x18, 0x40030043);
    275      1.1  explorer 	bus_space_write_4(sc->sc_asic_iot, sc->sc_asic_ioh,
    276      1.1  explorer 			  0x1c, 0xff000000);
    277      1.1  explorer 	bus_space_write_4(sc->sc_asic_iot, sc->sc_asic_ioh,
    278      1.1  explorer 			  0x20, 0);
    279      1.1  explorer 	bus_space_write_4(sc->sc_asic_iot, sc->sc_asic_ioh,
    280      1.1  explorer 			  0x28, 0xe9);
    281      1.1  explorer 	bus_space_write_4(sc->sc_asic_iot, sc->sc_asic_ioh,
    282      1.1  explorer 			  0x68, 0x10900);
    283      1.1  explorer 
    284      1.1  explorer 	/*
    285      1.1  explorer 	 * pass the dma tag to the SCA
    286      1.1  explorer 	 */
    287  1.2.8.1    bouyer 	sca->sc_usedma = 1;
    288  1.2.8.1    bouyer 	sca->scu_dmat = pa->pa_dmat;
    289      1.1  explorer 
    290      1.1  explorer 	/*
    291      1.1  explorer 	 * Read the configuration information off the daughter card.
    292      1.1  explorer 	 */
    293      1.1  explorer 	frontend_cr = bus_space_read_2(sca->sc_iot, sca->sc_ioh, NTWOC_FECR);
    294      1.1  explorer 	NTWO_DPRINTF(("%s: frontend_cr = 0x%04x\n",
    295      1.1  explorer 		      sc->sc_dev.dv_xname, frontend_cr));
    296      1.1  explorer 
    297      1.1  explorer 	db0 = (frontend_cr & NTWOC_FECR_ID0) >> NTWOC_FECR_ID0_SHIFT;
    298      1.1  explorer 	db1 = (frontend_cr & NTWOC_FECR_ID1) >> NTWOC_FECR_ID1_SHIFT;
    299      1.1  explorer 
    300      1.1  explorer 	/*
    301      1.1  explorer 	 * Port 1 HAS to be present.  If it isn't, don't attach anything.
    302      1.1  explorer 	 */
    303      1.1  explorer 	if (db0 == NTWOC_FE_ID_NONE) {
    304      1.1  explorer 		printf("%s: no ports available\n", sc->sc_dev.dv_xname);
    305      1.1  explorer 		return;
    306      1.1  explorer 	}
    307      1.1  explorer 
    308      1.1  explorer 	/*
    309      1.1  explorer 	 * Port 1 is present.  Now, check to see if port 2 is also
    310      1.1  explorer 	 * present.
    311      1.1  explorer 	 */
    312      1.1  explorer 	numports = 1;
    313      1.1  explorer 	if (db1 != NTWOC_FE_ID_NONE)
    314      1.1  explorer 		numports++;
    315      1.1  explorer 
    316      1.1  explorer 	printf("%s: %d port%s\n", sc->sc_dev.dv_xname, numports,
    317      1.1  explorer 	       (numports > 1 ? "s" : ""));
    318      1.1  explorer 	printf("%s: port 0 interface card: %s\n", sc->sc_dev.dv_xname,
    319  1.2.8.1    bouyer 	       ntwoc_pci_db_names[db0]);
    320      1.1  explorer 	if (numports > 1)
    321      1.1  explorer 		printf("%s: port 1 interface card: %s\n", sc->sc_dev.dv_xname,
    322  1.2.8.1    bouyer 		       ntwoc_pci_db_names[db1]);
    323      1.1  explorer 
    324      1.1  explorer 	/*
    325      1.1  explorer 	 * enable the RS422 tristate transmit
    326      1.1  explorer 	 * diable clock output (use receiver clock for both)
    327      1.1  explorer 	 */
    328      1.1  explorer 	frontend_cr |= (NTWOC_FECR_TE0 | NTWOC_FECR_TE1);
    329      1.1  explorer 	frontend_cr &= ~(NTWOC_FECR_ETC0 | NTWOC_FECR_ETC1);
    330      1.1  explorer 	bus_space_write_2(sc->sc_sca.sc_iot, sc->sc_sca.sc_ioh,
    331      1.1  explorer 			  NTWOC_FECR, frontend_cr);
    332      1.1  explorer 
    333      1.1  explorer 	/*
    334      1.1  explorer 	 * initialize the SCA.  This will allocate DMAable memory based
    335      1.1  explorer 	 * on the number of ports we passed in, the size of each
    336      1.1  explorer 	 * buffer, and the number of buffers per port.
    337      1.1  explorer 	 */
    338  1.2.8.1    bouyer 	sca->sc_parent = &sc->sc_dev;
    339  1.2.8.1    bouyer 	sca->sc_read_1 = ntwoc_pci_sca_read_1;
    340  1.2.8.1    bouyer 	sca->sc_read_2 = ntwoc_pci_sca_read_2;
    341  1.2.8.1    bouyer 	sca->sc_write_1 = ntwoc_pci_sca_write_1;
    342  1.2.8.1    bouyer 	sca->sc_write_2 = ntwoc_pci_sca_write_2;
    343  1.2.8.1    bouyer 	sca->sc_dtr_callback = ntwoc_pci_dtr_callback;
    344  1.2.8.1    bouyer 	sca->sc_clock_callback = ntwoc_pci_clock_callback;
    345  1.2.8.1    bouyer 	sca->sc_aux = sc;
    346  1.2.8.1    bouyer 	sca->sc_numports = numports;
    347  1.2.8.1    bouyer 
    348  1.2.8.1    bouyer 	/*
    349  1.2.8.1    bouyer 	 * get clock information from user
    350  1.2.8.1    bouyer 	 */
    351  1.2.8.1    bouyer 	rdiv = (flags & NTWOC_FLAGS_RXDIV_MASK) >> NTWOC_FLAGS_RXDIV_SHIFT;
    352  1.2.8.1    bouyer 	if (rdiv > 9)
    353  1.2.8.1    bouyer 		panic("bad rx divisor in flags");
    354  1.2.8.1    bouyer 
    355  1.2.8.1    bouyer 	tdiv = (flags & NTWOC_FLAGS_TXDIV_MASK) >> NTWOC_FLAGS_TXDIV_SHIFT;
    356  1.2.8.1    bouyer 	if (tdiv > 9)
    357  1.2.8.1    bouyer 		panic("bad tx divisor in flags");
    358  1.2.8.1    bouyer 	tmc = (flags & NTWOC_FLAGS_TMC_MASK) >> NTWOC_FLAGS_TMC_SHIFT;
    359  1.2.8.1    bouyer 
    360  1.2.8.1    bouyer 	ntwoc_pci_get_clock(&sca->sc_ports[0], flags & NTWOC_FLAGS_CLK0_MASK,
    361  1.2.8.1    bouyer 	    tmc, rdiv, tdiv);
    362  1.2.8.1    bouyer 	if (sca->sc_numports > 1)
    363  1.2.8.1    bouyer 		ntwoc_pci_get_clock(&sca->sc_ports[1],
    364  1.2.8.1    bouyer 		    (flags & NTWOC_FLAGS_CLK1_MASK) >> NTWOC_FLAGS_CLK1_SHIFT,
    365  1.2.8.1    bouyer 		    tmc, rdiv, tdiv);
    366  1.2.8.1    bouyer 
    367  1.2.8.1    bouyer 	/* allocate dma'able memory for card to use */
    368  1.2.8.1    bouyer 	ntwoc_pci_alloc_dma(sca);
    369  1.2.8.1    bouyer 	ntwoc_pci_setup_dma(sca);
    370  1.2.8.1    bouyer 
    371  1.2.8.1    bouyer 	sca_init(sca);
    372      1.1  explorer 
    373      1.1  explorer 	/*
    374      1.1  explorer 	 * always initialize port 0, since we have to have found it to
    375      1.1  explorer 	 * get this far.  If we have two ports, attach the second
    376      1.1  explorer 	 * as well.
    377      1.1  explorer 	 */
    378      1.1  explorer 	sca_port_attach(sca, 0);
    379      1.1  explorer 	if (numports == 2)
    380      1.1  explorer 		sca_port_attach(sca, 1);
    381      1.1  explorer 
    382      1.1  explorer 	/*
    383      1.1  explorer 	 * Add shutdown hook so that DMA is disabled prior to reboot. Not
    384      1.1  explorer 	 * doing do could allow DMA to corrupt kernel memory during the
    385      1.1  explorer 	 * reboot before the driver initializes.
    386      1.1  explorer 	 */
    387  1.2.8.1    bouyer 	shutdownhook_establish(ntwoc_pci_shutdown, sc);
    388  1.2.8.1    bouyer 
    389  1.2.8.1    bouyer #if __NetBSD_Version__ >= 104160000
    390  1.2.8.1    bouyer 	/*
    391  1.2.8.1    bouyer 	 * defer getting the base clock until interrupts are enabled
    392  1.2.8.1    bouyer 	 * (and thus we have microtime())
    393  1.2.8.1    bouyer 	 */
    394  1.2.8.1    bouyer 	config_interrupts(self, ntwoc_pci_config_interrupts);
    395  1.2.8.1    bouyer #else
    396  1.2.8.1    bouyer 	sca->sc_baseclock = SCA_BASECLOCK;
    397  1.2.8.1    bouyer 	sca_print_clock_info(&sc->sc_sca);
    398  1.2.8.1    bouyer #endif
    399      1.1  explorer }
    400      1.1  explorer 
    401  1.2.8.1    bouyer /*
    402  1.2.8.1    bouyer  * extract the clock information for a port from the flags field
    403  1.2.8.1    bouyer  */
    404  1.2.8.1    bouyer static void
    405  1.2.8.1    bouyer ntwoc_pci_get_clock(struct sca_port *scp, u_int8_t flags, u_int8_t tmc,
    406  1.2.8.1    bouyer     u_int8_t rdiv, u_int8_t tdiv)
    407  1.2.8.1    bouyer {
    408  1.2.8.1    bouyer 	scp->sp_eclock =
    409  1.2.8.1    bouyer 	    (flags & NTWOC_FLAGS_ECLOCK_MASK) >> NTWOC_FLAGS_ECLOCK_SHIFT;
    410  1.2.8.1    bouyer 	scp->sp_rxs = rdiv;
    411  1.2.8.1    bouyer 	scp->sp_txs = tdiv;
    412  1.2.8.1    bouyer 	scp->sp_tmc = tmc;
    413  1.2.8.1    bouyer 
    414  1.2.8.1    bouyer 	/* get rx source */
    415  1.2.8.1    bouyer 	switch ((flags & NTWOC_FLAGS_RXS_MASK) >> NTWOC_FLAGS_RXS_SHIFT) {
    416  1.2.8.1    bouyer 	case NTWOC_FLAGS_RXS_LINE:
    417  1.2.8.1    bouyer 		scp->sp_rxs = 0;
    418  1.2.8.1    bouyer 		break;
    419  1.2.8.1    bouyer 	case NTWOC_FLAGS_RXS_LINE_SN:
    420  1.2.8.1    bouyer 		scp->sp_rxs |= SCA_RXS_CLK_LINE_SN;
    421  1.2.8.1    bouyer 		break;
    422  1.2.8.1    bouyer 	case NTWOC_FLAGS_RXS_INTERNAL:
    423  1.2.8.1    bouyer 		scp->sp_rxs |= SCA_RXS_CLK_INTERNAL;
    424  1.2.8.1    bouyer 		break;
    425  1.2.8.1    bouyer 	case NTWOC_FLAGS_RXS_ADPLL_OUT:
    426  1.2.8.1    bouyer 		scp->sp_rxs |= SCA_RXS_CLK_ADPLL_OUT;
    427  1.2.8.1    bouyer 		break;
    428  1.2.8.1    bouyer 	case NTWOC_FLAGS_RXS_ADPLL_IN:
    429  1.2.8.1    bouyer 		scp->sp_rxs |= SCA_RXS_CLK_ADPLL_IN;
    430  1.2.8.1    bouyer 		break;
    431  1.2.8.1    bouyer 	default:
    432  1.2.8.1    bouyer 		panic("bad rx source in flags");
    433  1.2.8.1    bouyer 	}
    434  1.2.8.1    bouyer 
    435  1.2.8.1    bouyer 	/* get tx source */
    436  1.2.8.1    bouyer 	switch ((flags & NTWOC_FLAGS_TXS_MASK) >> NTWOC_FLAGS_TXS_SHIFT) {
    437  1.2.8.1    bouyer 	case NTWOC_FLAGS_TXS_LINE:
    438  1.2.8.1    bouyer 		scp->sp_txs = 0;
    439  1.2.8.1    bouyer 		break;
    440  1.2.8.1    bouyer 	case NTWOC_FLAGS_TXS_INTERNAL:
    441  1.2.8.1    bouyer 		scp->sp_txs |= SCA_TXS_CLK_INTERNAL;
    442  1.2.8.1    bouyer 		break;
    443  1.2.8.1    bouyer 	case NTWOC_FLAGS_TXS_RXCLOCK:
    444  1.2.8.1    bouyer 		scp->sp_txs |= SCA_TXS_CLK_RXCLK;
    445  1.2.8.1    bouyer 		break;
    446  1.2.8.1    bouyer 	default:
    447  1.2.8.1    bouyer 		panic("bad rx source in flags");
    448  1.2.8.1    bouyer 	}
    449  1.2.8.1    bouyer }
    450  1.2.8.1    bouyer 
    451  1.2.8.1    bouyer 
    452      1.1  explorer static int
    453  1.2.8.1    bouyer ntwoc_pci_intr(void *arg)
    454      1.1  explorer {
    455      1.1  explorer 	struct ntwoc_pci_softc *sc = (struct ntwoc_pci_softc *)arg;
    456      1.1  explorer 
    457      1.1  explorer 	return sca_hardintr(&sc->sc_sca);
    458      1.1  explorer }
    459      1.1  explorer 
    460      1.1  explorer /*
    461      1.1  explorer  * shut down interrupts and DMA, so we don't trash the kernel on warm
    462      1.1  explorer  * boot.  Also, lower DTR on each port and disable card interrupts.
    463      1.1  explorer  */
    464      1.1  explorer static void
    465  1.2.8.1    bouyer ntwoc_pci_shutdown(void *aux)
    466      1.1  explorer {
    467      1.1  explorer 	struct ntwoc_pci_softc *sc = aux;
    468      1.1  explorer 	u_int16_t fecr;
    469      1.1  explorer 
    470      1.1  explorer 	/*
    471      1.1  explorer 	 * shut down the SCA ports
    472      1.1  explorer 	 */
    473      1.1  explorer 	sca_shutdown(&sc->sc_sca);
    474      1.1  explorer 
    475      1.1  explorer 	/*
    476      1.1  explorer 	 * disable interupts for the whole card.  Black magic, see comment
    477      1.1  explorer 	 * above.
    478      1.1  explorer 	 */
    479      1.1  explorer 	bus_space_write_4(sc->sc_asic_iot, sc->sc_asic_ioh,
    480      1.1  explorer 			  0x68, 0x10900);
    481      1.1  explorer 
    482      1.1  explorer 	/*
    483      1.1  explorer 	 * lower DTR on both ports
    484      1.1  explorer 	 */
    485      1.1  explorer 	fecr = bus_space_read_2(sc->sc_sca.sc_iot,
    486      1.1  explorer 				sc->sc_sca.sc_ioh, NTWOC_FECR);
    487      1.1  explorer 	fecr |= (NTWOC_FECR_DTR0 | NTWOC_FECR_DTR1);
    488      1.1  explorer 	bus_space_write_2(sc->sc_sca.sc_iot, sc->sc_sca.sc_ioh,
    489      1.1  explorer 			  NTWOC_FECR, fecr);
    490      1.1  explorer }
    491      1.1  explorer 
    492      1.1  explorer static void
    493  1.2.8.1    bouyer ntwoc_pci_dtr_callback(void *aux, int port, int state)
    494      1.1  explorer {
    495      1.1  explorer 	struct ntwoc_pci_softc *sc = aux;
    496      1.1  explorer 	u_int16_t fecr;
    497      1.1  explorer 
    498      1.1  explorer 	fecr = bus_space_read_2(sc->sc_sca.sc_iot,
    499      1.1  explorer 				sc->sc_sca.sc_ioh, NTWOC_FECR);
    500      1.1  explorer 
    501  1.2.8.1    bouyer 	NTWO_DPRINTF(("dtr: port == %d, state == %d, old fecr:  0x%04x\n",
    502      1.1  explorer 		       port, state, fecr));
    503      1.1  explorer 
    504      1.1  explorer 	if (port == 0) {
    505      1.1  explorer 		if (state == 0)
    506      1.1  explorer 			fecr |= NTWOC_FECR_DTR0;
    507      1.1  explorer 		else
    508      1.1  explorer 			fecr &= ~NTWOC_FECR_DTR0;
    509      1.1  explorer 	} else {
    510      1.1  explorer 		if (state == 0)
    511      1.1  explorer 			fecr |= NTWOC_FECR_DTR1;
    512      1.1  explorer 		else
    513      1.1  explorer 			fecr &= ~NTWOC_FECR_DTR1;
    514      1.1  explorer 	}
    515      1.1  explorer 
    516      1.1  explorer 	NTWO_DPRINTF(("new fecr:  0x%04x\n", fecr));
    517      1.1  explorer 
    518      1.1  explorer 	bus_space_write_2(sc->sc_sca.sc_iot, sc->sc_sca.sc_ioh,
    519      1.1  explorer 			  NTWOC_FECR, fecr);
    520      1.1  explorer }
    521  1.2.8.1    bouyer 
    522  1.2.8.1    bouyer static void
    523  1.2.8.1    bouyer ntwoc_pci_clock_callback(void *aux, int port, int enable)
    524  1.2.8.1    bouyer {
    525  1.2.8.1    bouyer 	struct ntwoc_pci_softc *sc = aux;
    526  1.2.8.1    bouyer 	u_int16_t fecr;
    527  1.2.8.1    bouyer 
    528  1.2.8.1    bouyer 	fecr = bus_space_read_2(sc->sc_sca.sc_iot,
    529  1.2.8.1    bouyer 				sc->sc_sca.sc_ioh, NTWOC_FECR);
    530  1.2.8.1    bouyer 
    531  1.2.8.1    bouyer 	NTWO_DPRINTF(("clk: port == %d, enable == %d, old fecr:  0x%04x\n",
    532  1.2.8.1    bouyer 		       port, enable, fecr));
    533  1.2.8.1    bouyer 
    534  1.2.8.1    bouyer 	if (port == 0) {
    535  1.2.8.1    bouyer 		if (enable)
    536  1.2.8.1    bouyer 			fecr |= NTWOC_FECR_ETC0;
    537  1.2.8.1    bouyer 		else
    538  1.2.8.1    bouyer 			fecr &= ~NTWOC_FECR_ETC0;
    539  1.2.8.1    bouyer 	} else {
    540  1.2.8.1    bouyer 		if (enable)
    541  1.2.8.1    bouyer 			fecr |= NTWOC_FECR_ETC1;
    542  1.2.8.1    bouyer 		else
    543  1.2.8.1    bouyer 			fecr &= ~NTWOC_FECR_ETC1;
    544  1.2.8.1    bouyer 	}
    545  1.2.8.1    bouyer 
    546  1.2.8.1    bouyer 	NTWO_DPRINTF(("new fecr:  0x%04x\n", fecr));
    547  1.2.8.1    bouyer 
    548  1.2.8.1    bouyer 	bus_space_write_2(sc->sc_sca.sc_iot, sc->sc_sca.sc_ioh,
    549  1.2.8.1    bouyer 			  NTWOC_FECR, fecr);
    550  1.2.8.1    bouyer }
    551  1.2.8.1    bouyer 
    552  1.2.8.1    bouyer static int
    553  1.2.8.1    bouyer ntwoc_pci_alloc_dma(struct sca_softc *sc)
    554  1.2.8.1    bouyer {
    555  1.2.8.1    bouyer 	u_int	allocsize;
    556  1.2.8.1    bouyer 	int	err;
    557  1.2.8.1    bouyer 	int	rsegs;
    558  1.2.8.1    bouyer 	u_int	bpp;
    559  1.2.8.1    bouyer 
    560  1.2.8.1    bouyer 	/* first initialize the number of descriptors */
    561  1.2.8.1    bouyer 	sc->sc_ports[0].sp_nrxdesc = NTWOC_NrxBUFS;
    562  1.2.8.1    bouyer 	sc->sc_ports[0].sp_ntxdesc = NTWOC_NtxBUFS;
    563  1.2.8.1    bouyer 	if (sc->sc_numports == 2) {
    564  1.2.8.1    bouyer 		sc->sc_ports[1].sp_nrxdesc = NTWOC_NrxBUFS;
    565  1.2.8.1    bouyer 		sc->sc_ports[1].sp_ntxdesc = NTWOC_NtxBUFS;
    566  1.2.8.1    bouyer 	}
    567  1.2.8.1    bouyer 
    568  1.2.8.1    bouyer 	NTWO_DPRINTF(("sizeof sca_desc_t: %d bytes\n", sizeof (sca_desc_t)));
    569  1.2.8.1    bouyer 
    570  1.2.8.1    bouyer 	bpp = sc->sc_numports * (NTWOC_NtxBUFS + NTWOC_NrxBUFS);
    571  1.2.8.1    bouyer 
    572  1.2.8.1    bouyer 	allocsize = bpp * (SCA_BSIZE + sizeof (sca_desc_t));
    573  1.2.8.1    bouyer 
    574  1.2.8.1    bouyer 	/*
    575  1.2.8.1    bouyer 	 * sanity checks:
    576  1.2.8.1    bouyer 	 *
    577  1.2.8.1    bouyer 	 * Check the total size of the data buffers, and so on.  The total
    578  1.2.8.1    bouyer 	 * DMAable space needs to fit within a single 16M region, and the
    579  1.2.8.1    bouyer 	 * descriptors need to fit within a 64K region.
    580  1.2.8.1    bouyer 	 */
    581  1.2.8.1    bouyer 	if (allocsize > 16 * 1024 * 1024)
    582  1.2.8.1    bouyer 		return 1;
    583  1.2.8.1    bouyer 	if (bpp * sizeof (sca_desc_t) > 64 * 1024)
    584  1.2.8.1    bouyer 		return 1;
    585  1.2.8.1    bouyer 
    586  1.2.8.1    bouyer 	sc->scu_allocsize = allocsize;
    587  1.2.8.1    bouyer 
    588  1.2.8.1    bouyer 	/*
    589  1.2.8.1    bouyer 	 * Allocate one huge chunk of memory.
    590  1.2.8.1    bouyer 	 */
    591  1.2.8.1    bouyer 	if (bus_dmamem_alloc(sc->scu_dmat,
    592  1.2.8.1    bouyer 			     allocsize,
    593  1.2.8.1    bouyer 			     SCA_DMA_ALIGNMENT,
    594  1.2.8.1    bouyer 			     SCA_DMA_BOUNDRY,
    595  1.2.8.1    bouyer 			     &sc->scu_seg, 1, &rsegs, BUS_DMA_NOWAIT) != 0) {
    596  1.2.8.1    bouyer 		printf("Could not allocate DMA memory\n");
    597  1.2.8.1    bouyer 		return 1;
    598  1.2.8.1    bouyer 	}
    599  1.2.8.1    bouyer 	NTWO_DPRINTF(("DMA memory allocated:  %d bytes\n", allocsize));
    600  1.2.8.1    bouyer 
    601  1.2.8.1    bouyer 	if (bus_dmamem_map(sc->scu_dmat, &sc->scu_seg, 1, allocsize,
    602  1.2.8.1    bouyer 			   &sc->scu_dma_addr, BUS_DMA_NOWAIT) != 0) {
    603  1.2.8.1    bouyer 		printf("Could not map DMA memory into kernel space\n");
    604  1.2.8.1    bouyer 		return 1;
    605  1.2.8.1    bouyer 	}
    606  1.2.8.1    bouyer 	NTWO_DPRINTF(("DMA memory mapped\n"));
    607  1.2.8.1    bouyer 
    608  1.2.8.1    bouyer 	if (bus_dmamap_create(sc->scu_dmat, allocsize, 2,
    609  1.2.8.1    bouyer 			      allocsize, SCA_DMA_BOUNDRY,
    610  1.2.8.1    bouyer 			      BUS_DMA_NOWAIT, &sc->scu_dmam) != 0) {
    611  1.2.8.1    bouyer 		printf("Could not create DMA map\n");
    612  1.2.8.1    bouyer 		return 1;
    613  1.2.8.1    bouyer 	}
    614  1.2.8.1    bouyer 	NTWO_DPRINTF(("DMA map created\n"));
    615  1.2.8.1    bouyer 
    616  1.2.8.1    bouyer 	err = bus_dmamap_load(sc->scu_dmat, sc->scu_dmam, sc->scu_dma_addr,
    617  1.2.8.1    bouyer 			      allocsize, NULL, BUS_DMA_NOWAIT);
    618  1.2.8.1    bouyer 	if (err != 0) {
    619  1.2.8.1    bouyer 		printf("Could not load DMA segment:  %d\n", err);
    620  1.2.8.1    bouyer 		return 1;
    621  1.2.8.1    bouyer 	}
    622  1.2.8.1    bouyer 	NTWO_DPRINTF(("DMA map loaded\n"));
    623  1.2.8.1    bouyer 
    624  1.2.8.1    bouyer 	return 0;
    625  1.2.8.1    bouyer }
    626  1.2.8.1    bouyer 
    627  1.2.8.1    bouyer /*
    628  1.2.8.1    bouyer  * Take the memory allocated with sca_alloc_dma() and divide it among the
    629  1.2.8.1    bouyer  * two ports.
    630  1.2.8.1    bouyer  */
    631  1.2.8.1    bouyer static void
    632  1.2.8.1    bouyer ntwoc_pci_setup_dma(struct sca_softc *sc)
    633  1.2.8.1    bouyer {
    634  1.2.8.1    bouyer 	sca_port_t *scp0, *scp1;
    635  1.2.8.1    bouyer 	u_int8_t  *vaddr0;
    636  1.2.8.1    bouyer 	u_int32_t paddr0;
    637  1.2.8.1    bouyer 	u_long addroff;
    638  1.2.8.1    bouyer 
    639  1.2.8.1    bouyer 	/*
    640  1.2.8.1    bouyer 	 * remember the physical address to 24 bits only, since the upper
    641  1.2.8.1    bouyer 	 * 8 bits is programed into the device at a different layer.
    642  1.2.8.1    bouyer 	 */
    643  1.2.8.1    bouyer 	paddr0 = (sc->scu_dmam->dm_segs[0].ds_addr & 0x00ffffff);
    644  1.2.8.1    bouyer 	vaddr0 = sc->scu_dma_addr;
    645  1.2.8.1    bouyer 
    646  1.2.8.1    bouyer 	/*
    647  1.2.8.1    bouyer 	 * if we have only one port it gets the full range.  If we have
    648  1.2.8.1    bouyer 	 * two we need to do a little magic to divide things up.
    649  1.2.8.1    bouyer 	 *
    650  1.2.8.1    bouyer 	 * The descriptors will all end up in the front of the area, while
    651  1.2.8.1    bouyer 	 * the remainder of the buffer is used for transmit and receive
    652  1.2.8.1    bouyer 	 * data.
    653  1.2.8.1    bouyer 	 *
    654  1.2.8.1    bouyer 	 * -------------------- start of memory
    655  1.2.8.1    bouyer 	 *    tx desc port 0
    656  1.2.8.1    bouyer 	 *    rx desc port 0
    657  1.2.8.1    bouyer 	 *    tx desc port 1
    658  1.2.8.1    bouyer 	 *    rx desc port 1
    659  1.2.8.1    bouyer 	 *    tx buffer port 0
    660  1.2.8.1    bouyer 	 *    rx buffer port 0
    661  1.2.8.1    bouyer 	 *    tx buffer port 1
    662  1.2.8.1    bouyer 	 *    rx buffer port 1
    663  1.2.8.1    bouyer 	 * -------------------- end of memory
    664  1.2.8.1    bouyer 	 */
    665  1.2.8.1    bouyer 	scp0 = &sc->sc_ports[0];
    666  1.2.8.1    bouyer 	scp1 = &sc->sc_ports[1];
    667  1.2.8.1    bouyer 
    668  1.2.8.1    bouyer 	scp0->sp_txdesc_p = paddr0;
    669  1.2.8.1    bouyer 	scp0->sp_txdesc = (sca_desc_t *)vaddr0;
    670  1.2.8.1    bouyer 	addroff = sizeof(sca_desc_t) * scp0->sp_ntxdesc;;
    671  1.2.8.1    bouyer 
    672  1.2.8.1    bouyer 	/*
    673  1.2.8.1    bouyer 	 * point to the range following the tx descriptors, and
    674  1.2.8.1    bouyer 	 * set the rx descriptors there.
    675  1.2.8.1    bouyer 	 */
    676  1.2.8.1    bouyer 	scp0->sp_rxdesc_p = paddr0 + addroff;
    677  1.2.8.1    bouyer 	scp0->sp_rxdesc = (sca_desc_t *)(vaddr0 + addroff);
    678  1.2.8.1    bouyer 	addroff += sizeof(sca_desc_t) * scp0->sp_nrxdesc;
    679  1.2.8.1    bouyer 
    680  1.2.8.1    bouyer 	if (sc->sc_numports == 2) {
    681  1.2.8.1    bouyer 		scp1->sp_txdesc_p = paddr0 + addroff;
    682  1.2.8.1    bouyer 		scp1->sp_txdesc = (sca_desc_t *)(vaddr0 + addroff);
    683  1.2.8.1    bouyer 		addroff += sizeof(sca_desc_t) * scp1->sp_ntxdesc;
    684  1.2.8.1    bouyer 
    685  1.2.8.1    bouyer 		scp1->sp_rxdesc_p = paddr0 + addroff;
    686  1.2.8.1    bouyer 		scp1->sp_rxdesc = (sca_desc_t *)(vaddr0 + addroff);
    687  1.2.8.1    bouyer 		addroff += sizeof(sca_desc_t) * scp1->sp_nrxdesc;
    688  1.2.8.1    bouyer 	}
    689  1.2.8.1    bouyer 
    690  1.2.8.1    bouyer 	/*
    691  1.2.8.1    bouyer 	 * point to the memory following the descriptors, and set the
    692  1.2.8.1    bouyer 	 * transmit buffer there.
    693  1.2.8.1    bouyer 	 */
    694  1.2.8.1    bouyer 	scp0->sp_txbuf_p = paddr0 + addroff;
    695  1.2.8.1    bouyer 	scp0->sp_txbuf = vaddr0 + addroff;
    696  1.2.8.1    bouyer 	addroff += SCA_BSIZE * scp0->sp_ntxdesc;
    697  1.2.8.1    bouyer 
    698  1.2.8.1    bouyer 	/*
    699  1.2.8.1    bouyer 	 * lastly, skip over the transmit buffer and set up pointers into
    700  1.2.8.1    bouyer 	 * the receive buffer.
    701  1.2.8.1    bouyer 	 */
    702  1.2.8.1    bouyer 	scp0->sp_rxbuf_p = paddr0 + addroff;
    703  1.2.8.1    bouyer 	scp0->sp_rxbuf = vaddr0 + addroff;
    704  1.2.8.1    bouyer 	addroff += SCA_BSIZE * scp0->sp_nrxdesc;
    705  1.2.8.1    bouyer 
    706  1.2.8.1    bouyer 	if (sc->sc_numports == 2) {
    707  1.2.8.1    bouyer 		scp1->sp_txbuf_p = paddr0 + addroff;
    708  1.2.8.1    bouyer 		scp1->sp_txbuf = vaddr0 + addroff;
    709  1.2.8.1    bouyer 		addroff += SCA_BSIZE * scp1->sp_ntxdesc;
    710  1.2.8.1    bouyer 
    711  1.2.8.1    bouyer 		scp1->sp_rxbuf_p = paddr0 + addroff;
    712  1.2.8.1    bouyer 		scp1->sp_rxbuf = vaddr0 + addroff;
    713  1.2.8.1    bouyer 		addroff += SCA_BSIZE * scp1->sp_nrxdesc;
    714  1.2.8.1    bouyer 	}
    715  1.2.8.1    bouyer 
    716  1.2.8.1    bouyer 	/*
    717  1.2.8.1    bouyer 	 * as a consistancy check, addroff should be equal to the allocation
    718  1.2.8.1    bouyer 	 * size.
    719  1.2.8.1    bouyer 	 */
    720  1.2.8.1    bouyer 	if (sc->scu_allocsize != addroff)
    721  1.2.8.1    bouyer 		printf("ERROR:  scu_allocsize != addroff: %lu != %lu\n",
    722  1.2.8.1    bouyer 		       sc->scu_allocsize, addroff);
    723  1.2.8.1    bouyer }
    724  1.2.8.1    bouyer 
    725  1.2.8.1    bouyer #if __NetBSD_Version__ >= 104160000
    726  1.2.8.1    bouyer static void
    727  1.2.8.1    bouyer ntwoc_pci_config_interrupts(self)
    728  1.2.8.1    bouyer 	struct device *self;
    729  1.2.8.1    bouyer {
    730  1.2.8.1    bouyer 	struct ntwoc_pci_softc *sc;
    731  1.2.8.1    bouyer 
    732  1.2.8.1    bouyer 	sc = (void *)self;
    733  1.2.8.1    bouyer 	sca_get_base_clock(&sc->sc_sca);
    734  1.2.8.1    bouyer 	sca_print_clock_info(&sc->sc_sca);
    735  1.2.8.1    bouyer }
    736  1.2.8.1    bouyer #endif
    737