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if_ntwoc_pci.c revision 1.28
      1 /*	$NetBSD: if_ntwoc_pci.c,v 1.28 2012/10/27 17:18:33 chs Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1998 Vixie Enterprises
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  *
     11  * 1. Redistributions of source code must retain the above copyright
     12  *    notice, this list of conditions and the following disclaimer.
     13  * 2. Redistributions in binary form must reproduce the above copyright
     14  *    notice, this list of conditions and the following disclaimer in the
     15  *    documentation and/or other materials provided with the distribution.
     16  * 3. Neither the name of Vixie Enterprises nor the names
     17  *    of its contributors may be used to endorse or promote products derived
     18  *    from this software without specific prior written permission.
     19  *
     20  * THIS SOFTWARE IS PROVIDED BY VIXIE ENTERPRISES AND
     21  * CONTRIBUTORS ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
     22  * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
     23  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
     24  * DISCLAIMED.  IN NO EVENT SHALL VIXIE ENTERPRISES OR
     25  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
     26  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
     27  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
     28  * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
     29  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     30  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
     31  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     32  * SUCH DAMAGE.
     33  *
     34  * This software has been written for Vixie Enterprises by Michael Graff
     35  * <explorer (at) flame.org>.  To learn more about Vixie Enterprises, see
     36  * ``http://www.vix.com''.
     37  */
     38 
     39 #include <sys/cdefs.h>
     40 __KERNEL_RCSID(0, "$NetBSD: if_ntwoc_pci.c,v 1.28 2012/10/27 17:18:33 chs Exp $");
     41 
     42 #include <sys/param.h>
     43 #include <sys/systm.h>
     44 #include <sys/device.h>
     45 #include <sys/mbuf.h>
     46 #include <sys/socket.h>
     47 
     48 #include <net/if.h>
     49 
     50 #include <sys/cpu.h>
     51 #include <sys/bus.h>
     52 #include <sys/intr.h>
     53 
     54 #include <dev/pci/pcivar.h>
     55 #include <dev/pci/pcireg.h>
     56 #include <dev/pci/pcidevs.h>
     57 
     58 #include <dev/ic/hd64570reg.h>
     59 #include <dev/ic/hd64570var.h>
     60 
     61 #include <dev/pci/if_ntwoc_pcireg.h>
     62 
     63 #if 0
     64 #define NTWO_DEBUG
     65 #endif
     66 
     67 #ifdef NTWO_DEBUG
     68 #define NTWO_DPRINTF(x) printf x
     69 #else
     70 #define NTWO_DPRINTF(x)
     71 #endif
     72 
     73 /*
     74  * buffers per tx and rx channels, per port, and the size of each.
     75  * Don't use these constants directly, as they are really only hints.
     76  * Use the calculated values stored in struct sca_softc instead.
     77  *
     78  * Each must be at least 2, receive would be better at around 20 or so.
     79  *
     80  * XXX Due to a damned near impossible to track down bug, transmit buffers
     81  * MUST be 2, no more, no less.
     82  */
     83 #ifndef NTWOC_NtxBUFS
     84 #define NTWOC_NtxBUFS     40
     85 #endif
     86 #ifndef NTWOC_NrxBUFS
     87 #define NTWOC_NrxBUFS     20
     88 #endif
     89 
     90 #if __NetBSD_Version__ >= 104160000
     91 static	void ntwoc_pci_config_interrupts(device_t);
     92 #else
     93 #define	SCA_BASECLOCK	16000000
     94 #endif
     95 
     96 /*
     97  * Card specific config register location
     98  */
     99 #define PCI_CBMA_ASIC PCI_BAR(0)	/* Configuration Base Memory Address */
    100 #define PCI_CBMA_SCA PCI_BAR(2)
    101 
    102 struct ntwoc_pci_softc {
    103 	/* Generic device stuff */
    104 	device_t sc_dev;		/* Common to all devices */
    105 
    106 	/* PCI chipset glue */
    107 	pci_intr_handle_t *sc_ih;	/* Interrupt handler */
    108 	pci_chipset_tag_t sc_sr;	/* PCI chipset handle */
    109 
    110 	bus_space_tag_t sc_asic_iot;	/* space cookie (for ASIC) */
    111 	bus_space_handle_t sc_asic_ioh;	/* bus space handle (for ASIC) */
    112 
    113 	struct sca_softc sc_sca;	/* the SCA itself */
    114 };
    115 
    116 static  int ntwoc_pci_match(device_t, cfdata_t, void *);
    117 static  void ntwoc_pci_attach(device_t, device_t, void *);
    118 
    119 static	int ntwoc_pci_alloc_dma(struct sca_softc *);
    120 static	void ntwoc_pci_clock_callback(void *, int, int);
    121 static	void ntwoc_pci_dtr_callback(void *, int, int);
    122 static	void ntwoc_pci_get_clock(struct sca_port *, u_int8_t, u_int8_t,
    123     u_int8_t, u_int8_t);
    124 static	int ntwoc_pci_intr(void *);
    125 static	void ntwoc_pci_setup_dma(struct sca_softc *);
    126 static	void ntwoc_pci_shutdown(void *sc);
    127 
    128 CFATTACH_DECL_NEW(ntwoc_pci, sizeof(struct ntwoc_pci_softc),
    129     ntwoc_pci_match, ntwoc_pci_attach, NULL, NULL);
    130 
    131 /*
    132  * Names for daughter card types.  These match the NTWOC_DB_* defines.
    133  */
    134 const char *ntwoc_pci_db_names[] = {
    135 	"V.35", "Unknown 0x01", "Test", "Unknown 0x03",
    136 	"RS232", "Unknown 0x05", "RS422", "None"
    137 };
    138 
    139 /*
    140  * At least one implementation uses a somewhat strange register address
    141  * mapping.  If a card doesn't, define this to be a pass-through
    142  * macro.  (The ntwo driver needs this...)
    143  */
    144 #define SCA_REG(y)  (((y) & 0x0002) ? (((y) & 0x00fd) + 0x100) : (y))
    145 
    146 /*
    147  * functions that read and write to the sca registers
    148  */
    149 static void
    150 ntwoc_pci_sca_write_1(struct sca_softc *sc, u_int reg, u_int8_t val)
    151 {
    152 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, SCA_REG(reg), val);
    153 }
    154 
    155 static void
    156 ntwoc_pci_sca_write_2(struct sca_softc *sc, u_int reg, u_int16_t val)
    157 {
    158 	bus_space_write_2(sc->sc_iot, sc->sc_ioh, SCA_REG(reg), val);
    159 }
    160 
    161 static u_int8_t
    162 ntwoc_pci_sca_read_1(struct sca_softc *sc, u_int reg)
    163 {
    164 	return
    165 	    bus_space_read_1(sc->sc_iot, sc->sc_ioh, SCA_REG(reg));
    166 }
    167 
    168 static u_int16_t
    169 ntwoc_pci_sca_read_2(struct sca_softc *sc, u_int reg)
    170 {
    171 	return
    172 	    bus_space_read_2(sc->sc_iot, sc->sc_ioh, SCA_REG(reg));
    173 }
    174 
    175 
    176 
    177 static int
    178 ntwoc_pci_match(device_t parent, cfdata_t match, void *aux)
    179 {
    180 	struct pci_attach_args *pa = (struct pci_attach_args *)aux;
    181 
    182 	if ((PCI_VENDOR(pa->pa_id) == PCI_VENDOR_RISCOM)
    183 	    && (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_RISCOM_N2))
    184 		return 1;
    185 
    186 	return 0;
    187 }
    188 
    189 static void
    190 ntwoc_pci_attach(device_t parent, device_t self, void *aux)
    191 {
    192 	struct ntwoc_pci_softc *sc = device_private(self);
    193 	struct pci_attach_args *pa = aux;
    194 	struct sca_softc *sca = &sc->sc_sca;
    195 	pci_intr_handle_t ih;
    196 	const char *intrstr;
    197 	pcireg_t csr;
    198 	u_int8_t tmc, rdiv, tdiv;
    199 	u_int16_t frontend_cr;
    200 	u_int16_t db0, db1;
    201 	u_int32_t flags;
    202 	u_int numports;
    203 
    204 	printf(": N2 Serial Interface\n");
    205 	flags = device_cfdata(self)->cf_flags;
    206 
    207 	/*
    208 	 * Map in the ASIC configuration space
    209 	 */
    210 	if (pci_mapreg_map(pa, PCI_CBMA_ASIC, PCI_MAPREG_TYPE_MEM, 0,
    211 			   &sc->sc_asic_iot, &sc->sc_asic_ioh, NULL, NULL)) {
    212 		aprint_error_dev(self, "Can't map register space (ASIC)\n");
    213 		return;
    214 	}
    215 	/*
    216 	 * Map in the serial controller configuration space
    217 	 */
    218 	if (pci_mapreg_map(pa, PCI_CBMA_SCA, PCI_MAPREG_TYPE_MEM, 0,
    219 			   &sca->sc_iot, &sca->sc_ioh, NULL, NULL)) {
    220 		aprint_error_dev(self, "Can't map register space (SCA)\n");
    221 		return;
    222 	}
    223 
    224 	/*
    225 	 * Enable the card
    226 	 */
    227 	csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
    228 	pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, csr);
    229 
    230 	/*
    231 	 * Map and establish the interrupt
    232 	 */
    233 	if (pci_intr_map(pa, &ih)) {
    234 		aprint_error_dev(self, "couldn't map interrupt\n");
    235 		return;
    236 	}
    237 	intrstr = pci_intr_string(pa->pa_pc, ih);
    238 	sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_NET, ntwoc_pci_intr,
    239 	    sc);
    240 	if (sc->sc_ih == NULL) {
    241 		aprint_error_dev(self, "couldn't establish interrupt");
    242 		if (intrstr != NULL)
    243 			aprint_error(" at %s", intrstr);
    244 		aprint_error("\n");
    245 		return;
    246 	}
    247 	aprint_normal_dev(self, "interrupting at %s\n", intrstr);
    248 
    249 	/*
    250 	 * Perform total black magic.  This is not only extremely
    251 	 * disgusting, but it should be explained a lot more in the
    252 	 * card's documentation.
    253 	 *
    254 	 * From what I gather, this does nothing more than configure the
    255 	 * PCI to ISA translator ASIC the N2pci card uses.
    256 	 *
    257 	 * From the FreeBSD driver:
    258 	 * offset
    259 	 *  0x00 - Map Range    - Mem-mapped to locate anywhere
    260 	 *  0x04 - Re-Map       - PCI address decode enable
    261 	 *  0x18 - Bus Region   - 32-bit bus, ready enable
    262 	 *  0x1c - Master Range - include all 16 MB
    263 	 *  0x20 - Master RAM   - Map SCA Base at 0
    264 	 *  0x28 - Master Remap - direct master memory enable
    265 	 *  0x68 - Interrupt    - Enable interrupt (0 to disable)
    266 	 */
    267 	bus_space_write_4(sc->sc_asic_iot, sc->sc_asic_ioh,
    268 			  0x00, 0xfffff000);
    269 	bus_space_write_4(sc->sc_asic_iot, sc->sc_asic_ioh,
    270 			  0x04, 1);
    271 	bus_space_write_4(sc->sc_asic_iot, sc->sc_asic_ioh,
    272 			  0x18, 0x40030043);
    273 	bus_space_write_4(sc->sc_asic_iot, sc->sc_asic_ioh,
    274 			  0x1c, 0xff000000);
    275 	bus_space_write_4(sc->sc_asic_iot, sc->sc_asic_ioh,
    276 			  0x20, 0);
    277 	bus_space_write_4(sc->sc_asic_iot, sc->sc_asic_ioh,
    278 			  0x28, 0xe9);
    279 	bus_space_write_4(sc->sc_asic_iot, sc->sc_asic_ioh,
    280 			  0x68, 0x10900);
    281 
    282 	/*
    283 	 * pass the DMA tag to the SCA
    284 	 */
    285 	sca->sc_usedma = 1;
    286 	sca->scu_dmat = pa->pa_dmat;
    287 
    288 	/*
    289 	 * Read the configuration information off the daughter card.
    290 	 */
    291 	frontend_cr = bus_space_read_2(sca->sc_iot, sca->sc_ioh, NTWOC_FECR);
    292 	NTWO_DPRINTF(("%s: frontend_cr = 0x%04x\n",
    293 		      device_xname(self), frontend_cr));
    294 
    295 	db0 = (frontend_cr & NTWOC_FECR_ID0) >> NTWOC_FECR_ID0_SHIFT;
    296 	db1 = (frontend_cr & NTWOC_FECR_ID1) >> NTWOC_FECR_ID1_SHIFT;
    297 
    298 	/*
    299 	 * Port 1 HAS to be present.  If it isn't, don't attach anything.
    300 	 */
    301 	if (db0 == NTWOC_FE_ID_NONE) {
    302 		printf("%s: no ports available\n", device_xname(self));
    303 		return;
    304 	}
    305 
    306 	/*
    307 	 * Port 1 is present.  Now, check to see if port 2 is also
    308 	 * present.
    309 	 */
    310 	numports = 1;
    311 	if (db1 != NTWOC_FE_ID_NONE)
    312 		numports++;
    313 
    314 	printf("%s: %d port%s\n", device_xname(self), numports,
    315 	       (numports > 1 ? "s" : ""));
    316 	printf("%s: port 0 interface card: %s\n", device_xname(self),
    317 	       ntwoc_pci_db_names[db0]);
    318 	if (numports > 1)
    319 		printf("%s: port 1 interface card: %s\n", device_xname(self),
    320 		       ntwoc_pci_db_names[db1]);
    321 
    322 	/*
    323 	 * enable the RS422 tristate transmit
    324 	 * diable clock output (use receiver clock for both)
    325 	 */
    326 	frontend_cr |= (NTWOC_FECR_TE0 | NTWOC_FECR_TE1);
    327 	frontend_cr &= ~(NTWOC_FECR_ETC0 | NTWOC_FECR_ETC1);
    328 	bus_space_write_2(sc->sc_sca.sc_iot, sc->sc_sca.sc_ioh,
    329 			  NTWOC_FECR, frontend_cr);
    330 
    331 	/*
    332 	 * initialize the SCA.  This will allocate DMAable memory based
    333 	 * on the number of ports we passed in, the size of each
    334 	 * buffer, and the number of buffers per port.
    335 	 */
    336 	sca->sc_parent = self;
    337 	sca->sc_read_1 = ntwoc_pci_sca_read_1;
    338 	sca->sc_read_2 = ntwoc_pci_sca_read_2;
    339 	sca->sc_write_1 = ntwoc_pci_sca_write_1;
    340 	sca->sc_write_2 = ntwoc_pci_sca_write_2;
    341 	sca->sc_dtr_callback = ntwoc_pci_dtr_callback;
    342 	sca->sc_clock_callback = ntwoc_pci_clock_callback;
    343 	sca->sc_aux = sc;
    344 	sca->sc_numports = numports;
    345 
    346 	/*
    347 	 * get clock information from user
    348 	 */
    349 	rdiv = (flags & NTWOC_FLAGS_RXDIV_MASK) >> NTWOC_FLAGS_RXDIV_SHIFT;
    350 	if (rdiv > 9)
    351 		panic("bad rx divisor in flags");
    352 
    353 	tdiv = (flags & NTWOC_FLAGS_TXDIV_MASK) >> NTWOC_FLAGS_TXDIV_SHIFT;
    354 	if (tdiv > 9)
    355 		panic("bad tx divisor in flags");
    356 	tmc = (flags & NTWOC_FLAGS_TMC_MASK) >> NTWOC_FLAGS_TMC_SHIFT;
    357 
    358 	ntwoc_pci_get_clock(&sca->sc_ports[0], flags & NTWOC_FLAGS_CLK0_MASK,
    359 	    tmc, rdiv, tdiv);
    360 	if (sca->sc_numports > 1)
    361 		ntwoc_pci_get_clock(&sca->sc_ports[1],
    362 		    (flags & NTWOC_FLAGS_CLK1_MASK) >> NTWOC_FLAGS_CLK1_SHIFT,
    363 		    tmc, rdiv, tdiv);
    364 
    365 	/* allocate DMA'able memory for card to use */
    366 	ntwoc_pci_alloc_dma(sca);
    367 	ntwoc_pci_setup_dma(sca);
    368 
    369 	sca_init(sca);
    370 
    371 	/*
    372 	 * always initialize port 0, since we have to have found it to
    373 	 * get this far.  If we have two ports, attach the second
    374 	 * as well.
    375 	 */
    376 	sca_port_attach(sca, 0);
    377 	if (numports == 2)
    378 		sca_port_attach(sca, 1);
    379 
    380 	/*
    381 	 * Add shutdown hook so that DMA is disabled prior to reboot. Not
    382 	 * doing do could allow DMA to corrupt kernel memory during the
    383 	 * reboot before the driver initializes.
    384 	 */
    385 	shutdownhook_establish(ntwoc_pci_shutdown, sc);
    386 
    387 #if __NetBSD_Version__ >= 104160000
    388 	/*
    389 	 * defer getting the base clock until interrupts are enabled
    390 	 * (and thus we have microtime())
    391 	 */
    392 	config_interrupts(self, ntwoc_pci_config_interrupts);
    393 #else
    394 	sca->sc_baseclock = SCA_BASECLOCK;
    395 	sca_print_clock_info(&sc->sc_sca);
    396 #endif
    397 }
    398 
    399 /*
    400  * extract the clock information for a port from the flags field
    401  */
    402 static void
    403 ntwoc_pci_get_clock(struct sca_port *scp, u_int8_t flags, u_int8_t tmc,
    404     u_int8_t rdiv, u_int8_t tdiv)
    405 {
    406 	scp->sp_eclock =
    407 	    (flags & NTWOC_FLAGS_ECLOCK_MASK) >> NTWOC_FLAGS_ECLOCK_SHIFT;
    408 	scp->sp_rxs = rdiv;
    409 	scp->sp_txs = tdiv;
    410 	scp->sp_tmc = tmc;
    411 
    412 	/* get rx source */
    413 	switch ((flags & NTWOC_FLAGS_RXS_MASK) >> NTWOC_FLAGS_RXS_SHIFT) {
    414 	case NTWOC_FLAGS_RXS_LINE:
    415 		scp->sp_rxs = 0;
    416 		break;
    417 	case NTWOC_FLAGS_RXS_LINE_SN:
    418 		scp->sp_rxs |= SCA_RXS_CLK_LINE_SN;
    419 		break;
    420 	case NTWOC_FLAGS_RXS_INTERNAL:
    421 		scp->sp_rxs |= SCA_RXS_CLK_INTERNAL;
    422 		break;
    423 	case NTWOC_FLAGS_RXS_ADPLL_OUT:
    424 		scp->sp_rxs |= SCA_RXS_CLK_ADPLL_OUT;
    425 		break;
    426 	case NTWOC_FLAGS_RXS_ADPLL_IN:
    427 		scp->sp_rxs |= SCA_RXS_CLK_ADPLL_IN;
    428 		break;
    429 	default:
    430 		panic("bad rx source in flags");
    431 	}
    432 
    433 	/* get tx source */
    434 	switch ((flags & NTWOC_FLAGS_TXS_MASK) >> NTWOC_FLAGS_TXS_SHIFT) {
    435 	case NTWOC_FLAGS_TXS_LINE:
    436 		scp->sp_txs = 0;
    437 		break;
    438 	case NTWOC_FLAGS_TXS_INTERNAL:
    439 		scp->sp_txs |= SCA_TXS_CLK_INTERNAL;
    440 		break;
    441 	case NTWOC_FLAGS_TXS_RXCLOCK:
    442 		scp->sp_txs |= SCA_TXS_CLK_RXCLK;
    443 		break;
    444 	default:
    445 		panic("bad rx source in flags");
    446 	}
    447 }
    448 
    449 
    450 static int
    451 ntwoc_pci_intr(void *arg)
    452 {
    453 	struct ntwoc_pci_softc *sc = (struct ntwoc_pci_softc *)arg;
    454 
    455 	return sca_hardintr(&sc->sc_sca);
    456 }
    457 
    458 /*
    459  * shut down interrupts and DMA, so we don't trash the kernel on warm
    460  * boot.  Also, lower DTR on each port and disable card interrupts.
    461  */
    462 static void
    463 ntwoc_pci_shutdown(void *aux)
    464 {
    465 	struct ntwoc_pci_softc *sc = aux;
    466 	u_int16_t fecr;
    467 
    468 	/*
    469 	 * shut down the SCA ports
    470 	 */
    471 	sca_shutdown(&sc->sc_sca);
    472 
    473 	/*
    474 	 * disable interrupts for the whole card.  Black magic, see comment
    475 	 * above.
    476 	 */
    477 	bus_space_write_4(sc->sc_asic_iot, sc->sc_asic_ioh,
    478 			  0x68, 0x10900);
    479 
    480 	/*
    481 	 * lower DTR on both ports
    482 	 */
    483 	fecr = bus_space_read_2(sc->sc_sca.sc_iot,
    484 				sc->sc_sca.sc_ioh, NTWOC_FECR);
    485 	fecr |= (NTWOC_FECR_DTR0 | NTWOC_FECR_DTR1);
    486 	bus_space_write_2(sc->sc_sca.sc_iot, sc->sc_sca.sc_ioh,
    487 			  NTWOC_FECR, fecr);
    488 }
    489 
    490 static void
    491 ntwoc_pci_dtr_callback(void *aux, int port, int state)
    492 {
    493 	struct ntwoc_pci_softc *sc = aux;
    494 	u_int16_t fecr;
    495 
    496 	fecr = bus_space_read_2(sc->sc_sca.sc_iot,
    497 				sc->sc_sca.sc_ioh, NTWOC_FECR);
    498 
    499 	NTWO_DPRINTF(("dtr: port == %d, state == %d, old fecr:  0x%04x\n",
    500 		       port, state, fecr));
    501 
    502 	if (port == 0) {
    503 		if (state == 0)
    504 			fecr |= NTWOC_FECR_DTR0;
    505 		else
    506 			fecr &= ~NTWOC_FECR_DTR0;
    507 	} else {
    508 		if (state == 0)
    509 			fecr |= NTWOC_FECR_DTR1;
    510 		else
    511 			fecr &= ~NTWOC_FECR_DTR1;
    512 	}
    513 
    514 	NTWO_DPRINTF(("new fecr:  0x%04x\n", fecr));
    515 
    516 	bus_space_write_2(sc->sc_sca.sc_iot, sc->sc_sca.sc_ioh,
    517 			  NTWOC_FECR, fecr);
    518 }
    519 
    520 static void
    521 ntwoc_pci_clock_callback(void *aux, int port, int enable)
    522 {
    523 	struct ntwoc_pci_softc *sc = aux;
    524 	u_int16_t fecr;
    525 
    526 	fecr = bus_space_read_2(sc->sc_sca.sc_iot,
    527 				sc->sc_sca.sc_ioh, NTWOC_FECR);
    528 
    529 	NTWO_DPRINTF(("clk: port == %d, enable == %d, old fecr:  0x%04x\n",
    530 		       port, enable, fecr));
    531 
    532 	if (port == 0) {
    533 		if (enable)
    534 			fecr |= NTWOC_FECR_ETC0;
    535 		else
    536 			fecr &= ~NTWOC_FECR_ETC0;
    537 	} else {
    538 		if (enable)
    539 			fecr |= NTWOC_FECR_ETC1;
    540 		else
    541 			fecr &= ~NTWOC_FECR_ETC1;
    542 	}
    543 
    544 	NTWO_DPRINTF(("new fecr:  0x%04x\n", fecr));
    545 
    546 	bus_space_write_2(sc->sc_sca.sc_iot, sc->sc_sca.sc_ioh,
    547 			  NTWOC_FECR, fecr);
    548 }
    549 
    550 static int
    551 ntwoc_pci_alloc_dma(struct sca_softc *sc)
    552 {
    553 	u_int	allocsize;
    554 	int	err;
    555 	int	rsegs;
    556 	u_int	bpp;
    557 
    558 	/* first initialize the number of descriptors */
    559 	sc->sc_ports[0].sp_nrxdesc = NTWOC_NrxBUFS;
    560 	sc->sc_ports[0].sp_ntxdesc = NTWOC_NtxBUFS;
    561 	if (sc->sc_numports == 2) {
    562 		sc->sc_ports[1].sp_nrxdesc = NTWOC_NrxBUFS;
    563 		sc->sc_ports[1].sp_ntxdesc = NTWOC_NtxBUFS;
    564 	}
    565 
    566 	NTWO_DPRINTF(("sizeof sca_desc_t: %d bytes\n", sizeof (sca_desc_t)));
    567 
    568 	bpp = sc->sc_numports * (NTWOC_NtxBUFS + NTWOC_NrxBUFS);
    569 
    570 	allocsize = bpp * (SCA_BSIZE + sizeof (sca_desc_t));
    571 
    572 	/*
    573 	 * sanity checks:
    574 	 *
    575 	 * Check the total size of the data buffers, and so on.  The total
    576 	 * DMAable space needs to fit within a single 16M region, and the
    577 	 * descriptors need to fit within a 64K region.
    578 	 */
    579 	if (allocsize > 16 * 1024 * 1024)
    580 		return 1;
    581 	if (bpp * sizeof (sca_desc_t) > 64 * 1024)
    582 		return 1;
    583 
    584 	sc->scu_allocsize = allocsize;
    585 
    586 	/*
    587 	 * Allocate one huge chunk of memory.
    588 	 */
    589 	if (bus_dmamem_alloc(sc->scu_dmat,
    590 			     allocsize,
    591 			     SCA_DMA_ALIGNMENT,
    592 			     SCA_DMA_BOUNDARY,
    593 			     &sc->scu_seg, 1, &rsegs, BUS_DMA_NOWAIT) != 0) {
    594 		printf("Could not allocate DMA memory\n");
    595 		return 1;
    596 	}
    597 	NTWO_DPRINTF(("DMA memory allocated:  %d bytes\n", allocsize));
    598 
    599 	if (bus_dmamem_map(sc->scu_dmat, &sc->scu_seg, 1, allocsize,
    600 			   &sc->scu_dma_addr, BUS_DMA_NOWAIT) != 0) {
    601 		printf("Could not map DMA memory into kernel space\n");
    602 		return 1;
    603 	}
    604 	NTWO_DPRINTF(("DMA memory mapped\n"));
    605 
    606 	if (bus_dmamap_create(sc->scu_dmat, allocsize, 2,
    607 			      allocsize, SCA_DMA_BOUNDARY,
    608 			      BUS_DMA_NOWAIT, &sc->scu_dmam) != 0) {
    609 		printf("Could not create DMA map\n");
    610 		return 1;
    611 	}
    612 	NTWO_DPRINTF(("DMA map created\n"));
    613 
    614 	err = bus_dmamap_load(sc->scu_dmat, sc->scu_dmam, sc->scu_dma_addr,
    615 			      allocsize, NULL, BUS_DMA_NOWAIT);
    616 	if (err != 0) {
    617 		printf("Could not load DMA segment:  %d\n", err);
    618 		return 1;
    619 	}
    620 	NTWO_DPRINTF(("DMA map loaded\n"));
    621 
    622 	return 0;
    623 }
    624 
    625 /*
    626  * Take the memory allocated with sca_alloc_dma() and divide it among the
    627  * two ports.
    628  */
    629 static void
    630 ntwoc_pci_setup_dma(struct sca_softc *sc)
    631 {
    632 	sca_port_t *scp0, *scp1;
    633 	u_int8_t  *vaddr0;
    634 	u_int32_t paddr0;
    635 	u_long addroff;
    636 
    637 	/*
    638 	 * remember the physical address to 24 bits only, since the upper
    639 	 * 8 bits is programed into the device at a different layer.
    640 	 */
    641 	paddr0 = (sc->scu_dmam->dm_segs[0].ds_addr & 0x00ffffff);
    642 	vaddr0 = sc->scu_dma_addr;
    643 
    644 	/*
    645 	 * if we have only one port it gets the full range.  If we have
    646 	 * two we need to do a little magic to divide things up.
    647 	 *
    648 	 * The descriptors will all end up in the front of the area, while
    649 	 * the remainder of the buffer is used for transmit and receive
    650 	 * data.
    651 	 *
    652 	 * -------------------- start of memory
    653 	 *    tx desc port 0
    654 	 *    rx desc port 0
    655 	 *    tx desc port 1
    656 	 *    rx desc port 1
    657 	 *    tx buffer port 0
    658 	 *    rx buffer port 0
    659 	 *    tx buffer port 1
    660 	 *    rx buffer port 1
    661 	 * -------------------- end of memory
    662 	 */
    663 	scp0 = &sc->sc_ports[0];
    664 	scp1 = &sc->sc_ports[1];
    665 
    666 	scp0->sp_txdesc_p = paddr0;
    667 	scp0->sp_txdesc = (sca_desc_t *)vaddr0;
    668 	addroff = sizeof(sca_desc_t) * scp0->sp_ntxdesc;
    669 
    670 	/*
    671 	 * point to the range following the tx descriptors, and
    672 	 * set the rx descriptors there.
    673 	 */
    674 	scp0->sp_rxdesc_p = paddr0 + addroff;
    675 	scp0->sp_rxdesc = (sca_desc_t *)(vaddr0 + addroff);
    676 	addroff += sizeof(sca_desc_t) * scp0->sp_nrxdesc;
    677 
    678 	if (sc->sc_numports == 2) {
    679 		scp1->sp_txdesc_p = paddr0 + addroff;
    680 		scp1->sp_txdesc = (sca_desc_t *)(vaddr0 + addroff);
    681 		addroff += sizeof(sca_desc_t) * scp1->sp_ntxdesc;
    682 
    683 		scp1->sp_rxdesc_p = paddr0 + addroff;
    684 		scp1->sp_rxdesc = (sca_desc_t *)(vaddr0 + addroff);
    685 		addroff += sizeof(sca_desc_t) * scp1->sp_nrxdesc;
    686 	}
    687 
    688 	/*
    689 	 * point to the memory following the descriptors, and set the
    690 	 * transmit buffer there.
    691 	 */
    692 	scp0->sp_txbuf_p = paddr0 + addroff;
    693 	scp0->sp_txbuf = vaddr0 + addroff;
    694 	addroff += SCA_BSIZE * scp0->sp_ntxdesc;
    695 
    696 	/*
    697 	 * lastly, skip over the transmit buffer and set up pointers into
    698 	 * the receive buffer.
    699 	 */
    700 	scp0->sp_rxbuf_p = paddr0 + addroff;
    701 	scp0->sp_rxbuf = vaddr0 + addroff;
    702 	addroff += SCA_BSIZE * scp0->sp_nrxdesc;
    703 
    704 	if (sc->sc_numports == 2) {
    705 		scp1->sp_txbuf_p = paddr0 + addroff;
    706 		scp1->sp_txbuf = vaddr0 + addroff;
    707 		addroff += SCA_BSIZE * scp1->sp_ntxdesc;
    708 
    709 		scp1->sp_rxbuf_p = paddr0 + addroff;
    710 		scp1->sp_rxbuf = vaddr0 + addroff;
    711 		addroff += SCA_BSIZE * scp1->sp_nrxdesc;
    712 	}
    713 
    714 	/*
    715 	 * as a consistancy check, addroff should be equal to the allocation
    716 	 * size.
    717 	 */
    718 	if (sc->scu_allocsize != addroff)
    719 		printf("ERROR:  scu_allocsize != addroff: %lu != %lu\n",
    720 		       (u_long)sc->scu_allocsize, addroff);
    721 }
    722 
    723 #if __NetBSD_Version__ >= 104160000
    724 static void
    725 ntwoc_pci_config_interrupts(device_t self)
    726 {
    727 	struct ntwoc_pci_softc *sc;
    728 
    729 	sc = device_private(self);
    730 	sca_get_base_clock(&sc->sc_sca);
    731 	sca_print_clock_info(&sc->sc_sca);
    732 }
    733 #endif
    734