if_ntwoc_pcireg.h revision 1.1 1 1.1 explorer /* $Id: if_ntwoc_pcireg.h,v 1.1 1998/07/26 03:28:28 explorer Exp $ */
2 1.1 explorer
3 1.1 explorer /*
4 1.1 explorer * Copyright (c) 1998 Vixie Enterprises
5 1.1 explorer * All rights reserved.
6 1.1 explorer *
7 1.1 explorer * Redistribution and use in source and binary forms, with or without
8 1.1 explorer * modification, are permitted provided that the following conditions
9 1.1 explorer * are met:
10 1.1 explorer *
11 1.1 explorer * 1. Redistributions of source code must retain the above copyright
12 1.1 explorer * notice, this list of conditions and the following disclaimer.
13 1.1 explorer * 2. Redistributions in binary form must reproduce the above copyright
14 1.1 explorer * notice, this list of conditions and the following disclaimer in the
15 1.1 explorer * documentation and/or other materials provided with the distribution.
16 1.1 explorer * 3. Neither the name of Vixie Enterprises nor the names
17 1.1 explorer * of its contributors may be used to endorse or promote products derived
18 1.1 explorer * from this software without specific prior written permission.
19 1.1 explorer *
20 1.1 explorer * THIS SOFTWARE IS PROVIDED BY VIXIE ENTERPRISES AND
21 1.1 explorer * CONTRIBUTORS ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
22 1.1 explorer * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
23 1.1 explorer * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
24 1.1 explorer * DISCLAIMED. IN NO EVENT SHALL VIXIE ENTERPRISES OR
25 1.1 explorer * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 1.1 explorer * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 1.1 explorer * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
28 1.1 explorer * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
29 1.1 explorer * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 1.1 explorer * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
31 1.1 explorer * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 1.1 explorer * SUCH DAMAGE.
33 1.1 explorer *
34 1.1 explorer * This software has been written for Vixie Enterprises by Michael Graff
35 1.1 explorer * <explorer (at) flame.org>. To learn more about Vixie Enterprises, see
36 1.1 explorer * ``http://www.vix.com''.
37 1.1 explorer */
38 1.1 explorer
39 1.1 explorer #ifndef _IF_NTWOC_PCIREG_H_
40 1.1 explorer #define _IF_NTWOC_PCIREG_H_
41 1.1 explorer
42 1.1 explorer /*
43 1.1 explorer * ASIC register offsets
44 1.1 explorer */
45 1.1 explorer
46 1.1 explorer /*
47 1.1 explorer * This register is in the SCA namespace, but is NOT really an SCA register.
48 1.1 explorer * It contains information about the daughter cards, and provides a method
49 1.1 explorer * to configure them.
50 1.1 explorer */
51 1.1 explorer #define NTWOC_FECR 0x200
52 1.1 explorer
53 1.1 explorer /*
54 1.1 explorer * definition of the NTWO_FECR register
55 1.1 explorer */
56 1.1 explorer #define NTWOC_FECR_ID0 0x0e00 /* mask of daughter card on port 0 */
57 1.1 explorer #define NTWOC_FECR_ID0_SHIFT 9
58 1.1 explorer #define NTWOC_FECR_ID1 0xe000 /* mask of daughter card on port 1 */
59 1.1 explorer #define NTWOC_FECR_ID1_SHIFT 13
60 1.1 explorer
61 1.1 explorer #define NTWOC_FECR_DTR1 0x0080 /* DTR output for port 1 */
62 1.1 explorer #define NTWOC_FECR_DTR0 0x0040 /* DTR output for port 0 */
63 1.1 explorer #define NTWOC_FECR_DSR1 0x1000 /* DSR input for port 1 */
64 1.1 explorer #define NTWOC_FECR_DSR0 0x0100 /* DSR input for port 0 */
65 1.1 explorer #define NTWOC_FECR_TE1 0x0008 /* tristate enable port 1 */
66 1.1 explorer #define NTWOC_FECR_TE0 0x0004 /* tristate enable port 0 */
67 1.1 explorer #define NTWOC_FECR_ETC1 0x0002 /* output clock port 1 */
68 1.1 explorer #define NTWOC_FECR_ETC0 0x0001 /* output clock port 0 */
69 1.1 explorer
70 1.1 explorer /*
71 1.1 explorer * Daughter card for port.
72 1.1 explorer */
73 1.1 explorer #define NTWOC_FE_ID_V35 0x00
74 1.1 explorer #define NTWOC_FE_ID_X01 0x01 /* unused? */
75 1.1 explorer #define NTWOC_FE_ID_TEST 0x02
76 1.1 explorer #define NTWOC_FE_ID_X03 0x03 /* unused? */
77 1.1 explorer #define NTWOC_FE_ID_RS232 0x04
78 1.1 explorer #define NTWOC_FE_ID_X05 0x05 /* was hssi, now unused? */
79 1.1 explorer #define NTWOC_FE_ID_RS422 0x06
80 1.1 explorer #define NTWOC_FE_ID_NONE 0x07 /* empty, no card present */
81 1.1 explorer
82 1.1 explorer /*
83 1.1 explorer * ASIC Control defininitions
84 1.1 explorer */
85 1.1 explorer
86 1.1 explorer /* Front End (Modem,etc) Control Register */
87 1.1 explorer
88 1.1 explorer #define ASIC_MODEM 0x200 /* ASIC modem control register Offset */
89 1.1 explorer
90 1.1 explorer /* ASIC front end control register bits */
91 1.1 explorer #define ASIC_DSR1 0x1000 /* DSR signal input port 1 */
92 1.1 explorer #define ASIC_DSR0 0x100 /* DSR signal input port 0 */
93 1.1 explorer #define ASIC_DTR1 0x80 /* DTR signal output port 1 */
94 1.1 explorer #define ASIC_DTR0 0x40 /* DTR signal output port 0 */
95 1.1 explorer #define ASIC_TE1 0x8 /* RS422 TX,enable port 1 */
96 1.1 explorer #define ASIC_TE0 0x4 /* RS422 TX,enable port 0 */
97 1.1 explorer #define ASIC_ETC1 0x2 /* ETC Clock out port 1 */
98 1.1 explorer #define ASIC_ETC0 0x1 /* ETC Clock out port 0 */
99 1.1 explorer
100 1.1 explorer #endif /* _IF_NTWOC_PCIREG_H_ */
101