if_ral_pci.c revision 1.18.2.2
1 /* $NetBSD: if_ral_pci.c,v 1.18.2.2 2014/05/22 11:40:25 yamt Exp $ */ 2 /* $OpenBSD: if_ral_pci.c,v 1.6 2006/01/09 20:03:43 damien Exp $ */ 3 4 /*- 5 * Copyright (c) 2005, 2006 6 * Damien Bergamini <damien.bergamini (at) free.fr> 7 * 8 * Permission to use, copy, modify, and distribute this software for any 9 * purpose with or without fee is hereby granted, provided that the above 10 * copyright notice and this permission notice appear in all copies. 11 * 12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 13 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 14 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 15 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 19 */ 20 21 /* 22 * PCI front-end for the Ralink RT2560/RT2561/RT2561S/RT2661 driver. 23 */ 24 #include <sys/cdefs.h> 25 __KERNEL_RCSID(0, "$NetBSD: if_ral_pci.c,v 1.18.2.2 2014/05/22 11:40:25 yamt Exp $"); 26 27 28 #include <sys/param.h> 29 #include <sys/sockio.h> 30 #include <sys/mbuf.h> 31 #include <sys/kernel.h> 32 #include <sys/socket.h> 33 #include <sys/systm.h> 34 #include <sys/malloc.h> 35 #include <sys/device.h> 36 37 #include <sys/bus.h> 38 #include <sys/intr.h> 39 40 #include <net/if.h> 41 #include <net/if_dl.h> 42 #include <net/if_media.h> 43 #include <net/if_ether.h> 44 45 #include <netinet/in.h> 46 47 #include <net80211/ieee80211_var.h> 48 #include <net80211/ieee80211_amrr.h> 49 #include <net80211/ieee80211_rssadapt.h> 50 #include <net80211/ieee80211_radiotap.h> 51 52 #include <dev/ic/rt2560var.h> 53 #include <dev/ic/rt2661var.h> 54 55 #include <dev/pci/pcireg.h> 56 #include <dev/pci/pcivar.h> 57 #include <dev/pci/pcidevs.h> 58 59 static struct ral_opns { 60 int (*attach)(void *, int); 61 int (*detach)(void *); 62 int (*intr)(void *); 63 64 } ral_rt2560_opns = { 65 rt2560_attach, 66 rt2560_detach, 67 rt2560_intr 68 69 }, ral_rt2661_opns = { 70 rt2661_attach, 71 rt2661_detach, 72 rt2661_intr 73 }; 74 75 struct ral_pci_softc { 76 union { 77 struct rt2560_softc sc_rt2560; 78 struct rt2661_softc sc_rt2661; 79 } u; 80 #define sc_sc u.sc_rt2560 81 82 /* PCI specific goo */ 83 struct ral_opns *sc_opns; 84 pci_chipset_tag_t sc_pc; 85 void *sc_ih; 86 bus_size_t sc_mapsize; 87 }; 88 89 /* Base Address Register */ 90 #define RAL_PCI_BAR0 PCI_BAR(0) 91 92 int ral_pci_match(device_t, cfdata_t, void *); 93 void ral_pci_attach(device_t, device_t, void *); 94 int ral_pci_detach(device_t, int); 95 96 CFATTACH_DECL_NEW(ral_pci, sizeof (struct ral_pci_softc), 97 ral_pci_match, ral_pci_attach, ral_pci_detach, NULL); 98 99 int 100 ral_pci_match(device_t parent, cfdata_t cfdata, 101 void *aux) 102 { 103 struct pci_attach_args *pa = aux; 104 105 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_RALINK) { 106 switch (PCI_PRODUCT(pa->pa_id)) { 107 case PCI_PRODUCT_RALINK_RT2560: 108 case PCI_PRODUCT_RALINK_RT2561: 109 case PCI_PRODUCT_RALINK_RT2561S: 110 case PCI_PRODUCT_RALINK_RT2661: 111 return 1; 112 default: 113 return 0; 114 } 115 } 116 117 return 0; 118 } 119 120 void 121 ral_pci_attach(device_t parent, device_t self, void *aux) 122 { 123 struct ral_pci_softc *psc = device_private(self); 124 struct rt2560_softc *sc = &psc->sc_sc; 125 const struct pci_attach_args *pa = aux; 126 const char *intrstr; 127 bus_addr_t base; 128 pci_intr_handle_t ih; 129 pcireg_t reg; 130 int error; 131 char intrbuf[PCI_INTRSTR_LEN]; 132 133 pci_aprint_devinfo(pa, NULL); 134 135 psc->sc_opns = (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_RALINK_RT2560) ? 136 &ral_rt2560_opns : &ral_rt2661_opns; 137 138 sc->sc_dev = self; 139 sc->sc_dmat = pa->pa_dmat; 140 psc->sc_pc = pa->pa_pc; 141 142 /* enable the appropriate bits in the PCI CSR */ 143 reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 144 reg |= PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_MEM_ENABLE; 145 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, reg); 146 147 /* map control/status registers */ 148 error = pci_mapreg_map(pa, RAL_PCI_BAR0, PCI_MAPREG_TYPE_MEM | 149 PCI_MAPREG_MEM_TYPE_32BIT, 0, &sc->sc_st, &sc->sc_sh, &base, 150 &psc->sc_mapsize); 151 152 if (error != 0) { 153 aprint_error(": could not map memory space\n"); 154 return; 155 } 156 157 if (pci_intr_map(pa, &ih) != 0) { 158 aprint_error(": could not map interrupt\n"); 159 return; 160 } 161 162 intrstr = pci_intr_string(psc->sc_pc, ih, intrbuf, sizeof(intrbuf)); 163 psc->sc_ih = pci_intr_establish(psc->sc_pc, ih, IPL_NET, 164 psc->sc_opns->intr, sc); 165 166 if (psc->sc_ih == NULL) { 167 aprint_error(": could not establish interrupt"); 168 if (intrstr != NULL) 169 aprint_error(" at %s", intrstr); 170 aprint_error("\n"); 171 return; 172 } 173 aprint_normal_dev(sc->sc_dev, "interrupting at %s\n", intrstr); 174 175 (*psc->sc_opns->attach)(sc, PCI_PRODUCT(pa->pa_id)); 176 } 177 178 int 179 ral_pci_detach(device_t self, int flags) 180 { 181 struct ral_pci_softc *psc = device_private(self); 182 struct rt2560_softc *sc = &psc->sc_sc; 183 184 (*psc->sc_opns->detach)(sc); 185 pci_intr_disestablish(psc->sc_pc, psc->sc_ih); 186 187 return 0; 188 } 189 190
Indexes created Sat Nov 01 05:10:12 GMT 2025