if_re_pci.c revision 1.28.6.2       1  1.28.6.2  dsl /*	$NetBSD: if_re_pci.c,v 1.28.6.2 2007/07/19 22:04:23 dsl Exp $	*/
      2  1.28.6.2  dsl 
      3  1.28.6.2  dsl /*
      4  1.28.6.2  dsl  * Copyright (c) 1997, 1998-2003
      5  1.28.6.2  dsl  *	Bill Paul <wpaul (at) windriver.com>.  All rights reserved.
      6  1.28.6.2  dsl  *
      7  1.28.6.2  dsl  * Redistribution and use in source and binary forms, with or without
      8  1.28.6.2  dsl  * modification, are permitted provided that the following conditions
      9  1.28.6.2  dsl  * are met:
     10  1.28.6.2  dsl  * 1. Redistributions of source code must retain the above copyright
     11  1.28.6.2  dsl  *    notice, this list of conditions and the following disclaimer.
     12  1.28.6.2  dsl  * 2. Redistributions in binary form must reproduce the above copyright
     13  1.28.6.2  dsl  *    notice, this list of conditions and the following disclaimer in the
     14  1.28.6.2  dsl  *    documentation and/or other materials provided with the distribution.
     15  1.28.6.2  dsl  * 3. All advertising materials mentioning features or use of this software
     16  1.28.6.2  dsl  *    must display the following acknowledgement:
     17  1.28.6.2  dsl  *	This product includes software developed by Bill Paul.
     18  1.28.6.2  dsl  * 4. Neither the name of the author nor the names of any co-contributors
     19  1.28.6.2  dsl  *    may be used to endorse or promote products derived from this software
     20  1.28.6.2  dsl  *    without specific prior written permission.
     21  1.28.6.2  dsl  *
     22  1.28.6.2  dsl  * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
     23  1.28.6.2  dsl  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     24  1.28.6.2  dsl  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     25  1.28.6.2  dsl  * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
     26  1.28.6.2  dsl  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     27  1.28.6.2  dsl  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     28  1.28.6.2  dsl  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     29  1.28.6.2  dsl  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     30  1.28.6.2  dsl  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     31  1.28.6.2  dsl  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
     32  1.28.6.2  dsl  * THE POSSIBILITY OF SUCH DAMAGE.
     33  1.28.6.2  dsl  */
     34  1.28.6.2  dsl 
     35  1.28.6.2  dsl /* $FreeBSD: /repoman/r/ncvs/src/sys/dev/re/if_re.c,v 1.20 2004/04/11 20:34:08 ru Exp $ */
     36  1.28.6.2  dsl 
     37  1.28.6.2  dsl /*
     38  1.28.6.2  dsl  * RealTek 8139C+/8169/8169S/8110S PCI NIC driver
     39  1.28.6.2  dsl  *
     40  1.28.6.2  dsl  * Written by Bill Paul <wpaul (at) windriver.com>
     41  1.28.6.2  dsl  * Senior Networking Software Engineer
     42  1.28.6.2  dsl  * Wind River Systems
     43  1.28.6.2  dsl  *
     44  1.28.6.2  dsl  * NetBSD bus-specific frontends for written by
     45  1.28.6.2  dsl  * Jonathan Stone <jonathan (at) netbsd.org>
     46  1.28.6.2  dsl  */
     47  1.28.6.2  dsl 
     48  1.28.6.2  dsl #include <sys/cdefs.h>
     49  1.28.6.2  dsl 
     50  1.28.6.2  dsl #include "bpfilter.h"
     51  1.28.6.2  dsl #include "vlan.h"
     52  1.28.6.2  dsl 
     53  1.28.6.2  dsl #include <sys/types.h>
     54  1.28.6.2  dsl 
     55  1.28.6.2  dsl #include <sys/param.h>
     56  1.28.6.2  dsl #include <sys/endian.h>
     57  1.28.6.2  dsl #include <sys/systm.h>
     58  1.28.6.2  dsl #include <sys/sockio.h>
     59  1.28.6.2  dsl #include <sys/mbuf.h>
     60  1.28.6.2  dsl #include <sys/malloc.h>
     61  1.28.6.2  dsl #include <sys/kernel.h>
     62  1.28.6.2  dsl #include <sys/socket.h>
     63  1.28.6.2  dsl #include <sys/device.h>
     64  1.28.6.2  dsl 
     65  1.28.6.2  dsl #include <net/if.h>
     66  1.28.6.2  dsl #include <net/if_arp.h>
     67  1.28.6.2  dsl #include <net/if_dl.h>
     68  1.28.6.2  dsl #include <net/if_ether.h>
     69  1.28.6.2  dsl #include <net/if_media.h>
     70  1.28.6.2  dsl #include <net/if_vlanvar.h>
     71  1.28.6.2  dsl 
     72  1.28.6.2  dsl #include <machine/bus.h>
     73  1.28.6.2  dsl 
     74  1.28.6.2  dsl #include <dev/mii/mii.h>
     75  1.28.6.2  dsl #include <dev/mii/miivar.h>
     76  1.28.6.2  dsl 
     77  1.28.6.2  dsl #include <dev/pci/pcireg.h>
     78  1.28.6.2  dsl #include <dev/pci/pcivar.h>
     79  1.28.6.2  dsl #include <dev/pci/pcidevs.h>
     80  1.28.6.2  dsl 
     81  1.28.6.2  dsl #include <dev/ic/rtl81x9reg.h>
     82  1.28.6.2  dsl #include <dev/ic/rtl81x9var.h>
     83  1.28.6.2  dsl #include <dev/ic/rtl8169var.h>
     84  1.28.6.2  dsl 
     85  1.28.6.2  dsl struct re_pci_softc {
     86  1.28.6.2  dsl 	struct rtk_softc sc_rtk;
     87  1.28.6.2  dsl 
     88  1.28.6.2  dsl 	void *sc_ih;
     89  1.28.6.2  dsl 	pci_chipset_tag_t sc_pc;
     90  1.28.6.2  dsl 	pcitag_t sc_pcitag;
     91  1.28.6.2  dsl };
     92  1.28.6.2  dsl 
     93  1.28.6.2  dsl static int	re_pci_match(struct device *, struct cfdata *, void *);
     94  1.28.6.2  dsl static void	re_pci_attach(struct device *, struct device *, void *);
     95  1.28.6.2  dsl 
     96  1.28.6.2  dsl /*
     97  1.28.6.2  dsl  * Various supported device vendors/types and their names.
     98  1.28.6.2  dsl  */
     99  1.28.6.2  dsl static const struct rtk_type re_devs[] = {
    100  1.28.6.2  dsl 	{ PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8139,
    101  1.28.6.2  dsl 	    RTK_8139CPLUS,
    102  1.28.6.2  dsl 	    "RealTek 8139C+ 10/100BaseTX" },
    103  1.28.6.2  dsl 	{ PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8101E,
    104  1.28.6.2  dsl 	    RTK_8101E,
    105  1.28.6.2  dsl 	    "RealTek 8100E/8101E PCIe 10/100BaseTX" },
    106  1.28.6.2  dsl 	{ PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8168,
    107  1.28.6.2  dsl 	    RTK_8168,
    108  1.28.6.2  dsl 	    "RealTek 8168B/8111B PCIe Gigabit Ethernet" },
    109  1.28.6.2  dsl 	{ PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8169,
    110  1.28.6.2  dsl 	    RTK_8169,
    111  1.28.6.2  dsl 	    "RealTek 8169/8110 Gigabit Ethernet" },
    112  1.28.6.2  dsl 	{ PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8169SC,
    113  1.28.6.2  dsl 	    RTK_8169,
    114  1.28.6.2  dsl 	    "RealTek 8169SC/8110SC Single-chip Gigabit Ethernet" },
    115  1.28.6.2  dsl 	{ PCI_VENDOR_COREGA, PCI_PRODUCT_COREGA_LAPCIGT,
    116  1.28.6.2  dsl 	    RTK_8169,
    117  1.28.6.2  dsl 	    "Corega CG-LAPCIGT Gigabit Ethernet" },
    118  1.28.6.2  dsl 	{ PCI_VENDOR_DLINK, PCI_PRODUCT_DLINK_DGE528T,
    119  1.28.6.2  dsl 	    RTK_8169,
    120  1.28.6.2  dsl 	    "D-Link DGE-528T Gigabit Ethernet" },
    121  1.28.6.2  dsl 	{ PCI_VENDOR_USR2, PCI_PRODUCT_USR2_USR997902,
    122  1.28.6.2  dsl 	    RTK_8169,
    123  1.28.6.2  dsl 	    "US Robotics (3Com) USR997902 Gigabit Ethernet" },
    124  1.28.6.2  dsl 	{ PCI_VENDOR_LINKSYS, PCI_PRODUCT_LINKSYS_EG1032,
    125  1.28.6.2  dsl 	    RTK_8169,
    126  1.28.6.2  dsl 	    "Linksys EG1032 rev. 3 Gigabit Ethernet" },
    127  1.28.6.2  dsl 	{ 0, 0, 0, NULL }
    128  1.28.6.2  dsl };
    129  1.28.6.2  dsl 
    130  1.28.6.2  dsl #define RE_LINKSYS_EG1032_SUBID	0x00241737
    131  1.28.6.2  dsl 
    132  1.28.6.2  dsl CFATTACH_DECL(re_pci, sizeof(struct re_pci_softc), re_pci_match, re_pci_attach,
    133  1.28.6.2  dsl 	      NULL, NULL);
    134  1.28.6.2  dsl 
    135  1.28.6.2  dsl /*
    136  1.28.6.2  dsl  * Probe for a RealTek 8139C+/8169/8110 chip. Check the PCI vendor and device
    137  1.28.6.2  dsl  * IDs against our list and return a device name if we find a match.
    138  1.28.6.2  dsl  */
    139  1.28.6.2  dsl static int
    140  1.28.6.2  dsl re_pci_match(struct device *parent, struct cfdata *match, void *aux)
    141  1.28.6.2  dsl {
    142  1.28.6.2  dsl 	const struct rtk_type	*t;
    143  1.28.6.2  dsl 	struct pci_attach_args	*pa = aux;
    144  1.28.6.2  dsl 	pcireg_t subid;
    145  1.28.6.2  dsl 
    146  1.28.6.2  dsl 	subid = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
    147  1.28.6.2  dsl 
    148  1.28.6.2  dsl 	/* special-case Linksys EG1032, since rev 2 uses sk(4) */
    149  1.28.6.2  dsl 	if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_LINKSYS &&
    150  1.28.6.2  dsl 	    PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_LINKSYS_EG1032) {
    151  1.28.6.2  dsl 		if (subid != RE_LINKSYS_EG1032_SUBID)
    152  1.28.6.2  dsl 			return 0;
    153  1.28.6.2  dsl 	}
    154  1.28.6.2  dsl 	/* Don't match 8139 other than C-PLUS */
    155  1.28.6.2  dsl 	if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_REALTEK &&
    156  1.28.6.2  dsl 	    PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_REALTEK_RT8139) {
    157  1.28.6.2  dsl 		if (PCI_REVISION(pa->pa_class) != 0x20)
    158  1.28.6.2  dsl 			return 0;
    159  1.28.6.2  dsl 	}
    160  1.28.6.2  dsl 
    161  1.28.6.2  dsl 	t = re_devs;
    162  1.28.6.2  dsl 
    163  1.28.6.2  dsl 	while (t->rtk_name != NULL) {
    164  1.28.6.2  dsl 		if ((PCI_VENDOR(pa->pa_id) == t->rtk_vid) &&
    165  1.28.6.2  dsl 		    (PCI_PRODUCT(pa->pa_id) == t->rtk_did)) {
    166  1.28.6.2  dsl 			return 2;	/* defect rtk(4) */
    167  1.28.6.2  dsl 		}
    168  1.28.6.2  dsl 		t++;
    169  1.28.6.2  dsl 	}
    170  1.28.6.2  dsl 
    171  1.28.6.2  dsl 	return 0;
    172  1.28.6.2  dsl }
    173  1.28.6.2  dsl 
    174  1.28.6.2  dsl static void
    175  1.28.6.2  dsl re_pci_attach(struct device *parent, struct device *self, void *aux)
    176  1.28.6.2  dsl {
    177  1.28.6.2  dsl 	struct re_pci_softc	*psc = (void *)self;
    178  1.28.6.2  dsl 	struct rtk_softc	*sc = &psc->sc_rtk;
    179  1.28.6.2  dsl 	struct pci_attach_args 	*pa = aux;
    180  1.28.6.2  dsl 	pci_chipset_tag_t pc = pa->pa_pc;
    181  1.28.6.2  dsl 	pci_intr_handle_t ih;
    182  1.28.6.2  dsl 	const char *intrstr = NULL;
    183  1.28.6.2  dsl 	const struct rtk_type	*t;
    184  1.28.6.2  dsl 	uint32_t		hwrev;
    185  1.28.6.2  dsl 	int			error = 0;
    186  1.28.6.2  dsl 	pcireg_t		pmreg, memtype;
    187  1.28.6.2  dsl 	bool			ioh_valid, memh_valid;
    188  1.28.6.2  dsl 	pcireg_t		command;
    189  1.28.6.2  dsl 	bus_space_tag_t		iot, memt;
    190  1.28.6.2  dsl 	bus_space_handle_t	ioh, memh;
    191  1.28.6.2  dsl 	bus_size_t		iosize, memsize, bsize;
    192  1.28.6.2  dsl 
    193  1.28.6.2  dsl 
    194  1.28.6.2  dsl 	/*
    195  1.28.6.2  dsl 	 * Handle power management nonsense.
    196  1.28.6.2  dsl 	 */
    197  1.28.6.2  dsl 	if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PWRMGMT, &pmreg, 0)) {
    198  1.28.6.2  dsl 		command = pci_conf_read(pc, pa->pa_tag, pmreg + PCI_PMCSR);
    199  1.28.6.2  dsl 		if (command & PCI_PMCSR_STATE_MASK) {
    200  1.28.6.2  dsl 			u_int32_t		iobase, membase, irq;
    201  1.28.6.2  dsl 
    202  1.28.6.2  dsl 			/* Save important PCI config data. */
    203  1.28.6.2  dsl 			iobase = pci_conf_read(pc, pa->pa_tag, RTK_PCI_LOIO);
    204  1.28.6.2  dsl 			membase = pci_conf_read(pc, pa->pa_tag, RTK_PCI_LOMEM);
    205  1.28.6.2  dsl 			irq = pci_conf_read(pc, pa->pa_tag, PCI_INTERRUPT_REG);
    206  1.28.6.2  dsl 
    207  1.28.6.2  dsl 			/* Reset the power state. */
    208  1.28.6.2  dsl 			aprint_normal("%s: chip is is in D%d power mode "
    209  1.28.6.2  dsl 		    	    "-- setting to D0\n", sc->sc_dev.dv_xname,
    210  1.28.6.2  dsl 		    	    command & PCI_PMCSR_STATE_MASK);
    211  1.28.6.2  dsl 
    212  1.28.6.2  dsl 			command &= ~PCI_PMCSR_STATE_MASK;
    213  1.28.6.2  dsl 			pci_conf_write(pc, pa->pa_tag,
    214  1.28.6.2  dsl 			    pmreg + PCI_PMCSR, command);
    215  1.28.6.2  dsl 
    216  1.28.6.2  dsl 			/* Restore PCI config data. */
    217  1.28.6.2  dsl 			pci_conf_write(pc, pa->pa_tag, RTK_PCI_LOIO, iobase);
    218  1.28.6.2  dsl 			pci_conf_write(pc, pa->pa_tag, RTK_PCI_LOMEM, membase);
    219  1.28.6.2  dsl 			pci_conf_write(pc, pa->pa_tag, PCI_INTERRUPT_REG, irq);
    220  1.28.6.2  dsl 		}
    221  1.28.6.2  dsl 	}
    222  1.28.6.2  dsl 
    223  1.28.6.2  dsl 	/*
    224  1.28.6.2  dsl 	 * Map control/status registers.
    225  1.28.6.2  dsl 	 */
    226  1.28.6.2  dsl 	command = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
    227  1.28.6.2  dsl 	command |= PCI_COMMAND_MASTER_ENABLE;
    228  1.28.6.2  dsl 	pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, command);
    229  1.28.6.2  dsl 
    230  1.28.6.2  dsl 	ioh_valid = (pci_mapreg_map(pa, RTK_PCI_LOIO, PCI_MAPREG_TYPE_IO, 0,
    231  1.28.6.2  dsl 	    &iot, &ioh, NULL, &iosize) == 0);
    232  1.28.6.2  dsl 	memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, RTK_PCI_LOMEM);
    233  1.28.6.2  dsl 	switch (memtype) {
    234  1.28.6.2  dsl 	case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT:
    235  1.28.6.2  dsl 	case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_64BIT:
    236  1.28.6.2  dsl 		memh_valid = (pci_mapreg_map(pa, RTK_PCI_LOMEM,
    237  1.28.6.2  dsl 		    memtype, 0, &memt, &memh, NULL, &memsize) == 0);
    238  1.28.6.2  dsl 		break;
    239  1.28.6.2  dsl 	default:
    240  1.28.6.2  dsl 		memh_valid = 0;
    241  1.28.6.2  dsl 		break;
    242  1.28.6.2  dsl 	}
    243  1.28.6.2  dsl 
    244  1.28.6.2  dsl 	if (ioh_valid) {
    245  1.28.6.2  dsl 		sc->rtk_btag = iot;
    246  1.28.6.2  dsl 		sc->rtk_bhandle = ioh;
    247  1.28.6.2  dsl 		bsize = iosize;
    248  1.28.6.2  dsl 	} else if (memh_valid) {
    249  1.28.6.2  dsl 		sc->rtk_btag = memt;
    250  1.28.6.2  dsl 		sc->rtk_bhandle = memh;
    251  1.28.6.2  dsl 		bsize = memsize;
    252  1.28.6.2  dsl 	} else {
    253  1.28.6.2  dsl 		aprint_error("%s: can't map registers\n", sc->sc_dev.dv_xname);
    254  1.28.6.2  dsl 		return;
    255  1.28.6.2  dsl 	}
    256  1.28.6.2  dsl 
    257  1.28.6.2  dsl 	t = re_devs;
    258  1.28.6.2  dsl 	hwrev = CSR_READ_4(sc, RTK_TXCFG) & RTK_TXCFG_HWREV;
    259  1.28.6.2  dsl 
    260  1.28.6.2  dsl 	while (t->rtk_name != NULL) {
    261  1.28.6.2  dsl 		if ((PCI_VENDOR(pa->pa_id) == t->rtk_vid) &&
    262  1.28.6.2  dsl 		    (PCI_PRODUCT(pa->pa_id) == t->rtk_did)) {
    263  1.28.6.2  dsl 			break;
    264  1.28.6.2  dsl 		}
    265  1.28.6.2  dsl 		t++;
    266  1.28.6.2  dsl 	}
    267  1.28.6.2  dsl 
    268  1.28.6.2  dsl 	if (t->rtk_basetype == RTK_8139CPLUS)
    269  1.28.6.2  dsl 		sc->sc_quirk |= RTKQ_8139CPLUS;
    270  1.28.6.2  dsl 
    271  1.28.6.2  dsl 	if (t->rtk_basetype == RTK_8168 ||
    272  1.28.6.2  dsl 	    t->rtk_basetype == RTK_8101E)
    273  1.28.6.2  dsl 		sc->sc_quirk |= RTKQ_PCIE;
    274  1.28.6.2  dsl 
    275  1.28.6.2  dsl 	aprint_normal(": %s (rev. 0x%02x)\n",
    276  1.28.6.2  dsl 	    t->rtk_name, PCI_REVISION(pa->pa_class));
    277  1.28.6.2  dsl 
    278  1.28.6.2  dsl 	sc->sc_dmat = pa->pa_dmat;
    279  1.28.6.2  dsl 
    280  1.28.6.2  dsl 	/*
    281  1.28.6.2  dsl 	 * No power/enable/disable machinery for PCI attac;
    282  1.28.6.2  dsl 	 * mark the card enabled now.
    283  1.28.6.2  dsl 	 */
    284  1.28.6.2  dsl 	sc->sc_flags |= RTK_ENABLED;
    285  1.28.6.2  dsl 
    286  1.28.6.2  dsl 	/* Hook interrupt last to avoid having to lock softc */
    287  1.28.6.2  dsl 	/* Allocate interrupt */
    288  1.28.6.2  dsl 	if (pci_intr_map(pa, &ih)) {
    289  1.28.6.2  dsl 		aprint_error("%s: couldn't map interrupt\n",
    290  1.28.6.2  dsl 		    sc->sc_dev.dv_xname);
    291  1.28.6.2  dsl 		return;
    292  1.28.6.2  dsl 	}
    293  1.28.6.2  dsl 	intrstr = pci_intr_string(pc, ih);
    294  1.28.6.2  dsl 	psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, re_intr, sc);
    295  1.28.6.2  dsl 	if (psc->sc_ih == NULL) {
    296  1.28.6.2  dsl 		aprint_error("%s: couldn't establish interrupt",
    297  1.28.6.2  dsl 		    sc->sc_dev.dv_xname);
    298  1.28.6.2  dsl 		if (intrstr != NULL)
    299  1.28.6.2  dsl 			aprint_error(" at %s", intrstr);
    300  1.28.6.2  dsl 		aprint_error("\n");
    301  1.28.6.2  dsl 		return;
    302  1.28.6.2  dsl 	}
    303  1.28.6.2  dsl 	aprint_normal("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr);
    304  1.28.6.2  dsl 
    305  1.28.6.2  dsl 	re_attach(sc);
    306  1.28.6.2  dsl 
    307  1.28.6.2  dsl 	/*
    308  1.28.6.2  dsl 	 * Perform hardware diagnostic on the original RTL8169.
    309  1.28.6.2  dsl 	 * Some 32-bit cards were incorrectly wired and would
    310  1.28.6.2  dsl 	 * malfunction if plugged into a 64-bit slot.
    311  1.28.6.2  dsl 	 */
    312  1.28.6.2  dsl 	if (hwrev == RTK_HWREV_8169) {
    313  1.28.6.2  dsl 		error = re_diag(sc);
    314  1.28.6.2  dsl 		if (error) {
    315  1.28.6.2  dsl 			aprint_error(
    316  1.28.6.2  dsl 			    "%s: attach aborted due to hardware diag failure\n",
    317  1.28.6.2  dsl 			    sc->sc_dev.dv_xname);
    318  1.28.6.2  dsl 
    319  1.28.6.2  dsl 			re_detach(sc);
    320  1.28.6.2  dsl 
    321  1.28.6.2  dsl 			if (psc->sc_ih != NULL) {
    322  1.28.6.2  dsl 				pci_intr_disestablish(pc, psc->sc_ih);
    323  1.28.6.2  dsl 				psc->sc_ih = NULL;
    324  1.28.6.2  dsl 			}
    325  1.28.6.2  dsl 
    326  1.28.6.2  dsl 			if (ioh_valid)
    327  1.28.6.2  dsl 				bus_space_unmap(iot, ioh, iosize);
    328  1.28.6.2  dsl 			if (memh_valid)
    329  1.28.6.2  dsl 				bus_space_unmap(memt, memh, memsize);
    330  1.28.6.2  dsl 		}
    331  1.28.6.2  dsl 	}
    332  1.28.6.2  dsl }
    333