if_re_pci.c revision 1.10.2.1
1 /* $NetBSD: if_re_pci.c,v 1.10.2.1 2006/06/21 15:05:04 yamt Exp $ */ 2 3 /* 4 * Copyright (c) 1997, 1998-2003 5 * Bill Paul <wpaul (at) windriver.com>. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by Bill Paul. 18 * 4. Neither the name of the author nor the names of any co-contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 32 * THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35 /* $FreeBSD: /repoman/r/ncvs/src/sys/dev/re/if_re.c,v 1.20 2004/04/11 20:34:08 ru Exp $ */ 36 37 /* 38 * RealTek 8139C+/8169/8169S/8110S PCI NIC driver 39 * 40 * Written by Bill Paul <wpaul (at) windriver.com> 41 * Senior Networking Software Engineer 42 * Wind River Systems 43 * 44 * Netbsd bus-specific frontends for written by 45 * Jonathan Stone <jonathan (at) netbsd.org> 46 */ 47 48 #include "bpfilter.h" 49 #include "vlan.h" 50 51 #include <sys/types.h> 52 53 #include <sys/param.h> 54 #include <sys/endian.h> 55 #include <sys/systm.h> 56 #include <sys/sockio.h> 57 #include <sys/mbuf.h> 58 #include <sys/malloc.h> 59 #include <sys/kernel.h> 60 #include <sys/socket.h> 61 #include <sys/device.h> 62 63 #include <net/if.h> 64 #include <net/if_arp.h> 65 #include <net/if_dl.h> 66 #include <net/if_ether.h> 67 #include <net/if_media.h> 68 #include <net/if_vlanvar.h> 69 70 #include <machine/bus.h> 71 72 #include <dev/mii/mii.h> 73 #include <dev/mii/miivar.h> 74 75 #include <dev/pci/pcireg.h> 76 #include <dev/pci/pcivar.h> 77 #include <dev/pci/pcidevs.h> 78 79 /* 80 * Default to using PIO access for this driver. 81 */ 82 #define RE_USEIOSPACE 83 84 #include <dev/ic/rtl81x9reg.h> 85 #include <dev/ic/rtl81x9var.h> 86 #include <dev/ic/rtl8169var.h> 87 88 struct re_pci_softc { 89 struct rtk_softc sc_rtk; 90 91 void *sc_ih; 92 pci_chipset_tag_t sc_pc; 93 pcitag_t sc_pcitag; 94 }; 95 96 static int re_pci_probe(struct device *, struct cfdata *, void *); 97 static void re_pci_attach(struct device *, struct device *, void *); 98 99 /* 100 * Various supported device vendors/types and their names. 101 */ 102 static const struct rtk_type re_devs[] = { 103 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8139, RTK_HWREV_8139CPLUS, 104 "RealTek 8139C+ 10/100BaseTX" }, 105 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8168, RTK_HWREV_8168, 106 "RealTek 8168B/8111B Gigabit Ethernet" }, 107 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8169, RTK_HWREV_8169, 108 "RealTek 8169 Gigabit Ethernet" }, 109 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8169, RTK_HWREV_8169S, 110 "RealTek 8169S Single-chip Gigabit Ethernet" }, 111 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8169, RTK_HWREV_8169SB, 112 "RealTek 8169SB Single-chip Gigabit Ethernet" }, 113 { PCI_VENDOR_COREGA, PCI_PRODUCT_COREGA_LAPCIGT, RTK_HWREV_8169S, 114 "Corega CG-LAPCIGT Gigabit Ethernet" }, 115 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8169, RTK_HWREV_8110S, 116 "RealTek 8110S Single-chip Gigabit Ethernet" }, 117 { PCI_VENDOR_DLINK, PCI_PRODUCT_DLINK_DGE528T, RTK_HWREV_8169S, 118 "D-Link DGE-528T Gigabit Ethernet" }, 119 { PCI_VENDOR_USR2, PCI_PRODUCT_USR2_USR997902, RTK_HWREV_8169S, 120 "US Robotics (3Com) USR997902 Gigabit Ethernet" }, 121 { PCI_VENDOR_LINKSYS, PCI_PRODUCT_LINKSYS_EG1032, RTK_HWREV_8169S, 122 "Linksys EG1032 rev. 3 Gigabit Ethernet" }, 123 { 0, 0, 0, NULL } 124 }; 125 126 static const struct rtk_hwrev re_hwrevs[] = { 127 { RTK_HWREV_8139, RTK_8139, "" }, 128 { RTK_HWREV_8139A, RTK_8139, "A" }, 129 { RTK_HWREV_8139AG, RTK_8139, "A-G" }, 130 { RTK_HWREV_8139B, RTK_8139, "B" }, 131 { RTK_HWREV_8130, RTK_8139, "8130" }, 132 { RTK_HWREV_8139C, RTK_8139, "C" }, 133 { RTK_HWREV_8139D, RTK_8139, "8139D/8100B/8100C" }, 134 { RTK_HWREV_8139CPLUS, RTK_8139CPLUS, "C+"}, 135 { RTK_HWREV_8168, RTK_8169, "8168B/8111B"}, 136 { RTK_HWREV_8169, RTK_8169, "8169"}, 137 { RTK_HWREV_8169S, RTK_8169, "8169S"}, 138 { RTK_HWREV_8169SB, RTK_8169, "8169SB"}, 139 { RTK_HWREV_8110S, RTK_8169, "8110S"}, 140 { RTK_HWREV_8100, RTK_8139, "8100"}, 141 { RTK_HWREV_8101, RTK_8139, "8101"}, 142 { 0, 0, NULL } 143 }; 144 145 #define RE_LINKSYS_EG1032_SUBID 0x00241737 146 147 CFATTACH_DECL(re_pci, sizeof(struct re_pci_softc), re_pci_probe, re_pci_attach, 148 NULL, NULL); 149 150 /* 151 * Probe for a RealTek 8139C+/8169/8110 chip. Check the PCI vendor and device 152 * IDs against our list and return a device name if we find a match. 153 */ 154 static int 155 re_pci_probe(struct device *parent, struct cfdata *match, void *aux) 156 { 157 const struct rtk_type *t; 158 struct pci_attach_args *pa = aux; 159 bus_space_tag_t rtk_btag; 160 bus_space_handle_t rtk_bhandle; 161 bus_size_t bsize; 162 u_int32_t hwrev; 163 pcireg_t subid; 164 165 subid = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG); 166 167 /* special-case Linksys EG1032, since rev 2 uses sk(4) */ 168 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_LINKSYS && 169 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_LINKSYS_EG1032 && 170 subid == RE_LINKSYS_EG1032_SUBID) 171 return 1; 172 173 t = re_devs; 174 175 while (t->rtk_name != NULL) { 176 if ((PCI_VENDOR(pa->pa_id) == t->rtk_vid) && 177 (PCI_PRODUCT(pa->pa_id) == t->rtk_did)) { 178 179 /* 180 * Temporarily map the I/O space 181 * so we can read the chip ID register. 182 */ 183 #ifdef RE_USEIOSPACE 184 if (pci_mapreg_map(pa, RTK_PCI_LOIO, 185 PCI_MAPREG_TYPE_IO, 0, &rtk_btag, 186 &rtk_bhandle, NULL, &bsize)) { 187 aprint_error("can't map i/o space\n"); 188 return 0; 189 } 190 #else 191 if (pci_mapreg_map(pa, RTK_PCI_LOMEM, 192 PCI_MAPREG_TYPE_MEM, 0, &rtk_btag, 193 &rtk_bhandle, NULL, &bsize)) { 194 aprint_error("can't map mem space\n"); 195 return 0; 196 } 197 #endif 198 hwrev = bus_space_read_4(rtk_btag, rtk_bhandle, 199 RTK_TXCFG) & RTK_TXCFG_HWREV; 200 bus_space_unmap(rtk_btag, rtk_bhandle, bsize); 201 if (t->rtk_basetype == hwrev) 202 return 2; /* defeat rtk(4) */ 203 } 204 t++; 205 } 206 207 return 0; 208 } 209 210 static void 211 re_pci_attach(struct device *parent, struct device *self, void *aux) 212 { 213 struct re_pci_softc *psc = (void *)self; 214 struct rtk_softc *sc = &psc->sc_rtk; 215 struct pci_attach_args *pa = aux; 216 pci_chipset_tag_t pc = pa->pa_pc; 217 pci_intr_handle_t ih; 218 const char *intrstr = NULL; 219 const struct rtk_type *t; 220 const struct rtk_hwrev *hw_rev; 221 int hwrev; 222 int error = 0; 223 int pmreg; 224 pcireg_t command; 225 bus_size_t bsize; 226 227 228 /* 229 * Handle power management nonsense. 230 */ 231 if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PWRMGMT, &pmreg, 0)) { 232 command = pci_conf_read(pc, pa->pa_tag, pmreg + PCI_PMCSR); 233 if (command & RTK_PSTATE_MASK) { 234 u_int32_t iobase, membase, irq; 235 236 /* Save important PCI config data. */ 237 iobase = pci_conf_read(pc, pa->pa_tag, RTK_PCI_LOIO); 238 membase = pci_conf_read(pc, pa->pa_tag, RTK_PCI_LOMEM); 239 irq = pci_conf_read(pc, pa->pa_tag, PCI_INTERRUPT_REG); 240 241 /* Reset the power state. */ 242 aprint_normal("%s: chip is is in D%d power mode " 243 "-- setting to D0\n", sc->sc_dev.dv_xname, 244 command & RTK_PSTATE_MASK); 245 246 command &= ~RTK_PSTATE_MASK; 247 pci_conf_write(pc, pa->pa_tag, 248 pmreg + PCI_PMCSR, command); 249 250 /* Restore PCI config data. */ 251 pci_conf_write(pc, pa->pa_tag, RTK_PCI_LOIO, iobase); 252 pci_conf_write(pc, pa->pa_tag, RTK_PCI_LOMEM, membase); 253 pci_conf_write(pc, pa->pa_tag, PCI_INTERRUPT_REG, irq); 254 } 255 } 256 257 /* 258 * Map control/status registers. 259 */ 260 command = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 261 command |= PCI_COMMAND_MASTER_ENABLE; 262 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, command); 263 264 #ifdef RE_USEIOSPACE 265 if (pci_mapreg_map(pa, RTK_PCI_LOIO, PCI_MAPREG_TYPE_IO, 0, 266 &sc->rtk_btag, &sc->rtk_bhandle, NULL, &bsize)) { 267 aprint_error("%s: can't map i/o space\n", sc->sc_dev.dv_xname); 268 return; 269 } 270 #else 271 if (pci_mapreg_map(pa, RTK_PCI_LOMEM, PCI_MAPREG_TYPE_MEM, 0, 272 &sc->rtk_btag, &sc->rtk_bhandle, NULL, &bsize)) { 273 aprint_error("%s: can't map mem space\n", sc->sc_dev.dv_xname); 274 return; 275 } 276 #endif 277 t = re_devs; 278 hwrev = CSR_READ_4(sc, RTK_TXCFG) & RTK_TXCFG_HWREV; 279 280 while (t->rtk_name != NULL) { 281 if ((PCI_VENDOR(pa->pa_id) == t->rtk_vid) && 282 (PCI_PRODUCT(pa->pa_id) == t->rtk_did)) { 283 284 if (t->rtk_basetype == hwrev) 285 break; 286 } 287 t++; 288 } 289 aprint_normal(": %s\n", t->rtk_name); 290 291 hw_rev = re_hwrevs; 292 hwrev = CSR_READ_4(sc, RTK_TXCFG) & RTK_TXCFG_HWREV; 293 while (hw_rev->rtk_desc != NULL) { 294 if (hw_rev->rtk_rev == hwrev) { 295 sc->rtk_type = hw_rev->rtk_type; 296 break; 297 } 298 hw_rev++; 299 } 300 301 sc->sc_dmat = pa->pa_dmat; 302 303 /* 304 * No power/enable/disable machinery for PCI attac; 305 * mark the card enabled now. 306 */ 307 sc->sc_flags |= RTK_ENABLED; 308 309 /* Hook interrupt last to avoid having to lock softc */ 310 /* Allocate interrupt */ 311 if (pci_intr_map(pa, &ih)) { 312 aprint_error("%s: couldn't map interrupt\n", 313 sc->sc_dev.dv_xname); 314 return; 315 } 316 intrstr = pci_intr_string(pc, ih); 317 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, re_intr, sc); 318 if (psc->sc_ih == NULL) { 319 aprint_error("%s: couldn't establish interrupt", 320 sc->sc_dev.dv_xname); 321 if (intrstr != NULL) 322 aprint_error(" at %s", intrstr); 323 aprint_error("\n"); 324 return; 325 } 326 aprint_normal("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); 327 328 re_attach(sc); 329 330 /* 331 * Perform hardware diagnostic. 332 * XXX: this diagnostic only makes sense for attachemnts with 64-bit 333 * busses: PCI, but not CardBus. 334 */ 335 error = re_diag(sc); 336 if (error) { 337 aprint_error( 338 "%s: attach aborted due to hardware diag failure\n", 339 sc->sc_dev.dv_xname); 340 341 re_detach(sc); 342 343 if (psc->sc_ih != NULL) { 344 pci_intr_disestablish(pc, psc->sc_ih); 345 psc->sc_ih = NULL; 346 } 347 348 if (bsize) 349 bus_space_unmap(sc->rtk_btag, sc->rtk_bhandle, bsize); 350 } 351 } 352
Indexes created Tue Oct 28 12:10:06 GMT 2025