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if_re_pci.c revision 1.13.4.3
      1 /*	$NetBSD: if_re_pci.c,v 1.13.4.3 2007/02/09 21:03:51 ad Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1997, 1998-2003
      5  *	Bill Paul <wpaul (at) windriver.com>.  All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  * 3. All advertising materials mentioning features or use of this software
     16  *    must display the following acknowledgement:
     17  *	This product includes software developed by Bill Paul.
     18  * 4. Neither the name of the author nor the names of any co-contributors
     19  *    may be used to endorse or promote products derived from this software
     20  *    without specific prior written permission.
     21  *
     22  * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
     23  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     25  * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
     26  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     27  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     28  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     29  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     30  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     31  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
     32  * THE POSSIBILITY OF SUCH DAMAGE.
     33  */
     34 
     35 /* $FreeBSD: /repoman/r/ncvs/src/sys/dev/re/if_re.c,v 1.20 2004/04/11 20:34:08 ru Exp $ */
     36 
     37 /*
     38  * RealTek 8139C+/8169/8169S/8110S PCI NIC driver
     39  *
     40  * Written by Bill Paul <wpaul (at) windriver.com>
     41  * Senior Networking Software Engineer
     42  * Wind River Systems
     43  *
     44  * NetBSD bus-specific frontends for written by
     45  * Jonathan Stone <jonathan (at) netbsd.org>
     46  */
     47 
     48 #include "bpfilter.h"
     49 #include "vlan.h"
     50 
     51 #include <sys/types.h>
     52 
     53 #include <sys/param.h>
     54 #include <sys/endian.h>
     55 #include <sys/systm.h>
     56 #include <sys/sockio.h>
     57 #include <sys/mbuf.h>
     58 #include <sys/malloc.h>
     59 #include <sys/kernel.h>
     60 #include <sys/socket.h>
     61 #include <sys/device.h>
     62 
     63 #include <net/if.h>
     64 #include <net/if_arp.h>
     65 #include <net/if_dl.h>
     66 #include <net/if_ether.h>
     67 #include <net/if_media.h>
     68 #include <net/if_vlanvar.h>
     69 
     70 #include <machine/bus.h>
     71 
     72 #include <dev/mii/mii.h>
     73 #include <dev/mii/miivar.h>
     74 
     75 #include <dev/pci/pcireg.h>
     76 #include <dev/pci/pcivar.h>
     77 #include <dev/pci/pcidevs.h>
     78 
     79 #include <dev/ic/rtl81x9reg.h>
     80 #include <dev/ic/rtl81x9var.h>
     81 #include <dev/ic/rtl8169var.h>
     82 
     83 struct re_pci_softc {
     84 	struct rtk_softc sc_rtk;
     85 
     86 	void *sc_ih;
     87 	pci_chipset_tag_t sc_pc;
     88 	pcitag_t sc_pcitag;
     89 };
     90 
     91 static int	re_pci_match(struct device *, struct cfdata *, void *);
     92 static void	re_pci_attach(struct device *, struct device *, void *);
     93 
     94 /*
     95  * Various supported device vendors/types and their names.
     96  */
     97 static const struct rtk_type re_devs[] = {
     98 	{ PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8139,
     99 	    RTK_HWREV_8139CPLUS,
    100 	    "RealTek 8139C+ 10/100BaseTX" },
    101 	{ PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8101E,
    102 	    RTK_HWREV_8100E,
    103 	    "RealTek 8100E PCIe 10/100BaseTX" },
    104 	{ PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8101E,
    105 	    RTK_HWREV_8101E,
    106 	    "RealTek 8101E PCIe 10/100BaseTX" },
    107 	{ PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8168,
    108 	    RTK_HWREV_8168_SPIN1,
    109 	    "RealTek 8168B/8111B PCIe Gigabit Ethernet" },
    110 	{ PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8168,
    111 	    RTK_HWREV_8168_SPIN2,
    112 	    "RealTek 8168B/8111B PCIe Gigabit Ethernet" },
    113 	{ PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8169,
    114 	    RTK_HWREV_8169,
    115 	    "RealTek 8169 Gigabit Ethernet" },
    116 	{ PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8169,
    117 	    RTK_HWREV_8169S,
    118 	    "RealTek 8169S Single-chip Gigabit Ethernet" },
    119 	{ PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8169,
    120 	    RTK_HWREV_8110S,
    121 	    "RealTek 8110S Single-chip Gigabit Ethernet" },
    122 	{ PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8169,
    123 	    RTK_HWREV_8169_8110SB,
    124 	    "RealTek 8169SB/8110SB Single-chip Gigabit Ethernet" },
    125 	{ PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8169,
    126 	    RTK_HWREV_8169_8110SC,
    127 	    "RealTek 8169SC/8110SC Single-chip Gigabit Ethernet" },
    128 	{ PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8169SC,
    129 	    RTK_HWREV_8169_8110SC,
    130 	    "RealTek 8169SC/8110SC Single-chip Gigabit Ethernet" },
    131 	{ PCI_VENDOR_COREGA, PCI_PRODUCT_COREGA_LAPCIGT,
    132 	    RTK_HWREV_8169S,
    133 	    "Corega CG-LAPCIGT Gigabit Ethernet" },
    134 	{ PCI_VENDOR_DLINK, PCI_PRODUCT_DLINK_DGE528T,
    135 	    RTK_HWREV_8169S,
    136 	    "D-Link DGE-528T Gigabit Ethernet" },
    137 	{ PCI_VENDOR_USR2, PCI_PRODUCT_USR2_USR997902,
    138 	    RTK_HWREV_8169S,
    139 	    "US Robotics (3Com) USR997902 Gigabit Ethernet" },
    140 	{ PCI_VENDOR_LINKSYS, PCI_PRODUCT_LINKSYS_EG1032,
    141 	    RTK_HWREV_8169S,
    142 	    "Linksys EG1032 rev. 3 Gigabit Ethernet" },
    143 	{ 0, 0, 0, NULL }
    144 };
    145 
    146 static const struct rtk_hwrev re_hwrevs[] = {
    147 	{ RTK_HWREV_8139, RTK_8139,  "" },
    148 	{ RTK_HWREV_8139A, RTK_8139, "A" },
    149 	{ RTK_HWREV_8139AG, RTK_8139, "A-G" },
    150 	{ RTK_HWREV_8139B, RTK_8139, "B" },
    151 	{ RTK_HWREV_8130, RTK_8139, "8130" },
    152 	{ RTK_HWREV_8139C, RTK_8139, "C" },
    153 	{ RTK_HWREV_8139D, RTK_8139, "8139D/8100B/8100C" },
    154 	{ RTK_HWREV_8139CPLUS, RTK_8139CPLUS, "C+"},
    155 	{ RTK_HWREV_8168_SPIN1, RTK_8169, "8168B/8111B"},
    156 	{ RTK_HWREV_8168_SPIN2, RTK_8169, "8168B/8111B"},
    157 	{ RTK_HWREV_8169, RTK_8169, "8169"},
    158 	{ RTK_HWREV_8169S, RTK_8169, "8169S"},
    159 	{ RTK_HWREV_8110S, RTK_8169, "8110S"},
    160 	{ RTK_HWREV_8169_8110SB, RTK_8169, "8169SB"},
    161 	{ RTK_HWREV_8169_8110SC, RTK_8169, "8169SC"},
    162 	{ RTK_HWREV_8100E, RTK_8169, "8100E"},
    163 	{ RTK_HWREV_8101E, RTK_8169, "8101E"},
    164 	{ RTK_HWREV_8100, RTK_8139, "8100"},
    165 	{ RTK_HWREV_8101, RTK_8139, "8101"},
    166 	{ 0, 0, NULL }
    167 };
    168 
    169 #define RE_LINKSYS_EG1032_SUBID	0x00241737
    170 
    171 CFATTACH_DECL(re_pci, sizeof(struct re_pci_softc), re_pci_match, re_pci_attach,
    172 	      NULL, NULL);
    173 
    174 /*
    175  * Probe for a RealTek 8139C+/8169/8110 chip. Check the PCI vendor and device
    176  * IDs against our list and return a device name if we find a match.
    177  */
    178 static int
    179 re_pci_match(struct device *parent, struct cfdata *match, void *aux)
    180 {
    181 	const struct rtk_type	*t;
    182 	struct pci_attach_args	*pa = aux;
    183 	bus_space_tag_t		iot, memt, bst;
    184 	bus_space_handle_t	ioh, memh, bsh;
    185 	bus_size_t		memsize, iosize, bsize;
    186 	u_int32_t		hwrev;
    187 	pcireg_t subid;
    188 	boolean_t ioh_valid, memh_valid;
    189 
    190 	subid = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
    191 
    192 	/* special-case Linksys EG1032, since rev 2 uses sk(4) */
    193 	if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_LINKSYS &&
    194 	    PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_LINKSYS_EG1032 &&
    195 	    subid == RE_LINKSYS_EG1032_SUBID)
    196 		return 1;
    197 
    198 	t = re_devs;
    199 
    200 	while (t->rtk_name != NULL) {
    201 		if ((PCI_VENDOR(pa->pa_id) == t->rtk_vid) &&
    202 		    (PCI_PRODUCT(pa->pa_id) == t->rtk_did)) {
    203 
    204 			/*
    205 			 * Temporarily map the I/O space
    206 			 * so we can read the chip ID register.
    207 			 */
    208 			ioh_valid = (pci_mapreg_map(pa, RTK_PCI_LOIO,
    209 			    PCI_MAPREG_TYPE_IO, 0, &iot, &ioh,
    210 			    NULL, &iosize) == 0);
    211 			memh_valid = (pci_mapreg_map(pa, RTK_PCI_LOMEM,
    212 			    PCI_MAPREG_TYPE_MEM, 0, &memt, &memh,
    213 			    NULL, &memsize) == 0);
    214 			if (ioh_valid) {
    215 				bst = iot;
    216 				bsh = ioh;
    217 				bsize = iosize;
    218 			} else if (memh_valid) {
    219 				bst = memt;
    220 				bsh = memh;
    221 				bsize = memsize;
    222 			} else
    223 				return 0;
    224 			hwrev = bus_space_read_4(bst, bsh, RTK_TXCFG) &
    225 			    RTK_TXCFG_HWREV;
    226 			bus_space_unmap(bst, bsh, bsize);
    227 			if (t->rtk_basetype == hwrev)
    228 				return 2;	/* defeat rtk(4) */
    229 		}
    230 		t++;
    231 	}
    232 
    233 	return 0;
    234 }
    235 
    236 static void
    237 re_pci_attach(struct device *parent, struct device *self, void *aux)
    238 {
    239 	struct re_pci_softc	*psc = (void *)self;
    240 	struct rtk_softc	*sc = &psc->sc_rtk;
    241 	struct pci_attach_args 	*pa = aux;
    242 	pci_chipset_tag_t pc = pa->pa_pc;
    243 	pci_intr_handle_t ih;
    244 	const char *intrstr = NULL;
    245 	const struct rtk_type	*t;
    246 	const struct rtk_hwrev	*hw_rev;
    247 	uint32_t		hwrev;
    248 	int			error = 0;
    249 	int			pmreg;
    250 	boolean_t		ioh_valid, memh_valid;
    251 	pcireg_t		command;
    252 	bus_space_tag_t		iot, memt;
    253 	bus_space_handle_t	ioh, memh;
    254 	bus_size_t		iosize, memsize, bsize;
    255 
    256 
    257 	/*
    258 	 * Handle power management nonsense.
    259 	 */
    260 	if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PWRMGMT, &pmreg, 0)) {
    261 		command = pci_conf_read(pc, pa->pa_tag, pmreg + PCI_PMCSR);
    262 		if (command & PCI_PMCSR_STATE_MASK) {
    263 			u_int32_t		iobase, membase, irq;
    264 
    265 			/* Save important PCI config data. */
    266 			iobase = pci_conf_read(pc, pa->pa_tag, RTK_PCI_LOIO);
    267 			membase = pci_conf_read(pc, pa->pa_tag, RTK_PCI_LOMEM);
    268 			irq = pci_conf_read(pc, pa->pa_tag, PCI_INTERRUPT_REG);
    269 
    270 			/* Reset the power state. */
    271 			aprint_normal("%s: chip is is in D%d power mode "
    272 		    	    "-- setting to D0\n", sc->sc_dev.dv_xname,
    273 		    	    command & PCI_PMCSR_STATE_MASK);
    274 
    275 			command &= ~PCI_PMCSR_STATE_MASK;
    276 			pci_conf_write(pc, pa->pa_tag,
    277 			    pmreg + PCI_PMCSR, command);
    278 
    279 			/* Restore PCI config data. */
    280 			pci_conf_write(pc, pa->pa_tag, RTK_PCI_LOIO, iobase);
    281 			pci_conf_write(pc, pa->pa_tag, RTK_PCI_LOMEM, membase);
    282 			pci_conf_write(pc, pa->pa_tag, PCI_INTERRUPT_REG, irq);
    283 		}
    284 	}
    285 
    286 	/*
    287 	 * Map control/status registers.
    288 	 */
    289 	command = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
    290 	command |= PCI_COMMAND_MASTER_ENABLE;
    291 	pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, command);
    292 
    293 	ioh_valid = (pci_mapreg_map(pa, RTK_PCI_LOIO, PCI_MAPREG_TYPE_IO, 0,
    294 	    &iot, &ioh, NULL, &iosize) == 0);
    295 	memh_valid = (pci_mapreg_map(pa, RTK_PCI_LOMEM, PCI_MAPREG_TYPE_MEM, 0,
    296 	    &memt, &memh, NULL, &memsize) == 0);
    297 	if (ioh_valid) {
    298 		sc->rtk_btag = iot;
    299 		sc->rtk_bhandle = ioh;
    300 		bsize = iosize;
    301 	} else if (memh_valid) {
    302 		sc->rtk_btag = memt;
    303 		sc->rtk_bhandle = memh;
    304 		bsize = memsize;
    305 	} else {
    306 		aprint_error("%s: can't map registers\n", sc->sc_dev.dv_xname);
    307 		return;
    308 	}
    309 
    310 	t = re_devs;
    311 	hwrev = CSR_READ_4(sc, RTK_TXCFG) & RTK_TXCFG_HWREV;
    312 
    313 	while (t->rtk_name != NULL) {
    314 		if ((PCI_VENDOR(pa->pa_id) == t->rtk_vid) &&
    315 		    (PCI_PRODUCT(pa->pa_id) == t->rtk_did)) {
    316 
    317 			if (t->rtk_basetype == hwrev)
    318 				break;
    319 		}
    320 		t++;
    321 	}
    322 	aprint_normal(": %s\n", t->rtk_name);
    323 
    324 	hw_rev = re_hwrevs;
    325 	hwrev = CSR_READ_4(sc, RTK_TXCFG) & RTK_TXCFG_HWREV;
    326 	while (hw_rev->rtk_desc != NULL) {
    327 		if (hw_rev->rtk_rev == hwrev) {
    328 			sc->rtk_type = hw_rev->rtk_type;
    329 			break;
    330 		}
    331 		hw_rev++;
    332 	}
    333 
    334 	sc->sc_dmat = pa->pa_dmat;
    335 
    336 	/*
    337 	 * No power/enable/disable machinery for PCI attac;
    338 	 * mark the card enabled now.
    339 	 */
    340 	sc->sc_flags |= RTK_ENABLED;
    341 
    342 	/* Hook interrupt last to avoid having to lock softc */
    343 	/* Allocate interrupt */
    344 	if (pci_intr_map(pa, &ih)) {
    345 		aprint_error("%s: couldn't map interrupt\n",
    346 		    sc->sc_dev.dv_xname);
    347 		return;
    348 	}
    349 	intrstr = pci_intr_string(pc, ih);
    350 	psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, re_intr, sc);
    351 	if (psc->sc_ih == NULL) {
    352 		aprint_error("%s: couldn't establish interrupt",
    353 		    sc->sc_dev.dv_xname);
    354 		if (intrstr != NULL)
    355 			aprint_error(" at %s", intrstr);
    356 		aprint_error("\n");
    357 		return;
    358 	}
    359 	aprint_normal("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr);
    360 
    361 	re_attach(sc);
    362 
    363 	/*
    364 	 * Perform hardware diagnostic on the original RTL8169.
    365 	 * Some 32-bit cards were incorrectly wired and would
    366 	 * malfunction if plugged into a 64-bit slot.
    367 	 */
    368 	if (hwrev == RTK_HWREV_8169) {
    369 		error = re_diag(sc);
    370 		if (error) {
    371 			aprint_error(
    372 			    "%s: attach aborted due to hardware diag failure\n",
    373 			    sc->sc_dev.dv_xname);
    374 
    375 			re_detach(sc);
    376 
    377 			if (psc->sc_ih != NULL) {
    378 				pci_intr_disestablish(pc, psc->sc_ih);
    379 				psc->sc_ih = NULL;
    380 			}
    381 
    382 			if (bsize)
    383 				bus_space_unmap(sc->rtk_btag, sc->rtk_bhandle,
    384 				    bsize);
    385 		}
    386 	}
    387 }
    388