if_re_pci.c revision 1.23.2.2
1 /* $NetBSD: if_re_pci.c,v 1.23.2.2 2007/03/12 05:55:20 rmind Exp $ */ 2 3 /* 4 * Copyright (c) 1997, 1998-2003 5 * Bill Paul <wpaul (at) windriver.com>. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by Bill Paul. 18 * 4. Neither the name of the author nor the names of any co-contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 32 * THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35 /* $FreeBSD: /repoman/r/ncvs/src/sys/dev/re/if_re.c,v 1.20 2004/04/11 20:34:08 ru Exp $ */ 36 37 /* 38 * RealTek 8139C+/8169/8169S/8110S PCI NIC driver 39 * 40 * Written by Bill Paul <wpaul (at) windriver.com> 41 * Senior Networking Software Engineer 42 * Wind River Systems 43 * 44 * NetBSD bus-specific frontends for written by 45 * Jonathan Stone <jonathan (at) netbsd.org> 46 */ 47 48 #include "bpfilter.h" 49 #include "vlan.h" 50 51 #include <sys/types.h> 52 53 #include <sys/param.h> 54 #include <sys/endian.h> 55 #include <sys/systm.h> 56 #include <sys/sockio.h> 57 #include <sys/mbuf.h> 58 #include <sys/malloc.h> 59 #include <sys/kernel.h> 60 #include <sys/socket.h> 61 #include <sys/device.h> 62 63 #include <net/if.h> 64 #include <net/if_arp.h> 65 #include <net/if_dl.h> 66 #include <net/if_ether.h> 67 #include <net/if_media.h> 68 #include <net/if_vlanvar.h> 69 70 #include <machine/bus.h> 71 72 #include <dev/mii/mii.h> 73 #include <dev/mii/miivar.h> 74 75 #include <dev/pci/pcireg.h> 76 #include <dev/pci/pcivar.h> 77 #include <dev/pci/pcidevs.h> 78 79 #include <dev/ic/rtl81x9reg.h> 80 #include <dev/ic/rtl81x9var.h> 81 #include <dev/ic/rtl8169var.h> 82 83 struct re_pci_softc { 84 struct rtk_softc sc_rtk; 85 86 void *sc_ih; 87 pci_chipset_tag_t sc_pc; 88 pcitag_t sc_pcitag; 89 }; 90 91 static int re_pci_match(struct device *, struct cfdata *, void *); 92 static void re_pci_attach(struct device *, struct device *, void *); 93 94 /* 95 * Various supported device vendors/types and their names. 96 */ 97 static const struct rtk_type re_devs[] = { 98 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8139, 99 RTK_HWREV_8139CPLUS, 100 "RealTek 8139C+ 10/100BaseTX" }, 101 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8101E, 102 RTK_HWREV_8100E, 103 "RealTek 8100E PCIe 10/100BaseTX" }, 104 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8101E, 105 RTK_HWREV_8100E_SPIN2, 106 "RealTek 8100E PCIe 10/100BaseTX" }, 107 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8101E, 108 RTK_HWREV_8101E, 109 "RealTek 8101E PCIe 10/100BaseTX" }, 110 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8168, 111 RTK_HWREV_8168_SPIN1, 112 "RealTek 8168B/8111B PCIe Gigabit Ethernet" }, 113 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8168, 114 RTK_HWREV_8168_SPIN2, 115 "RealTek 8168B/8111B PCIe Gigabit Ethernet" }, 116 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8169, 117 RTK_HWREV_8169, 118 "RealTek 8169 Gigabit Ethernet" }, 119 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8169, 120 RTK_HWREV_8169S, 121 "RealTek 8169S Single-chip Gigabit Ethernet" }, 122 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8169, 123 RTK_HWREV_8110S, 124 "RealTek 8110S Single-chip Gigabit Ethernet" }, 125 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8169, 126 RTK_HWREV_8169_8110SB, 127 "RealTek 8169SB/8110SB Single-chip Gigabit Ethernet" }, 128 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8169, 129 RTK_HWREV_8169_8110SC, 130 "RealTek 8169SC/8110SC Single-chip Gigabit Ethernet" }, 131 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8169SC, 132 RTK_HWREV_8169_8110SC, 133 "RealTek 8169SC/8110SC Single-chip Gigabit Ethernet" }, 134 { PCI_VENDOR_COREGA, PCI_PRODUCT_COREGA_LAPCIGT, 135 RTK_HWREV_8169S, 136 "Corega CG-LAPCIGT Gigabit Ethernet" }, 137 { PCI_VENDOR_DLINK, PCI_PRODUCT_DLINK_DGE528T, 138 RTK_HWREV_8169S, 139 "D-Link DGE-528T Gigabit Ethernet" }, 140 { PCI_VENDOR_USR2, PCI_PRODUCT_USR2_USR997902, 141 RTK_HWREV_8169S, 142 "US Robotics (3Com) USR997902 Gigabit Ethernet" }, 143 { PCI_VENDOR_LINKSYS, PCI_PRODUCT_LINKSYS_EG1032, 144 RTK_HWREV_8169S, 145 "Linksys EG1032 rev. 3 Gigabit Ethernet" }, 146 { 0, 0, 0, NULL } 147 }; 148 149 static const struct rtk_hwrev re_hwrevs[] = { 150 { RTK_HWREV_8139, RTK_8139, "" }, 151 { RTK_HWREV_8139A, RTK_8139, "A" }, 152 { RTK_HWREV_8139AG, RTK_8139, "A-G" }, 153 { RTK_HWREV_8139B, RTK_8139, "B" }, 154 { RTK_HWREV_8130, RTK_8139, "8130" }, 155 { RTK_HWREV_8139C, RTK_8139, "C" }, 156 { RTK_HWREV_8139D, RTK_8139, "8139D/8100B/8100C" }, 157 { RTK_HWREV_8139CPLUS, RTK_8139CPLUS, "C+"}, 158 { RTK_HWREV_8168_SPIN1, RTK_8169, "8168B/8111B"}, 159 { RTK_HWREV_8168_SPIN2, RTK_8169, "8168B/8111B"}, 160 { RTK_HWREV_8169, RTK_8169, "8169"}, 161 { RTK_HWREV_8169S, RTK_8169, "8169S"}, 162 { RTK_HWREV_8110S, RTK_8169, "8110S"}, 163 { RTK_HWREV_8169_8110SB, RTK_8169, "8169SB"}, 164 { RTK_HWREV_8169_8110SC, RTK_8169, "8169SC"}, 165 { RTK_HWREV_8100E, RTK_8169, "8100E"}, 166 { RTK_HWREV_8101E, RTK_8169, "8101E"}, 167 { RTK_HWREV_8100, RTK_8139, "8100"}, 168 { RTK_HWREV_8101, RTK_8139, "8101"}, 169 { 0, 0, NULL } 170 }; 171 172 #define RE_LINKSYS_EG1032_SUBID 0x00241737 173 174 CFATTACH_DECL(re_pci, sizeof(struct re_pci_softc), re_pci_match, re_pci_attach, 175 NULL, NULL); 176 177 /* 178 * Probe for a RealTek 8139C+/8169/8110 chip. Check the PCI vendor and device 179 * IDs against our list and return a device name if we find a match. 180 */ 181 static int 182 re_pci_match(struct device *parent, struct cfdata *match, void *aux) 183 { 184 const struct rtk_type *t; 185 struct pci_attach_args *pa = aux; 186 bus_space_tag_t iot, memt, bst; 187 bus_space_handle_t ioh, memh, bsh; 188 bus_size_t memsize, iosize, bsize; 189 u_int32_t hwrev; 190 pcireg_t subid; 191 bool ioh_valid, memh_valid; 192 193 subid = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG); 194 195 /* special-case Linksys EG1032, since rev 2 uses sk(4) */ 196 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_LINKSYS && 197 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_LINKSYS_EG1032 && 198 subid == RE_LINKSYS_EG1032_SUBID) 199 return 1; 200 201 t = re_devs; 202 203 while (t->rtk_name != NULL) { 204 if ((PCI_VENDOR(pa->pa_id) == t->rtk_vid) && 205 (PCI_PRODUCT(pa->pa_id) == t->rtk_did)) { 206 207 /* 208 * Temporarily map the I/O space 209 * so we can read the chip ID register. 210 */ 211 ioh_valid = (pci_mapreg_map(pa, RTK_PCI_LOIO, 212 PCI_MAPREG_TYPE_IO, 0, &iot, &ioh, 213 NULL, &iosize) == 0); 214 memh_valid = (pci_mapreg_map(pa, RTK_PCI_LOMEM, 215 PCI_MAPREG_TYPE_MEM, 0, &memt, &memh, 216 NULL, &memsize) == 0); 217 if (ioh_valid) { 218 bst = iot; 219 bsh = ioh; 220 bsize = iosize; 221 } else if (memh_valid) { 222 bst = memt; 223 bsh = memh; 224 bsize = memsize; 225 } else 226 return 0; 227 hwrev = bus_space_read_4(bst, bsh, RTK_TXCFG) & 228 RTK_TXCFG_HWREV; 229 if (ioh_valid) 230 bus_space_unmap(iot, ioh, iosize); 231 if (memh_valid) 232 bus_space_unmap(memt, memh, memsize); 233 if (t->rtk_basetype == hwrev) 234 return 2; /* defeat rtk(4) */ 235 } 236 t++; 237 } 238 239 return 0; 240 } 241 242 static void 243 re_pci_attach(struct device *parent, struct device *self, void *aux) 244 { 245 struct re_pci_softc *psc = (void *)self; 246 struct rtk_softc *sc = &psc->sc_rtk; 247 struct pci_attach_args *pa = aux; 248 pci_chipset_tag_t pc = pa->pa_pc; 249 pci_intr_handle_t ih; 250 const char *intrstr = NULL; 251 const struct rtk_type *t; 252 const struct rtk_hwrev *hw_rev; 253 uint32_t hwrev; 254 int error = 0; 255 int pmreg; 256 bool ioh_valid, memh_valid; 257 pcireg_t command; 258 bus_space_tag_t iot, memt; 259 bus_space_handle_t ioh, memh; 260 bus_size_t iosize, memsize, bsize; 261 262 263 /* 264 * Handle power management nonsense. 265 */ 266 if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PWRMGMT, &pmreg, 0)) { 267 command = pci_conf_read(pc, pa->pa_tag, pmreg + PCI_PMCSR); 268 if (command & PCI_PMCSR_STATE_MASK) { 269 u_int32_t iobase, membase, irq; 270 271 /* Save important PCI config data. */ 272 iobase = pci_conf_read(pc, pa->pa_tag, RTK_PCI_LOIO); 273 membase = pci_conf_read(pc, pa->pa_tag, RTK_PCI_LOMEM); 274 irq = pci_conf_read(pc, pa->pa_tag, PCI_INTERRUPT_REG); 275 276 /* Reset the power state. */ 277 aprint_normal("%s: chip is is in D%d power mode " 278 "-- setting to D0\n", sc->sc_dev.dv_xname, 279 command & PCI_PMCSR_STATE_MASK); 280 281 command &= ~PCI_PMCSR_STATE_MASK; 282 pci_conf_write(pc, pa->pa_tag, 283 pmreg + PCI_PMCSR, command); 284 285 /* Restore PCI config data. */ 286 pci_conf_write(pc, pa->pa_tag, RTK_PCI_LOIO, iobase); 287 pci_conf_write(pc, pa->pa_tag, RTK_PCI_LOMEM, membase); 288 pci_conf_write(pc, pa->pa_tag, PCI_INTERRUPT_REG, irq); 289 } 290 } 291 292 /* 293 * Map control/status registers. 294 */ 295 command = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 296 command |= PCI_COMMAND_MASTER_ENABLE; 297 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, command); 298 299 ioh_valid = (pci_mapreg_map(pa, RTK_PCI_LOIO, PCI_MAPREG_TYPE_IO, 0, 300 &iot, &ioh, NULL, &iosize) == 0); 301 memh_valid = (pci_mapreg_map(pa, RTK_PCI_LOMEM, PCI_MAPREG_TYPE_MEM, 0, 302 &memt, &memh, NULL, &memsize) == 0); 303 if (ioh_valid) { 304 sc->rtk_btag = iot; 305 sc->rtk_bhandle = ioh; 306 bsize = iosize; 307 } else if (memh_valid) { 308 sc->rtk_btag = memt; 309 sc->rtk_bhandle = memh; 310 bsize = memsize; 311 } else { 312 aprint_error("%s: can't map registers\n", sc->sc_dev.dv_xname); 313 return; 314 } 315 316 t = re_devs; 317 hwrev = CSR_READ_4(sc, RTK_TXCFG) & RTK_TXCFG_HWREV; 318 319 while (t->rtk_name != NULL) { 320 if ((PCI_VENDOR(pa->pa_id) == t->rtk_vid) && 321 (PCI_PRODUCT(pa->pa_id) == t->rtk_did)) { 322 323 if (t->rtk_basetype == hwrev) 324 break; 325 } 326 t++; 327 } 328 aprint_normal(": %s\n", t->rtk_name); 329 330 hw_rev = re_hwrevs; 331 hwrev = CSR_READ_4(sc, RTK_TXCFG) & RTK_TXCFG_HWREV; 332 while (hw_rev->rtk_desc != NULL) { 333 if (hw_rev->rtk_rev == hwrev) { 334 sc->rtk_type = hw_rev->rtk_type; 335 break; 336 } 337 hw_rev++; 338 } 339 340 sc->sc_dmat = pa->pa_dmat; 341 342 /* 343 * No power/enable/disable machinery for PCI attac; 344 * mark the card enabled now. 345 */ 346 sc->sc_flags |= RTK_ENABLED; 347 348 /* Hook interrupt last to avoid having to lock softc */ 349 /* Allocate interrupt */ 350 if (pci_intr_map(pa, &ih)) { 351 aprint_error("%s: couldn't map interrupt\n", 352 sc->sc_dev.dv_xname); 353 return; 354 } 355 intrstr = pci_intr_string(pc, ih); 356 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, re_intr, sc); 357 if (psc->sc_ih == NULL) { 358 aprint_error("%s: couldn't establish interrupt", 359 sc->sc_dev.dv_xname); 360 if (intrstr != NULL) 361 aprint_error(" at %s", intrstr); 362 aprint_error("\n"); 363 return; 364 } 365 aprint_normal("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); 366 367 re_attach(sc); 368 369 /* 370 * Perform hardware diagnostic on the original RTL8169. 371 * Some 32-bit cards were incorrectly wired and would 372 * malfunction if plugged into a 64-bit slot. 373 */ 374 if (hwrev == RTK_HWREV_8169) { 375 error = re_diag(sc); 376 if (error) { 377 aprint_error( 378 "%s: attach aborted due to hardware diag failure\n", 379 sc->sc_dev.dv_xname); 380 381 re_detach(sc); 382 383 if (psc->sc_ih != NULL) { 384 pci_intr_disestablish(pc, psc->sc_ih); 385 psc->sc_ih = NULL; 386 } 387 388 if (ioh_valid) 389 bus_space_unmap(iot, ioh, iosize); 390 if (memh_valid) 391 bus_space_unmap(memt, memh, memsize); 392 } 393 } 394 } 395
Indexes created Tue Oct 28 12:10:06 GMT 2025