if_re_pci.c revision 1.30 1 /* $NetBSD: if_re_pci.c,v 1.30 2007/10/19 12:00:47 ad Exp $ */
2
3 /*
4 * Copyright (c) 1997, 1998-2003
5 * Bill Paul <wpaul (at) windriver.com>. All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. All advertising materials mentioning features or use of this software
16 * must display the following acknowledgement:
17 * This product includes software developed by Bill Paul.
18 * 4. Neither the name of the author nor the names of any co-contributors
19 * may be used to endorse or promote products derived from this software
20 * without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
32 * THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35 /* $FreeBSD: /repoman/r/ncvs/src/sys/dev/re/if_re.c,v 1.20 2004/04/11 20:34:08 ru Exp $ */
36
37 /*
38 * RealTek 8139C+/8169/8169S/8110S PCI NIC driver
39 *
40 * Written by Bill Paul <wpaul (at) windriver.com>
41 * Senior Networking Software Engineer
42 * Wind River Systems
43 *
44 * NetBSD bus-specific frontends for written by
45 * Jonathan Stone <jonathan (at) netbsd.org>
46 */
47
48 #include <sys/cdefs.h>
49
50 #include "bpfilter.h"
51 #include "vlan.h"
52
53 #include <sys/types.h>
54
55 #include <sys/param.h>
56 #include <sys/endian.h>
57 #include <sys/systm.h>
58 #include <sys/sockio.h>
59 #include <sys/mbuf.h>
60 #include <sys/malloc.h>
61 #include <sys/kernel.h>
62 #include <sys/socket.h>
63 #include <sys/device.h>
64
65 #include <net/if.h>
66 #include <net/if_arp.h>
67 #include <net/if_dl.h>
68 #include <net/if_ether.h>
69 #include <net/if_media.h>
70 #include <net/if_vlanvar.h>
71
72 #include <sys/bus.h>
73
74 #include <dev/mii/mii.h>
75 #include <dev/mii/miivar.h>
76
77 #include <dev/pci/pcireg.h>
78 #include <dev/pci/pcivar.h>
79 #include <dev/pci/pcidevs.h>
80
81 #include <dev/ic/rtl81x9reg.h>
82 #include <dev/ic/rtl81x9var.h>
83 #include <dev/ic/rtl8169var.h>
84
85 struct re_pci_softc {
86 struct rtk_softc sc_rtk;
87
88 void *sc_ih;
89 pci_chipset_tag_t sc_pc;
90 pcitag_t sc_pcitag;
91 };
92
93 static int re_pci_match(struct device *, struct cfdata *, void *);
94 static void re_pci_attach(struct device *, struct device *, void *);
95
96 /*
97 * Various supported device vendors/types and their names.
98 */
99 static const struct rtk_type re_devs[] = {
100 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8139,
101 RTK_8139CPLUS,
102 "RealTek 8139C+ 10/100BaseTX" },
103 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8101E,
104 RTK_8101E,
105 "RealTek 8100E/8101E PCIe 10/100BaseTX" },
106 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8168,
107 RTK_8168,
108 "RealTek 8168B/8111B PCIe Gigabit Ethernet" },
109 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8169,
110 RTK_8169,
111 "RealTek 8169/8110 Gigabit Ethernet" },
112 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8169SC,
113 RTK_8169,
114 "RealTek 8169SC/8110SC Single-chip Gigabit Ethernet" },
115 { PCI_VENDOR_COREGA, PCI_PRODUCT_COREGA_LAPCIGT,
116 RTK_8169,
117 "Corega CG-LAPCIGT Gigabit Ethernet" },
118 { PCI_VENDOR_DLINK, PCI_PRODUCT_DLINK_DGE528T,
119 RTK_8169,
120 "D-Link DGE-528T Gigabit Ethernet" },
121 { PCI_VENDOR_USR2, PCI_PRODUCT_USR2_USR997902,
122 RTK_8169,
123 "US Robotics (3Com) USR997902 Gigabit Ethernet" },
124 { PCI_VENDOR_LINKSYS, PCI_PRODUCT_LINKSYS_EG1032,
125 RTK_8169,
126 "Linksys EG1032 rev. 3 Gigabit Ethernet" },
127 { 0, 0, 0, NULL }
128 };
129
130 #define RE_LINKSYS_EG1032_SUBID 0x00241737
131
132 CFATTACH_DECL(re_pci, sizeof(struct re_pci_softc), re_pci_match, re_pci_attach,
133 NULL, NULL);
134
135 /*
136 * Probe for a RealTek 8139C+/8169/8110 chip. Check the PCI vendor and device
137 * IDs against our list and return a device name if we find a match.
138 */
139 static int
140 re_pci_match(struct device *parent, struct cfdata *match, void *aux)
141 {
142 const struct rtk_type *t;
143 struct pci_attach_args *pa = aux;
144 pcireg_t subid;
145
146 subid = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
147
148 /* special-case Linksys EG1032, since rev 2 uses sk(4) */
149 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_LINKSYS &&
150 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_LINKSYS_EG1032) {
151 if (subid != RE_LINKSYS_EG1032_SUBID)
152 return 0;
153 }
154 /* Don't match 8139 other than C-PLUS */
155 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_REALTEK &&
156 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_REALTEK_RT8139) {
157 if (PCI_REVISION(pa->pa_class) != 0x20)
158 return 0;
159 }
160
161 t = re_devs;
162
163 while (t->rtk_name != NULL) {
164 if ((PCI_VENDOR(pa->pa_id) == t->rtk_vid) &&
165 (PCI_PRODUCT(pa->pa_id) == t->rtk_did)) {
166 return 2; /* defect rtk(4) */
167 }
168 t++;
169 }
170
171 return 0;
172 }
173
174 static void
175 re_pci_attach(struct device *parent, struct device *self, void *aux)
176 {
177 struct re_pci_softc *psc = (void *)self;
178 struct rtk_softc *sc = &psc->sc_rtk;
179 struct pci_attach_args *pa = aux;
180 pci_chipset_tag_t pc = pa->pa_pc;
181 pci_intr_handle_t ih;
182 const char *intrstr = NULL;
183 const struct rtk_type *t;
184 uint32_t hwrev;
185 int error = 0;
186 pcireg_t pmreg, memtype;
187 bool ioh_valid, memh_valid;
188 pcireg_t command;
189 bus_space_tag_t iot, memt;
190 bus_space_handle_t ioh, memh;
191 bus_size_t iosize, memsize, bsize;
192
193
194 /*
195 * Handle power management nonsense.
196 */
197 if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PWRMGMT, &pmreg, 0)) {
198 command = pci_conf_read(pc, pa->pa_tag, pmreg + PCI_PMCSR);
199 if (command & PCI_PMCSR_STATE_MASK) {
200 u_int32_t iobase, membase, irq;
201
202 /* Save important PCI config data. */
203 iobase = pci_conf_read(pc, pa->pa_tag, RTK_PCI_LOIO);
204 membase = pci_conf_read(pc, pa->pa_tag, RTK_PCI_LOMEM);
205 irq = pci_conf_read(pc, pa->pa_tag, PCI_INTERRUPT_REG);
206
207 /* Reset the power state. */
208 aprint_normal("%s: chip is is in D%d power mode "
209 "-- setting to D0\n", sc->sc_dev.dv_xname,
210 command & PCI_PMCSR_STATE_MASK);
211
212 command &= ~PCI_PMCSR_STATE_MASK;
213 pci_conf_write(pc, pa->pa_tag,
214 pmreg + PCI_PMCSR, command);
215
216 /* Restore PCI config data. */
217 pci_conf_write(pc, pa->pa_tag, RTK_PCI_LOIO, iobase);
218 pci_conf_write(pc, pa->pa_tag, RTK_PCI_LOMEM, membase);
219 pci_conf_write(pc, pa->pa_tag, PCI_INTERRUPT_REG, irq);
220 }
221 }
222
223 /*
224 * Map control/status registers.
225 */
226 command = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
227 command |= PCI_COMMAND_MASTER_ENABLE;
228 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, command);
229
230 ioh_valid = (pci_mapreg_map(pa, RTK_PCI_LOIO, PCI_MAPREG_TYPE_IO, 0,
231 &iot, &ioh, NULL, &iosize) == 0);
232 memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, RTK_PCI_LOMEM);
233 switch (memtype) {
234 case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT:
235 case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_64BIT:
236 memh_valid = (pci_mapreg_map(pa, RTK_PCI_LOMEM,
237 memtype, 0, &memt, &memh, NULL, &memsize) == 0);
238 break;
239 default:
240 memh_valid = 0;
241 break;
242 }
243
244 if (ioh_valid) {
245 sc->rtk_btag = iot;
246 sc->rtk_bhandle = ioh;
247 bsize = iosize;
248 } else if (memh_valid) {
249 sc->rtk_btag = memt;
250 sc->rtk_bhandle = memh;
251 bsize = memsize;
252 } else {
253 aprint_error("%s: can't map registers\n", sc->sc_dev.dv_xname);
254 return;
255 }
256
257 t = re_devs;
258 hwrev = CSR_READ_4(sc, RTK_TXCFG) & RTK_TXCFG_HWREV;
259
260 while (t->rtk_name != NULL) {
261 if ((PCI_VENDOR(pa->pa_id) == t->rtk_vid) &&
262 (PCI_PRODUCT(pa->pa_id) == t->rtk_did)) {
263 break;
264 }
265 t++;
266 }
267
268 if (t->rtk_basetype == RTK_8139CPLUS)
269 sc->sc_quirk |= RTKQ_8139CPLUS;
270
271 if (t->rtk_basetype == RTK_8168 ||
272 t->rtk_basetype == RTK_8101E)
273 sc->sc_quirk |= RTKQ_PCIE;
274
275 aprint_normal(": %s (rev. 0x%02x)\n",
276 t->rtk_name, PCI_REVISION(pa->pa_class));
277
278 sc->sc_dmat = pa->pa_dmat;
279
280 /*
281 * No power/enable/disable machinery for PCI attach;
282 * mark the card enabled now.
283 */
284 sc->sc_flags |= RTK_ENABLED;
285
286 /* Hook interrupt last to avoid having to lock softc */
287 /* Allocate interrupt */
288 if (pci_intr_map(pa, &ih)) {
289 aprint_error("%s: couldn't map interrupt\n",
290 sc->sc_dev.dv_xname);
291 return;
292 }
293 intrstr = pci_intr_string(pc, ih);
294 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, re_intr, sc);
295 if (psc->sc_ih == NULL) {
296 aprint_error("%s: couldn't establish interrupt",
297 sc->sc_dev.dv_xname);
298 if (intrstr != NULL)
299 aprint_error(" at %s", intrstr);
300 aprint_error("\n");
301 return;
302 }
303 aprint_normal("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr);
304
305 re_attach(sc);
306
307 /*
308 * Perform hardware diagnostic on the original RTL8169.
309 * Some 32-bit cards were incorrectly wired and would
310 * malfunction if plugged into a 64-bit slot.
311 */
312 if (hwrev == RTK_HWREV_8169) {
313 error = re_diag(sc);
314 if (error) {
315 aprint_error(
316 "%s: attach aborted due to hardware diag failure\n",
317 sc->sc_dev.dv_xname);
318
319 re_detach(sc);
320
321 if (psc->sc_ih != NULL) {
322 pci_intr_disestablish(pc, psc->sc_ih);
323 psc->sc_ih = NULL;
324 }
325
326 if (ioh_valid)
327 bus_space_unmap(iot, ioh, iosize);
328 if (memh_valid)
329 bus_space_unmap(memt, memh, memsize);
330 }
331 }
332 }
333