if_re_pci.c revision 1.48.8.1
1 /* $NetBSD: if_re_pci.c,v 1.48.8.1 2018/11/26 01:52:32 pgoyette Exp $ */ 2 3 /* 4 * Copyright (c) 1997, 1998-2003 5 * Bill Paul <wpaul (at) windriver.com>. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by Bill Paul. 18 * 4. Neither the name of the author nor the names of any co-contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 32 * THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35 /* $FreeBSD: /repoman/r/ncvs/src/sys/dev/re/if_re.c,v 1.20 2004/04/11 20:34:08 ru Exp $ */ 36 37 /* 38 * RealTek 8139C+/8169/8169S/8110S PCI NIC driver 39 * 40 * Written by Bill Paul <wpaul (at) windriver.com> 41 * Senior Networking Software Engineer 42 * Wind River Systems 43 * 44 * NetBSD bus-specific frontends for written by 45 * Jonathan Stone <jonathan (at) netbsd.org> 46 */ 47 48 #include <sys/cdefs.h> 49 __KERNEL_RCSID(0, "$NetBSD: if_re_pci.c,v 1.48.8.1 2018/11/26 01:52:32 pgoyette Exp $"); 50 51 #include <sys/types.h> 52 53 #include <sys/param.h> 54 #include <sys/systm.h> 55 #include <sys/device.h> 56 57 #include <net/if.h> 58 #include <net/if_ether.h> 59 #include <net/if_media.h> 60 61 #include <sys/bus.h> 62 63 #include <dev/mii/mii.h> 64 #include <dev/mii/miivar.h> 65 66 #include <dev/pci/pcireg.h> 67 #include <dev/pci/pcivar.h> 68 #include <dev/pci/pcidevs.h> 69 70 #include <dev/ic/rtl81x9reg.h> 71 #include <dev/ic/rtl81x9var.h> 72 #include <dev/ic/rtl8169var.h> 73 74 struct re_pci_softc { 75 struct rtk_softc sc_rtk; 76 77 void *sc_ih; 78 pci_intr_handle_t *sc_pihp; 79 pci_chipset_tag_t sc_pc; 80 }; 81 82 static int re_pci_match(device_t, cfdata_t, void *); 83 static void re_pci_attach(device_t, device_t, void *); 84 static int re_pci_detach(device_t, int); 85 86 CFATTACH_DECL_NEW(re_pci, sizeof(struct re_pci_softc), 87 re_pci_match, re_pci_attach, re_pci_detach, NULL); 88 89 /* 90 * Various supported device vendors/types and their names. 91 */ 92 static const struct rtk_type re_devs[] = { 93 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8139, 94 RTK_8139CPLUS, 95 "RealTek 8139C+ 10/100BaseTX" }, 96 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8101E, 97 RTK_8101E, 98 "RealTek 8100E/8101E/8102E/8102EL PCIe 10/100BaseTX" }, 99 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8168, 100 RTK_8168, 101 "RealTek 8168/8111 PCIe Gigabit Ethernet" }, 102 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8169, 103 RTK_8169, 104 "RealTek 8169/8110 Gigabit Ethernet" }, 105 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8169SC, 106 RTK_8169, 107 "RealTek 8169SC/8110SC Single-chip Gigabit Ethernet" }, 108 { PCI_VENDOR_COREGA, PCI_PRODUCT_COREGA_LAPCIGT, 109 RTK_8169, 110 "Corega CG-LAPCIGT Gigabit Ethernet" }, 111 { PCI_VENDOR_DLINK, PCI_PRODUCT_DLINK_DGE528T, 112 RTK_8169, 113 "D-Link DGE-528T Gigabit Ethernet" }, 114 { PCI_VENDOR_USR2, PCI_PRODUCT_USR2_USR997902, 115 RTK_8169, 116 "US Robotics (3Com) USR997902 Gigabit Ethernet" }, 117 { PCI_VENDOR_LINKSYS, PCI_PRODUCT_LINKSYS_EG1032, 118 RTK_8169, 119 "Linksys EG1032 rev. 3 Gigabit Ethernet" }, 120 }; 121 122 static const struct rtk_type * 123 re_pci_lookup(const struct pci_attach_args * pa) 124 { 125 int i; 126 127 for(i = 0; i < __arraycount(re_devs); i++) { 128 if (PCI_VENDOR(pa->pa_id) != re_devs[i].rtk_vid) 129 continue; 130 if (PCI_PRODUCT(pa->pa_id) == re_devs[i].rtk_did) 131 return &re_devs[i]; 132 } 133 134 return NULL; 135 } 136 137 #define RE_LINKSYS_EG1032_SUBID 0x00241737 138 139 /* 140 * Probe for a RealTek 8139C+/8169/8110 chip. Check the PCI vendor and device 141 * IDs against our list and return a device name if we find a match. 142 */ 143 static int 144 re_pci_match(device_t parent, cfdata_t cf, void *aux) 145 { 146 struct pci_attach_args *pa = aux; 147 pcireg_t subid; 148 149 subid = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG); 150 151 /* special-case Linksys EG1032, since rev 2 uses sk(4) */ 152 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_LINKSYS && 153 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_LINKSYS_EG1032) { 154 if (subid != RE_LINKSYS_EG1032_SUBID) 155 return 0; 156 } 157 158 /* Don't match 8139 other than C-PLUS */ 159 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_REALTEK && 160 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_REALTEK_RT8139) { 161 if (PCI_REVISION(pa->pa_class) != 0x20) 162 return 0; 163 } 164 165 if (re_pci_lookup(pa) != NULL) 166 return 2; /* defeat rtk(4) */ 167 168 return 0; 169 } 170 171 static void 172 re_pci_attach(device_t parent, device_t self, void *aux) 173 { 174 struct re_pci_softc *psc = device_private(self); 175 struct rtk_softc *sc = &psc->sc_rtk; 176 struct pci_attach_args *pa = aux; 177 pci_chipset_tag_t pc = pa->pa_pc; 178 const char *intrstr = NULL; 179 const struct rtk_type *t; 180 uint32_t hwrev; 181 pcireg_t command, memtype; 182 bool ioh_valid, memh_valid; 183 bus_space_tag_t iot, memt; 184 bus_space_handle_t ioh, memh; 185 bus_size_t iosize, memsize; 186 char intrbuf[PCI_INTRSTR_LEN]; 187 188 sc->sc_dev = self; 189 psc->sc_pc = pa->pa_pc; 190 191 command = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 192 command |= PCI_COMMAND_MASTER_ENABLE; 193 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, command); 194 195 /* 196 * Map control/status registers. 197 */ 198 ioh_valid = (pci_mapreg_map(pa, RTK_PCI_LOIO, PCI_MAPREG_TYPE_IO, 0, 199 &iot, &ioh, NULL, &iosize) == 0); 200 memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, RTK_PCI_LOMEM); 201 switch (memtype) { 202 case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT: 203 case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_64BIT: 204 memh_valid = 205 (pci_mapreg_map(pa, RTK_PCI_LOMEM, 206 memtype, 0, &memt, &memh, NULL, &memsize) == 0) || 207 (pci_mapreg_map(pa, RTK_PCI_LOMEM + 4, 208 PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_64BIT, 209 0, &memt, &memh, NULL, &memsize) == 0); 210 break; 211 default: 212 memh_valid = 0; 213 break; 214 } 215 216 if (ioh_valid) { 217 sc->rtk_btag = iot; 218 sc->rtk_bhandle = ioh; 219 sc->rtk_bsize = iosize; 220 if (memh_valid) 221 bus_space_unmap(memt, memh, memsize); 222 } else if (memh_valid) { 223 sc->rtk_btag = memt; 224 sc->rtk_bhandle = memh; 225 sc->rtk_bsize = memsize; 226 } else { 227 aprint_error(": can't map registers\n"); 228 return; 229 } 230 231 t = re_pci_lookup(pa); 232 KASSERT(t != NULL); 233 234 pci_aprint_devinfo_fancy(pa, NULL, t->rtk_name, 1); 235 236 if (t->rtk_basetype == RTK_8139CPLUS) 237 sc->sc_quirk |= RTKQ_8139CPLUS; 238 239 if (t->rtk_basetype == RTK_8168 || 240 t->rtk_basetype == RTK_8101E) 241 sc->sc_quirk |= RTKQ_PCIE; 242 243 if (t->rtk_basetype == RTK_8168) 244 sc->sc_quirk |= RTKQ_IM_HW; 245 246 if (pci_dma64_available(pa) && (sc->sc_quirk & RTKQ_PCIE)) 247 sc->sc_dmat = pa->pa_dmat64; 248 else 249 sc->sc_dmat = pa->pa_dmat; 250 251 /* 252 * No power/enable/disable machinery for PCI attach; 253 * mark the card enabled now. 254 */ 255 sc->sc_flags |= RTK_ENABLED; 256 257 /* Hook interrupt last to avoid having to lock softc */ 258 /* Allocate interrupt */ 259 if (pci_intr_alloc(pa, &psc->sc_pihp, NULL, 0)) { 260 aprint_error_dev(self, "couldn't map interrupt\n"); 261 return; 262 } 263 intrstr = pci_intr_string(pc, psc->sc_pihp[0], intrbuf, 264 sizeof(intrbuf)); 265 psc->sc_ih = pci_intr_establish_xname(pc, psc->sc_pihp[0], IPL_NET, 266 re_intr, sc, device_xname(sc->sc_dev)); 267 if (psc->sc_ih == NULL) { 268 aprint_error_dev(self, "couldn't establish interrupt"); 269 if (intrstr != NULL) 270 aprint_error(" at %s", intrstr); 271 aprint_error("\n"); 272 return; 273 } 274 aprint_normal_dev(self, "interrupting at %s\n", intrstr); 275 276 re_attach(sc); 277 278 hwrev = CSR_READ_4(sc, RTK_TXCFG) & RTK_TXCFG_HWREV; 279 280 /* 281 * Perform hardware diagnostic on the original RTL8169. 282 * Some 32-bit cards were incorrectly wired and would 283 * malfunction if plugged into a 64-bit slot. 284 */ 285 if (hwrev == RTK_HWREV_8169) { 286 if (re_diag(sc)) { 287 re_pci_detach(self, 0); 288 aprint_error_dev(self, "disabled\n"); 289 } 290 } 291 } 292 293 static int 294 re_pci_detach(device_t self, int flags) 295 { 296 struct re_pci_softc *psc = device_private(self); 297 struct rtk_softc *sc = &psc->sc_rtk; 298 int rv; 299 300 if ((sc->sc_flags & RTK_ATTACHED) != 0) 301 /* re_stop() */ 302 sc->ethercom.ec_if.if_stop(&sc->ethercom.ec_if, 0); 303 304 rv = re_detach(sc); 305 if (rv) 306 return rv; 307 308 if (psc->sc_ih != NULL) { 309 pci_intr_disestablish(psc->sc_pc, psc->sc_ih); 310 psc->sc_ih = NULL; 311 } 312 313 if (psc->sc_pihp != NULL) { 314 pci_intr_release(psc->sc_pc, psc->sc_pihp, 1); 315 psc->sc_pihp = NULL; 316 } 317 318 if (sc->rtk_bsize != 0) { 319 bus_space_unmap(sc->rtk_btag, sc->rtk_bhandle, sc->rtk_bsize); 320 sc->rtk_bsize = 0; 321 } 322 323 return 0; 324 } 325
Indexes created Tue Oct 28 12:10:06 GMT 2025