if_rgereg.h revision 1.1 1 1.1 sevan /* $NetBSD: if_rgereg.h,v 1.1 2020/01/11 20:56:51 sevan Exp $ */
2 1.1 sevan /* $OpenBSD: if_rgereg.h,v 1.1 2019/11/18 03:03:37 kevlo Exp $ */
3 1.1 sevan
4 1.1 sevan /*
5 1.1 sevan * Copyright (c) 2019 Kevin Lo <kevlo (at) openbsd.org>
6 1.1 sevan *
7 1.1 sevan * Permission to use, copy, modify, and distribute this software for any
8 1.1 sevan * purpose with or without fee is hereby granted, provided that the above
9 1.1 sevan * copyright notice and this permission notice appear in all copies.
10 1.1 sevan *
11 1.1 sevan * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 1.1 sevan * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 1.1 sevan * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 1.1 sevan * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 1.1 sevan * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 1.1 sevan * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 1.1 sevan * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18 1.1 sevan */
19 1.1 sevan
20 1.1 sevan #define RGE_PCI_BAR0 PCI_MAPREG_START
21 1.1 sevan #define RGE_PCI_BAR1 (PCI_MAPREG_START + 4)
22 1.1 sevan #define RGE_PCI_BAR2 (PCI_MAPREG_START + 8)
23 1.1 sevan
24 1.1 sevan #define RGE_MAC0 0x0000
25 1.1 sevan #define RGE_MAC4 0x0004
26 1.1 sevan #define RGE_MAR0 0x0008
27 1.1 sevan #define RGE_MAR4 0x000c
28 1.1 sevan #define RGE_TXDESC_ADDR_LO 0x0020
29 1.1 sevan #define RGE_TXDESC_ADDR_HI 0x0024
30 1.1 sevan #define RGE_CMD 0x0037
31 1.1 sevan #define RGE_IMR 0x0038
32 1.1 sevan #define RGE_ISR 0x003c
33 1.1 sevan #define RGE_TXCFG 0x0040
34 1.1 sevan #define RGE_RXCFG 0x0044
35 1.1 sevan #define RGE_TIMERCNT 0x0048
36 1.1 sevan #define RGE_EECMD 0x0050
37 1.1 sevan #define RGE_CFG0 0x0051
38 1.1 sevan #define RGE_CFG1 0x0052
39 1.1 sevan #define RGE_CFG2 0x0053
40 1.1 sevan #define RGE_CFG3 0x0054
41 1.1 sevan #define RGE_CFG4 0x0055
42 1.1 sevan #define RGE_CFG5 0x0056
43 1.1 sevan #define RGE_TDFNR 0x0057
44 1.1 sevan #define RGE_TIMERINT 0x0058
45 1.1 sevan #define RGE_CSIDR 0x0064
46 1.1 sevan #define RGE_CSIAR 0x0068
47 1.1 sevan #define RGE_PHYSTAT 0x006c
48 1.1 sevan #define RGE_PMCH 0x006f
49 1.1 sevan #define RGE_EPHYAR 0x0080
50 1.1 sevan #define RGE_TXSTART 0x0090
51 1.1 sevan #define RGE_MACOCP 0x00b0
52 1.1 sevan #define RGE_PHYOCP 0x00b8
53 1.1 sevan #define RGE_TWICMD 0x00d2
54 1.1 sevan #define RGE_MCUCMD 0x00d3
55 1.1 sevan #define RGE_RXMAXSIZE 0x00da
56 1.1 sevan #define RGE_CPLUSCMD 0x00e0
57 1.1 sevan #define RGE_RXDESC_ADDR_LO 0x00e4
58 1.1 sevan #define RGE_RXDESC_ADDR_HI 0x00e8
59 1.1 sevan #define RGE_PPSW 0x00f2
60 1.1 sevan #define RGE_IM(i) (0x0a00 + (i) * 4)
61 1.1 sevan #define RGE_PHYBASE 0x0a40
62 1.1 sevan #define RGE_ADDR0 0x19e0
63 1.1 sevan #define RGE_ADDR1 0x19e4
64 1.1 sevan
65 1.1 sevan /* Flags for register RGE_CMD */
66 1.1 sevan #define RGE_CMD_RXBUF_EMPTY 0x01
67 1.1 sevan #define RGE_CMD_TXENB 0x04
68 1.1 sevan #define RGE_CMD_RXENB 0x08
69 1.1 sevan #define RGE_CMD_RESET 0x10
70 1.1 sevan
71 1.1 sevan /* Flags for register RGE_ISR */
72 1.1 sevan #define RGE_ISR_RX_OK 0x00000001
73 1.1 sevan #define RGE_ISR_RX_ERR 0x00000002
74 1.1 sevan #define RGE_ISR_TX_OK 0x00000004
75 1.1 sevan #define RGE_ISR_TX_ERR 0x00000008
76 1.1 sevan #define RGE_ISR_RX_DESC_UNAVAIL 0x00000010
77 1.1 sevan #define RGE_ISR_LINKCHG 0x00000020
78 1.1 sevan #define RGE_ISR_RX_FIFO_OFLOW 0x00000040
79 1.1 sevan #define RGE_ISR_TX_DESC_UNAVAIL 0x00000080
80 1.1 sevan #define RGE_ISR_SWI 0x00000100
81 1.1 sevan #define RGE_ISR_PCS_TIMEOUT 0x00004000
82 1.1 sevan #define RGE_ISR_SYSTEM_ERR 0x00008000
83 1.1 sevan
84 1.1 sevan #define RGE_INTRS \
85 1.1 sevan (RGE_ISR_RX_OK | RGE_ISR_RX_ERR | RGE_ISR_TX_OK | \
86 1.1 sevan RGE_ISR_TX_ERR | RGE_ISR_RX_DESC_UNAVAIL | \
87 1.1 sevan RGE_ISR_RX_FIFO_OFLOW | RGE_ISR_SYSTEM_ERR)
88 1.1 sevan
89 1.1 sevan #define RGE_INTRS_TIMER \
90 1.1 sevan (RGE_ISR_RX_ERR | RGE_ISR_TX_ERR | RGE_ISR_PCS_TIMEOUT | \
91 1.1 sevan RGE_ISR_SYSTEM_ERR)
92 1.1 sevan
93 1.1 sevan /* Flags for register RGE_TXCFG */
94 1.1 sevan #define RGE_TXCFG_HWREV 0x7cf00000
95 1.1 sevan
96 1.1 sevan /* Flags for register RGE_RXCFG */
97 1.1 sevan #define RGE_RXCFG_ALLPHYS 0x00000001
98 1.1 sevan #define RGE_RXCFG_INDIV 0x00000002
99 1.1 sevan #define RGE_RXCFG_MULTI 0x00000004
100 1.1 sevan #define RGE_RXCFG_BROAD 0x00000008
101 1.1 sevan #define RGE_RXCFG_RUNT 0x00000010
102 1.1 sevan #define RGE_RXCFG_ERRPKT 0x00000020
103 1.1 sevan #define RGE_RXCFG_VLANSTRIP 0x00c00000
104 1.1 sevan
105 1.1 sevan /* Flags for register RGE_EECMD */
106 1.1 sevan #define RGE_EECMD_WRITECFG 0xc0
107 1.1 sevan
108 1.1 sevan /* Flags for register RGE_CFG1 */
109 1.1 sevan #define RGE_CFG1_SPEED_DOWN 0x10
110 1.1 sevan
111 1.1 sevan /* Flags for register RGE_CFG2 */
112 1.1 sevan #define RGE_CFG2_CLKREQ_EN 0x80
113 1.1 sevan
114 1.1 sevan /* Flags for register RGE_CFG3 */
115 1.1 sevan #define RGE_CFG3_RDY_TO_L23 0x02
116 1.1 sevan
117 1.1 sevan /* Flags for register RGE_CFG5 */
118 1.1 sevan #define RGE_CFG5_PME_STS 0x01
119 1.1 sevan
120 1.1 sevan /* Flags for register RGE_CSIAR */
121 1.1 sevan #define RGE_CSIAR_BYTE_EN 0x0000000f
122 1.1 sevan #define RGE_CSIAR_BYTE_EN_SHIFT 12
123 1.1 sevan #define RGE_CSIAR_ADDR_MASK 0x00000fff
124 1.1 sevan #define RGE_CSIAR_BUSY 0x80000000
125 1.1 sevan
126 1.1 sevan /* Flags for register RGE_PHYSTAT */
127 1.1 sevan #define RGE_PHYSTAT_FDX 0x0001
128 1.1 sevan #define RGE_PHYSTAT_LINK 0x0002
129 1.1 sevan #define RGE_PHYSTAT_10MBPS 0x0004
130 1.1 sevan #define RGE_PHYSTAT_100MBPS 0x0008
131 1.1 sevan #define RGE_PHYSTAT_1000MBPS 0x0010
132 1.1 sevan #define RGE_PHYSTAT_RXFLOW 0x0020
133 1.1 sevan #define RGE_PHYSTAT_TXFLOW 0x0040
134 1.1 sevan #define RGE_PHYSTAT_2500MBPS 0x0400
135 1.1 sevan
136 1.1 sevan /* Flags for register RGE_EPHYAR */
137 1.1 sevan #define RGE_EPHYAR_DATA_MASK 0x0000ffff
138 1.1 sevan #define RGE_EPHYAR_BUSY 0x80000000
139 1.1 sevan #define RGE_EPHYAR_ADDR_MASK 0x0000007f
140 1.1 sevan #define RGE_EPHYAR_ADDR_SHIFT 16
141 1.1 sevan
142 1.1 sevan /* Flags for register RGE_TXSTART */
143 1.1 sevan #define RGE_TXSTART_START 0x0001
144 1.1 sevan
145 1.1 sevan /* Flags for register RGE_MACOCP */
146 1.1 sevan #define RGE_MACOCP_DATA_MASK 0x0000ffff
147 1.1 sevan #define RGE_MACOCP_BUSY 0x80000000
148 1.1 sevan #define RGE_MACOCP_ADDR_SHIFT 16
149 1.1 sevan
150 1.1 sevan /* Flags for register RGE_PHYOCP */
151 1.1 sevan #define RGE_PHYOCP_DATA_MASK 0x0000ffff
152 1.1 sevan #define RGE_PHYOCP_BUSY 0x80000000
153 1.1 sevan #define RGE_PHYOCP_ADDR_SHIFT 16
154 1.1 sevan
155 1.1 sevan /* Flags for register RGE_MCUCMD */
156 1.1 sevan #define RGE_MCUCMD_RXFIFO_EMPTY 0x10
157 1.1 sevan #define RGE_MCUCMD_TXFIFO_EMPTY 0x20
158 1.1 sevan #define RGE_MCUCMD_IS_OOB 0x80
159 1.1 sevan
160 1.1 sevan /* Flags for register RGE_CPLUSCMD */
161 1.1 sevan #define RGE_CPLUSCMD_RXCSUM 0x0020
162 1.1 sevan
163 1.1 sevan #define RGE_TX_NSEGS 32
164 1.1 sevan #define RGE_TX_LIST_CNT 1024
165 1.1 sevan #define RGE_RX_LIST_CNT 1024
166 1.1 sevan #define RGE_ALIGN 256
167 1.1 sevan #define RGE_TX_LIST_SZ (sizeof(struct rge_tx_desc) * RGE_TX_LIST_CNT)
168 1.1 sevan #define RGE_RX_LIST_SZ (sizeof(struct rge_rx_desc) * RGE_RX_LIST_CNT)
169 1.1 sevan #define RGE_NEXT_TX_DESC(x) (((x) + 1) % RGE_TX_LIST_CNT)
170 1.1 sevan #define RGE_NEXT_RX_DESC(x) (((x) + 1) % RGE_RX_LIST_CNT)
171 1.1 sevan #define RGE_ADDR_LO(y) ((uint64_t) (y) & 0xffffffff)
172 1.1 sevan #define RGE_ADDR_HI(y) ((uint64_t) (y) >> 32)
173 1.1 sevan #define RGE_OWN(x) (letoh32((x)->rge_cmdsts) & RGE_RDCMDSTS_OWN)
174 1.1 sevan #define RGE_RXBYTES(x) (letoh32((x)->rge_cmdsts) & \
175 1.1 sevan RGE_RDCMDSTS_FRAGLEN)
176 1.1 sevan
177 1.1 sevan #define RGE_ADV_2500TFDX 0x0080
178 1.1 sevan
179 1.1 sevan /* Tx descriptor */
180 1.1 sevan struct rge_tx_desc {
181 1.1 sevan uint32_t rge_cmdsts;
182 1.1 sevan uint32_t rge_extsts;
183 1.1 sevan uint32_t rge_addrlo;
184 1.1 sevan uint32_t rge_addrhi;
185 1.1 sevan uint32_t reserved[4];
186 1.1 sevan };
187 1.1 sevan
188 1.1 sevan #define RGE_TDCMDSTS_COLL 0x000f0000
189 1.1 sevan #define RGE_TDCMDSTS_EXCESSCOLL 0x00100000
190 1.1 sevan #define RGE_TDCMDSTS_TXERR 0x00800000
191 1.1 sevan #define RGE_TDCMDSTS_EOF 0x10000000
192 1.1 sevan #define RGE_TDCMDSTS_SOF 0x20000000
193 1.1 sevan #define RGE_TDCMDSTS_EOR 0x40000000
194 1.1 sevan #define RGE_TDCMDSTS_OWN 0x80000000
195 1.1 sevan
196 1.1 sevan #define RGE_TDEXTSTS_VTAG 0x00020000
197 1.1 sevan #define RGE_TDEXTSTS_IPCSUM 0x20000000
198 1.1 sevan #define RGE_TDEXTSTS_TCPCSUM 0x40000000
199 1.1 sevan #define RGE_TDEXTSTS_UDPCSUM 0x80000000
200 1.1 sevan
201 1.1 sevan /* Rx descriptor */
202 1.1 sevan struct rge_rx_desc {
203 1.1 sevan uint32_t rge_cmdsts;
204 1.1 sevan uint32_t rge_extsts;
205 1.1 sevan uint32_t rge_addrlo;
206 1.1 sevan uint32_t rge_addrhi;
207 1.1 sevan };
208 1.1 sevan
209 1.1 sevan #define RGE_RDCMDSTS_TCPCSUMERR 0x00004000
210 1.1 sevan #define RGE_RDCMDSTS_UDPCSUMERR 0x00008000
211 1.1 sevan #define RGE_RDCMDSTS_IPCSUMERR 0x00010000
212 1.1 sevan #define RGE_RDCMDSTS_TCPPKT 0x00020000
213 1.1 sevan #define RGE_RDCMDSTS_UDPPKT 0x00040000
214 1.1 sevan #define RGE_RDCMDSTS_RXERRSUM 0x00200000
215 1.1 sevan #define RGE_RDCMDSTS_EOF 0x10000000
216 1.1 sevan #define RGE_RDCMDSTS_SOF 0x20000000
217 1.1 sevan #define RGE_RDCMDSTS_EOR 0x40000000
218 1.1 sevan #define RGE_RDCMDSTS_OWN 0x80000000
219 1.1 sevan #define RGE_RDCMDSTS_FRAGLEN 0x00003fff
220 1.1 sevan
221 1.1 sevan #define RGE_RDEXTSTS_VTAG 0x00010000
222 1.1 sevan #define RGE_RDEXTSTS_VLAN_MASK 0x0000ffff
223 1.1 sevan #define RGE_RDEXTSTS_IPV4 0x40000000
224 1.1 sevan #define RGE_RDEXTSTS_IPV6 0x80000000
225 1.1 sevan
226 1.1 sevan struct rge_txq {
227 1.1 sevan struct mbuf *txq_mbuf;
228 1.1 sevan bus_dmamap_t txq_dmamap;
229 1.1 sevan int txq_descidx;
230 1.1 sevan };
231 1.1 sevan
232 1.1 sevan struct rge_rxq {
233 1.1 sevan struct mbuf *rxq_mbuf;
234 1.1 sevan bus_dmamap_t rxq_dmamap;
235 1.1 sevan };
236 1.1 sevan
237 1.1 sevan struct rge_list_data {
238 1.1 sevan struct rge_txq rge_txq[RGE_TX_LIST_CNT];
239 1.1 sevan int rge_txq_prodidx;
240 1.1 sevan int rge_txq_considx;
241 1.1 sevan struct rge_rxq rge_rxq[RGE_RX_LIST_CNT];
242 1.1 sevan int rge_rxq_prodidx;
243 1.1 sevan
244 1.1 sevan bus_dma_segment_t rge_tx_listseg;
245 1.1 sevan int rge_tx_listnseg;
246 1.1 sevan bus_dmamap_t rge_tx_list_map;
247 1.1 sevan struct rge_tx_desc *rge_tx_list;
248 1.1 sevan bus_dma_segment_t rge_rx_listseg;
249 1.1 sevan int rge_rx_listnseg;
250 1.1 sevan bus_dmamap_t rge_rx_list_map;
251 1.1 sevan struct rge_rx_desc *rge_rx_list;
252 1.1 sevan };
253 1.1 sevan
254 1.1 sevan /* Microcode version */
255 1.1 sevan #define RGE_MAC_CFG2_MCODE_VER 0x0b11
256 1.1 sevan #define RGE_MAC_CFG3_MCODE_VER 0x0b33
257 1.1 sevan
258 1.1 sevan enum rge_mac_type {
259 1.1 sevan MAC_CFG_UNKNOWN = 1,
260 1.1 sevan MAC_CFG2,
261 1.1 sevan MAC_CFG3
262 1.1 sevan };
263 1.1 sevan
264 1.1 sevan #define RGE_TIMEOUT 100
265 1.1 sevan
266 1.1 sevan #define RGE_JUMBO_FRAMELEN 9216
267 1.1 sevan #define RGE_JUMBO_MTU \
268 1.1 sevan (RGE_JUMBO_FRAMELEN - ETHER_HDR_LEN - ETHER_CRC_LEN - \
269 1.1 sevan ETHER_VLAN_ENCAP_LEN)
270 1.1 sevan
271 1.1 sevan #define RGE_TXCFG_CONFIG 0x03000700
272 1.1 sevan #define RGE_RXCFG_CONFIG 0x40c00700
273 1.1 sevan
274 1.1 sevan struct rge_softc {
275 1.1 sevan struct device sc_dev;
276 1.1 sevan struct arpcom sc_arpcom; /* Ethernet common data */
277 1.1 sevan void *sc_ih; /* interrupt vectoring */
278 1.1 sevan bus_space_handle_t rge_bhandle; /* bus space handle */
279 1.1 sevan bus_space_tag_t rge_btag; /* bus space tag */
280 1.1 sevan bus_size_t rge_bsize;
281 1.1 sevan bus_dma_tag_t sc_dmat;
282 1.1 sevan pci_chipset_tag_t sc_pc;
283 1.1 sevan pcitag_t sc_tag;
284 1.1 sevan bus_dma_segment_t sc_rx_seg;
285 1.1 sevan bus_dmamap_t sc_rx_dmamap;
286 1.1 sevan struct ifmedia sc_media; /* media info */
287 1.1 sevan enum rge_mac_type rge_type;
288 1.1 sevan struct mbuf *rge_head;
289 1.1 sevan struct mbuf *rge_tail;
290 1.1 sevan
291 1.1 sevan struct rge_list_data rge_ldata;
292 1.1 sevan
293 1.1 sevan struct task sc_task;
294 1.1 sevan
295 1.1 sevan struct timeout sc_timeout; /* tick timeout */
296 1.1 sevan
297 1.1 sevan uint32_t rge_flags;
298 1.1 sevan #define RGE_FLAG_MSI 0x00000001
299 1.1 sevan
300 1.1 sevan uint32_t rge_intrs;
301 1.1 sevan uint32_t rge_tx_ack;
302 1.1 sevan uint32_t rge_rx_ack;
303 1.1 sevan int rge_timerintr;
304 1.1 sevan
305 1.1 sevan #define RGE_IMTYPE_NONE 0
306 1.1 sevan #define RGE_IMTYPE_SIM 1
307 1.1 sevan };
308 1.1 sevan
309 1.1 sevan /*
310 1.1 sevan * Register space access macros.
311 1.1 sevan */
312 1.1 sevan #define RGE_WRITE_RAW_4(sc, reg, val) \
313 1.1 sevan bus_space_write_raw_region_4(sc->rge_btag, sc->rge_bhandle, reg, val, 4)
314 1.1 sevan #define RGE_WRITE_4(sc, reg, val) \
315 1.1 sevan bus_space_write_4(sc->rge_btag, sc->rge_bhandle, reg, val)
316 1.1 sevan #define RGE_WRITE_2(sc, reg, val) \
317 1.1 sevan bus_space_write_2(sc->rge_btag, sc->rge_bhandle, reg, val)
318 1.1 sevan #define RGE_WRITE_1(sc, reg, val) \
319 1.1 sevan bus_space_write_1(sc->rge_btag, sc->rge_bhandle, reg, val)
320 1.1 sevan
321 1.1 sevan #define RGE_READ_4(sc, reg) \
322 1.1 sevan bus_space_read_4(sc->rge_btag, sc->rge_bhandle, reg)
323 1.1 sevan #define RGE_READ_2(sc, reg) \
324 1.1 sevan bus_space_read_2(sc->rge_btag, sc->rge_bhandle, reg)
325 1.1 sevan #define RGE_READ_1(sc, reg) \
326 1.1 sevan bus_space_read_1(sc->rge_btag, sc->rge_bhandle, reg)
327 1.1 sevan
328 1.1 sevan #define RGE_SETBIT_4(sc, reg, val) \
329 1.1 sevan RGE_WRITE_4(sc, reg, RGE_READ_4(sc, reg) | (val))
330 1.1 sevan #define RGE_SETBIT_2(sc, reg, val) \
331 1.1 sevan RGE_WRITE_2(sc, reg, RGE_READ_2(sc, reg) | (val))
332 1.1 sevan #define RGE_SETBIT_1(sc, reg, val) \
333 1.1 sevan RGE_WRITE_1(sc, reg, RGE_READ_1(sc, reg) | (val))
334 1.1 sevan
335 1.1 sevan #define RGE_CLRBIT_4(sc, reg, val) \
336 1.1 sevan RGE_WRITE_4(sc, reg, RGE_READ_4(sc, reg) & ~(val))
337 1.1 sevan #define RGE_CLRBIT_2(sc, reg, val) \
338 1.1 sevan RGE_WRITE_2(sc, reg, RGE_READ_2(sc, reg) & ~(val))
339 1.1 sevan #define RGE_CLRBIT_1(sc, reg, val) \
340 1.1 sevan RGE_WRITE_1(sc, reg, RGE_READ_1(sc, reg) & ~(val))
341 1.1 sevan
342 1.1 sevan #define RGE_PHY_SETBIT(sc, reg, val) \
343 1.1 sevan rge_write_phy_ocp(sc, reg, rge_read_phy_ocp(sc, reg) | (val))
344 1.1 sevan
345 1.1 sevan #define RGE_PHY_CLRBIT(sc, reg, val) \
346 1.1 sevan rge_write_phy_ocp(sc, reg, rge_read_phy_ocp(sc, reg) & ~(val))
347 1.1 sevan
348 1.1 sevan #define RGE_MAC_SETBIT(sc, reg, val) \
349 1.1 sevan rge_write_mac_ocp(sc, reg, rge_read_mac_ocp(sc, reg) | (val))
350 1.1 sevan
351 1.1 sevan #define RGE_MAC_CLRBIT(sc, reg, val) \
352 1.1 sevan rge_write_mac_ocp(sc, reg, rge_read_mac_ocp(sc, reg) & ~(val))
353 1.1 sevan
354 1.1 sevan #define RTL8125_DEF_BPS \
355 1.1 sevan { 0xf800, 0xe008 }, \
356 1.1 sevan { 0xf802, 0xe01e }, \
357 1.1 sevan { 0xf804, 0xe02e }, \
358 1.1 sevan { 0xf806, 0xe054 }, \
359 1.1 sevan { 0xf808, 0xe057 }, \
360 1.1 sevan { 0xf80a, 0xe059 }, \
361 1.1 sevan { 0xf80c, 0xe05b }, \
362 1.1 sevan { 0xf80e, 0xe05d }, \
363 1.1 sevan { 0xf810, 0x9996 }, \
364 1.1 sevan { 0xf812, 0x49d1 }, \
365 1.1 sevan { 0xf814, 0xf005 }, \
366 1.1 sevan { 0xf816, 0x49d4 }, \
367 1.1 sevan { 0xf818, 0xf10a }, \
368 1.1 sevan { 0xf81a, 0x49d8 }, \
369 1.1 sevan { 0xf81c, 0xf108 }, \
370 1.1 sevan { 0xf81e, 0xc00f }, \
371 1.1 sevan { 0xf820, 0x7100 }, \
372 1.1 sevan { 0xf822, 0x209c }, \
373 1.1 sevan { 0xf824, 0x249c }, \
374 1.1 sevan { 0xf826, 0xc009 }, \
375 1.1 sevan { 0xf828, 0x9900 }, \
376 1.1 sevan { 0xf82a, 0xe004 }, \
377 1.1 sevan { 0xf82c, 0xc006 }, \
378 1.1 sevan { 0xf82e, 0x1900 }, \
379 1.1 sevan { 0xf830, 0x9900 }, \
380 1.1 sevan { 0xf832, 0xc602 }, \
381 1.1 sevan { 0xf834, 0xbe00 }, \
382 1.1 sevan { 0xf836, 0x5a48 }, \
383 1.1 sevan { 0xf838, 0xe0c2 }, \
384 1.1 sevan { 0xf83a, 0x0004 }, \
385 1.1 sevan { 0xf83c, 0xe10a }, \
386 1.1 sevan { 0xf83e, 0xc60f }, \
387 1.1 sevan { 0xf840, 0x73c4 }, \
388 1.1 sevan { 0xf842, 0x49b3 }, \
389 1.1 sevan { 0xf844, 0xf106 }, \
390 1.1 sevan { 0xf846, 0x73c2 }, \
391 1.1 sevan { 0xf848, 0xc608 }, \
392 1.1 sevan { 0xf84a, 0xb406 }, \
393 1.1 sevan { 0xf84c, 0xc609 }, \
394 1.1 sevan { 0xf84e, 0xff80 }, \
395 1.1 sevan { 0xf850, 0xc605 }, \
396 1.1 sevan { 0xf852, 0xb406 }, \
397 1.1 sevan { 0xf854, 0xc605 }, \
398 1.1 sevan { 0xf856, 0xff80 }, \
399 1.1 sevan { 0xf858, 0x0544 }, \
400 1.1 sevan { 0xf85a, 0x0568 }, \
401 1.1 sevan { 0xf85c, 0xe906 }, \
402 1.1 sevan { 0xf85e, 0xcde8 }, \
403 1.1 sevan { 0xf860, 0xc724 }, \
404 1.1 sevan { 0xf862, 0xc624 }, \
405 1.1 sevan { 0xf864, 0x9ee2 }, \
406 1.1 sevan { 0xf866, 0x1e01 }, \
407 1.1 sevan { 0xf868, 0x9ee0 }, \
408 1.1 sevan { 0xf86a, 0x76e0 }, \
409 1.1 sevan { 0xf86c, 0x49e0 }, \
410 1.1 sevan { 0xf86e, 0xf1fe }, \
411 1.1 sevan { 0xf870, 0x76e6 }, \
412 1.1 sevan { 0xf872, 0x486d }, \
413 1.1 sevan { 0xf874, 0x4868 }, \
414 1.1 sevan { 0xf876, 0x9ee4 }, \
415 1.1 sevan { 0xf878, 0x1e03 }, \
416 1.1 sevan { 0xf87a, 0x9ee0 }, \
417 1.1 sevan { 0xf87c, 0x76e0 }, \
418 1.1 sevan { 0xf87e, 0x49e0 }, \
419 1.1 sevan { 0xf880, 0xf1fe }, \
420 1.1 sevan { 0xf882, 0xc615 }, \
421 1.1 sevan { 0xf884, 0x9ee2 }, \
422 1.1 sevan { 0xf886, 0x1e01 }, \
423 1.1 sevan { 0xf888, 0x9ee0 }, \
424 1.1 sevan { 0xf88a, 0x76e0 }, \
425 1.1 sevan { 0xf88c, 0x49e0 }, \
426 1.1 sevan { 0xf88e, 0xf1fe }, \
427 1.1 sevan { 0xf890, 0x76e6 }, \
428 1.1 sevan { 0xf892, 0x486f }, \
429 1.1 sevan { 0xf894, 0x9ee4 }, \
430 1.1 sevan { 0xf896, 0x1e03 }, \
431 1.1 sevan { 0xf898, 0x9ee0 }, \
432 1.1 sevan { 0xf89a, 0x76e0 }, \
433 1.1 sevan { 0xf89c, 0x49e0 }, \
434 1.1 sevan { 0xf89e, 0xf1fe }, \
435 1.1 sevan { 0xf8a0, 0x7196 }, \
436 1.1 sevan { 0xf8a2, 0xc702 }, \
437 1.1 sevan { 0xf8a4, 0xbf00 }, \
438 1.1 sevan { 0xf8a6, 0x5a44 }, \
439 1.1 sevan { 0xf8a8, 0xeb0e }, \
440 1.1 sevan { 0xf8aa, 0x0070 }, \
441 1.1 sevan { 0xf8ac, 0x00c3 }, \
442 1.1 sevan { 0xf8ae, 0x1bc0 }, \
443 1.1 sevan { 0xf8b0, 0xc602 }, \
444 1.1 sevan { 0xf8b2, 0xbe00 }, \
445 1.1 sevan { 0xf8b4, 0x0e26 }, \
446 1.1 sevan { 0xf8b6, 0xc602 }, \
447 1.1 sevan { 0xf8b8, 0xbe00 }, \
448 1.1 sevan { 0xf8ba, 0x0eba }, \
449 1.1 sevan { 0xf8bc, 0xc602 }, \
450 1.1 sevan { 0xf8be, 0xbe00 }, \
451 1.1 sevan { 0xf8c0, 0x0000 }, \
452 1.1 sevan { 0xf8c2, 0xc602 }, \
453 1.1 sevan { 0xf8c4, 0xbe00 }, \
454 1.1 sevan { 0xf8c6, 0x0000 }, \
455 1.1 sevan { 0xf8c8, 0xc602 }, \
456 1.1 sevan { 0xf8ca, 0xbe00 }, \
457 1.1 sevan { 0xf8cc, 0x0000 }, \
458 1.1 sevan { 0xfc26, 0x8000 }, \
459 1.1 sevan { 0xfc2a, 0x0540 }, \
460 1.1 sevan { 0xfc2e, 0x0e24 }, \
461 1.1 sevan { 0xfc30, 0x0eb8 }, \
462 1.1 sevan { 0xfc48, 0x001a }
463 1.1 sevan
464 1.1 sevan #define RTL8125_MAC_CFG2_EPHY \
465 1.1 sevan { 0x0001, 0xa812 }, \
466 1.1 sevan { 0x0009, 0x520c }, \
467 1.1 sevan { 0x0004, 0xd000 }, \
468 1.1 sevan { 0x000d, 0xf702 }, \
469 1.1 sevan { 0x000a, 0x8653 }, \
470 1.1 sevan { 0x0006, 0x001e }, \
471 1.1 sevan { 0x0008, 0x3595 }, \
472 1.1 sevan { 0x0020, 0x9455 }, \
473 1.1 sevan { 0x0021, 0x99ff }, \
474 1.1 sevan { 0x0002, 0x6046 }, \
475 1.1 sevan { 0x0029, 0xfe00 }, \
476 1.1 sevan { 0x0023, 0xab62 }, \
477 1.1 sevan { 0x0041, 0xa80c }, \
478 1.1 sevan { 0x0049, 0x520c }, \
479 1.1 sevan { 0x0044, 0xd000 }, \
480 1.1 sevan { 0x004d, 0xf702 }, \
481 1.1 sevan { 0x004a, 0x8653 }, \
482 1.1 sevan { 0x0046, 0x001e }, \
483 1.1 sevan { 0x0048, 0x3595 }, \
484 1.1 sevan { 0x0060, 0x9455 }, \
485 1.1 sevan { 0x0061, 0x99ff }, \
486 1.1 sevan { 0x0042, 0x6046 }, \
487 1.1 sevan { 0x0069, 0xfe00 }, \
488 1.1 sevan { 0x0063, 0xab62 }
489 1.1 sevan
490 1.1 sevan #define RTL8125_MAC_CFG3_EPHY \
491 1.1 sevan { 0x0004, 0xd000 }, \
492 1.1 sevan { 0x000a, 0x8653 }, \
493 1.1 sevan { 0x0023, 0xab66 }, \
494 1.1 sevan { 0x0020, 0x9455 }, \
495 1.1 sevan { 0x0021, 0x99ff }, \
496 1.1 sevan { 0x0029, 0xfe04 }, \
497 1.1 sevan { 0x0044, 0xd000 }, \
498 1.1 sevan { 0x004a, 0x8653 }, \
499 1.1 sevan { 0x0063, 0xab66 }, \
500 1.1 sevan { 0x0060, 0x9455 }, \
501 1.1 sevan { 0x0061, 0x99ff }, \
502 1.1 sevan { 0x0069, 0xfe04 }
503 1.1 sevan
504 1.1 sevan #define RTL8125_MAC_CFG2_MCU \
505 1.1 sevan { 0xa436, 0xa016 }, \
506 1.1 sevan { 0xa438, 0x0000 }, \
507 1.1 sevan { 0xa436, 0xa012 }, \
508 1.1 sevan { 0xa438, 0x0000 }, \
509 1.1 sevan { 0xa436, 0xa014 }, \
510 1.1 sevan { 0xa438, 0x1800 }, \
511 1.1 sevan { 0xa438, 0x8010 }, \
512 1.1 sevan { 0xa438, 0x1800 }, \
513 1.1 sevan { 0xa438, 0x8013 }, \
514 1.1 sevan { 0xa438, 0x1800 }, \
515 1.1 sevan { 0xa438, 0x8021 }, \
516 1.1 sevan { 0xa438, 0x1800 }, \
517 1.1 sevan { 0xa438, 0x802f }, \
518 1.1 sevan { 0xa438, 0x1800 }, \
519 1.1 sevan { 0xa438, 0x803d }, \
520 1.1 sevan { 0xa438, 0x1800 }, \
521 1.1 sevan { 0xa438, 0x8042 }, \
522 1.1 sevan { 0xa438, 0x1800 }, \
523 1.1 sevan { 0xa438, 0x8051 }, \
524 1.1 sevan { 0xa438, 0x1800 }, \
525 1.1 sevan { 0xa438, 0x8051 }, \
526 1.1 sevan { 0xa438, 0xa088 }, \
527 1.1 sevan { 0xa438, 0x1800 }, \
528 1.1 sevan { 0xa438, 0x0a50 }, \
529 1.1 sevan { 0xa438, 0x8008 }, \
530 1.1 sevan { 0xa438, 0xd014 }, \
531 1.1 sevan { 0xa438, 0xd1a3 }, \
532 1.1 sevan { 0xa438, 0xd700 }, \
533 1.1 sevan { 0xa438, 0x401a }, \
534 1.1 sevan { 0xa438, 0xd707 }, \
535 1.1 sevan { 0xa438, 0x40c2 }, \
536 1.1 sevan { 0xa438, 0x60a6 }, \
537 1.1 sevan { 0xa438, 0xd700 }, \
538 1.1 sevan { 0xa438, 0x5f8b }, \
539 1.1 sevan { 0xa438, 0x1800 }, \
540 1.1 sevan { 0xa438, 0x0a86 }, \
541 1.1 sevan { 0xa438, 0x1800 }, \
542 1.1 sevan { 0xa438, 0x0a6c }, \
543 1.1 sevan { 0xa438, 0x8080 }, \
544 1.1 sevan { 0xa438, 0xd019 }, \
545 1.1 sevan { 0xa438, 0xd1a2 }, \
546 1.1 sevan { 0xa438, 0xd700 }, \
547 1.1 sevan { 0xa438, 0x401a }, \
548 1.1 sevan { 0xa438, 0xd707 }, \
549 1.1 sevan { 0xa438, 0x40c4 }, \
550 1.1 sevan { 0xa438, 0x60a6 }, \
551 1.1 sevan { 0xa438, 0xd700 }, \
552 1.1 sevan { 0xa438, 0x5f8b }, \
553 1.1 sevan { 0xa438, 0x1800 }, \
554 1.1 sevan { 0xa438, 0x0a86 }, \
555 1.1 sevan { 0xa438, 0x1800 }, \
556 1.1 sevan { 0xa438, 0x0a84 }, \
557 1.1 sevan { 0xa438, 0xd503 }, \
558 1.1 sevan { 0xa438, 0x8970 }, \
559 1.1 sevan { 0xa438, 0x0c07 }, \
560 1.1 sevan { 0xa438, 0x0901 }, \
561 1.1 sevan { 0xa438, 0xd500 }, \
562 1.1 sevan { 0xa438, 0xce01 }, \
563 1.1 sevan { 0xa438, 0xcf09 }, \
564 1.1 sevan { 0xa438, 0xd705 }, \
565 1.1 sevan { 0xa438, 0x4000 }, \
566 1.1 sevan { 0xa438, 0xceff }, \
567 1.1 sevan { 0xa438, 0xaf0a }, \
568 1.1 sevan { 0xa438, 0xd504 }, \
569 1.1 sevan { 0xa438, 0x1800 }, \
570 1.1 sevan { 0xa438, 0x1213 }, \
571 1.1 sevan { 0xa438, 0x8401 }, \
572 1.1 sevan { 0xa438, 0xd500 }, \
573 1.1 sevan { 0xa438, 0x8580 }, \
574 1.1 sevan { 0xa438, 0x1800 }, \
575 1.1 sevan { 0xa438, 0x1253 }, \
576 1.1 sevan { 0xa438, 0xd064 }, \
577 1.1 sevan { 0xa438, 0xd181 }, \
578 1.1 sevan { 0xa438, 0xd704 }, \
579 1.1 sevan { 0xa438, 0x4018 }, \
580 1.1 sevan { 0xa438, 0xd504 }, \
581 1.1 sevan { 0xa438, 0xc50f }, \
582 1.1 sevan { 0xa438, 0xd706 }, \
583 1.1 sevan { 0xa438, 0x2c59 }, \
584 1.1 sevan { 0xa438, 0x804d }, \
585 1.1 sevan { 0xa438, 0xc60f }, \
586 1.1 sevan { 0xa438, 0xf002 }, \
587 1.1 sevan { 0xa438, 0xc605 }, \
588 1.1 sevan { 0xa438, 0xae02 }, \
589 1.1 sevan { 0xa438, 0x1800 }, \
590 1.1 sevan { 0xa438, 0x10fd }, \
591 1.1 sevan { 0xa436, 0xa026 }, \
592 1.1 sevan { 0xa438, 0xffff }, \
593 1.1 sevan { 0xa436, 0xa024 }, \
594 1.1 sevan { 0xa438, 0xffff }, \
595 1.1 sevan { 0xa436, 0xa022 }, \
596 1.1 sevan { 0xa438, 0x10f4 }, \
597 1.1 sevan { 0xa436, 0xa020 }, \
598 1.1 sevan { 0xa438, 0x1252 }, \
599 1.1 sevan { 0xa436, 0xa006 }, \
600 1.1 sevan { 0xa438, 0x1206 }, \
601 1.1 sevan { 0xa436, 0xa004 }, \
602 1.1 sevan { 0xa438, 0x0a78 }, \
603 1.1 sevan { 0xa436, 0xa002 }, \
604 1.1 sevan { 0xa438, 0x0a60 }, \
605 1.1 sevan { 0xa436, 0xa000 }, \
606 1.1 sevan { 0xa438, 0x0a4f }, \
607 1.1 sevan { 0xa436, 0xa008 }, \
608 1.1 sevan { 0xa438, 0x3f00 }, \
609 1.1 sevan { 0xa436, 0xa016 }, \
610 1.1 sevan { 0xa438, 0x0010 }, \
611 1.1 sevan { 0xa436, 0xa012 }, \
612 1.1 sevan { 0xa438, 0x0000 }, \
613 1.1 sevan { 0xa436, 0xa014 }, \
614 1.1 sevan { 0xa438, 0x1800 }, \
615 1.1 sevan { 0xa438, 0x8010 }, \
616 1.1 sevan { 0xa438, 0x1800 }, \
617 1.1 sevan { 0xa438, 0x8066 }, \
618 1.1 sevan { 0xa438, 0x1800 }, \
619 1.1 sevan { 0xa438, 0x807c }, \
620 1.1 sevan { 0xa438, 0x1800 }, \
621 1.1 sevan { 0xa438, 0x8089 }, \
622 1.1 sevan { 0xa438, 0x1800 }, \
623 1.1 sevan { 0xa438, 0x808e }, \
624 1.1 sevan { 0xa438, 0x1800 }, \
625 1.1 sevan { 0xa438, 0x80a0 }, \
626 1.1 sevan { 0xa438, 0x1800 }, \
627 1.1 sevan { 0xa438, 0x80b2 }, \
628 1.1 sevan { 0xa438, 0x1800 }, \
629 1.1 sevan { 0xa438, 0x80c2 }, \
630 1.1 sevan { 0xa438, 0xd501 }, \
631 1.1 sevan { 0xa438, 0xce01 }, \
632 1.1 sevan { 0xa438, 0xd700 }, \
633 1.1 sevan { 0xa438, 0x62db }, \
634 1.1 sevan { 0xa438, 0x655c }, \
635 1.1 sevan { 0xa438, 0xd73e }, \
636 1.1 sevan { 0xa438, 0x60e9 }, \
637 1.1 sevan { 0xa438, 0x614a }, \
638 1.1 sevan { 0xa438, 0x61ab }, \
639 1.1 sevan { 0xa438, 0x0c0f }, \
640 1.1 sevan { 0xa438, 0x0501 }, \
641 1.1 sevan { 0xa438, 0x1800 }, \
642 1.1 sevan { 0xa438, 0x0304 }, \
643 1.1 sevan { 0xa438, 0x0c0f }, \
644 1.1 sevan { 0xa438, 0x0503 }, \
645 1.1 sevan { 0xa438, 0x1800 }, \
646 1.1 sevan { 0xa438, 0x0304 }, \
647 1.1 sevan { 0xa438, 0x0c0f }, \
648 1.1 sevan { 0xa438, 0x0505 }, \
649 1.1 sevan { 0xa438, 0x1800 }, \
650 1.1 sevan { 0xa438, 0x0304 }, \
651 1.1 sevan { 0xa438, 0x0c0f }, \
652 1.1 sevan { 0xa438, 0x0509 }, \
653 1.1 sevan { 0xa438, 0x1800 }, \
654 1.1 sevan { 0xa438, 0x0304 }, \
655 1.1 sevan { 0xa438, 0x653c }, \
656 1.1 sevan { 0xa438, 0xd73e }, \
657 1.1 sevan { 0xa438, 0x60e9 }, \
658 1.1 sevan { 0xa438, 0x614a }, \
659 1.1 sevan { 0xa438, 0x61ab }, \
660 1.1 sevan { 0xa438, 0x0c0f }, \
661 1.1 sevan { 0xa438, 0x0503 }, \
662 1.1 sevan { 0xa438, 0x1800 }, \
663 1.1 sevan { 0xa438, 0x0304 }, \
664 1.1 sevan { 0xa438, 0x0c0f }, \
665 1.1 sevan { 0xa438, 0x0502 }, \
666 1.1 sevan { 0xa438, 0x1800 }, \
667 1.1 sevan { 0xa438, 0x0304 }, \
668 1.1 sevan { 0xa438, 0x0c0f }, \
669 1.1 sevan { 0xa438, 0x0506 }, \
670 1.1 sevan { 0xa438, 0x1800 }, \
671 1.1 sevan { 0xa438, 0x0304 }, \
672 1.1 sevan { 0xa438, 0x0c0f }, \
673 1.1 sevan { 0xa438, 0x050a }, \
674 1.1 sevan { 0xa438, 0x1800 }, \
675 1.1 sevan { 0xa438, 0x0304 }, \
676 1.1 sevan { 0xa438, 0xd73e }, \
677 1.1 sevan { 0xa438, 0x60e9 }, \
678 1.1 sevan { 0xa438, 0x614a }, \
679 1.1 sevan { 0xa438, 0x61ab }, \
680 1.1 sevan { 0xa438, 0x0c0f }, \
681 1.1 sevan { 0xa438, 0x0505 }, \
682 1.1 sevan { 0xa438, 0x1800 }, \
683 1.1 sevan { 0xa438, 0x0304 }, \
684 1.1 sevan { 0xa438, 0x0c0f }, \
685 1.1 sevan { 0xa438, 0x0506 }, \
686 1.1 sevan { 0xa438, 0x1800 }, \
687 1.1 sevan { 0xa438, 0x0304 }, \
688 1.1 sevan { 0xa438, 0x0c0f }, \
689 1.1 sevan { 0xa438, 0x0504 }, \
690 1.1 sevan { 0xa438, 0x1800 }, \
691 1.1 sevan { 0xa438, 0x0304 }, \
692 1.1 sevan { 0xa438, 0x0c0f }, \
693 1.1 sevan { 0xa438, 0x050c }, \
694 1.1 sevan { 0xa438, 0x1800 }, \
695 1.1 sevan { 0xa438, 0x0304 }, \
696 1.1 sevan { 0xa438, 0xd73e }, \
697 1.1 sevan { 0xa438, 0x60e9 }, \
698 1.1 sevan { 0xa438, 0x614a }, \
699 1.1 sevan { 0xa438, 0x61ab }, \
700 1.1 sevan { 0xa438, 0x0c0f }, \
701 1.1 sevan { 0xa438, 0x0509 }, \
702 1.1 sevan { 0xa438, 0x1800 }, \
703 1.1 sevan { 0xa438, 0x0304 }, \
704 1.1 sevan { 0xa438, 0x0c0f }, \
705 1.1 sevan { 0xa438, 0x050a }, \
706 1.1 sevan { 0xa438, 0x1800 }, \
707 1.1 sevan { 0xa438, 0x0304 }, \
708 1.1 sevan { 0xa438, 0x0c0f }, \
709 1.1 sevan { 0xa438, 0x050c }, \
710 1.1 sevan { 0xa438, 0x1800 }, \
711 1.1 sevan { 0xa438, 0x0304 }, \
712 1.1 sevan { 0xa438, 0x0c0f }, \
713 1.1 sevan { 0xa438, 0x0508 }, \
714 1.1 sevan { 0xa438, 0x1800 }, \
715 1.1 sevan { 0xa438, 0x0304 }, \
716 1.1 sevan { 0xa438, 0xd501 }, \
717 1.1 sevan { 0xa438, 0xce01 }, \
718 1.1 sevan { 0xa438, 0xd73e }, \
719 1.1 sevan { 0xa438, 0x60e9 }, \
720 1.1 sevan { 0xa438, 0x614a }, \
721 1.1 sevan { 0xa438, 0x61ab }, \
722 1.1 sevan { 0xa438, 0x0c0f }, \
723 1.1 sevan { 0xa438, 0x0501 }, \
724 1.1 sevan { 0xa438, 0x1800 }, \
725 1.1 sevan { 0xa438, 0x0321 }, \
726 1.1 sevan { 0xa438, 0x0c0f }, \
727 1.1 sevan { 0xa438, 0x0502 }, \
728 1.1 sevan { 0xa438, 0x1800 }, \
729 1.1 sevan { 0xa438, 0x0321 }, \
730 1.1 sevan { 0xa438, 0x0c0f }, \
731 1.1 sevan { 0xa438, 0x0504 }, \
732 1.1 sevan { 0xa438, 0x1800 }, \
733 1.1 sevan { 0xa438, 0x0321 }, \
734 1.1 sevan { 0xa438, 0x0c0f }, \
735 1.1 sevan { 0xa438, 0x0508 }, \
736 1.1 sevan { 0xa438, 0x1800 }, \
737 1.1 sevan { 0xa438, 0x0321 }, \
738 1.1 sevan { 0xa438, 0x1000 }, \
739 1.1 sevan { 0xa438, 0x0346 }, \
740 1.1 sevan { 0xa438, 0xd501 }, \
741 1.1 sevan { 0xa438, 0xce01 }, \
742 1.1 sevan { 0xa438, 0x8208 }, \
743 1.1 sevan { 0xa438, 0x609d }, \
744 1.1 sevan { 0xa438, 0xa50f }, \
745 1.1 sevan { 0xa438, 0x1800 }, \
746 1.1 sevan { 0xa438, 0x001a }, \
747 1.1 sevan { 0xa438, 0x0c0f }, \
748 1.1 sevan { 0xa438, 0x0503 }, \
749 1.1 sevan { 0xa438, 0x1800 }, \
750 1.1 sevan { 0xa438, 0x001a }, \
751 1.1 sevan { 0xa438, 0x607d }, \
752 1.1 sevan { 0xa438, 0x1800 }, \
753 1.1 sevan { 0xa438, 0x00ab }, \
754 1.1 sevan { 0xa438, 0x1800 }, \
755 1.1 sevan { 0xa438, 0x00ab }, \
756 1.1 sevan { 0xa438, 0xd501 }, \
757 1.1 sevan { 0xa438, 0xce01 }, \
758 1.1 sevan { 0xa438, 0xd700 }, \
759 1.1 sevan { 0xa438, 0x60fd }, \
760 1.1 sevan { 0xa438, 0xa50f }, \
761 1.1 sevan { 0xa438, 0xce00 }, \
762 1.1 sevan { 0xa438, 0xd500 }, \
763 1.1 sevan { 0xa438, 0xaa0f }, \
764 1.1 sevan { 0xa438, 0x1800 }, \
765 1.1 sevan { 0xa438, 0x017b }, \
766 1.1 sevan { 0xa438, 0x0c0f }, \
767 1.1 sevan { 0xa438, 0x0503 }, \
768 1.1 sevan { 0xa438, 0xce00 }, \
769 1.1 sevan { 0xa438, 0xd500 }, \
770 1.1 sevan { 0xa438, 0x0c0f }, \
771 1.1 sevan { 0xa438, 0x0a05 }, \
772 1.1 sevan { 0xa438, 0x1800 }, \
773 1.1 sevan { 0xa438, 0x017b }, \
774 1.1 sevan { 0xa438, 0xd501 }, \
775 1.1 sevan { 0xa438, 0xce01 }, \
776 1.1 sevan { 0xa438, 0xd700 }, \
777 1.1 sevan { 0xa438, 0x60fd }, \
778 1.1 sevan { 0xa438, 0xa50f }, \
779 1.1 sevan { 0xa438, 0xce00 }, \
780 1.1 sevan { 0xa438, 0xd500 }, \
781 1.1 sevan { 0xa438, 0xaa0f }, \
782 1.1 sevan { 0xa438, 0x1800 }, \
783 1.1 sevan { 0xa438, 0x01e0 }, \
784 1.1 sevan { 0xa438, 0x0c0f }, \
785 1.1 sevan { 0xa438, 0x0503 }, \
786 1.1 sevan { 0xa438, 0xce00 }, \
787 1.1 sevan { 0xa438, 0xd500 }, \
788 1.1 sevan { 0xa438, 0x0c0f }, \
789 1.1 sevan { 0xa438, 0x0a05 }, \
790 1.1 sevan { 0xa438, 0x1800 }, \
791 1.1 sevan { 0xa438, 0x01e0 }, \
792 1.1 sevan { 0xa438, 0xd700 }, \
793 1.1 sevan { 0xa438, 0x60fd }, \
794 1.1 sevan { 0xa438, 0xa50f }, \
795 1.1 sevan { 0xa438, 0xce00 }, \
796 1.1 sevan { 0xa438, 0xd500 }, \
797 1.1 sevan { 0xa438, 0xaa0f }, \
798 1.1 sevan { 0xa438, 0x1800 }, \
799 1.1 sevan { 0xa438, 0x0231 }, \
800 1.1 sevan { 0xa438, 0x0c0f }, \
801 1.1 sevan { 0xa438, 0x0503 }, \
802 1.1 sevan { 0xa438, 0xce00 }, \
803 1.1 sevan { 0xa438, 0xd500 }, \
804 1.1 sevan { 0xa438, 0x0c0f }, \
805 1.1 sevan { 0xa438, 0x0a05 }, \
806 1.1 sevan { 0xa438, 0x1800 }, \
807 1.1 sevan { 0xa438, 0x0231 }, \
808 1.1 sevan { 0xa436, 0xa08e }, \
809 1.1 sevan { 0xa438, 0xffff }, \
810 1.1 sevan { 0xa436, 0xa08c }, \
811 1.1 sevan { 0xa438, 0x0221 }, \
812 1.1 sevan { 0xa436, 0xa08a }, \
813 1.1 sevan { 0xa438, 0x01ce }, \
814 1.1 sevan { 0xa436, 0xa088 }, \
815 1.1 sevan { 0xa438, 0x0169 }, \
816 1.1 sevan { 0xa436, 0xa086 }, \
817 1.1 sevan { 0xa438, 0x00a6 }, \
818 1.1 sevan { 0xa436, 0xa084 }, \
819 1.1 sevan { 0xa438, 0x000d }, \
820 1.1 sevan { 0xa436, 0xa082 }, \
821 1.1 sevan { 0xa438, 0x0308 }, \
822 1.1 sevan { 0xa436, 0xa080 }, \
823 1.1 sevan { 0xa438, 0x029f }, \
824 1.1 sevan { 0xa436, 0xa090 }, \
825 1.1 sevan { 0xa438, 0x007f }, \
826 1.1 sevan { 0xa436, 0xa016 }, \
827 1.1 sevan { 0xa438, 0x0020 }, \
828 1.1 sevan { 0xa436, 0xa012 }, \
829 1.1 sevan { 0xa438, 0x0000 }, \
830 1.1 sevan { 0xa436, 0xa014 }, \
831 1.1 sevan { 0xa438, 0x1800 }, \
832 1.1 sevan { 0xa438, 0x8010 }, \
833 1.1 sevan { 0xa438, 0x1800 }, \
834 1.1 sevan { 0xa438, 0x8017 }, \
835 1.1 sevan { 0xa438, 0x1800 }, \
836 1.1 sevan { 0xa438, 0x801b }, \
837 1.1 sevan { 0xa438, 0x1800 }, \
838 1.1 sevan { 0xa438, 0x8029 }, \
839 1.1 sevan { 0xa438, 0x1800 }, \
840 1.1 sevan { 0xa438, 0x8054 }, \
841 1.1 sevan { 0xa438, 0x1800 }, \
842 1.1 sevan { 0xa438, 0x805a }, \
843 1.1 sevan { 0xa438, 0x1800 }, \
844 1.1 sevan { 0xa438, 0x8064 }, \
845 1.1 sevan { 0xa438, 0x1800 }, \
846 1.1 sevan { 0xa438, 0x80a7 }, \
847 1.1 sevan { 0xa438, 0x9430 }, \
848 1.1 sevan { 0xa438, 0x9480 }, \
849 1.1 sevan { 0xa438, 0xb408 }, \
850 1.1 sevan { 0xa438, 0xd120 }, \
851 1.1 sevan { 0xa438, 0xd057 }, \
852 1.1 sevan { 0xa438, 0x1800 }, \
853 1.1 sevan { 0xa438, 0x064b }, \
854 1.1 sevan { 0xa438, 0xcb80 }, \
855 1.1 sevan { 0xa438, 0x9906 }, \
856 1.1 sevan { 0xa438, 0x1800 }, \
857 1.1 sevan { 0xa438, 0x0567 }, \
858 1.1 sevan { 0xa438, 0xcb94 }, \
859 1.1 sevan { 0xa438, 0x8190 }, \
860 1.1 sevan { 0xa438, 0x82a0 }, \
861 1.1 sevan { 0xa438, 0x800a }, \
862 1.1 sevan { 0xa438, 0x8406 }, \
863 1.1 sevan { 0xa438, 0x8010 }, \
864 1.1 sevan { 0xa438, 0xa740 }, \
865 1.1 sevan { 0xa438, 0x8dff }, \
866 1.1 sevan { 0xa438, 0x1000 }, \
867 1.1 sevan { 0xa438, 0x07e4 }, \
868 1.1 sevan { 0xa438, 0xa840 }, \
869 1.1 sevan { 0xa438, 0x0000 }, \
870 1.1 sevan { 0xa438, 0x1800 }, \
871 1.1 sevan { 0xa438, 0x0773 }, \
872 1.1 sevan { 0xa438, 0xcb91 }, \
873 1.1 sevan { 0xa438, 0x0000 }, \
874 1.1 sevan { 0xa438, 0xd700 }, \
875 1.1 sevan { 0xa438, 0x4063 }, \
876 1.1 sevan { 0xa438, 0xd139 }, \
877 1.1 sevan { 0xa438, 0xf002 }, \
878 1.1 sevan { 0xa438, 0xd140 }, \
879 1.1 sevan { 0xa438, 0xd040 }, \
880 1.1 sevan { 0xa438, 0xb404 }, \
881 1.1 sevan { 0xa438, 0x0c0f }, \
882 1.1 sevan { 0xa438, 0x0d00 }, \
883 1.1 sevan { 0xa438, 0x1000 }, \
884 1.1 sevan { 0xa438, 0x07dc }, \
885 1.1 sevan { 0xa438, 0xa610 }, \
886 1.1 sevan { 0xa438, 0xa110 }, \
887 1.1 sevan { 0xa438, 0xa2a0 }, \
888 1.1 sevan { 0xa438, 0xa404 }, \
889 1.1 sevan { 0xa438, 0xd704 }, \
890 1.1 sevan { 0xa438, 0x4045 }, \
891 1.1 sevan { 0xa438, 0xa180 }, \
892 1.1 sevan { 0xa438, 0xd704 }, \
893 1.1 sevan { 0xa438, 0x405d }, \
894 1.1 sevan { 0xa438, 0xa720 }, \
895 1.1 sevan { 0xa438, 0x1000 }, \
896 1.1 sevan { 0xa438, 0x0742 }, \
897 1.1 sevan { 0xa438, 0x1000 }, \
898 1.1 sevan { 0xa438, 0x07ec }, \
899 1.1 sevan { 0xa438, 0xd700 }, \
900 1.1 sevan { 0xa438, 0x5f74 }, \
901 1.1 sevan { 0xa438, 0x1000 }, \
902 1.1 sevan { 0xa438, 0x0742 }, \
903 1.1 sevan { 0xa438, 0xd702 }, \
904 1.1 sevan { 0xa438, 0x7fb6 }, \
905 1.1 sevan { 0xa438, 0x8190 }, \
906 1.1 sevan { 0xa438, 0x82a0 }, \
907 1.1 sevan { 0xa438, 0x8404 }, \
908 1.1 sevan { 0xa438, 0x8610 }, \
909 1.1 sevan { 0xa438, 0x0c0f }, \
910 1.1 sevan { 0xa438, 0x0d01 }, \
911 1.1 sevan { 0xa438, 0x1000 }, \
912 1.1 sevan { 0xa438, 0x07dc }, \
913 1.1 sevan { 0xa438, 0x1800 }, \
914 1.1 sevan { 0xa438, 0x064b }, \
915 1.1 sevan { 0xa438, 0x1000 }, \
916 1.1 sevan { 0xa438, 0x07c0 }, \
917 1.1 sevan { 0xa438, 0xd700 }, \
918 1.1 sevan { 0xa438, 0x5fa7 }, \
919 1.1 sevan { 0xa438, 0x1800 }, \
920 1.1 sevan { 0xa438, 0x0481 }, \
921 1.1 sevan { 0xa438, 0x0000 }, \
922 1.1 sevan { 0xa438, 0x94bc }, \
923 1.1 sevan { 0xa438, 0x870c }, \
924 1.1 sevan { 0xa438, 0xa190 }, \
925 1.1 sevan { 0xa438, 0xa00a }, \
926 1.1 sevan { 0xa438, 0xa280 }, \
927 1.1 sevan { 0xa438, 0xa404 }, \
928 1.1 sevan { 0xa438, 0x8220 }, \
929 1.1 sevan { 0xa438, 0x1800 }, \
930 1.1 sevan { 0xa438, 0x078e }, \
931 1.1 sevan { 0xa438, 0xcb92 }, \
932 1.1 sevan { 0xa438, 0xa840 }, \
933 1.1 sevan { 0xa438, 0xd700 }, \
934 1.1 sevan { 0xa438, 0x4063 }, \
935 1.1 sevan { 0xa438, 0xd140 }, \
936 1.1 sevan { 0xa438, 0xf002 }, \
937 1.1 sevan { 0xa438, 0xd150 }, \
938 1.1 sevan { 0xa438, 0xd040 }, \
939 1.1 sevan { 0xa438, 0xd703 }, \
940 1.1 sevan { 0xa438, 0x60a0 }, \
941 1.1 sevan { 0xa438, 0x6121 }, \
942 1.1 sevan { 0xa438, 0x61a2 }, \
943 1.1 sevan { 0xa438, 0x6223 }, \
944 1.1 sevan { 0xa438, 0xf02f }, \
945 1.1 sevan { 0xa438, 0x0cf0 }, \
946 1.1 sevan { 0xa438, 0x0d10 }, \
947 1.1 sevan { 0xa438, 0x8010 }, \
948 1.1 sevan { 0xa438, 0xa740 }, \
949 1.1 sevan { 0xa438, 0xf00f }, \
950 1.1 sevan { 0xa438, 0x0cf0 }, \
951 1.1 sevan { 0xa438, 0x0d20 }, \
952 1.1 sevan { 0xa438, 0x8010 }, \
953 1.1 sevan { 0xa438, 0xa740 }, \
954 1.1 sevan { 0xa438, 0xf00a }, \
955 1.1 sevan { 0xa438, 0x0cf0 }, \
956 1.1 sevan { 0xa438, 0x0d30 }, \
957 1.1 sevan { 0xa438, 0x8010 }, \
958 1.1 sevan { 0xa438, 0xa740 }, \
959 1.1 sevan { 0xa438, 0xf005 }, \
960 1.1 sevan { 0xa438, 0x0cf0 }, \
961 1.1 sevan { 0xa438, 0x0d40 }, \
962 1.1 sevan { 0xa438, 0x8010 }, \
963 1.1 sevan { 0xa438, 0xa740 }, \
964 1.1 sevan { 0xa438, 0x1000 }, \
965 1.1 sevan { 0xa438, 0x07e4 }, \
966 1.1 sevan { 0xa438, 0xa610 }, \
967 1.1 sevan { 0xa438, 0xa008 }, \
968 1.1 sevan { 0xa438, 0xd704 }, \
969 1.1 sevan { 0xa438, 0x4046 }, \
970 1.1 sevan { 0xa438, 0xa002 }, \
971 1.1 sevan { 0xa438, 0xd704 }, \
972 1.1 sevan { 0xa438, 0x405d }, \
973 1.1 sevan { 0xa438, 0xa720 }, \
974 1.1 sevan { 0xa438, 0x1000 }, \
975 1.1 sevan { 0xa438, 0x0742 }, \
976 1.1 sevan { 0xa438, 0x1000 }, \
977 1.1 sevan { 0xa438, 0x07f7 }, \
978 1.1 sevan { 0xa438, 0xd700 }, \
979 1.1 sevan { 0xa438, 0x5f74 }, \
980 1.1 sevan { 0xa438, 0x1000 }, \
981 1.1 sevan { 0xa438, 0x0742 }, \
982 1.1 sevan { 0xa438, 0xd702 }, \
983 1.1 sevan { 0xa438, 0x7fb5 }, \
984 1.1 sevan { 0xa438, 0x800a }, \
985 1.1 sevan { 0xa438, 0x0cf0 }, \
986 1.1 sevan { 0xa438, 0x0d00 }, \
987 1.1 sevan { 0xa438, 0x1000 }, \
988 1.1 sevan { 0xa438, 0x07e4 }, \
989 1.1 sevan { 0xa438, 0x8010 }, \
990 1.1 sevan { 0xa438, 0xa740 }, \
991 1.1 sevan { 0xa438, 0xd701 }, \
992 1.1 sevan { 0xa438, 0x3ad4 }, \
993 1.1 sevan { 0xa438, 0x0537 }, \
994 1.1 sevan { 0xa438, 0x8610 }, \
995 1.1 sevan { 0xa438, 0x8840 }, \
996 1.1 sevan { 0xa438, 0x1800 }, \
997 1.1 sevan { 0xa438, 0x064b }, \
998 1.1 sevan { 0xa438, 0x8301 }, \
999 1.1 sevan { 0xa438, 0x800a }, \
1000 1.1 sevan { 0xa438, 0x8190 }, \
1001 1.1 sevan { 0xa438, 0x82a0 }, \
1002 1.1 sevan { 0xa438, 0x8404 }, \
1003 1.1 sevan { 0xa438, 0xa70c }, \
1004 1.1 sevan { 0xa438, 0x9402 }, \
1005 1.1 sevan { 0xa438, 0x890c }, \
1006 1.1 sevan { 0xa438, 0x8840 }, \
1007 1.1 sevan { 0xa438, 0x1800 }, \
1008 1.1 sevan { 0xa438, 0x064b }, \
1009 1.1 sevan { 0xa436, 0xa10e }, \
1010 1.1 sevan { 0xa438, 0x0642 }, \
1011 1.1 sevan { 0xa436, 0xa10c }, \
1012 1.1 sevan { 0xa438, 0x0686 }, \
1013 1.1 sevan { 0xa436, 0xa10a }, \
1014 1.1 sevan { 0xa438, 0x0788 }, \
1015 1.1 sevan { 0xa436, 0xa108 }, \
1016 1.1 sevan { 0xa438, 0x047b }, \
1017 1.1 sevan { 0xa436, 0xa106 }, \
1018 1.1 sevan { 0xa438, 0x065c }, \
1019 1.1 sevan { 0xa436, 0xa104 }, \
1020 1.1 sevan { 0xa438, 0x0769 }, \
1021 1.1 sevan { 0xa436, 0xa102 }, \
1022 1.1 sevan { 0xa438, 0x0565 }, \
1023 1.1 sevan { 0xa436, 0xa100 }, \
1024 1.1 sevan { 0xa438, 0x06f9 }, \
1025 1.1 sevan { 0xa436, 0xa110 }, \
1026 1.1 sevan { 0xa438, 0x00ff }, \
1027 1.1 sevan { 0xa436, 0xb87c }, \
1028 1.1 sevan { 0xa438, 0x8530 }, \
1029 1.1 sevan { 0xa436, 0xb87e }, \
1030 1.1 sevan { 0xa438, 0xaf85 }, \
1031 1.1 sevan { 0xa438, 0x3caf }, \
1032 1.1 sevan { 0xa438, 0x8593 }, \
1033 1.1 sevan { 0xa438, 0xaf85 }, \
1034 1.1 sevan { 0xa438, 0x9caf }, \
1035 1.1 sevan { 0xa438, 0x85a5 }, \
1036 1.1 sevan { 0xa438, 0xbf86 }, \
1037 1.1 sevan { 0xa438, 0xd702 }, \
1038 1.1 sevan { 0xa438, 0x5afb }, \
1039 1.1 sevan { 0xa438, 0xe083 }, \
1040 1.1 sevan { 0xa438, 0xfb0c }, \
1041 1.1 sevan { 0xa438, 0x020d }, \
1042 1.1 sevan { 0xa438, 0x021b }, \
1043 1.1 sevan { 0xa438, 0x10bf }, \
1044 1.1 sevan { 0xa438, 0x86d7 }, \
1045 1.1 sevan { 0xa438, 0x025a }, \
1046 1.1 sevan { 0xa438, 0xb7bf }, \
1047 1.1 sevan { 0xa438, 0x86da }, \
1048 1.1 sevan { 0xa438, 0x025a }, \
1049 1.1 sevan { 0xa438, 0xfbe0 }, \
1050 1.1 sevan { 0xa438, 0x83fc }, \
1051 1.1 sevan { 0xa438, 0x0c02 }, \
1052 1.1 sevan { 0xa438, 0x0d02 }, \
1053 1.1 sevan { 0xa438, 0x1b10 }, \
1054 1.1 sevan { 0xa438, 0xbf86 }, \
1055 1.1 sevan { 0xa438, 0xda02 }, \
1056 1.1 sevan { 0xa438, 0x5ab7 }, \
1057 1.1 sevan { 0xa438, 0xbf86 }, \
1058 1.1 sevan { 0xa438, 0xdd02 }, \
1059 1.1 sevan { 0xa438, 0x5afb }, \
1060 1.1 sevan { 0xa438, 0xe083 }, \
1061 1.1 sevan { 0xa438, 0xfd0c }, \
1062 1.1 sevan { 0xa438, 0x020d }, \
1063 1.1 sevan { 0xa438, 0x021b }, \
1064 1.1 sevan { 0xa438, 0x10bf }, \
1065 1.1 sevan { 0xa438, 0x86dd }, \
1066 1.1 sevan { 0xa438, 0x025a }, \
1067 1.1 sevan { 0xa438, 0xb7bf }, \
1068 1.1 sevan { 0xa438, 0x86e0 }, \
1069 1.1 sevan { 0xa438, 0x025a }, \
1070 1.1 sevan { 0xa438, 0xfbe0 }, \
1071 1.1 sevan { 0xa438, 0x83fe }, \
1072 1.1 sevan { 0xa438, 0x0c02 }, \
1073 1.1 sevan { 0xa438, 0x0d02 }, \
1074 1.1 sevan { 0xa438, 0x1b10 }, \
1075 1.1 sevan { 0xa438, 0xbf86 }, \
1076 1.1 sevan { 0xa438, 0xe002 }, \
1077 1.1 sevan { 0xa438, 0x5ab7 }, \
1078 1.1 sevan { 0xa438, 0xaf2f }, \
1079 1.1 sevan { 0xa438, 0xbd02 }, \
1080 1.1 sevan { 0xa438, 0x2cac }, \
1081 1.1 sevan { 0xa438, 0x0286 }, \
1082 1.1 sevan { 0xa438, 0x65af }, \
1083 1.1 sevan { 0xa438, 0x212b }, \
1084 1.1 sevan { 0xa438, 0x022c }, \
1085 1.1 sevan { 0xa438, 0x6002 }, \
1086 1.1 sevan { 0xa438, 0x86b6 }, \
1087 1.1 sevan { 0xa438, 0xaf21 }, \
1088 1.1 sevan { 0xa438, 0x0cd1 }, \
1089 1.1 sevan { 0xa438, 0x03bf }, \
1090 1.1 sevan { 0xa438, 0x8710 }, \
1091 1.1 sevan { 0xa438, 0x025a }, \
1092 1.1 sevan { 0xa438, 0xb7bf }, \
1093 1.1 sevan { 0xa438, 0x870d }, \
1094 1.1 sevan { 0xa438, 0x025a }, \
1095 1.1 sevan { 0xa438, 0xb7bf }, \
1096 1.1 sevan { 0xa438, 0x8719 }, \
1097 1.1 sevan { 0xa438, 0x025a }, \
1098 1.1 sevan { 0xa438, 0xb7bf }, \
1099 1.1 sevan { 0xa438, 0x8716 }, \
1100 1.1 sevan { 0xa438, 0x025a }, \
1101 1.1 sevan { 0xa438, 0xb7bf }, \
1102 1.1 sevan { 0xa438, 0x871f }, \
1103 1.1 sevan { 0xa438, 0x025a }, \
1104 1.1 sevan { 0xa438, 0xb7bf }, \
1105 1.1 sevan { 0xa438, 0x871c }, \
1106 1.1 sevan { 0xa438, 0x025a }, \
1107 1.1 sevan { 0xa438, 0xb7bf }, \
1108 1.1 sevan { 0xa438, 0x8728 }, \
1109 1.1 sevan { 0xa438, 0x025a }, \
1110 1.1 sevan { 0xa438, 0xb7bf }, \
1111 1.1 sevan { 0xa438, 0x8725 }, \
1112 1.1 sevan { 0xa438, 0x025a }, \
1113 1.1 sevan { 0xa438, 0xb7bf }, \
1114 1.1 sevan { 0xa438, 0x8707 }, \
1115 1.1 sevan { 0xa438, 0x025a }, \
1116 1.1 sevan { 0xa438, 0xfbad }, \
1117 1.1 sevan { 0xa438, 0x281c }, \
1118 1.1 sevan { 0xa438, 0xd100 }, \
1119 1.1 sevan { 0xa438, 0xbf87 }, \
1120 1.1 sevan { 0xa438, 0x0a02 }, \
1121 1.1 sevan { 0xa438, 0x5ab7 }, \
1122 1.1 sevan { 0xa438, 0xbf87 }, \
1123 1.1 sevan { 0xa438, 0x1302 }, \
1124 1.1 sevan { 0xa438, 0x5ab7 }, \
1125 1.1 sevan { 0xa438, 0xbf87 }, \
1126 1.1 sevan { 0xa438, 0x2202 }, \
1127 1.1 sevan { 0xa438, 0x5ab7 }, \
1128 1.1 sevan { 0xa438, 0xbf87 }, \
1129 1.1 sevan { 0xa438, 0x2b02 }, \
1130 1.1 sevan { 0xa438, 0x5ab7 }, \
1131 1.1 sevan { 0xa438, 0xae1a }, \
1132 1.1 sevan { 0xa438, 0xd101 }, \
1133 1.1 sevan { 0xa438, 0xbf87 }, \
1134 1.1 sevan { 0xa438, 0x0a02 }, \
1135 1.1 sevan { 0xa438, 0x5ab7 }, \
1136 1.1 sevan { 0xa438, 0xbf87 }, \
1137 1.1 sevan { 0xa438, 0x1302 }, \
1138 1.1 sevan { 0xa438, 0x5ab7 }, \
1139 1.1 sevan { 0xa438, 0xbf87 }, \
1140 1.1 sevan { 0xa438, 0x2202 }, \
1141 1.1 sevan { 0xa438, 0x5ab7 }, \
1142 1.1 sevan { 0xa438, 0xbf87 }, \
1143 1.1 sevan { 0xa438, 0x2b02 }, \
1144 1.1 sevan { 0xa438, 0x5ab7 }, \
1145 1.1 sevan { 0xa438, 0xd101 }, \
1146 1.1 sevan { 0xa438, 0xbf87 }, \
1147 1.1 sevan { 0xa438, 0x3402 }, \
1148 1.1 sevan { 0xa438, 0x5ab7 }, \
1149 1.1 sevan { 0xa438, 0xbf87 }, \
1150 1.1 sevan { 0xa438, 0x3102 }, \
1151 1.1 sevan { 0xa438, 0x5ab7 }, \
1152 1.1 sevan { 0xa438, 0xbf87 }, \
1153 1.1 sevan { 0xa438, 0x3d02 }, \
1154 1.1 sevan { 0xa438, 0x5ab7 }, \
1155 1.1 sevan { 0xa438, 0xbf87 }, \
1156 1.1 sevan { 0xa438, 0x3a02 }, \
1157 1.1 sevan { 0xa438, 0x5ab7 }, \
1158 1.1 sevan { 0xa438, 0xbf87 }, \
1159 1.1 sevan { 0xa438, 0x4302 }, \
1160 1.1 sevan { 0xa438, 0x5ab7 }, \
1161 1.1 sevan { 0xa438, 0xbf87 }, \
1162 1.1 sevan { 0xa438, 0x4002 }, \
1163 1.1 sevan { 0xa438, 0x5ab7 }, \
1164 1.1 sevan { 0xa438, 0xbf87 }, \
1165 1.1 sevan { 0xa438, 0x4c02 }, \
1166 1.1 sevan { 0xa438, 0x5ab7 }, \
1167 1.1 sevan { 0xa438, 0xbf87 }, \
1168 1.1 sevan { 0xa438, 0x4902 }, \
1169 1.1 sevan { 0xa438, 0x5ab7 }, \
1170 1.1 sevan { 0xa438, 0xd100 }, \
1171 1.1 sevan { 0xa438, 0xbf87 }, \
1172 1.1 sevan { 0xa438, 0x2e02 }, \
1173 1.1 sevan { 0xa438, 0x5ab7 }, \
1174 1.1 sevan { 0xa438, 0xbf87 }, \
1175 1.1 sevan { 0xa438, 0x3702 }, \
1176 1.1 sevan { 0xa438, 0x5ab7 }, \
1177 1.1 sevan { 0xa438, 0xbf87 }, \
1178 1.1 sevan { 0xa438, 0x4602 }, \
1179 1.1 sevan { 0xa438, 0x5ab7 }, \
1180 1.1 sevan { 0xa438, 0xbf87 }, \
1181 1.1 sevan { 0xa438, 0x4f02 }, \
1182 1.1 sevan { 0xa438, 0x5ab7 }, \
1183 1.1 sevan { 0xa438, 0xaf35 }, \
1184 1.1 sevan { 0xa438, 0x7ff8 }, \
1185 1.1 sevan { 0xa438, 0xfaef }, \
1186 1.1 sevan { 0xa438, 0x69bf }, \
1187 1.1 sevan { 0xa438, 0x86e3 }, \
1188 1.1 sevan { 0xa438, 0x025a }, \
1189 1.1 sevan { 0xa438, 0xfbbf }, \
1190 1.1 sevan { 0xa438, 0x86fb }, \
1191 1.1 sevan { 0xa438, 0x025a }, \
1192 1.1 sevan { 0xa438, 0xb7bf }, \
1193 1.1 sevan { 0xa438, 0x86e6 }, \
1194 1.1 sevan { 0xa438, 0x025a }, \
1195 1.1 sevan { 0xa438, 0xfbbf }, \
1196 1.1 sevan { 0xa438, 0x86fe }, \
1197 1.1 sevan { 0xa438, 0x025a }, \
1198 1.1 sevan { 0xa438, 0xb7bf }, \
1199 1.1 sevan { 0xa438, 0x86e9 }, \
1200 1.1 sevan { 0xa438, 0x025a }, \
1201 1.1 sevan { 0xa438, 0xfbbf }, \
1202 1.1 sevan { 0xa438, 0x8701 }, \
1203 1.1 sevan { 0xa438, 0x025a }, \
1204 1.1 sevan { 0xa438, 0xb7bf }, \
1205 1.1 sevan { 0xa438, 0x86ec }, \
1206 1.1 sevan { 0xa438, 0x025a }, \
1207 1.1 sevan { 0xa438, 0xfbbf }, \
1208 1.1 sevan { 0xa438, 0x8704 }, \
1209 1.1 sevan { 0xa438, 0x025a }, \
1210 1.1 sevan { 0xa438, 0xb7bf }, \
1211 1.1 sevan { 0xa438, 0x86ef }, \
1212 1.1 sevan { 0xa438, 0x0262 }, \
1213 1.1 sevan { 0xa438, 0x7cbf }, \
1214 1.1 sevan { 0xa438, 0x86f2 }, \
1215 1.1 sevan { 0xa438, 0x0262 }, \
1216 1.1 sevan { 0xa438, 0x7cbf }, \
1217 1.1 sevan { 0xa438, 0x86f5 }, \
1218 1.1 sevan { 0xa438, 0x0262 }, \
1219 1.1 sevan { 0xa438, 0x7cbf }, \
1220 1.1 sevan { 0xa438, 0x86f8 }, \
1221 1.1 sevan { 0xa438, 0x0262 }, \
1222 1.1 sevan { 0xa438, 0x7cef }, \
1223 1.1 sevan { 0xa438, 0x96fe }, \
1224 1.1 sevan { 0xa438, 0xfc04 }, \
1225 1.1 sevan { 0xa438, 0xf8fa }, \
1226 1.1 sevan { 0xa438, 0xef69 }, \
1227 1.1 sevan { 0xa438, 0xbf86 }, \
1228 1.1 sevan { 0xa438, 0xef02 }, \
1229 1.1 sevan { 0xa438, 0x6273 }, \
1230 1.1 sevan { 0xa438, 0xbf86 }, \
1231 1.1 sevan { 0xa438, 0xf202 }, \
1232 1.1 sevan { 0xa438, 0x6273 }, \
1233 1.1 sevan { 0xa438, 0xbf86 }, \
1234 1.1 sevan { 0xa438, 0xf502 }, \
1235 1.1 sevan { 0xa438, 0x6273 }, \
1236 1.1 sevan { 0xa438, 0xbf86 }, \
1237 1.1 sevan { 0xa438, 0xf802 }, \
1238 1.1 sevan { 0xa438, 0x6273 }, \
1239 1.1 sevan { 0xa438, 0xef96 }, \
1240 1.1 sevan { 0xa438, 0xfefc }, \
1241 1.1 sevan { 0xa438, 0x0420 }, \
1242 1.1 sevan { 0xa438, 0xb540 }, \
1243 1.1 sevan { 0xa438, 0x53b5 }, \
1244 1.1 sevan { 0xa438, 0x4086 }, \
1245 1.1 sevan { 0xa438, 0xb540 }, \
1246 1.1 sevan { 0xa438, 0xb9b5 }, \
1247 1.1 sevan { 0xa438, 0x40c8 }, \
1248 1.1 sevan { 0xa438, 0xb03a }, \
1249 1.1 sevan { 0xa438, 0xc8b0 }, \
1250 1.1 sevan { 0xa438, 0xbac8 }, \
1251 1.1 sevan { 0xa438, 0xb13a }, \
1252 1.1 sevan { 0xa438, 0xc8b1 }, \
1253 1.1 sevan { 0xa438, 0xba77 }, \
1254 1.1 sevan { 0xa438, 0xbd26 }, \
1255 1.1 sevan { 0xa438, 0xffbd }, \
1256 1.1 sevan { 0xa438, 0x2677 }, \
1257 1.1 sevan { 0xa438, 0xbd28 }, \
1258 1.1 sevan { 0xa438, 0xffbd }, \
1259 1.1 sevan { 0xa438, 0x2840 }, \
1260 1.1 sevan { 0xa438, 0xbd26 }, \
1261 1.1 sevan { 0xa438, 0xc8bd }, \
1262 1.1 sevan { 0xa438, 0x2640 }, \
1263 1.1 sevan { 0xa438, 0xbd28 }, \
1264 1.1 sevan { 0xa438, 0xc8bd }, \
1265 1.1 sevan { 0xa438, 0x28bb }, \
1266 1.1 sevan { 0xa438, 0xa430 }, \
1267 1.1 sevan { 0xa438, 0x98b0 }, \
1268 1.1 sevan { 0xa438, 0x1eba }, \
1269 1.1 sevan { 0xa438, 0xb01e }, \
1270 1.1 sevan { 0xa438, 0xdcb0 }, \
1271 1.1 sevan { 0xa438, 0x1e98 }, \
1272 1.1 sevan { 0xa438, 0xb09e }, \
1273 1.1 sevan { 0xa438, 0xbab0 }, \
1274 1.1 sevan { 0xa438, 0x9edc }, \
1275 1.1 sevan { 0xa438, 0xb09e }, \
1276 1.1 sevan { 0xa438, 0x98b1 }, \
1277 1.1 sevan { 0xa438, 0x1eba }, \
1278 1.1 sevan { 0xa438, 0xb11e }, \
1279 1.1 sevan { 0xa438, 0xdcb1 }, \
1280 1.1 sevan { 0xa438, 0x1e98 }, \
1281 1.1 sevan { 0xa438, 0xb19e }, \
1282 1.1 sevan { 0xa438, 0xbab1 }, \
1283 1.1 sevan { 0xa438, 0x9edc }, \
1284 1.1 sevan { 0xa438, 0xb19e }, \
1285 1.1 sevan { 0xa438, 0x11b0 }, \
1286 1.1 sevan { 0xa438, 0x1e22 }, \
1287 1.1 sevan { 0xa438, 0xb01e }, \
1288 1.1 sevan { 0xa438, 0x33b0 }, \
1289 1.1 sevan { 0xa438, 0x1e11 }, \
1290 1.1 sevan { 0xa438, 0xb09e }, \
1291 1.1 sevan { 0xa438, 0x22b0 }, \
1292 1.1 sevan { 0xa438, 0x9e33 }, \
1293 1.1 sevan { 0xa438, 0xb09e }, \
1294 1.1 sevan { 0xa438, 0x11b1 }, \
1295 1.1 sevan { 0xa438, 0x1e22 }, \
1296 1.1 sevan { 0xa438, 0xb11e }, \
1297 1.1 sevan { 0xa438, 0x33b1 }, \
1298 1.1 sevan { 0xa438, 0x1e11 }, \
1299 1.1 sevan { 0xa438, 0xb19e }, \
1300 1.1 sevan { 0xa438, 0x22b1 }, \
1301 1.1 sevan { 0xa438, 0x9e33 }, \
1302 1.1 sevan { 0xa438, 0xb19e }, \
1303 1.1 sevan { 0xa436, 0xb85e }, \
1304 1.1 sevan { 0xa438, 0x2f71 }, \
1305 1.1 sevan { 0xa436, 0xb860 }, \
1306 1.1 sevan { 0xa438, 0x20d9 }, \
1307 1.1 sevan { 0xa436, 0xb862 }, \
1308 1.1 sevan { 0xa438, 0x2109 }, \
1309 1.1 sevan { 0xa436, 0xb864 }, \
1310 1.1 sevan { 0xa438, 0x34e7 }, \
1311 1.1 sevan { 0xa436, 0xb878 }, \
1312 1.1 sevan { 0xa438, 0x000f }
1313 1.1 sevan
1314 1.1 sevan #define RTL8125_MAC_CFG3_MCU \
1315 1.1 sevan { 0xa436, 0xa016 }, \
1316 1.1 sevan { 0xa438, 0x0000 }, \
1317 1.1 sevan { 0xa436, 0xa012 }, \
1318 1.1 sevan { 0xa438, 0x0000 }, \
1319 1.1 sevan { 0xa436, 0xa014 }, \
1320 1.1 sevan { 0xa438, 0x1800 }, \
1321 1.1 sevan { 0xa438, 0x8010 }, \
1322 1.1 sevan { 0xa438, 0x1800 }, \
1323 1.1 sevan { 0xa438, 0x808b }, \
1324 1.1 sevan { 0xa438, 0x1800 }, \
1325 1.1 sevan { 0xa438, 0x808f }, \
1326 1.1 sevan { 0xa438, 0x1800 }, \
1327 1.1 sevan { 0xa438, 0x8093 }, \
1328 1.1 sevan { 0xa438, 0x1800 }, \
1329 1.1 sevan { 0xa438, 0x8097 }, \
1330 1.1 sevan { 0xa438, 0x1800 }, \
1331 1.1 sevan { 0xa438, 0x809d }, \
1332 1.1 sevan { 0xa438, 0x1800 }, \
1333 1.1 sevan { 0xa438, 0x80a1 }, \
1334 1.1 sevan { 0xa438, 0x1800 }, \
1335 1.1 sevan { 0xa438, 0x80aa }, \
1336 1.1 sevan { 0xa438, 0xd718 }, \
1337 1.1 sevan { 0xa438, 0x607b }, \
1338 1.1 sevan { 0xa438, 0x40da }, \
1339 1.1 sevan { 0xa438, 0xf00e }, \
1340 1.1 sevan { 0xa438, 0x42da }, \
1341 1.1 sevan { 0xa438, 0xf01e }, \
1342 1.1 sevan { 0xa438, 0xd718 }, \
1343 1.1 sevan { 0xa438, 0x615b }, \
1344 1.1 sevan { 0xa438, 0x1000 }, \
1345 1.1 sevan { 0xa438, 0x1456 }, \
1346 1.1 sevan { 0xa438, 0x1000 }, \
1347 1.1 sevan { 0xa438, 0x14a4 }, \
1348 1.1 sevan { 0xa438, 0x1000 }, \
1349 1.1 sevan { 0xa438, 0x14bc }, \
1350 1.1 sevan { 0xa438, 0xd718 }, \
1351 1.1 sevan { 0xa438, 0x5f2e }, \
1352 1.1 sevan { 0xa438, 0xf01c }, \
1353 1.1 sevan { 0xa438, 0x1000 }, \
1354 1.1 sevan { 0xa438, 0x1456 }, \
1355 1.1 sevan { 0xa438, 0x1000 }, \
1356 1.1 sevan { 0xa438, 0x14a4 }, \
1357 1.1 sevan { 0xa438, 0x1000 }, \
1358 1.1 sevan { 0xa438, 0x14bc }, \
1359 1.1 sevan { 0xa438, 0xd718 }, \
1360 1.1 sevan { 0xa438, 0x5f2e }, \
1361 1.1 sevan { 0xa438, 0xf024 }, \
1362 1.1 sevan { 0xa438, 0x1000 }, \
1363 1.1 sevan { 0xa438, 0x1456 }, \
1364 1.1 sevan { 0xa438, 0x1000 }, \
1365 1.1 sevan { 0xa438, 0x14a4 }, \
1366 1.1 sevan { 0xa438, 0x1000 }, \
1367 1.1 sevan { 0xa438, 0x14bc }, \
1368 1.1 sevan { 0xa438, 0xd718 }, \
1369 1.1 sevan { 0xa438, 0x5f2e }, \
1370 1.1 sevan { 0xa438, 0xf02c }, \
1371 1.1 sevan { 0xa438, 0x1000 }, \
1372 1.1 sevan { 0xa438, 0x1456 }, \
1373 1.1 sevan { 0xa438, 0x1000 }, \
1374 1.1 sevan { 0xa438, 0x14a4 }, \
1375 1.1 sevan { 0xa438, 0x1000 }, \
1376 1.1 sevan { 0xa438, 0x14bc }, \
1377 1.1 sevan { 0xa438, 0xd718 }, \
1378 1.1 sevan { 0xa438, 0x5f2e }, \
1379 1.1 sevan { 0xa438, 0xf034 }, \
1380 1.1 sevan { 0xa438, 0xd719 }, \
1381 1.1 sevan { 0xa438, 0x4118 }, \
1382 1.1 sevan { 0xa438, 0xd504 }, \
1383 1.1 sevan { 0xa438, 0xac11 }, \
1384 1.1 sevan { 0xa438, 0xd501 }, \
1385 1.1 sevan { 0xa438, 0xce01 }, \
1386 1.1 sevan { 0xa438, 0xa410 }, \
1387 1.1 sevan { 0xa438, 0xce00 }, \
1388 1.1 sevan { 0xa438, 0xd500 }, \
1389 1.1 sevan { 0xa438, 0x4779 }, \
1390 1.1 sevan { 0xa438, 0xd504 }, \
1391 1.1 sevan { 0xa438, 0xac0f }, \
1392 1.1 sevan { 0xa438, 0xae01 }, \
1393 1.1 sevan { 0xa438, 0xd500 }, \
1394 1.1 sevan { 0xa438, 0x1000 }, \
1395 1.1 sevan { 0xa438, 0x1444 }, \
1396 1.1 sevan { 0xa438, 0xf034 }, \
1397 1.1 sevan { 0xa438, 0xd719 }, \
1398 1.1 sevan { 0xa438, 0x4118 }, \
1399 1.1 sevan { 0xa438, 0xd504 }, \
1400 1.1 sevan { 0xa438, 0xac22 }, \
1401 1.1 sevan { 0xa438, 0xd501 }, \
1402 1.1 sevan { 0xa438, 0xce01 }, \
1403 1.1 sevan { 0xa438, 0xa420 }, \
1404 1.1 sevan { 0xa438, 0xce00 }, \
1405 1.1 sevan { 0xa438, 0xd500 }, \
1406 1.1 sevan { 0xa438, 0x4559 }, \
1407 1.1 sevan { 0xa438, 0xd504 }, \
1408 1.1 sevan { 0xa438, 0xac0f }, \
1409 1.1 sevan { 0xa438, 0xae01 }, \
1410 1.1 sevan { 0xa438, 0xd500 }, \
1411 1.1 sevan { 0xa438, 0x1000 }, \
1412 1.1 sevan { 0xa438, 0x1444 }, \
1413 1.1 sevan { 0xa438, 0xf023 }, \
1414 1.1 sevan { 0xa438, 0xd719 }, \
1415 1.1 sevan { 0xa438, 0x4118 }, \
1416 1.1 sevan { 0xa438, 0xd504 }, \
1417 1.1 sevan { 0xa438, 0xac44 }, \
1418 1.1 sevan { 0xa438, 0xd501 }, \
1419 1.1 sevan { 0xa438, 0xce01 }, \
1420 1.1 sevan { 0xa438, 0xa440 }, \
1421 1.1 sevan { 0xa438, 0xce00 }, \
1422 1.1 sevan { 0xa438, 0xd500 }, \
1423 1.1 sevan { 0xa438, 0x4339 }, \
1424 1.1 sevan { 0xa438, 0xd504 }, \
1425 1.1 sevan { 0xa438, 0xac0f }, \
1426 1.1 sevan { 0xa438, 0xae01 }, \
1427 1.1 sevan { 0xa438, 0xd500 }, \
1428 1.1 sevan { 0xa438, 0x1000 }, \
1429 1.1 sevan { 0xa438, 0x1444 }, \
1430 1.1 sevan { 0xa438, 0xf012 }, \
1431 1.1 sevan { 0xa438, 0xd719 }, \
1432 1.1 sevan { 0xa438, 0x4118 }, \
1433 1.1 sevan { 0xa438, 0xd504 }, \
1434 1.1 sevan { 0xa438, 0xac88 }, \
1435 1.1 sevan { 0xa438, 0xd501 }, \
1436 1.1 sevan { 0xa438, 0xce01 }, \
1437 1.1 sevan { 0xa438, 0xa480 }, \
1438 1.1 sevan { 0xa438, 0xce00 }, \
1439 1.1 sevan { 0xa438, 0xd500 }, \
1440 1.1 sevan { 0xa438, 0x4119 }, \
1441 1.1 sevan { 0xa438, 0xd504 }, \
1442 1.1 sevan { 0xa438, 0xac0f }, \
1443 1.1 sevan { 0xa438, 0xae01 }, \
1444 1.1 sevan { 0xa438, 0xd500 }, \
1445 1.1 sevan { 0xa438, 0x1000 }, \
1446 1.1 sevan { 0xa438, 0x1444 }, \
1447 1.1 sevan { 0xa438, 0xf001 }, \
1448 1.1 sevan { 0xa438, 0x1000 }, \
1449 1.1 sevan { 0xa438, 0x1456 }, \
1450 1.1 sevan { 0xa438, 0xd718 }, \
1451 1.1 sevan { 0xa438, 0x5fac }, \
1452 1.1 sevan { 0xa438, 0xc48f }, \
1453 1.1 sevan { 0xa438, 0x1000 }, \
1454 1.1 sevan { 0xa438, 0x141b }, \
1455 1.1 sevan { 0xa438, 0xd504 }, \
1456 1.1 sevan { 0xa438, 0x8010 }, \
1457 1.1 sevan { 0xa438, 0x1800 }, \
1458 1.1 sevan { 0xa438, 0x121a }, \
1459 1.1 sevan { 0xa438, 0xd0b4 }, \
1460 1.1 sevan { 0xa438, 0xd1bb }, \
1461 1.1 sevan { 0xa438, 0x1800 }, \
1462 1.1 sevan { 0xa438, 0x0898 }, \
1463 1.1 sevan { 0xa438, 0xd0b4 }, \
1464 1.1 sevan { 0xa438, 0xd1bb }, \
1465 1.1 sevan { 0xa438, 0x1800 }, \
1466 1.1 sevan { 0xa438, 0x0a0e }, \
1467 1.1 sevan { 0xa438, 0xd064 }, \
1468 1.1 sevan { 0xa438, 0xd18a }, \
1469 1.1 sevan { 0xa438, 0x1800 }, \
1470 1.1 sevan { 0xa438, 0x0b7e }, \
1471 1.1 sevan { 0xa438, 0x401c }, \
1472 1.1 sevan { 0xa438, 0xd501 }, \
1473 1.1 sevan { 0xa438, 0xa804 }, \
1474 1.1 sevan { 0xa438, 0x8804 }, \
1475 1.1 sevan { 0xa438, 0x1800 }, \
1476 1.1 sevan { 0xa438, 0x053b }, \
1477 1.1 sevan { 0xa438, 0xd500 }, \
1478 1.1 sevan { 0xa438, 0xa301 }, \
1479 1.1 sevan { 0xa438, 0x1800 }, \
1480 1.1 sevan { 0xa438, 0x0648 }, \
1481 1.1 sevan { 0xa438, 0xc520 }, \
1482 1.1 sevan { 0xa438, 0xa201 }, \
1483 1.1 sevan { 0xa438, 0xd701 }, \
1484 1.1 sevan { 0xa438, 0x252d }, \
1485 1.1 sevan { 0xa438, 0x1646 }, \
1486 1.1 sevan { 0xa438, 0xd708 }, \
1487 1.1 sevan { 0xa438, 0x4006 }, \
1488 1.1 sevan { 0xa438, 0x1800 }, \
1489 1.1 sevan { 0xa438, 0x1646 }, \
1490 1.1 sevan { 0xa438, 0x1800 }, \
1491 1.1 sevan { 0xa438, 0x0308 }, \
1492 1.1 sevan { 0xa436, 0xa026 }, \
1493 1.1 sevan { 0xa438, 0x0307 }, \
1494 1.1 sevan { 0xa436, 0xa024 }, \
1495 1.1 sevan { 0xa438, 0x1645 }, \
1496 1.1 sevan { 0xa436, 0xa022 }, \
1497 1.1 sevan { 0xa438, 0x0647 }, \
1498 1.1 sevan { 0xa436, 0xa020 }, \
1499 1.1 sevan { 0xa438, 0x053a }, \
1500 1.1 sevan { 0xa436, 0xa006 }, \
1501 1.1 sevan { 0xa438, 0x0b7c }, \
1502 1.1 sevan { 0xa436, 0xa004 }, \
1503 1.1 sevan { 0xa438, 0x0a0c }, \
1504 1.1 sevan { 0xa436, 0xa002 }, \
1505 1.1 sevan { 0xa438, 0x0896 }, \
1506 1.1 sevan { 0xa436, 0xa000 }, \
1507 1.1 sevan { 0xa438, 0x11a1 }, \
1508 1.1 sevan { 0xa436, 0xa008 }, \
1509 1.1 sevan { 0xa438, 0xff00 }, \
1510 1.1 sevan { 0xa436, 0xa016 }, \
1511 1.1 sevan { 0xa438, 0x0010 }, \
1512 1.1 sevan { 0xa436, 0xa012 }, \
1513 1.1 sevan { 0xa438, 0x0000 }, \
1514 1.1 sevan { 0xa436, 0xa014 }, \
1515 1.1 sevan { 0xa438, 0x1800 }, \
1516 1.1 sevan { 0xa438, 0x8010 }, \
1517 1.1 sevan { 0xa438, 0x1800 }, \
1518 1.1 sevan { 0xa438, 0x8015 }, \
1519 1.1 sevan { 0xa438, 0x1800 }, \
1520 1.1 sevan { 0xa438, 0x801a }, \
1521 1.1 sevan { 0xa438, 0x1800 }, \
1522 1.1 sevan { 0xa438, 0x801a }, \
1523 1.1 sevan { 0xa438, 0x1800 }, \
1524 1.1 sevan { 0xa438, 0x801a }, \
1525 1.1 sevan { 0xa438, 0x1800 }, \
1526 1.1 sevan { 0xa438, 0x801a }, \
1527 1.1 sevan { 0xa438, 0x1800 }, \
1528 1.1 sevan { 0xa438, 0x801a }, \
1529 1.1 sevan { 0xa438, 0x1800 }, \
1530 1.1 sevan { 0xa438, 0x801a }, \
1531 1.1 sevan { 0xa438, 0xad02 }, \
1532 1.1 sevan { 0xa438, 0x1000 }, \
1533 1.1 sevan { 0xa438, 0x02d7 }, \
1534 1.1 sevan { 0xa438, 0x1800 }, \
1535 1.1 sevan { 0xa438, 0x00ed }, \
1536 1.1 sevan { 0xa438, 0x0c0f }, \
1537 1.1 sevan { 0xa438, 0x0509 }, \
1538 1.1 sevan { 0xa438, 0xc100 }, \
1539 1.1 sevan { 0xa438, 0x1800 }, \
1540 1.1 sevan { 0xa438, 0x008f }, \
1541 1.1 sevan { 0xa436, 0xa08e }, \
1542 1.1 sevan { 0xa438, 0xffff }, \
1543 1.1 sevan { 0xa436, 0xa08c }, \
1544 1.1 sevan { 0xa438, 0xffff }, \
1545 1.1 sevan { 0xa436, 0xa08a }, \
1546 1.1 sevan { 0xa438, 0xffff }, \
1547 1.1 sevan { 0xa436, 0xa088 }, \
1548 1.1 sevan { 0xa438, 0xffff }, \
1549 1.1 sevan { 0xa436, 0xa086 }, \
1550 1.1 sevan { 0xa438, 0xffff }, \
1551 1.1 sevan { 0xa436, 0xa084 }, \
1552 1.1 sevan { 0xa438, 0xffff }, \
1553 1.1 sevan { 0xa436, 0xa082 }, \
1554 1.1 sevan { 0xa438, 0x008d }, \
1555 1.1 sevan { 0xa436, 0xa080 }, \
1556 1.1 sevan { 0xa438, 0x00eb }, \
1557 1.1 sevan { 0xa436, 0xa090 }, \
1558 1.1 sevan { 0xa438, 0x0103 }, \
1559 1.1 sevan { 0xa436, 0xa016 }, \
1560 1.1 sevan { 0xa438, 0x0020 }, \
1561 1.1 sevan { 0xa436, 0xa012 }, \
1562 1.1 sevan { 0xa438, 0x0000 }, \
1563 1.1 sevan { 0xa436, 0xa014 }, \
1564 1.1 sevan { 0xa438, 0x1800 }, \
1565 1.1 sevan { 0xa438, 0x8010 }, \
1566 1.1 sevan { 0xa438, 0x1800 }, \
1567 1.1 sevan { 0xa438, 0x8014 }, \
1568 1.1 sevan { 0xa438, 0x1800 }, \
1569 1.1 sevan { 0xa438, 0x8018 }, \
1570 1.1 sevan { 0xa438, 0x1800 }, \
1571 1.1 sevan { 0xa438, 0x8024 }, \
1572 1.1 sevan { 0xa438, 0x1800 }, \
1573 1.1 sevan { 0xa438, 0x8051 }, \
1574 1.1 sevan { 0xa438, 0x1800 }, \
1575 1.1 sevan { 0xa438, 0x8055 }, \
1576 1.1 sevan { 0xa438, 0x1800 }, \
1577 1.1 sevan { 0xa438, 0x8072 }, \
1578 1.1 sevan { 0xa438, 0x1800 }, \
1579 1.1 sevan { 0xa438, 0x80dc }, \
1580 1.1 sevan { 0xa438, 0x0000 }, \
1581 1.1 sevan { 0xa438, 0x0000 }, \
1582 1.1 sevan { 0xa438, 0x0000 }, \
1583 1.1 sevan { 0xa438, 0xfffd }, \
1584 1.1 sevan { 0xa438, 0x0000 }, \
1585 1.1 sevan { 0xa438, 0x0000 }, \
1586 1.1 sevan { 0xa438, 0x0000 }, \
1587 1.1 sevan { 0xa438, 0xfffd }, \
1588 1.1 sevan { 0xa438, 0x8301 }, \
1589 1.1 sevan { 0xa438, 0x800a }, \
1590 1.1 sevan { 0xa438, 0x8190 }, \
1591 1.1 sevan { 0xa438, 0x82a0 }, \
1592 1.1 sevan { 0xa438, 0x8404 }, \
1593 1.1 sevan { 0xa438, 0xa70c }, \
1594 1.1 sevan { 0xa438, 0x9402 }, \
1595 1.1 sevan { 0xa438, 0x890c }, \
1596 1.1 sevan { 0xa438, 0x8840 }, \
1597 1.1 sevan { 0xa438, 0xa380 }, \
1598 1.1 sevan { 0xa438, 0x1800 }, \
1599 1.1 sevan { 0xa438, 0x066e }, \
1600 1.1 sevan { 0xa438, 0xcb91 }, \
1601 1.1 sevan { 0xa438, 0xd700 }, \
1602 1.1 sevan { 0xa438, 0x4063 }, \
1603 1.1 sevan { 0xa438, 0xd139 }, \
1604 1.1 sevan { 0xa438, 0xf002 }, \
1605 1.1 sevan { 0xa438, 0xd140 }, \
1606 1.1 sevan { 0xa438, 0xd040 }, \
1607 1.1 sevan { 0xa438, 0xb404 }, \
1608 1.1 sevan { 0xa438, 0x0c0f }, \
1609 1.1 sevan { 0xa438, 0x0d00 }, \
1610 1.1 sevan { 0xa438, 0x1000 }, \
1611 1.1 sevan { 0xa438, 0x07e0 }, \
1612 1.1 sevan { 0xa438, 0xa610 }, \
1613 1.1 sevan { 0xa438, 0xa110 }, \
1614 1.1 sevan { 0xa438, 0xa2a0 }, \
1615 1.1 sevan { 0xa438, 0xa404 }, \
1616 1.1 sevan { 0xa438, 0xd704 }, \
1617 1.1 sevan { 0xa438, 0x4085 }, \
1618 1.1 sevan { 0xa438, 0xa180 }, \
1619 1.1 sevan { 0xa438, 0xa404 }, \
1620 1.1 sevan { 0xa438, 0x8280 }, \
1621 1.1 sevan { 0xa438, 0xd704 }, \
1622 1.1 sevan { 0xa438, 0x405d }, \
1623 1.1 sevan { 0xa438, 0xa720 }, \
1624 1.1 sevan { 0xa438, 0x1000 }, \
1625 1.1 sevan { 0xa438, 0x0743 }, \
1626 1.1 sevan { 0xa438, 0x1000 }, \
1627 1.1 sevan { 0xa438, 0x07f0 }, \
1628 1.1 sevan { 0xa438, 0xd700 }, \
1629 1.1 sevan { 0xa438, 0x5f74 }, \
1630 1.1 sevan { 0xa438, 0x1000 }, \
1631 1.1 sevan { 0xa438, 0x0743 }, \
1632 1.1 sevan { 0xa438, 0xd702 }, \
1633 1.1 sevan { 0xa438, 0x7fb6 }, \
1634 1.1 sevan { 0xa438, 0x8190 }, \
1635 1.1 sevan { 0xa438, 0x82a0 }, \
1636 1.1 sevan { 0xa438, 0x8404 }, \
1637 1.1 sevan { 0xa438, 0x8610 }, \
1638 1.1 sevan { 0xa438, 0x0000 }, \
1639 1.1 sevan { 0xa438, 0x0c0f }, \
1640 1.1 sevan { 0xa438, 0x0d01 }, \
1641 1.1 sevan { 0xa438, 0x1000 }, \
1642 1.1 sevan { 0xa438, 0x07e0 }, \
1643 1.1 sevan { 0xa438, 0x1800 }, \
1644 1.1 sevan { 0xa438, 0x066e }, \
1645 1.1 sevan { 0xa438, 0xd158 }, \
1646 1.1 sevan { 0xa438, 0xd04d }, \
1647 1.1 sevan { 0xa438, 0x1800 }, \
1648 1.1 sevan { 0xa438, 0x03d4 }, \
1649 1.1 sevan { 0xa438, 0x94bc }, \
1650 1.1 sevan { 0xa438, 0x870c }, \
1651 1.1 sevan { 0xa438, 0x8380 }, \
1652 1.1 sevan { 0xa438, 0xd10d }, \
1653 1.1 sevan { 0xa438, 0xd040 }, \
1654 1.1 sevan { 0xa438, 0x1000 }, \
1655 1.1 sevan { 0xa438, 0x07c4 }, \
1656 1.1 sevan { 0xa438, 0xd700 }, \
1657 1.1 sevan { 0xa438, 0x5fb4 }, \
1658 1.1 sevan { 0xa438, 0xa190 }, \
1659 1.1 sevan { 0xa438, 0xa00a }, \
1660 1.1 sevan { 0xa438, 0xa280 }, \
1661 1.1 sevan { 0xa438, 0xa404 }, \
1662 1.1 sevan { 0xa438, 0xa220 }, \
1663 1.1 sevan { 0xa438, 0xd130 }, \
1664 1.1 sevan { 0xa438, 0xd040 }, \
1665 1.1 sevan { 0xa438, 0x1000 }, \
1666 1.1 sevan { 0xa438, 0x07c4 }, \
1667 1.1 sevan { 0xa438, 0xd700 }, \
1668 1.1 sevan { 0xa438, 0x5fb4 }, \
1669 1.1 sevan { 0xa438, 0xbb80 }, \
1670 1.1 sevan { 0xa438, 0xd1c4 }, \
1671 1.1 sevan { 0xa438, 0xd074 }, \
1672 1.1 sevan { 0xa438, 0xa301 }, \
1673 1.1 sevan { 0xa438, 0xd704 }, \
1674 1.1 sevan { 0xa438, 0x604b }, \
1675 1.1 sevan { 0xa438, 0xa90c }, \
1676 1.1 sevan { 0xa438, 0x1800 }, \
1677 1.1 sevan { 0xa438, 0x0556 }, \
1678 1.1 sevan { 0xa438, 0xcb92 }, \
1679 1.1 sevan { 0xa438, 0xd700 }, \
1680 1.1 sevan { 0xa438, 0x4063 }, \
1681 1.1 sevan { 0xa438, 0xd116 }, \
1682 1.1 sevan { 0xa438, 0xf002 }, \
1683 1.1 sevan { 0xa438, 0xd119 }, \
1684 1.1 sevan { 0xa438, 0xd040 }, \
1685 1.1 sevan { 0xa438, 0xd703 }, \
1686 1.1 sevan { 0xa438, 0x60a0 }, \
1687 1.1 sevan { 0xa438, 0x6241 }, \
1688 1.1 sevan { 0xa438, 0x63e2 }, \
1689 1.1 sevan { 0xa438, 0x6583 }, \
1690 1.1 sevan { 0xa438, 0xf054 }, \
1691 1.1 sevan { 0xa438, 0xd701 }, \
1692 1.1 sevan { 0xa438, 0x611e }, \
1693 1.1 sevan { 0xa438, 0xd701 }, \
1694 1.1 sevan { 0xa438, 0x40da }, \
1695 1.1 sevan { 0xa438, 0x0cf0 }, \
1696 1.1 sevan { 0xa438, 0x0d10 }, \
1697 1.1 sevan { 0xa438, 0xa010 }, \
1698 1.1 sevan { 0xa438, 0x8740 }, \
1699 1.1 sevan { 0xa438, 0xf02f }, \
1700 1.1 sevan { 0xa438, 0x0cf0 }, \
1701 1.1 sevan { 0xa438, 0x0d50 }, \
1702 1.1 sevan { 0xa438, 0x8010 }, \
1703 1.1 sevan { 0xa438, 0xa740 }, \
1704 1.1 sevan { 0xa438, 0xf02a }, \
1705 1.1 sevan { 0xa438, 0xd701 }, \
1706 1.1 sevan { 0xa438, 0x611e }, \
1707 1.1 sevan { 0xa438, 0xd701 }, \
1708 1.1 sevan { 0xa438, 0x40da }, \
1709 1.1 sevan { 0xa438, 0x0cf0 }, \
1710 1.1 sevan { 0xa438, 0x0d20 }, \
1711 1.1 sevan { 0xa438, 0xa010 }, \
1712 1.1 sevan { 0xa438, 0x8740 }, \
1713 1.1 sevan { 0xa438, 0xf021 }, \
1714 1.1 sevan { 0xa438, 0x0cf0 }, \
1715 1.1 sevan { 0xa438, 0x0d60 }, \
1716 1.1 sevan { 0xa438, 0x8010 }, \
1717 1.1 sevan { 0xa438, 0xa740 }, \
1718 1.1 sevan { 0xa438, 0xf01c }, \
1719 1.1 sevan { 0xa438, 0xd701 }, \
1720 1.1 sevan { 0xa438, 0x611e }, \
1721 1.1 sevan { 0xa438, 0xd701 }, \
1722 1.1 sevan { 0xa438, 0x40da }, \
1723 1.1 sevan { 0xa438, 0x0cf0 }, \
1724 1.1 sevan { 0xa438, 0x0d30 }, \
1725 1.1 sevan { 0xa438, 0xa010 }, \
1726 1.1 sevan { 0xa438, 0x8740 }, \
1727 1.1 sevan { 0xa438, 0xf013 }, \
1728 1.1 sevan { 0xa438, 0x0cf0 }, \
1729 1.1 sevan { 0xa438, 0x0d70 }, \
1730 1.1 sevan { 0xa438, 0x8010 }, \
1731 1.1 sevan { 0xa438, 0xa740 }, \
1732 1.1 sevan { 0xa438, 0xf00e }, \
1733 1.1 sevan { 0xa438, 0xd701 }, \
1734 1.1 sevan { 0xa438, 0x611e }, \
1735 1.1 sevan { 0xa438, 0xd701 }, \
1736 1.1 sevan { 0xa438, 0x40da }, \
1737 1.1 sevan { 0xa438, 0x0cf0 }, \
1738 1.1 sevan { 0xa438, 0x0d40 }, \
1739 1.1 sevan { 0xa438, 0xa010 }, \
1740 1.1 sevan { 0xa438, 0x8740 }, \
1741 1.1 sevan { 0xa438, 0xf005 }, \
1742 1.1 sevan { 0xa438, 0x0cf0 }, \
1743 1.1 sevan { 0xa438, 0x0d80 }, \
1744 1.1 sevan { 0xa438, 0x8010 }, \
1745 1.1 sevan { 0xa438, 0xa740 }, \
1746 1.1 sevan { 0xa438, 0x1000 }, \
1747 1.1 sevan { 0xa438, 0x07e8 }, \
1748 1.1 sevan { 0xa438, 0xa610 }, \
1749 1.1 sevan { 0xa438, 0xd704 }, \
1750 1.1 sevan { 0xa438, 0x405d }, \
1751 1.1 sevan { 0xa438, 0xa720 }, \
1752 1.1 sevan { 0xa438, 0xd700 }, \
1753 1.1 sevan { 0xa438, 0x5ff4 }, \
1754 1.1 sevan { 0xa438, 0xa008 }, \
1755 1.1 sevan { 0xa438, 0xd704 }, \
1756 1.1 sevan { 0xa438, 0x4046 }, \
1757 1.1 sevan { 0xa438, 0xa002 }, \
1758 1.1 sevan { 0xa438, 0x1000 }, \
1759 1.1 sevan { 0xa438, 0x0743 }, \
1760 1.1 sevan { 0xa438, 0x1000 }, \
1761 1.1 sevan { 0xa438, 0x07fb }, \
1762 1.1 sevan { 0xa438, 0xd703 }, \
1763 1.1 sevan { 0xa438, 0x7f6f }, \
1764 1.1 sevan { 0xa438, 0x7f4e }, \
1765 1.1 sevan { 0xa438, 0x7f2d }, \
1766 1.1 sevan { 0xa438, 0x7f0c }, \
1767 1.1 sevan { 0xa438, 0x800a }, \
1768 1.1 sevan { 0xa438, 0x0cf0 }, \
1769 1.1 sevan { 0xa438, 0x0d00 }, \
1770 1.1 sevan { 0xa438, 0x1000 }, \
1771 1.1 sevan { 0xa438, 0x07e8 }, \
1772 1.1 sevan { 0xa438, 0x8010 }, \
1773 1.1 sevan { 0xa438, 0xa740 }, \
1774 1.1 sevan { 0xa438, 0x1000 }, \
1775 1.1 sevan { 0xa438, 0x0743 }, \
1776 1.1 sevan { 0xa438, 0xd702 }, \
1777 1.1 sevan { 0xa438, 0x7fb5 }, \
1778 1.1 sevan { 0xa438, 0xd701 }, \
1779 1.1 sevan { 0xa438, 0x3ad4 }, \
1780 1.1 sevan { 0xa438, 0x0556 }, \
1781 1.1 sevan { 0xa438, 0x8610 }, \
1782 1.1 sevan { 0xa438, 0x1800 }, \
1783 1.1 sevan { 0xa438, 0x066e }, \
1784 1.1 sevan { 0xa438, 0xd1f5 }, \
1785 1.1 sevan { 0xa438, 0xd049 }, \
1786 1.1 sevan { 0xa438, 0x1800 }, \
1787 1.1 sevan { 0xa438, 0x01ec }, \
1788 1.1 sevan { 0xa436, 0xa10e }, \
1789 1.1 sevan { 0xa438, 0x01ea }, \
1790 1.1 sevan { 0xa436, 0xa10c }, \
1791 1.1 sevan { 0xa438, 0x06a9 }, \
1792 1.1 sevan { 0xa436, 0xa10a }, \
1793 1.1 sevan { 0xa438, 0x078a }, \
1794 1.1 sevan { 0xa436, 0xa108 }, \
1795 1.1 sevan { 0xa438, 0x03d2 }, \
1796 1.1 sevan { 0xa436, 0xa106 }, \
1797 1.1 sevan { 0xa438, 0x067f }, \
1798 1.1 sevan { 0xa436, 0xa104 }, \
1799 1.1 sevan { 0xa438, 0x0665 }, \
1800 1.1 sevan { 0xa436, 0xa102 }, \
1801 1.1 sevan { 0xa438, 0x0000 }, \
1802 1.1 sevan { 0xa436, 0xa100 }, \
1803 1.1 sevan { 0xa438, 0x0000 }, \
1804 1.1 sevan { 0xa436, 0xa110 }, \
1805 1.1 sevan { 0xa438, 0x00fc }, \
1806 1.1 sevan { 0xa436, 0xb87c }, \
1807 1.1 sevan { 0xa438, 0x8530 }, \
1808 1.1 sevan { 0xa436, 0xb87e }, \
1809 1.1 sevan { 0xa438, 0xaf85 }, \
1810 1.1 sevan { 0xa438, 0x3caf }, \
1811 1.1 sevan { 0xa438, 0x8545 }, \
1812 1.1 sevan { 0xa438, 0xaf85 }, \
1813 1.1 sevan { 0xa438, 0x45af }, \
1814 1.1 sevan { 0xa438, 0x8545 }, \
1815 1.1 sevan { 0xa438, 0xee82 }, \
1816 1.1 sevan { 0xa438, 0xf900 }, \
1817 1.1 sevan { 0xa438, 0x0103 }, \
1818 1.1 sevan { 0xa438, 0xaf03 }, \
1819 1.1 sevan { 0xa438, 0xb7f8 }, \
1820 1.1 sevan { 0xa438, 0xe0a6 }, \
1821 1.1 sevan { 0xa438, 0x00e1 }, \
1822 1.1 sevan { 0xa438, 0xa601 }, \
1823 1.1 sevan { 0xa438, 0xef01 }, \
1824 1.1 sevan { 0xa438, 0x58f0 }, \
1825 1.1 sevan { 0xa438, 0xa080 }, \
1826 1.1 sevan { 0xa438, 0x37a1 }, \
1827 1.1 sevan { 0xa438, 0x8402 }, \
1828 1.1 sevan { 0xa438, 0xae16 }, \
1829 1.1 sevan { 0xa438, 0xa185 }, \
1830 1.1 sevan { 0xa438, 0x02ae }, \
1831 1.1 sevan { 0xa438, 0x11a1 }, \
1832 1.1 sevan { 0xa438, 0x8702 }, \
1833 1.1 sevan { 0xa438, 0xae0c }, \
1834 1.1 sevan { 0xa438, 0xa188 }, \
1835 1.1 sevan { 0xa438, 0x02ae }, \
1836 1.1 sevan { 0xa438, 0x07a1 }, \
1837 1.1 sevan { 0xa438, 0x8902 }, \
1838 1.1 sevan { 0xa438, 0xae02 }, \
1839 1.1 sevan { 0xa438, 0xae1c }, \
1840 1.1 sevan { 0xa438, 0xe0b4 }, \
1841 1.1 sevan { 0xa438, 0x62e1 }, \
1842 1.1 sevan { 0xa438, 0xb463 }, \
1843 1.1 sevan { 0xa438, 0x6901 }, \
1844 1.1 sevan { 0xa438, 0xe4b4 }, \
1845 1.1 sevan { 0xa438, 0x62e5 }, \
1846 1.1 sevan { 0xa438, 0xb463 }, \
1847 1.1 sevan { 0xa438, 0xe0b4 }, \
1848 1.1 sevan { 0xa438, 0x62e1 }, \
1849 1.1 sevan { 0xa438, 0xb463 }, \
1850 1.1 sevan { 0xa438, 0x6901 }, \
1851 1.1 sevan { 0xa438, 0xe4b4 }, \
1852 1.1 sevan { 0xa438, 0x62e5 }, \
1853 1.1 sevan { 0xa438, 0xb463 }, \
1854 1.1 sevan { 0xa438, 0xfc04 }, \
1855 1.1 sevan { 0xa436, 0xb85e }, \
1856 1.1 sevan { 0xa438, 0x03b3 }, \
1857 1.1 sevan { 0xa436, 0xb860 }, \
1858 1.1 sevan { 0xa438, 0xffff }, \
1859 1.1 sevan { 0xa436, 0xb862 }, \
1860 1.1 sevan { 0xa438, 0xffff }, \
1861 1.1 sevan { 0xa436, 0xb864 }, \
1862 1.1 sevan { 0xa438, 0xffff }, \
1863 1.1 sevan { 0xa436, 0xb878 }, \
1864 1.1 sevan { 0xa438, 0x0001 }
1865