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if_rtk_pci.c revision 1.3.6.4
      1  1.3.6.4  bouyer /*	$NetBSD: if_rtk_pci.c,v 1.3.6.4 2001/02/11 19:15:55 bouyer Exp $	*/
      2  1.3.6.2  bouyer 
      3  1.3.6.2  bouyer /*
      4  1.3.6.2  bouyer  * Copyright (c) 1997, 1998
      5  1.3.6.2  bouyer  *	Bill Paul <wpaul (at) ctr.columbia.edu>.  All rights reserved.
      6  1.3.6.2  bouyer  *
      7  1.3.6.2  bouyer  * Redistribution and use in source and binary forms, with or without
      8  1.3.6.2  bouyer  * modification, are permitted provided that the following conditions
      9  1.3.6.2  bouyer  * are met:
     10  1.3.6.2  bouyer  * 1. Redistributions of source code must retain the above copyright
     11  1.3.6.2  bouyer  *    notice, this list of conditions and the following disclaimer.
     12  1.3.6.2  bouyer  * 2. Redistributions in binary form must reproduce the above copyright
     13  1.3.6.2  bouyer  *    notice, this list of conditions and the following disclaimer in the
     14  1.3.6.2  bouyer  *    documentation and/or other materials provided with the distribution.
     15  1.3.6.2  bouyer  * 3. All advertising materials mentioning features or use of this software
     16  1.3.6.2  bouyer  *    must display the following acknowledgement:
     17  1.3.6.2  bouyer  *	This product includes software developed by Bill Paul.
     18  1.3.6.2  bouyer  * 4. Neither the name of the author nor the names of any co-contributors
     19  1.3.6.2  bouyer  *    may be used to endorse or promote products derived from this software
     20  1.3.6.2  bouyer  *    without specific prior written permission.
     21  1.3.6.2  bouyer  *
     22  1.3.6.2  bouyer  * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
     23  1.3.6.2  bouyer  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     24  1.3.6.2  bouyer  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     25  1.3.6.2  bouyer  * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
     26  1.3.6.2  bouyer  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     27  1.3.6.2  bouyer  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     28  1.3.6.2  bouyer  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     29  1.3.6.2  bouyer  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     30  1.3.6.2  bouyer  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     31  1.3.6.2  bouyer  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
     32  1.3.6.2  bouyer  * THE POSSIBILITY OF SUCH DAMAGE.
     33  1.3.6.2  bouyer  *
     34  1.3.6.2  bouyer  *	FreeBSD Id: if_rl.c,v 1.17 1999/06/19 20:17:37 wpaul Exp
     35  1.3.6.2  bouyer  */
     36  1.3.6.2  bouyer 
     37  1.3.6.2  bouyer /*
     38  1.3.6.2  bouyer  * RealTek 8129/8139 PCI NIC driver
     39  1.3.6.2  bouyer  *
     40  1.3.6.2  bouyer  * Supports several extremely cheap PCI 10/100 adapters based on
     41  1.3.6.2  bouyer  * the RealTek chipset. Datasheets can be obtained from
     42  1.3.6.2  bouyer  * www.realtek.com.tw.
     43  1.3.6.2  bouyer  *
     44  1.3.6.2  bouyer  * Written by Bill Paul <wpaul (at) ctr.columbia.edu>
     45  1.3.6.2  bouyer  * Electrical Engineering Department
     46  1.3.6.2  bouyer  * Columbia University, New York City
     47  1.3.6.2  bouyer  */
     48  1.3.6.2  bouyer 
     49  1.3.6.2  bouyer /*
     50  1.3.6.2  bouyer  * The RealTek 8139 PCI NIC redefines the meaning of 'low end.' This is
     51  1.3.6.2  bouyer  * probably the worst PCI ethernet controller ever made, with the possible
     52  1.3.6.2  bouyer  * exception of the FEAST chip made by SMC. The 8139 supports bus-master
     53  1.3.6.2  bouyer  * DMA, but it has a terrible interface that nullifies any performance
     54  1.3.6.2  bouyer  * gains that bus-master DMA usually offers.
     55  1.3.6.2  bouyer  *
     56  1.3.6.2  bouyer  * For transmission, the chip offers a series of four TX descriptor
     57  1.3.6.2  bouyer  * registers. Each transmit frame must be in a contiguous buffer, aligned
     58  1.3.6.2  bouyer  * on a longword (32-bit) boundary. This means we almost always have to
     59  1.3.6.2  bouyer  * do mbuf copies in order to transmit a frame, except in the unlikely
     60  1.3.6.2  bouyer  * case where a) the packet fits into a single mbuf, and b) the packet
     61  1.3.6.2  bouyer  * is 32-bit aligned within the mbuf's data area. The presence of only
     62  1.3.6.2  bouyer  * four descriptor registers means that we can never have more than four
     63  1.3.6.2  bouyer  * packets queued for transmission at any one time.
     64  1.3.6.2  bouyer  *
     65  1.3.6.2  bouyer  * Reception is not much better. The driver has to allocate a single large
     66  1.3.6.2  bouyer  * buffer area (up to 64K in size) into which the chip will DMA received
     67  1.3.6.2  bouyer  * frames. Because we don't know where within this region received packets
     68  1.3.6.2  bouyer  * will begin or end, we have no choice but to copy data from the buffer
     69  1.3.6.2  bouyer  * area into mbufs in order to pass the packets up to the higher protocol
     70  1.3.6.2  bouyer  * levels.
     71  1.3.6.2  bouyer  *
     72  1.3.6.2  bouyer  * It's impossible given this rotten design to really achieve decent
     73  1.3.6.2  bouyer  * performance at 100Mbps, unless you happen to have a 400Mhz PII or
     74  1.3.6.2  bouyer  * some equally overmuscled CPU to drive it.
     75  1.3.6.2  bouyer  *
     76  1.3.6.2  bouyer  * On the bright side, the 8139 does have a built-in PHY, although
     77  1.3.6.2  bouyer  * rather than using an MDIO serial interface like most other NICs, the
     78  1.3.6.2  bouyer  * PHY registers are directly accessible through the 8139's register
     79  1.3.6.2  bouyer  * space. The 8139 supports autonegotiation, as well as a 64-bit multicast
     80  1.3.6.2  bouyer  * filter.
     81  1.3.6.2  bouyer  *
     82  1.3.6.2  bouyer  * The 8129 chip is an older version of the 8139 that uses an external PHY
     83  1.3.6.2  bouyer  * chip. The 8129 has a serial MDIO interface for accessing the MII where
     84  1.3.6.2  bouyer  * the 8139 lets you directly access the on-board PHY registers. We need
     85  1.3.6.2  bouyer  * to select which interface to use depending on the chip type.
     86  1.3.6.2  bouyer  */
     87  1.3.6.2  bouyer 
     88  1.3.6.2  bouyer #include "opt_inet.h"
     89  1.3.6.2  bouyer #include "opt_ns.h"
     90  1.3.6.2  bouyer #include "bpfilter.h"
     91  1.3.6.2  bouyer #include "rnd.h"
     92  1.3.6.2  bouyer 
     93  1.3.6.2  bouyer #include <sys/param.h>
     94  1.3.6.2  bouyer #include <sys/systm.h>
     95  1.3.6.2  bouyer #include <sys/callout.h>
     96  1.3.6.2  bouyer #include <sys/device.h>
     97  1.3.6.2  bouyer #include <sys/sockio.h>
     98  1.3.6.2  bouyer #include <sys/mbuf.h>
     99  1.3.6.2  bouyer #include <sys/malloc.h>
    100  1.3.6.2  bouyer #include <sys/kernel.h>
    101  1.3.6.2  bouyer #include <sys/socket.h>
    102  1.3.6.2  bouyer 
    103  1.3.6.2  bouyer #include <net/if.h>
    104  1.3.6.2  bouyer #include <net/if_arp.h>
    105  1.3.6.2  bouyer #include <net/if_ether.h>
    106  1.3.6.2  bouyer #include <net/if_dl.h>
    107  1.3.6.2  bouyer #include <net/if_media.h>
    108  1.3.6.2  bouyer #ifdef INET
    109  1.3.6.2  bouyer #include <netinet/in.h>
    110  1.3.6.2  bouyer #include <netinet/if_inarp.h>
    111  1.3.6.2  bouyer #endif
    112  1.3.6.2  bouyer #ifdef NS
    113  1.3.6.2  bouyer #include <netns/ns.h>
    114  1.3.6.2  bouyer #include <netns/ns_if.h>
    115  1.3.6.2  bouyer #endif
    116  1.3.6.2  bouyer 
    117  1.3.6.2  bouyer #if NBPFILTER > 0
    118  1.3.6.2  bouyer #include <net/bpf.h>
    119  1.3.6.2  bouyer #endif
    120  1.3.6.2  bouyer #if NRND > 0
    121  1.3.6.2  bouyer #include <sys/rnd.h>
    122  1.3.6.2  bouyer #endif
    123  1.3.6.2  bouyer 
    124  1.3.6.2  bouyer #include <machine/bus.h>
    125  1.3.6.2  bouyer 
    126  1.3.6.2  bouyer #include <dev/pci/pcireg.h>
    127  1.3.6.2  bouyer #include <dev/pci/pcivar.h>
    128  1.3.6.2  bouyer #include <dev/pci/pcidevs.h>
    129  1.3.6.2  bouyer 
    130  1.3.6.2  bouyer #include <dev/mii/mii.h>
    131  1.3.6.2  bouyer #include <dev/mii/miivar.h>
    132  1.3.6.2  bouyer 
    133  1.3.6.2  bouyer /*
    134  1.3.6.2  bouyer  * Default to using PIO access for this driver. On SMP systems,
    135  1.3.6.2  bouyer  * there appear to be problems with memory mapped mode: it looks like
    136  1.3.6.2  bouyer  * doing too many memory mapped access back to back in rapid succession
    137  1.3.6.2  bouyer  * can hang the bus. I'm inclined to blame this on crummy design/construction
    138  1.3.6.2  bouyer  * on the part of RealTek. Memory mapped mode does appear to work on
    139  1.3.6.2  bouyer  * uniprocessor systems though.
    140  1.3.6.2  bouyer  */
    141  1.3.6.4  bouyer #ifndef dreamcast		/* XXX */
    142  1.3.6.2  bouyer #define RTK_USEIOSPACE
    143  1.3.6.4  bouyer #endif
    144  1.3.6.2  bouyer 
    145  1.3.6.2  bouyer #include <dev/ic/rtl81x9reg.h>
    146  1.3.6.2  bouyer #include <dev/ic/rtl81x9var.h>
    147  1.3.6.2  bouyer 
    148  1.3.6.2  bouyer struct rtk_pci_softc {
    149  1.3.6.2  bouyer 	struct rtk_softc sc_rtk;	/* real rtk softc */
    150  1.3.6.2  bouyer 
    151  1.3.6.2  bouyer 	/* PCI-specific goo.*/
    152  1.3.6.2  bouyer 	void *sc_ih;
    153  1.3.6.2  bouyer 	pci_chipset_tag_t sc_pc; 	/* PCI chipset */
    154  1.3.6.2  bouyer 	pcitag_t sc_pcitag;		/* PCI tag */
    155  1.3.6.2  bouyer };
    156  1.3.6.2  bouyer 
    157  1.3.6.2  bouyer static const struct rtk_type rtk_pci_devs[] = {
    158  1.3.6.2  bouyer 	{ PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8129,
    159  1.3.6.2  bouyer 		"RealTek 8129 10/100BaseTX",
    160  1.3.6.2  bouyer 		RTK_8129 },
    161  1.3.6.2  bouyer 	{ PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8139,
    162  1.3.6.2  bouyer 		"RealTek 8139 10/100BaseTX",
    163  1.3.6.2  bouyer 		RTK_8139 },
    164  1.3.6.2  bouyer 	{ PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_MPX5030,
    165  1.3.6.2  bouyer 		"Accton MPX 5030/5038 10/100BaseTX",
    166  1.3.6.2  bouyer 		RTK_8139 },
    167  1.3.6.2  bouyer 	{ PCI_VENDOR_DELTA, PCI_PRODUCT_DELTA_8139,
    168  1.3.6.2  bouyer 		"Delta Electronics 8139 10/100BaseTX",
    169  1.3.6.2  bouyer 		RTK_8139 },
    170  1.3.6.2  bouyer 	{ PCI_VENDOR_ADDTRON, PCI_PRODUCT_ADDTRON_8139,
    171  1.3.6.2  bouyer 		"Addtron Technology 8139 10/100BaseTX",
    172  1.3.6.2  bouyer 		RTK_8139 },
    173  1.3.6.4  bouyer 	{ PCI_VENDOR_SEGA, PCI_PRODUCT_SEGA_BROADBAND,
    174  1.3.6.4  bouyer 		"SEGA Broadband Adapter",
    175  1.3.6.4  bouyer 		RTK_8139 },
    176  1.3.6.2  bouyer 	{ 0, 0, NULL, 0 }
    177  1.3.6.2  bouyer };
    178  1.3.6.2  bouyer 
    179  1.3.6.2  bouyer const struct rtk_type *rtk_pci_lookup __P((const struct pci_attach_args *));
    180  1.3.6.2  bouyer 
    181  1.3.6.2  bouyer int	rtk_pci_match __P((struct device *, struct cfdata *, void *));
    182  1.3.6.2  bouyer void	rtk_pci_attach __P((struct device *, struct device *, void *));
    183  1.3.6.2  bouyer 
    184  1.3.6.2  bouyer struct cfattach rtk_pci_ca = {
    185  1.3.6.2  bouyer 	sizeof(struct rtk_pci_softc), rtk_pci_match, rtk_pci_attach,
    186  1.3.6.2  bouyer };
    187  1.3.6.2  bouyer 
    188  1.3.6.2  bouyer const struct rtk_type *
    189  1.3.6.2  bouyer rtk_pci_lookup(pa)
    190  1.3.6.2  bouyer 	const struct pci_attach_args *pa;
    191  1.3.6.2  bouyer {
    192  1.3.6.2  bouyer 	const struct rtk_type *t;
    193  1.3.6.2  bouyer 
    194  1.3.6.2  bouyer 	for (t = rtk_pci_devs; t->rtk_name != NULL; t++){
    195  1.3.6.2  bouyer 		if (PCI_VENDOR(pa->pa_id) == t->rtk_vid &&
    196  1.3.6.2  bouyer 		    PCI_PRODUCT(pa->pa_id) == t->rtk_did) {
    197  1.3.6.2  bouyer 			return (t);
    198  1.3.6.2  bouyer 		}
    199  1.3.6.2  bouyer 	}
    200  1.3.6.2  bouyer 	return (NULL);
    201  1.3.6.2  bouyer }
    202  1.3.6.2  bouyer 
    203  1.3.6.2  bouyer int
    204  1.3.6.2  bouyer rtk_pci_match(parent, match, aux)
    205  1.3.6.2  bouyer 	struct device *parent;
    206  1.3.6.2  bouyer 	struct cfdata *match;
    207  1.3.6.2  bouyer 	void *aux;
    208  1.3.6.2  bouyer {
    209  1.3.6.2  bouyer 	struct pci_attach_args *pa = aux;
    210  1.3.6.2  bouyer 
    211  1.3.6.2  bouyer 	if (rtk_pci_lookup(pa) != NULL)
    212  1.3.6.2  bouyer 		return (1);
    213  1.3.6.2  bouyer 
    214  1.3.6.2  bouyer 	return (0);
    215  1.3.6.2  bouyer }
    216  1.3.6.2  bouyer 
    217  1.3.6.2  bouyer /*
    218  1.3.6.2  bouyer  * Attach the interface. Allocate softc structures, do ifmedia
    219  1.3.6.2  bouyer  * setup and ethernet/BPF attach.
    220  1.3.6.2  bouyer  */
    221  1.3.6.2  bouyer void
    222  1.3.6.2  bouyer rtk_pci_attach(parent, self, aux)
    223  1.3.6.2  bouyer 	struct device *parent, *self;
    224  1.3.6.2  bouyer 	void *aux;
    225  1.3.6.2  bouyer {
    226  1.3.6.2  bouyer 	struct rtk_pci_softc *psc = (struct rtk_pci_softc *)self;
    227  1.3.6.2  bouyer 	struct rtk_softc *sc = &psc->sc_rtk;
    228  1.3.6.2  bouyer 	pcireg_t command;
    229  1.3.6.2  bouyer 	struct pci_attach_args *pa = aux;
    230  1.3.6.2  bouyer 	pci_chipset_tag_t pc = pa->pa_pc;
    231  1.3.6.2  bouyer 	pci_intr_handle_t ih;
    232  1.3.6.2  bouyer 	const char *intrstr = NULL;
    233  1.3.6.2  bouyer 	const struct rtk_type *t;
    234  1.3.6.2  bouyer 	int pmreg;
    235  1.3.6.2  bouyer 
    236  1.3.6.2  bouyer 	psc->sc_pc = pa->pa_pc;
    237  1.3.6.2  bouyer 	psc->sc_pcitag = pa->pa_tag;
    238  1.3.6.2  bouyer 
    239  1.3.6.2  bouyer 	t = rtk_pci_lookup(pa);
    240  1.3.6.2  bouyer 	if (t == NULL) {
    241  1.3.6.2  bouyer 		printf("\n");
    242  1.3.6.2  bouyer 		panic("rtk_pci_attach: impossible");
    243  1.3.6.2  bouyer 	}
    244  1.3.6.2  bouyer 	printf(": %s\n", t->rtk_name);
    245  1.3.6.2  bouyer 
    246  1.3.6.2  bouyer 	/*
    247  1.3.6.2  bouyer 	 * Handle power management nonsense.
    248  1.3.6.2  bouyer 	 */
    249  1.3.6.2  bouyer 
    250  1.3.6.2  bouyer 	if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PWRMGMT, &pmreg, 0)) {
    251  1.3.6.2  bouyer 		command = pci_conf_read(pc, pa->pa_tag, pmreg + 4);
    252  1.3.6.2  bouyer 		if (command & RTK_PSTATE_MASK) {
    253  1.3.6.2  bouyer 			pcireg_t iobase, membase, irq;
    254  1.3.6.2  bouyer 
    255  1.3.6.2  bouyer 			/* Save important PCI config data. */
    256  1.3.6.2  bouyer 			iobase = pci_conf_read(pc, pa->pa_tag, RTK_PCI_LOIO);
    257  1.3.6.2  bouyer 			membase = pci_conf_read(pc, pa->pa_tag, RTK_PCI_LOMEM);
    258  1.3.6.2  bouyer 			irq = pci_conf_read(pc, pa->pa_tag,
    259  1.3.6.2  bouyer 					    PCI_PRODUCT_DELTA_8139);
    260  1.3.6.2  bouyer 
    261  1.3.6.2  bouyer 			/* Reset the power state. */
    262  1.3.6.2  bouyer 			printf("%s: chip is is in D%d power mode "
    263  1.3.6.2  bouyer 			"-- setting to D0\n", sc->sc_dev.dv_xname,
    264  1.3.6.2  bouyer 			       command & RTK_PSTATE_MASK);
    265  1.3.6.2  bouyer 			command &= 0xFFFFFFFC;
    266  1.3.6.2  bouyer 			pci_conf_write(pc, pa->pa_tag, pmreg + 4, command);
    267  1.3.6.2  bouyer 
    268  1.3.6.2  bouyer 			/* Restore PCI config data. */
    269  1.3.6.2  bouyer 			pci_conf_write(pc, pa->pa_tag, RTK_PCI_LOIO, iobase);
    270  1.3.6.2  bouyer 			pci_conf_write(pc, pa->pa_tag, RTK_PCI_LOMEM, membase);
    271  1.3.6.2  bouyer 			pci_conf_write(pc, pa->pa_tag,
    272  1.3.6.2  bouyer 				       PCI_PRODUCT_DELTA_8139, irq);
    273  1.3.6.2  bouyer 		}
    274  1.3.6.2  bouyer 	}
    275  1.3.6.2  bouyer 
    276  1.3.6.2  bouyer 	/*
    277  1.3.6.2  bouyer 	 * Map control/status registers.
    278  1.3.6.2  bouyer 	 */
    279  1.3.6.2  bouyer #ifdef RTK_USEIOSPACE
    280  1.3.6.2  bouyer 	if (pci_mapreg_map(pa, RTK_PCI_LOIO, PCI_MAPREG_TYPE_IO, 0,
    281  1.3.6.2  bouyer 	    &sc->rtk_btag, &sc->rtk_bhandle, NULL, NULL)) {
    282  1.3.6.2  bouyer 		printf("%s: can't map i/o space\n", sc->sc_dev.dv_xname);
    283  1.3.6.2  bouyer 		return;
    284  1.3.6.2  bouyer 	}
    285  1.3.6.2  bouyer #else
    286  1.3.6.2  bouyer 	if (pci_mapreg_map(pa, RTK_PCI_LOMEM, PCI_MAPREG_TYPE_MEM, 0,
    287  1.3.6.2  bouyer 	    &sc->rtk_btag, &sc->rtk_bhandle, NULL, NULL)) {
    288  1.3.6.4  bouyer 		printf("%s: can't map mem space\n", sc->sc_dev.dv_xname);
    289  1.3.6.2  bouyer 		return;
    290  1.3.6.2  bouyer 	}
    291  1.3.6.2  bouyer #endif
    292  1.3.6.2  bouyer 
    293  1.3.6.2  bouyer 	/* Allocate interrupt */
    294  1.3.6.3  bouyer 	if (pci_intr_map(pa, &ih)) {
    295  1.3.6.2  bouyer 		printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname);
    296  1.3.6.2  bouyer 		return;
    297  1.3.6.2  bouyer 	}
    298  1.3.6.2  bouyer 	intrstr = pci_intr_string(pc, ih);
    299  1.3.6.2  bouyer 	psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, rtk_intr, sc);
    300  1.3.6.2  bouyer 	if (psc->sc_ih == NULL) {
    301  1.3.6.2  bouyer 		printf("%s: couldn't establish interrupt",
    302  1.3.6.2  bouyer 		    sc->sc_dev.dv_xname);
    303  1.3.6.2  bouyer 		if (intrstr != NULL)
    304  1.3.6.2  bouyer 			printf(" at %s", intrstr);
    305  1.3.6.2  bouyer 		printf("\n");
    306  1.3.6.2  bouyer 		return;
    307  1.3.6.2  bouyer 	}
    308  1.3.6.2  bouyer 
    309  1.3.6.2  bouyer 	sc->rtk_type = t->rtk_type;
    310  1.3.6.2  bouyer 
    311  1.3.6.2  bouyer 	printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr);
    312  1.3.6.2  bouyer 
    313  1.3.6.2  bouyer 	sc->sc_dmat = pa->pa_dmat;
    314  1.3.6.2  bouyer 
    315  1.3.6.2  bouyer 	rtk_attach(sc);
    316  1.3.6.2  bouyer }
    317