if_rtw_pci.c revision 1.1.2.2
1 1.1.2.2 skrll /* $NetBSD: if_rtw_pci.c,v 1.1.2.2 2004/10/19 15:56:59 skrll Exp $ */ 2 1.1.2.2 skrll 3 1.1.2.2 skrll /*- 4 1.1.2.2 skrll * Copyright (c) 1998, 1999, 2000, 2002 The NetBSD Foundation, Inc. 5 1.1.2.2 skrll * All rights reserved. 6 1.1.2.2 skrll * 7 1.1.2.2 skrll * This code is derived from software contributed to The NetBSD Foundation 8 1.1.2.2 skrll * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 1.1.2.2 skrll * NASA Ames Research Center; Charles M. Hannum; and David Young. 10 1.1.2.2 skrll * 11 1.1.2.2 skrll * Redistribution and use in source and binary forms, with or without 12 1.1.2.2 skrll * modification, are permitted provided that the following conditions 13 1.1.2.2 skrll * are met: 14 1.1.2.2 skrll * 1. Redistributions of source code must retain the above copyright 15 1.1.2.2 skrll * notice, this list of conditions and the following disclaimer. 16 1.1.2.2 skrll * 2. Redistributions in binary form must reproduce the above copyright 17 1.1.2.2 skrll * notice, this list of conditions and the following disclaimer in the 18 1.1.2.2 skrll * documentation and/or other materials provided with the distribution. 19 1.1.2.2 skrll * 3. All advertising materials mentioning features or use of this software 20 1.1.2.2 skrll * must display the following acknowledgement: 21 1.1.2.2 skrll * This product includes software developed by the NetBSD 22 1.1.2.2 skrll * Foundation, Inc. and its contributors. 23 1.1.2.2 skrll * 4. Neither the name of The NetBSD Foundation nor the names of its 24 1.1.2.2 skrll * contributors may be used to endorse or promote products derived 25 1.1.2.2 skrll * from this software without specific prior written permission. 26 1.1.2.2 skrll * 27 1.1.2.2 skrll * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 1.1.2.2 skrll * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 1.1.2.2 skrll * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 1.1.2.2 skrll * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 1.1.2.2 skrll * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 1.1.2.2 skrll * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 1.1.2.2 skrll * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 1.1.2.2 skrll * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 1.1.2.2 skrll * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 1.1.2.2 skrll * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 1.1.2.2 skrll * POSSIBILITY OF SUCH DAMAGE. 38 1.1.2.2 skrll */ 39 1.1.2.2 skrll 40 1.1.2.2 skrll /* 41 1.1.2.2 skrll * PCI bus front-end for the Realtek RTL8180 802.11 MAC/BBP chip. 42 1.1.2.2 skrll * 43 1.1.2.2 skrll * Derived from the ADMtek ADM8211 PCI bus front-end. 44 1.1.2.2 skrll * 45 1.1.2.2 skrll * Derived from the ``Tulip'' PCI bus front-end. 46 1.1.2.2 skrll */ 47 1.1.2.2 skrll 48 1.1.2.2 skrll #include <sys/cdefs.h> 49 1.1.2.2 skrll __KERNEL_RCSID(0, "$NetBSD: if_rtw_pci.c,v 1.1.2.2 2004/10/19 15:56:59 skrll Exp $"); 50 1.1.2.2 skrll 51 1.1.2.2 skrll #include <sys/param.h> 52 1.1.2.2 skrll #include <sys/systm.h> 53 1.1.2.2 skrll #include <sys/mbuf.h> 54 1.1.2.2 skrll #include <sys/malloc.h> 55 1.1.2.2 skrll #include <sys/kernel.h> 56 1.1.2.2 skrll #include <sys/socket.h> 57 1.1.2.2 skrll #include <sys/ioctl.h> 58 1.1.2.2 skrll #include <sys/errno.h> 59 1.1.2.2 skrll #include <sys/device.h> 60 1.1.2.2 skrll 61 1.1.2.2 skrll #include <machine/endian.h> 62 1.1.2.2 skrll 63 1.1.2.2 skrll #include <net/if.h> 64 1.1.2.2 skrll #include <net/if_dl.h> 65 1.1.2.2 skrll #include <net/if_media.h> 66 1.1.2.2 skrll #include <net/if_ether.h> 67 1.1.2.2 skrll 68 1.1.2.2 skrll #include <net80211/ieee80211_compat.h> 69 1.1.2.2 skrll #include <net80211/ieee80211_radiotap.h> 70 1.1.2.2 skrll #include <net80211/ieee80211_var.h> 71 1.1.2.2 skrll 72 1.1.2.2 skrll #include <machine/bus.h> 73 1.1.2.2 skrll #include <machine/intr.h> 74 1.1.2.2 skrll 75 1.1.2.2 skrll #include <dev/ic/rtwreg.h> 76 1.1.2.2 skrll #include <dev/ic/sa2400reg.h> 77 1.1.2.2 skrll #include <dev/ic/rtwvar.h> 78 1.1.2.2 skrll 79 1.1.2.2 skrll #include <dev/pci/pcivar.h> 80 1.1.2.2 skrll #include <dev/pci/pcireg.h> 81 1.1.2.2 skrll #include <dev/pci/pcidevs.h> 82 1.1.2.2 skrll 83 1.1.2.2 skrll /* 84 1.1.2.2 skrll * PCI configuration space registers used by the ADM8211. 85 1.1.2.2 skrll */ 86 1.1.2.2 skrll #define RTW_PCI_IOBA 0x10 /* i/o mapped base */ 87 1.1.2.2 skrll #define RTW_PCI_MMBA 0x14 /* memory mapped base */ 88 1.1.2.2 skrll 89 1.1.2.2 skrll struct rtw_pci_softc { 90 1.1.2.2 skrll struct rtw_softc psc_rtw; /* real ADM8211 softc */ 91 1.1.2.2 skrll 92 1.1.2.2 skrll pci_intr_handle_t psc_ih; /* interrupt handle */ 93 1.1.2.2 skrll void *psc_intrcookie; 94 1.1.2.2 skrll 95 1.1.2.2 skrll pci_chipset_tag_t psc_pc; /* our PCI chipset */ 96 1.1.2.2 skrll pcitag_t psc_pcitag; /* our PCI tag */ 97 1.1.2.2 skrll }; 98 1.1.2.2 skrll 99 1.1.2.2 skrll static int rtw_pci_match(struct device *, struct cfdata *, void *); 100 1.1.2.2 skrll static void rtw_pci_attach(struct device *, struct device *, void *); 101 1.1.2.2 skrll 102 1.1.2.2 skrll CFATTACH_DECL(rtw_pci, sizeof(struct rtw_pci_softc), 103 1.1.2.2 skrll rtw_pci_match, rtw_pci_attach, NULL, NULL); 104 1.1.2.2 skrll 105 1.1.2.2 skrll static const struct rtw_pci_product { 106 1.1.2.2 skrll u_int32_t app_vendor; /* PCI vendor ID */ 107 1.1.2.2 skrll u_int32_t app_product; /* PCI product ID */ 108 1.1.2.2 skrll const char *app_product_name; 109 1.1.2.2 skrll } rtw_pci_products[] = { 110 1.1.2.2 skrll { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8180, 111 1.1.2.2 skrll "Realtek RTL8180 802.11 MAC/BBP" }, 112 1.1.2.2 skrll 113 1.1.2.2 skrll { 0, 0, NULL }, 114 1.1.2.2 skrll }; 115 1.1.2.2 skrll 116 1.1.2.2 skrll static const struct rtw_pci_product * 117 1.1.2.2 skrll rtw_pci_lookup(const struct pci_attach_args *pa) 118 1.1.2.2 skrll { 119 1.1.2.2 skrll const struct rtw_pci_product *app; 120 1.1.2.2 skrll 121 1.1.2.2 skrll for (app = rtw_pci_products; 122 1.1.2.2 skrll app->app_product_name != NULL; 123 1.1.2.2 skrll app++) { 124 1.1.2.2 skrll if (PCI_VENDOR(pa->pa_id) == app->app_vendor && 125 1.1.2.2 skrll PCI_PRODUCT(pa->pa_id) == app->app_product) 126 1.1.2.2 skrll return (app); 127 1.1.2.2 skrll } 128 1.1.2.2 skrll return (NULL); 129 1.1.2.2 skrll } 130 1.1.2.2 skrll 131 1.1.2.2 skrll static int 132 1.1.2.2 skrll rtw_pci_match(struct device *parent, struct cfdata *match, void *aux) 133 1.1.2.2 skrll { 134 1.1.2.2 skrll struct pci_attach_args *pa = aux; 135 1.1.2.2 skrll 136 1.1.2.2 skrll if (rtw_pci_lookup(pa) != NULL) 137 1.1.2.2 skrll return (1); 138 1.1.2.2 skrll 139 1.1.2.2 skrll return (0); 140 1.1.2.2 skrll } 141 1.1.2.2 skrll 142 1.1.2.2 skrll static int 143 1.1.2.2 skrll rtw_pci_enable(struct rtw_softc *sc) 144 1.1.2.2 skrll { 145 1.1.2.2 skrll struct rtw_pci_softc *psc = (void *)sc; 146 1.1.2.2 skrll 147 1.1.2.2 skrll /* Establish the interrupt. */ 148 1.1.2.2 skrll psc->psc_intrcookie = pci_intr_establish(psc->psc_pc, psc->psc_ih, 149 1.1.2.2 skrll IPL_NET, rtw_intr, sc); 150 1.1.2.2 skrll if (psc->psc_intrcookie == NULL) { 151 1.1.2.2 skrll printf("%s: unable to establish interrupt\n", 152 1.1.2.2 skrll sc->sc_dev.dv_xname); 153 1.1.2.2 skrll return (1); 154 1.1.2.2 skrll } 155 1.1.2.2 skrll 156 1.1.2.2 skrll return (0); 157 1.1.2.2 skrll } 158 1.1.2.2 skrll 159 1.1.2.2 skrll static void 160 1.1.2.2 skrll rtw_pci_disable(struct rtw_softc *sc) 161 1.1.2.2 skrll { 162 1.1.2.2 skrll struct rtw_pci_softc *psc = (void *)sc; 163 1.1.2.2 skrll 164 1.1.2.2 skrll /* Unhook the interrupt handler. */ 165 1.1.2.2 skrll pci_intr_disestablish(psc->psc_pc, psc->psc_intrcookie); 166 1.1.2.2 skrll psc->psc_intrcookie = NULL; 167 1.1.2.2 skrll } 168 1.1.2.2 skrll 169 1.1.2.2 skrll static void 170 1.1.2.2 skrll rtw_pci_attach(struct device *parent, struct device *self, void *aux) 171 1.1.2.2 skrll { 172 1.1.2.2 skrll struct rtw_pci_softc *psc = (void *) self; 173 1.1.2.2 skrll struct rtw_softc *sc = &psc->psc_rtw; 174 1.1.2.2 skrll struct rtw_regs *regs = &sc->sc_regs; 175 1.1.2.2 skrll struct pci_attach_args *pa = aux; 176 1.1.2.2 skrll pci_chipset_tag_t pc = pa->pa_pc; 177 1.1.2.2 skrll const char *intrstr = NULL; 178 1.1.2.2 skrll bus_space_tag_t iot, memt; 179 1.1.2.2 skrll bus_space_handle_t ioh, memh; 180 1.1.2.2 skrll int ioh_valid, memh_valid; 181 1.1.2.2 skrll const struct rtw_pci_product *app; 182 1.1.2.2 skrll pcireg_t reg; 183 1.1.2.2 skrll int pmreg; 184 1.1.2.2 skrll 185 1.1.2.2 skrll psc->psc_pc = pa->pa_pc; 186 1.1.2.2 skrll psc->psc_pcitag = pa->pa_tag; 187 1.1.2.2 skrll 188 1.1.2.2 skrll app = rtw_pci_lookup(pa); 189 1.1.2.2 skrll if (app == NULL) { 190 1.1.2.2 skrll printf("\n"); 191 1.1.2.2 skrll panic("rtw_pci_attach: impossible"); 192 1.1.2.2 skrll } 193 1.1.2.2 skrll 194 1.1.2.2 skrll /* 195 1.1.2.2 skrll * No power management hooks. 196 1.1.2.2 skrll * XXX Maybe we should add some! 197 1.1.2.2 skrll */ 198 1.1.2.2 skrll sc->sc_flags |= RTW_F_ENABLED; 199 1.1.2.2 skrll 200 1.1.2.2 skrll /* 201 1.1.2.2 skrll * Get revision info, and set some chip-specific variables. 202 1.1.2.2 skrll */ 203 1.1.2.2 skrll sc->sc_rev = PCI_REVISION(pa->pa_class); 204 1.1.2.2 skrll printf(": %s, revision %d.%d\n", app->app_product_name, 205 1.1.2.2 skrll (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf); 206 1.1.2.2 skrll 207 1.1.2.2 skrll /* 208 1.1.2.2 skrll * Check to see if the device is in power-save mode, and 209 1.1.2.2 skrll * being it out if necessary. 210 1.1.2.2 skrll * 211 1.1.2.2 skrll * XXX This code comes almost verbatim from if_tlp_pci.c. I do 212 1.1.2.2 skrll * not understand it. Tulip clears the "sleep mode" bit in the 213 1.1.2.2 skrll * CFDA register, first. There is an equivalent (?) register at the 214 1.1.2.2 skrll * same place in the ADM8211, but the docs do not assign its bits 215 1.1.2.2 skrll * any meanings. -dcy 216 1.1.2.2 skrll */ 217 1.1.2.2 skrll if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PWRMGMT, &pmreg, 0)) { 218 1.1.2.2 skrll reg = pci_conf_read(pc, pa->pa_tag, pmreg + PCI_PMCSR); 219 1.1.2.2 skrll switch (reg & PCI_PMCSR_STATE_MASK) { 220 1.1.2.2 skrll case PCI_PMCSR_STATE_D1: 221 1.1.2.2 skrll case PCI_PMCSR_STATE_D2: 222 1.1.2.2 skrll printf(": waking up from power state D%d\n%s", 223 1.1.2.2 skrll reg & PCI_PMCSR_STATE_MASK, sc->sc_dev.dv_xname); 224 1.1.2.2 skrll pci_conf_write(pc, pa->pa_tag, pmreg + PCI_PMCSR, 225 1.1.2.2 skrll (reg & ~PCI_PMCSR_STATE_MASK) | 226 1.1.2.2 skrll PCI_PMCSR_STATE_D0); 227 1.1.2.2 skrll break; 228 1.1.2.2 skrll case PCI_PMCSR_STATE_D3: 229 1.1.2.2 skrll /* 230 1.1.2.2 skrll * The card has lost all configuration data in 231 1.1.2.2 skrll * this state, so punt. 232 1.1.2.2 skrll */ 233 1.1.2.2 skrll printf(": unable to wake up from power state D3, " 234 1.1.2.2 skrll "reboot required.\n"); 235 1.1.2.2 skrll pci_conf_write(pc, pa->pa_tag, pmreg + PCI_PMCSR, 236 1.1.2.2 skrll (reg & ~PCI_PMCSR_STATE_MASK) | 237 1.1.2.2 skrll PCI_PMCSR_STATE_D0); 238 1.1.2.2 skrll return; 239 1.1.2.2 skrll } 240 1.1.2.2 skrll } 241 1.1.2.2 skrll 242 1.1.2.2 skrll /* 243 1.1.2.2 skrll * Map the device. 244 1.1.2.2 skrll */ 245 1.1.2.2 skrll ioh_valid = (pci_mapreg_map(pa, RTW_PCI_IOBA, 246 1.1.2.2 skrll PCI_MAPREG_TYPE_IO, 0, 247 1.1.2.2 skrll &iot, &ioh, NULL, NULL) == 0); 248 1.1.2.2 skrll memh_valid = (pci_mapreg_map(pa, RTW_PCI_MMBA, 249 1.1.2.2 skrll PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 250 1.1.2.2 skrll &memt, &memh, NULL, NULL) == 0); 251 1.1.2.2 skrll 252 1.1.2.2 skrll if (memh_valid) { 253 1.1.2.2 skrll regs->r_bt = memt; 254 1.1.2.2 skrll regs->r_bh = memh; 255 1.1.2.2 skrll } else if (ioh_valid) { 256 1.1.2.2 skrll regs->r_bt = iot; 257 1.1.2.2 skrll regs->r_bh = ioh; 258 1.1.2.2 skrll } else { 259 1.1.2.2 skrll printf(": unable to map device registers\n"); 260 1.1.2.2 skrll return; 261 1.1.2.2 skrll } 262 1.1.2.2 skrll 263 1.1.2.2 skrll sc->sc_dmat = pa->pa_dmat; 264 1.1.2.2 skrll 265 1.1.2.2 skrll /* 266 1.1.2.2 skrll * Make sure bus mastering is enabled. 267 1.1.2.2 skrll */ 268 1.1.2.2 skrll pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 269 1.1.2.2 skrll pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 270 1.1.2.2 skrll PCI_COMMAND_MASTER_ENABLE); 271 1.1.2.2 skrll 272 1.1.2.2 skrll /* 273 1.1.2.2 skrll * Map and establish our interrupt. 274 1.1.2.2 skrll */ 275 1.1.2.2 skrll if (pci_intr_map(pa, &psc->psc_ih)) { 276 1.1.2.2 skrll printf("%s: unable to map interrupt\n", 277 1.1.2.2 skrll sc->sc_dev.dv_xname); 278 1.1.2.2 skrll return; 279 1.1.2.2 skrll } 280 1.1.2.2 skrll intrstr = pci_intr_string(pc, psc->psc_ih); 281 1.1.2.2 skrll psc->psc_intrcookie = pci_intr_establish(pc, psc->psc_ih, IPL_NET, 282 1.1.2.2 skrll rtw_intr, sc); 283 1.1.2.2 skrll if (psc->psc_intrcookie == NULL) { 284 1.1.2.2 skrll printf("%s: unable to establish interrupt", 285 1.1.2.2 skrll sc->sc_dev.dv_xname); 286 1.1.2.2 skrll if (intrstr != NULL) 287 1.1.2.2 skrll printf(" at %s", intrstr); 288 1.1.2.2 skrll printf("\n"); 289 1.1.2.2 skrll return; 290 1.1.2.2 skrll } 291 1.1.2.2 skrll 292 1.1.2.2 skrll printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); 293 1.1.2.2 skrll 294 1.1.2.2 skrll sc->sc_enable = rtw_pci_enable; 295 1.1.2.2 skrll sc->sc_disable = rtw_pci_disable; 296 1.1.2.2 skrll 297 1.1.2.2 skrll /* 298 1.1.2.2 skrll * Finish off the attach. 299 1.1.2.2 skrll */ 300 1.1.2.2 skrll rtw_attach(sc); 301 1.1.2.2 skrll } 302
Indexes created Thu Oct 02 01:09:59 GMT 2025