if_rtwn.c revision 1.13.2.2
1 1.13.2.2 jdolecek /* $NetBSD: if_rtwn.c,v 1.13.2.2 2017/12/03 11:37:08 jdolecek Exp $ */ 2 1.13.2.2 jdolecek /* $OpenBSD: if_rtwn.c,v 1.5 2015/06/14 08:02:47 stsp Exp $ */ 3 1.13.2.2 jdolecek #define IEEE80211_NO_HT 4 1.13.2.2 jdolecek /*- 5 1.13.2.2 jdolecek * Copyright (c) 2010 Damien Bergamini <damien.bergamini (at) free.fr> 6 1.13.2.2 jdolecek * Copyright (c) 2015 Stefan Sperling <stsp (at) openbsd.org> 7 1.13.2.2 jdolecek * 8 1.13.2.2 jdolecek * Permission to use, copy, modify, and distribute this software for any 9 1.13.2.2 jdolecek * purpose with or without fee is hereby granted, provided that the above 10 1.13.2.2 jdolecek * copyright notice and this permission notice appear in all copies. 11 1.13.2.2 jdolecek * 12 1.13.2.2 jdolecek * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 13 1.13.2.2 jdolecek * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 14 1.13.2.2 jdolecek * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 15 1.13.2.2 jdolecek * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 16 1.13.2.2 jdolecek * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 17 1.13.2.2 jdolecek * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 18 1.13.2.2 jdolecek * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 19 1.13.2.2 jdolecek */ 20 1.13.2.2 jdolecek 21 1.13.2.2 jdolecek /* 22 1.13.2.2 jdolecek * Driver for Realtek RTL8188CE 23 1.13.2.2 jdolecek */ 24 1.13.2.2 jdolecek 25 1.13.2.2 jdolecek #include <sys/cdefs.h> 26 1.13.2.2 jdolecek __KERNEL_RCSID(0, "$NetBSD: if_rtwn.c,v 1.13.2.2 2017/12/03 11:37:08 jdolecek Exp $"); 27 1.13.2.2 jdolecek 28 1.13.2.2 jdolecek #include <sys/param.h> 29 1.13.2.2 jdolecek #include <sys/sockio.h> 30 1.13.2.2 jdolecek #include <sys/mbuf.h> 31 1.13.2.2 jdolecek #include <sys/kernel.h> 32 1.13.2.2 jdolecek #include <sys/socket.h> 33 1.13.2.2 jdolecek #include <sys/systm.h> 34 1.13.2.2 jdolecek #include <sys/callout.h> 35 1.13.2.2 jdolecek #include <sys/conf.h> 36 1.13.2.2 jdolecek #include <sys/device.h> 37 1.13.2.2 jdolecek #include <sys/endian.h> 38 1.13.2.2 jdolecek #include <sys/mutex.h> 39 1.13.2.2 jdolecek 40 1.13.2.2 jdolecek #include <sys/bus.h> 41 1.13.2.2 jdolecek #include <sys/intr.h> 42 1.13.2.2 jdolecek 43 1.13.2.2 jdolecek #include <net/bpf.h> 44 1.13.2.2 jdolecek #include <net/if.h> 45 1.13.2.2 jdolecek #include <net/if_arp.h> 46 1.13.2.2 jdolecek #include <net/if_dl.h> 47 1.13.2.2 jdolecek #include <net/if_ether.h> 48 1.13.2.2 jdolecek #include <net/if_media.h> 49 1.13.2.2 jdolecek #include <net/if_types.h> 50 1.13.2.2 jdolecek 51 1.13.2.2 jdolecek #include <netinet/in.h> 52 1.13.2.2 jdolecek 53 1.13.2.2 jdolecek #include <net80211/ieee80211_var.h> 54 1.13.2.2 jdolecek #include <net80211/ieee80211_radiotap.h> 55 1.13.2.2 jdolecek 56 1.13.2.2 jdolecek #include <dev/firmload.h> 57 1.13.2.2 jdolecek 58 1.13.2.2 jdolecek #include <dev/pci/pcireg.h> 59 1.13.2.2 jdolecek #include <dev/pci/pcivar.h> 60 1.13.2.2 jdolecek #include <dev/pci/pcidevs.h> 61 1.13.2.2 jdolecek 62 1.13.2.2 jdolecek #include <dev/pci/if_rtwnreg.h> 63 1.13.2.2 jdolecek 64 1.13.2.2 jdolecek #ifdef RTWN_DEBUG 65 1.13.2.2 jdolecek #define DPRINTF(x) do { if (rtwn_debug) printf x; } while (0) 66 1.13.2.2 jdolecek #define DPRINTFN(n, x) do { if (rtwn_debug >= (n)) printf x; } while (0) 67 1.13.2.2 jdolecek int rtwn_debug = 0; 68 1.13.2.2 jdolecek #else 69 1.13.2.2 jdolecek #define DPRINTF(x) 70 1.13.2.2 jdolecek #define DPRINTFN(n, x) 71 1.13.2.2 jdolecek #endif 72 1.13.2.2 jdolecek 73 1.13.2.2 jdolecek /* 74 1.13.2.2 jdolecek * PCI configuration space registers. 75 1.13.2.2 jdolecek */ 76 1.13.2.2 jdolecek #define RTWN_PCI_IOBA 0x10 /* i/o mapped base */ 77 1.13.2.2 jdolecek #define RTWN_PCI_MMBA 0x18 /* memory mapped base */ 78 1.13.2.2 jdolecek 79 1.13.2.2 jdolecek #define RTWN_INT_ENABLE_TX \ 80 1.13.2.2 jdolecek (R92C_IMR_VODOK | R92C_IMR_VIDOK | R92C_IMR_BEDOK | \ 81 1.13.2.2 jdolecek R92C_IMR_BKDOK | R92C_IMR_MGNTDOK | \ 82 1.13.2.2 jdolecek R92C_IMR_HIGHDOK | R92C_IMR_BDOK) 83 1.13.2.2 jdolecek #define RTWN_INT_ENABLE_RX \ 84 1.13.2.2 jdolecek (R92C_IMR_ROK | R92C_IMR_RDU | R92C_IMR_RXFOVW) 85 1.13.2.2 jdolecek #define RTWN_INT_ENABLE (RTWN_INT_ENABLE_TX | RTWN_INT_ENABLE_RX) 86 1.13.2.2 jdolecek 87 1.13.2.2 jdolecek static const struct rtwn_device { 88 1.13.2.2 jdolecek pci_vendor_id_t rd_vendor; 89 1.13.2.2 jdolecek pci_product_id_t rd_product; 90 1.13.2.2 jdolecek } rtwn_devices[] = { 91 1.13.2.2 jdolecek { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RTL8188CE }, 92 1.13.2.2 jdolecek { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RTL8192CE } 93 1.13.2.2 jdolecek }; 94 1.13.2.2 jdolecek 95 1.13.2.2 jdolecek static int rtwn_match(device_t, cfdata_t, void *); 96 1.13.2.2 jdolecek static void rtwn_attach(device_t, device_t, void *); 97 1.13.2.2 jdolecek static int rtwn_detach(device_t, int); 98 1.13.2.2 jdolecek static int rtwn_activate(device_t, enum devact); 99 1.13.2.2 jdolecek 100 1.13.2.2 jdolecek CFATTACH_DECL_NEW(rtwn, sizeof(struct rtwn_softc), rtwn_match, 101 1.13.2.2 jdolecek rtwn_attach, rtwn_detach, rtwn_activate); 102 1.13.2.2 jdolecek 103 1.13.2.2 jdolecek static int rtwn_alloc_rx_list(struct rtwn_softc *); 104 1.13.2.2 jdolecek static void rtwn_reset_rx_list(struct rtwn_softc *); 105 1.13.2.2 jdolecek static void rtwn_free_rx_list(struct rtwn_softc *); 106 1.13.2.2 jdolecek static void rtwn_setup_rx_desc(struct rtwn_softc *, struct r92c_rx_desc *, 107 1.13.2.2 jdolecek bus_addr_t, size_t, int); 108 1.13.2.2 jdolecek static int rtwn_alloc_tx_list(struct rtwn_softc *, int); 109 1.13.2.2 jdolecek static void rtwn_reset_tx_list(struct rtwn_softc *, int); 110 1.13.2.2 jdolecek static void rtwn_free_tx_list(struct rtwn_softc *, int); 111 1.13.2.2 jdolecek static void rtwn_write_1(struct rtwn_softc *, uint16_t, uint8_t); 112 1.13.2.2 jdolecek static void rtwn_write_2(struct rtwn_softc *, uint16_t, uint16_t); 113 1.13.2.2 jdolecek static void rtwn_write_4(struct rtwn_softc *, uint16_t, uint32_t); 114 1.13.2.2 jdolecek static uint8_t rtwn_read_1(struct rtwn_softc *, uint16_t); 115 1.13.2.2 jdolecek static uint16_t rtwn_read_2(struct rtwn_softc *, uint16_t); 116 1.13.2.2 jdolecek static uint32_t rtwn_read_4(struct rtwn_softc *, uint16_t); 117 1.13.2.2 jdolecek static int rtwn_fw_cmd(struct rtwn_softc *, uint8_t, const void *, int); 118 1.13.2.2 jdolecek static void rtwn_rf_write(struct rtwn_softc *, int, uint8_t, uint32_t); 119 1.13.2.2 jdolecek static uint32_t rtwn_rf_read(struct rtwn_softc *, int, uint8_t); 120 1.13.2.2 jdolecek static int rtwn_llt_write(struct rtwn_softc *, uint32_t, uint32_t); 121 1.13.2.2 jdolecek static uint8_t rtwn_efuse_read_1(struct rtwn_softc *, uint16_t); 122 1.13.2.2 jdolecek static void rtwn_efuse_read(struct rtwn_softc *); 123 1.13.2.2 jdolecek static int rtwn_read_chipid(struct rtwn_softc *); 124 1.13.2.2 jdolecek static void rtwn_efuse_switch_power(struct rtwn_softc *); 125 1.13.2.2 jdolecek static void rtwn_read_rom(struct rtwn_softc *); 126 1.13.2.2 jdolecek static int rtwn_media_change(struct ifnet *); 127 1.13.2.2 jdolecek static int rtwn_ra_init(struct rtwn_softc *); 128 1.13.2.2 jdolecek static int rtwn_get_nettype(struct rtwn_softc *); 129 1.13.2.2 jdolecek static void rtwn_set_nettype0_msr(struct rtwn_softc *, uint8_t); 130 1.13.2.2 jdolecek static void rtwn_tsf_sync_enable(struct rtwn_softc *); 131 1.13.2.2 jdolecek static void rtwn_set_led(struct rtwn_softc *, int, int); 132 1.13.2.2 jdolecek static void rtwn_calib_to(void *); 133 1.13.2.2 jdolecek static void rtwn_next_scan(void *); 134 1.13.2.2 jdolecek static void rtwn_newassoc(struct ieee80211_node *, int); 135 1.13.2.2 jdolecek static int rtwn_reset(struct ifnet *); 136 1.13.2.2 jdolecek static int rtwn_newstate(struct ieee80211com *, enum ieee80211_state, 137 1.13.2.2 jdolecek int); 138 1.13.2.2 jdolecek static int rtwn_wme_update(struct ieee80211com *); 139 1.13.2.2 jdolecek static void rtwn_update_avgrssi(struct rtwn_softc *, int, int8_t); 140 1.13.2.2 jdolecek static int8_t rtwn_get_rssi(struct rtwn_softc *, int, void *); 141 1.13.2.2 jdolecek static void rtwn_rx_frame(struct rtwn_softc *, struct r92c_rx_desc *, 142 1.13.2.2 jdolecek struct rtwn_rx_data *, int); 143 1.13.2.2 jdolecek static int rtwn_tx(struct rtwn_softc *, struct mbuf *, 144 1.13.2.2 jdolecek struct ieee80211_node *); 145 1.13.2.2 jdolecek static void rtwn_tx_done(struct rtwn_softc *, int); 146 1.13.2.2 jdolecek static void rtwn_start(struct ifnet *); 147 1.13.2.2 jdolecek static void rtwn_watchdog(struct ifnet *); 148 1.13.2.2 jdolecek static int rtwn_ioctl(struct ifnet *, u_long, void *); 149 1.13.2.2 jdolecek static int rtwn_power_on(struct rtwn_softc *); 150 1.13.2.2 jdolecek static int rtwn_llt_init(struct rtwn_softc *); 151 1.13.2.2 jdolecek static void rtwn_fw_reset(struct rtwn_softc *); 152 1.13.2.2 jdolecek static int rtwn_fw_loadpage(struct rtwn_softc *, int, uint8_t *, int); 153 1.13.2.2 jdolecek static int rtwn_load_firmware(struct rtwn_softc *); 154 1.13.2.2 jdolecek static int rtwn_dma_init(struct rtwn_softc *); 155 1.13.2.2 jdolecek static void rtwn_mac_init(struct rtwn_softc *); 156 1.13.2.2 jdolecek static void rtwn_bb_init(struct rtwn_softc *); 157 1.13.2.2 jdolecek static void rtwn_rf_init(struct rtwn_softc *); 158 1.13.2.2 jdolecek static void rtwn_cam_init(struct rtwn_softc *); 159 1.13.2.2 jdolecek static void rtwn_pa_bias_init(struct rtwn_softc *); 160 1.13.2.2 jdolecek static void rtwn_rxfilter_init(struct rtwn_softc *); 161 1.13.2.2 jdolecek static void rtwn_edca_init(struct rtwn_softc *); 162 1.13.2.2 jdolecek static void rtwn_write_txpower(struct rtwn_softc *, int, uint16_t[]); 163 1.13.2.2 jdolecek static void rtwn_get_txpower(struct rtwn_softc *, int, 164 1.13.2.2 jdolecek struct ieee80211_channel *, struct ieee80211_channel *, 165 1.13.2.2 jdolecek uint16_t[]); 166 1.13.2.2 jdolecek static void rtwn_set_txpower(struct rtwn_softc *, 167 1.13.2.2 jdolecek struct ieee80211_channel *, struct ieee80211_channel *); 168 1.13.2.2 jdolecek static void rtwn_set_chan(struct rtwn_softc *, 169 1.13.2.2 jdolecek struct ieee80211_channel *, struct ieee80211_channel *); 170 1.13.2.2 jdolecek static void rtwn_iq_calib(struct rtwn_softc *); 171 1.13.2.2 jdolecek static void rtwn_lc_calib(struct rtwn_softc *); 172 1.13.2.2 jdolecek static void rtwn_temp_calib(struct rtwn_softc *); 173 1.13.2.2 jdolecek static int rtwn_init(struct ifnet *); 174 1.13.2.2 jdolecek static void rtwn_init_task(void *); 175 1.13.2.2 jdolecek static void rtwn_stop(struct ifnet *, int); 176 1.13.2.2 jdolecek static int rtwn_intr(void *); 177 1.13.2.2 jdolecek static void rtwn_softintr(void *); 178 1.13.2.2 jdolecek 179 1.13.2.2 jdolecek /* Aliases. */ 180 1.13.2.2 jdolecek #define rtwn_bb_write rtwn_write_4 181 1.13.2.2 jdolecek #define rtwn_bb_read rtwn_read_4 182 1.13.2.2 jdolecek 183 1.13.2.2 jdolecek static const struct rtwn_device * 184 1.13.2.2 jdolecek rtwn_lookup(const struct pci_attach_args *pa) 185 1.13.2.2 jdolecek { 186 1.13.2.2 jdolecek const struct rtwn_device *rd; 187 1.13.2.2 jdolecek int i; 188 1.13.2.2 jdolecek 189 1.13.2.2 jdolecek for (i = 0; i < __arraycount(rtwn_devices); i++) { 190 1.13.2.2 jdolecek rd = &rtwn_devices[i]; 191 1.13.2.2 jdolecek if (PCI_VENDOR(pa->pa_id) == rd->rd_vendor && 192 1.13.2.2 jdolecek PCI_PRODUCT(pa->pa_id) == rd->rd_product) 193 1.13.2.2 jdolecek return rd; 194 1.13.2.2 jdolecek } 195 1.13.2.2 jdolecek return NULL; 196 1.13.2.2 jdolecek } 197 1.13.2.2 jdolecek 198 1.13.2.2 jdolecek static int 199 1.13.2.2 jdolecek rtwn_match(device_t parent, cfdata_t match, void *aux) 200 1.13.2.2 jdolecek { 201 1.13.2.2 jdolecek struct pci_attach_args *pa = aux; 202 1.13.2.2 jdolecek 203 1.13.2.2 jdolecek if (rtwn_lookup(pa) != NULL) 204 1.13.2.2 jdolecek return 1; 205 1.13.2.2 jdolecek return 0; 206 1.13.2.2 jdolecek } 207 1.13.2.2 jdolecek 208 1.13.2.2 jdolecek static void 209 1.13.2.2 jdolecek rtwn_attach(device_t parent, device_t self, void *aux) 210 1.13.2.2 jdolecek { 211 1.13.2.2 jdolecek struct rtwn_softc *sc = device_private(self); 212 1.13.2.2 jdolecek struct pci_attach_args *pa = aux; 213 1.13.2.2 jdolecek struct ieee80211com *ic = &sc->sc_ic; 214 1.13.2.2 jdolecek struct ifnet *ifp = GET_IFP(sc); 215 1.13.2.2 jdolecek int i, error; 216 1.13.2.2 jdolecek pcireg_t memtype; 217 1.13.2.2 jdolecek const char *intrstr; 218 1.13.2.2 jdolecek char intrbuf[PCI_INTRSTR_LEN]; 219 1.13.2.2 jdolecek 220 1.13.2.2 jdolecek sc->sc_dev = self; 221 1.13.2.2 jdolecek sc->sc_dmat = pa->pa_dmat; 222 1.13.2.2 jdolecek sc->sc_pc = pa->pa_pc; 223 1.13.2.2 jdolecek sc->sc_tag = pa->pa_tag; 224 1.13.2.2 jdolecek 225 1.13.2.2 jdolecek pci_aprint_devinfo(pa, NULL); 226 1.13.2.2 jdolecek 227 1.13.2.2 jdolecek callout_init(&sc->scan_to, 0); 228 1.13.2.2 jdolecek callout_setfunc(&sc->scan_to, rtwn_next_scan, sc); 229 1.13.2.2 jdolecek callout_init(&sc->calib_to, 0); 230 1.13.2.2 jdolecek callout_setfunc(&sc->calib_to, rtwn_calib_to, sc); 231 1.13.2.2 jdolecek 232 1.13.2.2 jdolecek sc->sc_soft_ih = softint_establish(SOFTINT_NET, rtwn_softintr, sc); 233 1.13.2.2 jdolecek sc->init_task = softint_establish(SOFTINT_NET, rtwn_init_task, sc); 234 1.13.2.2 jdolecek 235 1.13.2.2 jdolecek /* Power up the device */ 236 1.13.2.2 jdolecek pci_set_powerstate(pa->pa_pc, pa->pa_tag, PCI_PMCSR_STATE_D0); 237 1.13.2.2 jdolecek 238 1.13.2.2 jdolecek /* Map control/status registers. */ 239 1.13.2.2 jdolecek memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, RTWN_PCI_MMBA); 240 1.13.2.2 jdolecek error = pci_mapreg_map(pa, RTWN_PCI_MMBA, memtype, 0, &sc->sc_st, 241 1.13.2.2 jdolecek &sc->sc_sh, NULL, &sc->sc_mapsize); 242 1.13.2.2 jdolecek if (error != 0) { 243 1.13.2.2 jdolecek aprint_error_dev(self, "can't map mem space\n"); 244 1.13.2.2 jdolecek return; 245 1.13.2.2 jdolecek } 246 1.13.2.2 jdolecek 247 1.13.2.2 jdolecek /* Install interrupt handler. */ 248 1.13.2.2 jdolecek if (pci_intr_alloc(pa, &sc->sc_pihp, NULL, 0)) { 249 1.13.2.2 jdolecek aprint_error_dev(self, "can't map interrupt\n"); 250 1.13.2.2 jdolecek return; 251 1.13.2.2 jdolecek } 252 1.13.2.2 jdolecek intrstr = pci_intr_string(sc->sc_pc, sc->sc_pihp[0], intrbuf, 253 1.13.2.2 jdolecek sizeof(intrbuf)); 254 1.13.2.2 jdolecek sc->sc_ih = pci_intr_establish(sc->sc_pc, sc->sc_pihp[0], IPL_NET, 255 1.13.2.2 jdolecek rtwn_intr, sc); 256 1.13.2.2 jdolecek if (sc->sc_ih == NULL) { 257 1.13.2.2 jdolecek aprint_error_dev(self, "can't establish interrupt"); 258 1.13.2.2 jdolecek if (intrstr != NULL) 259 1.13.2.2 jdolecek aprint_error(" at %s", intrstr); 260 1.13.2.2 jdolecek aprint_error("\n"); 261 1.13.2.2 jdolecek return; 262 1.13.2.2 jdolecek } 263 1.13.2.2 jdolecek aprint_normal_dev(self, "interrupting at %s\n", intrstr); 264 1.13.2.2 jdolecek 265 1.13.2.2 jdolecek error = rtwn_read_chipid(sc); 266 1.13.2.2 jdolecek if (error != 0) { 267 1.13.2.2 jdolecek aprint_error_dev(self, "unsupported test or unknown chip\n"); 268 1.13.2.2 jdolecek return; 269 1.13.2.2 jdolecek } 270 1.13.2.2 jdolecek 271 1.13.2.2 jdolecek /* Disable PCIe Active State Power Management (ASPM). */ 272 1.13.2.2 jdolecek if (pci_get_capability(sc->sc_pc, sc->sc_tag, PCI_CAP_PCIEXPRESS, 273 1.13.2.2 jdolecek &sc->sc_cap_off, NULL)) { 274 1.13.2.2 jdolecek uint32_t lcsr = pci_conf_read(sc->sc_pc, sc->sc_tag, 275 1.13.2.2 jdolecek sc->sc_cap_off + PCIE_LCSR); 276 1.13.2.2 jdolecek lcsr &= ~(PCIE_LCSR_ASPM_L0S | PCIE_LCSR_ASPM_L1); 277 1.13.2.2 jdolecek pci_conf_write(sc->sc_pc, sc->sc_tag, 278 1.13.2.2 jdolecek sc->sc_cap_off + PCIE_LCSR, lcsr); 279 1.13.2.2 jdolecek } 280 1.13.2.2 jdolecek 281 1.13.2.2 jdolecek /* Allocate Tx/Rx buffers. */ 282 1.13.2.2 jdolecek error = rtwn_alloc_rx_list(sc); 283 1.13.2.2 jdolecek if (error != 0) { 284 1.13.2.2 jdolecek aprint_error_dev(self, "could not allocate Rx buffers\n"); 285 1.13.2.2 jdolecek return; 286 1.13.2.2 jdolecek } 287 1.13.2.2 jdolecek for (i = 0; i < RTWN_NTXQUEUES; i++) { 288 1.13.2.2 jdolecek error = rtwn_alloc_tx_list(sc, i); 289 1.13.2.2 jdolecek if (error != 0) { 290 1.13.2.2 jdolecek aprint_error_dev(self, 291 1.13.2.2 jdolecek "could not allocate Tx buffers\n"); 292 1.13.2.2 jdolecek return; 293 1.13.2.2 jdolecek } 294 1.13.2.2 jdolecek } 295 1.13.2.2 jdolecek 296 1.13.2.2 jdolecek /* Determine number of Tx/Rx chains. */ 297 1.13.2.2 jdolecek if (sc->chip & RTWN_CHIP_92C) { 298 1.13.2.2 jdolecek sc->ntxchains = (sc->chip & RTWN_CHIP_92C_1T2R) ? 1 : 2; 299 1.13.2.2 jdolecek sc->nrxchains = 2; 300 1.13.2.2 jdolecek } else { 301 1.13.2.2 jdolecek sc->ntxchains = 1; 302 1.13.2.2 jdolecek sc->nrxchains = 1; 303 1.13.2.2 jdolecek } 304 1.13.2.2 jdolecek rtwn_read_rom(sc); 305 1.13.2.2 jdolecek 306 1.13.2.2 jdolecek aprint_normal_dev(self, "MAC/BB RTL%s, RF 6052 %dT%dR, address %s\n", 307 1.13.2.2 jdolecek (sc->chip & RTWN_CHIP_92C) ? "8192CE" : "8188CE", 308 1.13.2.2 jdolecek sc->ntxchains, sc->nrxchains, ether_sprintf(ic->ic_myaddr)); 309 1.13.2.2 jdolecek 310 1.13.2.2 jdolecek /* 311 1.13.2.2 jdolecek * Setup the 802.11 device. 312 1.13.2.2 jdolecek */ 313 1.13.2.2 jdolecek ic->ic_ifp = ifp; 314 1.13.2.2 jdolecek ic->ic_phytype = IEEE80211_T_OFDM; /* Not only, but not used. */ 315 1.13.2.2 jdolecek ic->ic_opmode = IEEE80211_M_STA; /* Default to BSS mode. */ 316 1.13.2.2 jdolecek ic->ic_state = IEEE80211_S_INIT; 317 1.13.2.2 jdolecek 318 1.13.2.2 jdolecek /* Set device capabilities. */ 319 1.13.2.2 jdolecek ic->ic_caps = 320 1.13.2.2 jdolecek IEEE80211_C_MONITOR | /* Monitor mode supported. */ 321 1.13.2.2 jdolecek IEEE80211_C_IBSS | /* IBSS mode supported */ 322 1.13.2.2 jdolecek IEEE80211_C_HOSTAP | /* HostAp mode supported */ 323 1.13.2.2 jdolecek IEEE80211_C_SHPREAMBLE | /* Short preamble supported. */ 324 1.13.2.2 jdolecek IEEE80211_C_SHSLOT | /* Short slot time supported. */ 325 1.13.2.2 jdolecek IEEE80211_C_WME | /* 802.11e */ 326 1.13.2.2 jdolecek IEEE80211_C_WPA; /* WPA/RSN. */ 327 1.13.2.2 jdolecek 328 1.13.2.2 jdolecek #ifndef IEEE80211_NO_HT 329 1.13.2.2 jdolecek /* Set HT capabilities. */ 330 1.13.2.2 jdolecek ic->ic_htcaps = 331 1.13.2.2 jdolecek IEEE80211_HTCAP_CBW20_40 | 332 1.13.2.2 jdolecek IEEE80211_HTCAP_DSSSCCK40; 333 1.13.2.2 jdolecek /* Set supported HT rates. */ 334 1.13.2.2 jdolecek for (i = 0; i < sc->nrxchains; i++) 335 1.13.2.2 jdolecek ic->ic_sup_mcs[i] = 0xff; 336 1.13.2.2 jdolecek #endif 337 1.13.2.2 jdolecek 338 1.13.2.2 jdolecek /* Set supported .11b and .11g rates. */ 339 1.13.2.2 jdolecek ic->ic_sup_rates[IEEE80211_MODE_11B] = ieee80211_std_rateset_11b; 340 1.13.2.2 jdolecek ic->ic_sup_rates[IEEE80211_MODE_11G] = ieee80211_std_rateset_11g; 341 1.13.2.2 jdolecek 342 1.13.2.2 jdolecek /* Set supported .11b and .11g channels (1 through 14). */ 343 1.13.2.2 jdolecek for (i = 1; i <= 14; i++) { 344 1.13.2.2 jdolecek ic->ic_channels[i].ic_freq = 345 1.13.2.2 jdolecek ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 346 1.13.2.2 jdolecek ic->ic_channels[i].ic_flags = 347 1.13.2.2 jdolecek IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 348 1.13.2.2 jdolecek IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 349 1.13.2.2 jdolecek } 350 1.13.2.2 jdolecek 351 1.13.2.2 jdolecek ifp->if_softc = sc; 352 1.13.2.2 jdolecek ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 353 1.13.2.2 jdolecek ifp->if_init = rtwn_init; 354 1.13.2.2 jdolecek ifp->if_ioctl = rtwn_ioctl; 355 1.13.2.2 jdolecek ifp->if_start = rtwn_start; 356 1.13.2.2 jdolecek ifp->if_watchdog = rtwn_watchdog; 357 1.13.2.2 jdolecek IFQ_SET_READY(&ifp->if_snd); 358 1.13.2.2 jdolecek memcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ); 359 1.13.2.2 jdolecek 360 1.13.2.2 jdolecek error = if_initialize(ifp); 361 1.13.2.2 jdolecek if (error != 0) { 362 1.13.2.2 jdolecek ifp->if_softc = NULL; /* For rtwn_detach() */ 363 1.13.2.2 jdolecek aprint_error_dev(sc->sc_dev, "if_initialize failed(%d)\n", 364 1.13.2.2 jdolecek error); 365 1.13.2.2 jdolecek goto fail; 366 1.13.2.2 jdolecek } 367 1.13.2.2 jdolecek ieee80211_ifattach(ic); 368 1.13.2.2 jdolecek /* Use common softint-based if_input */ 369 1.13.2.2 jdolecek ifp->if_percpuq = if_percpuq_create(ifp); 370 1.13.2.2 jdolecek if_register(ifp); 371 1.13.2.2 jdolecek 372 1.13.2.2 jdolecek /* override default methods */ 373 1.13.2.2 jdolecek ic->ic_newassoc = rtwn_newassoc; 374 1.13.2.2 jdolecek ic->ic_reset = rtwn_reset; 375 1.13.2.2 jdolecek ic->ic_wme.wme_update = rtwn_wme_update; 376 1.13.2.2 jdolecek 377 1.13.2.2 jdolecek /* Override state transition machine. */ 378 1.13.2.2 jdolecek sc->sc_newstate = ic->ic_newstate; 379 1.13.2.2 jdolecek ic->ic_newstate = rtwn_newstate; 380 1.13.2.2 jdolecek ieee80211_media_init(ic, rtwn_media_change, ieee80211_media_status); 381 1.13.2.2 jdolecek 382 1.13.2.2 jdolecek bpf_attach2(ifp, DLT_IEEE802_11_RADIO, 383 1.13.2.2 jdolecek sizeof(struct ieee80211_frame) + IEEE80211_RADIOTAP_HDRLEN, 384 1.13.2.2 jdolecek &sc->sc_drvbpf); 385 1.13.2.2 jdolecek 386 1.13.2.2 jdolecek sc->sc_rxtap_len = sizeof(sc->sc_rxtapu); 387 1.13.2.2 jdolecek sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 388 1.13.2.2 jdolecek sc->sc_rxtap.wr_ihdr.it_present = htole32(RTWN_RX_RADIOTAP_PRESENT); 389 1.13.2.2 jdolecek 390 1.13.2.2 jdolecek sc->sc_txtap_len = sizeof(sc->sc_txtapu); 391 1.13.2.2 jdolecek sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 392 1.13.2.2 jdolecek sc->sc_txtap.wt_ihdr.it_present = htole32(RTWN_TX_RADIOTAP_PRESENT); 393 1.13.2.2 jdolecek 394 1.13.2.2 jdolecek ieee80211_announce(ic); 395 1.13.2.2 jdolecek 396 1.13.2.2 jdolecek if (!pmf_device_register(self, NULL, NULL)) 397 1.13.2.2 jdolecek aprint_error_dev(self, "couldn't establish power handler\n"); 398 1.13.2.2 jdolecek 399 1.13.2.2 jdolecek fail: 400 1.13.2.2 jdolecek rtwn_detach(self, 0); 401 1.13.2.2 jdolecek } 402 1.13.2.2 jdolecek 403 1.13.2.2 jdolecek static int 404 1.13.2.2 jdolecek rtwn_detach(device_t self, int flags) 405 1.13.2.2 jdolecek { 406 1.13.2.2 jdolecek struct rtwn_softc *sc = device_private(self); 407 1.13.2.2 jdolecek struct ieee80211com *ic = &sc->sc_ic; 408 1.13.2.2 jdolecek struct ifnet *ifp = GET_IFP(sc); 409 1.13.2.2 jdolecek int s, i; 410 1.13.2.2 jdolecek 411 1.13.2.2 jdolecek callout_stop(&sc->scan_to); 412 1.13.2.2 jdolecek callout_stop(&sc->calib_to); 413 1.13.2.2 jdolecek 414 1.13.2.2 jdolecek s = splnet(); 415 1.13.2.2 jdolecek 416 1.13.2.2 jdolecek if (ifp->if_softc != NULL) { 417 1.13.2.2 jdolecek rtwn_stop(ifp, 0); 418 1.13.2.2 jdolecek 419 1.13.2.2 jdolecek pmf_device_deregister(self); 420 1.13.2.2 jdolecek ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 421 1.13.2.2 jdolecek bpf_detach(ifp); 422 1.13.2.2 jdolecek ieee80211_ifdetach(ic); 423 1.13.2.2 jdolecek if_detach(ifp); 424 1.13.2.2 jdolecek } 425 1.13.2.2 jdolecek 426 1.13.2.2 jdolecek /* Free Tx/Rx buffers. */ 427 1.13.2.2 jdolecek for (i = 0; i < RTWN_NTXQUEUES; i++) 428 1.13.2.2 jdolecek rtwn_free_tx_list(sc, i); 429 1.13.2.2 jdolecek rtwn_free_rx_list(sc); 430 1.13.2.2 jdolecek 431 1.13.2.2 jdolecek splx(s); 432 1.13.2.2 jdolecek 433 1.13.2.2 jdolecek callout_destroy(&sc->scan_to); 434 1.13.2.2 jdolecek callout_destroy(&sc->calib_to); 435 1.13.2.2 jdolecek 436 1.13.2.2 jdolecek if (sc->init_task != NULL) 437 1.13.2.2 jdolecek softint_disestablish(sc->init_task); 438 1.13.2.2 jdolecek if (sc->sc_soft_ih != NULL) 439 1.13.2.2 jdolecek softint_disestablish(sc->sc_soft_ih); 440 1.13.2.2 jdolecek 441 1.13.2.2 jdolecek if (sc->sc_ih != NULL) { 442 1.13.2.2 jdolecek pci_intr_disestablish(sc->sc_pc, sc->sc_ih); 443 1.13.2.2 jdolecek pci_intr_release(sc->sc_pc, sc->sc_pihp, 1); 444 1.13.2.2 jdolecek } 445 1.13.2.2 jdolecek 446 1.13.2.2 jdolecek return 0; 447 1.13.2.2 jdolecek } 448 1.13.2.2 jdolecek 449 1.13.2.2 jdolecek static int 450 1.13.2.2 jdolecek rtwn_activate(device_t self, enum devact act) 451 1.13.2.2 jdolecek { 452 1.13.2.2 jdolecek struct rtwn_softc *sc = device_private(self); 453 1.13.2.2 jdolecek struct ifnet *ifp = GET_IFP(sc); 454 1.13.2.2 jdolecek 455 1.13.2.2 jdolecek switch (act) { 456 1.13.2.2 jdolecek case DVACT_DEACTIVATE: 457 1.13.2.2 jdolecek if (ifp->if_flags & IFF_RUNNING) 458 1.13.2.2 jdolecek rtwn_stop(ifp, 0); 459 1.13.2.2 jdolecek return 0; 460 1.13.2.2 jdolecek default: 461 1.13.2.2 jdolecek return EOPNOTSUPP; 462 1.13.2.2 jdolecek } 463 1.13.2.2 jdolecek } 464 1.13.2.2 jdolecek 465 1.13.2.2 jdolecek static void 466 1.13.2.2 jdolecek rtwn_setup_rx_desc(struct rtwn_softc *sc, struct r92c_rx_desc *desc, 467 1.13.2.2 jdolecek bus_addr_t addr, size_t len, int idx) 468 1.13.2.2 jdolecek { 469 1.13.2.2 jdolecek 470 1.13.2.2 jdolecek memset(desc, 0, sizeof(*desc)); 471 1.13.2.2 jdolecek desc->rxdw0 = htole32(SM(R92C_RXDW0_PKTLEN, len) | 472 1.13.2.2 jdolecek ((idx == RTWN_RX_LIST_COUNT - 1) ? R92C_RXDW0_EOR : 0)); 473 1.13.2.2 jdolecek desc->rxbufaddr = htole32(addr); 474 1.13.2.2 jdolecek bus_space_barrier(sc->sc_st, sc->sc_sh, 0, sc->sc_mapsize, 475 1.13.2.2 jdolecek BUS_SPACE_BARRIER_WRITE); 476 1.13.2.2 jdolecek desc->rxdw0 |= htole32(R92C_RXDW0_OWN); 477 1.13.2.2 jdolecek } 478 1.13.2.2 jdolecek 479 1.13.2.2 jdolecek static int 480 1.13.2.2 jdolecek rtwn_alloc_rx_list(struct rtwn_softc *sc) 481 1.13.2.2 jdolecek { 482 1.13.2.2 jdolecek struct rtwn_rx_ring *rx_ring = &sc->rx_ring; 483 1.13.2.2 jdolecek struct rtwn_rx_data *rx_data; 484 1.13.2.2 jdolecek const size_t size = sizeof(struct r92c_rx_desc) * RTWN_RX_LIST_COUNT; 485 1.13.2.2 jdolecek int i, error = 0; 486 1.13.2.2 jdolecek 487 1.13.2.2 jdolecek /* Allocate Rx descriptors. */ 488 1.13.2.2 jdolecek error = bus_dmamap_create(sc->sc_dmat, size, 1, size, 0, BUS_DMA_NOWAIT, 489 1.13.2.2 jdolecek &rx_ring->map); 490 1.13.2.2 jdolecek if (error != 0) { 491 1.13.2.2 jdolecek aprint_error_dev(sc->sc_dev, 492 1.13.2.2 jdolecek "could not create rx desc DMA map\n"); 493 1.13.2.2 jdolecek rx_ring->map = NULL; 494 1.13.2.2 jdolecek goto fail; 495 1.13.2.2 jdolecek } 496 1.13.2.2 jdolecek 497 1.13.2.2 jdolecek error = bus_dmamem_alloc(sc->sc_dmat, size, 0, 0, &rx_ring->seg, 1, 498 1.13.2.2 jdolecek &rx_ring->nsegs, BUS_DMA_NOWAIT); 499 1.13.2.2 jdolecek if (error != 0) { 500 1.13.2.2 jdolecek aprint_error_dev(sc->sc_dev, "could not allocate rx desc\n"); 501 1.13.2.2 jdolecek goto fail; 502 1.13.2.2 jdolecek } 503 1.13.2.2 jdolecek 504 1.13.2.2 jdolecek error = bus_dmamem_map(sc->sc_dmat, &rx_ring->seg, rx_ring->nsegs, 505 1.13.2.2 jdolecek size, (void **)&rx_ring->desc, BUS_DMA_NOWAIT | BUS_DMA_COHERENT); 506 1.13.2.2 jdolecek if (error != 0) { 507 1.13.2.2 jdolecek bus_dmamem_free(sc->sc_dmat, &rx_ring->seg, rx_ring->nsegs); 508 1.13.2.2 jdolecek rx_ring->desc = NULL; 509 1.13.2.2 jdolecek aprint_error_dev(sc->sc_dev, "could not map rx desc\n"); 510 1.13.2.2 jdolecek goto fail; 511 1.13.2.2 jdolecek } 512 1.13.2.2 jdolecek memset(rx_ring->desc, 0, size); 513 1.13.2.2 jdolecek 514 1.13.2.2 jdolecek error = bus_dmamap_load_raw(sc->sc_dmat, rx_ring->map, &rx_ring->seg, 515 1.13.2.2 jdolecek 1, size, BUS_DMA_NOWAIT); 516 1.13.2.2 jdolecek if (error != 0) { 517 1.13.2.2 jdolecek aprint_error_dev(sc->sc_dev, "could not load rx desc\n"); 518 1.13.2.2 jdolecek goto fail; 519 1.13.2.2 jdolecek } 520 1.13.2.2 jdolecek 521 1.13.2.2 jdolecek /* Allocate Rx buffers. */ 522 1.13.2.2 jdolecek for (i = 0; i < RTWN_RX_LIST_COUNT; i++) { 523 1.13.2.2 jdolecek rx_data = &rx_ring->rx_data[i]; 524 1.13.2.2 jdolecek 525 1.13.2.2 jdolecek error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES, 526 1.13.2.2 jdolecek 0, BUS_DMA_NOWAIT, &rx_data->map); 527 1.13.2.2 jdolecek if (error != 0) { 528 1.13.2.2 jdolecek aprint_error_dev(sc->sc_dev, 529 1.13.2.2 jdolecek "could not create rx buf DMA map\n"); 530 1.13.2.2 jdolecek goto fail; 531 1.13.2.2 jdolecek } 532 1.13.2.2 jdolecek 533 1.13.2.2 jdolecek MGETHDR(rx_data->m, M_DONTWAIT, MT_DATA); 534 1.13.2.2 jdolecek if (__predict_false(rx_data->m == NULL)) { 535 1.13.2.2 jdolecek aprint_error_dev(sc->sc_dev, 536 1.13.2.2 jdolecek "couldn't allocate rx mbuf\n"); 537 1.13.2.2 jdolecek error = ENOMEM; 538 1.13.2.2 jdolecek goto fail; 539 1.13.2.2 jdolecek } 540 1.13.2.2 jdolecek MCLGET(rx_data->m, M_DONTWAIT); 541 1.13.2.2 jdolecek if (__predict_false(!(rx_data->m->m_flags & M_EXT))) { 542 1.13.2.2 jdolecek aprint_error_dev(sc->sc_dev, 543 1.13.2.2 jdolecek "couldn't allocate rx mbuf cluster\n"); 544 1.13.2.2 jdolecek m_free(rx_data->m); 545 1.13.2.2 jdolecek rx_data->m = NULL; 546 1.13.2.2 jdolecek error = ENOMEM; 547 1.13.2.2 jdolecek goto fail; 548 1.13.2.2 jdolecek } 549 1.13.2.2 jdolecek 550 1.13.2.2 jdolecek error = bus_dmamap_load(sc->sc_dmat, rx_data->map, 551 1.13.2.2 jdolecek mtod(rx_data->m, void *), MCLBYTES, NULL, 552 1.13.2.2 jdolecek BUS_DMA_NOWAIT | BUS_DMA_READ); 553 1.13.2.2 jdolecek if (error != 0) { 554 1.13.2.2 jdolecek aprint_error_dev(sc->sc_dev, 555 1.13.2.2 jdolecek "could not load rx buf DMA map\n"); 556 1.13.2.2 jdolecek goto fail; 557 1.13.2.2 jdolecek } 558 1.13.2.2 jdolecek 559 1.13.2.2 jdolecek bus_dmamap_sync(sc->sc_dmat, rx_data->map, 0, MCLBYTES, 560 1.13.2.2 jdolecek BUS_DMASYNC_PREREAD); 561 1.13.2.2 jdolecek 562 1.13.2.2 jdolecek rtwn_setup_rx_desc(sc, &rx_ring->desc[i], 563 1.13.2.2 jdolecek rx_data->map->dm_segs[0].ds_addr, MCLBYTES, i); 564 1.13.2.2 jdolecek } 565 1.13.2.2 jdolecek fail: if (error != 0) 566 1.13.2.2 jdolecek rtwn_free_rx_list(sc); 567 1.13.2.2 jdolecek return error; 568 1.13.2.2 jdolecek } 569 1.13.2.2 jdolecek 570 1.13.2.2 jdolecek static void 571 1.13.2.2 jdolecek rtwn_reset_rx_list(struct rtwn_softc *sc) 572 1.13.2.2 jdolecek { 573 1.13.2.2 jdolecek struct rtwn_rx_ring *rx_ring = &sc->rx_ring; 574 1.13.2.2 jdolecek struct rtwn_rx_data *rx_data; 575 1.13.2.2 jdolecek int i; 576 1.13.2.2 jdolecek 577 1.13.2.2 jdolecek for (i = 0; i < RTWN_RX_LIST_COUNT; i++) { 578 1.13.2.2 jdolecek rx_data = &rx_ring->rx_data[i]; 579 1.13.2.2 jdolecek rtwn_setup_rx_desc(sc, &rx_ring->desc[i], 580 1.13.2.2 jdolecek rx_data->map->dm_segs[0].ds_addr, MCLBYTES, i); 581 1.13.2.2 jdolecek } 582 1.13.2.2 jdolecek } 583 1.13.2.2 jdolecek 584 1.13.2.2 jdolecek static void 585 1.13.2.2 jdolecek rtwn_free_rx_list(struct rtwn_softc *sc) 586 1.13.2.2 jdolecek { 587 1.13.2.2 jdolecek struct rtwn_rx_ring *rx_ring = &sc->rx_ring; 588 1.13.2.2 jdolecek struct rtwn_rx_data *rx_data; 589 1.13.2.2 jdolecek int i, s; 590 1.13.2.2 jdolecek 591 1.13.2.2 jdolecek s = splnet(); 592 1.13.2.2 jdolecek 593 1.13.2.2 jdolecek if (rx_ring->map) { 594 1.13.2.2 jdolecek if (rx_ring->desc) { 595 1.13.2.2 jdolecek bus_dmamap_unload(sc->sc_dmat, rx_ring->map); 596 1.13.2.2 jdolecek bus_dmamem_unmap(sc->sc_dmat, rx_ring->desc, 597 1.13.2.2 jdolecek sizeof (struct r92c_rx_desc) * RTWN_RX_LIST_COUNT); 598 1.13.2.2 jdolecek bus_dmamem_free(sc->sc_dmat, &rx_ring->seg, 599 1.13.2.2 jdolecek rx_ring->nsegs); 600 1.13.2.2 jdolecek rx_ring->desc = NULL; 601 1.13.2.2 jdolecek } 602 1.13.2.2 jdolecek bus_dmamap_destroy(sc->sc_dmat, rx_ring->map); 603 1.13.2.2 jdolecek rx_ring->map = NULL; 604 1.13.2.2 jdolecek } 605 1.13.2.2 jdolecek 606 1.13.2.2 jdolecek for (i = 0; i < RTWN_RX_LIST_COUNT; i++) { 607 1.13.2.2 jdolecek rx_data = &rx_ring->rx_data[i]; 608 1.13.2.2 jdolecek 609 1.13.2.2 jdolecek if (rx_data->m != NULL) { 610 1.13.2.2 jdolecek bus_dmamap_unload(sc->sc_dmat, rx_data->map); 611 1.13.2.2 jdolecek m_freem(rx_data->m); 612 1.13.2.2 jdolecek rx_data->m = NULL; 613 1.13.2.2 jdolecek } 614 1.13.2.2 jdolecek bus_dmamap_destroy(sc->sc_dmat, rx_data->map); 615 1.13.2.2 jdolecek rx_data->map = NULL; 616 1.13.2.2 jdolecek } 617 1.13.2.2 jdolecek 618 1.13.2.2 jdolecek splx(s); 619 1.13.2.2 jdolecek } 620 1.13.2.2 jdolecek 621 1.13.2.2 jdolecek static int 622 1.13.2.2 jdolecek rtwn_alloc_tx_list(struct rtwn_softc *sc, int qid) 623 1.13.2.2 jdolecek { 624 1.13.2.2 jdolecek struct rtwn_tx_ring *tx_ring = &sc->tx_ring[qid]; 625 1.13.2.2 jdolecek struct rtwn_tx_data *tx_data; 626 1.13.2.2 jdolecek const size_t size = sizeof(struct r92c_tx_desc) * RTWN_TX_LIST_COUNT; 627 1.13.2.2 jdolecek int i = 0, error = 0; 628 1.13.2.2 jdolecek 629 1.13.2.2 jdolecek error = bus_dmamap_create(sc->sc_dmat, size, 1, size, 0, BUS_DMA_NOWAIT, 630 1.13.2.2 jdolecek &tx_ring->map); 631 1.13.2.2 jdolecek if (error != 0) { 632 1.13.2.2 jdolecek aprint_error_dev(sc->sc_dev, 633 1.13.2.2 jdolecek "could not create tx ring DMA map\n"); 634 1.13.2.2 jdolecek goto fail; 635 1.13.2.2 jdolecek } 636 1.13.2.2 jdolecek 637 1.13.2.2 jdolecek error = bus_dmamem_alloc(sc->sc_dmat, size, PAGE_SIZE, 0, 638 1.13.2.2 jdolecek &tx_ring->seg, 1, &tx_ring->nsegs, BUS_DMA_NOWAIT); 639 1.13.2.2 jdolecek if (error != 0) { 640 1.13.2.2 jdolecek aprint_error_dev(sc->sc_dev, 641 1.13.2.2 jdolecek "could not allocate tx ring DMA memory\n"); 642 1.13.2.2 jdolecek goto fail; 643 1.13.2.2 jdolecek } 644 1.13.2.2 jdolecek 645 1.13.2.2 jdolecek error = bus_dmamem_map(sc->sc_dmat, &tx_ring->seg, tx_ring->nsegs, 646 1.13.2.2 jdolecek size, (void **)&tx_ring->desc, BUS_DMA_NOWAIT); 647 1.13.2.2 jdolecek if (error != 0) { 648 1.13.2.2 jdolecek bus_dmamem_free(sc->sc_dmat, &tx_ring->seg, tx_ring->nsegs); 649 1.13.2.2 jdolecek aprint_error_dev(sc->sc_dev, "can't map tx ring DMA memory\n"); 650 1.13.2.2 jdolecek goto fail; 651 1.13.2.2 jdolecek } 652 1.13.2.2 jdolecek memset(tx_ring->desc, 0, size); 653 1.13.2.2 jdolecek 654 1.13.2.2 jdolecek error = bus_dmamap_load(sc->sc_dmat, tx_ring->map, tx_ring->desc, 655 1.13.2.2 jdolecek size, NULL, BUS_DMA_NOWAIT); 656 1.13.2.2 jdolecek if (error != 0) { 657 1.13.2.2 jdolecek aprint_error_dev(sc->sc_dev, 658 1.13.2.2 jdolecek "could not load tx ring DMA map\n"); 659 1.13.2.2 jdolecek goto fail; 660 1.13.2.2 jdolecek } 661 1.13.2.2 jdolecek 662 1.13.2.2 jdolecek for (i = 0; i < RTWN_TX_LIST_COUNT; i++) { 663 1.13.2.2 jdolecek struct r92c_tx_desc *desc = &tx_ring->desc[i]; 664 1.13.2.2 jdolecek 665 1.13.2.2 jdolecek /* setup tx desc */ 666 1.13.2.2 jdolecek desc->nextdescaddr = htole32(tx_ring->map->dm_segs[0].ds_addr 667 1.13.2.2 jdolecek + sizeof(*desc) * ((i + 1) % RTWN_TX_LIST_COUNT)); 668 1.13.2.2 jdolecek 669 1.13.2.2 jdolecek tx_data = &tx_ring->tx_data[i]; 670 1.13.2.2 jdolecek error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES, 671 1.13.2.2 jdolecek 0, BUS_DMA_NOWAIT, &tx_data->map); 672 1.13.2.2 jdolecek if (error != 0) { 673 1.13.2.2 jdolecek aprint_error_dev(sc->sc_dev, 674 1.13.2.2 jdolecek "could not create tx buf DMA map\n"); 675 1.13.2.2 jdolecek goto fail; 676 1.13.2.2 jdolecek } 677 1.13.2.2 jdolecek tx_data->m = NULL; 678 1.13.2.2 jdolecek tx_data->ni = NULL; 679 1.13.2.2 jdolecek } 680 1.13.2.2 jdolecek 681 1.13.2.2 jdolecek fail: 682 1.13.2.2 jdolecek if (error != 0) 683 1.13.2.2 jdolecek rtwn_free_tx_list(sc, qid); 684 1.13.2.2 jdolecek return error; 685 1.13.2.2 jdolecek } 686 1.13.2.2 jdolecek 687 1.13.2.2 jdolecek static void 688 1.13.2.2 jdolecek rtwn_reset_tx_list(struct rtwn_softc *sc, int qid) 689 1.13.2.2 jdolecek { 690 1.13.2.2 jdolecek struct rtwn_tx_ring *tx_ring = &sc->tx_ring[qid]; 691 1.13.2.2 jdolecek int i; 692 1.13.2.2 jdolecek 693 1.13.2.2 jdolecek for (i = 0; i < RTWN_TX_LIST_COUNT; i++) { 694 1.13.2.2 jdolecek struct r92c_tx_desc *desc = &tx_ring->desc[i]; 695 1.13.2.2 jdolecek struct rtwn_tx_data *tx_data = &tx_ring->tx_data[i]; 696 1.13.2.2 jdolecek 697 1.13.2.2 jdolecek memset(desc, 0, sizeof(*desc) - 698 1.13.2.2 jdolecek (sizeof(desc->reserved) + sizeof(desc->nextdescaddr64) + 699 1.13.2.2 jdolecek sizeof(desc->nextdescaddr))); 700 1.13.2.2 jdolecek 701 1.13.2.2 jdolecek if (tx_data->m != NULL) { 702 1.13.2.2 jdolecek bus_dmamap_unload(sc->sc_dmat, tx_data->map); 703 1.13.2.2 jdolecek m_freem(tx_data->m); 704 1.13.2.2 jdolecek tx_data->m = NULL; 705 1.13.2.2 jdolecek ieee80211_free_node(tx_data->ni); 706 1.13.2.2 jdolecek tx_data->ni = NULL; 707 1.13.2.2 jdolecek } 708 1.13.2.2 jdolecek } 709 1.13.2.2 jdolecek 710 1.13.2.2 jdolecek sc->qfullmsk &= ~(1 << qid); 711 1.13.2.2 jdolecek tx_ring->queued = 0; 712 1.13.2.2 jdolecek tx_ring->cur = 0; 713 1.13.2.2 jdolecek } 714 1.13.2.2 jdolecek 715 1.13.2.2 jdolecek static void 716 1.13.2.2 jdolecek rtwn_free_tx_list(struct rtwn_softc *sc, int qid) 717 1.13.2.2 jdolecek { 718 1.13.2.2 jdolecek struct rtwn_tx_ring *tx_ring = &sc->tx_ring[qid]; 719 1.13.2.2 jdolecek struct rtwn_tx_data *tx_data; 720 1.13.2.2 jdolecek int i; 721 1.13.2.2 jdolecek 722 1.13.2.2 jdolecek if (tx_ring->map != NULL) { 723 1.13.2.2 jdolecek if (tx_ring->desc != NULL) { 724 1.13.2.2 jdolecek bus_dmamap_unload(sc->sc_dmat, tx_ring->map); 725 1.13.2.2 jdolecek bus_dmamem_unmap(sc->sc_dmat, tx_ring->desc, 726 1.13.2.2 jdolecek sizeof (struct r92c_tx_desc) * RTWN_TX_LIST_COUNT); 727 1.13.2.2 jdolecek bus_dmamem_free(sc->sc_dmat, &tx_ring->seg, 728 1.13.2.2 jdolecek tx_ring->nsegs); 729 1.13.2.2 jdolecek } 730 1.13.2.2 jdolecek bus_dmamap_destroy(sc->sc_dmat, tx_ring->map); 731 1.13.2.2 jdolecek } 732 1.13.2.2 jdolecek 733 1.13.2.2 jdolecek for (i = 0; i < RTWN_TX_LIST_COUNT; i++) { 734 1.13.2.2 jdolecek tx_data = &tx_ring->tx_data[i]; 735 1.13.2.2 jdolecek 736 1.13.2.2 jdolecek if (tx_data->m != NULL) { 737 1.13.2.2 jdolecek bus_dmamap_unload(sc->sc_dmat, tx_data->map); 738 1.13.2.2 jdolecek m_freem(tx_data->m); 739 1.13.2.2 jdolecek tx_data->m = NULL; 740 1.13.2.2 jdolecek } 741 1.13.2.2 jdolecek bus_dmamap_destroy(sc->sc_dmat, tx_data->map); 742 1.13.2.2 jdolecek } 743 1.13.2.2 jdolecek 744 1.13.2.2 jdolecek sc->qfullmsk &= ~(1 << qid); 745 1.13.2.2 jdolecek tx_ring->queued = 0; 746 1.13.2.2 jdolecek tx_ring->cur = 0; 747 1.13.2.2 jdolecek } 748 1.13.2.2 jdolecek 749 1.13.2.2 jdolecek static void 750 1.13.2.2 jdolecek rtwn_write_1(struct rtwn_softc *sc, uint16_t addr, uint8_t val) 751 1.13.2.2 jdolecek { 752 1.13.2.2 jdolecek bus_space_write_1(sc->sc_st, sc->sc_sh, addr, val); 753 1.13.2.2 jdolecek } 754 1.13.2.2 jdolecek 755 1.13.2.2 jdolecek static void 756 1.13.2.2 jdolecek rtwn_write_2(struct rtwn_softc *sc, uint16_t addr, uint16_t val) 757 1.13.2.2 jdolecek { 758 1.13.2.2 jdolecek bus_space_write_2(sc->sc_st, sc->sc_sh, addr, htole16(val)); 759 1.13.2.2 jdolecek } 760 1.13.2.2 jdolecek 761 1.13.2.2 jdolecek static void 762 1.13.2.2 jdolecek rtwn_write_4(struct rtwn_softc *sc, uint16_t addr, uint32_t val) 763 1.13.2.2 jdolecek { 764 1.13.2.2 jdolecek bus_space_write_4(sc->sc_st, sc->sc_sh, addr, htole32(val)); 765 1.13.2.2 jdolecek } 766 1.13.2.2 jdolecek 767 1.13.2.2 jdolecek static uint8_t 768 1.13.2.2 jdolecek rtwn_read_1(struct rtwn_softc *sc, uint16_t addr) 769 1.13.2.2 jdolecek { 770 1.13.2.2 jdolecek return bus_space_read_1(sc->sc_st, sc->sc_sh, addr); 771 1.13.2.2 jdolecek } 772 1.13.2.2 jdolecek 773 1.13.2.2 jdolecek static uint16_t 774 1.13.2.2 jdolecek rtwn_read_2(struct rtwn_softc *sc, uint16_t addr) 775 1.13.2.2 jdolecek { 776 1.13.2.2 jdolecek return le16toh(bus_space_read_2(sc->sc_st, sc->sc_sh, addr)); 777 1.13.2.2 jdolecek } 778 1.13.2.2 jdolecek 779 1.13.2.2 jdolecek static uint32_t 780 1.13.2.2 jdolecek rtwn_read_4(struct rtwn_softc *sc, uint16_t addr) 781 1.13.2.2 jdolecek { 782 1.13.2.2 jdolecek return le32toh(bus_space_read_4(sc->sc_st, sc->sc_sh, addr)); 783 1.13.2.2 jdolecek } 784 1.13.2.2 jdolecek 785 1.13.2.2 jdolecek static int 786 1.13.2.2 jdolecek rtwn_fw_cmd(struct rtwn_softc *sc, uint8_t id, const void *buf, int len) 787 1.13.2.2 jdolecek { 788 1.13.2.2 jdolecek struct r92c_fw_cmd cmd; 789 1.13.2.2 jdolecek uint8_t *cp; 790 1.13.2.2 jdolecek int fwcur; 791 1.13.2.2 jdolecek int ntries; 792 1.13.2.2 jdolecek 793 1.13.2.2 jdolecek DPRINTFN(3, ("%s: %s: id=0x%02x, buf=%p, len=%d\n", 794 1.13.2.2 jdolecek device_xname(sc->sc_dev), __func__, id, buf, len)); 795 1.13.2.2 jdolecek 796 1.13.2.2 jdolecek fwcur = sc->fwcur; 797 1.13.2.2 jdolecek sc->fwcur = (sc->fwcur + 1) % R92C_H2C_NBOX; 798 1.13.2.2 jdolecek 799 1.13.2.2 jdolecek /* Wait for current FW box to be empty. */ 800 1.13.2.2 jdolecek for (ntries = 0; ntries < 100; ntries++) { 801 1.13.2.2 jdolecek if (!(rtwn_read_1(sc, R92C_HMETFR) & (1 << sc->fwcur))) 802 1.13.2.2 jdolecek break; 803 1.13.2.2 jdolecek DELAY(1); 804 1.13.2.2 jdolecek } 805 1.13.2.2 jdolecek if (ntries == 100) { 806 1.13.2.2 jdolecek aprint_error_dev(sc->sc_dev, 807 1.13.2.2 jdolecek "could not send firmware command %d\n", id); 808 1.13.2.2 jdolecek return ETIMEDOUT; 809 1.13.2.2 jdolecek } 810 1.13.2.2 jdolecek 811 1.13.2.2 jdolecek memset(&cmd, 0, sizeof(cmd)); 812 1.13.2.2 jdolecek KASSERT(len <= sizeof(cmd.msg)); 813 1.13.2.2 jdolecek memcpy(cmd.msg, buf, len); 814 1.13.2.2 jdolecek 815 1.13.2.2 jdolecek /* Write the first word last since that will trigger the FW. */ 816 1.13.2.2 jdolecek cp = (uint8_t *)&cmd; 817 1.13.2.2 jdolecek if (len >= 4) { 818 1.13.2.2 jdolecek cmd.id = id | R92C_CMD_FLAG_EXT; 819 1.13.2.2 jdolecek rtwn_write_2(sc, R92C_HMEBOX_EXT(fwcur), cp[1] + (cp[2] << 8)); 820 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_HMEBOX(fwcur), 821 1.13.2.2 jdolecek cp[0] + (cp[3] << 8) + (cp[4] << 16) + (cp[5] << 24)); 822 1.13.2.2 jdolecek } else { 823 1.13.2.2 jdolecek cmd.id = id; 824 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_HMEBOX(fwcur), 825 1.13.2.2 jdolecek cp[0] + (cp[1] << 8) + (cp[2] << 16) + (cp[3] << 24)); 826 1.13.2.2 jdolecek } 827 1.13.2.2 jdolecek 828 1.13.2.2 jdolecek /* Give firmware some time for processing. */ 829 1.13.2.2 jdolecek DELAY(2000); 830 1.13.2.2 jdolecek 831 1.13.2.2 jdolecek return 0; 832 1.13.2.2 jdolecek } 833 1.13.2.2 jdolecek 834 1.13.2.2 jdolecek static void 835 1.13.2.2 jdolecek rtwn_rf_write(struct rtwn_softc *sc, int chain, uint8_t addr, uint32_t val) 836 1.13.2.2 jdolecek { 837 1.13.2.2 jdolecek 838 1.13.2.2 jdolecek rtwn_bb_write(sc, R92C_LSSI_PARAM(chain), 839 1.13.2.2 jdolecek SM(R92C_LSSI_PARAM_ADDR, addr) | SM(R92C_LSSI_PARAM_DATA, val)); 840 1.13.2.2 jdolecek } 841 1.13.2.2 jdolecek 842 1.13.2.2 jdolecek static uint32_t 843 1.13.2.2 jdolecek rtwn_rf_read(struct rtwn_softc *sc, int chain, uint8_t addr) 844 1.13.2.2 jdolecek { 845 1.13.2.2 jdolecek uint32_t reg[R92C_MAX_CHAINS], val; 846 1.13.2.2 jdolecek 847 1.13.2.2 jdolecek reg[0] = rtwn_bb_read(sc, R92C_HSSI_PARAM2(0)); 848 1.13.2.2 jdolecek if (chain != 0) 849 1.13.2.2 jdolecek reg[chain] = rtwn_bb_read(sc, R92C_HSSI_PARAM2(chain)); 850 1.13.2.2 jdolecek 851 1.13.2.2 jdolecek rtwn_bb_write(sc, R92C_HSSI_PARAM2(0), 852 1.13.2.2 jdolecek reg[0] & ~R92C_HSSI_PARAM2_READ_EDGE); 853 1.13.2.2 jdolecek DELAY(1000); 854 1.13.2.2 jdolecek 855 1.13.2.2 jdolecek rtwn_bb_write(sc, R92C_HSSI_PARAM2(chain), 856 1.13.2.2 jdolecek RW(reg[chain], R92C_HSSI_PARAM2_READ_ADDR, addr) | 857 1.13.2.2 jdolecek R92C_HSSI_PARAM2_READ_EDGE); 858 1.13.2.2 jdolecek DELAY(1000); 859 1.13.2.2 jdolecek 860 1.13.2.2 jdolecek rtwn_bb_write(sc, R92C_HSSI_PARAM2(0), 861 1.13.2.2 jdolecek reg[0] | R92C_HSSI_PARAM2_READ_EDGE); 862 1.13.2.2 jdolecek DELAY(1000); 863 1.13.2.2 jdolecek 864 1.13.2.2 jdolecek if (rtwn_bb_read(sc, R92C_HSSI_PARAM1(chain)) & R92C_HSSI_PARAM1_PI) 865 1.13.2.2 jdolecek val = rtwn_bb_read(sc, R92C_HSPI_READBACK(chain)); 866 1.13.2.2 jdolecek else 867 1.13.2.2 jdolecek val = rtwn_bb_read(sc, R92C_LSSI_READBACK(chain)); 868 1.13.2.2 jdolecek return MS(val, R92C_LSSI_READBACK_DATA); 869 1.13.2.2 jdolecek } 870 1.13.2.2 jdolecek 871 1.13.2.2 jdolecek static int 872 1.13.2.2 jdolecek rtwn_llt_write(struct rtwn_softc *sc, uint32_t addr, uint32_t data) 873 1.13.2.2 jdolecek { 874 1.13.2.2 jdolecek int ntries; 875 1.13.2.2 jdolecek 876 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_LLT_INIT, 877 1.13.2.2 jdolecek SM(R92C_LLT_INIT_OP, R92C_LLT_INIT_OP_WRITE) | 878 1.13.2.2 jdolecek SM(R92C_LLT_INIT_ADDR, addr) | 879 1.13.2.2 jdolecek SM(R92C_LLT_INIT_DATA, data)); 880 1.13.2.2 jdolecek /* Wait for write operation to complete. */ 881 1.13.2.2 jdolecek for (ntries = 0; ntries < 20; ntries++) { 882 1.13.2.2 jdolecek if (MS(rtwn_read_4(sc, R92C_LLT_INIT), R92C_LLT_INIT_OP) == 883 1.13.2.2 jdolecek R92C_LLT_INIT_OP_NO_ACTIVE) 884 1.13.2.2 jdolecek return 0; 885 1.13.2.2 jdolecek DELAY(5); 886 1.13.2.2 jdolecek } 887 1.13.2.2 jdolecek return ETIMEDOUT; 888 1.13.2.2 jdolecek } 889 1.13.2.2 jdolecek 890 1.13.2.2 jdolecek static uint8_t 891 1.13.2.2 jdolecek rtwn_efuse_read_1(struct rtwn_softc *sc, uint16_t addr) 892 1.13.2.2 jdolecek { 893 1.13.2.2 jdolecek uint32_t reg; 894 1.13.2.2 jdolecek int ntries; 895 1.13.2.2 jdolecek 896 1.13.2.2 jdolecek reg = rtwn_read_4(sc, R92C_EFUSE_CTRL); 897 1.13.2.2 jdolecek reg = RW(reg, R92C_EFUSE_CTRL_ADDR, addr); 898 1.13.2.2 jdolecek reg &= ~R92C_EFUSE_CTRL_VALID; 899 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_EFUSE_CTRL, reg); 900 1.13.2.2 jdolecek /* Wait for read operation to complete. */ 901 1.13.2.2 jdolecek for (ntries = 0; ntries < 100; ntries++) { 902 1.13.2.2 jdolecek reg = rtwn_read_4(sc, R92C_EFUSE_CTRL); 903 1.13.2.2 jdolecek if (reg & R92C_EFUSE_CTRL_VALID) 904 1.13.2.2 jdolecek return MS(reg, R92C_EFUSE_CTRL_DATA); 905 1.13.2.2 jdolecek DELAY(5); 906 1.13.2.2 jdolecek } 907 1.13.2.2 jdolecek aprint_error_dev(sc->sc_dev, 908 1.13.2.2 jdolecek "could not read efuse byte at address 0x%x\n", addr); 909 1.13.2.2 jdolecek return 0xff; 910 1.13.2.2 jdolecek } 911 1.13.2.2 jdolecek 912 1.13.2.2 jdolecek static void 913 1.13.2.2 jdolecek rtwn_efuse_read(struct rtwn_softc *sc) 914 1.13.2.2 jdolecek { 915 1.13.2.2 jdolecek uint8_t *rom = (uint8_t *)&sc->rom; 916 1.13.2.2 jdolecek uint32_t reg; 917 1.13.2.2 jdolecek uint16_t addr = 0; 918 1.13.2.2 jdolecek uint8_t off, msk; 919 1.13.2.2 jdolecek int i; 920 1.13.2.2 jdolecek 921 1.13.2.2 jdolecek rtwn_efuse_switch_power(sc); 922 1.13.2.2 jdolecek 923 1.13.2.2 jdolecek memset(&sc->rom, 0xff, sizeof(sc->rom)); 924 1.13.2.2 jdolecek while (addr < 512) { 925 1.13.2.2 jdolecek reg = rtwn_efuse_read_1(sc, addr); 926 1.13.2.2 jdolecek if (reg == 0xff) 927 1.13.2.2 jdolecek break; 928 1.13.2.2 jdolecek addr++; 929 1.13.2.2 jdolecek off = reg >> 4; 930 1.13.2.2 jdolecek msk = reg & 0xf; 931 1.13.2.2 jdolecek for (i = 0; i < 4; i++) { 932 1.13.2.2 jdolecek if (msk & (1 << i)) 933 1.13.2.2 jdolecek continue; 934 1.13.2.2 jdolecek rom[off * 8 + i * 2 + 0] = rtwn_efuse_read_1(sc, addr); 935 1.13.2.2 jdolecek addr++; 936 1.13.2.2 jdolecek rom[off * 8 + i * 2 + 1] = rtwn_efuse_read_1(sc, addr); 937 1.13.2.2 jdolecek addr++; 938 1.13.2.2 jdolecek } 939 1.13.2.2 jdolecek } 940 1.13.2.2 jdolecek #ifdef RTWN_DEBUG 941 1.13.2.2 jdolecek if (rtwn_debug >= 2) { 942 1.13.2.2 jdolecek /* Dump ROM content. */ 943 1.13.2.2 jdolecek printf("\n"); 944 1.13.2.2 jdolecek for (i = 0; i < sizeof(sc->rom); i++) 945 1.13.2.2 jdolecek printf("%02x:", rom[i]); 946 1.13.2.2 jdolecek printf("\n"); 947 1.13.2.2 jdolecek } 948 1.13.2.2 jdolecek #endif 949 1.13.2.2 jdolecek } 950 1.13.2.2 jdolecek 951 1.13.2.2 jdolecek static void 952 1.13.2.2 jdolecek rtwn_efuse_switch_power(struct rtwn_softc *sc) 953 1.13.2.2 jdolecek { 954 1.13.2.2 jdolecek uint32_t reg; 955 1.13.2.2 jdolecek 956 1.13.2.2 jdolecek reg = rtwn_read_2(sc, R92C_SYS_ISO_CTRL); 957 1.13.2.2 jdolecek if (!(reg & R92C_SYS_ISO_CTRL_PWC_EV12V)) { 958 1.13.2.2 jdolecek rtwn_write_2(sc, R92C_SYS_ISO_CTRL, 959 1.13.2.2 jdolecek reg | R92C_SYS_ISO_CTRL_PWC_EV12V); 960 1.13.2.2 jdolecek } 961 1.13.2.2 jdolecek reg = rtwn_read_2(sc, R92C_SYS_FUNC_EN); 962 1.13.2.2 jdolecek if (!(reg & R92C_SYS_FUNC_EN_ELDR)) { 963 1.13.2.2 jdolecek rtwn_write_2(sc, R92C_SYS_FUNC_EN, 964 1.13.2.2 jdolecek reg | R92C_SYS_FUNC_EN_ELDR); 965 1.13.2.2 jdolecek } 966 1.13.2.2 jdolecek reg = rtwn_read_2(sc, R92C_SYS_CLKR); 967 1.13.2.2 jdolecek if ((reg & (R92C_SYS_CLKR_LOADER_EN | R92C_SYS_CLKR_ANA8M)) != 968 1.13.2.2 jdolecek (R92C_SYS_CLKR_LOADER_EN | R92C_SYS_CLKR_ANA8M)) { 969 1.13.2.2 jdolecek rtwn_write_2(sc, R92C_SYS_CLKR, 970 1.13.2.2 jdolecek reg | R92C_SYS_CLKR_LOADER_EN | R92C_SYS_CLKR_ANA8M); 971 1.13.2.2 jdolecek } 972 1.13.2.2 jdolecek } 973 1.13.2.2 jdolecek 974 1.13.2.2 jdolecek /* rtwn_read_chipid: reg=0x40073b chipid=0x0 */ 975 1.13.2.2 jdolecek static int 976 1.13.2.2 jdolecek rtwn_read_chipid(struct rtwn_softc *sc) 977 1.13.2.2 jdolecek { 978 1.13.2.2 jdolecek uint32_t reg; 979 1.13.2.2 jdolecek 980 1.13.2.2 jdolecek DPRINTFN(3, ("%s: %s\n", device_xname(sc->sc_dev), __func__)); 981 1.13.2.2 jdolecek 982 1.13.2.2 jdolecek reg = rtwn_read_4(sc, R92C_SYS_CFG); 983 1.13.2.2 jdolecek DPRINTF(("%s: version=0x%08x\n", device_xname(sc->sc_dev), reg)); 984 1.13.2.2 jdolecek if (reg & R92C_SYS_CFG_TRP_VAUX_EN) 985 1.13.2.2 jdolecek /* Unsupported test chip. */ 986 1.13.2.2 jdolecek return EIO; 987 1.13.2.2 jdolecek 988 1.13.2.2 jdolecek if (reg & R92C_SYS_CFG_TYPE_92C) { 989 1.13.2.2 jdolecek sc->chip |= RTWN_CHIP_92C; 990 1.13.2.2 jdolecek /* Check if it is a castrated 8192C. */ 991 1.13.2.2 jdolecek if (MS(rtwn_read_4(sc, R92C_HPON_FSM), 992 1.13.2.2 jdolecek R92C_HPON_FSM_CHIP_BONDING_ID) == 993 1.13.2.2 jdolecek R92C_HPON_FSM_CHIP_BONDING_ID_92C_1T2R) 994 1.13.2.2 jdolecek sc->chip |= RTWN_CHIP_92C_1T2R; 995 1.13.2.2 jdolecek } 996 1.13.2.2 jdolecek if (reg & R92C_SYS_CFG_VENDOR_UMC) { 997 1.13.2.2 jdolecek sc->chip |= RTWN_CHIP_UMC; 998 1.13.2.2 jdolecek if (MS(reg, R92C_SYS_CFG_CHIP_VER_RTL) == 0) 999 1.13.2.2 jdolecek sc->chip |= RTWN_CHIP_UMC_A_CUT; 1000 1.13.2.2 jdolecek } else if (MS(reg, R92C_SYS_CFG_CHIP_VER_RTL) != 0) { 1001 1.13.2.2 jdolecek if (MS(reg, R92C_SYS_CFG_CHIP_VER_RTL) == 1) 1002 1.13.2.2 jdolecek sc->chip |= RTWN_CHIP_UMC | RTWN_CHIP_UMC_B_CUT; 1003 1.13.2.2 jdolecek else 1004 1.13.2.2 jdolecek /* Unsupported unknown chip. */ 1005 1.13.2.2 jdolecek return EIO; 1006 1.13.2.2 jdolecek } 1007 1.13.2.2 jdolecek return 0; 1008 1.13.2.2 jdolecek } 1009 1.13.2.2 jdolecek 1010 1.13.2.2 jdolecek static void 1011 1.13.2.2 jdolecek rtwn_read_rom(struct rtwn_softc *sc) 1012 1.13.2.2 jdolecek { 1013 1.13.2.2 jdolecek struct ieee80211com *ic = &sc->sc_ic; 1014 1.13.2.2 jdolecek struct r92c_rom *rom = &sc->rom; 1015 1.13.2.2 jdolecek 1016 1.13.2.2 jdolecek DPRINTFN(3, ("%s: %s\n", device_xname(sc->sc_dev), __func__)); 1017 1.13.2.2 jdolecek 1018 1.13.2.2 jdolecek /* Read full ROM image. */ 1019 1.13.2.2 jdolecek rtwn_efuse_read(sc); 1020 1.13.2.2 jdolecek 1021 1.13.2.2 jdolecek if (rom->id != 0x8129) { 1022 1.13.2.2 jdolecek aprint_error_dev(sc->sc_dev, "invalid EEPROM ID 0x%x\n", 1023 1.13.2.2 jdolecek rom->id); 1024 1.13.2.2 jdolecek } 1025 1.13.2.2 jdolecek 1026 1.13.2.2 jdolecek /* XXX Weird but this is what the vendor driver does. */ 1027 1.13.2.2 jdolecek sc->pa_setting = rtwn_efuse_read_1(sc, 0x1fa); 1028 1.13.2.2 jdolecek sc->board_type = MS(rom->rf_opt1, R92C_ROM_RF1_BOARD_TYPE); 1029 1.13.2.2 jdolecek sc->regulatory = MS(rom->rf_opt1, R92C_ROM_RF1_REGULATORY); 1030 1.13.2.2 jdolecek 1031 1.13.2.2 jdolecek DPRINTF(("PA setting=0x%x, board=0x%x, regulatory=%d\n", 1032 1.13.2.2 jdolecek sc->pa_setting, sc->board_type, sc->regulatory)); 1033 1.13.2.2 jdolecek 1034 1.13.2.2 jdolecek IEEE80211_ADDR_COPY(ic->ic_myaddr, rom->macaddr); 1035 1.13.2.2 jdolecek } 1036 1.13.2.2 jdolecek 1037 1.13.2.2 jdolecek static int 1038 1.13.2.2 jdolecek rtwn_media_change(struct ifnet *ifp) 1039 1.13.2.2 jdolecek { 1040 1.13.2.2 jdolecek int error; 1041 1.13.2.2 jdolecek 1042 1.13.2.2 jdolecek error = ieee80211_media_change(ifp); 1043 1.13.2.2 jdolecek if (error != ENETRESET) 1044 1.13.2.2 jdolecek return error; 1045 1.13.2.2 jdolecek 1046 1.13.2.2 jdolecek if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 1047 1.13.2.2 jdolecek (IFF_UP | IFF_RUNNING)) { 1048 1.13.2.2 jdolecek rtwn_stop(ifp, 0); 1049 1.13.2.2 jdolecek error = rtwn_init(ifp); 1050 1.13.2.2 jdolecek } 1051 1.13.2.2 jdolecek return error; 1052 1.13.2.2 jdolecek } 1053 1.13.2.2 jdolecek 1054 1.13.2.2 jdolecek /* 1055 1.13.2.2 jdolecek * Initialize rate adaptation in firmware. 1056 1.13.2.2 jdolecek */ 1057 1.13.2.2 jdolecek static int 1058 1.13.2.2 jdolecek rtwn_ra_init(struct rtwn_softc *sc) 1059 1.13.2.2 jdolecek { 1060 1.13.2.2 jdolecek static const uint8_t map[] = { 1061 1.13.2.2 jdolecek 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 1062 1.13.2.2 jdolecek }; 1063 1.13.2.2 jdolecek struct ieee80211com *ic = &sc->sc_ic; 1064 1.13.2.2 jdolecek struct ieee80211_node *ni = ic->ic_bss; 1065 1.13.2.2 jdolecek struct ieee80211_rateset *rs = &ni->ni_rates; 1066 1.13.2.2 jdolecek struct r92c_fw_cmd_macid_cfg cmd; 1067 1.13.2.2 jdolecek uint32_t rates, basicrates; 1068 1.13.2.2 jdolecek uint8_t mode; 1069 1.13.2.2 jdolecek int maxrate, maxbasicrate, error, i, j; 1070 1.13.2.2 jdolecek 1071 1.13.2.2 jdolecek DPRINTFN(3, ("%s: %s\n", device_xname(sc->sc_dev), __func__)); 1072 1.13.2.2 jdolecek 1073 1.13.2.2 jdolecek /* Get normal and basic rates mask. */ 1074 1.13.2.2 jdolecek rates = basicrates = 0; 1075 1.13.2.2 jdolecek maxrate = maxbasicrate = 0; 1076 1.13.2.2 jdolecek for (i = 0; i < rs->rs_nrates; i++) { 1077 1.13.2.2 jdolecek /* Convert 802.11 rate to HW rate index. */ 1078 1.13.2.2 jdolecek for (j = 0; j < __arraycount(map); j++) 1079 1.13.2.2 jdolecek if ((rs->rs_rates[i] & IEEE80211_RATE_VAL) == map[j]) 1080 1.13.2.2 jdolecek break; 1081 1.13.2.2 jdolecek if (j == __arraycount(map)) /* Unknown rate, skip. */ 1082 1.13.2.2 jdolecek continue; 1083 1.13.2.2 jdolecek rates |= 1 << j; 1084 1.13.2.2 jdolecek if (j > maxrate) 1085 1.13.2.2 jdolecek maxrate = j; 1086 1.13.2.2 jdolecek if (rs->rs_rates[i] & IEEE80211_RATE_BASIC) { 1087 1.13.2.2 jdolecek basicrates |= 1 << j; 1088 1.13.2.2 jdolecek if (j > maxbasicrate) 1089 1.13.2.2 jdolecek maxbasicrate = j; 1090 1.13.2.2 jdolecek } 1091 1.13.2.2 jdolecek } 1092 1.13.2.2 jdolecek if (ic->ic_curmode == IEEE80211_MODE_11B) 1093 1.13.2.2 jdolecek mode = R92C_RAID_11B; 1094 1.13.2.2 jdolecek else 1095 1.13.2.2 jdolecek mode = R92C_RAID_11BG; 1096 1.13.2.2 jdolecek DPRINTF(("%s: mode=0x%x rates=0x%08x, basicrates=0x%08x\n", 1097 1.13.2.2 jdolecek device_xname(sc->sc_dev), mode, rates, basicrates)); 1098 1.13.2.2 jdolecek if (basicrates == 0) 1099 1.13.2.2 jdolecek basicrates |= 1; /* add 1Mbps */ 1100 1.13.2.2 jdolecek 1101 1.13.2.2 jdolecek /* Set rates mask for group addressed frames. */ 1102 1.13.2.2 jdolecek cmd.macid = RTWN_MACID_BC | RTWN_MACID_VALID; 1103 1.13.2.2 jdolecek cmd.mask = htole32((mode << 28) | basicrates); 1104 1.13.2.2 jdolecek error = rtwn_fw_cmd(sc, R92C_CMD_MACID_CONFIG, &cmd, sizeof(cmd)); 1105 1.13.2.2 jdolecek if (error != 0) { 1106 1.13.2.2 jdolecek aprint_error_dev(sc->sc_dev, 1107 1.13.2.2 jdolecek "could not add broadcast station\n"); 1108 1.13.2.2 jdolecek return error; 1109 1.13.2.2 jdolecek } 1110 1.13.2.2 jdolecek /* Set initial MRR rate. */ 1111 1.13.2.2 jdolecek DPRINTF(("%s: maxbasicrate=%d\n", device_xname(sc->sc_dev), 1112 1.13.2.2 jdolecek maxbasicrate)); 1113 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_INIDATA_RATE_SEL(RTWN_MACID_BC), maxbasicrate); 1114 1.13.2.2 jdolecek 1115 1.13.2.2 jdolecek /* Set rates mask for unicast frames. */ 1116 1.13.2.2 jdolecek cmd.macid = RTWN_MACID_BSS | RTWN_MACID_VALID; 1117 1.13.2.2 jdolecek cmd.mask = htole32((mode << 28) | rates); 1118 1.13.2.2 jdolecek error = rtwn_fw_cmd(sc, R92C_CMD_MACID_CONFIG, &cmd, sizeof(cmd)); 1119 1.13.2.2 jdolecek if (error != 0) { 1120 1.13.2.2 jdolecek aprint_error_dev(sc->sc_dev, "could not add BSS station\n"); 1121 1.13.2.2 jdolecek return error; 1122 1.13.2.2 jdolecek } 1123 1.13.2.2 jdolecek /* Set initial MRR rate. */ 1124 1.13.2.2 jdolecek DPRINTF(("%s: maxrate=%d\n", device_xname(sc->sc_dev), maxrate)); 1125 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_INIDATA_RATE_SEL(RTWN_MACID_BSS), maxrate); 1126 1.13.2.2 jdolecek 1127 1.13.2.2 jdolecek /* Configure Automatic Rate Fallback Register. */ 1128 1.13.2.2 jdolecek if (ic->ic_curmode == IEEE80211_MODE_11B) { 1129 1.13.2.2 jdolecek if (rates & 0x0c) 1130 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_ARFR(0), htole32(rates & 0x0d)); 1131 1.13.2.2 jdolecek else 1132 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_ARFR(0), htole32(rates & 0x0f)); 1133 1.13.2.2 jdolecek } else 1134 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_ARFR(0), htole32(rates & 0x0ff5)); 1135 1.13.2.2 jdolecek 1136 1.13.2.2 jdolecek /* Indicate highest supported rate. */ 1137 1.13.2.2 jdolecek ni->ni_txrate = rs->rs_nrates - 1; 1138 1.13.2.2 jdolecek return 0; 1139 1.13.2.2 jdolecek } 1140 1.13.2.2 jdolecek 1141 1.13.2.2 jdolecek static int 1142 1.13.2.2 jdolecek rtwn_get_nettype(struct rtwn_softc *sc) 1143 1.13.2.2 jdolecek { 1144 1.13.2.2 jdolecek struct ieee80211com *ic = &sc->sc_ic; 1145 1.13.2.2 jdolecek int type; 1146 1.13.2.2 jdolecek 1147 1.13.2.2 jdolecek switch (ic->ic_opmode) { 1148 1.13.2.2 jdolecek case IEEE80211_M_STA: 1149 1.13.2.2 jdolecek type = R92C_CR_NETTYPE_INFRA; 1150 1.13.2.2 jdolecek break; 1151 1.13.2.2 jdolecek 1152 1.13.2.2 jdolecek case IEEE80211_M_HOSTAP: 1153 1.13.2.2 jdolecek type = R92C_CR_NETTYPE_AP; 1154 1.13.2.2 jdolecek break; 1155 1.13.2.2 jdolecek 1156 1.13.2.2 jdolecek case IEEE80211_M_IBSS: 1157 1.13.2.2 jdolecek type = R92C_CR_NETTYPE_ADHOC; 1158 1.13.2.2 jdolecek break; 1159 1.13.2.2 jdolecek 1160 1.13.2.2 jdolecek default: 1161 1.13.2.2 jdolecek type = R92C_CR_NETTYPE_NOLINK; 1162 1.13.2.2 jdolecek break; 1163 1.13.2.2 jdolecek } 1164 1.13.2.2 jdolecek 1165 1.13.2.2 jdolecek return type; 1166 1.13.2.2 jdolecek } 1167 1.13.2.2 jdolecek 1168 1.13.2.2 jdolecek static void 1169 1.13.2.2 jdolecek rtwn_set_nettype0_msr(struct rtwn_softc *sc, uint8_t type) 1170 1.13.2.2 jdolecek { 1171 1.13.2.2 jdolecek uint32_t reg; 1172 1.13.2.2 jdolecek 1173 1.13.2.2 jdolecek reg = rtwn_read_4(sc, R92C_CR); 1174 1.13.2.2 jdolecek reg = RW(reg, R92C_CR_NETTYPE, type); 1175 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_CR, reg); 1176 1.13.2.2 jdolecek } 1177 1.13.2.2 jdolecek 1178 1.13.2.2 jdolecek static void 1179 1.13.2.2 jdolecek rtwn_tsf_sync_enable(struct rtwn_softc *sc) 1180 1.13.2.2 jdolecek { 1181 1.13.2.2 jdolecek struct ieee80211_node *ni = sc->sc_ic.ic_bss; 1182 1.13.2.2 jdolecek uint64_t tsf; 1183 1.13.2.2 jdolecek 1184 1.13.2.2 jdolecek DPRINTFN(3, ("%s: %s\n", device_xname(sc->sc_dev), __func__)); 1185 1.13.2.2 jdolecek 1186 1.13.2.2 jdolecek /* Enable TSF synchronization. */ 1187 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_BCN_CTRL, 1188 1.13.2.2 jdolecek rtwn_read_1(sc, R92C_BCN_CTRL) & ~R92C_BCN_CTRL_DIS_TSF_UDT0); 1189 1.13.2.2 jdolecek 1190 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_BCN_CTRL, 1191 1.13.2.2 jdolecek rtwn_read_1(sc, R92C_BCN_CTRL) & ~R92C_BCN_CTRL_EN_BCN); 1192 1.13.2.2 jdolecek 1193 1.13.2.2 jdolecek /* Set initial TSF. */ 1194 1.13.2.2 jdolecek tsf = ni->ni_tstamp.tsf; 1195 1.13.2.2 jdolecek tsf = le64toh(tsf); 1196 1.13.2.2 jdolecek tsf = tsf - (tsf % (ni->ni_intval * IEEE80211_DUR_TU)); 1197 1.13.2.2 jdolecek tsf -= IEEE80211_DUR_TU; 1198 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_TSFTR + 0, (uint32_t)tsf); 1199 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_TSFTR + 4, (uint32_t)(tsf >> 32)); 1200 1.13.2.2 jdolecek 1201 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_BCN_CTRL, 1202 1.13.2.2 jdolecek rtwn_read_1(sc, R92C_BCN_CTRL) | R92C_BCN_CTRL_EN_BCN); 1203 1.13.2.2 jdolecek } 1204 1.13.2.2 jdolecek 1205 1.13.2.2 jdolecek static void 1206 1.13.2.2 jdolecek rtwn_set_led(struct rtwn_softc *sc, int led, int on) 1207 1.13.2.2 jdolecek { 1208 1.13.2.2 jdolecek uint8_t reg; 1209 1.13.2.2 jdolecek 1210 1.13.2.2 jdolecek DPRINTFN(3, ("%s: %s\n", device_xname(sc->sc_dev), __func__)); 1211 1.13.2.2 jdolecek 1212 1.13.2.2 jdolecek if (led == RTWN_LED_LINK) { 1213 1.13.2.2 jdolecek reg = rtwn_read_1(sc, R92C_LEDCFG2) & 0xf0; 1214 1.13.2.2 jdolecek if (!on) 1215 1.13.2.2 jdolecek reg |= R92C_LEDCFG2_DIS; 1216 1.13.2.2 jdolecek else 1217 1.13.2.2 jdolecek reg |= R92C_LEDCFG2_EN; 1218 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_LEDCFG2, reg); 1219 1.13.2.2 jdolecek sc->ledlink = on; /* Save LED state. */ 1220 1.13.2.2 jdolecek } 1221 1.13.2.2 jdolecek } 1222 1.13.2.2 jdolecek 1223 1.13.2.2 jdolecek static void 1224 1.13.2.2 jdolecek rtwn_calib_to(void *arg) 1225 1.13.2.2 jdolecek { 1226 1.13.2.2 jdolecek struct rtwn_softc *sc = arg; 1227 1.13.2.2 jdolecek struct r92c_fw_cmd_rssi cmd; 1228 1.13.2.2 jdolecek int s; 1229 1.13.2.2 jdolecek 1230 1.13.2.2 jdolecek DPRINTFN(3, ("%s: %s\n", device_xname(sc->sc_dev), __func__)); 1231 1.13.2.2 jdolecek 1232 1.13.2.2 jdolecek s = splnet(); 1233 1.13.2.2 jdolecek 1234 1.13.2.2 jdolecek if (sc->sc_ic.ic_state != IEEE80211_S_RUN) 1235 1.13.2.2 jdolecek goto restart_timer; 1236 1.13.2.2 jdolecek 1237 1.13.2.2 jdolecek if (sc->avg_pwdb != -1) { 1238 1.13.2.2 jdolecek /* Indicate Rx signal strength to FW for rate adaptation. */ 1239 1.13.2.2 jdolecek memset(&cmd, 0, sizeof(cmd)); 1240 1.13.2.2 jdolecek cmd.macid = 0; /* BSS. */ 1241 1.13.2.2 jdolecek cmd.pwdb = sc->avg_pwdb; 1242 1.13.2.2 jdolecek DPRINTFN(3, ("sending RSSI command avg=%d\n", sc->avg_pwdb)); 1243 1.13.2.2 jdolecek rtwn_fw_cmd(sc, R92C_CMD_RSSI_SETTING, &cmd, sizeof(cmd)); 1244 1.13.2.2 jdolecek } 1245 1.13.2.2 jdolecek 1246 1.13.2.2 jdolecek /* Do temperature compensation. */ 1247 1.13.2.2 jdolecek rtwn_temp_calib(sc); 1248 1.13.2.2 jdolecek 1249 1.13.2.2 jdolecek restart_timer: 1250 1.13.2.2 jdolecek callout_schedule(&sc->calib_to, mstohz(2000)); 1251 1.13.2.2 jdolecek 1252 1.13.2.2 jdolecek splx(s); 1253 1.13.2.2 jdolecek } 1254 1.13.2.2 jdolecek 1255 1.13.2.2 jdolecek static void 1256 1.13.2.2 jdolecek rtwn_next_scan(void *arg) 1257 1.13.2.2 jdolecek { 1258 1.13.2.2 jdolecek struct rtwn_softc *sc = arg; 1259 1.13.2.2 jdolecek struct ieee80211com *ic = &sc->sc_ic; 1260 1.13.2.2 jdolecek int s; 1261 1.13.2.2 jdolecek 1262 1.13.2.2 jdolecek DPRINTFN(3, ("%s: %s\n", device_xname(sc->sc_dev), __func__)); 1263 1.13.2.2 jdolecek 1264 1.13.2.2 jdolecek s = splnet(); 1265 1.13.2.2 jdolecek if (ic->ic_state == IEEE80211_S_SCAN) 1266 1.13.2.2 jdolecek ieee80211_next_scan(ic); 1267 1.13.2.2 jdolecek splx(s); 1268 1.13.2.2 jdolecek } 1269 1.13.2.2 jdolecek 1270 1.13.2.2 jdolecek static void 1271 1.13.2.2 jdolecek rtwn_newassoc(struct ieee80211_node *ni, int isnew) 1272 1.13.2.2 jdolecek { 1273 1.13.2.2 jdolecek 1274 1.13.2.2 jdolecek DPRINTF(("%s: new node %s\n", __func__, ether_sprintf(ni->ni_macaddr))); 1275 1.13.2.2 jdolecek 1276 1.13.2.2 jdolecek /* start with lowest Tx rate */ 1277 1.13.2.2 jdolecek ni->ni_txrate = 0; 1278 1.13.2.2 jdolecek } 1279 1.13.2.2 jdolecek 1280 1.13.2.2 jdolecek static int 1281 1.13.2.2 jdolecek rtwn_reset(struct ifnet *ifp) 1282 1.13.2.2 jdolecek { 1283 1.13.2.2 jdolecek struct rtwn_softc *sc = ifp->if_softc; 1284 1.13.2.2 jdolecek struct ieee80211com *ic = &sc->sc_ic; 1285 1.13.2.2 jdolecek 1286 1.13.2.2 jdolecek if (ic->ic_opmode != IEEE80211_M_MONITOR) 1287 1.13.2.2 jdolecek return ENETRESET; 1288 1.13.2.2 jdolecek 1289 1.13.2.2 jdolecek rtwn_set_chan(sc, ic->ic_curchan, NULL); 1290 1.13.2.2 jdolecek 1291 1.13.2.2 jdolecek return 0; 1292 1.13.2.2 jdolecek } 1293 1.13.2.2 jdolecek 1294 1.13.2.2 jdolecek static int 1295 1.13.2.2 jdolecek rtwn_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg) 1296 1.13.2.2 jdolecek { 1297 1.13.2.2 jdolecek struct rtwn_softc *sc = IC2IFP(ic)->if_softc; 1298 1.13.2.2 jdolecek struct ieee80211_node *ni; 1299 1.13.2.2 jdolecek enum ieee80211_state ostate = ic->ic_state; 1300 1.13.2.2 jdolecek uint32_t reg; 1301 1.13.2.2 jdolecek int s; 1302 1.13.2.2 jdolecek 1303 1.13.2.2 jdolecek DPRINTFN(3, ("%s: %s\n", device_xname(sc->sc_dev), __func__)); 1304 1.13.2.2 jdolecek 1305 1.13.2.2 jdolecek s = splnet(); 1306 1.13.2.2 jdolecek 1307 1.13.2.2 jdolecek callout_stop(&sc->scan_to); 1308 1.13.2.2 jdolecek callout_stop(&sc->calib_to); 1309 1.13.2.2 jdolecek 1310 1.13.2.2 jdolecek if (ostate != nstate) { 1311 1.13.2.2 jdolecek DPRINTF(("%s: %s -> %s\n", __func__, 1312 1.13.2.2 jdolecek ieee80211_state_name[ostate], 1313 1.13.2.2 jdolecek ieee80211_state_name[nstate])); 1314 1.13.2.2 jdolecek } 1315 1.13.2.2 jdolecek 1316 1.13.2.2 jdolecek switch (ostate) { 1317 1.13.2.2 jdolecek case IEEE80211_S_INIT: 1318 1.13.2.2 jdolecek break; 1319 1.13.2.2 jdolecek 1320 1.13.2.2 jdolecek case IEEE80211_S_SCAN: 1321 1.13.2.2 jdolecek if (nstate != IEEE80211_S_SCAN) { 1322 1.13.2.2 jdolecek /* 1323 1.13.2.2 jdolecek * End of scanning 1324 1.13.2.2 jdolecek */ 1325 1.13.2.2 jdolecek /* flush 4-AC Queue after site_survey */ 1326 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_TXPAUSE, 0x0); 1327 1.13.2.2 jdolecek 1328 1.13.2.2 jdolecek /* Allow Rx from our BSSID only. */ 1329 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_RCR, 1330 1.13.2.2 jdolecek rtwn_read_4(sc, R92C_RCR) | 1331 1.13.2.2 jdolecek R92C_RCR_CBSSID_DATA | R92C_RCR_CBSSID_BCN); 1332 1.13.2.2 jdolecek } 1333 1.13.2.2 jdolecek break; 1334 1.13.2.2 jdolecek 1335 1.13.2.2 jdolecek case IEEE80211_S_AUTH: 1336 1.13.2.2 jdolecek case IEEE80211_S_ASSOC: 1337 1.13.2.2 jdolecek break; 1338 1.13.2.2 jdolecek 1339 1.13.2.2 jdolecek case IEEE80211_S_RUN: 1340 1.13.2.2 jdolecek /* Turn link LED off. */ 1341 1.13.2.2 jdolecek rtwn_set_led(sc, RTWN_LED_LINK, 0); 1342 1.13.2.2 jdolecek 1343 1.13.2.2 jdolecek /* Set media status to 'No Link'. */ 1344 1.13.2.2 jdolecek rtwn_set_nettype0_msr(sc, R92C_CR_NETTYPE_NOLINK); 1345 1.13.2.2 jdolecek 1346 1.13.2.2 jdolecek /* Stop Rx of data frames. */ 1347 1.13.2.2 jdolecek rtwn_write_2(sc, R92C_RXFLTMAP2, 0); 1348 1.13.2.2 jdolecek 1349 1.13.2.2 jdolecek /* Rest TSF. */ 1350 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_DUAL_TSF_RST, 0x03); 1351 1.13.2.2 jdolecek 1352 1.13.2.2 jdolecek /* Disable TSF synchronization. */ 1353 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_BCN_CTRL, 1354 1.13.2.2 jdolecek rtwn_read_1(sc, R92C_BCN_CTRL) | 1355 1.13.2.2 jdolecek R92C_BCN_CTRL_DIS_TSF_UDT0); 1356 1.13.2.2 jdolecek 1357 1.13.2.2 jdolecek /* Back to 20MHz mode */ 1358 1.13.2.2 jdolecek rtwn_set_chan(sc, ic->ic_curchan, NULL); 1359 1.13.2.2 jdolecek 1360 1.13.2.2 jdolecek /* Reset EDCA parameters. */ 1361 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_EDCA_VO_PARAM, 0x002f3217); 1362 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_EDCA_VI_PARAM, 0x005e4317); 1363 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_EDCA_BE_PARAM, 0x00105320); 1364 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_EDCA_BK_PARAM, 0x0000a444); 1365 1.13.2.2 jdolecek 1366 1.13.2.2 jdolecek /* flush all cam entries */ 1367 1.13.2.2 jdolecek rtwn_cam_init(sc); 1368 1.13.2.2 jdolecek break; 1369 1.13.2.2 jdolecek } 1370 1.13.2.2 jdolecek 1371 1.13.2.2 jdolecek switch (nstate) { 1372 1.13.2.2 jdolecek case IEEE80211_S_INIT: 1373 1.13.2.2 jdolecek /* Turn link LED off. */ 1374 1.13.2.2 jdolecek rtwn_set_led(sc, RTWN_LED_LINK, 0); 1375 1.13.2.2 jdolecek break; 1376 1.13.2.2 jdolecek 1377 1.13.2.2 jdolecek case IEEE80211_S_SCAN: 1378 1.13.2.2 jdolecek if (ostate != IEEE80211_S_SCAN) { 1379 1.13.2.2 jdolecek /* 1380 1.13.2.2 jdolecek * Begin of scanning 1381 1.13.2.2 jdolecek */ 1382 1.13.2.2 jdolecek 1383 1.13.2.2 jdolecek /* Set gain for scanning. */ 1384 1.13.2.2 jdolecek reg = rtwn_bb_read(sc, R92C_OFDM0_AGCCORE1(0)); 1385 1.13.2.2 jdolecek reg = RW(reg, R92C_OFDM0_AGCCORE1_GAIN, 0x20); 1386 1.13.2.2 jdolecek rtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(0), reg); 1387 1.13.2.2 jdolecek 1388 1.13.2.2 jdolecek reg = rtwn_bb_read(sc, R92C_OFDM0_AGCCORE1(1)); 1389 1.13.2.2 jdolecek reg = RW(reg, R92C_OFDM0_AGCCORE1_GAIN, 0x20); 1390 1.13.2.2 jdolecek rtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(1), reg); 1391 1.13.2.2 jdolecek 1392 1.13.2.2 jdolecek /* Allow Rx from any BSSID. */ 1393 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_RCR, 1394 1.13.2.2 jdolecek rtwn_read_4(sc, R92C_RCR) & 1395 1.13.2.2 jdolecek ~(R92C_RCR_CBSSID_DATA | R92C_RCR_CBSSID_BCN)); 1396 1.13.2.2 jdolecek 1397 1.13.2.2 jdolecek /* Stop Rx of data frames. */ 1398 1.13.2.2 jdolecek rtwn_write_2(sc, R92C_RXFLTMAP2, 0); 1399 1.13.2.2 jdolecek 1400 1.13.2.2 jdolecek /* Disable update TSF */ 1401 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_BCN_CTRL, 1402 1.13.2.2 jdolecek rtwn_read_1(sc, R92C_BCN_CTRL) | 1403 1.13.2.2 jdolecek R92C_BCN_CTRL_DIS_TSF_UDT0); 1404 1.13.2.2 jdolecek } 1405 1.13.2.2 jdolecek 1406 1.13.2.2 jdolecek /* Make link LED blink during scan. */ 1407 1.13.2.2 jdolecek rtwn_set_led(sc, RTWN_LED_LINK, !sc->ledlink); 1408 1.13.2.2 jdolecek 1409 1.13.2.2 jdolecek /* Pause AC Tx queues. */ 1410 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_TXPAUSE, 1411 1.13.2.2 jdolecek rtwn_read_1(sc, R92C_TXPAUSE) | 0x0f); 1412 1.13.2.2 jdolecek 1413 1.13.2.2 jdolecek rtwn_set_chan(sc, ic->ic_curchan, NULL); 1414 1.13.2.2 jdolecek 1415 1.13.2.2 jdolecek /* Start periodic scan. */ 1416 1.13.2.2 jdolecek callout_schedule(&sc->scan_to, mstohz(200)); 1417 1.13.2.2 jdolecek break; 1418 1.13.2.2 jdolecek 1419 1.13.2.2 jdolecek case IEEE80211_S_AUTH: 1420 1.13.2.2 jdolecek /* Set initial gain under link. */ 1421 1.13.2.2 jdolecek reg = rtwn_bb_read(sc, R92C_OFDM0_AGCCORE1(0)); 1422 1.13.2.2 jdolecek #ifdef doaslinux 1423 1.13.2.2 jdolecek reg = RW(reg, R92C_OFDM0_AGCCORE1_GAIN, 0x32); 1424 1.13.2.2 jdolecek #else 1425 1.13.2.2 jdolecek reg = RW(reg, R92C_OFDM0_AGCCORE1_GAIN, 0x20); 1426 1.13.2.2 jdolecek #endif 1427 1.13.2.2 jdolecek rtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(0), reg); 1428 1.13.2.2 jdolecek 1429 1.13.2.2 jdolecek reg = rtwn_bb_read(sc, R92C_OFDM0_AGCCORE1(1)); 1430 1.13.2.2 jdolecek #ifdef doaslinux 1431 1.13.2.2 jdolecek reg = RW(reg, R92C_OFDM0_AGCCORE1_GAIN, 0x32); 1432 1.13.2.2 jdolecek #else 1433 1.13.2.2 jdolecek reg = RW(reg, R92C_OFDM0_AGCCORE1_GAIN, 0x20); 1434 1.13.2.2 jdolecek #endif 1435 1.13.2.2 jdolecek rtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(1), reg); 1436 1.13.2.2 jdolecek 1437 1.13.2.2 jdolecek /* Set media status to 'No Link'. */ 1438 1.13.2.2 jdolecek rtwn_set_nettype0_msr(sc, R92C_CR_NETTYPE_NOLINK); 1439 1.13.2.2 jdolecek 1440 1.13.2.2 jdolecek /* Allow Rx from any BSSID. */ 1441 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_RCR, 1442 1.13.2.2 jdolecek rtwn_read_4(sc, R92C_RCR) & 1443 1.13.2.2 jdolecek ~(R92C_RCR_CBSSID_DATA | R92C_RCR_CBSSID_BCN)); 1444 1.13.2.2 jdolecek 1445 1.13.2.2 jdolecek rtwn_set_chan(sc, ic->ic_curchan, NULL); 1446 1.13.2.2 jdolecek break; 1447 1.13.2.2 jdolecek 1448 1.13.2.2 jdolecek case IEEE80211_S_ASSOC: 1449 1.13.2.2 jdolecek break; 1450 1.13.2.2 jdolecek 1451 1.13.2.2 jdolecek case IEEE80211_S_RUN: 1452 1.13.2.2 jdolecek ni = ic->ic_bss; 1453 1.13.2.2 jdolecek 1454 1.13.2.2 jdolecek rtwn_set_chan(sc, ic->ic_curchan, NULL); 1455 1.13.2.2 jdolecek 1456 1.13.2.2 jdolecek if (ic->ic_opmode == IEEE80211_M_MONITOR) { 1457 1.13.2.2 jdolecek /* Back to 20Mhz mode */ 1458 1.13.2.2 jdolecek rtwn_set_chan(sc, ic->ic_curchan, NULL); 1459 1.13.2.2 jdolecek 1460 1.13.2.2 jdolecek /* Set media status to 'No Link'. */ 1461 1.13.2.2 jdolecek rtwn_set_nettype0_msr(sc, R92C_CR_NETTYPE_NOLINK); 1462 1.13.2.2 jdolecek 1463 1.13.2.2 jdolecek /* Enable Rx of data frames. */ 1464 1.13.2.2 jdolecek rtwn_write_2(sc, R92C_RXFLTMAP2, 0xffff); 1465 1.13.2.2 jdolecek 1466 1.13.2.2 jdolecek /* Allow Rx from any BSSID. */ 1467 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_RCR, 1468 1.13.2.2 jdolecek rtwn_read_4(sc, R92C_RCR) & 1469 1.13.2.2 jdolecek ~(R92C_RCR_CBSSID_DATA | R92C_RCR_CBSSID_BCN)); 1470 1.13.2.2 jdolecek 1471 1.13.2.2 jdolecek /* Accept Rx data/control/management frames */ 1472 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_RCR, 1473 1.13.2.2 jdolecek rtwn_read_4(sc, R92C_RCR) | 1474 1.13.2.2 jdolecek R92C_RCR_ADF | R92C_RCR_ACF | R92C_RCR_AMF); 1475 1.13.2.2 jdolecek 1476 1.13.2.2 jdolecek /* Turn link LED on. */ 1477 1.13.2.2 jdolecek rtwn_set_led(sc, RTWN_LED_LINK, 1); 1478 1.13.2.2 jdolecek break; 1479 1.13.2.2 jdolecek } 1480 1.13.2.2 jdolecek 1481 1.13.2.2 jdolecek /* Set media status to 'Associated'. */ 1482 1.13.2.2 jdolecek rtwn_set_nettype0_msr(sc, rtwn_get_nettype(sc)); 1483 1.13.2.2 jdolecek 1484 1.13.2.2 jdolecek /* Set BSSID. */ 1485 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_BSSID + 0, LE_READ_4(&ni->ni_bssid[0])); 1486 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_BSSID + 4, LE_READ_2(&ni->ni_bssid[4])); 1487 1.13.2.2 jdolecek 1488 1.13.2.2 jdolecek if (ic->ic_curmode == IEEE80211_MODE_11B) 1489 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_INIRTS_RATE_SEL, 0); 1490 1.13.2.2 jdolecek else /* 802.11b/g */ 1491 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_INIRTS_RATE_SEL, 3); 1492 1.13.2.2 jdolecek 1493 1.13.2.2 jdolecek /* Enable Rx of data frames. */ 1494 1.13.2.2 jdolecek rtwn_write_2(sc, R92C_RXFLTMAP2, 0xffff); 1495 1.13.2.2 jdolecek 1496 1.13.2.2 jdolecek /* Flush all AC queues. */ 1497 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_TXPAUSE, 0); 1498 1.13.2.2 jdolecek 1499 1.13.2.2 jdolecek /* Set beacon interval. */ 1500 1.13.2.2 jdolecek rtwn_write_2(sc, R92C_BCN_INTERVAL, ni->ni_intval); 1501 1.13.2.2 jdolecek 1502 1.13.2.2 jdolecek switch (ic->ic_opmode) { 1503 1.13.2.2 jdolecek case IEEE80211_M_STA: 1504 1.13.2.2 jdolecek /* Allow Rx from our BSSID only. */ 1505 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_RCR, 1506 1.13.2.2 jdolecek rtwn_read_4(sc, R92C_RCR) | 1507 1.13.2.2 jdolecek R92C_RCR_CBSSID_DATA | R92C_RCR_CBSSID_BCN); 1508 1.13.2.2 jdolecek 1509 1.13.2.2 jdolecek /* Enable TSF synchronization. */ 1510 1.13.2.2 jdolecek rtwn_tsf_sync_enable(sc); 1511 1.13.2.2 jdolecek break; 1512 1.13.2.2 jdolecek 1513 1.13.2.2 jdolecek case IEEE80211_M_HOSTAP: 1514 1.13.2.2 jdolecek rtwn_write_2(sc, R92C_BCNTCFG, 0x000f); 1515 1.13.2.2 jdolecek 1516 1.13.2.2 jdolecek /* Allow Rx from any BSSID. */ 1517 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_RCR, 1518 1.13.2.2 jdolecek rtwn_read_4(sc, R92C_RCR) & 1519 1.13.2.2 jdolecek ~(R92C_RCR_CBSSID_DATA | R92C_RCR_CBSSID_BCN)); 1520 1.13.2.2 jdolecek 1521 1.13.2.2 jdolecek /* Reset TSF timer to zero. */ 1522 1.13.2.2 jdolecek reg = rtwn_read_4(sc, R92C_TCR); 1523 1.13.2.2 jdolecek reg &= ~0x01; 1524 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_TCR, reg); 1525 1.13.2.2 jdolecek reg |= 0x01; 1526 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_TCR, reg); 1527 1.13.2.2 jdolecek break; 1528 1.13.2.2 jdolecek 1529 1.13.2.2 jdolecek case IEEE80211_M_MONITOR: 1530 1.13.2.2 jdolecek default: 1531 1.13.2.2 jdolecek break; 1532 1.13.2.2 jdolecek } 1533 1.13.2.2 jdolecek 1534 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_SIFS_CCK + 1, 10); 1535 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_SIFS_OFDM + 1, 10); 1536 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_SPEC_SIFS + 1, 10); 1537 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_MAC_SPEC_SIFS + 1, 10); 1538 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_R2T_SIFS + 1, 10); 1539 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_T2T_SIFS + 1, 10); 1540 1.13.2.2 jdolecek 1541 1.13.2.2 jdolecek /* Intialize rate adaptation. */ 1542 1.13.2.2 jdolecek rtwn_ra_init(sc); 1543 1.13.2.2 jdolecek 1544 1.13.2.2 jdolecek /* Turn link LED on. */ 1545 1.13.2.2 jdolecek rtwn_set_led(sc, RTWN_LED_LINK, 1); 1546 1.13.2.2 jdolecek 1547 1.13.2.2 jdolecek /* Reset average RSSI. */ 1548 1.13.2.2 jdolecek sc->avg_pwdb = -1; 1549 1.13.2.2 jdolecek 1550 1.13.2.2 jdolecek /* Reset temperature calibration state machine. */ 1551 1.13.2.2 jdolecek sc->thcal_state = 0; 1552 1.13.2.2 jdolecek sc->thcal_lctemp = 0; 1553 1.13.2.2 jdolecek 1554 1.13.2.2 jdolecek /* Start periodic calibration. */ 1555 1.13.2.2 jdolecek callout_schedule(&sc->calib_to, mstohz(2000)); 1556 1.13.2.2 jdolecek break; 1557 1.13.2.2 jdolecek } 1558 1.13.2.2 jdolecek 1559 1.13.2.2 jdolecek (void)sc->sc_newstate(ic, nstate, arg); 1560 1.13.2.2 jdolecek 1561 1.13.2.2 jdolecek splx(s); 1562 1.13.2.2 jdolecek 1563 1.13.2.2 jdolecek return 0; 1564 1.13.2.2 jdolecek } 1565 1.13.2.2 jdolecek 1566 1.13.2.2 jdolecek static int 1567 1.13.2.2 jdolecek rtwn_wme_update(struct ieee80211com *ic) 1568 1.13.2.2 jdolecek { 1569 1.13.2.2 jdolecek static const uint16_t aci2reg[WME_NUM_AC] = { 1570 1.13.2.2 jdolecek R92C_EDCA_BE_PARAM, 1571 1.13.2.2 jdolecek R92C_EDCA_BK_PARAM, 1572 1.13.2.2 jdolecek R92C_EDCA_VI_PARAM, 1573 1.13.2.2 jdolecek R92C_EDCA_VO_PARAM 1574 1.13.2.2 jdolecek }; 1575 1.13.2.2 jdolecek struct rtwn_softc *sc = IC2IFP(ic)->if_softc; 1576 1.13.2.2 jdolecek const struct wmeParams *wmep; 1577 1.13.2.2 jdolecek int s, aci, aifs, slottime; 1578 1.13.2.2 jdolecek 1579 1.13.2.2 jdolecek DPRINTFN(3, ("%s: %s\n", device_xname(sc->sc_dev), __func__)); 1580 1.13.2.2 jdolecek 1581 1.13.2.2 jdolecek s = splnet(); 1582 1.13.2.2 jdolecek slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 1583 1.13.2.2 jdolecek for (aci = 0; aci < WME_NUM_AC; aci++) { 1584 1.13.2.2 jdolecek wmep = &ic->ic_wme.wme_chanParams.cap_wmeParams[aci]; 1585 1.13.2.2 jdolecek /* AIFS[AC] = AIFSN[AC] * aSlotTime + aSIFSTime. */ 1586 1.13.2.2 jdolecek aifs = wmep->wmep_aifsn * slottime + 10; 1587 1.13.2.2 jdolecek rtwn_write_4(sc, aci2reg[aci], 1588 1.13.2.2 jdolecek SM(R92C_EDCA_PARAM_TXOP, wmep->wmep_txopLimit) | 1589 1.13.2.2 jdolecek SM(R92C_EDCA_PARAM_ECWMIN, wmep->wmep_logcwmin) | 1590 1.13.2.2 jdolecek SM(R92C_EDCA_PARAM_ECWMAX, wmep->wmep_logcwmax) | 1591 1.13.2.2 jdolecek SM(R92C_EDCA_PARAM_AIFS, aifs)); 1592 1.13.2.2 jdolecek } 1593 1.13.2.2 jdolecek splx(s); 1594 1.13.2.2 jdolecek 1595 1.13.2.2 jdolecek return 0; 1596 1.13.2.2 jdolecek } 1597 1.13.2.2 jdolecek 1598 1.13.2.2 jdolecek static void 1599 1.13.2.2 jdolecek rtwn_update_avgrssi(struct rtwn_softc *sc, int rate, int8_t rssi) 1600 1.13.2.2 jdolecek { 1601 1.13.2.2 jdolecek int pwdb; 1602 1.13.2.2 jdolecek 1603 1.13.2.2 jdolecek DPRINTFN(3, ("%s: %s\n", device_xname(sc->sc_dev), __func__)); 1604 1.13.2.2 jdolecek 1605 1.13.2.2 jdolecek /* Convert antenna signal to percentage. */ 1606 1.13.2.2 jdolecek if (rssi <= -100 || rssi >= 20) 1607 1.13.2.2 jdolecek pwdb = 0; 1608 1.13.2.2 jdolecek else if (rssi >= 0) 1609 1.13.2.2 jdolecek pwdb = 100; 1610 1.13.2.2 jdolecek else 1611 1.13.2.2 jdolecek pwdb = 100 + rssi; 1612 1.13.2.2 jdolecek if (rate <= 3) { 1613 1.13.2.2 jdolecek /* CCK gain is smaller than OFDM/MCS gain. */ 1614 1.13.2.2 jdolecek pwdb += 6; 1615 1.13.2.2 jdolecek if (pwdb > 100) 1616 1.13.2.2 jdolecek pwdb = 100; 1617 1.13.2.2 jdolecek if (pwdb <= 14) 1618 1.13.2.2 jdolecek pwdb -= 4; 1619 1.13.2.2 jdolecek else if (pwdb <= 26) 1620 1.13.2.2 jdolecek pwdb -= 8; 1621 1.13.2.2 jdolecek else if (pwdb <= 34) 1622 1.13.2.2 jdolecek pwdb -= 6; 1623 1.13.2.2 jdolecek else if (pwdb <= 42) 1624 1.13.2.2 jdolecek pwdb -= 2; 1625 1.13.2.2 jdolecek } 1626 1.13.2.2 jdolecek if (sc->avg_pwdb == -1) /* Init. */ 1627 1.13.2.2 jdolecek sc->avg_pwdb = pwdb; 1628 1.13.2.2 jdolecek else if (sc->avg_pwdb < pwdb) 1629 1.13.2.2 jdolecek sc->avg_pwdb = ((sc->avg_pwdb * 19 + pwdb) / 20) + 1; 1630 1.13.2.2 jdolecek else 1631 1.13.2.2 jdolecek sc->avg_pwdb = ((sc->avg_pwdb * 19 + pwdb) / 20); 1632 1.13.2.2 jdolecek DPRINTFN(4, ("PWDB=%d EMA=%d\n", pwdb, sc->avg_pwdb)); 1633 1.13.2.2 jdolecek } 1634 1.13.2.2 jdolecek 1635 1.13.2.2 jdolecek static int8_t 1636 1.13.2.2 jdolecek rtwn_get_rssi(struct rtwn_softc *sc, int rate, void *physt) 1637 1.13.2.2 jdolecek { 1638 1.13.2.2 jdolecek static const int8_t cckoff[] = { 16, -12, -26, -46 }; 1639 1.13.2.2 jdolecek struct r92c_rx_phystat *phy; 1640 1.13.2.2 jdolecek struct r92c_rx_cck *cck; 1641 1.13.2.2 jdolecek uint8_t rpt; 1642 1.13.2.2 jdolecek int8_t rssi; 1643 1.13.2.2 jdolecek 1644 1.13.2.2 jdolecek DPRINTFN(3, ("%s: %s\n", device_xname(sc->sc_dev), __func__)); 1645 1.13.2.2 jdolecek 1646 1.13.2.2 jdolecek if (rate <= 3) { 1647 1.13.2.2 jdolecek cck = (struct r92c_rx_cck *)physt; 1648 1.13.2.2 jdolecek if (sc->sc_flags & RTWN_FLAG_CCK_HIPWR) { 1649 1.13.2.2 jdolecek rpt = (cck->agc_rpt >> 5) & 0x3; 1650 1.13.2.2 jdolecek rssi = (cck->agc_rpt & 0x1f) << 1; 1651 1.13.2.2 jdolecek } else { 1652 1.13.2.2 jdolecek rpt = (cck->agc_rpt >> 6) & 0x3; 1653 1.13.2.2 jdolecek rssi = cck->agc_rpt & 0x3e; 1654 1.13.2.2 jdolecek } 1655 1.13.2.2 jdolecek rssi = cckoff[rpt] - rssi; 1656 1.13.2.2 jdolecek } else { /* OFDM/HT. */ 1657 1.13.2.2 jdolecek phy = (struct r92c_rx_phystat *)physt; 1658 1.13.2.2 jdolecek rssi = ((le32toh(phy->phydw1) >> 1) & 0x7f) - 110; 1659 1.13.2.2 jdolecek } 1660 1.13.2.2 jdolecek return rssi; 1661 1.13.2.2 jdolecek } 1662 1.13.2.2 jdolecek 1663 1.13.2.2 jdolecek static void 1664 1.13.2.2 jdolecek rtwn_rx_frame(struct rtwn_softc *sc, struct r92c_rx_desc *rx_desc, 1665 1.13.2.2 jdolecek struct rtwn_rx_data *rx_data, int desc_idx) 1666 1.13.2.2 jdolecek { 1667 1.13.2.2 jdolecek struct ieee80211com *ic = &sc->sc_ic; 1668 1.13.2.2 jdolecek struct ifnet *ifp = IC2IFP(ic); 1669 1.13.2.2 jdolecek struct ieee80211_frame *wh; 1670 1.13.2.2 jdolecek struct ieee80211_node *ni; 1671 1.13.2.2 jdolecek struct r92c_rx_phystat *phy = NULL; 1672 1.13.2.2 jdolecek uint32_t rxdw0, rxdw3; 1673 1.13.2.2 jdolecek struct mbuf *m, *m1; 1674 1.13.2.2 jdolecek uint8_t rate; 1675 1.13.2.2 jdolecek int8_t rssi = 0; 1676 1.13.2.2 jdolecek int infosz, pktlen, shift, totlen, error, s; 1677 1.13.2.2 jdolecek 1678 1.13.2.2 jdolecek DPRINTFN(3, ("%s: %s\n", device_xname(sc->sc_dev), __func__)); 1679 1.13.2.2 jdolecek 1680 1.13.2.2 jdolecek rxdw0 = le32toh(rx_desc->rxdw0); 1681 1.13.2.2 jdolecek rxdw3 = le32toh(rx_desc->rxdw3); 1682 1.13.2.2 jdolecek 1683 1.13.2.2 jdolecek if (__predict_false(rxdw0 & (R92C_RXDW0_CRCERR | R92C_RXDW0_ICVERR))) { 1684 1.13.2.2 jdolecek /* 1685 1.13.2.2 jdolecek * This should not happen since we setup our Rx filter 1686 1.13.2.2 jdolecek * to not receive these frames. 1687 1.13.2.2 jdolecek */ 1688 1.13.2.2 jdolecek ifp->if_ierrors++; 1689 1.13.2.2 jdolecek return; 1690 1.13.2.2 jdolecek } 1691 1.13.2.2 jdolecek 1692 1.13.2.2 jdolecek pktlen = MS(rxdw0, R92C_RXDW0_PKTLEN); 1693 1.13.2.2 jdolecek /* 1694 1.13.2.2 jdolecek * XXX: This will drop most control packets. Do we really 1695 1.13.2.2 jdolecek * want this in IEEE80211_M_MONITOR mode? 1696 1.13.2.2 jdolecek */ 1697 1.13.2.2 jdolecek if (__predict_false(pktlen < (int)sizeof(struct ieee80211_frame_ack))) { 1698 1.13.2.2 jdolecek ic->ic_stats.is_rx_tooshort++; 1699 1.13.2.2 jdolecek ifp->if_ierrors++; 1700 1.13.2.2 jdolecek return; 1701 1.13.2.2 jdolecek } 1702 1.13.2.2 jdolecek if (__predict_false(pktlen > MCLBYTES)) { 1703 1.13.2.2 jdolecek ifp->if_ierrors++; 1704 1.13.2.2 jdolecek return; 1705 1.13.2.2 jdolecek } 1706 1.13.2.2 jdolecek 1707 1.13.2.2 jdolecek rate = MS(rxdw3, R92C_RXDW3_RATE); 1708 1.13.2.2 jdolecek infosz = MS(rxdw0, R92C_RXDW0_INFOSZ) * 8; 1709 1.13.2.2 jdolecek if (infosz > sizeof(struct r92c_rx_phystat)) 1710 1.13.2.2 jdolecek infosz = sizeof(struct r92c_rx_phystat); 1711 1.13.2.2 jdolecek shift = MS(rxdw0, R92C_RXDW0_SHIFT); 1712 1.13.2.2 jdolecek totlen = pktlen + infosz + shift; 1713 1.13.2.2 jdolecek 1714 1.13.2.2 jdolecek /* Get RSSI from PHY status descriptor if present. */ 1715 1.13.2.2 jdolecek if (infosz != 0 && (rxdw0 & R92C_RXDW0_PHYST)) { 1716 1.13.2.2 jdolecek phy = mtod(rx_data->m, struct r92c_rx_phystat *); 1717 1.13.2.2 jdolecek rssi = rtwn_get_rssi(sc, rate, phy); 1718 1.13.2.2 jdolecek /* Update our average RSSI. */ 1719 1.13.2.2 jdolecek rtwn_update_avgrssi(sc, rate, rssi); 1720 1.13.2.2 jdolecek } 1721 1.13.2.2 jdolecek 1722 1.13.2.2 jdolecek DPRINTFN(5, ("Rx frame len=%d rate=%d infosz=%d shift=%d rssi=%d\n", 1723 1.13.2.2 jdolecek pktlen, rate, infosz, shift, rssi)); 1724 1.13.2.2 jdolecek 1725 1.13.2.2 jdolecek MGETHDR(m1, M_DONTWAIT, MT_DATA); 1726 1.13.2.2 jdolecek if (__predict_false(m1 == NULL)) { 1727 1.13.2.2 jdolecek ic->ic_stats.is_rx_nobuf++; 1728 1.13.2.2 jdolecek ifp->if_ierrors++; 1729 1.13.2.2 jdolecek return; 1730 1.13.2.2 jdolecek } 1731 1.13.2.2 jdolecek MCLGET(m1, M_DONTWAIT); 1732 1.13.2.2 jdolecek if (__predict_false(!(m1->m_flags & M_EXT))) { 1733 1.13.2.2 jdolecek m_freem(m1); 1734 1.13.2.2 jdolecek ic->ic_stats.is_rx_nobuf++; 1735 1.13.2.2 jdolecek ifp->if_ierrors++; 1736 1.13.2.2 jdolecek return; 1737 1.13.2.2 jdolecek } 1738 1.13.2.2 jdolecek 1739 1.13.2.2 jdolecek bus_dmamap_sync(sc->sc_dmat, rx_data->map, 0, totlen, 1740 1.13.2.2 jdolecek BUS_DMASYNC_POSTREAD); 1741 1.13.2.2 jdolecek 1742 1.13.2.2 jdolecek bus_dmamap_unload(sc->sc_dmat, rx_data->map); 1743 1.13.2.2 jdolecek error = bus_dmamap_load(sc->sc_dmat, rx_data->map, mtod(m1, void *), 1744 1.13.2.2 jdolecek MCLBYTES, NULL, BUS_DMA_NOWAIT | BUS_DMA_READ); 1745 1.13.2.2 jdolecek if (error != 0) { 1746 1.13.2.2 jdolecek m_freem(m1); 1747 1.13.2.2 jdolecek 1748 1.13.2.2 jdolecek if (bus_dmamap_load_mbuf(sc->sc_dmat, rx_data->map, 1749 1.13.2.2 jdolecek rx_data->m, BUS_DMA_NOWAIT)) 1750 1.13.2.2 jdolecek panic("%s: could not load old RX mbuf", 1751 1.13.2.2 jdolecek device_xname(sc->sc_dev)); 1752 1.13.2.2 jdolecek 1753 1.13.2.2 jdolecek bus_dmamap_sync(sc->sc_dmat, rx_data->map, 0, MCLBYTES, 1754 1.13.2.2 jdolecek BUS_DMASYNC_PREREAD); 1755 1.13.2.2 jdolecek 1756 1.13.2.2 jdolecek /* Physical address may have changed. */ 1757 1.13.2.2 jdolecek rtwn_setup_rx_desc(sc, rx_desc, 1758 1.13.2.2 jdolecek rx_data->map->dm_segs[0].ds_addr, MCLBYTES, desc_idx); 1759 1.13.2.2 jdolecek 1760 1.13.2.2 jdolecek ifp->if_ierrors++; 1761 1.13.2.2 jdolecek return; 1762 1.13.2.2 jdolecek } 1763 1.13.2.2 jdolecek 1764 1.13.2.2 jdolecek /* Finalize mbuf. */ 1765 1.13.2.2 jdolecek m = rx_data->m; 1766 1.13.2.2 jdolecek rx_data->m = m1; 1767 1.13.2.2 jdolecek m->m_pkthdr.len = m->m_len = totlen; 1768 1.13.2.2 jdolecek m_set_rcvif(m, ifp); 1769 1.13.2.2 jdolecek 1770 1.13.2.2 jdolecek bus_dmamap_sync(sc->sc_dmat, rx_data->map, 0, MCLBYTES, 1771 1.13.2.2 jdolecek BUS_DMASYNC_PREREAD); 1772 1.13.2.2 jdolecek 1773 1.13.2.2 jdolecek /* Update RX descriptor. */ 1774 1.13.2.2 jdolecek rtwn_setup_rx_desc(sc, rx_desc, rx_data->map->dm_segs[0].ds_addr, 1775 1.13.2.2 jdolecek MCLBYTES, desc_idx); 1776 1.13.2.2 jdolecek 1777 1.13.2.2 jdolecek /* Get ieee80211 frame header. */ 1778 1.13.2.2 jdolecek if (rxdw0 & R92C_RXDW0_PHYST) 1779 1.13.2.2 jdolecek m_adj(m, infosz + shift); 1780 1.13.2.2 jdolecek else 1781 1.13.2.2 jdolecek m_adj(m, shift); 1782 1.13.2.2 jdolecek wh = mtod(m, struct ieee80211_frame *); 1783 1.13.2.2 jdolecek 1784 1.13.2.2 jdolecek s = splnet(); 1785 1.13.2.2 jdolecek 1786 1.13.2.2 jdolecek if (__predict_false(sc->sc_drvbpf != NULL)) { 1787 1.13.2.2 jdolecek struct rtwn_rx_radiotap_header *tap = &sc->sc_rxtap; 1788 1.13.2.2 jdolecek 1789 1.13.2.2 jdolecek tap->wr_flags = 0; 1790 1.13.2.2 jdolecek /* Map HW rate index to 802.11 rate. */ 1791 1.13.2.2 jdolecek tap->wr_flags = 2; 1792 1.13.2.2 jdolecek if (!(rxdw3 & R92C_RXDW3_HT)) { 1793 1.13.2.2 jdolecek switch (rate) { 1794 1.13.2.2 jdolecek /* CCK. */ 1795 1.13.2.2 jdolecek case 0: tap->wr_rate = 2; break; 1796 1.13.2.2 jdolecek case 1: tap->wr_rate = 4; break; 1797 1.13.2.2 jdolecek case 2: tap->wr_rate = 11; break; 1798 1.13.2.2 jdolecek case 3: tap->wr_rate = 22; break; 1799 1.13.2.2 jdolecek /* OFDM. */ 1800 1.13.2.2 jdolecek case 4: tap->wr_rate = 12; break; 1801 1.13.2.2 jdolecek case 5: tap->wr_rate = 18; break; 1802 1.13.2.2 jdolecek case 6: tap->wr_rate = 24; break; 1803 1.13.2.2 jdolecek case 7: tap->wr_rate = 36; break; 1804 1.13.2.2 jdolecek case 8: tap->wr_rate = 48; break; 1805 1.13.2.2 jdolecek case 9: tap->wr_rate = 72; break; 1806 1.13.2.2 jdolecek case 10: tap->wr_rate = 96; break; 1807 1.13.2.2 jdolecek case 11: tap->wr_rate = 108; break; 1808 1.13.2.2 jdolecek } 1809 1.13.2.2 jdolecek } else if (rate >= 12) { /* MCS0~15. */ 1810 1.13.2.2 jdolecek /* Bit 7 set means HT MCS instead of rate. */ 1811 1.13.2.2 jdolecek tap->wr_rate = 0x80 | (rate - 12); 1812 1.13.2.2 jdolecek } 1813 1.13.2.2 jdolecek tap->wr_dbm_antsignal = rssi; 1814 1.13.2.2 jdolecek tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 1815 1.13.2.2 jdolecek tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 1816 1.13.2.2 jdolecek 1817 1.13.2.2 jdolecek bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m); 1818 1.13.2.2 jdolecek } 1819 1.13.2.2 jdolecek 1820 1.13.2.2 jdolecek ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh); 1821 1.13.2.2 jdolecek 1822 1.13.2.2 jdolecek /* push the frame up to the 802.11 stack */ 1823 1.13.2.2 jdolecek ieee80211_input(ic, m, ni, rssi, 0); 1824 1.13.2.2 jdolecek 1825 1.13.2.2 jdolecek /* Node is no longer needed. */ 1826 1.13.2.2 jdolecek ieee80211_free_node(ni); 1827 1.13.2.2 jdolecek 1828 1.13.2.2 jdolecek splx(s); 1829 1.13.2.2 jdolecek } 1830 1.13.2.2 jdolecek 1831 1.13.2.2 jdolecek static int 1832 1.13.2.2 jdolecek rtwn_tx(struct rtwn_softc *sc, struct mbuf *m, struct ieee80211_node *ni) 1833 1.13.2.2 jdolecek { 1834 1.13.2.2 jdolecek struct ieee80211com *ic = &sc->sc_ic; 1835 1.13.2.2 jdolecek struct ieee80211_frame *wh; 1836 1.13.2.2 jdolecek struct ieee80211_key *k = NULL; 1837 1.13.2.2 jdolecek struct rtwn_tx_ring *tx_ring; 1838 1.13.2.2 jdolecek struct rtwn_tx_data *data; 1839 1.13.2.2 jdolecek struct r92c_tx_desc *txd; 1840 1.13.2.2 jdolecek uint16_t qos, seq; 1841 1.13.2.2 jdolecek uint8_t raid, type, tid, qid; 1842 1.13.2.2 jdolecek int hasqos, error; 1843 1.13.2.2 jdolecek 1844 1.13.2.2 jdolecek DPRINTFN(3, ("%s: %s\n", device_xname(sc->sc_dev), __func__)); 1845 1.13.2.2 jdolecek 1846 1.13.2.2 jdolecek wh = mtod(m, struct ieee80211_frame *); 1847 1.13.2.2 jdolecek type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 1848 1.13.2.2 jdolecek 1849 1.13.2.2 jdolecek if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1850 1.13.2.2 jdolecek k = ieee80211_crypto_encap(ic, ni, m); 1851 1.13.2.2 jdolecek if (k == NULL) 1852 1.13.2.2 jdolecek return ENOBUFS; 1853 1.13.2.2 jdolecek 1854 1.13.2.2 jdolecek wh = mtod(m, struct ieee80211_frame *); 1855 1.13.2.2 jdolecek } 1856 1.13.2.2 jdolecek 1857 1.13.2.2 jdolecek if ((hasqos = ieee80211_has_qos(wh))) { 1858 1.13.2.2 jdolecek /* data frames in 11n mode */ 1859 1.13.2.2 jdolecek qos = ieee80211_get_qos(wh); 1860 1.13.2.2 jdolecek tid = qos & IEEE80211_QOS_TID; 1861 1.13.2.2 jdolecek qid = TID_TO_WME_AC(tid); 1862 1.13.2.2 jdolecek } else if (type != IEEE80211_FC0_TYPE_DATA) { 1863 1.13.2.2 jdolecek /* Use AC_VO for management frames. */ 1864 1.13.2.2 jdolecek tid = 0; /* compiler happy */ 1865 1.13.2.2 jdolecek qid = RTWN_VO_QUEUE; 1866 1.13.2.2 jdolecek } else { 1867 1.13.2.2 jdolecek /* non-qos data frames */ 1868 1.13.2.2 jdolecek tid = R92C_TXDW1_QSEL_BE; 1869 1.13.2.2 jdolecek qid = RTWN_BE_QUEUE; 1870 1.13.2.2 jdolecek } 1871 1.13.2.2 jdolecek 1872 1.13.2.2 jdolecek /* Grab a Tx buffer from the ring. */ 1873 1.13.2.2 jdolecek tx_ring = &sc->tx_ring[qid]; 1874 1.13.2.2 jdolecek data = &tx_ring->tx_data[tx_ring->cur]; 1875 1.13.2.2 jdolecek if (data->m != NULL) { 1876 1.13.2.2 jdolecek m_freem(m); 1877 1.13.2.2 jdolecek return ENOBUFS; 1878 1.13.2.2 jdolecek } 1879 1.13.2.2 jdolecek 1880 1.13.2.2 jdolecek /* Fill Tx descriptor. */ 1881 1.13.2.2 jdolecek txd = &tx_ring->desc[tx_ring->cur]; 1882 1.13.2.2 jdolecek if (htole32(txd->txdw0) & R92C_RXDW0_OWN) { 1883 1.13.2.2 jdolecek m_freem(m); 1884 1.13.2.2 jdolecek return ENOBUFS; 1885 1.13.2.2 jdolecek } 1886 1.13.2.2 jdolecek 1887 1.13.2.2 jdolecek txd->txdw0 = htole32( 1888 1.13.2.2 jdolecek SM(R92C_TXDW0_PKTLEN, m->m_pkthdr.len) | 1889 1.13.2.2 jdolecek SM(R92C_TXDW0_OFFSET, sizeof(*txd)) | 1890 1.13.2.2 jdolecek R92C_TXDW0_FSG | R92C_TXDW0_LSG); 1891 1.13.2.2 jdolecek if (IEEE80211_IS_MULTICAST(wh->i_addr1)) 1892 1.13.2.2 jdolecek txd->txdw0 |= htole32(R92C_TXDW0_BMCAST); 1893 1.13.2.2 jdolecek 1894 1.13.2.2 jdolecek txd->txdw1 = 0; 1895 1.13.2.2 jdolecek txd->txdw4 = 0; 1896 1.13.2.2 jdolecek txd->txdw5 = 0; 1897 1.13.2.2 jdolecek if (!IEEE80211_IS_MULTICAST(wh->i_addr1) && 1898 1.13.2.2 jdolecek type == IEEE80211_FC0_TYPE_DATA) { 1899 1.13.2.2 jdolecek if (ic->ic_curmode == IEEE80211_MODE_11B) 1900 1.13.2.2 jdolecek raid = R92C_RAID_11B; 1901 1.13.2.2 jdolecek else 1902 1.13.2.2 jdolecek raid = R92C_RAID_11BG; 1903 1.13.2.2 jdolecek 1904 1.13.2.2 jdolecek txd->txdw1 |= htole32( 1905 1.13.2.2 jdolecek SM(R92C_TXDW1_MACID, RTWN_MACID_BSS) | 1906 1.13.2.2 jdolecek SM(R92C_TXDW1_QSEL, tid) | 1907 1.13.2.2 jdolecek SM(R92C_TXDW1_RAID, raid) | 1908 1.13.2.2 jdolecek R92C_TXDW1_AGGBK); 1909 1.13.2.2 jdolecek 1910 1.13.2.2 jdolecek if (ic->ic_flags & IEEE80211_F_USEPROT) { 1911 1.13.2.2 jdolecek /* for 11g */ 1912 1.13.2.2 jdolecek if (ic->ic_protmode == IEEE80211_PROT_CTSONLY) { 1913 1.13.2.2 jdolecek txd->txdw4 |= htole32(R92C_TXDW4_CTS2SELF | 1914 1.13.2.2 jdolecek R92C_TXDW4_HWRTSEN); 1915 1.13.2.2 jdolecek } else if (ic->ic_protmode == IEEE80211_PROT_RTSCTS) { 1916 1.13.2.2 jdolecek txd->txdw4 |= htole32(R92C_TXDW4_RTSEN | 1917 1.13.2.2 jdolecek R92C_TXDW4_HWRTSEN); 1918 1.13.2.2 jdolecek } 1919 1.13.2.2 jdolecek } 1920 1.13.2.2 jdolecek /* Send RTS at OFDM24. */ 1921 1.13.2.2 jdolecek txd->txdw4 |= htole32(SM(R92C_TXDW4_RTSRATE, 8)); 1922 1.13.2.2 jdolecek txd->txdw5 |= htole32(SM(R92C_TXDW5_RTSRATE_FBLIMIT, 0xf)); 1923 1.13.2.2 jdolecek /* Send data at OFDM54. */ 1924 1.13.2.2 jdolecek txd->txdw5 |= htole32(SM(R92C_TXDW5_DATARATE, 11)); 1925 1.13.2.2 jdolecek txd->txdw5 |= htole32(SM(R92C_TXDW5_DATARATE_FBLIMIT, 0x1f)); 1926 1.13.2.2 jdolecek } else if (type == IEEE80211_FC0_TYPE_MGT) { 1927 1.13.2.2 jdolecek txd->txdw1 |= htole32( 1928 1.13.2.2 jdolecek SM(R92C_TXDW1_MACID, RTWN_MACID_BSS) | 1929 1.13.2.2 jdolecek SM(R92C_TXDW1_QSEL, R92C_TXDW1_QSEL_MGNT) | 1930 1.13.2.2 jdolecek SM(R92C_TXDW1_RAID, R92C_RAID_11B)); 1931 1.13.2.2 jdolecek 1932 1.13.2.2 jdolecek /* Force CCK1. */ 1933 1.13.2.2 jdolecek txd->txdw4 |= htole32(R92C_TXDW4_DRVRATE); 1934 1.13.2.2 jdolecek /* Use 1Mbps */ 1935 1.13.2.2 jdolecek txd->txdw5 |= htole32(SM(R92C_TXDW5_DATARATE, 0)); 1936 1.13.2.2 jdolecek } else { 1937 1.13.2.2 jdolecek txd->txdw1 |= htole32( 1938 1.13.2.2 jdolecek SM(R92C_TXDW1_MACID, RTWN_MACID_BC) | 1939 1.13.2.2 jdolecek SM(R92C_TXDW1_RAID, R92C_RAID_11B)); 1940 1.13.2.2 jdolecek 1941 1.13.2.2 jdolecek /* Force CCK1. */ 1942 1.13.2.2 jdolecek txd->txdw4 |= htole32(R92C_TXDW4_DRVRATE); 1943 1.13.2.2 jdolecek /* Use 1Mbps */ 1944 1.13.2.2 jdolecek txd->txdw5 |= htole32(SM(R92C_TXDW5_DATARATE, 0)); 1945 1.13.2.2 jdolecek } 1946 1.13.2.2 jdolecek 1947 1.13.2.2 jdolecek /* Set sequence number (already little endian). */ 1948 1.13.2.2 jdolecek seq = LE_READ_2(&wh->i_seq[0]) >> IEEE80211_SEQ_SEQ_SHIFT; 1949 1.13.2.2 jdolecek txd->txdseq = htole16(seq); 1950 1.13.2.2 jdolecek 1951 1.13.2.2 jdolecek if (!hasqos) { 1952 1.13.2.2 jdolecek /* Use HW sequence numbering for non-QoS frames. */ 1953 1.13.2.2 jdolecek txd->txdw4 |= htole32(R92C_TXDW4_HWSEQ); 1954 1.13.2.2 jdolecek txd->txdseq |= htole16(0x8000); /* WTF? */ 1955 1.13.2.2 jdolecek } else 1956 1.13.2.2 jdolecek txd->txdw4 |= htole32(R92C_TXDW4_QOS); 1957 1.13.2.2 jdolecek 1958 1.13.2.2 jdolecek error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m, 1959 1.13.2.2 jdolecek BUS_DMA_NOWAIT | BUS_DMA_WRITE); 1960 1.13.2.2 jdolecek if (error && error != EFBIG) { 1961 1.13.2.2 jdolecek aprint_error_dev(sc->sc_dev, "can't map mbuf (error %d)\n", 1962 1.13.2.2 jdolecek error); 1963 1.13.2.2 jdolecek m_freem(m); 1964 1.13.2.2 jdolecek return error; 1965 1.13.2.2 jdolecek } 1966 1.13.2.2 jdolecek if (error != 0) { 1967 1.13.2.2 jdolecek /* Too many DMA segments, linearize mbuf. */ 1968 1.13.2.2 jdolecek struct mbuf *newm = m_defrag(m, M_DONTWAIT); 1969 1.13.2.2 jdolecek if (newm == NULL) { 1970 1.13.2.2 jdolecek aprint_error_dev(sc->sc_dev, "can't defrag mbuf\n"); 1971 1.13.2.2 jdolecek m_freem(m); 1972 1.13.2.2 jdolecek return ENOBUFS; 1973 1.13.2.2 jdolecek } 1974 1.13.2.2 jdolecek m = newm; 1975 1.13.2.2 jdolecek 1976 1.13.2.2 jdolecek error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m, 1977 1.13.2.2 jdolecek BUS_DMA_NOWAIT | BUS_DMA_WRITE); 1978 1.13.2.2 jdolecek if (error != 0) { 1979 1.13.2.2 jdolecek aprint_error_dev(sc->sc_dev, 1980 1.13.2.2 jdolecek "can't map mbuf (error %d)\n", error); 1981 1.13.2.2 jdolecek m_freem(m); 1982 1.13.2.2 jdolecek return error; 1983 1.13.2.2 jdolecek } 1984 1.13.2.2 jdolecek } 1985 1.13.2.2 jdolecek 1986 1.13.2.2 jdolecek txd->txbufaddr = htole32(data->map->dm_segs[0].ds_addr); 1987 1.13.2.2 jdolecek txd->txbufsize = htole16(m->m_pkthdr.len); 1988 1.13.2.2 jdolecek bus_space_barrier(sc->sc_st, sc->sc_sh, 0, sc->sc_mapsize, 1989 1.13.2.2 jdolecek BUS_SPACE_BARRIER_WRITE); 1990 1.13.2.2 jdolecek txd->txdw0 |= htole32(R92C_TXDW0_OWN); 1991 1.13.2.2 jdolecek 1992 1.13.2.2 jdolecek bus_dmamap_sync(sc->sc_dmat, tx_ring->map, 0, 1993 1.13.2.2 jdolecek sizeof(*txd) * RTWN_TX_LIST_COUNT, BUS_DMASYNC_PREWRITE); 1994 1.13.2.2 jdolecek bus_dmamap_sync(sc->sc_dmat, data->map, 0, m->m_pkthdr.len, 1995 1.13.2.2 jdolecek BUS_DMASYNC_PREWRITE); 1996 1.13.2.2 jdolecek 1997 1.13.2.2 jdolecek data->m = m; 1998 1.13.2.2 jdolecek data->ni = ni; 1999 1.13.2.2 jdolecek 2000 1.13.2.2 jdolecek if (__predict_false(sc->sc_drvbpf != NULL)) { 2001 1.13.2.2 jdolecek struct rtwn_tx_radiotap_header *tap = &sc->sc_txtap; 2002 1.13.2.2 jdolecek 2003 1.13.2.2 jdolecek tap->wt_flags = 0; 2004 1.13.2.2 jdolecek tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 2005 1.13.2.2 jdolecek tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 2006 1.13.2.2 jdolecek if (wh->i_fc[1] & IEEE80211_FC1_WEP) 2007 1.13.2.2 jdolecek tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP; 2008 1.13.2.2 jdolecek 2009 1.13.2.2 jdolecek bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m); 2010 1.13.2.2 jdolecek } 2011 1.13.2.2 jdolecek 2012 1.13.2.2 jdolecek tx_ring->cur = (tx_ring->cur + 1) % RTWN_TX_LIST_COUNT; 2013 1.13.2.2 jdolecek tx_ring->queued++; 2014 1.13.2.2 jdolecek 2015 1.13.2.2 jdolecek if (tx_ring->queued > RTWN_TX_LIST_HIMARK) 2016 1.13.2.2 jdolecek sc->qfullmsk |= (1 << qid); 2017 1.13.2.2 jdolecek 2018 1.13.2.2 jdolecek /* Kick TX. */ 2019 1.13.2.2 jdolecek rtwn_write_2(sc, R92C_PCIE_CTRL_REG, (1 << qid)); 2020 1.13.2.2 jdolecek 2021 1.13.2.2 jdolecek return 0; 2022 1.13.2.2 jdolecek } 2023 1.13.2.2 jdolecek 2024 1.13.2.2 jdolecek static void 2025 1.13.2.2 jdolecek rtwn_tx_done(struct rtwn_softc *sc, int qid) 2026 1.13.2.2 jdolecek { 2027 1.13.2.2 jdolecek struct ieee80211com *ic = &sc->sc_ic; 2028 1.13.2.2 jdolecek struct ifnet *ifp = IC2IFP(ic); 2029 1.13.2.2 jdolecek struct rtwn_tx_ring *tx_ring = &sc->tx_ring[qid]; 2030 1.13.2.2 jdolecek struct rtwn_tx_data *tx_data; 2031 1.13.2.2 jdolecek struct r92c_tx_desc *tx_desc; 2032 1.13.2.2 jdolecek int i, s; 2033 1.13.2.2 jdolecek 2034 1.13.2.2 jdolecek DPRINTFN(3, ("%s: %s: qid=%d\n", device_xname(sc->sc_dev), __func__, 2035 1.13.2.2 jdolecek qid)); 2036 1.13.2.2 jdolecek 2037 1.13.2.2 jdolecek s = splnet(); 2038 1.13.2.2 jdolecek 2039 1.13.2.2 jdolecek bus_dmamap_sync(sc->sc_dmat, tx_ring->map, 2040 1.13.2.2 jdolecek 0, sizeof(*tx_desc) * RTWN_TX_LIST_COUNT, 2041 1.13.2.2 jdolecek BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 2042 1.13.2.2 jdolecek 2043 1.13.2.2 jdolecek for (i = 0; i < RTWN_TX_LIST_COUNT; i++) { 2044 1.13.2.2 jdolecek tx_data = &tx_ring->tx_data[i]; 2045 1.13.2.2 jdolecek if (tx_data->m == NULL) 2046 1.13.2.2 jdolecek continue; 2047 1.13.2.2 jdolecek 2048 1.13.2.2 jdolecek tx_desc = &tx_ring->desc[i]; 2049 1.13.2.2 jdolecek if (le32toh(tx_desc->txdw0) & R92C_TXDW0_OWN) 2050 1.13.2.2 jdolecek continue; 2051 1.13.2.2 jdolecek 2052 1.13.2.2 jdolecek bus_dmamap_unload(sc->sc_dmat, tx_data->map); 2053 1.13.2.2 jdolecek m_freem(tx_data->m); 2054 1.13.2.2 jdolecek tx_data->m = NULL; 2055 1.13.2.2 jdolecek ieee80211_free_node(tx_data->ni); 2056 1.13.2.2 jdolecek tx_data->ni = NULL; 2057 1.13.2.2 jdolecek 2058 1.13.2.2 jdolecek ifp->if_opackets++; 2059 1.13.2.2 jdolecek sc->sc_tx_timer = 0; 2060 1.13.2.2 jdolecek tx_ring->queued--; 2061 1.13.2.2 jdolecek } 2062 1.13.2.2 jdolecek 2063 1.13.2.2 jdolecek if (tx_ring->queued < RTWN_TX_LIST_LOMARK) 2064 1.13.2.2 jdolecek sc->qfullmsk &= ~(1 << qid); 2065 1.13.2.2 jdolecek 2066 1.13.2.2 jdolecek splx(s); 2067 1.13.2.2 jdolecek } 2068 1.13.2.2 jdolecek 2069 1.13.2.2 jdolecek static void 2070 1.13.2.2 jdolecek rtwn_start(struct ifnet *ifp) 2071 1.13.2.2 jdolecek { 2072 1.13.2.2 jdolecek struct rtwn_softc *sc = ifp->if_softc; 2073 1.13.2.2 jdolecek struct ieee80211com *ic = &sc->sc_ic; 2074 1.13.2.2 jdolecek struct ether_header *eh; 2075 1.13.2.2 jdolecek struct ieee80211_node *ni; 2076 1.13.2.2 jdolecek struct mbuf *m; 2077 1.13.2.2 jdolecek 2078 1.13.2.2 jdolecek if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 2079 1.13.2.2 jdolecek return; 2080 1.13.2.2 jdolecek 2081 1.13.2.2 jdolecek DPRINTFN(3, ("%s: %s\n", device_xname(sc->sc_dev), __func__)); 2082 1.13.2.2 jdolecek 2083 1.13.2.2 jdolecek for (;;) { 2084 1.13.2.2 jdolecek if (sc->qfullmsk != 0) { 2085 1.13.2.2 jdolecek ifp->if_flags |= IFF_OACTIVE; 2086 1.13.2.2 jdolecek break; 2087 1.13.2.2 jdolecek } 2088 1.13.2.2 jdolecek /* Send pending management frames first. */ 2089 1.13.2.2 jdolecek IF_DEQUEUE(&ic->ic_mgtq, m); 2090 1.13.2.2 jdolecek if (m != NULL) { 2091 1.13.2.2 jdolecek ni = M_GETCTX(m, struct ieee80211_node *); 2092 1.13.2.2 jdolecek M_CLEARCTX(m); 2093 1.13.2.2 jdolecek goto sendit; 2094 1.13.2.2 jdolecek } 2095 1.13.2.2 jdolecek if (ic->ic_state != IEEE80211_S_RUN) 2096 1.13.2.2 jdolecek break; 2097 1.13.2.2 jdolecek 2098 1.13.2.2 jdolecek /* Encapsulate and send data frames. */ 2099 1.13.2.2 jdolecek IFQ_DEQUEUE(&ifp->if_snd, m); 2100 1.13.2.2 jdolecek if (m == NULL) 2101 1.13.2.2 jdolecek break; 2102 1.13.2.2 jdolecek 2103 1.13.2.2 jdolecek if (m->m_len < (int)sizeof(*eh) && 2104 1.13.2.2 jdolecek (m = m_pullup(m, sizeof(*eh))) == NULL) { 2105 1.13.2.2 jdolecek ifp->if_oerrors++; 2106 1.13.2.2 jdolecek continue; 2107 1.13.2.2 jdolecek } 2108 1.13.2.2 jdolecek eh = mtod(m, struct ether_header *); 2109 1.13.2.2 jdolecek ni = ieee80211_find_txnode(ic, eh->ether_dhost); 2110 1.13.2.2 jdolecek if (ni == NULL) { 2111 1.13.2.2 jdolecek m_freem(m); 2112 1.13.2.2 jdolecek ifp->if_oerrors++; 2113 1.13.2.2 jdolecek continue; 2114 1.13.2.2 jdolecek } 2115 1.13.2.2 jdolecek 2116 1.13.2.2 jdolecek bpf_mtap(ifp, m); 2117 1.13.2.2 jdolecek 2118 1.13.2.2 jdolecek if ((m = ieee80211_encap(ic, m, ni)) == NULL) { 2119 1.13.2.2 jdolecek ieee80211_free_node(ni); 2120 1.13.2.2 jdolecek ifp->if_oerrors++; 2121 1.13.2.2 jdolecek continue; 2122 1.13.2.2 jdolecek } 2123 1.13.2.2 jdolecek sendit: 2124 1.13.2.2 jdolecek bpf_mtap3(ic->ic_rawbpf, m); 2125 1.13.2.2 jdolecek 2126 1.13.2.2 jdolecek if (rtwn_tx(sc, m, ni) != 0) { 2127 1.13.2.2 jdolecek ieee80211_free_node(ni); 2128 1.13.2.2 jdolecek ifp->if_oerrors++; 2129 1.13.2.2 jdolecek continue; 2130 1.13.2.2 jdolecek } 2131 1.13.2.2 jdolecek 2132 1.13.2.2 jdolecek sc->sc_tx_timer = 5; 2133 1.13.2.2 jdolecek ifp->if_timer = 1; 2134 1.13.2.2 jdolecek } 2135 1.13.2.2 jdolecek 2136 1.13.2.2 jdolecek DPRINTFN(3, ("%s: %s done\n", device_xname(sc->sc_dev), __func__)); 2137 1.13.2.2 jdolecek } 2138 1.13.2.2 jdolecek 2139 1.13.2.2 jdolecek static void 2140 1.13.2.2 jdolecek rtwn_watchdog(struct ifnet *ifp) 2141 1.13.2.2 jdolecek { 2142 1.13.2.2 jdolecek struct rtwn_softc *sc = ifp->if_softc; 2143 1.13.2.2 jdolecek struct ieee80211com *ic = &sc->sc_ic; 2144 1.13.2.2 jdolecek 2145 1.13.2.2 jdolecek DPRINTFN(3, ("%s: %s\n", device_xname(sc->sc_dev), __func__)); 2146 1.13.2.2 jdolecek 2147 1.13.2.2 jdolecek ifp->if_timer = 0; 2148 1.13.2.2 jdolecek 2149 1.13.2.2 jdolecek if (sc->sc_tx_timer > 0) { 2150 1.13.2.2 jdolecek if (--sc->sc_tx_timer == 0) { 2151 1.13.2.2 jdolecek aprint_error_dev(sc->sc_dev, "device timeout\n"); 2152 1.13.2.2 jdolecek softint_schedule(sc->init_task); 2153 1.13.2.2 jdolecek ifp->if_oerrors++; 2154 1.13.2.2 jdolecek return; 2155 1.13.2.2 jdolecek } 2156 1.13.2.2 jdolecek ifp->if_timer = 1; 2157 1.13.2.2 jdolecek } 2158 1.13.2.2 jdolecek ieee80211_watchdog(ic); 2159 1.13.2.2 jdolecek } 2160 1.13.2.2 jdolecek 2161 1.13.2.2 jdolecek static int 2162 1.13.2.2 jdolecek rtwn_ioctl(struct ifnet *ifp, u_long cmd, void *data) 2163 1.13.2.2 jdolecek { 2164 1.13.2.2 jdolecek struct rtwn_softc *sc = ifp->if_softc; 2165 1.13.2.2 jdolecek struct ieee80211com *ic = &sc->sc_ic; 2166 1.13.2.2 jdolecek int s, error = 0; 2167 1.13.2.2 jdolecek 2168 1.13.2.2 jdolecek DPRINTFN(3, ("%s: %s: cmd=0x%08lx, data=%p\n", device_xname(sc->sc_dev), 2169 1.13.2.2 jdolecek __func__, cmd, data)); 2170 1.13.2.2 jdolecek 2171 1.13.2.2 jdolecek s = splnet(); 2172 1.13.2.2 jdolecek 2173 1.13.2.2 jdolecek switch (cmd) { 2174 1.13.2.2 jdolecek case SIOCSIFFLAGS: 2175 1.13.2.2 jdolecek if ((error = ifioctl_common(ifp, cmd, data)) != 0) 2176 1.13.2.2 jdolecek break; 2177 1.13.2.2 jdolecek switch (ifp->if_flags & (IFF_UP | IFF_RUNNING)) { 2178 1.13.2.2 jdolecek case IFF_UP | IFF_RUNNING: 2179 1.13.2.2 jdolecek break; 2180 1.13.2.2 jdolecek case IFF_UP: 2181 1.13.2.2 jdolecek error = rtwn_init(ifp); 2182 1.13.2.2 jdolecek if (error != 0) 2183 1.13.2.2 jdolecek ifp->if_flags &= ~IFF_UP; 2184 1.13.2.2 jdolecek break; 2185 1.13.2.2 jdolecek case IFF_RUNNING: 2186 1.13.2.2 jdolecek rtwn_stop(ifp, 1); 2187 1.13.2.2 jdolecek break; 2188 1.13.2.2 jdolecek case 0: 2189 1.13.2.2 jdolecek break; 2190 1.13.2.2 jdolecek } 2191 1.13.2.2 jdolecek break; 2192 1.13.2.2 jdolecek 2193 1.13.2.2 jdolecek case SIOCADDMULTI: 2194 1.13.2.2 jdolecek case SIOCDELMULTI: 2195 1.13.2.2 jdolecek if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) { 2196 1.13.2.2 jdolecek /* setup multicast filter, etc */ 2197 1.13.2.2 jdolecek error = 0; 2198 1.13.2.2 jdolecek } 2199 1.13.2.2 jdolecek break; 2200 1.13.2.2 jdolecek 2201 1.13.2.2 jdolecek case SIOCS80211CHANNEL: 2202 1.13.2.2 jdolecek error = ieee80211_ioctl(ic, cmd, data); 2203 1.13.2.2 jdolecek if (error == ENETRESET && 2204 1.13.2.2 jdolecek ic->ic_opmode == IEEE80211_M_MONITOR) { 2205 1.13.2.2 jdolecek if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 2206 1.13.2.2 jdolecek (IFF_UP | IFF_RUNNING)) { 2207 1.13.2.2 jdolecek rtwn_set_chan(sc, ic->ic_curchan, NULL); 2208 1.13.2.2 jdolecek } 2209 1.13.2.2 jdolecek error = 0; 2210 1.13.2.2 jdolecek } 2211 1.13.2.2 jdolecek break; 2212 1.13.2.2 jdolecek 2213 1.13.2.2 jdolecek default: 2214 1.13.2.2 jdolecek error = ieee80211_ioctl(ic, cmd, data); 2215 1.13.2.2 jdolecek break; 2216 1.13.2.2 jdolecek } 2217 1.13.2.2 jdolecek 2218 1.13.2.2 jdolecek if (error == ENETRESET) { 2219 1.13.2.2 jdolecek error = 0; 2220 1.13.2.2 jdolecek if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 2221 1.13.2.2 jdolecek (IFF_UP | IFF_RUNNING)) { 2222 1.13.2.2 jdolecek rtwn_stop(ifp, 0); 2223 1.13.2.2 jdolecek error = rtwn_init(ifp); 2224 1.13.2.2 jdolecek } 2225 1.13.2.2 jdolecek } 2226 1.13.2.2 jdolecek 2227 1.13.2.2 jdolecek splx(s); 2228 1.13.2.2 jdolecek 2229 1.13.2.2 jdolecek DPRINTFN(3, ("%s: %s: error=%d\n", device_xname(sc->sc_dev), __func__, 2230 1.13.2.2 jdolecek error)); 2231 1.13.2.2 jdolecek 2232 1.13.2.2 jdolecek return error; 2233 1.13.2.2 jdolecek } 2234 1.13.2.2 jdolecek 2235 1.13.2.2 jdolecek static int 2236 1.13.2.2 jdolecek rtwn_power_on(struct rtwn_softc *sc) 2237 1.13.2.2 jdolecek { 2238 1.13.2.2 jdolecek uint32_t reg; 2239 1.13.2.2 jdolecek int ntries; 2240 1.13.2.2 jdolecek 2241 1.13.2.2 jdolecek DPRINTFN(3, ("%s: %s\n", device_xname(sc->sc_dev), __func__)); 2242 1.13.2.2 jdolecek 2243 1.13.2.2 jdolecek /* Wait for autoload done bit. */ 2244 1.13.2.2 jdolecek for (ntries = 0; ntries < 1000; ntries++) { 2245 1.13.2.2 jdolecek if (rtwn_read_1(sc, R92C_APS_FSMCO) & R92C_APS_FSMCO_PFM_ALDN) 2246 1.13.2.2 jdolecek break; 2247 1.13.2.2 jdolecek DELAY(5); 2248 1.13.2.2 jdolecek } 2249 1.13.2.2 jdolecek if (ntries == 1000) { 2250 1.13.2.2 jdolecek aprint_error_dev(sc->sc_dev, 2251 1.13.2.2 jdolecek "timeout waiting for chip autoload\n"); 2252 1.13.2.2 jdolecek return ETIMEDOUT; 2253 1.13.2.2 jdolecek } 2254 1.13.2.2 jdolecek 2255 1.13.2.2 jdolecek /* Unlock ISO/CLK/Power control register. */ 2256 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_RSV_CTRL, 0); 2257 1.13.2.2 jdolecek 2258 1.13.2.2 jdolecek /* TODO: check if we need this for 8188CE */ 2259 1.13.2.2 jdolecek if (sc->board_type != R92C_BOARD_TYPE_DONGLE) { 2260 1.13.2.2 jdolecek /* bt coex */ 2261 1.13.2.2 jdolecek reg = rtwn_read_4(sc, R92C_APS_FSMCO); 2262 1.13.2.2 jdolecek reg |= (R92C_APS_FSMCO_SOP_ABG | 2263 1.13.2.2 jdolecek R92C_APS_FSMCO_SOP_AMB | 2264 1.13.2.2 jdolecek R92C_APS_FSMCO_XOP_BTCK); 2265 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_APS_FSMCO, reg); 2266 1.13.2.2 jdolecek } 2267 1.13.2.2 jdolecek 2268 1.13.2.2 jdolecek /* Move SPS into PWM mode. */ 2269 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_SPS0_CTRL, 0x2b); 2270 1.13.2.2 jdolecek DELAY(100); 2271 1.13.2.2 jdolecek 2272 1.13.2.2 jdolecek /* Set low byte to 0x0f, leave others unchanged. */ 2273 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_AFE_XTAL_CTRL, 2274 1.13.2.2 jdolecek (rtwn_read_4(sc, R92C_AFE_XTAL_CTRL) & 0xffffff00) | 0x0f); 2275 1.13.2.2 jdolecek 2276 1.13.2.2 jdolecek /* TODO: check if we need this for 8188CE */ 2277 1.13.2.2 jdolecek if (sc->board_type != R92C_BOARD_TYPE_DONGLE) { 2278 1.13.2.2 jdolecek /* bt coex */ 2279 1.13.2.2 jdolecek reg = rtwn_read_4(sc, R92C_AFE_XTAL_CTRL); 2280 1.13.2.2 jdolecek reg &= ~0x00024800; /* XXX magic from linux */ 2281 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_AFE_XTAL_CTRL, reg); 2282 1.13.2.2 jdolecek } 2283 1.13.2.2 jdolecek 2284 1.13.2.2 jdolecek rtwn_write_2(sc, R92C_SYS_ISO_CTRL, 2285 1.13.2.2 jdolecek (rtwn_read_2(sc, R92C_SYS_ISO_CTRL) & 0xff) | 2286 1.13.2.2 jdolecek R92C_SYS_ISO_CTRL_PWC_EV12V | R92C_SYS_ISO_CTRL_DIOR); 2287 1.13.2.2 jdolecek DELAY(200); 2288 1.13.2.2 jdolecek 2289 1.13.2.2 jdolecek /* TODO: linux does additional btcoex stuff here */ 2290 1.13.2.2 jdolecek 2291 1.13.2.2 jdolecek /* Auto enable WLAN. */ 2292 1.13.2.2 jdolecek rtwn_write_2(sc, R92C_APS_FSMCO, 2293 1.13.2.2 jdolecek rtwn_read_2(sc, R92C_APS_FSMCO) | R92C_APS_FSMCO_APFM_ONMAC); 2294 1.13.2.2 jdolecek for (ntries = 0; ntries < 1000; ntries++) { 2295 1.13.2.2 jdolecek if (!(rtwn_read_2(sc, R92C_APS_FSMCO) & 2296 1.13.2.2 jdolecek R92C_APS_FSMCO_APFM_ONMAC)) 2297 1.13.2.2 jdolecek break; 2298 1.13.2.2 jdolecek DELAY(5); 2299 1.13.2.2 jdolecek } 2300 1.13.2.2 jdolecek if (ntries == 1000) { 2301 1.13.2.2 jdolecek aprint_error_dev(sc->sc_dev, 2302 1.13.2.2 jdolecek "timeout waiting for MAC auto ON\n"); 2303 1.13.2.2 jdolecek return ETIMEDOUT; 2304 1.13.2.2 jdolecek } 2305 1.13.2.2 jdolecek 2306 1.13.2.2 jdolecek /* Enable radio, GPIO and LED functions. */ 2307 1.13.2.2 jdolecek rtwn_write_2(sc, R92C_APS_FSMCO, 2308 1.13.2.2 jdolecek R92C_APS_FSMCO_AFSM_PCIE | 2309 1.13.2.2 jdolecek R92C_APS_FSMCO_PDN_EN | 2310 1.13.2.2 jdolecek R92C_APS_FSMCO_PFM_ALDN); 2311 1.13.2.2 jdolecek 2312 1.13.2.2 jdolecek /* Release RF digital isolation. */ 2313 1.13.2.2 jdolecek rtwn_write_2(sc, R92C_SYS_ISO_CTRL, 2314 1.13.2.2 jdolecek rtwn_read_2(sc, R92C_SYS_ISO_CTRL) & ~R92C_SYS_ISO_CTRL_DIOR); 2315 1.13.2.2 jdolecek 2316 1.13.2.2 jdolecek if (sc->chip & RTWN_CHIP_92C) 2317 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_PCIE_CTRL_REG + 3, 0x77); 2318 1.13.2.2 jdolecek else 2319 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_PCIE_CTRL_REG + 3, 0x22); 2320 1.13.2.2 jdolecek 2321 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_INT_MIG, 0); 2322 1.13.2.2 jdolecek 2323 1.13.2.2 jdolecek if (sc->board_type != R92C_BOARD_TYPE_DONGLE) { 2324 1.13.2.2 jdolecek /* bt coex */ 2325 1.13.2.2 jdolecek reg = rtwn_read_4(sc, R92C_AFE_XTAL_CTRL + 2); 2326 1.13.2.2 jdolecek reg &= 0xfd; /* XXX magic from linux */ 2327 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_AFE_XTAL_CTRL + 2, reg); 2328 1.13.2.2 jdolecek } 2329 1.13.2.2 jdolecek 2330 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_GPIO_MUXCFG, 2331 1.13.2.2 jdolecek rtwn_read_1(sc, R92C_GPIO_MUXCFG) & ~R92C_GPIO_MUXCFG_RFKILL); 2332 1.13.2.2 jdolecek 2333 1.13.2.2 jdolecek reg = rtwn_read_1(sc, R92C_GPIO_IO_SEL); 2334 1.13.2.2 jdolecek if (!(reg & R92C_GPIO_IO_SEL_RFKILL)) { 2335 1.13.2.2 jdolecek aprint_error_dev(sc->sc_dev, 2336 1.13.2.2 jdolecek "radio is disabled by hardware switch\n"); 2337 1.13.2.2 jdolecek return EPERM; /* :-) */ 2338 1.13.2.2 jdolecek } 2339 1.13.2.2 jdolecek 2340 1.13.2.2 jdolecek /* Initialize MAC. */ 2341 1.13.2.2 jdolecek reg = rtwn_read_1(sc, R92C_APSD_CTRL); 2342 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_APSD_CTRL, 2343 1.13.2.2 jdolecek rtwn_read_1(sc, R92C_APSD_CTRL) & ~R92C_APSD_CTRL_OFF); 2344 1.13.2.2 jdolecek for (ntries = 0; ntries < 200; ntries++) { 2345 1.13.2.2 jdolecek if (!(rtwn_read_1(sc, R92C_APSD_CTRL) & 2346 1.13.2.2 jdolecek R92C_APSD_CTRL_OFF_STATUS)) 2347 1.13.2.2 jdolecek break; 2348 1.13.2.2 jdolecek DELAY(500); 2349 1.13.2.2 jdolecek } 2350 1.13.2.2 jdolecek if (ntries == 200) { 2351 1.13.2.2 jdolecek aprint_error_dev(sc->sc_dev, 2352 1.13.2.2 jdolecek "timeout waiting for MAC initialization\n"); 2353 1.13.2.2 jdolecek return ETIMEDOUT; 2354 1.13.2.2 jdolecek } 2355 1.13.2.2 jdolecek 2356 1.13.2.2 jdolecek /* Enable MAC DMA/WMAC/SCHEDULE/SEC blocks. */ 2357 1.13.2.2 jdolecek reg = rtwn_read_2(sc, R92C_CR); 2358 1.13.2.2 jdolecek reg |= R92C_CR_HCI_TXDMA_EN | R92C_CR_HCI_RXDMA_EN | 2359 1.13.2.2 jdolecek R92C_CR_TXDMA_EN | R92C_CR_RXDMA_EN | R92C_CR_PROTOCOL_EN | 2360 1.13.2.2 jdolecek R92C_CR_SCHEDULE_EN | R92C_CR_MACTXEN | R92C_CR_MACRXEN | 2361 1.13.2.2 jdolecek R92C_CR_ENSEC; 2362 1.13.2.2 jdolecek rtwn_write_2(sc, R92C_CR, reg); 2363 1.13.2.2 jdolecek 2364 1.13.2.2 jdolecek rtwn_write_1(sc, 0xfe10, 0x19); 2365 1.13.2.2 jdolecek 2366 1.13.2.2 jdolecek return 0; 2367 1.13.2.2 jdolecek } 2368 1.13.2.2 jdolecek 2369 1.13.2.2 jdolecek static int 2370 1.13.2.2 jdolecek rtwn_llt_init(struct rtwn_softc *sc) 2371 1.13.2.2 jdolecek { 2372 1.13.2.2 jdolecek int i, error; 2373 1.13.2.2 jdolecek 2374 1.13.2.2 jdolecek DPRINTFN(3, ("%s: %s\n", device_xname(sc->sc_dev), __func__)); 2375 1.13.2.2 jdolecek 2376 1.13.2.2 jdolecek /* Reserve pages [0; R92C_TX_PAGE_COUNT]. */ 2377 1.13.2.2 jdolecek for (i = 0; i < R92C_TX_PAGE_COUNT; i++) { 2378 1.13.2.2 jdolecek if ((error = rtwn_llt_write(sc, i, i + 1)) != 0) 2379 1.13.2.2 jdolecek return error; 2380 1.13.2.2 jdolecek } 2381 1.13.2.2 jdolecek /* NB: 0xff indicates end-of-list. */ 2382 1.13.2.2 jdolecek if ((error = rtwn_llt_write(sc, i, 0xff)) != 0) 2383 1.13.2.2 jdolecek return error; 2384 1.13.2.2 jdolecek /* 2385 1.13.2.2 jdolecek * Use pages [R92C_TX_PAGE_COUNT + 1; R92C_TXPKTBUF_COUNT - 1] 2386 1.13.2.2 jdolecek * as ring buffer. 2387 1.13.2.2 jdolecek */ 2388 1.13.2.2 jdolecek for (++i; i < R92C_TXPKTBUF_COUNT - 1; i++) { 2389 1.13.2.2 jdolecek if ((error = rtwn_llt_write(sc, i, i + 1)) != 0) 2390 1.13.2.2 jdolecek return error; 2391 1.13.2.2 jdolecek } 2392 1.13.2.2 jdolecek /* Make the last page point to the beginning of the ring buffer. */ 2393 1.13.2.2 jdolecek error = rtwn_llt_write(sc, i, R92C_TX_PAGE_COUNT + 1); 2394 1.13.2.2 jdolecek return error; 2395 1.13.2.2 jdolecek } 2396 1.13.2.2 jdolecek 2397 1.13.2.2 jdolecek static void 2398 1.13.2.2 jdolecek rtwn_fw_reset(struct rtwn_softc *sc) 2399 1.13.2.2 jdolecek { 2400 1.13.2.2 jdolecek uint16_t reg; 2401 1.13.2.2 jdolecek int ntries; 2402 1.13.2.2 jdolecek 2403 1.13.2.2 jdolecek DPRINTFN(3, ("%s: %s\n", device_xname(sc->sc_dev), __func__)); 2404 1.13.2.2 jdolecek 2405 1.13.2.2 jdolecek /* Tell 8051 to reset itself. */ 2406 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_HMETFR + 3, 0x20); 2407 1.13.2.2 jdolecek 2408 1.13.2.2 jdolecek /* Wait until 8051 resets by itself. */ 2409 1.13.2.2 jdolecek for (ntries = 0; ntries < 100; ntries++) { 2410 1.13.2.2 jdolecek reg = rtwn_read_2(sc, R92C_SYS_FUNC_EN); 2411 1.13.2.2 jdolecek if (!(reg & R92C_SYS_FUNC_EN_CPUEN)) 2412 1.13.2.2 jdolecek goto sleep; 2413 1.13.2.2 jdolecek DELAY(50); 2414 1.13.2.2 jdolecek } 2415 1.13.2.2 jdolecek /* Force 8051 reset. */ 2416 1.13.2.2 jdolecek rtwn_write_2(sc, R92C_SYS_FUNC_EN, reg & ~R92C_SYS_FUNC_EN_CPUEN); 2417 1.13.2.2 jdolecek sleep: 2418 1.13.2.2 jdolecek CLR(sc->sc_flags, RTWN_FLAG_FW_LOADED); 2419 1.13.2.2 jdolecek #if 0 2420 1.13.2.2 jdolecek /* 2421 1.13.2.2 jdolecek * We must sleep for one second to let the firmware settle. 2422 1.13.2.2 jdolecek * Accessing registers too early will hang the whole system. 2423 1.13.2.2 jdolecek */ 2424 1.13.2.2 jdolecek tsleep(®, 0, "rtwnrst", hz); 2425 1.13.2.2 jdolecek #else 2426 1.13.2.2 jdolecek DELAY(1000 * 1000); 2427 1.13.2.2 jdolecek #endif 2428 1.13.2.2 jdolecek } 2429 1.13.2.2 jdolecek 2430 1.13.2.2 jdolecek static int 2431 1.13.2.2 jdolecek rtwn_fw_loadpage(struct rtwn_softc *sc, int page, uint8_t *buf, int len) 2432 1.13.2.2 jdolecek { 2433 1.13.2.2 jdolecek uint32_t reg; 2434 1.13.2.2 jdolecek int off, mlen, error = 0, i; 2435 1.13.2.2 jdolecek 2436 1.13.2.2 jdolecek DPRINTFN(3, ("%s: %s\n", device_xname(sc->sc_dev), __func__)); 2437 1.13.2.2 jdolecek 2438 1.13.2.2 jdolecek reg = rtwn_read_4(sc, R92C_MCUFWDL); 2439 1.13.2.2 jdolecek reg = RW(reg, R92C_MCUFWDL_PAGE, page); 2440 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_MCUFWDL, reg); 2441 1.13.2.2 jdolecek 2442 1.13.2.2 jdolecek DELAY(5); 2443 1.13.2.2 jdolecek 2444 1.13.2.2 jdolecek off = R92C_FW_START_ADDR; 2445 1.13.2.2 jdolecek while (len > 0) { 2446 1.13.2.2 jdolecek if (len > 196) 2447 1.13.2.2 jdolecek mlen = 196; 2448 1.13.2.2 jdolecek else if (len > 4) 2449 1.13.2.2 jdolecek mlen = 4; 2450 1.13.2.2 jdolecek else 2451 1.13.2.2 jdolecek mlen = 1; 2452 1.13.2.2 jdolecek for (i = 0; i < mlen; i++) 2453 1.13.2.2 jdolecek rtwn_write_1(sc, off++, buf[i]); 2454 1.13.2.2 jdolecek buf += mlen; 2455 1.13.2.2 jdolecek len -= mlen; 2456 1.13.2.2 jdolecek } 2457 1.13.2.2 jdolecek 2458 1.13.2.2 jdolecek return error; 2459 1.13.2.2 jdolecek } 2460 1.13.2.2 jdolecek 2461 1.13.2.2 jdolecek static int 2462 1.13.2.2 jdolecek rtwn_load_firmware(struct rtwn_softc *sc) 2463 1.13.2.2 jdolecek { 2464 1.13.2.2 jdolecek firmware_handle_t fwh; 2465 1.13.2.2 jdolecek const struct r92c_fw_hdr *hdr; 2466 1.13.2.2 jdolecek const char *name; 2467 1.13.2.2 jdolecek u_char *fw, *ptr; 2468 1.13.2.2 jdolecek size_t len; 2469 1.13.2.2 jdolecek uint32_t reg; 2470 1.13.2.2 jdolecek int mlen, ntries, page, error; 2471 1.13.2.2 jdolecek 2472 1.13.2.2 jdolecek DPRINTFN(3, ("%s: %s\n", device_xname(sc->sc_dev), __func__)); 2473 1.13.2.2 jdolecek 2474 1.13.2.2 jdolecek /* Read firmware image from the filesystem. */ 2475 1.13.2.2 jdolecek if ((sc->chip & (RTWN_CHIP_UMC_A_CUT | RTWN_CHIP_92C)) == 2476 1.13.2.2 jdolecek RTWN_CHIP_UMC_A_CUT) 2477 1.13.2.2 jdolecek name = "rtl8192cfwU.bin"; 2478 1.13.2.2 jdolecek else if (sc->chip & RTWN_CHIP_UMC_B_CUT) 2479 1.13.2.2 jdolecek name = "rtl8192cfwU_B.bin"; 2480 1.13.2.2 jdolecek else 2481 1.13.2.2 jdolecek name = "rtl8192cfw.bin"; 2482 1.13.2.2 jdolecek DPRINTF(("%s: firmware: %s\n", device_xname(sc->sc_dev), name)); 2483 1.13.2.2 jdolecek if ((error = firmware_open("if_rtwn", name, &fwh)) != 0) { 2484 1.13.2.2 jdolecek aprint_error_dev(sc->sc_dev, 2485 1.13.2.2 jdolecek "could not read firmware %s (error %d)\n", name, error); 2486 1.13.2.2 jdolecek return error; 2487 1.13.2.2 jdolecek } 2488 1.13.2.2 jdolecek const size_t fwlen = len = firmware_get_size(fwh); 2489 1.13.2.2 jdolecek fw = firmware_malloc(len); 2490 1.13.2.2 jdolecek if (fw == NULL) { 2491 1.13.2.2 jdolecek aprint_error_dev(sc->sc_dev, 2492 1.13.2.2 jdolecek "failed to allocate firmware memory (size=%zu)\n", len); 2493 1.13.2.2 jdolecek firmware_close(fwh); 2494 1.13.2.2 jdolecek return ENOMEM; 2495 1.13.2.2 jdolecek } 2496 1.13.2.2 jdolecek error = firmware_read(fwh, 0, fw, len); 2497 1.13.2.2 jdolecek firmware_close(fwh); 2498 1.13.2.2 jdolecek if (error != 0) { 2499 1.13.2.2 jdolecek aprint_error_dev(sc->sc_dev, 2500 1.13.2.2 jdolecek "failed to read firmware (error %d)\n", error); 2501 1.13.2.2 jdolecek firmware_free(fw, fwlen); 2502 1.13.2.2 jdolecek return error; 2503 1.13.2.2 jdolecek } 2504 1.13.2.2 jdolecek 2505 1.13.2.2 jdolecek if (len < sizeof(*hdr)) { 2506 1.13.2.2 jdolecek aprint_error_dev(sc->sc_dev, "firmware too short\n"); 2507 1.13.2.2 jdolecek error = EINVAL; 2508 1.13.2.2 jdolecek goto fail; 2509 1.13.2.2 jdolecek } 2510 1.13.2.2 jdolecek ptr = fw; 2511 1.13.2.2 jdolecek hdr = (const struct r92c_fw_hdr *)ptr; 2512 1.13.2.2 jdolecek /* Check if there is a valid FW header and skip it. */ 2513 1.13.2.2 jdolecek if ((le16toh(hdr->signature) >> 4) == 0x88c || 2514 1.13.2.2 jdolecek (le16toh(hdr->signature) >> 4) == 0x92c) { 2515 1.13.2.2 jdolecek DPRINTF(("FW V%d.%d %02d-%02d %02d:%02d\n", 2516 1.13.2.2 jdolecek le16toh(hdr->version), le16toh(hdr->subversion), 2517 1.13.2.2 jdolecek hdr->month, hdr->date, hdr->hour, hdr->minute)); 2518 1.13.2.2 jdolecek ptr += sizeof(*hdr); 2519 1.13.2.2 jdolecek len -= sizeof(*hdr); 2520 1.13.2.2 jdolecek } 2521 1.13.2.2 jdolecek 2522 1.13.2.2 jdolecek if (rtwn_read_1(sc, R92C_MCUFWDL) & R92C_MCUFWDL_RAM_DL_SEL) 2523 1.13.2.2 jdolecek rtwn_fw_reset(sc); 2524 1.13.2.2 jdolecek 2525 1.13.2.2 jdolecek /* Enable FW download. */ 2526 1.13.2.2 jdolecek rtwn_write_2(sc, R92C_SYS_FUNC_EN, 2527 1.13.2.2 jdolecek rtwn_read_2(sc, R92C_SYS_FUNC_EN) | 2528 1.13.2.2 jdolecek R92C_SYS_FUNC_EN_CPUEN); 2529 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_MCUFWDL, 2530 1.13.2.2 jdolecek rtwn_read_1(sc, R92C_MCUFWDL) | R92C_MCUFWDL_EN); 2531 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_MCUFWDL + 2, 2532 1.13.2.2 jdolecek rtwn_read_1(sc, R92C_MCUFWDL + 2) & ~0x08); 2533 1.13.2.2 jdolecek 2534 1.13.2.2 jdolecek /* Reset the FWDL checksum. */ 2535 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_MCUFWDL, 2536 1.13.2.2 jdolecek rtwn_read_1(sc, R92C_MCUFWDL) | R92C_MCUFWDL_CHKSUM_RPT); 2537 1.13.2.2 jdolecek 2538 1.13.2.2 jdolecek /* download firmware */ 2539 1.13.2.2 jdolecek for (page = 0; len > 0; page++) { 2540 1.13.2.2 jdolecek mlen = MIN(len, R92C_FW_PAGE_SIZE); 2541 1.13.2.2 jdolecek error = rtwn_fw_loadpage(sc, page, ptr, mlen); 2542 1.13.2.2 jdolecek if (error != 0) { 2543 1.13.2.2 jdolecek aprint_error_dev(sc->sc_dev, 2544 1.13.2.2 jdolecek "could not load firmware page %d\n", page); 2545 1.13.2.2 jdolecek goto fail; 2546 1.13.2.2 jdolecek } 2547 1.13.2.2 jdolecek ptr += mlen; 2548 1.13.2.2 jdolecek len -= mlen; 2549 1.13.2.2 jdolecek } 2550 1.13.2.2 jdolecek 2551 1.13.2.2 jdolecek /* Disable FW download. */ 2552 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_MCUFWDL, 2553 1.13.2.2 jdolecek rtwn_read_1(sc, R92C_MCUFWDL) & ~R92C_MCUFWDL_EN); 2554 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_MCUFWDL + 1, 0); 2555 1.13.2.2 jdolecek 2556 1.13.2.2 jdolecek /* Wait for checksum report. */ 2557 1.13.2.2 jdolecek for (ntries = 0; ntries < 1000; ntries++) { 2558 1.13.2.2 jdolecek if (rtwn_read_4(sc, R92C_MCUFWDL) & R92C_MCUFWDL_CHKSUM_RPT) 2559 1.13.2.2 jdolecek break; 2560 1.13.2.2 jdolecek DELAY(5); 2561 1.13.2.2 jdolecek } 2562 1.13.2.2 jdolecek if (ntries == 1000) { 2563 1.13.2.2 jdolecek aprint_error_dev(sc->sc_dev, 2564 1.13.2.2 jdolecek "timeout waiting for checksum report\n"); 2565 1.13.2.2 jdolecek error = ETIMEDOUT; 2566 1.13.2.2 jdolecek goto fail; 2567 1.13.2.2 jdolecek } 2568 1.13.2.2 jdolecek 2569 1.13.2.2 jdolecek reg = rtwn_read_4(sc, R92C_MCUFWDL); 2570 1.13.2.2 jdolecek reg = (reg & ~R92C_MCUFWDL_WINTINI_RDY) | R92C_MCUFWDL_RDY; 2571 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_MCUFWDL, reg); 2572 1.13.2.2 jdolecek 2573 1.13.2.2 jdolecek /* Wait for firmware readiness. */ 2574 1.13.2.2 jdolecek for (ntries = 0; ntries < 1000; ntries++) { 2575 1.13.2.2 jdolecek if (rtwn_read_4(sc, R92C_MCUFWDL) & R92C_MCUFWDL_WINTINI_RDY) 2576 1.13.2.2 jdolecek break; 2577 1.13.2.2 jdolecek DELAY(5); 2578 1.13.2.2 jdolecek } 2579 1.13.2.2 jdolecek if (ntries == 1000) { 2580 1.13.2.2 jdolecek aprint_error_dev(sc->sc_dev, 2581 1.13.2.2 jdolecek "timeout waiting for firmware readiness\n"); 2582 1.13.2.2 jdolecek error = ETIMEDOUT; 2583 1.13.2.2 jdolecek goto fail; 2584 1.13.2.2 jdolecek } 2585 1.13.2.2 jdolecek SET(sc->sc_flags, RTWN_FLAG_FW_LOADED); 2586 1.13.2.2 jdolecek 2587 1.13.2.2 jdolecek fail: 2588 1.13.2.2 jdolecek firmware_free(fw, fwlen); 2589 1.13.2.2 jdolecek return error; 2590 1.13.2.2 jdolecek } 2591 1.13.2.2 jdolecek 2592 1.13.2.2 jdolecek static int 2593 1.13.2.2 jdolecek rtwn_dma_init(struct rtwn_softc *sc) 2594 1.13.2.2 jdolecek { 2595 1.13.2.2 jdolecek uint32_t reg; 2596 1.13.2.2 jdolecek int error; 2597 1.13.2.2 jdolecek 2598 1.13.2.2 jdolecek DPRINTFN(3, ("%s: %s\n", device_xname(sc->sc_dev), __func__)); 2599 1.13.2.2 jdolecek 2600 1.13.2.2 jdolecek /* Initialize LLT table. */ 2601 1.13.2.2 jdolecek error = rtwn_llt_init(sc); 2602 1.13.2.2 jdolecek if (error != 0) 2603 1.13.2.2 jdolecek return error; 2604 1.13.2.2 jdolecek 2605 1.13.2.2 jdolecek /* Set number of pages for normal priority queue. */ 2606 1.13.2.2 jdolecek rtwn_write_2(sc, R92C_RQPN_NPQ, 0); 2607 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_RQPN, 2608 1.13.2.2 jdolecek /* Set number of pages for public queue. */ 2609 1.13.2.2 jdolecek SM(R92C_RQPN_PUBQ, R92C_PUBQ_NPAGES) | 2610 1.13.2.2 jdolecek /* Set number of pages for high priority queue. */ 2611 1.13.2.2 jdolecek SM(R92C_RQPN_HPQ, R92C_HPQ_NPAGES) | 2612 1.13.2.2 jdolecek /* Set number of pages for low priority queue. */ 2613 1.13.2.2 jdolecek SM(R92C_RQPN_LPQ, R92C_LPQ_NPAGES) | 2614 1.13.2.2 jdolecek /* Load values. */ 2615 1.13.2.2 jdolecek R92C_RQPN_LD); 2616 1.13.2.2 jdolecek 2617 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_TXPKTBUF_BCNQ_BDNY, R92C_TX_PAGE_BOUNDARY); 2618 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_TXPKTBUF_MGQ_BDNY, R92C_TX_PAGE_BOUNDARY); 2619 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_TXPKTBUF_WMAC_LBK_BF_HD, R92C_TX_PAGE_BOUNDARY); 2620 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_TRXFF_BNDY, R92C_TX_PAGE_BOUNDARY); 2621 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_TDECTRL + 1, R92C_TX_PAGE_BOUNDARY); 2622 1.13.2.2 jdolecek 2623 1.13.2.2 jdolecek reg = rtwn_read_2(sc, R92C_TRXDMA_CTRL); 2624 1.13.2.2 jdolecek reg &= ~R92C_TRXDMA_CTRL_QMAP_M; 2625 1.13.2.2 jdolecek reg |= 0xF771; 2626 1.13.2.2 jdolecek rtwn_write_2(sc, R92C_TRXDMA_CTRL, reg); 2627 1.13.2.2 jdolecek 2628 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_TCR, R92C_TCR_CFENDFORM | (1 << 12) | (1 << 13)); 2629 1.13.2.2 jdolecek 2630 1.13.2.2 jdolecek /* Configure Tx DMA. */ 2631 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_BKQ_DESA, 2632 1.13.2.2 jdolecek sc->tx_ring[RTWN_BK_QUEUE].map->dm_segs[0].ds_addr); 2633 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_BEQ_DESA, 2634 1.13.2.2 jdolecek sc->tx_ring[RTWN_BE_QUEUE].map->dm_segs[0].ds_addr); 2635 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_VIQ_DESA, 2636 1.13.2.2 jdolecek sc->tx_ring[RTWN_VI_QUEUE].map->dm_segs[0].ds_addr); 2637 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_VOQ_DESA, 2638 1.13.2.2 jdolecek sc->tx_ring[RTWN_VO_QUEUE].map->dm_segs[0].ds_addr); 2639 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_BCNQ_DESA, 2640 1.13.2.2 jdolecek sc->tx_ring[RTWN_BEACON_QUEUE].map->dm_segs[0].ds_addr); 2641 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_MGQ_DESA, 2642 1.13.2.2 jdolecek sc->tx_ring[RTWN_MGNT_QUEUE].map->dm_segs[0].ds_addr); 2643 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_HQ_DESA, 2644 1.13.2.2 jdolecek sc->tx_ring[RTWN_HIGH_QUEUE].map->dm_segs[0].ds_addr); 2645 1.13.2.2 jdolecek 2646 1.13.2.2 jdolecek /* Configure Rx DMA. */ 2647 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_RX_DESA, sc->rx_ring.map->dm_segs[0].ds_addr); 2648 1.13.2.2 jdolecek 2649 1.13.2.2 jdolecek /* Set Tx/Rx transfer page boundary. */ 2650 1.13.2.2 jdolecek rtwn_write_2(sc, R92C_TRXFF_BNDY + 2, 0x27ff); 2651 1.13.2.2 jdolecek 2652 1.13.2.2 jdolecek /* Set Tx/Rx transfer page size. */ 2653 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_PBP, 2654 1.13.2.2 jdolecek SM(R92C_PBP_PSRX, R92C_PBP_128) | 2655 1.13.2.2 jdolecek SM(R92C_PBP_PSTX, R92C_PBP_128)); 2656 1.13.2.2 jdolecek return 0; 2657 1.13.2.2 jdolecek } 2658 1.13.2.2 jdolecek 2659 1.13.2.2 jdolecek static void 2660 1.13.2.2 jdolecek rtwn_mac_init(struct rtwn_softc *sc) 2661 1.13.2.2 jdolecek { 2662 1.13.2.2 jdolecek int i; 2663 1.13.2.2 jdolecek 2664 1.13.2.2 jdolecek DPRINTFN(3, ("%s: %s\n", device_xname(sc->sc_dev), __func__)); 2665 1.13.2.2 jdolecek 2666 1.13.2.2 jdolecek /* Write MAC initialization values. */ 2667 1.13.2.2 jdolecek for (i = 0; i < __arraycount(rtl8192ce_mac); i++) 2668 1.13.2.2 jdolecek rtwn_write_1(sc, rtl8192ce_mac[i].reg, rtl8192ce_mac[i].val); 2669 1.13.2.2 jdolecek } 2670 1.13.2.2 jdolecek 2671 1.13.2.2 jdolecek static void 2672 1.13.2.2 jdolecek rtwn_bb_init(struct rtwn_softc *sc) 2673 1.13.2.2 jdolecek { 2674 1.13.2.2 jdolecek const struct rtwn_bb_prog *prog; 2675 1.13.2.2 jdolecek uint32_t reg; 2676 1.13.2.2 jdolecek int i; 2677 1.13.2.2 jdolecek 2678 1.13.2.2 jdolecek DPRINTFN(3, ("%s: %s\n", device_xname(sc->sc_dev), __func__)); 2679 1.13.2.2 jdolecek 2680 1.13.2.2 jdolecek /* Enable BB and RF. */ 2681 1.13.2.2 jdolecek rtwn_write_2(sc, R92C_SYS_FUNC_EN, 2682 1.13.2.2 jdolecek rtwn_read_2(sc, R92C_SYS_FUNC_EN) | 2683 1.13.2.2 jdolecek R92C_SYS_FUNC_EN_BBRSTB | R92C_SYS_FUNC_EN_BB_GLB_RST | 2684 1.13.2.2 jdolecek R92C_SYS_FUNC_EN_DIO_RF); 2685 1.13.2.2 jdolecek 2686 1.13.2.2 jdolecek rtwn_write_2(sc, R92C_AFE_PLL_CTRL, 0xdb83); 2687 1.13.2.2 jdolecek 2688 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_RF_CTRL, 2689 1.13.2.2 jdolecek R92C_RF_CTRL_EN | R92C_RF_CTRL_RSTB | R92C_RF_CTRL_SDMRSTB); 2690 1.13.2.2 jdolecek 2691 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_SYS_FUNC_EN, 2692 1.13.2.2 jdolecek R92C_SYS_FUNC_EN_DIO_PCIE | R92C_SYS_FUNC_EN_PCIEA | 2693 1.13.2.2 jdolecek R92C_SYS_FUNC_EN_PPLL | R92C_SYS_FUNC_EN_BB_GLB_RST | 2694 1.13.2.2 jdolecek R92C_SYS_FUNC_EN_BBRSTB); 2695 1.13.2.2 jdolecek 2696 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_AFE_XTAL_CTRL + 1, 0x80); 2697 1.13.2.2 jdolecek 2698 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_LEDCFG0, 2699 1.13.2.2 jdolecek rtwn_read_4(sc, R92C_LEDCFG0) | 0x00800000); 2700 1.13.2.2 jdolecek 2701 1.13.2.2 jdolecek /* Select BB programming. */ 2702 1.13.2.2 jdolecek prog = (sc->chip & RTWN_CHIP_92C) ? 2703 1.13.2.2 jdolecek &rtl8192ce_bb_prog_2t : &rtl8192ce_bb_prog_1t; 2704 1.13.2.2 jdolecek 2705 1.13.2.2 jdolecek /* Write BB initialization values. */ 2706 1.13.2.2 jdolecek for (i = 0; i < prog->count; i++) { 2707 1.13.2.2 jdolecek rtwn_bb_write(sc, prog->regs[i], prog->vals[i]); 2708 1.13.2.2 jdolecek DELAY(1); 2709 1.13.2.2 jdolecek } 2710 1.13.2.2 jdolecek 2711 1.13.2.2 jdolecek if (sc->chip & RTWN_CHIP_92C_1T2R) { 2712 1.13.2.2 jdolecek /* 8192C 1T only configuration. */ 2713 1.13.2.2 jdolecek reg = rtwn_bb_read(sc, R92C_FPGA0_TXINFO); 2714 1.13.2.2 jdolecek reg = (reg & ~0x00000003) | 0x2; 2715 1.13.2.2 jdolecek rtwn_bb_write(sc, R92C_FPGA0_TXINFO, reg); 2716 1.13.2.2 jdolecek 2717 1.13.2.2 jdolecek reg = rtwn_bb_read(sc, R92C_FPGA1_TXINFO); 2718 1.13.2.2 jdolecek reg = (reg & ~0x00300033) | 0x00200022; 2719 1.13.2.2 jdolecek rtwn_bb_write(sc, R92C_FPGA1_TXINFO, reg); 2720 1.13.2.2 jdolecek 2721 1.13.2.2 jdolecek reg = rtwn_bb_read(sc, R92C_CCK0_AFESETTING); 2722 1.13.2.2 jdolecek reg = (reg & ~0xff000000) | 0x45 << 24; 2723 1.13.2.2 jdolecek rtwn_bb_write(sc, R92C_CCK0_AFESETTING, reg); 2724 1.13.2.2 jdolecek 2725 1.13.2.2 jdolecek reg = rtwn_bb_read(sc, R92C_OFDM0_TRXPATHENA); 2726 1.13.2.2 jdolecek reg = (reg & ~0x000000ff) | 0x23; 2727 1.13.2.2 jdolecek rtwn_bb_write(sc, R92C_OFDM0_TRXPATHENA, reg); 2728 1.13.2.2 jdolecek 2729 1.13.2.2 jdolecek reg = rtwn_bb_read(sc, R92C_OFDM0_AGCPARAM1); 2730 1.13.2.2 jdolecek reg = (reg & ~0x00000030) | 1 << 4; 2731 1.13.2.2 jdolecek rtwn_bb_write(sc, R92C_OFDM0_AGCPARAM1, reg); 2732 1.13.2.2 jdolecek 2733 1.13.2.2 jdolecek reg = rtwn_bb_read(sc, 0xe74); 2734 1.13.2.2 jdolecek reg = (reg & ~0x0c000000) | 2 << 26; 2735 1.13.2.2 jdolecek rtwn_bb_write(sc, 0xe74, reg); 2736 1.13.2.2 jdolecek reg = rtwn_bb_read(sc, 0xe78); 2737 1.13.2.2 jdolecek reg = (reg & ~0x0c000000) | 2 << 26; 2738 1.13.2.2 jdolecek rtwn_bb_write(sc, 0xe78, reg); 2739 1.13.2.2 jdolecek reg = rtwn_bb_read(sc, 0xe7c); 2740 1.13.2.2 jdolecek reg = (reg & ~0x0c000000) | 2 << 26; 2741 1.13.2.2 jdolecek rtwn_bb_write(sc, 0xe7c, reg); 2742 1.13.2.2 jdolecek reg = rtwn_bb_read(sc, 0xe80); 2743 1.13.2.2 jdolecek reg = (reg & ~0x0c000000) | 2 << 26; 2744 1.13.2.2 jdolecek rtwn_bb_write(sc, 0xe80, reg); 2745 1.13.2.2 jdolecek reg = rtwn_bb_read(sc, 0xe88); 2746 1.13.2.2 jdolecek reg = (reg & ~0x0c000000) | 2 << 26; 2747 1.13.2.2 jdolecek rtwn_bb_write(sc, 0xe88, reg); 2748 1.13.2.2 jdolecek } 2749 1.13.2.2 jdolecek 2750 1.13.2.2 jdolecek /* Write AGC values. */ 2751 1.13.2.2 jdolecek for (i = 0; i < prog->agccount; i++) { 2752 1.13.2.2 jdolecek rtwn_bb_write(sc, R92C_OFDM0_AGCRSSITABLE, 2753 1.13.2.2 jdolecek prog->agcvals[i]); 2754 1.13.2.2 jdolecek DELAY(1); 2755 1.13.2.2 jdolecek } 2756 1.13.2.2 jdolecek 2757 1.13.2.2 jdolecek if (rtwn_bb_read(sc, R92C_HSSI_PARAM2(0)) & 2758 1.13.2.2 jdolecek R92C_HSSI_PARAM2_CCK_HIPWR) 2759 1.13.2.2 jdolecek sc->sc_flags |= RTWN_FLAG_CCK_HIPWR; 2760 1.13.2.2 jdolecek } 2761 1.13.2.2 jdolecek 2762 1.13.2.2 jdolecek static void 2763 1.13.2.2 jdolecek rtwn_rf_init(struct rtwn_softc *sc) 2764 1.13.2.2 jdolecek { 2765 1.13.2.2 jdolecek const struct rtwn_rf_prog *prog; 2766 1.13.2.2 jdolecek uint32_t reg, type; 2767 1.13.2.2 jdolecek int i, j, idx, off; 2768 1.13.2.2 jdolecek 2769 1.13.2.2 jdolecek DPRINTFN(3, ("%s: %s\n", device_xname(sc->sc_dev), __func__)); 2770 1.13.2.2 jdolecek 2771 1.13.2.2 jdolecek /* Select RF programming based on board type. */ 2772 1.13.2.2 jdolecek if (!(sc->chip & RTWN_CHIP_92C)) { 2773 1.13.2.2 jdolecek if (sc->board_type == R92C_BOARD_TYPE_MINICARD) 2774 1.13.2.2 jdolecek prog = rtl8188ce_rf_prog; 2775 1.13.2.2 jdolecek else if (sc->board_type == R92C_BOARD_TYPE_HIGHPA) 2776 1.13.2.2 jdolecek prog = rtl8188ru_rf_prog; 2777 1.13.2.2 jdolecek else 2778 1.13.2.2 jdolecek prog = rtl8188cu_rf_prog; 2779 1.13.2.2 jdolecek } else 2780 1.13.2.2 jdolecek prog = rtl8192ce_rf_prog; 2781 1.13.2.2 jdolecek 2782 1.13.2.2 jdolecek for (i = 0; i < sc->nrxchains; i++) { 2783 1.13.2.2 jdolecek /* Save RF_ENV control type. */ 2784 1.13.2.2 jdolecek idx = i / 2; 2785 1.13.2.2 jdolecek off = (i % 2) * 16; 2786 1.13.2.2 jdolecek reg = rtwn_bb_read(sc, R92C_FPGA0_RFIFACESW(idx)); 2787 1.13.2.2 jdolecek type = (reg >> off) & 0x10; 2788 1.13.2.2 jdolecek 2789 1.13.2.2 jdolecek /* Set RF_ENV enable. */ 2790 1.13.2.2 jdolecek reg = rtwn_bb_read(sc, R92C_FPGA0_RFIFACEOE(i)); 2791 1.13.2.2 jdolecek reg |= 0x100000; 2792 1.13.2.2 jdolecek rtwn_bb_write(sc, R92C_FPGA0_RFIFACEOE(i), reg); 2793 1.13.2.2 jdolecek DELAY(1); 2794 1.13.2.2 jdolecek /* Set RF_ENV output high. */ 2795 1.13.2.2 jdolecek reg = rtwn_bb_read(sc, R92C_FPGA0_RFIFACEOE(i)); 2796 1.13.2.2 jdolecek reg |= 0x10; 2797 1.13.2.2 jdolecek rtwn_bb_write(sc, R92C_FPGA0_RFIFACEOE(i), reg); 2798 1.13.2.2 jdolecek DELAY(1); 2799 1.13.2.2 jdolecek /* Set address and data lengths of RF registers. */ 2800 1.13.2.2 jdolecek reg = rtwn_bb_read(sc, R92C_HSSI_PARAM2(i)); 2801 1.13.2.2 jdolecek reg &= ~R92C_HSSI_PARAM2_ADDR_LENGTH; 2802 1.13.2.2 jdolecek rtwn_bb_write(sc, R92C_HSSI_PARAM2(i), reg); 2803 1.13.2.2 jdolecek DELAY(1); 2804 1.13.2.2 jdolecek reg = rtwn_bb_read(sc, R92C_HSSI_PARAM2(i)); 2805 1.13.2.2 jdolecek reg &= ~R92C_HSSI_PARAM2_DATA_LENGTH; 2806 1.13.2.2 jdolecek rtwn_bb_write(sc, R92C_HSSI_PARAM2(i), reg); 2807 1.13.2.2 jdolecek DELAY(1); 2808 1.13.2.2 jdolecek 2809 1.13.2.2 jdolecek /* Write RF initialization values for this chain. */ 2810 1.13.2.2 jdolecek for (j = 0; j < prog[i].count; j++) { 2811 1.13.2.2 jdolecek if (prog[i].regs[j] >= 0xf9 && 2812 1.13.2.2 jdolecek prog[i].regs[j] <= 0xfe) { 2813 1.13.2.2 jdolecek /* 2814 1.13.2.2 jdolecek * These are fake RF registers offsets that 2815 1.13.2.2 jdolecek * indicate a delay is required. 2816 1.13.2.2 jdolecek */ 2817 1.13.2.2 jdolecek DELAY(50); 2818 1.13.2.2 jdolecek continue; 2819 1.13.2.2 jdolecek } 2820 1.13.2.2 jdolecek rtwn_rf_write(sc, i, prog[i].regs[j], 2821 1.13.2.2 jdolecek prog[i].vals[j]); 2822 1.13.2.2 jdolecek DELAY(1); 2823 1.13.2.2 jdolecek } 2824 1.13.2.2 jdolecek 2825 1.13.2.2 jdolecek /* Restore RF_ENV control type. */ 2826 1.13.2.2 jdolecek reg = rtwn_bb_read(sc, R92C_FPGA0_RFIFACESW(idx)); 2827 1.13.2.2 jdolecek reg &= ~(0x10 << off) | (type << off); 2828 1.13.2.2 jdolecek rtwn_bb_write(sc, R92C_FPGA0_RFIFACESW(idx), reg); 2829 1.13.2.2 jdolecek 2830 1.13.2.2 jdolecek /* Cache RF register CHNLBW. */ 2831 1.13.2.2 jdolecek sc->rf_chnlbw[i] = rtwn_rf_read(sc, i, R92C_RF_CHNLBW); 2832 1.13.2.2 jdolecek } 2833 1.13.2.2 jdolecek 2834 1.13.2.2 jdolecek if ((sc->chip & (RTWN_CHIP_UMC_A_CUT | RTWN_CHIP_92C)) == 2835 1.13.2.2 jdolecek RTWN_CHIP_UMC_A_CUT) { 2836 1.13.2.2 jdolecek rtwn_rf_write(sc, 0, R92C_RF_RX_G1, 0x30255); 2837 1.13.2.2 jdolecek rtwn_rf_write(sc, 0, R92C_RF_RX_G2, 0x50a00); 2838 1.13.2.2 jdolecek } 2839 1.13.2.2 jdolecek } 2840 1.13.2.2 jdolecek 2841 1.13.2.2 jdolecek static void 2842 1.13.2.2 jdolecek rtwn_cam_init(struct rtwn_softc *sc) 2843 1.13.2.2 jdolecek { 2844 1.13.2.2 jdolecek 2845 1.13.2.2 jdolecek DPRINTFN(3, ("%s: %s\n", device_xname(sc->sc_dev), __func__)); 2846 1.13.2.2 jdolecek 2847 1.13.2.2 jdolecek /* Invalidate all CAM entries. */ 2848 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_CAMCMD, R92C_CAMCMD_POLLING | R92C_CAMCMD_CLR); 2849 1.13.2.2 jdolecek } 2850 1.13.2.2 jdolecek 2851 1.13.2.2 jdolecek static void 2852 1.13.2.2 jdolecek rtwn_pa_bias_init(struct rtwn_softc *sc) 2853 1.13.2.2 jdolecek { 2854 1.13.2.2 jdolecek uint8_t reg; 2855 1.13.2.2 jdolecek int i; 2856 1.13.2.2 jdolecek 2857 1.13.2.2 jdolecek DPRINTFN(3, ("%s: %s\n", device_xname(sc->sc_dev), __func__)); 2858 1.13.2.2 jdolecek 2859 1.13.2.2 jdolecek for (i = 0; i < sc->nrxchains; i++) { 2860 1.13.2.2 jdolecek if (sc->pa_setting & (1 << i)) 2861 1.13.2.2 jdolecek continue; 2862 1.13.2.2 jdolecek rtwn_rf_write(sc, i, R92C_RF_IPA, 0x0f406); 2863 1.13.2.2 jdolecek rtwn_rf_write(sc, i, R92C_RF_IPA, 0x4f406); 2864 1.13.2.2 jdolecek rtwn_rf_write(sc, i, R92C_RF_IPA, 0x8f406); 2865 1.13.2.2 jdolecek rtwn_rf_write(sc, i, R92C_RF_IPA, 0xcf406); 2866 1.13.2.2 jdolecek } 2867 1.13.2.2 jdolecek if (!(sc->pa_setting & 0x10)) { 2868 1.13.2.2 jdolecek reg = rtwn_read_1(sc, 0x16); 2869 1.13.2.2 jdolecek reg = (reg & ~0xf0) | 0x90; 2870 1.13.2.2 jdolecek rtwn_write_1(sc, 0x16, reg); 2871 1.13.2.2 jdolecek } 2872 1.13.2.2 jdolecek } 2873 1.13.2.2 jdolecek 2874 1.13.2.2 jdolecek static void 2875 1.13.2.2 jdolecek rtwn_rxfilter_init(struct rtwn_softc *sc) 2876 1.13.2.2 jdolecek { 2877 1.13.2.2 jdolecek 2878 1.13.2.2 jdolecek DPRINTFN(3, ("%s: %s\n", device_xname(sc->sc_dev), __func__)); 2879 1.13.2.2 jdolecek 2880 1.13.2.2 jdolecek /* Initialize Rx filter. */ 2881 1.13.2.2 jdolecek /* TODO: use better filter for monitor mode. */ 2882 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_RCR, 2883 1.13.2.2 jdolecek R92C_RCR_AAP | R92C_RCR_APM | R92C_RCR_AM | R92C_RCR_AB | 2884 1.13.2.2 jdolecek R92C_RCR_APP_ICV | R92C_RCR_AMF | R92C_RCR_HTC_LOC_CTRL | 2885 1.13.2.2 jdolecek R92C_RCR_APP_MIC | R92C_RCR_APP_PHYSTS); 2886 1.13.2.2 jdolecek /* Accept all multicast frames. */ 2887 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_MAR + 0, 0xffffffff); 2888 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_MAR + 4, 0xffffffff); 2889 1.13.2.2 jdolecek /* Accept all management frames. */ 2890 1.13.2.2 jdolecek rtwn_write_2(sc, R92C_RXFLTMAP0, 0xffff); 2891 1.13.2.2 jdolecek /* Reject all control frames. */ 2892 1.13.2.2 jdolecek rtwn_write_2(sc, R92C_RXFLTMAP1, 0x0000); 2893 1.13.2.2 jdolecek /* Accept all data frames. */ 2894 1.13.2.2 jdolecek rtwn_write_2(sc, R92C_RXFLTMAP2, 0xffff); 2895 1.13.2.2 jdolecek } 2896 1.13.2.2 jdolecek 2897 1.13.2.2 jdolecek static void 2898 1.13.2.2 jdolecek rtwn_edca_init(struct rtwn_softc *sc) 2899 1.13.2.2 jdolecek { 2900 1.13.2.2 jdolecek 2901 1.13.2.2 jdolecek DPRINTFN(3, ("%s: %s\n", device_xname(sc->sc_dev), __func__)); 2902 1.13.2.2 jdolecek 2903 1.13.2.2 jdolecek /* set spec SIFS (used in NAV) */ 2904 1.13.2.2 jdolecek rtwn_write_2(sc, R92C_SPEC_SIFS, 0x1010); 2905 1.13.2.2 jdolecek rtwn_write_2(sc, R92C_MAC_SPEC_SIFS, 0x1010); 2906 1.13.2.2 jdolecek 2907 1.13.2.2 jdolecek /* set SIFS CCK/OFDM */ 2908 1.13.2.2 jdolecek rtwn_write_2(sc, R92C_SIFS_CCK, 0x1010); 2909 1.13.2.2 jdolecek rtwn_write_2(sc, R92C_SIFS_OFDM, 0x0e0e); 2910 1.13.2.2 jdolecek 2911 1.13.2.2 jdolecek /* TXOP */ 2912 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_EDCA_BE_PARAM, 0x005ea42b); 2913 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_EDCA_BK_PARAM, 0x0000a44f); 2914 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_EDCA_VI_PARAM, 0x005e4322); 2915 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_EDCA_VO_PARAM, 0x002f3222); 2916 1.13.2.2 jdolecek } 2917 1.13.2.2 jdolecek 2918 1.13.2.2 jdolecek static void 2919 1.13.2.2 jdolecek rtwn_write_txpower(struct rtwn_softc *sc, int chain, 2920 1.13.2.2 jdolecek uint16_t power[RTWN_RIDX_COUNT]) 2921 1.13.2.2 jdolecek { 2922 1.13.2.2 jdolecek uint32_t reg; 2923 1.13.2.2 jdolecek 2924 1.13.2.2 jdolecek DPRINTFN(3, ("%s: %s\n", device_xname(sc->sc_dev), __func__)); 2925 1.13.2.2 jdolecek 2926 1.13.2.2 jdolecek /* Write per-CCK rate Tx power. */ 2927 1.13.2.2 jdolecek if (chain == 0) { 2928 1.13.2.2 jdolecek reg = rtwn_bb_read(sc, R92C_TXAGC_A_CCK1_MCS32); 2929 1.13.2.2 jdolecek reg = RW(reg, R92C_TXAGC_A_CCK1, power[0]); 2930 1.13.2.2 jdolecek rtwn_bb_write(sc, R92C_TXAGC_A_CCK1_MCS32, reg); 2931 1.13.2.2 jdolecek reg = rtwn_bb_read(sc, R92C_TXAGC_B_CCK11_A_CCK2_11); 2932 1.13.2.2 jdolecek reg = RW(reg, R92C_TXAGC_A_CCK2, power[1]); 2933 1.13.2.2 jdolecek reg = RW(reg, R92C_TXAGC_A_CCK55, power[2]); 2934 1.13.2.2 jdolecek reg = RW(reg, R92C_TXAGC_A_CCK11, power[3]); 2935 1.13.2.2 jdolecek rtwn_bb_write(sc, R92C_TXAGC_B_CCK11_A_CCK2_11, reg); 2936 1.13.2.2 jdolecek } else { 2937 1.13.2.2 jdolecek reg = rtwn_bb_read(sc, R92C_TXAGC_B_CCK1_55_MCS32); 2938 1.13.2.2 jdolecek reg = RW(reg, R92C_TXAGC_B_CCK1, power[0]); 2939 1.13.2.2 jdolecek reg = RW(reg, R92C_TXAGC_B_CCK2, power[1]); 2940 1.13.2.2 jdolecek reg = RW(reg, R92C_TXAGC_B_CCK55, power[2]); 2941 1.13.2.2 jdolecek rtwn_bb_write(sc, R92C_TXAGC_B_CCK1_55_MCS32, reg); 2942 1.13.2.2 jdolecek reg = rtwn_bb_read(sc, R92C_TXAGC_B_CCK11_A_CCK2_11); 2943 1.13.2.2 jdolecek reg = RW(reg, R92C_TXAGC_B_CCK11, power[3]); 2944 1.13.2.2 jdolecek rtwn_bb_write(sc, R92C_TXAGC_B_CCK11_A_CCK2_11, reg); 2945 1.13.2.2 jdolecek } 2946 1.13.2.2 jdolecek /* Write per-OFDM rate Tx power. */ 2947 1.13.2.2 jdolecek rtwn_bb_write(sc, R92C_TXAGC_RATE18_06(chain), 2948 1.13.2.2 jdolecek SM(R92C_TXAGC_RATE06, power[ 4]) | 2949 1.13.2.2 jdolecek SM(R92C_TXAGC_RATE09, power[ 5]) | 2950 1.13.2.2 jdolecek SM(R92C_TXAGC_RATE12, power[ 6]) | 2951 1.13.2.2 jdolecek SM(R92C_TXAGC_RATE18, power[ 7])); 2952 1.13.2.2 jdolecek rtwn_bb_write(sc, R92C_TXAGC_RATE54_24(chain), 2953 1.13.2.2 jdolecek SM(R92C_TXAGC_RATE24, power[ 8]) | 2954 1.13.2.2 jdolecek SM(R92C_TXAGC_RATE36, power[ 9]) | 2955 1.13.2.2 jdolecek SM(R92C_TXAGC_RATE48, power[10]) | 2956 1.13.2.2 jdolecek SM(R92C_TXAGC_RATE54, power[11])); 2957 1.13.2.2 jdolecek /* Write per-MCS Tx power. */ 2958 1.13.2.2 jdolecek rtwn_bb_write(sc, R92C_TXAGC_MCS03_MCS00(chain), 2959 1.13.2.2 jdolecek SM(R92C_TXAGC_MCS00, power[12]) | 2960 1.13.2.2 jdolecek SM(R92C_TXAGC_MCS01, power[13]) | 2961 1.13.2.2 jdolecek SM(R92C_TXAGC_MCS02, power[14]) | 2962 1.13.2.2 jdolecek SM(R92C_TXAGC_MCS03, power[15])); 2963 1.13.2.2 jdolecek rtwn_bb_write(sc, R92C_TXAGC_MCS07_MCS04(chain), 2964 1.13.2.2 jdolecek SM(R92C_TXAGC_MCS04, power[16]) | 2965 1.13.2.2 jdolecek SM(R92C_TXAGC_MCS05, power[17]) | 2966 1.13.2.2 jdolecek SM(R92C_TXAGC_MCS06, power[18]) | 2967 1.13.2.2 jdolecek SM(R92C_TXAGC_MCS07, power[19])); 2968 1.13.2.2 jdolecek rtwn_bb_write(sc, R92C_TXAGC_MCS11_MCS08(chain), 2969 1.13.2.2 jdolecek SM(R92C_TXAGC_MCS08, power[20]) | 2970 1.13.2.2 jdolecek SM(R92C_TXAGC_MCS09, power[21]) | 2971 1.13.2.2 jdolecek SM(R92C_TXAGC_MCS10, power[22]) | 2972 1.13.2.2 jdolecek SM(R92C_TXAGC_MCS11, power[23])); 2973 1.13.2.2 jdolecek rtwn_bb_write(sc, R92C_TXAGC_MCS15_MCS12(chain), 2974 1.13.2.2 jdolecek SM(R92C_TXAGC_MCS12, power[24]) | 2975 1.13.2.2 jdolecek SM(R92C_TXAGC_MCS13, power[25]) | 2976 1.13.2.2 jdolecek SM(R92C_TXAGC_MCS14, power[26]) | 2977 1.13.2.2 jdolecek SM(R92C_TXAGC_MCS15, power[27])); 2978 1.13.2.2 jdolecek } 2979 1.13.2.2 jdolecek 2980 1.13.2.2 jdolecek static void 2981 1.13.2.2 jdolecek rtwn_get_txpower(struct rtwn_softc *sc, int chain, 2982 1.13.2.2 jdolecek struct ieee80211_channel *c, struct ieee80211_channel *extc, 2983 1.13.2.2 jdolecek uint16_t power[RTWN_RIDX_COUNT]) 2984 1.13.2.2 jdolecek { 2985 1.13.2.2 jdolecek struct ieee80211com *ic = &sc->sc_ic; 2986 1.13.2.2 jdolecek struct r92c_rom *rom = &sc->rom; 2987 1.13.2.2 jdolecek uint16_t cckpow, ofdmpow, htpow, diff, maxpwr; 2988 1.13.2.2 jdolecek const struct rtwn_txpwr *base; 2989 1.13.2.2 jdolecek int ridx, chan, group; 2990 1.13.2.2 jdolecek 2991 1.13.2.2 jdolecek DPRINTFN(3, ("%s: %s\n", device_xname(sc->sc_dev), __func__)); 2992 1.13.2.2 jdolecek 2993 1.13.2.2 jdolecek /* Determine channel group. */ 2994 1.13.2.2 jdolecek chan = ieee80211_chan2ieee(ic, c); /* XXX center freq! */ 2995 1.13.2.2 jdolecek if (chan <= 3) 2996 1.13.2.2 jdolecek group = 0; 2997 1.13.2.2 jdolecek else if (chan <= 9) 2998 1.13.2.2 jdolecek group = 1; 2999 1.13.2.2 jdolecek else 3000 1.13.2.2 jdolecek group = 2; 3001 1.13.2.2 jdolecek 3002 1.13.2.2 jdolecek /* Get original Tx power based on board type and RF chain. */ 3003 1.13.2.2 jdolecek if (!(sc->chip & RTWN_CHIP_92C)) { 3004 1.13.2.2 jdolecek if (sc->board_type == R92C_BOARD_TYPE_HIGHPA) 3005 1.13.2.2 jdolecek base = &rtl8188ru_txagc[chain]; 3006 1.13.2.2 jdolecek else 3007 1.13.2.2 jdolecek base = &rtl8192cu_txagc[chain]; 3008 1.13.2.2 jdolecek } else 3009 1.13.2.2 jdolecek base = &rtl8192cu_txagc[chain]; 3010 1.13.2.2 jdolecek 3011 1.13.2.2 jdolecek memset(power, 0, RTWN_RIDX_COUNT * sizeof(power[0])); 3012 1.13.2.2 jdolecek if (sc->regulatory == 0) { 3013 1.13.2.2 jdolecek for (ridx = 0; ridx <= 3; ridx++) 3014 1.13.2.2 jdolecek power[ridx] = base->pwr[0][ridx]; 3015 1.13.2.2 jdolecek } 3016 1.13.2.2 jdolecek for (ridx = 4; ridx < RTWN_RIDX_COUNT; ridx++) { 3017 1.13.2.2 jdolecek if (sc->regulatory == 3) { 3018 1.13.2.2 jdolecek power[ridx] = base->pwr[0][ridx]; 3019 1.13.2.2 jdolecek /* Apply vendor limits. */ 3020 1.13.2.2 jdolecek if (extc != NULL) 3021 1.13.2.2 jdolecek maxpwr = rom->ht40_max_pwr[group]; 3022 1.13.2.2 jdolecek else 3023 1.13.2.2 jdolecek maxpwr = rom->ht20_max_pwr[group]; 3024 1.13.2.2 jdolecek maxpwr = (maxpwr >> (chain * 4)) & 0xf; 3025 1.13.2.2 jdolecek if (power[ridx] > maxpwr) 3026 1.13.2.2 jdolecek power[ridx] = maxpwr; 3027 1.13.2.2 jdolecek } else if (sc->regulatory == 1) { 3028 1.13.2.2 jdolecek if (extc == NULL) 3029 1.13.2.2 jdolecek power[ridx] = base->pwr[group][ridx]; 3030 1.13.2.2 jdolecek } else if (sc->regulatory != 2) 3031 1.13.2.2 jdolecek power[ridx] = base->pwr[0][ridx]; 3032 1.13.2.2 jdolecek } 3033 1.13.2.2 jdolecek 3034 1.13.2.2 jdolecek /* Compute per-CCK rate Tx power. */ 3035 1.13.2.2 jdolecek cckpow = rom->cck_tx_pwr[chain][group]; 3036 1.13.2.2 jdolecek for (ridx = 0; ridx <= 3; ridx++) { 3037 1.13.2.2 jdolecek power[ridx] += cckpow; 3038 1.13.2.2 jdolecek if (power[ridx] > R92C_MAX_TX_PWR) 3039 1.13.2.2 jdolecek power[ridx] = R92C_MAX_TX_PWR; 3040 1.13.2.2 jdolecek } 3041 1.13.2.2 jdolecek 3042 1.13.2.2 jdolecek htpow = rom->ht40_1s_tx_pwr[chain][group]; 3043 1.13.2.2 jdolecek if (sc->ntxchains > 1) { 3044 1.13.2.2 jdolecek /* Apply reduction for 2 spatial streams. */ 3045 1.13.2.2 jdolecek diff = rom->ht40_2s_tx_pwr_diff[group]; 3046 1.13.2.2 jdolecek diff = (diff >> (chain * 4)) & 0xf; 3047 1.13.2.2 jdolecek htpow = (htpow > diff) ? htpow - diff : 0; 3048 1.13.2.2 jdolecek } 3049 1.13.2.2 jdolecek 3050 1.13.2.2 jdolecek /* Compute per-OFDM rate Tx power. */ 3051 1.13.2.2 jdolecek diff = rom->ofdm_tx_pwr_diff[group]; 3052 1.13.2.2 jdolecek diff = (diff >> (chain * 4)) & 0xf; 3053 1.13.2.2 jdolecek ofdmpow = htpow + diff; /* HT->OFDM correction. */ 3054 1.13.2.2 jdolecek for (ridx = 4; ridx <= 11; ridx++) { 3055 1.13.2.2 jdolecek power[ridx] += ofdmpow; 3056 1.13.2.2 jdolecek if (power[ridx] > R92C_MAX_TX_PWR) 3057 1.13.2.2 jdolecek power[ridx] = R92C_MAX_TX_PWR; 3058 1.13.2.2 jdolecek } 3059 1.13.2.2 jdolecek 3060 1.13.2.2 jdolecek /* Compute per-MCS Tx power. */ 3061 1.13.2.2 jdolecek if (extc == NULL) { 3062 1.13.2.2 jdolecek diff = rom->ht20_tx_pwr_diff[group]; 3063 1.13.2.2 jdolecek diff = (diff >> (chain * 4)) & 0xf; 3064 1.13.2.2 jdolecek htpow += diff; /* HT40->HT20 correction. */ 3065 1.13.2.2 jdolecek } 3066 1.13.2.2 jdolecek for (ridx = 12; ridx <= 27; ridx++) { 3067 1.13.2.2 jdolecek power[ridx] += htpow; 3068 1.13.2.2 jdolecek if (power[ridx] > R92C_MAX_TX_PWR) 3069 1.13.2.2 jdolecek power[ridx] = R92C_MAX_TX_PWR; 3070 1.13.2.2 jdolecek } 3071 1.13.2.2 jdolecek #ifdef RTWN_DEBUG 3072 1.13.2.2 jdolecek if (rtwn_debug >= 4) { 3073 1.13.2.2 jdolecek /* Dump per-rate Tx power values. */ 3074 1.13.2.2 jdolecek printf("Tx power for chain %d:\n", chain); 3075 1.13.2.2 jdolecek for (ridx = 0; ridx < RTWN_RIDX_COUNT; ridx++) 3076 1.13.2.2 jdolecek printf("Rate %d = %u\n", ridx, power[ridx]); 3077 1.13.2.2 jdolecek } 3078 1.13.2.2 jdolecek #endif 3079 1.13.2.2 jdolecek } 3080 1.13.2.2 jdolecek 3081 1.13.2.2 jdolecek static void 3082 1.13.2.2 jdolecek rtwn_set_txpower(struct rtwn_softc *sc, struct ieee80211_channel *c, 3083 1.13.2.2 jdolecek struct ieee80211_channel *extc) 3084 1.13.2.2 jdolecek { 3085 1.13.2.2 jdolecek uint16_t power[RTWN_RIDX_COUNT]; 3086 1.13.2.2 jdolecek int i; 3087 1.13.2.2 jdolecek 3088 1.13.2.2 jdolecek DPRINTFN(3, ("%s: %s\n", device_xname(sc->sc_dev), __func__)); 3089 1.13.2.2 jdolecek 3090 1.13.2.2 jdolecek for (i = 0; i < sc->ntxchains; i++) { 3091 1.13.2.2 jdolecek /* Compute per-rate Tx power values. */ 3092 1.13.2.2 jdolecek rtwn_get_txpower(sc, i, c, extc, power); 3093 1.13.2.2 jdolecek /* Write per-rate Tx power values to hardware. */ 3094 1.13.2.2 jdolecek rtwn_write_txpower(sc, i, power); 3095 1.13.2.2 jdolecek } 3096 1.13.2.2 jdolecek } 3097 1.13.2.2 jdolecek 3098 1.13.2.2 jdolecek static void 3099 1.13.2.2 jdolecek rtwn_set_chan(struct rtwn_softc *sc, struct ieee80211_channel *c, 3100 1.13.2.2 jdolecek struct ieee80211_channel *extc) 3101 1.13.2.2 jdolecek { 3102 1.13.2.2 jdolecek struct ieee80211com *ic = &sc->sc_ic; 3103 1.13.2.2 jdolecek u_int chan; 3104 1.13.2.2 jdolecek int i; 3105 1.13.2.2 jdolecek 3106 1.13.2.2 jdolecek DPRINTFN(3, ("%s: %s\n", device_xname(sc->sc_dev), __func__)); 3107 1.13.2.2 jdolecek 3108 1.13.2.2 jdolecek chan = ieee80211_chan2ieee(ic, c); /* XXX center freq! */ 3109 1.13.2.2 jdolecek 3110 1.13.2.2 jdolecek /* Set Tx power for this new channel. */ 3111 1.13.2.2 jdolecek rtwn_set_txpower(sc, c, extc); 3112 1.13.2.2 jdolecek 3113 1.13.2.2 jdolecek for (i = 0; i < sc->nrxchains; i++) { 3114 1.13.2.2 jdolecek rtwn_rf_write(sc, i, R92C_RF_CHNLBW, 3115 1.13.2.2 jdolecek RW(sc->rf_chnlbw[i], R92C_RF_CHNLBW_CHNL, chan)); 3116 1.13.2.2 jdolecek } 3117 1.13.2.2 jdolecek #ifndef IEEE80211_NO_HT 3118 1.13.2.2 jdolecek if (extc != NULL) { 3119 1.13.2.2 jdolecek uint32_t reg; 3120 1.13.2.2 jdolecek 3121 1.13.2.2 jdolecek /* Is secondary channel below or above primary? */ 3122 1.13.2.2 jdolecek int prichlo = c->ic_freq < extc->ic_freq; 3123 1.13.2.2 jdolecek 3124 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_BWOPMODE, 3125 1.13.2.2 jdolecek rtwn_read_1(sc, R92C_BWOPMODE) & ~R92C_BWOPMODE_20MHZ); 3126 1.13.2.2 jdolecek 3127 1.13.2.2 jdolecek reg = rtwn_read_1(sc, R92C_RRSR + 2); 3128 1.13.2.2 jdolecek reg = (reg & ~0x6f) | (prichlo ? 1 : 2) << 5; 3129 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_RRSR + 2, reg); 3130 1.13.2.2 jdolecek 3131 1.13.2.2 jdolecek rtwn_bb_write(sc, R92C_FPGA0_RFMOD, 3132 1.13.2.2 jdolecek rtwn_bb_read(sc, R92C_FPGA0_RFMOD) | R92C_RFMOD_40MHZ); 3133 1.13.2.2 jdolecek rtwn_bb_write(sc, R92C_FPGA1_RFMOD, 3134 1.13.2.2 jdolecek rtwn_bb_read(sc, R92C_FPGA1_RFMOD) | R92C_RFMOD_40MHZ); 3135 1.13.2.2 jdolecek 3136 1.13.2.2 jdolecek /* Set CCK side band. */ 3137 1.13.2.2 jdolecek reg = rtwn_bb_read(sc, R92C_CCK0_SYSTEM); 3138 1.13.2.2 jdolecek reg = (reg & ~0x00000010) | (prichlo ? 0 : 1) << 4; 3139 1.13.2.2 jdolecek rtwn_bb_write(sc, R92C_CCK0_SYSTEM, reg); 3140 1.13.2.2 jdolecek 3141 1.13.2.2 jdolecek reg = rtwn_bb_read(sc, R92C_OFDM1_LSTF); 3142 1.13.2.2 jdolecek reg = (reg & ~0x00000c00) | (prichlo ? 1 : 2) << 10; 3143 1.13.2.2 jdolecek rtwn_bb_write(sc, R92C_OFDM1_LSTF, reg); 3144 1.13.2.2 jdolecek 3145 1.13.2.2 jdolecek rtwn_bb_write(sc, R92C_FPGA0_ANAPARAM2, 3146 1.13.2.2 jdolecek rtwn_bb_read(sc, R92C_FPGA0_ANAPARAM2) & 3147 1.13.2.2 jdolecek ~R92C_FPGA0_ANAPARAM2_CBW20); 3148 1.13.2.2 jdolecek 3149 1.13.2.2 jdolecek reg = rtwn_bb_read(sc, 0x818); 3150 1.13.2.2 jdolecek reg = (reg & ~0x0c000000) | (prichlo ? 2 : 1) << 26; 3151 1.13.2.2 jdolecek rtwn_bb_write(sc, 0x818, reg); 3152 1.13.2.2 jdolecek 3153 1.13.2.2 jdolecek /* Select 40MHz bandwidth. */ 3154 1.13.2.2 jdolecek rtwn_rf_write(sc, 0, R92C_RF_CHNLBW, 3155 1.13.2.2 jdolecek (sc->rf_chnlbw[0] & ~0xfff) | chan); 3156 1.13.2.2 jdolecek } else 3157 1.13.2.2 jdolecek #endif 3158 1.13.2.2 jdolecek { 3159 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_BWOPMODE, 3160 1.13.2.2 jdolecek rtwn_read_1(sc, R92C_BWOPMODE) | R92C_BWOPMODE_20MHZ); 3161 1.13.2.2 jdolecek 3162 1.13.2.2 jdolecek rtwn_bb_write(sc, R92C_FPGA0_RFMOD, 3163 1.13.2.2 jdolecek rtwn_bb_read(sc, R92C_FPGA0_RFMOD) & ~R92C_RFMOD_40MHZ); 3164 1.13.2.2 jdolecek rtwn_bb_write(sc, R92C_FPGA1_RFMOD, 3165 1.13.2.2 jdolecek rtwn_bb_read(sc, R92C_FPGA1_RFMOD) & ~R92C_RFMOD_40MHZ); 3166 1.13.2.2 jdolecek 3167 1.13.2.2 jdolecek rtwn_bb_write(sc, R92C_FPGA0_ANAPARAM2, 3168 1.13.2.2 jdolecek rtwn_bb_read(sc, R92C_FPGA0_ANAPARAM2) | 3169 1.13.2.2 jdolecek R92C_FPGA0_ANAPARAM2_CBW20); 3170 1.13.2.2 jdolecek 3171 1.13.2.2 jdolecek /* Select 20MHz bandwidth. */ 3172 1.13.2.2 jdolecek rtwn_rf_write(sc, 0, R92C_RF_CHNLBW, 3173 1.13.2.2 jdolecek (sc->rf_chnlbw[0] & ~0xfff) | R92C_RF_CHNLBW_BW20 | chan); 3174 1.13.2.2 jdolecek } 3175 1.13.2.2 jdolecek } 3176 1.13.2.2 jdolecek 3177 1.13.2.2 jdolecek static void 3178 1.13.2.2 jdolecek rtwn_iq_calib(struct rtwn_softc *sc) 3179 1.13.2.2 jdolecek { 3180 1.13.2.2 jdolecek 3181 1.13.2.2 jdolecek DPRINTFN(3, ("%s: %s\n", device_xname(sc->sc_dev), __func__)); 3182 1.13.2.2 jdolecek 3183 1.13.2.2 jdolecek /* XXX */ 3184 1.13.2.2 jdolecek } 3185 1.13.2.2 jdolecek 3186 1.13.2.2 jdolecek static void 3187 1.13.2.2 jdolecek rtwn_lc_calib(struct rtwn_softc *sc) 3188 1.13.2.2 jdolecek { 3189 1.13.2.2 jdolecek uint32_t rf_ac[2]; 3190 1.13.2.2 jdolecek uint8_t txmode; 3191 1.13.2.2 jdolecek int i; 3192 1.13.2.2 jdolecek 3193 1.13.2.2 jdolecek DPRINTFN(3, ("%s: %s\n", device_xname(sc->sc_dev), __func__)); 3194 1.13.2.2 jdolecek 3195 1.13.2.2 jdolecek txmode = rtwn_read_1(sc, R92C_OFDM1_LSTF + 3); 3196 1.13.2.2 jdolecek if ((txmode & 0x70) != 0) { 3197 1.13.2.2 jdolecek /* Disable all continuous Tx. */ 3198 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_OFDM1_LSTF + 3, txmode & ~0x70); 3199 1.13.2.2 jdolecek 3200 1.13.2.2 jdolecek /* Set RF mode to standby mode. */ 3201 1.13.2.2 jdolecek for (i = 0; i < sc->nrxchains; i++) { 3202 1.13.2.2 jdolecek rf_ac[i] = rtwn_rf_read(sc, i, R92C_RF_AC); 3203 1.13.2.2 jdolecek rtwn_rf_write(sc, i, R92C_RF_AC, 3204 1.13.2.2 jdolecek RW(rf_ac[i], R92C_RF_AC_MODE, 3205 1.13.2.2 jdolecek R92C_RF_AC_MODE_STANDBY)); 3206 1.13.2.2 jdolecek } 3207 1.13.2.2 jdolecek } else { 3208 1.13.2.2 jdolecek /* Block all Tx queues. */ 3209 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_TXPAUSE, 0xff); 3210 1.13.2.2 jdolecek } 3211 1.13.2.2 jdolecek /* Start calibration. */ 3212 1.13.2.2 jdolecek rtwn_rf_write(sc, 0, R92C_RF_CHNLBW, 3213 1.13.2.2 jdolecek rtwn_rf_read(sc, 0, R92C_RF_CHNLBW) | R92C_RF_CHNLBW_LCSTART); 3214 1.13.2.2 jdolecek 3215 1.13.2.2 jdolecek /* Give calibration the time to complete. */ 3216 1.13.2.2 jdolecek DELAY(100); 3217 1.13.2.2 jdolecek 3218 1.13.2.2 jdolecek /* Restore configuration. */ 3219 1.13.2.2 jdolecek if ((txmode & 0x70) != 0) { 3220 1.13.2.2 jdolecek /* Restore Tx mode. */ 3221 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_OFDM1_LSTF + 3, txmode); 3222 1.13.2.2 jdolecek /* Restore RF mode. */ 3223 1.13.2.2 jdolecek for (i = 0; i < sc->nrxchains; i++) 3224 1.13.2.2 jdolecek rtwn_rf_write(sc, i, R92C_RF_AC, rf_ac[i]); 3225 1.13.2.2 jdolecek } else { 3226 1.13.2.2 jdolecek /* Unblock all Tx queues. */ 3227 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_TXPAUSE, 0x00); 3228 1.13.2.2 jdolecek } 3229 1.13.2.2 jdolecek } 3230 1.13.2.2 jdolecek 3231 1.13.2.2 jdolecek static void 3232 1.13.2.2 jdolecek rtwn_temp_calib(struct rtwn_softc *sc) 3233 1.13.2.2 jdolecek { 3234 1.13.2.2 jdolecek int temp; 3235 1.13.2.2 jdolecek 3236 1.13.2.2 jdolecek DPRINTFN(3, ("%s: %s\n", device_xname(sc->sc_dev), __func__)); 3237 1.13.2.2 jdolecek 3238 1.13.2.2 jdolecek if (sc->thcal_state == 0) { 3239 1.13.2.2 jdolecek /* Start measuring temperature. */ 3240 1.13.2.2 jdolecek rtwn_rf_write(sc, 0, R92C_RF_T_METER, 0x60); 3241 1.13.2.2 jdolecek sc->thcal_state = 1; 3242 1.13.2.2 jdolecek return; 3243 1.13.2.2 jdolecek } 3244 1.13.2.2 jdolecek sc->thcal_state = 0; 3245 1.13.2.2 jdolecek 3246 1.13.2.2 jdolecek /* Read measured temperature. */ 3247 1.13.2.2 jdolecek temp = rtwn_rf_read(sc, 0, R92C_RF_T_METER) & 0x1f; 3248 1.13.2.2 jdolecek if (temp == 0) /* Read failed, skip. */ 3249 1.13.2.2 jdolecek return; 3250 1.13.2.2 jdolecek DPRINTFN(2, ("temperature=%d\n", temp)); 3251 1.13.2.2 jdolecek 3252 1.13.2.2 jdolecek /* 3253 1.13.2.2 jdolecek * Redo IQ and LC calibration if temperature changed significantly 3254 1.13.2.2 jdolecek * since last calibration. 3255 1.13.2.2 jdolecek */ 3256 1.13.2.2 jdolecek if (sc->thcal_lctemp == 0) { 3257 1.13.2.2 jdolecek /* First calibration is performed in rtwn_init(). */ 3258 1.13.2.2 jdolecek sc->thcal_lctemp = temp; 3259 1.13.2.2 jdolecek } else if (abs(temp - sc->thcal_lctemp) > 1) { 3260 1.13.2.2 jdolecek DPRINTF(("IQ/LC calib triggered by temp: %d -> %d\n", 3261 1.13.2.2 jdolecek sc->thcal_lctemp, temp)); 3262 1.13.2.2 jdolecek rtwn_iq_calib(sc); 3263 1.13.2.2 jdolecek rtwn_lc_calib(sc); 3264 1.13.2.2 jdolecek /* Record temperature of last calibration. */ 3265 1.13.2.2 jdolecek sc->thcal_lctemp = temp; 3266 1.13.2.2 jdolecek } 3267 1.13.2.2 jdolecek } 3268 1.13.2.2 jdolecek 3269 1.13.2.2 jdolecek static int 3270 1.13.2.2 jdolecek rtwn_init(struct ifnet *ifp) 3271 1.13.2.2 jdolecek { 3272 1.13.2.2 jdolecek struct rtwn_softc *sc = ifp->if_softc; 3273 1.13.2.2 jdolecek struct ieee80211com *ic = &sc->sc_ic; 3274 1.13.2.2 jdolecek uint32_t reg; 3275 1.13.2.2 jdolecek int i, error; 3276 1.13.2.2 jdolecek 3277 1.13.2.2 jdolecek DPRINTFN(3, ("%s: %s\n", device_xname(sc->sc_dev), __func__)); 3278 1.13.2.2 jdolecek 3279 1.13.2.2 jdolecek /* Init firmware commands ring. */ 3280 1.13.2.2 jdolecek sc->fwcur = 0; 3281 1.13.2.2 jdolecek 3282 1.13.2.2 jdolecek /* Power on adapter. */ 3283 1.13.2.2 jdolecek error = rtwn_power_on(sc); 3284 1.13.2.2 jdolecek if (error != 0) { 3285 1.13.2.2 jdolecek aprint_error_dev(sc->sc_dev, "could not power on adapter\n"); 3286 1.13.2.2 jdolecek goto fail; 3287 1.13.2.2 jdolecek } 3288 1.13.2.2 jdolecek 3289 1.13.2.2 jdolecek /* Initialize DMA. */ 3290 1.13.2.2 jdolecek error = rtwn_dma_init(sc); 3291 1.13.2.2 jdolecek if (error != 0) { 3292 1.13.2.2 jdolecek aprint_error_dev(sc->sc_dev, "could not initialize DMA\n"); 3293 1.13.2.2 jdolecek goto fail; 3294 1.13.2.2 jdolecek } 3295 1.13.2.2 jdolecek 3296 1.13.2.2 jdolecek /* Set info size in Rx descriptors (in 64-bit words). */ 3297 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_RX_DRVINFO_SZ, 4); 3298 1.13.2.2 jdolecek 3299 1.13.2.2 jdolecek /* Disable interrupts. */ 3300 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_HISR, 0xffffffff); 3301 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_HIMR, 0x00000000); 3302 1.13.2.2 jdolecek 3303 1.13.2.2 jdolecek /* Set MAC address. */ 3304 1.13.2.2 jdolecek IEEE80211_ADDR_COPY(ic->ic_myaddr, CLLADDR(ifp->if_sadl)); 3305 1.13.2.2 jdolecek for (i = 0; i < IEEE80211_ADDR_LEN; i++) 3306 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_MACID + i, ic->ic_myaddr[i]); 3307 1.13.2.2 jdolecek 3308 1.13.2.2 jdolecek /* Set initial network type. */ 3309 1.13.2.2 jdolecek rtwn_set_nettype0_msr(sc, rtwn_get_nettype(sc)); 3310 1.13.2.2 jdolecek 3311 1.13.2.2 jdolecek rtwn_rxfilter_init(sc); 3312 1.13.2.2 jdolecek 3313 1.13.2.2 jdolecek reg = rtwn_read_4(sc, R92C_RRSR); 3314 1.13.2.2 jdolecek reg = RW(reg, R92C_RRSR_RATE_BITMAP, R92C_RRSR_RATE_ALL); 3315 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_RRSR, reg); 3316 1.13.2.2 jdolecek 3317 1.13.2.2 jdolecek /* Set short/long retry limits. */ 3318 1.13.2.2 jdolecek rtwn_write_2(sc, R92C_RL, 3319 1.13.2.2 jdolecek SM(R92C_RL_SRL, 0x07) | SM(R92C_RL_LRL, 0x07)); 3320 1.13.2.2 jdolecek 3321 1.13.2.2 jdolecek /* Initialize EDCA parameters. */ 3322 1.13.2.2 jdolecek rtwn_edca_init(sc); 3323 1.13.2.2 jdolecek 3324 1.13.2.2 jdolecek /* Set data and response automatic rate fallback retry counts. */ 3325 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_DARFRC + 0, 0x01000000); 3326 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_DARFRC + 4, 0x07060504); 3327 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_RARFRC + 0, 0x01000000); 3328 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_RARFRC + 4, 0x07060504); 3329 1.13.2.2 jdolecek 3330 1.13.2.2 jdolecek rtwn_write_2(sc, R92C_FWHW_TXQ_CTRL, 0x1f80); 3331 1.13.2.2 jdolecek 3332 1.13.2.2 jdolecek /* Set ACK timeout. */ 3333 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_ACKTO, 0x40); 3334 1.13.2.2 jdolecek 3335 1.13.2.2 jdolecek /* Initialize beacon parameters. */ 3336 1.13.2.2 jdolecek rtwn_write_2(sc, R92C_TBTT_PROHIBIT, 0x6404); 3337 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_DRVERLYINT, 0x05); 3338 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_BCNDMATIM, 0x02); 3339 1.13.2.2 jdolecek rtwn_write_2(sc, R92C_BCNTCFG, 0x660f); 3340 1.13.2.2 jdolecek 3341 1.13.2.2 jdolecek /* Setup AMPDU aggregation. */ 3342 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_AGGLEN_LMT, 0x99997631); /* MCS7~0 */ 3343 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_AGGR_BREAK_TIME, 0x16); 3344 1.13.2.2 jdolecek 3345 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_BCN_MAX_ERR, 0xff); 3346 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_BCN_CTRL, R92C_BCN_CTRL_DIS_TSF_UDT0); 3347 1.13.2.2 jdolecek 3348 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_PIFS, 0x1c); 3349 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_MCUTST_1, 0x0); 3350 1.13.2.2 jdolecek 3351 1.13.2.2 jdolecek /* Load 8051 microcode. */ 3352 1.13.2.2 jdolecek error = rtwn_load_firmware(sc); 3353 1.13.2.2 jdolecek if (error != 0) 3354 1.13.2.2 jdolecek goto fail; 3355 1.13.2.2 jdolecek 3356 1.13.2.2 jdolecek /* Initialize MAC/BB/RF blocks. */ 3357 1.13.2.2 jdolecek rtwn_mac_init(sc); 3358 1.13.2.2 jdolecek rtwn_bb_init(sc); 3359 1.13.2.2 jdolecek rtwn_rf_init(sc); 3360 1.13.2.2 jdolecek 3361 1.13.2.2 jdolecek /* Turn CCK and OFDM blocks on. */ 3362 1.13.2.2 jdolecek reg = rtwn_bb_read(sc, R92C_FPGA0_RFMOD); 3363 1.13.2.2 jdolecek reg |= R92C_RFMOD_CCK_EN; 3364 1.13.2.2 jdolecek rtwn_bb_write(sc, R92C_FPGA0_RFMOD, reg); 3365 1.13.2.2 jdolecek reg = rtwn_bb_read(sc, R92C_FPGA0_RFMOD); 3366 1.13.2.2 jdolecek reg |= R92C_RFMOD_OFDM_EN; 3367 1.13.2.2 jdolecek rtwn_bb_write(sc, R92C_FPGA0_RFMOD, reg); 3368 1.13.2.2 jdolecek 3369 1.13.2.2 jdolecek /* Clear per-station keys table. */ 3370 1.13.2.2 jdolecek rtwn_cam_init(sc); 3371 1.13.2.2 jdolecek 3372 1.13.2.2 jdolecek /* Enable hardware sequence numbering. */ 3373 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_HWSEQ_CTRL, 0xff); 3374 1.13.2.2 jdolecek 3375 1.13.2.2 jdolecek /* Perform LO and IQ calibrations. */ 3376 1.13.2.2 jdolecek rtwn_iq_calib(sc); 3377 1.13.2.2 jdolecek /* Perform LC calibration. */ 3378 1.13.2.2 jdolecek rtwn_lc_calib(sc); 3379 1.13.2.2 jdolecek 3380 1.13.2.2 jdolecek rtwn_pa_bias_init(sc); 3381 1.13.2.2 jdolecek 3382 1.13.2.2 jdolecek /* Initialize GPIO setting. */ 3383 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_GPIO_MUXCFG, 3384 1.13.2.2 jdolecek rtwn_read_1(sc, R92C_GPIO_MUXCFG) & ~R92C_GPIO_MUXCFG_ENBT); 3385 1.13.2.2 jdolecek 3386 1.13.2.2 jdolecek /* Fix for lower temperature. */ 3387 1.13.2.2 jdolecek rtwn_write_1(sc, 0x15, 0xe9); 3388 1.13.2.2 jdolecek 3389 1.13.2.2 jdolecek /* Set default channel. */ 3390 1.13.2.2 jdolecek rtwn_set_chan(sc, ic->ic_curchan, NULL); 3391 1.13.2.2 jdolecek 3392 1.13.2.2 jdolecek /* Clear pending interrupts. */ 3393 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_HISR, 0xffffffff); 3394 1.13.2.2 jdolecek 3395 1.13.2.2 jdolecek /* Enable interrupts. */ 3396 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_HIMR, RTWN_INT_ENABLE); 3397 1.13.2.2 jdolecek 3398 1.13.2.2 jdolecek /* We're ready to go. */ 3399 1.13.2.2 jdolecek ifp->if_flags &= ~IFF_OACTIVE; 3400 1.13.2.2 jdolecek ifp->if_flags |= IFF_RUNNING; 3401 1.13.2.2 jdolecek 3402 1.13.2.2 jdolecek if (ic->ic_opmode == IEEE80211_M_MONITOR) 3403 1.13.2.2 jdolecek ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 3404 1.13.2.2 jdolecek else 3405 1.13.2.2 jdolecek ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 3406 1.13.2.2 jdolecek 3407 1.13.2.2 jdolecek return 0; 3408 1.13.2.2 jdolecek 3409 1.13.2.2 jdolecek fail: 3410 1.13.2.2 jdolecek rtwn_stop(ifp, 1); 3411 1.13.2.2 jdolecek return error; 3412 1.13.2.2 jdolecek } 3413 1.13.2.2 jdolecek 3414 1.13.2.2 jdolecek static void 3415 1.13.2.2 jdolecek rtwn_init_task(void *arg) 3416 1.13.2.2 jdolecek { 3417 1.13.2.2 jdolecek struct rtwn_softc *sc = arg; 3418 1.13.2.2 jdolecek struct ifnet *ifp = GET_IFP(sc); 3419 1.13.2.2 jdolecek int s; 3420 1.13.2.2 jdolecek 3421 1.13.2.2 jdolecek DPRINTFN(3, ("%s: %s\n", device_xname(sc->sc_dev), __func__)); 3422 1.13.2.2 jdolecek 3423 1.13.2.2 jdolecek s = splnet(); 3424 1.13.2.2 jdolecek 3425 1.13.2.2 jdolecek rtwn_stop(ifp, 0); 3426 1.13.2.2 jdolecek 3427 1.13.2.2 jdolecek if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == IFF_UP) 3428 1.13.2.2 jdolecek rtwn_init(ifp); 3429 1.13.2.2 jdolecek 3430 1.13.2.2 jdolecek splx(s); 3431 1.13.2.2 jdolecek } 3432 1.13.2.2 jdolecek 3433 1.13.2.2 jdolecek static void 3434 1.13.2.2 jdolecek rtwn_stop(struct ifnet *ifp, int disable) 3435 1.13.2.2 jdolecek { 3436 1.13.2.2 jdolecek struct rtwn_softc *sc = ifp->if_softc; 3437 1.13.2.2 jdolecek struct ieee80211com *ic = &sc->sc_ic; 3438 1.13.2.2 jdolecek uint16_t reg; 3439 1.13.2.2 jdolecek int s, i; 3440 1.13.2.2 jdolecek 3441 1.13.2.2 jdolecek DPRINTFN(3, ("%s: %s\n", device_xname(sc->sc_dev), __func__)); 3442 1.13.2.2 jdolecek 3443 1.13.2.2 jdolecek sc->sc_tx_timer = 0; 3444 1.13.2.2 jdolecek ifp->if_timer = 0; 3445 1.13.2.2 jdolecek ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 3446 1.13.2.2 jdolecek 3447 1.13.2.2 jdolecek callout_stop(&sc->scan_to); 3448 1.13.2.2 jdolecek callout_stop(&sc->calib_to); 3449 1.13.2.2 jdolecek 3450 1.13.2.2 jdolecek s = splnet(); 3451 1.13.2.2 jdolecek 3452 1.13.2.2 jdolecek ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 3453 1.13.2.2 jdolecek 3454 1.13.2.2 jdolecek /* Disable interrupts. */ 3455 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_HIMR, 0x00000000); 3456 1.13.2.2 jdolecek 3457 1.13.2.2 jdolecek /* Pause MAC TX queue */ 3458 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_TXPAUSE, 0xff); 3459 1.13.2.2 jdolecek 3460 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_RF_CTRL, 0x00); 3461 1.13.2.2 jdolecek 3462 1.13.2.2 jdolecek /* Reset BB state machine */ 3463 1.13.2.2 jdolecek reg = rtwn_read_1(sc, R92C_SYS_FUNC_EN); 3464 1.13.2.2 jdolecek reg |= R92C_SYS_FUNC_EN_BB_GLB_RST; 3465 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_SYS_FUNC_EN, reg); 3466 1.13.2.2 jdolecek reg &= ~R92C_SYS_FUNC_EN_BB_GLB_RST; 3467 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_SYS_FUNC_EN, reg); 3468 1.13.2.2 jdolecek 3469 1.13.2.2 jdolecek reg = rtwn_read_2(sc, R92C_CR); 3470 1.13.2.2 jdolecek reg &= ~(R92C_CR_HCI_TXDMA_EN | R92C_CR_HCI_RXDMA_EN | 3471 1.13.2.2 jdolecek R92C_CR_TXDMA_EN | R92C_CR_RXDMA_EN | R92C_CR_PROTOCOL_EN | 3472 1.13.2.2 jdolecek R92C_CR_SCHEDULE_EN | R92C_CR_MACTXEN | R92C_CR_MACRXEN | 3473 1.13.2.2 jdolecek R92C_CR_ENSEC); 3474 1.13.2.2 jdolecek rtwn_write_2(sc, R92C_CR, reg); 3475 1.13.2.2 jdolecek 3476 1.13.2.2 jdolecek if (rtwn_read_1(sc, R92C_MCUFWDL) & R92C_MCUFWDL_RAM_DL_SEL) 3477 1.13.2.2 jdolecek rtwn_fw_reset(sc); 3478 1.13.2.2 jdolecek 3479 1.13.2.2 jdolecek /* Reset MAC and Enable 8051 */ 3480 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_SYS_FUNC_EN + 1, 0x54); 3481 1.13.2.2 jdolecek 3482 1.13.2.2 jdolecek /* TODO: linux does additional btcoex stuff here */ 3483 1.13.2.2 jdolecek 3484 1.13.2.2 jdolecek /* Disable AFE PLL */ 3485 1.13.2.2 jdolecek rtwn_write_2(sc, R92C_AFE_PLL_CTRL, 0x80); /* linux magic number */ 3486 1.13.2.2 jdolecek /* Enter PFM mode */ 3487 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_SPS0_CTRL, 0x23); /* ditto */ 3488 1.13.2.2 jdolecek /* Gated AFE DIG_CLOCK */ 3489 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_AFE_XTAL_CTRL, 0x0e); /* different with btcoex */ 3490 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_RSV_CTRL, 0x0e); 3491 1.13.2.2 jdolecek rtwn_write_1(sc, R92C_APS_FSMCO, R92C_APS_FSMCO_PDN_EN); 3492 1.13.2.2 jdolecek 3493 1.13.2.2 jdolecek for (i = 0; i < RTWN_NTXQUEUES; i++) 3494 1.13.2.2 jdolecek rtwn_reset_tx_list(sc, i); 3495 1.13.2.2 jdolecek rtwn_reset_rx_list(sc); 3496 1.13.2.2 jdolecek 3497 1.13.2.2 jdolecek splx(s); 3498 1.13.2.2 jdolecek } 3499 1.13.2.2 jdolecek 3500 1.13.2.2 jdolecek static int 3501 1.13.2.2 jdolecek rtwn_intr(void *xsc) 3502 1.13.2.2 jdolecek { 3503 1.13.2.2 jdolecek struct rtwn_softc *sc = xsc; 3504 1.13.2.2 jdolecek uint32_t status; 3505 1.13.2.2 jdolecek 3506 1.13.2.2 jdolecek if (!ISSET(sc->sc_flags, RTWN_FLAG_FW_LOADED)) 3507 1.13.2.2 jdolecek return 0; 3508 1.13.2.2 jdolecek 3509 1.13.2.2 jdolecek status = rtwn_read_4(sc, R92C_HISR); 3510 1.13.2.2 jdolecek if (status == 0 || status == 0xffffffff) 3511 1.13.2.2 jdolecek return 0; 3512 1.13.2.2 jdolecek 3513 1.13.2.2 jdolecek /* Disable interrupts. */ 3514 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_HIMR, 0x00000000); 3515 1.13.2.2 jdolecek 3516 1.13.2.2 jdolecek softint_schedule(sc->sc_soft_ih); 3517 1.13.2.2 jdolecek return 1; 3518 1.13.2.2 jdolecek } 3519 1.13.2.2 jdolecek 3520 1.13.2.2 jdolecek static void 3521 1.13.2.2 jdolecek rtwn_softintr(void *xsc) 3522 1.13.2.2 jdolecek { 3523 1.13.2.2 jdolecek struct rtwn_softc *sc = xsc; 3524 1.13.2.2 jdolecek uint32_t status; 3525 1.13.2.2 jdolecek int i, s; 3526 1.13.2.2 jdolecek 3527 1.13.2.2 jdolecek if (!ISSET(sc->sc_flags, RTWN_FLAG_FW_LOADED)) 3528 1.13.2.2 jdolecek return; 3529 1.13.2.2 jdolecek 3530 1.13.2.2 jdolecek status = rtwn_read_4(sc, R92C_HISR); 3531 1.13.2.2 jdolecek if (status == 0 || status == 0xffffffff) 3532 1.13.2.2 jdolecek goto out; 3533 1.13.2.2 jdolecek 3534 1.13.2.2 jdolecek /* Ack interrupts. */ 3535 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_HISR, status); 3536 1.13.2.2 jdolecek 3537 1.13.2.2 jdolecek /* Vendor driver treats RX errors like ROK... */ 3538 1.13.2.2 jdolecek if (status & RTWN_INT_ENABLE_RX) { 3539 1.13.2.2 jdolecek for (i = 0; i < RTWN_RX_LIST_COUNT; i++) { 3540 1.13.2.2 jdolecek struct r92c_rx_desc *rx_desc = &sc->rx_ring.desc[i]; 3541 1.13.2.2 jdolecek struct rtwn_rx_data *rx_data = &sc->rx_ring.rx_data[i]; 3542 1.13.2.2 jdolecek 3543 1.13.2.2 jdolecek if (le32toh(rx_desc->rxdw0) & R92C_RXDW0_OWN) 3544 1.13.2.2 jdolecek continue; 3545 1.13.2.2 jdolecek 3546 1.13.2.2 jdolecek rtwn_rx_frame(sc, rx_desc, rx_data, i); 3547 1.13.2.2 jdolecek } 3548 1.13.2.2 jdolecek } 3549 1.13.2.2 jdolecek 3550 1.13.2.2 jdolecek if (status & R92C_IMR_BDOK) 3551 1.13.2.2 jdolecek rtwn_tx_done(sc, RTWN_BEACON_QUEUE); 3552 1.13.2.2 jdolecek if (status & R92C_IMR_HIGHDOK) 3553 1.13.2.2 jdolecek rtwn_tx_done(sc, RTWN_HIGH_QUEUE); 3554 1.13.2.2 jdolecek if (status & R92C_IMR_MGNTDOK) 3555 1.13.2.2 jdolecek rtwn_tx_done(sc, RTWN_MGNT_QUEUE); 3556 1.13.2.2 jdolecek if (status & R92C_IMR_BKDOK) 3557 1.13.2.2 jdolecek rtwn_tx_done(sc, RTWN_BK_QUEUE); 3558 1.13.2.2 jdolecek if (status & R92C_IMR_BEDOK) 3559 1.13.2.2 jdolecek rtwn_tx_done(sc, RTWN_BE_QUEUE); 3560 1.13.2.2 jdolecek if (status & R92C_IMR_VIDOK) 3561 1.13.2.2 jdolecek rtwn_tx_done(sc, RTWN_VI_QUEUE); 3562 1.13.2.2 jdolecek if (status & R92C_IMR_VODOK) 3563 1.13.2.2 jdolecek rtwn_tx_done(sc, RTWN_VO_QUEUE); 3564 1.13.2.2 jdolecek if ((status & RTWN_INT_ENABLE_TX) && sc->qfullmsk == 0) { 3565 1.13.2.2 jdolecek struct ifnet *ifp = GET_IFP(sc); 3566 1.13.2.2 jdolecek s = splnet(); 3567 1.13.2.2 jdolecek ifp->if_flags &= ~IFF_OACTIVE; 3568 1.13.2.2 jdolecek rtwn_start(ifp); 3569 1.13.2.2 jdolecek splx(s); 3570 1.13.2.2 jdolecek } 3571 1.13.2.2 jdolecek 3572 1.13.2.2 jdolecek out: 3573 1.13.2.2 jdolecek /* Enable interrupts. */ 3574 1.13.2.2 jdolecek rtwn_write_4(sc, R92C_HIMR, RTWN_INT_ENABLE); 3575 1.13.2.2 jdolecek } 3576
Indexes created Thu Oct 02 01:09:59 GMT 2025