if_sf_pci.c revision 1.1.2.4
1 1.1.2.4 nathanw /* $NetBSD: if_sf_pci.c,v 1.1.2.4 2001/11/14 19:15:17 nathanw Exp $ */ 2 1.1.2.2 nathanw 3 1.1.2.2 nathanw /*- 4 1.1.2.2 nathanw * Copyright (c) 2001 The NetBSD Foundation, Inc. 5 1.1.2.2 nathanw * All rights reserved. 6 1.1.2.2 nathanw * 7 1.1.2.2 nathanw * This code is derived from software contributed to The NetBSD Foundation 8 1.1.2.2 nathanw * by Jason R. Thorpe. 9 1.1.2.2 nathanw * 10 1.1.2.2 nathanw * Redistribution and use in source and binary forms, with or without 11 1.1.2.2 nathanw * modification, are permitted provided that the following conditions 12 1.1.2.2 nathanw * are met: 13 1.1.2.2 nathanw * 1. Redistributions of source code must retain the above copyright 14 1.1.2.2 nathanw * notice, this list of conditions and the following disclaimer. 15 1.1.2.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright 16 1.1.2.2 nathanw * notice, this list of conditions and the following disclaimer in the 17 1.1.2.2 nathanw * documentation and/or other materials provided with the distribution. 18 1.1.2.2 nathanw * 3. All advertising materials mentioning features or use of this software 19 1.1.2.2 nathanw * must display the following acknowledgement: 20 1.1.2.2 nathanw * This product includes software developed by the NetBSD 21 1.1.2.2 nathanw * Foundation, Inc. and its contributors. 22 1.1.2.2 nathanw * 4. Neither the name of The NetBSD Foundation nor the names of its 23 1.1.2.2 nathanw * contributors may be used to endorse or promote products derived 24 1.1.2.2 nathanw * from this software without specific prior written permission. 25 1.1.2.2 nathanw * 26 1.1.2.2 nathanw * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 1.1.2.2 nathanw * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 1.1.2.2 nathanw * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 1.1.2.2 nathanw * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 1.1.2.2 nathanw * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 1.1.2.2 nathanw * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 1.1.2.2 nathanw * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 1.1.2.2 nathanw * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 1.1.2.2 nathanw * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 1.1.2.2 nathanw * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 1.1.2.2 nathanw * POSSIBILITY OF SUCH DAMAGE. 37 1.1.2.2 nathanw */ 38 1.1.2.2 nathanw 39 1.1.2.2 nathanw /* 40 1.1.2.2 nathanw * PCI bus front-end for the Adaptec AIC-6915 (``Starfire'') 41 1.1.2.2 nathanw * 10/100 Ethernet controller. 42 1.1.2.2 nathanw */ 43 1.1.2.2 nathanw 44 1.1.2.4 nathanw #include <sys/cdefs.h> 45 1.1.2.4 nathanw __KERNEL_RCSID(0, "$NetBSD: if_sf_pci.c,v 1.1.2.4 2001/11/14 19:15:17 nathanw Exp $"); 46 1.1.2.4 nathanw 47 1.1.2.2 nathanw #include <sys/param.h> 48 1.1.2.2 nathanw #include <sys/systm.h> 49 1.1.2.2 nathanw #include <sys/mbuf.h> 50 1.1.2.2 nathanw #include <sys/malloc.h> 51 1.1.2.2 nathanw #include <sys/kernel.h> 52 1.1.2.2 nathanw #include <sys/socket.h> 53 1.1.2.2 nathanw #include <sys/ioctl.h> 54 1.1.2.2 nathanw #include <sys/errno.h> 55 1.1.2.2 nathanw #include <sys/device.h> 56 1.1.2.2 nathanw 57 1.1.2.2 nathanw #include <net/if.h> 58 1.1.2.2 nathanw #include <net/if_dl.h> 59 1.1.2.2 nathanw #include <net/if_media.h> 60 1.1.2.2 nathanw #include <net/if_ether.h> 61 1.1.2.2 nathanw 62 1.1.2.2 nathanw #include <machine/bus.h> 63 1.1.2.2 nathanw #include <machine/intr.h> 64 1.1.2.2 nathanw 65 1.1.2.2 nathanw #include <dev/mii/miivar.h> 66 1.1.2.2 nathanw 67 1.1.2.2 nathanw #include <dev/ic/aic6915reg.h> 68 1.1.2.2 nathanw #include <dev/ic/aic6915var.h> 69 1.1.2.2 nathanw 70 1.1.2.2 nathanw #include <dev/pci/pcireg.h> 71 1.1.2.2 nathanw #include <dev/pci/pcivar.h> 72 1.1.2.2 nathanw #include <dev/pci/pcidevs.h> 73 1.1.2.2 nathanw 74 1.1.2.2 nathanw struct sf_pci_softc { 75 1.1.2.2 nathanw struct sf_softc sc_starfire; /* read Starfire softc */ 76 1.1.2.2 nathanw 77 1.1.2.2 nathanw /* PCI-specific goo. */ 78 1.1.2.2 nathanw void *sc_ih; /* interrupt handle */ 79 1.1.2.2 nathanw }; 80 1.1.2.2 nathanw 81 1.1.2.2 nathanw int sf_pci_match(struct device *, struct cfdata *, void *); 82 1.1.2.2 nathanw void sf_pci_attach(struct device *, struct device *, void *); 83 1.1.2.2 nathanw 84 1.1.2.2 nathanw struct cfattach sf_pci_ca = { 85 1.1.2.2 nathanw sizeof(struct sf_pci_softc), sf_pci_match, sf_pci_attach, 86 1.1.2.2 nathanw }; 87 1.1.2.2 nathanw 88 1.1.2.2 nathanw struct sf_pci_product { 89 1.1.2.2 nathanw uint32_t spp_vendor; /* PCI vendor ID */ 90 1.1.2.2 nathanw uint32_t spp_product; /* PCI product ID */ 91 1.1.2.2 nathanw const char *spp_name; /* product name */ 92 1.1.2.2 nathanw const struct sf_pci_product *spp_subsys; /* subsystm IDs */ 93 1.1.2.2 nathanw }; 94 1.1.2.2 nathanw 95 1.1.2.2 nathanw const struct sf_pci_product sf_subsys_adaptec[] = { 96 1.1.2.2 nathanw /* ANA-62011 (rev 0) Single port 10/100 64-bit */ 97 1.1.2.2 nathanw { PCI_VENDOR_ADP, 0x0008, 98 1.1.2.2 nathanw "ANA-62011 (rev 0) 10/100 Ethernet", NULL }, 99 1.1.2.2 nathanw 100 1.1.2.2 nathanw /* ANA-62011 (rev 1) Single port 10/100 64-bit */ 101 1.1.2.2 nathanw { PCI_VENDOR_ADP, 0x0009, 102 1.1.2.2 nathanw "ANA-62011 (rev 1) 10/100 Ethernet", NULL }, 103 1.1.2.2 nathanw 104 1.1.2.2 nathanw /* ANA-62022 Dual port 10/100 64-bit */ 105 1.1.2.2 nathanw { PCI_VENDOR_ADP, 0x0010, 106 1.1.2.2 nathanw "ANA-62022 10/100 Ethernet", NULL }, 107 1.1.2.2 nathanw 108 1.1.2.2 nathanw /* ANA-62044 (rev 0) Quad port 10/100 64-bit */ 109 1.1.2.2 nathanw { PCI_VENDOR_ADP, 0x0018, 110 1.1.2.2 nathanw "ANA-62044 (rev 0) 10/100 Ethernet", NULL }, 111 1.1.2.2 nathanw 112 1.1.2.2 nathanw /* ANA-62044 (rev 1) Quad port 10/100 64-bit */ 113 1.1.2.2 nathanw { PCI_VENDOR_ADP, 0x0019, 114 1.1.2.2 nathanw "ANA-62044 (rev 1) 10/100 Ethernet", NULL }, 115 1.1.2.2 nathanw 116 1.1.2.2 nathanw /* ANA-62020 Single port 100baseFX 64-bit */ 117 1.1.2.2 nathanw { PCI_VENDOR_ADP, 0x0020, 118 1.1.2.2 nathanw "ANA-62020 100baseFX Ethernet", NULL }, 119 1.1.2.2 nathanw 120 1.1.2.2 nathanw /* ANA-69011 Single port 10/100 32-bit */ 121 1.1.2.2 nathanw { PCI_VENDOR_ADP, 0x0028, 122 1.1.2.2 nathanw "ANA-69011 10/100 Ethernet", NULL }, 123 1.1.2.2 nathanw 124 1.1.2.2 nathanw { 0, 0, 125 1.1.2.2 nathanw NULL, NULL }, 126 1.1.2.2 nathanw }; 127 1.1.2.2 nathanw 128 1.1.2.2 nathanw const struct sf_pci_product sf_pci_products[] = { 129 1.1.2.2 nathanw { PCI_VENDOR_ADP, PCI_PRODUCT_ADP_AIC6915, 130 1.1.2.2 nathanw "AIC-6915 10/100 Ethernet", sf_subsys_adaptec }, 131 1.1.2.2 nathanw 132 1.1.2.2 nathanw { 0, 0, 133 1.1.2.2 nathanw NULL, NULL }, 134 1.1.2.2 nathanw }; 135 1.1.2.2 nathanw 136 1.1.2.2 nathanw static const struct sf_pci_product * 137 1.1.2.2 nathanw sf_pci_lookup(const struct pci_attach_args *pa) 138 1.1.2.2 nathanw { 139 1.1.2.2 nathanw const struct sf_pci_product *spp, *subspp; 140 1.1.2.2 nathanw pcireg_t subsysid; 141 1.1.2.2 nathanw 142 1.1.2.2 nathanw for (spp = sf_pci_products; spp->spp_name != NULL; spp++) { 143 1.1.2.2 nathanw if (PCI_VENDOR(pa->pa_id) == spp->spp_vendor && 144 1.1.2.2 nathanw PCI_PRODUCT(pa->pa_id) == spp->spp_product) { 145 1.1.2.2 nathanw subsysid = pci_conf_read(pa->pa_pc, pa->pa_tag, 146 1.1.2.2 nathanw PCI_SUBSYS_ID_REG); 147 1.1.2.2 nathanw for (subspp = spp->spp_subsys; 148 1.1.2.2 nathanw subspp->spp_name != NULL; subspp++) { 149 1.1.2.2 nathanw if (PCI_VENDOR(subsysid) == 150 1.1.2.2 nathanw subspp->spp_vendor || 151 1.1.2.2 nathanw PCI_PRODUCT(subsysid) == 152 1.1.2.2 nathanw subspp->spp_product) { 153 1.1.2.2 nathanw return (subspp); 154 1.1.2.2 nathanw } 155 1.1.2.2 nathanw } 156 1.1.2.2 nathanw return (spp); 157 1.1.2.2 nathanw } 158 1.1.2.2 nathanw } 159 1.1.2.2 nathanw 160 1.1.2.2 nathanw return (NULL); 161 1.1.2.2 nathanw } 162 1.1.2.2 nathanw 163 1.1.2.2 nathanw int 164 1.1.2.2 nathanw sf_pci_match(struct device *parent, struct cfdata *match, void *aux) 165 1.1.2.2 nathanw { 166 1.1.2.2 nathanw struct pci_attach_args *pa = aux; 167 1.1.2.2 nathanw 168 1.1.2.2 nathanw if (sf_pci_lookup(pa) != NULL) 169 1.1.2.2 nathanw return (1); 170 1.1.2.2 nathanw 171 1.1.2.2 nathanw return (0); 172 1.1.2.2 nathanw } 173 1.1.2.2 nathanw 174 1.1.2.2 nathanw void 175 1.1.2.2 nathanw sf_pci_attach(struct device *parent, struct device *self, void *aux) 176 1.1.2.2 nathanw { 177 1.1.2.2 nathanw struct sf_pci_softc *psc = (void *) self; 178 1.1.2.2 nathanw struct sf_softc *sc = &psc->sc_starfire; 179 1.1.2.2 nathanw struct pci_attach_args *pa = aux; 180 1.1.2.2 nathanw pci_intr_handle_t ih; 181 1.1.2.2 nathanw const char *intrstr = NULL; 182 1.1.2.2 nathanw const struct sf_pci_product *spp; 183 1.1.2.2 nathanw bus_space_tag_t iot, memt; 184 1.1.2.2 nathanw bus_space_handle_t ioh, memh; 185 1.1.2.2 nathanw pcireg_t reg; 186 1.1.2.2 nathanw int pmreg, ioh_valid, memh_valid; 187 1.1.2.2 nathanw 188 1.1.2.2 nathanw spp = sf_pci_lookup(pa); 189 1.1.2.2 nathanw if (spp == NULL) { 190 1.1.2.2 nathanw printf("\n"); 191 1.1.2.2 nathanw panic("sf_pci_attach: impossible"); 192 1.1.2.2 nathanw } 193 1.1.2.2 nathanw 194 1.1.2.2 nathanw printf(": %s, rev. %d\n", spp->spp_name, PCI_REVISION(pa->pa_class)); 195 1.1.2.2 nathanw 196 1.1.2.2 nathanw if (pci_get_capability(pa->pa_pc, pa->pa_tag, PCI_CAP_PWRMGMT, 197 1.1.2.2 nathanw &pmreg, 0)) { 198 1.1.2.2 nathanw reg = pci_conf_read(pa->pa_pc, pa->pa_tag, pmreg + 4); 199 1.1.2.2 nathanw switch (reg & PCI_PMCSR_STATE_MASK) { 200 1.1.2.2 nathanw case PCI_PMCSR_STATE_D1: 201 1.1.2.2 nathanw case PCI_PMCSR_STATE_D2: 202 1.1.2.2 nathanw printf(": waking up from power state D%d\n%s", 203 1.1.2.2 nathanw reg & PCI_PMCSR_STATE_MASK, sc->sc_dev.dv_xname); 204 1.1.2.2 nathanw pci_conf_write(pa->pa_pc, pa->pa_tag, pmreg + 4, 205 1.1.2.2 nathanw (reg & ~PCI_PMCSR_STATE_MASK) | 206 1.1.2.2 nathanw PCI_PMCSR_STATE_D0); 207 1.1.2.2 nathanw break; 208 1.1.2.2 nathanw 209 1.1.2.2 nathanw case PCI_PMCSR_STATE_D3: 210 1.1.2.2 nathanw printf("%s: unable to wake up from power state D3\n", 211 1.1.2.2 nathanw sc->sc_dev.dv_xname); 212 1.1.2.2 nathanw pci_conf_write(pa->pa_pc, pa->pa_tag, pmreg + 4, 213 1.1.2.2 nathanw (reg & ~PCI_PMCSR_STATE_MASK) | 214 1.1.2.2 nathanw PCI_PMCSR_STATE_D0); 215 1.1.2.2 nathanw return; 216 1.1.2.2 nathanw } 217 1.1.2.2 nathanw } 218 1.1.2.2 nathanw 219 1.1.2.2 nathanw /* 220 1.1.2.2 nathanw * Map the device. 221 1.1.2.2 nathanw */ 222 1.1.2.2 nathanw reg = pci_mapreg_type(pa->pa_pc, pa->pa_tag, SF_PCI_MEMBA); 223 1.1.2.2 nathanw switch (reg) { 224 1.1.2.2 nathanw case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT: 225 1.1.2.2 nathanw case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_64BIT: 226 1.1.2.2 nathanw memh_valid = (pci_mapreg_map(pa, SF_PCI_MEMBA, 227 1.1.2.2 nathanw reg, 0, &memt, &memh, NULL, NULL) == 0); 228 1.1.2.2 nathanw break; 229 1.1.2.2 nathanw default: 230 1.1.2.2 nathanw memh_valid = 0; 231 1.1.2.2 nathanw } 232 1.1.2.2 nathanw 233 1.1.2.2 nathanw ioh_valid = (pci_mapreg_map(pa, 234 1.1.2.2 nathanw (reg == (PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_64BIT)) ? 235 1.1.2.2 nathanw SF_PCI_IOBA : SF_PCI_IOBA - 0x04, 236 1.1.2.2 nathanw PCI_MAPREG_TYPE_IO, 0, 237 1.1.2.2 nathanw &iot, &ioh, NULL, NULL) == 0); 238 1.1.2.2 nathanw 239 1.1.2.2 nathanw if (memh_valid) { 240 1.1.2.2 nathanw sc->sc_st = memt; 241 1.1.2.2 nathanw sc->sc_sh = memh; 242 1.1.2.2 nathanw sc->sc_iomapped = 0; 243 1.1.2.2 nathanw } else if (ioh_valid) { 244 1.1.2.2 nathanw sc->sc_st = iot; 245 1.1.2.2 nathanw sc->sc_sh = ioh; 246 1.1.2.2 nathanw sc->sc_iomapped = 1; 247 1.1.2.2 nathanw } else { 248 1.1.2.2 nathanw printf("%s: unable to map device registers\n", 249 1.1.2.2 nathanw sc->sc_dev.dv_xname); 250 1.1.2.2 nathanw return; 251 1.1.2.2 nathanw } 252 1.1.2.2 nathanw 253 1.1.2.2 nathanw sc->sc_dmat = pa->pa_dmat; 254 1.1.2.2 nathanw 255 1.1.2.2 nathanw /* Make sure bus mastering is enabled. */ 256 1.1.2.2 nathanw pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 257 1.1.2.2 nathanw pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 258 1.1.2.2 nathanw PCI_COMMAND_MASTER_ENABLE); 259 1.1.2.2 nathanw 260 1.1.2.2 nathanw /* 261 1.1.2.2 nathanw * Map and establish our interrupt. 262 1.1.2.2 nathanw */ 263 1.1.2.2 nathanw if (pci_intr_map(pa, &ih)) { 264 1.1.2.2 nathanw printf("%s: unable to map interrupt\n", sc->sc_dev.dv_xname); 265 1.1.2.2 nathanw return; 266 1.1.2.2 nathanw } 267 1.1.2.2 nathanw intrstr = pci_intr_string(pa->pa_pc, ih); 268 1.1.2.2 nathanw psc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_NET, sf_intr, sc); 269 1.1.2.2 nathanw if (psc->sc_ih == NULL) { 270 1.1.2.2 nathanw printf("%s: unable to establish interrupt", 271 1.1.2.2 nathanw sc->sc_dev.dv_xname); 272 1.1.2.2 nathanw if (intrstr != NULL) 273 1.1.2.2 nathanw printf(" at %s", intrstr); 274 1.1.2.2 nathanw printf("\n"); 275 1.1.2.2 nathanw return; 276 1.1.2.2 nathanw } 277 1.1.2.2 nathanw printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); 278 1.1.2.2 nathanw 279 1.1.2.2 nathanw /* 280 1.1.2.2 nathanw * Finish off the attach. 281 1.1.2.2 nathanw */ 282 1.1.2.2 nathanw sf_attach(sc); 283 1.1.2.2 nathanw } 284
Indexes created Thu Oct 02 14:10:14 GMT 2025