if_tl.c revision 1.1 1 1.1 bouyer /* $NetBSD: if_tl.c,v 1.1 1997/10/17 18:38:30 bouyer Exp $ */
2 1.1 bouyer
3 1.1 bouyer /*
4 1.1 bouyer * Copyright (c) 1997 Manuel Bouyer. All rights reserved.
5 1.1 bouyer *
6 1.1 bouyer * Redistribution and use in source and binary forms, with or without
7 1.1 bouyer * modification, are permitted provided that the following conditions
8 1.1 bouyer * are met:
9 1.1 bouyer * 1. Redistributions of source code must retain the above copyright
10 1.1 bouyer * notice, this list of conditions and the following disclaimer.
11 1.1 bouyer * 2. Redistributions in binary form must reproduce the above copyright
12 1.1 bouyer * notice, this list of conditions and the following disclaimer in the
13 1.1 bouyer * documentation and/or other materials provided with the distribution.
14 1.1 bouyer * 3. All advertising materials mentioning features or use of this software
15 1.1 bouyer * must display the following acknowledgement:
16 1.1 bouyer * This product includes software developed by Manuel Bouyer.
17 1.1 bouyer * 4. The name of the author may not be used to endorse or promote products
18 1.1 bouyer * derived from this software without specific prior written permission.
19 1.1 bouyer *
20 1.1 bouyer * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
21 1.1 bouyer * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22 1.1 bouyer * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23 1.1 bouyer * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24 1.1 bouyer * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25 1.1 bouyer * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
26 1.1 bouyer * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
27 1.1 bouyer * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28 1.1 bouyer * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29 1.1 bouyer * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 1.1 bouyer */
31 1.1 bouyer
32 1.1 bouyer /*
33 1.1 bouyer * Texas Instruments ThunderLand ethernet controller
34 1.1 bouyer * ThunderLAN Programmer's Guide (TI Literature Number SPWU013A)
35 1.1 bouyer * available from www.ti.com
36 1.1 bouyer */
37 1.1 bouyer
38 1.1 bouyer #undef TLDEBUG
39 1.1 bouyer #define TL_PRIV_STATS
40 1.1 bouyer #undef TLDEBUG_RX
41 1.1 bouyer #undef TLDEBUG_TX
42 1.1 bouyer #undef TLDEBUG_ADDR
43 1.1 bouyer
44 1.1 bouyer #include <sys/param.h>
45 1.1 bouyer #include <sys/systm.h>
46 1.1 bouyer #include <sys/mbuf.h>
47 1.1 bouyer #include <sys/protosw.h>
48 1.1 bouyer #include <sys/socket.h>
49 1.1 bouyer #include <sys/ioctl.h>
50 1.1 bouyer #include <sys/errno.h>
51 1.1 bouyer #include <sys/malloc.h>
52 1.1 bouyer #include <sys/kernel.h>
53 1.1 bouyer #include <sys/proc.h> /* only for declaration of wakeup() used by vm.h */
54 1.1 bouyer #include <sys/device.h>
55 1.1 bouyer
56 1.1 bouyer #include <net/if.h>
57 1.1 bouyer #if defined(SIOCSIFMEDIA)
58 1.1 bouyer #include <net/if_media.h>
59 1.1 bouyer #endif
60 1.1 bouyer #include <net/if_types.h>
61 1.1 bouyer #include <net/if_dl.h>
62 1.1 bouyer #include <net/route.h>
63 1.1 bouyer #include <net/netisr.h>
64 1.1 bouyer
65 1.1 bouyer #include "bpfilter.h"
66 1.1 bouyer #if NBPFILTER > 0
67 1.1 bouyer #include <net/bpf.h>
68 1.1 bouyer #include <net/bpfdesc.h>
69 1.1 bouyer #endif
70 1.1 bouyer
71 1.1 bouyer #ifdef INET
72 1.1 bouyer #include <netinet/in.h>
73 1.1 bouyer #include <netinet/in_systm.h>
74 1.1 bouyer #include <netinet/in_var.h>
75 1.1 bouyer #include <netinet/ip.h>
76 1.1 bouyer #endif
77 1.1 bouyer
78 1.1 bouyer #ifdef NS
79 1.1 bouyer #include <netns/ns.h>
80 1.1 bouyer #include <netns/ns_if.h>
81 1.1 bouyer #endif
82 1.1 bouyer
83 1.1 bouyer #include <vm/vm.h>
84 1.1 bouyer #include <vm/vm_param.h>
85 1.1 bouyer #include <vm/vm_kern.h>
86 1.1 bouyer
87 1.1 bouyer #if defined(__NetBSD__)
88 1.1 bouyer #include <net/if_ether.h>
89 1.1 bouyer #if defined(INET)
90 1.1 bouyer #include <netinet/if_inarp.h>
91 1.1 bouyer #endif
92 1.1 bouyer #include <machine/bus.h>
93 1.1 bouyer #if defined(__alpha__)
94 1.1 bouyer #include <machine/intr.h>
95 1.1 bouyer #endif
96 1.1 bouyer #include <dev/pci/pcireg.h>
97 1.1 bouyer #include <dev/pci/pcivar.h>
98 1.1 bouyer #include <dev/pci/pcidevs.h>
99 1.1 bouyer #include <dev/i2c/i2c_bus.h>
100 1.1 bouyer #include <dev/i2c/i2c_eeprom.h>
101 1.1 bouyer #include <dev/mii/mii_adapter.h>
102 1.1 bouyer #include <dev/mii/mii_adapters_id.h>
103 1.1 bouyer #include <dev/pci/if_tlregs.h>
104 1.1 bouyer #endif /* __NetBSD__ */
105 1.1 bouyer
106 1.1 bouyer /* number of transmit/receive buffers */
107 1.1 bouyer #ifndef TL_NBUF
108 1.1 bouyer #define TL_NBUF 10
109 1.1 bouyer #endif
110 1.1 bouyer
111 1.1 bouyer /* number of seconds the link can be idle */
112 1.1 bouyer #ifndef TL_IDLETIME
113 1.1 bouyer #define TL_IDLETIME 10
114 1.1 bouyer #endif
115 1.1 bouyer
116 1.1 bouyer struct tl_softc {
117 1.1 bouyer struct device sc_dev; /* base device */
118 1.1 bouyer bus_space_tag_t tl_bustag;
119 1.1 bouyer bus_space_handle_t tl_bushandle; /* CSR region handle */
120 1.1 bouyer pci_chipset_tag_t tl_pc;
121 1.1 bouyer void* tl_ih;
122 1.1 bouyer struct ethercom tl_ec;
123 1.1 bouyer u_int8_t tl_enaddr[ETHER_ADDR_LEN]; /* hardware adress */
124 1.1 bouyer struct ifmedia tl_ifmedia;
125 1.1 bouyer u_int16_t tl_flags;
126 1.1 bouyer #define TL_IFACT 0x0001 /* chip has interface activity */
127 1.1 bouyer u_int8_t tl_lasttx; /* we were without input this many seconds */
128 1.1 bouyer i2c_adapter_t i2cbus; /* i2c bus, for eeprom */
129 1.1 bouyer mii_data_t mii; /* mii bus */
130 1.1 bouyer struct Rx_list *Rx_list; /* Receive and transmit lists */
131 1.1 bouyer struct Tx_list *Tx_list;
132 1.1 bouyer struct Rx_list *active_Rx, *last_Rx;
133 1.1 bouyer struct Tx_list *active_Tx, *last_Tx;
134 1.1 bouyer struct Tx_list *Free_Tx;
135 1.1 bouyer int opkt; /* used to detect link up/down for AUI/BNC */
136 1.1 bouyer int stats_exesscoll; /* idem */
137 1.1 bouyer #ifdef TL_PRIV_STATS
138 1.1 bouyer int ierr_overr;
139 1.1 bouyer int ierr_code;
140 1.1 bouyer int ierr_crc;
141 1.1 bouyer int ierr_nomem;
142 1.1 bouyer int oerr_underr;
143 1.1 bouyer int oerr_deffered;
144 1.1 bouyer int oerr_coll;
145 1.1 bouyer int oerr_multicoll;
146 1.1 bouyer int oerr_latecoll;
147 1.1 bouyer int oerr_exesscoll;
148 1.1 bouyer int oerr_carrloss;
149 1.1 bouyer int oerr_mcopy;
150 1.1 bouyer #endif
151 1.1 bouyer };
152 1.1 bouyer #define tl_if tl_ec.ec_if
153 1.1 bouyer #define tl_bpf tl_if.if_bpf
154 1.1 bouyer
155 1.1 bouyer typedef struct tl_softc tl_softc_t;
156 1.1 bouyer typedef u_long ioctl_cmd_t;
157 1.1 bouyer
158 1.1 bouyer #define PCI_VENDORID(x) ((x) & 0xFFFF)
159 1.1 bouyer #define PCI_CHIPID(x) (((x) >> 16) & 0xFFFF)
160 1.1 bouyer #define PCI_CONF_READ(r) pci_conf_read(pa->pa_pc, pa->pa_tag, (r))
161 1.1 bouyer #define PCI_CONF_WRITE(r, v) pci_conf_write(pa->pa_pc, pa->pa_tag, (r), (v))
162 1.1 bouyer
163 1.1 bouyer #define TL_HR_READ(sc, reg) \
164 1.1 bouyer bus_space_read_4(sc->tl_bustag, sc->tl_bushandle, (reg))
165 1.1 bouyer #define TL_HR_READ_BYTE(sc, reg) \
166 1.1 bouyer bus_space_read_1(sc->tl_bustag, sc->tl_bushandle, (reg))
167 1.1 bouyer #define TL_HR_WRITE(sc, reg, data) \
168 1.1 bouyer bus_space_write_4(sc->tl_bustag, sc->tl_bushandle, (reg), (data))
169 1.1 bouyer #define TL_HR_WRITE_BYTE(sc, reg, data) \
170 1.1 bouyer bus_space_write_1(sc->tl_bustag, sc->tl_bushandle, (reg), (data))
171 1.1 bouyer #define ETHER_MIN_TX (ETHERMIN + sizeof(struct ether_header))
172 1.1 bouyer
173 1.1 bouyer static int tl_pci_probe __P((struct device *, void *, void *));
174 1.1 bouyer static void tl_pci_attach __P((struct device *, struct device *, void *));
175 1.1 bouyer static int tl_intr __P((void *));
176 1.1 bouyer
177 1.1 bouyer static int tl_ifioctl __P((struct ifnet *, ioctl_cmd_t, caddr_t));
178 1.1 bouyer static int tl_mediachange __P((struct ifnet *));
179 1.1 bouyer static void tl_mediastatus __P((struct ifnet *, struct ifmediareq *));
180 1.1 bouyer static void tl_ifwatchdog __P((struct ifnet *));
181 1.1 bouyer static void tl_shutdown __P((void*));
182 1.1 bouyer
183 1.1 bouyer static void tl_ifstart __P((struct ifnet *));
184 1.1 bouyer static void tl_reset __P((tl_softc_t*));
185 1.1 bouyer static int tl_init __P((tl_softc_t*));
186 1.1 bouyer static void tl_restart __P((void *));
187 1.1 bouyer static int tl_add_RxBuff __P((struct Rx_list*, struct mbuf*));
188 1.1 bouyer static void tl_read_stats __P((tl_softc_t*));
189 1.1 bouyer static void tl_ticks __P((void*));
190 1.1 bouyer static int tl_multicast_hash __P((u_int8_t*));
191 1.1 bouyer static void tl_addr_filter __P((tl_softc_t*));
192 1.1 bouyer
193 1.1 bouyer static u_int32_t tl_intreg_read __P((tl_softc_t*, u_int32_t));
194 1.1 bouyer static void tl_intreg_write __P((tl_softc_t*, u_int32_t, u_int32_t));
195 1.1 bouyer static u_int8_t tl_intreg_read_byte __P((tl_softc_t*, u_int32_t));
196 1.1 bouyer static void tl_intreg_write_byte __P((tl_softc_t*, u_int32_t, u_int8_t));
197 1.1 bouyer
198 1.1 bouyer
199 1.1 bouyer #if defined(TLDEBUG_RX)
200 1.1 bouyer static void ether_printheader __P((struct ether_header*));
201 1.1 bouyer #endif
202 1.1 bouyer
203 1.1 bouyer void tl_mii_set __P((void*, u_int8_t));
204 1.1 bouyer void tl_mii_clr __P((void*, u_int8_t));
205 1.1 bouyer int tl_mii_read __P((void*, u_int8_t));
206 1.1 bouyer
207 1.1 bouyer void tl_i2c_set __P((void*, u_int8_t));
208 1.1 bouyer void tl_i2c_clr __P((void*, u_int8_t));
209 1.1 bouyer int tl_i2c_read __P((void*, u_int8_t));
210 1.1 bouyer
211 1.1 bouyer static __inline void netsio_clr __P((tl_softc_t*, u_int8_t));
212 1.1 bouyer static __inline void netsio_set __P((tl_softc_t*, u_int8_t));
213 1.1 bouyer static __inline u_int8_t netsio_read __P((tl_softc_t*, u_int8_t));
214 1.1 bouyer static __inline void netsio_clr(sc, bits)
215 1.1 bouyer tl_softc_t* sc;
216 1.1 bouyer u_int8_t bits;
217 1.1 bouyer {
218 1.1 bouyer tl_intreg_write_byte(sc, TL_INT_NET + TL_INT_NetSio,
219 1.1 bouyer tl_intreg_read_byte(sc, TL_INT_NET + TL_INT_NetSio) & (~bits));
220 1.1 bouyer }
221 1.1 bouyer static __inline void netsio_set(sc, bits)
222 1.1 bouyer tl_softc_t* sc;
223 1.1 bouyer u_int8_t bits;
224 1.1 bouyer {
225 1.1 bouyer tl_intreg_write_byte(sc, TL_INT_NET + TL_INT_NetSio,
226 1.1 bouyer tl_intreg_read_byte(sc, TL_INT_NET + TL_INT_NetSio) | bits);
227 1.1 bouyer }
228 1.1 bouyer static __inline u_int8_t netsio_read(sc, bits)
229 1.1 bouyer tl_softc_t* sc;
230 1.1 bouyer u_int8_t bits;
231 1.1 bouyer {
232 1.1 bouyer return (tl_intreg_read_byte(sc, TL_INT_NET + TL_INT_NetSio) & bits);
233 1.1 bouyer }
234 1.1 bouyer
235 1.1 bouyer struct cfattach tl_ca = {
236 1.1 bouyer sizeof(tl_softc_t), tl_pci_probe, tl_pci_attach
237 1.1 bouyer };
238 1.1 bouyer
239 1.1 bouyer struct cfdriver tl_cd = {
240 1.1 bouyer 0, "tl", DV_IFNET
241 1.1 bouyer };
242 1.1 bouyer
243 1.1 bouyer static char *nullbuf;
244 1.1 bouyer
245 1.1 bouyer static int
246 1.1 bouyer tl_pci_probe(parent, match, aux)
247 1.1 bouyer struct device *parent;
248 1.1 bouyer void *match;
249 1.1 bouyer void *aux;
250 1.1 bouyer {
251 1.1 bouyer struct pci_attach_args *pa = (struct pci_attach_args *) aux;
252 1.1 bouyer
253 1.1 bouyer if (PCI_VENDORID(pa->pa_id) != PCI_VENDOR_COMPAQ)
254 1.1 bouyer return 0;
255 1.1 bouyer switch(PCI_CHIPID(pa->pa_id)) {
256 1.1 bouyer case PCI_PRODUCT_COMPAQ_N100TX:
257 1.1 bouyer case PCI_PRODUCT_COMPAQ_N10T:
258 1.1 bouyer case PCI_PRODUCT_COMPAQ_IntNF3P:
259 1.1 bouyer case PCI_PRODUCT_COMPAQ_IntPL100TX:
260 1.1 bouyer case PCI_PRODUCT_COMPAQ_DPNet100TX:
261 1.1 bouyer case PCI_PRODUCT_COMPAQ_DP4000:
262 1.1 bouyer case PCI_PRODUCT_COMPAQ_NF3P_BNC:
263 1.1 bouyer case PCI_PRODUCT_COMPAQ_NF3P:
264 1.1 bouyer return 1;
265 1.1 bouyer default:
266 1.1 bouyer return 0;
267 1.1 bouyer }
268 1.1 bouyer }
269 1.1 bouyer
270 1.1 bouyer static void
271 1.1 bouyer tl_pci_attach(parent, self, aux)
272 1.1 bouyer struct device * parent;
273 1.1 bouyer struct device * self;
274 1.1 bouyer void * aux;
275 1.1 bouyer {
276 1.1 bouyer tl_softc_t *sc = (tl_softc_t *)self;
277 1.1 bouyer struct pci_attach_args * const pa = (struct pci_attach_args *) aux;
278 1.1 bouyer /* int unit = sc->tl_dev.dv_unit; */
279 1.1 bouyer struct ifnet * const ifp = &sc->tl_if;
280 1.1 bouyer u_int32_t cfcs = PCI_CONF_READ(PCI_CFCS);
281 1.1 bouyer bus_space_tag_t iot, memt;
282 1.1 bouyer bus_space_handle_t ioh, memh;
283 1.1 bouyer pci_intr_handle_t intrhandle;
284 1.1 bouyer const char *model, *intrstr;
285 1.1 bouyer int i, tmp;
286 1.1 bouyer
287 1.1 bouyer sc->tl_pc = pa->pa_pc;
288 1.1 bouyer cfcs &= ~(PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE);
289 1.1 bouyer
290 1.1 bouyer /* Map and enable the card */
291 1.1 bouyer #if defined(PCI_PREFER_IOSPACE)
292 1.1 bouyer if (!pci_mapreg_map(pa, PCI_CBIO, PCI_MAPREG_TYPE_IO, 0,
293 1.1 bouyer &iot, &ioh, NULL, NULL)) {
294 1.1 bouyer cfcs |= PCI_COMMAND_IO_ENABLE;
295 1.1 bouyer } else if (!pci_mapreg_map(pa, PCI_CBMA,
296 1.1 bouyer PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT,
297 1.1 bouyer 0, &memt, &memh, NULL, NULL) == 0) {
298 1.1 bouyer cfcs |= PCI_COMMAND_MEM_ENABLE;
299 1.1 bouyer } else {
300 1.1 bouyer printf("can't map IO nor MEM space\n");
301 1.1 bouyer return;
302 1.1 bouyer }
303 1.1 bouyer if (cfcs & PCI_COMMAND_IO_ENABLE) {
304 1.1 bouyer sc->tl_bustag = iot, sc->tl_bushandle = ioh;
305 1.1 bouyer } else {
306 1.1 bouyer sc->tl_bustag = memt, sc->tl_bushandle = memh;
307 1.1 bouyer }
308 1.1 bouyer #else
309 1.1 bouyer if (!pci_mapreg_map(pa, PCI_CBMA,
310 1.1 bouyer PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT,
311 1.1 bouyer 0, &memt, &memh, NULL, NULL) == 0) {
312 1.1 bouyer cfcs |= PCI_COMMAND_MEM_ENABLE;
313 1.1 bouyer } else if (!pci_mapreg_map(pa, PCI_CBIO, PCI_MAPREG_TYPE_IO, 0,
314 1.1 bouyer &iot, &ioh, NULL, NULL)) {
315 1.1 bouyer cfcs |= PCI_COMMAND_IO_ENABLE;
316 1.1 bouyer } else {
317 1.1 bouyer printf("can't map MEM nor IO space\n");
318 1.1 bouyer return;
319 1.1 bouyer }
320 1.1 bouyer if (cfcs & PCI_COMMAND_MEM_ENABLE) {
321 1.1 bouyer sc->tl_bustag = memt; sc->tl_bushandle = memh;
322 1.1 bouyer } else {
323 1.1 bouyer sc->tl_bustag = iot; sc->tl_bushandle = ioh;
324 1.1 bouyer }
325 1.1 bouyer #endif
326 1.1 bouyer
327 1.1 bouyer cfcs |= PCI_COMMAND_MASTER_ENABLE;
328 1.1 bouyer PCI_CONF_WRITE(PCI_CFCS, cfcs);
329 1.1 bouyer
330 1.1 bouyer switch(PCI_CHIPID(pa->pa_id)) {
331 1.1 bouyer case PCI_PRODUCT_COMPAQ_N100TX:
332 1.1 bouyer model = "Compaq Netelligent 10/100 TX";
333 1.1 bouyer sc->mii.adapter_id = COMPAQ_NETLIGENT_10_100;
334 1.1 bouyer break;
335 1.1 bouyer case PCI_PRODUCT_COMPAQ_N10T:
336 1.1 bouyer model = "Compaq Netelligent 10 T";
337 1.1 bouyer sc->mii.adapter_id = COMPAQ_NETLIGENT_10;
338 1.1 bouyer break;
339 1.1 bouyer case PCI_PRODUCT_COMPAQ_IntNF3P:
340 1.1 bouyer model = "Compaq Integrated NetFlex 3/P";
341 1.1 bouyer sc->mii.adapter_id = COMPAQ_INT_NETFLEX;
342 1.1 bouyer break;
343 1.1 bouyer case PCI_PRODUCT_COMPAQ_IntPL100TX:
344 1.1 bouyer model = "Compaq ProLiant Integrated Netelligent 10/100 TX";
345 1.1 bouyer sc->mii.adapter_id = COMPAQ_INT_NETLIGENT_10_100;
346 1.1 bouyer break;
347 1.1 bouyer case PCI_PRODUCT_COMPAQ_DPNet100TX:
348 1.1 bouyer model = "Compaq Dual Port Netelligent 10/100 TX";
349 1.1 bouyer sc->mii.adapter_id = COMPAQ_DUAL_NETLIGENT_10_100;
350 1.1 bouyer break;
351 1.1 bouyer case PCI_PRODUCT_COMPAQ_DP4000:
352 1.1 bouyer model = "Compaq Deskpro 4000 5233MMX";
353 1.1 bouyer sc->mii.adapter_id = COMPAQ_DSKP4000;
354 1.1 bouyer break;
355 1.1 bouyer case PCI_PRODUCT_COMPAQ_NF3P_BNC:
356 1.1 bouyer model = "Compaq NetFlex 3/P w/ BNC";
357 1.1 bouyer sc->mii.adapter_id = COMPAQ_NETFLEX_BNC;
358 1.1 bouyer break;
359 1.1 bouyer case PCI_PRODUCT_COMPAQ_NF3P:
360 1.1 bouyer model = "Compaq NetFlex 3/P";
361 1.1 bouyer sc->mii.adapter_id = COMPAQ_NETFLEX;
362 1.1 bouyer break;
363 1.1 bouyer default:
364 1.1 bouyer model = "unknown Thunderland board!\n";
365 1.1 bouyer }
366 1.1 bouyer printf(": %s\n%s: ",model, sc->sc_dev.dv_xname);
367 1.1 bouyer
368 1.1 bouyer /* Map and establish interrupts */
369 1.1 bouyer if (pci_intr_map(pa->pa_pc, pa->pa_intrtag, pa->pa_intrpin,
370 1.1 bouyer pa->pa_intrline, &intrhandle)) {
371 1.1 bouyer printf("couldn't map interrupt\n");
372 1.1 bouyer return;
373 1.1 bouyer }
374 1.1 bouyer intrstr = pci_intr_string(pa->pa_pc, intrhandle);
375 1.1 bouyer sc->tl_ih = pci_intr_establish(pa->pa_pc, intrhandle, IPL_NET,
376 1.1 bouyer tl_intr, sc);
377 1.1 bouyer if (sc->tl_ih == NULL) {
378 1.1 bouyer printf("couldn't map interrupt");
379 1.1 bouyer if (intrstr != NULL)
380 1.1 bouyer printf(" at %s", intrstr);
381 1.1 bouyer printf("\n");
382 1.1 bouyer return;
383 1.1 bouyer }
384 1.1 bouyer printf("interrupting at %s\n", intrstr);
385 1.1 bouyer
386 1.1 bouyer
387 1.1 bouyer tl_reset(sc);
388 1.1 bouyer
389 1.1 bouyer /* fill in the i2c struct */
390 1.1 bouyer sc->i2cbus.adapter_softc = sc;
391 1.1 bouyer sc->i2cbus.set_bit = tl_i2c_set;
392 1.1 bouyer sc->i2cbus.clr_bit = tl_i2c_clr;
393 1.1 bouyer sc->i2cbus.read_bit = tl_i2c_read;
394 1.1 bouyer
395 1.1 bouyer #ifdef TLDEBUG
396 1.1 bouyer printf("default values of INTreg: 0x%x\n",
397 1.1 bouyer tl_intreg_read(sc, TL_INT_Defaults));
398 1.1 bouyer #endif
399 1.1 bouyer
400 1.1 bouyer /* read mac addr */
401 1.1 bouyer for (i=0; i<ETHER_ADDR_LEN; i++) {
402 1.1 bouyer tmp = i2c_eeprom_read(&sc->i2cbus, 0x83 + i);
403 1.1 bouyer if (tmp < 0) {
404 1.1 bouyer printf("%s: error reading MAC adress\n", sc->sc_dev.dv_xname);
405 1.1 bouyer return;
406 1.1 bouyer } else {
407 1.1 bouyer sc->tl_enaddr[i] = tmp;
408 1.1 bouyer }
409 1.1 bouyer }
410 1.1 bouyer printf("%s: address %s\n", sc->sc_dev.dv_xname,
411 1.1 bouyer ether_sprintf(sc->tl_enaddr));
412 1.1 bouyer
413 1.1 bouyer sc->mii.adapter_softc = sc;
414 1.1 bouyer sc->mii.mii_setbit = tl_mii_set;
415 1.1 bouyer sc->mii.mii_clrbit = tl_mii_clr;
416 1.1 bouyer sc->mii.mii_readbit = tl_mii_read;
417 1.1 bouyer sc->mii.mii_readreg = NULL; /* Let generic MII function handle that */
418 1.1 bouyer sc->mii.mii_writereg = NULL;
419 1.1 bouyer if (config_found(self, (void*)&sc->mii, NULL) == NULL) {
420 1.1 bouyer printf("%s: no mii configured\n", sc->sc_dev.dv_xname);
421 1.1 bouyer return;
422 1.1 bouyer }
423 1.1 bouyer
424 1.1 bouyer ifmedia_init(&sc->tl_ifmedia, 0, tl_mediachange, tl_mediastatus);
425 1.1 bouyer mii_media_add(&sc->tl_ifmedia, &sc->mii);
426 1.1 bouyer ifmedia_set(&sc->tl_ifmedia, IFM_ETHER | IFM_NONE);
427 1.1 bouyer
428 1.1 bouyer bcopy(sc->sc_dev.dv_xname, sc->tl_if.if_xname, IFNAMSIZ);
429 1.1 bouyer sc->tl_if.if_softc = sc;
430 1.1 bouyer sc->tl_pc = pa->pa_pc;
431 1.1 bouyer ifp->if_flags = IFF_BROADCAST|IFF_SIMPLEX|IFF_NOTRAILERS|IFF_MULTICAST;
432 1.1 bouyer ifp->if_ioctl = tl_ifioctl;
433 1.1 bouyer ifp->if_start = tl_ifstart;
434 1.1 bouyer ifp->if_watchdog = tl_ifwatchdog;
435 1.1 bouyer ifp->if_timer = 0;
436 1.1 bouyer if_attach(ifp);
437 1.1 bouyer ether_ifattach(&(sc)->tl_if, (sc)->tl_enaddr);
438 1.1 bouyer #if NBPFILTER > 0
439 1.1 bouyer bpfattach(&sc->tl_bpf, &sc->tl_if, DLT_EN10MB,
440 1.1 bouyer sizeof(struct ether_header));
441 1.1 bouyer #endif
442 1.1 bouyer sc->mii.mii_media_active = IFM_NONE;
443 1.1 bouyer /*
444 1.1 bouyer * Add shutdown hook so that DMA is disabled prior to reboot. Not
445 1.1 bouyer * doing do could allow DMA to corrupt kernel memory during the
446 1.1 bouyer * reboot before the driver initializes.
447 1.1 bouyer */
448 1.1 bouyer shutdownhook_establish(tl_shutdown, sc);
449 1.1 bouyer }
450 1.1 bouyer
451 1.1 bouyer static void
452 1.1 bouyer tl_reset(sc)
453 1.1 bouyer tl_softc_t *sc;
454 1.1 bouyer {
455 1.1 bouyer int i;
456 1.1 bouyer
457 1.1 bouyer /* read stats */
458 1.1 bouyer if (sc->tl_if.if_flags & IFF_RUNNING) {
459 1.1 bouyer untimeout(tl_ticks, sc);
460 1.1 bouyer tl_read_stats(sc);
461 1.1 bouyer }
462 1.1 bouyer /* Reset adapter */
463 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_CMD,
464 1.1 bouyer TL_HR_READ(sc, TL_HOST_CMD) | HOST_CMD_Ad_Rst);
465 1.1 bouyer DELAY(100000);
466 1.1 bouyer /* Disable interrupts */
467 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_CMD, HOST_CMD_IntOff);
468 1.1 bouyer /* setup aregs & hash */
469 1.1 bouyer for (i = TL_INT_Areg0; i <= TL_INT_HASH2; i = i + 4)
470 1.1 bouyer tl_intreg_write(sc, i, 0);
471 1.1 bouyer #ifdef TLDEBUG_ADDR
472 1.1 bouyer printf("Areg & hash registers: \n");
473 1.1 bouyer for (i = TL_INT_Areg0; i <= TL_INT_HASH2; i = i + 4)
474 1.1 bouyer printf(" reg %x: %x\n", i, tl_intreg_read(sc, i));
475 1.1 bouyer #endif
476 1.1 bouyer /* Setup NetConfig */
477 1.1 bouyer tl_intreg_write(sc, TL_INT_NetConfig,
478 1.1 bouyer TL_NETCONFIG_1F | TL_NETCONFIG_1chn | TL_NETCONFIG_PHY_EN);
479 1.1 bouyer /* Bsize: accept default */
480 1.1 bouyer /* TX commit in Acommit: accept default */
481 1.1 bouyer /* Load Ld_tmr and Ld_thr */
482 1.1 bouyer /* Ld_tmr = 3 */
483 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_CMD, 0x3 | HOST_CMD_LdTmr);
484 1.1 bouyer /* Ld_thr = 0 */
485 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_CMD, 0x0 | HOST_CMD_LdThr);
486 1.1 bouyer /* Unreset MII */
487 1.1 bouyer netsio_set(sc, TL_NETSIO_NMRST);
488 1.1 bouyer DELAY(100000);
489 1.1 bouyer sc->mii.mii_media_status &= ~IFM_ACTIVE;
490 1.1 bouyer sc->tl_flags = 0;
491 1.1 bouyer sc->opkt = 0;
492 1.1 bouyer sc->stats_exesscoll = 0;
493 1.1 bouyer }
494 1.1 bouyer
495 1.1 bouyer static void tl_shutdown(v)
496 1.1 bouyer void *v;
497 1.1 bouyer {
498 1.1 bouyer tl_softc_t *sc = v;
499 1.1 bouyer struct Tx_list *Tx;
500 1.1 bouyer int i;
501 1.1 bouyer
502 1.1 bouyer if ((sc->tl_if.if_flags & IFF_RUNNING) == 0)
503 1.1 bouyer return;
504 1.1 bouyer /* disable interrupts */
505 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_CMD,
506 1.1 bouyer HOST_CMD_IntOff);
507 1.1 bouyer /* stop TX and RX channels */
508 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_CMD,
509 1.1 bouyer HOST_CMD_STOP | HOST_CMD_RT | HOST_CMD_Nes);
510 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_CMD, HOST_CMD_STOP);
511 1.1 bouyer DELAY(100000);
512 1.1 bouyer
513 1.1 bouyer /* stop statistics reading loop, read stats */
514 1.1 bouyer untimeout(tl_ticks, sc);
515 1.1 bouyer tl_read_stats(sc);
516 1.1 bouyer
517 1.1 bouyer /* deallocate memory allocations */
518 1.1 bouyer for (i=0; i< TL_NBUF; i++) {
519 1.1 bouyer if (sc->Rx_list[i].m)
520 1.1 bouyer m_freem(sc->Rx_list[i].m);
521 1.1 bouyer sc->Rx_list[i].m = NULL;
522 1.1 bouyer }
523 1.1 bouyer free(sc->Rx_list, M_DEVBUF);
524 1.1 bouyer sc->Rx_list = NULL;
525 1.1 bouyer while ((Tx = sc->active_Tx) != NULL) {
526 1.1 bouyer Tx->hw_list.stat = 0;
527 1.1 bouyer m_freem(Tx->m);
528 1.1 bouyer sc->active_Tx = Tx->next;
529 1.1 bouyer Tx->next = sc->Free_Tx;
530 1.1 bouyer sc->Free_Tx = Tx;
531 1.1 bouyer }
532 1.1 bouyer sc->last_Tx = NULL;
533 1.1 bouyer free(sc->Tx_list, M_DEVBUF);
534 1.1 bouyer sc->Tx_list = NULL;
535 1.1 bouyer if (nullbuf)
536 1.1 bouyer free(nullbuf, M_DEVBUF);
537 1.1 bouyer nullbuf = NULL;
538 1.1 bouyer sc->tl_if.if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
539 1.1 bouyer sc->mii.mii_media_status &= ~IFM_ACTIVE;
540 1.1 bouyer sc->tl_flags = 0;
541 1.1 bouyer }
542 1.1 bouyer
543 1.1 bouyer static void tl_restart(v)
544 1.1 bouyer void *v;
545 1.1 bouyer {
546 1.1 bouyer tl_init(v);
547 1.1 bouyer }
548 1.1 bouyer
549 1.1 bouyer static int tl_init(sc)
550 1.1 bouyer tl_softc_t *sc;
551 1.1 bouyer {
552 1.1 bouyer struct ifnet *ifp = &sc->tl_if;
553 1.1 bouyer int i, s;
554 1.1 bouyer
555 1.1 bouyer s = splimp();
556 1.1 bouyer /* cancel any pending IO */
557 1.1 bouyer tl_shutdown(sc);
558 1.1 bouyer tl_reset(sc);
559 1.1 bouyer if ((sc->tl_if.if_flags & IFF_UP) == 0) {
560 1.1 bouyer splx(s);
561 1.1 bouyer return 0;
562 1.1 bouyer }
563 1.1 bouyer /* Set various register to reasonable value */
564 1.1 bouyer /* setup NetCmd in promisc mode if needed */
565 1.1 bouyer i = (ifp->if_flags & IFF_PROMISC) ? TL_NETCOMMAND_CAF : 0;
566 1.1 bouyer tl_intreg_write_byte(sc, TL_INT_NET + TL_INT_NetCmd,
567 1.1 bouyer TL_NETCOMMAND_NRESET | TL_NETCOMMAND_NWRAP | i);
568 1.1 bouyer /* Max receive size : MCLBYTES */
569 1.1 bouyer tl_intreg_write_byte(sc, TL_INT_MISC + TL_MISC_MaxRxL, MCLBYTES & 0xff);
570 1.1 bouyer tl_intreg_write_byte(sc, TL_INT_MISC + TL_MISC_MaxRxH,
571 1.1 bouyer (MCLBYTES >> 8) & 0xff);
572 1.1 bouyer
573 1.1 bouyer /* init MAC addr */
574 1.1 bouyer for (i = 0; i < ETHER_ADDR_LEN; i++)
575 1.1 bouyer tl_intreg_write_byte(sc, TL_INT_Areg0 + i , sc->tl_enaddr[i]);
576 1.1 bouyer /* add multicast filters */
577 1.1 bouyer tl_addr_filter(sc);
578 1.1 bouyer #ifdef TLDEBUG_ADDR
579 1.1 bouyer printf("Wrote Mac addr, Areg & hash registers are now: \n");
580 1.1 bouyer for (i = TL_INT_Areg0; i <= TL_INT_HASH2; i = i + 4)
581 1.1 bouyer printf(" reg %x: %x\n", i, tl_intreg_read(sc, i));
582 1.1 bouyer #endif
583 1.1 bouyer
584 1.1 bouyer /* Pre-allocate receivers mbuf, make the lists */
585 1.1 bouyer sc->Rx_list = malloc(sizeof(struct Rx_list) * TL_NBUF, M_DEVBUF, M_NOWAIT);
586 1.1 bouyer sc->Tx_list = malloc(sizeof(struct Tx_list) * TL_NBUF, M_DEVBUF, M_NOWAIT);
587 1.1 bouyer if (sc->Rx_list == NULL || sc->Tx_list == NULL) {
588 1.1 bouyer printf("%s: out of memory for lists\n", sc->sc_dev.dv_xname);
589 1.1 bouyer sc->tl_if.if_flags &= ~IFF_UP;
590 1.1 bouyer splx(s);
591 1.1 bouyer return ENOMEM;
592 1.1 bouyer }
593 1.1 bouyer for (i=0; i< TL_NBUF; i++) {
594 1.1 bouyer if(tl_add_RxBuff(&sc->Rx_list[i], NULL) == 0) {
595 1.1 bouyer printf("%s: out of mbuf for receive list\n", sc->sc_dev.dv_xname);
596 1.1 bouyer sc->tl_if.if_flags &= ~IFF_UP;
597 1.1 bouyer splx(s);
598 1.1 bouyer return ENOMEM;
599 1.1 bouyer }
600 1.1 bouyer if (i > 0) { /* chain the list */
601 1.1 bouyer sc->Rx_list[i-1].next = &sc->Rx_list[i];
602 1.1 bouyer sc->Rx_list[i-1].hw_list.fwd = vtophys(&sc->Rx_list[i].hw_list);
603 1.1 bouyer #ifdef DIAGNOSTIC
604 1.1 bouyer if (sc->Rx_list[i-1].hw_list.fwd & 0x7)
605 1.1 bouyer printf("%s: physical addr 0x%x of list not properly aligned\n",
606 1.1 bouyer sc->sc_dev.dv_xname, sc->Rx_list[i-1].hw_list.fwd);
607 1.1 bouyer #endif
608 1.1 bouyer sc->Tx_list[i-1].next = &sc->Tx_list[i];
609 1.1 bouyer }
610 1.1 bouyer }
611 1.1 bouyer sc->Rx_list[TL_NBUF-1].next = NULL;
612 1.1 bouyer sc->Rx_list[TL_NBUF-1].hw_list.fwd = 0;
613 1.1 bouyer sc->Tx_list[TL_NBUF-1].next = NULL;
614 1.1 bouyer
615 1.1 bouyer sc->active_Rx = &sc->Rx_list[0];
616 1.1 bouyer sc->last_Rx = &sc->Rx_list[TL_NBUF-1];
617 1.1 bouyer sc->active_Tx = sc->last_Tx = NULL;
618 1.1 bouyer sc->Free_Tx = &sc->Tx_list[0];
619 1.1 bouyer
620 1.1 bouyer nullbuf = malloc(ETHER_MIN_TX, M_DEVBUF, M_NOWAIT);
621 1.1 bouyer if (nullbuf == NULL) {
622 1.1 bouyer printf("%s: can't allocate space for pad buffer\n",
623 1.1 bouyer sc->sc_dev.dv_xname);
624 1.1 bouyer sc->tl_if.if_flags &= ~IFF_UP;
625 1.1 bouyer splx(s);
626 1.1 bouyer return ENOMEM;
627 1.1 bouyer }
628 1.1 bouyer bzero(nullbuf, ETHER_MIN_TX);
629 1.1 bouyer
630 1.1 bouyer /* set media if needed */
631 1.1 bouyer if (IFM_SUBTYPE(sc->mii.mii_media_active) != IFM_NONE) {
632 1.1 bouyer mii_mediachg(&sc->mii);
633 1.1 bouyer }
634 1.1 bouyer
635 1.1 bouyer /* start ticks calls */
636 1.1 bouyer timeout(tl_ticks, sc, hz);
637 1.1 bouyer /* write adress of Rx list and enable interrupts */
638 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_CH_PARM, vtophys(&sc->Rx_list[0].hw_list));
639 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_CMD,
640 1.1 bouyer HOST_CMD_GO | HOST_CMD_RT | HOST_CMD_Nes | HOST_CMD_IntOn);
641 1.1 bouyer sc->tl_if.if_flags |= IFF_RUNNING;
642 1.1 bouyer sc->tl_if.if_flags &= ~IFF_OACTIVE;
643 1.1 bouyer return 0;
644 1.1 bouyer }
645 1.1 bouyer
646 1.1 bouyer
647 1.1 bouyer static u_int32_t
648 1.1 bouyer tl_intreg_read(sc, reg)
649 1.1 bouyer tl_softc_t *sc;
650 1.1 bouyer u_int32_t reg;
651 1.1 bouyer {
652 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_INTR_DIOADR, reg & TL_HOST_DIOADR_MASK);
653 1.1 bouyer return TL_HR_READ(sc, TL_HOST_DIO_DATA);
654 1.1 bouyer }
655 1.1 bouyer
656 1.1 bouyer static u_int8_t
657 1.1 bouyer tl_intreg_read_byte(sc, reg)
658 1.1 bouyer tl_softc_t *sc;
659 1.1 bouyer u_int32_t reg;
660 1.1 bouyer {
661 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_INTR_DIOADR,
662 1.1 bouyer (reg & (~0x07)) & TL_HOST_DIOADR_MASK);
663 1.1 bouyer return TL_HR_READ_BYTE(sc, TL_HOST_DIO_DATA + (reg & 0x07));
664 1.1 bouyer }
665 1.1 bouyer
666 1.1 bouyer static void
667 1.1 bouyer tl_intreg_write(sc, reg, val)
668 1.1 bouyer tl_softc_t *sc;
669 1.1 bouyer u_int32_t reg;
670 1.1 bouyer u_int32_t val;
671 1.1 bouyer {
672 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_INTR_DIOADR, reg & TL_HOST_DIOADR_MASK);
673 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_DIO_DATA, val);
674 1.1 bouyer }
675 1.1 bouyer
676 1.1 bouyer static void
677 1.1 bouyer tl_intreg_write_byte(sc, reg, val)
678 1.1 bouyer tl_softc_t *sc;
679 1.1 bouyer u_int32_t reg;
680 1.1 bouyer u_int8_t val;
681 1.1 bouyer {
682 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_INTR_DIOADR,
683 1.1 bouyer (reg & (~0x03)) & TL_HOST_DIOADR_MASK);
684 1.1 bouyer TL_HR_WRITE_BYTE(sc, TL_HOST_DIO_DATA + (reg & 0x03), val);
685 1.1 bouyer }
686 1.1 bouyer
687 1.1 bouyer void tl_mii_set(v, bit)
688 1.1 bouyer void *v;
689 1.1 bouyer u_int8_t bit;
690 1.1 bouyer {
691 1.1 bouyer tl_softc_t *sc = v;
692 1.1 bouyer
693 1.1 bouyer switch (bit) {
694 1.1 bouyer case MII_DATA:
695 1.1 bouyer netsio_set(sc, TL_NETSIO_MDATA);
696 1.1 bouyer break;
697 1.1 bouyer case MII_CLOCK:
698 1.1 bouyer netsio_set(sc, TL_NETSIO_MCLK);
699 1.1 bouyer break;
700 1.1 bouyer case MII_TXEN:
701 1.1 bouyer netsio_set(sc, TL_NETSIO_MTXEN);
702 1.1 bouyer break;
703 1.1 bouyer default:
704 1.1 bouyer printf("tl_mii_set: unknown bit %d\n", bit);
705 1.1 bouyer }
706 1.1 bouyer }
707 1.1 bouyer
708 1.1 bouyer void tl_mii_clr(v, bit)
709 1.1 bouyer void *v;
710 1.1 bouyer u_int8_t bit;
711 1.1 bouyer {
712 1.1 bouyer tl_softc_t *sc = v;
713 1.1 bouyer
714 1.1 bouyer switch (bit) {
715 1.1 bouyer case MII_DATA:
716 1.1 bouyer netsio_clr(sc, TL_NETSIO_MDATA);
717 1.1 bouyer break;
718 1.1 bouyer case MII_CLOCK:
719 1.1 bouyer netsio_clr(sc, TL_NETSIO_MCLK);
720 1.1 bouyer break;
721 1.1 bouyer case MII_TXEN:
722 1.1 bouyer netsio_clr(sc, TL_NETSIO_MTXEN);
723 1.1 bouyer break;
724 1.1 bouyer default:
725 1.1 bouyer printf("tl_mii_clr: unknown bit %d\n", bit);
726 1.1 bouyer }
727 1.1 bouyer return;
728 1.1 bouyer }
729 1.1 bouyer
730 1.1 bouyer int tl_mii_read(v, bit)
731 1.1 bouyer void *v;
732 1.1 bouyer u_int8_t bit;
733 1.1 bouyer {
734 1.1 bouyer tl_softc_t *sc = v;
735 1.1 bouyer
736 1.1 bouyer switch (bit) {
737 1.1 bouyer case MII_DATA:
738 1.1 bouyer return netsio_read(sc, TL_NETSIO_MDATA);
739 1.1 bouyer break;
740 1.1 bouyer case MII_CLOCK:
741 1.1 bouyer return netsio_read(sc, TL_NETSIO_MCLK);
742 1.1 bouyer break;
743 1.1 bouyer case MII_TXEN:
744 1.1 bouyer return netsio_read(sc, TL_NETSIO_MTXEN);
745 1.1 bouyer break;
746 1.1 bouyer default:
747 1.1 bouyer printf("tl_mii_read: unknown bit %d\n", bit);
748 1.1 bouyer return -1;
749 1.1 bouyer }
750 1.1 bouyer }
751 1.1 bouyer
752 1.1 bouyer void tl_i2c_set(v, bit)
753 1.1 bouyer void *v;
754 1.1 bouyer u_int8_t bit;
755 1.1 bouyer {
756 1.1 bouyer tl_softc_t *sc = v;
757 1.1 bouyer
758 1.1 bouyer switch (bit) {
759 1.1 bouyer case I2C_DATA:
760 1.1 bouyer netsio_set(sc, TL_NETSIO_EDATA);
761 1.1 bouyer break;
762 1.1 bouyer case I2C_CLOCK:
763 1.1 bouyer netsio_set(sc, TL_NETSIO_ECLOCK);
764 1.1 bouyer break;
765 1.1 bouyer case I2C_TXEN:
766 1.1 bouyer netsio_set(sc, TL_NETSIO_ETXEN);
767 1.1 bouyer break;
768 1.1 bouyer default:
769 1.1 bouyer printf("tl_i2c_set: unknown bit %d\n", bit);
770 1.1 bouyer }
771 1.1 bouyer return;
772 1.1 bouyer }
773 1.1 bouyer
774 1.1 bouyer void tl_i2c_clr(v, bit)
775 1.1 bouyer void *v;
776 1.1 bouyer u_int8_t bit;
777 1.1 bouyer {
778 1.1 bouyer tl_softc_t *sc = v;
779 1.1 bouyer
780 1.1 bouyer switch (bit) {
781 1.1 bouyer case I2C_DATA:
782 1.1 bouyer netsio_clr(sc, TL_NETSIO_EDATA);
783 1.1 bouyer break;
784 1.1 bouyer case I2C_CLOCK:
785 1.1 bouyer netsio_clr(sc, TL_NETSIO_ECLOCK);
786 1.1 bouyer break;
787 1.1 bouyer case I2C_TXEN:
788 1.1 bouyer netsio_clr(sc, TL_NETSIO_ETXEN);
789 1.1 bouyer break;
790 1.1 bouyer default:
791 1.1 bouyer printf("tl_i2c_clr: unknown bit %d\n", bit);
792 1.1 bouyer }
793 1.1 bouyer return;
794 1.1 bouyer }
795 1.1 bouyer
796 1.1 bouyer int tl_i2c_read(v, bit)
797 1.1 bouyer void *v;
798 1.1 bouyer u_int8_t bit;
799 1.1 bouyer {
800 1.1 bouyer tl_softc_t *sc = v;
801 1.1 bouyer
802 1.1 bouyer switch (bit) {
803 1.1 bouyer case I2C_DATA:
804 1.1 bouyer return netsio_read(sc, TL_NETSIO_EDATA);
805 1.1 bouyer break;
806 1.1 bouyer case I2C_CLOCK:
807 1.1 bouyer return netsio_read(sc, TL_NETSIO_ECLOCK);
808 1.1 bouyer break;
809 1.1 bouyer case I2C_TXEN:
810 1.1 bouyer return netsio_read(sc, TL_NETSIO_ETXEN);
811 1.1 bouyer break;
812 1.1 bouyer default:
813 1.1 bouyer printf("tl_i2c_read: unknown bit %d\n", bit);
814 1.1 bouyer return -1;
815 1.1 bouyer }
816 1.1 bouyer }
817 1.1 bouyer
818 1.1 bouyer static int
819 1.1 bouyer tl_intr(v)
820 1.1 bouyer void *v;
821 1.1 bouyer {
822 1.1 bouyer tl_softc_t *sc = v;
823 1.1 bouyer struct ifnet *ifp = &sc->tl_if;
824 1.1 bouyer struct Rx_list *Rx;
825 1.1 bouyer struct Tx_list *Tx;
826 1.1 bouyer struct mbuf *m;
827 1.1 bouyer u_int32_t int_type, int_reg;
828 1.1 bouyer int ack = 0;
829 1.1 bouyer int size;
830 1.1 bouyer
831 1.1 bouyer int_reg = TL_HR_READ(sc, TL_HOST_INTR_DIOADR);
832 1.1 bouyer int_type = int_reg & TL_INTR_MASK;
833 1.1 bouyer if (int_type == 0)
834 1.1 bouyer return 0;
835 1.1 bouyer #if defined(TLDEBUG_RX) || defined(TLDEBUG_TX)
836 1.1 bouyer printf("%s: interrupt type %x, intr_reg %x\n", sc->sc_dev.dv_xname,
837 1.1 bouyer int_type, int_reg);
838 1.1 bouyer #endif
839 1.1 bouyer /* disable interrupts */
840 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_CMD, HOST_CMD_IntOff);
841 1.1 bouyer switch(int_type & TL_INTR_MASK) {
842 1.1 bouyer case TL_INTR_RxEOF:
843 1.1 bouyer while(sc->active_Rx->hw_list.stat & TL_RX_CSTAT_CPLT) {
844 1.1 bouyer /* dequeue and requeue at end of list */
845 1.1 bouyer ack++;
846 1.1 bouyer Rx = sc->active_Rx;
847 1.1 bouyer sc->active_Rx = Rx->next;
848 1.1 bouyer m = Rx->m;
849 1.1 bouyer size = Rx->hw_list.stat >> 16;
850 1.1 bouyer #ifdef TLDEBUG_RX
851 1.1 bouyer printf("tl_intr: RX list complete, Rx %p, size=%d\n", Rx, size);
852 1.1 bouyer #endif
853 1.1 bouyer if (tl_add_RxBuff(Rx, m ) == 0) {
854 1.1 bouyer /* No new mbuf, reuse the same. This means that this packet
855 1.1 bouyer is lost */
856 1.1 bouyer m = NULL;
857 1.1 bouyer #ifdef TL_PRIV_STATS
858 1.1 bouyer sc->ierr_nomem++;
859 1.1 bouyer #endif
860 1.1 bouyer #ifdef TLDEBUG
861 1.1 bouyer printf("%s: out of mbuf, lost input packet\n",
862 1.1 bouyer sc->sc_dev.dv_xname);
863 1.1 bouyer #endif
864 1.1 bouyer }
865 1.1 bouyer Rx->next = NULL;
866 1.1 bouyer Rx->hw_list.fwd = 0;
867 1.1 bouyer sc->last_Rx->hw_list.fwd = vtophys(&Rx->hw_list);
868 1.1 bouyer #ifdef DIAGNOSTIC
869 1.1 bouyer if (sc->last_Rx->hw_list.fwd & 0x7)
870 1.1 bouyer printf("%s: physical addr 0x%x of list not properly aligned\n",
871 1.1 bouyer sc->sc_dev.dv_xname, sc->last_Rx->hw_list.fwd);
872 1.1 bouyer #endif
873 1.1 bouyer sc->last_Rx->next = Rx;
874 1.1 bouyer sc->last_Rx = Rx;
875 1.1 bouyer
876 1.1 bouyer /* deliver packet */
877 1.1 bouyer if (m) {
878 1.1 bouyer struct ether_header *eh;
879 1.1 bouyer if (size < sizeof(struct ether_header)) {
880 1.1 bouyer m_freem(m);
881 1.1 bouyer continue;
882 1.1 bouyer }
883 1.1 bouyer m->m_pkthdr.rcvif = ifp;
884 1.1 bouyer m->m_pkthdr.len = m->m_len =
885 1.1 bouyer size - sizeof(struct ether_header);
886 1.1 bouyer eh = mtod(m, struct ether_header *);
887 1.1 bouyer #ifdef TLDEBUG_RX
888 1.1 bouyer printf("tl_intr: Rx packet:\n");
889 1.1 bouyer ether_printheader(eh);
890 1.1 bouyer #endif
891 1.1 bouyer #if NBPFILTER > 0
892 1.1 bouyer if (ifp->if_bpf) {
893 1.1 bouyer bpf_tap(ifp->if_bpf,
894 1.1 bouyer mtod(m, caddr_t),
895 1.1 bouyer size);
896 1.1 bouyer /*
897 1.1 bouyer * Only pass this packet up
898 1.1 bouyer * if it is for us.
899 1.1 bouyer */
900 1.1 bouyer if ((ifp->if_flags & IFF_PROMISC) &&
901 1.1 bouyer (eh->ether_dhost[0] & 1) == 0 && /* !mcast and !bcast */
902 1.1 bouyer bcmp(eh->ether_dhost, LLADDR(ifp->if_sadl),
903 1.1 bouyer sizeof(eh->ether_dhost)) != 0) {
904 1.1 bouyer m_freem(m);
905 1.1 bouyer continue;
906 1.1 bouyer }
907 1.1 bouyer }
908 1.1 bouyer #endif /* NBPFILTER > 0 */
909 1.1 bouyer m->m_data += sizeof(struct ether_header);
910 1.1 bouyer ether_input(ifp, eh, m);
911 1.1 bouyer }
912 1.1 bouyer }
913 1.1 bouyer #ifdef TLDEBUG_RX
914 1.1 bouyer printf("TL_INTR_RxEOF: ack %d\n", ack);
915 1.1 bouyer #else
916 1.1 bouyer if (ack == 0) {
917 1.1 bouyer printf("%s: EOF intr without anything to read !\n",
918 1.1 bouyer sc->sc_dev.dv_xname);
919 1.1 bouyer tl_reset(sc);
920 1.1 bouyer /* shedule reinit of the board */
921 1.1 bouyer timeout(tl_restart, sc, 1);
922 1.1 bouyer return(1);
923 1.1 bouyer }
924 1.1 bouyer #endif
925 1.1 bouyer break;
926 1.1 bouyer case TL_INTR_RxEOC:
927 1.1 bouyer ack++;
928 1.1 bouyer #ifdef TLDEBUG_RX
929 1.1 bouyer printf("TL_INTR_RxEOC: ack %d\n", ack);
930 1.1 bouyer #endif
931 1.1 bouyer #ifdef DIAGNOSTIC
932 1.1 bouyer if (sc->active_Rx->hw_list.stat & TL_RX_CSTAT_CPLT) {
933 1.1 bouyer printf("%s: Rx EOC interrupt and active Rx list not cleared\n",
934 1.1 bouyer sc->sc_dev.dv_xname);
935 1.1 bouyer return 0;
936 1.1 bouyer } else
937 1.1 bouyer #endif
938 1.1 bouyer {
939 1.1 bouyer /* write adress of Rx list and send Rx GO command, ack interrupt
940 1.1 bouyer and enable interrupts in one command */
941 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_CH_PARM,
942 1.1 bouyer vtophys(&sc->active_Rx->hw_list));
943 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_CMD,
944 1.1 bouyer HOST_CMD_GO | HOST_CMD_RT | HOST_CMD_Nes | ack | int_type |
945 1.1 bouyer HOST_CMD_ACK | HOST_CMD_IntOn);
946 1.1 bouyer return 1;
947 1.1 bouyer }
948 1.1 bouyer case TL_INTR_TxEOF:
949 1.1 bouyer case TL_INTR_TxEOC:
950 1.1 bouyer while ((Tx = sc->active_Tx) != NULL) {
951 1.1 bouyer if((Tx->hw_list.stat & TL_TX_CSTAT_CPLT) == 0)
952 1.1 bouyer break;
953 1.1 bouyer ack++;
954 1.1 bouyer #ifdef TLDEBUG_TX
955 1.1 bouyer printf("TL_INTR_TxEOC: list 0x%xp done\n", vtophys(&Tx->hw_list));
956 1.1 bouyer #endif
957 1.1 bouyer Tx->hw_list.stat = 0;
958 1.1 bouyer m_freem(Tx->m);
959 1.1 bouyer Tx->m = NULL;
960 1.1 bouyer sc->active_Tx = Tx->next;
961 1.1 bouyer if (sc->active_Tx == NULL)
962 1.1 bouyer sc->last_Tx = NULL;
963 1.1 bouyer Tx->next = sc->Free_Tx;
964 1.1 bouyer sc->Free_Tx = Tx;
965 1.1 bouyer }
966 1.1 bouyer /* if this was an EOC, ACK immediatly */
967 1.1 bouyer if (int_type == TL_INTR_TxEOC) {
968 1.1 bouyer #ifdef TLDEBUG_TX
969 1.1 bouyer printf("TL_INTR_TxEOC: ack %d (will be set to 1)\n", ack);
970 1.1 bouyer #endif
971 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_CMD, 1 | int_type | HOST_CMD_ACK |
972 1.1 bouyer HOST_CMD_IntOn);
973 1.1 bouyer if ( sc->active_Tx != NULL) { /* needs a Tx go command */
974 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_CH_PARM,
975 1.1 bouyer vtophys(&sc->active_Tx->hw_list));
976 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_CMD, HOST_CMD_GO);
977 1.1 bouyer }
978 1.1 bouyer sc->tl_if.if_timer = 0;
979 1.1 bouyer if (sc->tl_if.if_snd.ifq_head != NULL)
980 1.1 bouyer tl_ifstart(&sc->tl_if);
981 1.1 bouyer return 1;
982 1.1 bouyer }
983 1.1 bouyer #ifdef TLDEBUG
984 1.1 bouyer else {
985 1.1 bouyer printf("TL_INTR_TxEOF: ack %d\n", ack);
986 1.1 bouyer }
987 1.1 bouyer #endif
988 1.1 bouyer sc->tl_if.if_timer = 0;
989 1.1 bouyer if (sc->tl_if.if_snd.ifq_head != NULL)
990 1.1 bouyer tl_ifstart(&sc->tl_if);
991 1.1 bouyer break;
992 1.1 bouyer case TL_INTR_Stat:
993 1.1 bouyer ack++;
994 1.1 bouyer #ifdef TLDEBUG
995 1.1 bouyer printf("TL_INTR_Stat: ack %d\n", ack);
996 1.1 bouyer #endif
997 1.1 bouyer tl_read_stats(sc);
998 1.1 bouyer break;
999 1.1 bouyer case TL_INTR_Adc:
1000 1.1 bouyer if (int_reg & TL_INTVec_MASK) {
1001 1.1 bouyer /* adapter check conditions */
1002 1.1 bouyer printf("%s: check condition, intvect=0x%x, ch_param=0x%x\n",
1003 1.1 bouyer sc->sc_dev.dv_xname, int_reg & TL_INTVec_MASK,
1004 1.1 bouyer TL_HR_READ(sc, TL_HOST_CH_PARM));
1005 1.1 bouyer tl_reset(sc);
1006 1.1 bouyer /* shedule reinit of the board */
1007 1.1 bouyer timeout(tl_restart, sc, 1);
1008 1.1 bouyer return(1);
1009 1.1 bouyer } else {
1010 1.1 bouyer u_int8_t netstat;
1011 1.1 bouyer /* Network status */
1012 1.1 bouyer netstat = tl_intreg_read_byte(sc, TL_INT_NET+TL_INT_NetSts);
1013 1.1 bouyer printf("%s: network status, NetSts=%x\n",
1014 1.1 bouyer sc->sc_dev.dv_xname, netstat);
1015 1.1 bouyer /* Ack interrupts */
1016 1.1 bouyer tl_intreg_write_byte(sc, TL_INT_NET+TL_INT_NetSts, netstat);
1017 1.1 bouyer ack++;
1018 1.1 bouyer }
1019 1.1 bouyer break;
1020 1.1 bouyer default:
1021 1.1 bouyer printf("%s: unhandled interrupt code %x!\n",
1022 1.1 bouyer sc->sc_dev.dv_xname, int_type);
1023 1.1 bouyer ack++;
1024 1.1 bouyer }
1025 1.1 bouyer
1026 1.1 bouyer if (ack) {
1027 1.1 bouyer /* Ack the interrupt and enable interrupts */
1028 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_CMD, ack | int_type | HOST_CMD_ACK |
1029 1.1 bouyer HOST_CMD_IntOn);
1030 1.1 bouyer return 1;
1031 1.1 bouyer }
1032 1.1 bouyer /* ack = 0 ; interrupt was perhaps not our. Just enable interrupts */
1033 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_CMD, HOST_CMD_IntOn);
1034 1.1 bouyer return 0;
1035 1.1 bouyer }
1036 1.1 bouyer
1037 1.1 bouyer static int
1038 1.1 bouyer tl_ifioctl(ifp, cmd, data)
1039 1.1 bouyer struct ifnet *ifp;
1040 1.1 bouyer ioctl_cmd_t cmd;
1041 1.1 bouyer caddr_t data;
1042 1.1 bouyer {
1043 1.1 bouyer struct tl_softc *sc = ifp->if_softc;
1044 1.1 bouyer struct ifreq *ifr = (struct ifreq *)data;
1045 1.1 bouyer int s, error;
1046 1.1 bouyer
1047 1.1 bouyer s = splimp();
1048 1.1 bouyer switch(cmd) {
1049 1.1 bouyer case SIOCSIFADDR: {
1050 1.1 bouyer struct ifaddr *ifa = (struct ifaddr *)data;
1051 1.1 bouyer sc->tl_if.if_flags |= IFF_UP;
1052 1.1 bouyer if ((error = tl_init(sc)) != NULL) {
1053 1.1 bouyer sc->tl_if.if_flags &= ~IFF_UP;
1054 1.1 bouyer break;
1055 1.1 bouyer }
1056 1.1 bouyer switch (ifa->ifa_addr->sa_family) {
1057 1.1 bouyer #ifdef INET
1058 1.1 bouyer case AF_INET:
1059 1.1 bouyer arp_ifinit(ifp, ifa);
1060 1.1 bouyer break;
1061 1.1 bouyer #endif
1062 1.1 bouyer #ifdef NS
1063 1.1 bouyer case AF_NS: {
1064 1.1 bouyer struct ns_addr *ina = &IA_SNS(ifa)->sns_addr;
1065 1.1 bouyer
1066 1.1 bouyer if (ns_nullhost(*ina))
1067 1.1 bouyer ina->x_host = *(union ns_host*) LLADDR(ifp->if_sadl);
1068 1.1 bouyer else
1069 1.1 bouyer bcopy(ina->x_host.c_host, LLADDR(ifp->if_sadl),
1070 1.1 bouyer ifp->if_addrlen);
1071 1.1 bouyer break;
1072 1.1 bouyer }
1073 1.1 bouyer #endif
1074 1.1 bouyer default:
1075 1.1 bouyer break;
1076 1.1 bouyer }
1077 1.1 bouyer break;
1078 1.1 bouyer }
1079 1.1 bouyer case SIOCSIFFLAGS:
1080 1.1 bouyer {
1081 1.1 bouyer u_int8_t reg;
1082 1.1 bouyer /*
1083 1.1 bouyer * If interface is marked up and not running, then start it.
1084 1.1 bouyer * If it is marked down and running, stop it.
1085 1.1 bouyer */
1086 1.1 bouyer if (ifp->if_flags & IFF_UP) {
1087 1.1 bouyer if ((ifp->if_flags & IFF_RUNNING) == 0) {
1088 1.1 bouyer error = tl_init(sc);
1089 1.1 bouyer /* all flags have been handled by init */
1090 1.1 bouyer break;
1091 1.1 bouyer }
1092 1.1 bouyer error = 0;
1093 1.1 bouyer reg = tl_intreg_read_byte(sc, TL_INT_NET + TL_INT_NetCmd);
1094 1.1 bouyer if (ifp->if_flags & IFF_PROMISC)
1095 1.1 bouyer reg |= TL_NETCOMMAND_CAF;
1096 1.1 bouyer else
1097 1.1 bouyer reg &= ~TL_NETCOMMAND_CAF;
1098 1.1 bouyer tl_intreg_write_byte(sc, TL_INT_NET + TL_INT_NetCmd, reg);
1099 1.1 bouyer #ifdef TL_PRIV_STATS
1100 1.1 bouyer if (ifp->if_flags & IFF_LINK0) {
1101 1.1 bouyer ifp->if_flags &= ~IFF_LINK0;
1102 1.1 bouyer printf("%s errors statistics\n", sc->sc_dev.dv_xname);
1103 1.1 bouyer printf(" %4d RX buffer overrun\n",sc->ierr_overr);
1104 1.1 bouyer printf(" %4d RX code error\n", sc->ierr_code);
1105 1.1 bouyer printf(" %4d RX crc error\n", sc->ierr_crc);
1106 1.1 bouyer printf(" %4d RX out of memory\n", sc->ierr_nomem);
1107 1.1 bouyer printf(" %4d TX buffer underrun\n", sc->oerr_underr);
1108 1.1 bouyer printf(" %4d TX deffered frames\n", sc->oerr_deffered);
1109 1.1 bouyer printf(" %4d TX single collisions\n", sc->oerr_coll);
1110 1.1 bouyer printf(" %4d TX multi collisions\n", sc->oerr_multicoll);
1111 1.1 bouyer printf(" %4d TX exessive collisions\n", sc->oerr_exesscoll);
1112 1.1 bouyer printf(" %4d TX late collisions\n", sc->oerr_latecoll);
1113 1.1 bouyer printf(" %4d TX carrier loss\n", sc->oerr_carrloss);
1114 1.1 bouyer printf(" %4d TX mbuf copy\n", sc->oerr_mcopy);
1115 1.1 bouyer }
1116 1.1 bouyer #endif
1117 1.1 bouyer } else {
1118 1.1 bouyer if (ifp->if_flags & IFF_RUNNING)
1119 1.1 bouyer tl_shutdown(sc);
1120 1.1 bouyer error = 0;
1121 1.1 bouyer }
1122 1.1 bouyer break;
1123 1.1 bouyer }
1124 1.1 bouyer case SIOCADDMULTI:
1125 1.1 bouyer case SIOCDELMULTI:
1126 1.1 bouyer /*
1127 1.1 bouyer * Update multicast listeners
1128 1.1 bouyer */
1129 1.1 bouyer if (cmd == SIOCADDMULTI)
1130 1.1 bouyer error = ether_addmulti(ifr, &sc->tl_ec);
1131 1.1 bouyer else
1132 1.1 bouyer error = ether_delmulti(ifr, &sc->tl_ec);
1133 1.1 bouyer if (error == ENETRESET) {
1134 1.1 bouyer tl_addr_filter(sc);
1135 1.1 bouyer error = 0;
1136 1.1 bouyer }
1137 1.1 bouyer break;
1138 1.1 bouyer case SIOCSIFMEDIA:
1139 1.1 bouyer case SIOCGIFMEDIA:
1140 1.1 bouyer error = ifmedia_ioctl(ifp, ifr, &sc->tl_ifmedia, cmd);
1141 1.1 bouyer break;
1142 1.1 bouyer default:
1143 1.1 bouyer error = EINVAL;
1144 1.1 bouyer }
1145 1.1 bouyer splx(s);
1146 1.1 bouyer return error;
1147 1.1 bouyer }
1148 1.1 bouyer
1149 1.1 bouyer static void
1150 1.1 bouyer tl_ifstart(ifp)
1151 1.1 bouyer struct ifnet *ifp;
1152 1.1 bouyer {
1153 1.1 bouyer tl_softc_t *sc = ifp->if_softc;
1154 1.1 bouyer struct mbuf *m, *mb_head;
1155 1.1 bouyer struct Tx_list *Tx;
1156 1.1 bouyer int segment, size;
1157 1.1 bouyer
1158 1.1 bouyer txloop:
1159 1.1 bouyer /* If we don't have more space ... */
1160 1.1 bouyer if (sc->Free_Tx == NULL) {
1161 1.1 bouyer #ifdef TLDEBUG
1162 1.1 bouyer printf("tl_ifstart: No free TX list\n");
1163 1.1 bouyer #endif
1164 1.1 bouyer return;
1165 1.1 bouyer }
1166 1.1 bouyer /* Grab a paquet for output */
1167 1.1 bouyer IF_DEQUEUE(&ifp->if_snd, mb_head);
1168 1.1 bouyer if (mb_head == NULL) {
1169 1.1 bouyer #ifdef TLDEBUG_TX
1170 1.1 bouyer printf("tl_ifstart: nothing to send\n");
1171 1.1 bouyer #endif
1172 1.1 bouyer return;
1173 1.1 bouyer }
1174 1.1 bouyer Tx = sc->Free_Tx;
1175 1.1 bouyer sc->Free_Tx = Tx->next;
1176 1.1 bouyer /*
1177 1.1 bouyer * Go through each of the mbufs in the chain and initialize
1178 1.1 bouyer * the transmit list descriptors with the physical address
1179 1.1 bouyer * and size of the mbuf.
1180 1.1 bouyer */
1181 1.1 bouyer tbdinit:
1182 1.1 bouyer bzero(Tx, sizeof(struct Tx_list));
1183 1.1 bouyer Tx->m = mb_head;
1184 1.1 bouyer size = 0;
1185 1.1 bouyer for (m = mb_head, segment = 0; m != NULL ; m = m->m_next) {
1186 1.1 bouyer if (m->m_len != 0) {
1187 1.1 bouyer if (segment == TL_NSEG)
1188 1.1 bouyer break;
1189 1.1 bouyer size += m->m_len;
1190 1.1 bouyer Tx->hw_list.seg[segment].data_addr =
1191 1.1 bouyer vtophys(mtod(m, vm_offset_t));
1192 1.1 bouyer Tx->hw_list.seg[segment].data_count = m->m_len;
1193 1.1 bouyer segment++;
1194 1.1 bouyer }
1195 1.1 bouyer }
1196 1.1 bouyer if (m != NULL || (size < ETHER_MIN_TX && segment == TL_NSEG)) {
1197 1.1 bouyer /*
1198 1.1 bouyer * We ran out of segments, or we will. We have to recopy this mbuf
1199 1.1 bouyer * chain first.
1200 1.1 bouyer */
1201 1.1 bouyer struct mbuf *mn;
1202 1.1 bouyer #ifdef TLDEBUG_TX
1203 1.1 bouyer printf("tl_ifstart: need to copy mbuf\n");
1204 1.1 bouyer #endif
1205 1.1 bouyer #ifdef TL_PRIV_STATS
1206 1.1 bouyer sc->oerr_mcopy++;
1207 1.1 bouyer #endif
1208 1.1 bouyer MGETHDR(mn, M_DONTWAIT, MT_DATA);
1209 1.1 bouyer if (mn == NULL) {
1210 1.1 bouyer m_freem(mb_head);
1211 1.1 bouyer goto bad;
1212 1.1 bouyer }
1213 1.1 bouyer if (mb_head->m_pkthdr.len > MHLEN) {
1214 1.1 bouyer MCLGET(mn, M_DONTWAIT);
1215 1.1 bouyer if ((mn->m_flags & M_EXT) == 0) {
1216 1.1 bouyer m_freem(mn);
1217 1.1 bouyer m_freem(mb_head);
1218 1.1 bouyer goto bad;
1219 1.1 bouyer }
1220 1.1 bouyer }
1221 1.1 bouyer m_copydata(mb_head, 0, mb_head->m_pkthdr.len,
1222 1.1 bouyer mtod(mn, caddr_t));
1223 1.1 bouyer mn->m_pkthdr.len = mn->m_len = mb_head->m_pkthdr.len;
1224 1.1 bouyer m_freem(mb_head);
1225 1.1 bouyer mb_head = mn;
1226 1.1 bouyer goto tbdinit;
1227 1.1 bouyer }
1228 1.1 bouyer /* We are at end of mbuf chain. check the size and
1229 1.1 bouyer * see if it needs to be extended
1230 1.1 bouyer */
1231 1.1 bouyer if (size < ETHER_MIN_TX) {
1232 1.1 bouyer #ifdef DIAGNOSTIC
1233 1.1 bouyer if (segment >= TL_NSEG) {
1234 1.1 bouyer panic("tl_ifstart: to much segmets (%d)\n", segment);
1235 1.1 bouyer }
1236 1.1 bouyer #endif
1237 1.1 bouyer /*
1238 1.1 bouyer * add the nullbuf in the seg
1239 1.1 bouyer */
1240 1.1 bouyer Tx->hw_list.seg[segment].data_count =
1241 1.1 bouyer ETHER_MIN_TX - size;
1242 1.1 bouyer Tx->hw_list.seg[segment].data_addr =
1243 1.1 bouyer vtophys(nullbuf);
1244 1.1 bouyer size = ETHER_MIN_TX;
1245 1.1 bouyer segment++;
1246 1.1 bouyer }
1247 1.1 bouyer /* The list is done, finish the list init */
1248 1.1 bouyer Tx->hw_list.seg[segment-1].data_count |=
1249 1.1 bouyer TL_LAST_SEG;
1250 1.1 bouyer Tx->hw_list.stat = (size << 16) | 0x3000;
1251 1.1 bouyer #ifdef TLDEBUG_TX
1252 1.1 bouyer printf("%s: sending, Tx : stat = 0x%x\n", sc->sc_dev.dv_xname,
1253 1.1 bouyer Tx->hw_list.stat);
1254 1.1 bouyer #if 0
1255 1.1 bouyer for(segment = 0; segment < TL_NSEG; segment++) {
1256 1.1 bouyer printf(" seg %d addr 0x%x len 0x%x\n",
1257 1.1 bouyer segment,
1258 1.1 bouyer Tx->hw_list.seg[segment].data_addr,
1259 1.1 bouyer Tx->hw_list.seg[segment].data_count);
1260 1.1 bouyer }
1261 1.1 bouyer #endif
1262 1.1 bouyer #endif
1263 1.1 bouyer sc->opkt++;
1264 1.1 bouyer if (sc->active_Tx == NULL) {
1265 1.1 bouyer sc->active_Tx = sc->last_Tx = Tx;
1266 1.1 bouyer #ifdef TLDEBUG_TX
1267 1.1 bouyer printf("%s: Tx GO, addr=0x%x\n", sc->sc_dev.dv_xname,
1268 1.1 bouyer vtophys(&Tx->hw_list));
1269 1.1 bouyer #endif
1270 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_CH_PARM, vtophys(&Tx->hw_list));
1271 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_CMD, HOST_CMD_GO);
1272 1.1 bouyer } else {
1273 1.1 bouyer #ifdef TLDEBUG_TX
1274 1.1 bouyer printf("%s: Tx addr=0x%x queued\n", sc->sc_dev.dv_xname,
1275 1.1 bouyer vtophys(&Tx->hw_list));
1276 1.1 bouyer #endif
1277 1.1 bouyer sc->last_Tx->hw_list.fwd = vtophys(&Tx->hw_list);
1278 1.1 bouyer sc->last_Tx->next = Tx;
1279 1.1 bouyer sc->last_Tx = Tx;
1280 1.1 bouyer #ifdef DIAGNOSTIC
1281 1.1 bouyer if (sc->last_Tx->hw_list.fwd & 0x7)
1282 1.1 bouyer printf("%s: physical addr 0x%x of list not properly aligned\n",
1283 1.1 bouyer sc->sc_dev.dv_xname, sc->last_Rx->hw_list.fwd);
1284 1.1 bouyer #endif
1285 1.1 bouyer }
1286 1.1 bouyer #if NBPFILTER > 0
1287 1.1 bouyer /* Pass packet to bpf if there is a listener */
1288 1.1 bouyer if (ifp->if_bpf)
1289 1.1 bouyer bpf_mtap(ifp->if_bpf, mb_head);
1290 1.1 bouyer #endif
1291 1.1 bouyer /* Set a 5 second timer just in case we don't hear from the card again. */
1292 1.1 bouyer ifp->if_timer = 5;
1293 1.1 bouyer
1294 1.1 bouyer goto txloop;
1295 1.1 bouyer bad:
1296 1.1 bouyer #ifdef TLDEBUG
1297 1.1 bouyer printf("tl_ifstart: Out of mbuf, Tx pkt lost\n");
1298 1.1 bouyer #endif
1299 1.1 bouyer Tx->next = sc->Free_Tx;
1300 1.1 bouyer sc->Free_Tx = Tx;
1301 1.1 bouyer return;
1302 1.1 bouyer }
1303 1.1 bouyer
1304 1.1 bouyer static void
1305 1.1 bouyer tl_ifwatchdog(ifp)
1306 1.1 bouyer struct ifnet *ifp;
1307 1.1 bouyer {
1308 1.1 bouyer tl_softc_t *sc = ifp->if_softc;
1309 1.1 bouyer
1310 1.1 bouyer if ((ifp->if_flags & IFF_RUNNING) == 0)
1311 1.1 bouyer return;
1312 1.1 bouyer printf("%s: device timeout\n", sc->sc_dev.dv_xname);
1313 1.1 bouyer ifp->if_oerrors++;
1314 1.1 bouyer tl_init(sc);
1315 1.1 bouyer }
1316 1.1 bouyer
1317 1.1 bouyer static int
1318 1.1 bouyer tl_mediachange(ifp)
1319 1.1 bouyer struct ifnet *ifp;
1320 1.1 bouyer {
1321 1.1 bouyer
1322 1.1 bouyer tl_softc_t *sc = ifp->if_softc;
1323 1.1 bouyer int err;
1324 1.1 bouyer u_int32_t reg;
1325 1.1 bouyer int oldmedia;
1326 1.1 bouyer #ifdef TLDEBUG
1327 1.1 bouyer printf("tl_mediachange, media %x\n", sc->tl_ifmedia.ifm_media);
1328 1.1 bouyer #endif
1329 1.1 bouyer oldmedia = sc->mii.mii_media_active;
1330 1.1 bouyer sc->mii.mii_media_active = sc->tl_ifmedia.ifm_media;
1331 1.1 bouyer if ((err = mii_mediachg(&sc->mii)) != 0)
1332 1.1 bouyer sc->mii.mii_media_active = oldmedia;
1333 1.1 bouyer reg = tl_intreg_read_byte(sc, TL_INT_NET + TL_INT_NetCmd);
1334 1.1 bouyer if (sc->mii.mii_media_active & IFM_FDX)
1335 1.1 bouyer reg |= TL_NETCOMMAND_DUPLEX;
1336 1.1 bouyer else
1337 1.1 bouyer reg &= ~TL_NETCOMMAND_DUPLEX;
1338 1.1 bouyer tl_intreg_write_byte(sc, TL_INT_NET + TL_INT_NetCmd, reg);
1339 1.1 bouyer return err;
1340 1.1 bouyer }
1341 1.1 bouyer
1342 1.1 bouyer static void
1343 1.1 bouyer tl_mediastatus(ifp, ifmr)
1344 1.1 bouyer struct ifnet *ifp;
1345 1.1 bouyer struct ifmediareq *ifmr;
1346 1.1 bouyer {
1347 1.1 bouyer tl_softc_t *sc = ifp->if_softc;
1348 1.1 bouyer if (IFM_SUBTYPE(sc->mii.mii_media_active) == IFM_10_2 ||
1349 1.1 bouyer IFM_SUBTYPE(sc->mii.mii_media_active) == IFM_10_5)
1350 1.1 bouyer if (sc->tl_flags & TL_IFACT)
1351 1.1 bouyer sc->mii.mii_media_status = IFM_AVALID | IFM_ACTIVE;
1352 1.1 bouyer else
1353 1.1 bouyer sc->mii.mii_media_status = IFM_AVALID;
1354 1.1 bouyer else
1355 1.1 bouyer mii_pollstat(&sc->mii);
1356 1.1 bouyer
1357 1.1 bouyer ifmr->ifm_active = sc->mii.mii_media_active;
1358 1.1 bouyer ifmr->ifm_status = sc->mii.mii_media_status;
1359 1.1 bouyer }
1360 1.1 bouyer
1361 1.1 bouyer static int tl_add_RxBuff(Rx, oldm)
1362 1.1 bouyer struct Rx_list *Rx;
1363 1.1 bouyer struct mbuf *oldm;
1364 1.1 bouyer {
1365 1.1 bouyer struct mbuf *m;
1366 1.1 bouyer
1367 1.1 bouyer MGETHDR(m, M_DONTWAIT, MT_DATA);
1368 1.1 bouyer if (m != NULL) {
1369 1.1 bouyer MCLGET(m, M_DONTWAIT);
1370 1.1 bouyer if ((m->m_flags & M_EXT) == 0) {
1371 1.1 bouyer m_freem(m);
1372 1.1 bouyer if (oldm == NULL)
1373 1.1 bouyer return 0;
1374 1.1 bouyer m = oldm;
1375 1.1 bouyer m->m_data = m->m_ext.ext_buf;
1376 1.1 bouyer }
1377 1.1 bouyer } else {
1378 1.1 bouyer if (oldm == NULL)
1379 1.1 bouyer return 0;
1380 1.1 bouyer m = oldm;
1381 1.1 bouyer m->m_data = m->m_ext.ext_buf;
1382 1.1 bouyer }
1383 1.1 bouyer /*
1384 1.1 bouyer * Move the data pointer up so that the incoming data packet
1385 1.1 bouyer * will be 32-bit aligned.
1386 1.1 bouyer */
1387 1.1 bouyer m->m_data += 2;
1388 1.1 bouyer
1389 1.1 bouyer /* (re)init the Rx_list struct */
1390 1.1 bouyer
1391 1.1 bouyer Rx->m = m;
1392 1.1 bouyer Rx->hw_list.stat = ((MCLBYTES -2) << 16) | 0x3000;
1393 1.1 bouyer Rx->hw_list.seg.data_count = (MCLBYTES -2);
1394 1.1 bouyer Rx->hw_list.seg.data_addr = vtophys(m->m_data);
1395 1.1 bouyer return (m != oldm);
1396 1.1 bouyer }
1397 1.1 bouyer
1398 1.1 bouyer static void tl_ticks(v)
1399 1.1 bouyer void *v;
1400 1.1 bouyer {
1401 1.1 bouyer tl_softc_t *sc = v;
1402 1.1 bouyer
1403 1.1 bouyer tl_read_stats(sc);
1404 1.1 bouyer if (sc->opkt > 0) {
1405 1.1 bouyer if (sc->oerr_exesscoll > sc->opkt / 100) { /* exess collisions */
1406 1.1 bouyer if (sc->tl_flags & TL_IFACT) /* only print once */
1407 1.1 bouyer printf("%s: no carrier\n", sc->sc_dev.dv_xname);
1408 1.1 bouyer sc->tl_flags &= ~TL_IFACT;
1409 1.1 bouyer } else
1410 1.1 bouyer sc->tl_flags |= TL_IFACT;
1411 1.1 bouyer sc->oerr_exesscoll = sc->opkt = 0;
1412 1.1 bouyer sc->tl_lasttx = 0;
1413 1.1 bouyer } else {
1414 1.1 bouyer sc->tl_lasttx++;
1415 1.1 bouyer if (sc->tl_lasttx >= TL_IDLETIME) {
1416 1.1 bouyer /*
1417 1.1 bouyer * No TX activity in the last TL_IDLETIME seconds.
1418 1.1 bouyer * sends a LLC Class1 TEST pkt
1419 1.1 bouyer */
1420 1.1 bouyer struct mbuf *m;
1421 1.1 bouyer int s;
1422 1.1 bouyer MGETHDR(m, M_DONTWAIT, MT_DATA);
1423 1.1 bouyer if (m != NULL) {
1424 1.1 bouyer #ifdef TLDEBUG
1425 1.1 bouyer printf("tl_ticks: sending LLC test pkt\n");
1426 1.1 bouyer #endif
1427 1.1 bouyer bcopy(sc->tl_enaddr,
1428 1.1 bouyer mtod(m, struct ether_header *)->ether_dhost, 6);
1429 1.1 bouyer bcopy(sc->tl_enaddr,
1430 1.1 bouyer mtod(m, struct ether_header *)->ether_shost, 6);
1431 1.1 bouyer mtod(m, struct ether_header *)->ether_type = htons(3);
1432 1.1 bouyer mtod(m, unsigned char *)[14] = 0;
1433 1.1 bouyer mtod(m, unsigned char *)[15] = 0;
1434 1.1 bouyer mtod(m, unsigned char *)[16] = 0xE3;
1435 1.1 bouyer /* LLC Class1 TEST (no poll) */
1436 1.1 bouyer m->m_len = m->m_pkthdr.len = sizeof(struct ether_header) + 3;
1437 1.1 bouyer s = splnet();
1438 1.1 bouyer IF_PREPEND(&sc->tl_if.if_snd, m);
1439 1.1 bouyer tl_ifstart(&sc->tl_if);
1440 1.1 bouyer splx(s);
1441 1.1 bouyer }
1442 1.1 bouyer }
1443 1.1 bouyer }
1444 1.1 bouyer
1445 1.1 bouyer /* read statistics every seconds */
1446 1.1 bouyer timeout(tl_ticks, v, hz);
1447 1.1 bouyer }
1448 1.1 bouyer
1449 1.1 bouyer static void
1450 1.1 bouyer tl_read_stats(sc)
1451 1.1 bouyer tl_softc_t *sc;
1452 1.1 bouyer {
1453 1.1 bouyer u_int32_t reg;
1454 1.1 bouyer int ierr_overr;
1455 1.1 bouyer int ierr_code;
1456 1.1 bouyer int ierr_crc;
1457 1.1 bouyer int oerr_underr;
1458 1.1 bouyer int oerr_deffered;
1459 1.1 bouyer int oerr_coll;
1460 1.1 bouyer int oerr_multicoll;
1461 1.1 bouyer int oerr_exesscoll;
1462 1.1 bouyer int oerr_latecoll;
1463 1.1 bouyer int oerr_carrloss;
1464 1.1 bouyer struct ifnet *ifp = &sc->tl_if;
1465 1.1 bouyer
1466 1.1 bouyer reg = tl_intreg_read(sc, TL_INT_STATS_TX);
1467 1.1 bouyer ifp->if_opackets += reg & 0x00ffffff;
1468 1.1 bouyer oerr_underr = reg >> 24;
1469 1.1 bouyer
1470 1.1 bouyer reg = tl_intreg_read(sc, TL_INT_STATS_RX);
1471 1.1 bouyer ifp->if_ipackets += reg & 0x00ffffff;
1472 1.1 bouyer ierr_overr = reg >> 24;
1473 1.1 bouyer
1474 1.1 bouyer reg = tl_intreg_read(sc, TL_INT_STATS_FERR);
1475 1.1 bouyer ierr_crc = (reg & TL_FERR_CRC) >> 16;
1476 1.1 bouyer ierr_code = (reg & TL_FERR_CODE) >> 24;
1477 1.1 bouyer oerr_deffered = (reg & TL_FERR_DEF);
1478 1.1 bouyer
1479 1.1 bouyer reg = tl_intreg_read(sc, TL_INT_STATS_COLL);
1480 1.1 bouyer oerr_multicoll = (reg & TL_COL_MULTI);
1481 1.1 bouyer oerr_coll = (reg & TL_COL_SINGLE) >> 16;
1482 1.1 bouyer
1483 1.1 bouyer reg = tl_intreg_read(sc, TL_INT_LERR);
1484 1.1 bouyer oerr_exesscoll = (reg & TL_LERR_ECOLL);
1485 1.1 bouyer oerr_latecoll = (reg & TL_LERR_LCOLL) >> 8;
1486 1.1 bouyer oerr_carrloss = (reg & TL_LERR_CL) >> 16;
1487 1.1 bouyer
1488 1.1 bouyer
1489 1.1 bouyer sc->stats_exesscoll += oerr_exesscoll;
1490 1.1 bouyer ifp->if_oerrors += oerr_underr + oerr_exesscoll + oerr_latecoll +
1491 1.1 bouyer oerr_carrloss;
1492 1.1 bouyer ifp->if_collisions += oerr_coll + oerr_multicoll;
1493 1.1 bouyer ifp->if_ierrors += ierr_overr + ierr_code + ierr_crc;
1494 1.1 bouyer
1495 1.1 bouyer if (ierr_overr)
1496 1.1 bouyer printf("%s: receiver ring buffer overrun\n", sc->sc_dev.dv_xname);
1497 1.1 bouyer if (oerr_underr)
1498 1.1 bouyer printf("%s: transmit buffer underrun\n", sc->sc_dev.dv_xname);
1499 1.1 bouyer #ifdef TL_PRIV_STATS
1500 1.1 bouyer sc->ierr_overr += ierr_overr;
1501 1.1 bouyer sc->ierr_code += ierr_code;
1502 1.1 bouyer sc->ierr_crc += ierr_crc;
1503 1.1 bouyer sc->oerr_underr += oerr_underr;
1504 1.1 bouyer sc->oerr_deffered += oerr_deffered;
1505 1.1 bouyer sc->oerr_coll += oerr_coll;
1506 1.1 bouyer sc->oerr_multicoll += oerr_multicoll;
1507 1.1 bouyer sc->oerr_exesscoll += oerr_exesscoll;
1508 1.1 bouyer sc->oerr_latecoll += oerr_latecoll;
1509 1.1 bouyer sc->oerr_carrloss += oerr_carrloss;
1510 1.1 bouyer #endif
1511 1.1 bouyer }
1512 1.1 bouyer
1513 1.1 bouyer static void tl_addr_filter(sc)
1514 1.1 bouyer tl_softc_t *sc;
1515 1.1 bouyer {
1516 1.1 bouyer struct ether_multistep step;
1517 1.1 bouyer struct ether_multi *enm;
1518 1.1 bouyer u_int32_t hash[2] = {0, 0};
1519 1.1 bouyer int i;
1520 1.1 bouyer
1521 1.1 bouyer sc->tl_if.if_flags &= ~IFF_ALLMULTI;
1522 1.1 bouyer ETHER_FIRST_MULTI(step, &sc->tl_ec, enm);
1523 1.1 bouyer while (enm != NULL) {
1524 1.1 bouyer #ifdef TLDEBUG
1525 1.1 bouyer printf("tl_addr_filter: addrs %s %s\n", ether_sprintf(enm->enm_addrlo), ether_sprintf(enm->enm_addrhi));
1526 1.1 bouyer #endif
1527 1.1 bouyer if (memcmp(enm->enm_addrlo, enm->enm_addrhi, 6) == 0) {
1528 1.1 bouyer i = tl_multicast_hash(enm->enm_addrlo);
1529 1.1 bouyer hash[i/32] |= 1 << (i%32);
1530 1.1 bouyer } else {
1531 1.1 bouyer hash[0] = hash[1] = 0xffffffff;
1532 1.1 bouyer sc->tl_if.if_flags |= IFF_ALLMULTI;
1533 1.1 bouyer break;
1534 1.1 bouyer }
1535 1.1 bouyer ETHER_NEXT_MULTI(step, enm);
1536 1.1 bouyer }
1537 1.1 bouyer #ifdef TLDEBUG
1538 1.1 bouyer printf("tl_addr_filer: hash1 %x has2 %x\n", hash[0], hash[1]);
1539 1.1 bouyer #endif
1540 1.1 bouyer tl_intreg_write(sc, TL_INT_HASH1, hash[0]);
1541 1.1 bouyer tl_intreg_write(sc, TL_INT_HASH2, hash[1]);
1542 1.1 bouyer }
1543 1.1 bouyer
1544 1.1 bouyer static int tl_multicast_hash(a)
1545 1.1 bouyer u_int8_t *a;
1546 1.1 bouyer {
1547 1.1 bouyer int hash;
1548 1.1 bouyer
1549 1.1 bouyer #define DA(addr,bit) (addr[5 - (bit/8)] & (1 << bit%8))
1550 1.1 bouyer #define xor8(a,b,c,d,e,f,g,h) (((a != 0) + (b != 0) + (c != 0) + (d != 0) + (e != 0) + (f != 0) + (g != 0) + (h != 0)) & 1)
1551 1.1 bouyer
1552 1.1 bouyer hash = xor8( DA(a,0), DA(a, 6), DA(a,12), DA(a,18), DA(a,24), DA(a,30),
1553 1.1 bouyer DA(a,36), DA(a,42));
1554 1.1 bouyer hash |= xor8( DA(a,1), DA(a, 7), DA(a,13), DA(a,19), DA(a,25), DA(a,31),
1555 1.1 bouyer DA(a,37), DA(a,43)) << 1;
1556 1.1 bouyer hash |= xor8( DA(a,2), DA(a, 8), DA(a,14), DA(a,20), DA(a,26), DA(a,32),
1557 1.1 bouyer DA(a,38), DA(a,44)) << 2;
1558 1.1 bouyer hash |= xor8( DA(a,3), DA(a, 9), DA(a,15), DA(a,21), DA(a,27), DA(a,33),
1559 1.1 bouyer DA(a,39), DA(a,45)) << 3;
1560 1.1 bouyer hash |= xor8( DA(a,4), DA(a,10), DA(a,16), DA(a,22), DA(a,28), DA(a,34),
1561 1.1 bouyer DA(a,40), DA(a,46)) << 4;
1562 1.1 bouyer hash |= xor8( DA(a,5), DA(a,11), DA(a,17), DA(a,23), DA(a,29), DA(a,35),
1563 1.1 bouyer DA(a,41), DA(a,47)) << 5;
1564 1.1 bouyer
1565 1.1 bouyer return hash;
1566 1.1 bouyer }
1567 1.1 bouyer
1568 1.1 bouyer #if defined(TLDEBUG_RX)
1569 1.1 bouyer void ether_printheader(eh)
1570 1.1 bouyer struct ether_header *eh;
1571 1.1 bouyer {
1572 1.1 bouyer u_char *c = (char*)eh;
1573 1.1 bouyer int i;
1574 1.1 bouyer for (i=0; i<sizeof(struct ether_header); i++)
1575 1.1 bouyer printf("%x ", (u_int)c[i]);
1576 1.1 bouyer printf("\n");
1577 1.1 bouyer }
1578 1.1 bouyer #endif
1579