if_tl.c revision 1.119 1 1.119 thorpej /* $NetBSD: if_tl.c,v 1.119 2020/01/30 05:24:53 thorpej Exp $ */
2 1.1 bouyer
3 1.1 bouyer /*
4 1.1 bouyer * Copyright (c) 1997 Manuel Bouyer. All rights reserved.
5 1.1 bouyer *
6 1.1 bouyer * Redistribution and use in source and binary forms, with or without
7 1.1 bouyer * modification, are permitted provided that the following conditions
8 1.1 bouyer * are met:
9 1.1 bouyer * 1. Redistributions of source code must retain the above copyright
10 1.1 bouyer * notice, this list of conditions and the following disclaimer.
11 1.1 bouyer * 2. Redistributions in binary form must reproduce the above copyright
12 1.1 bouyer * notice, this list of conditions and the following disclaimer in the
13 1.1 bouyer * documentation and/or other materials provided with the distribution.
14 1.1 bouyer *
15 1.1 bouyer * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 1.1 bouyer * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 1.1 bouyer * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 1.1 bouyer * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 1.1 bouyer * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 1.1 bouyer * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 1.1 bouyer * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 1.1 bouyer * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 1.1 bouyer * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 1.1 bouyer * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 1.1 bouyer */
26 1.1 bouyer
27 1.1 bouyer /*
28 1.2 bouyer * Texas Instruments ThunderLAN ethernet controller
29 1.1 bouyer * ThunderLAN Programmer's Guide (TI Literature Number SPWU013A)
30 1.1 bouyer * available from www.ti.com
31 1.1 bouyer */
32 1.47 lukem
33 1.47 lukem #include <sys/cdefs.h>
34 1.119 thorpej __KERNEL_RCSID(0, "$NetBSD: if_tl.c,v 1.119 2020/01/30 05:24:53 thorpej Exp $");
35 1.1 bouyer
36 1.1 bouyer #undef TLDEBUG
37 1.1 bouyer #define TL_PRIV_STATS
38 1.1 bouyer #undef TLDEBUG_RX
39 1.1 bouyer #undef TLDEBUG_TX
40 1.1 bouyer #undef TLDEBUG_ADDR
41 1.12 jonathan
42 1.12 jonathan #include "opt_inet.h"
43 1.1 bouyer
44 1.1 bouyer #include <sys/param.h>
45 1.1 bouyer #include <sys/systm.h>
46 1.1 bouyer #include <sys/mbuf.h>
47 1.1 bouyer #include <sys/protosw.h>
48 1.1 bouyer #include <sys/socket.h>
49 1.1 bouyer #include <sys/ioctl.h>
50 1.1 bouyer #include <sys/errno.h>
51 1.1 bouyer #include <sys/malloc.h>
52 1.1 bouyer #include <sys/kernel.h>
53 1.1 bouyer #include <sys/proc.h> /* only for declaration of wakeup() used by vm.h */
54 1.1 bouyer #include <sys/device.h>
55 1.1 bouyer
56 1.1 bouyer #include <net/if.h>
57 1.1 bouyer #include <net/if_media.h>
58 1.1 bouyer #include <net/if_types.h>
59 1.1 bouyer #include <net/if_dl.h>
60 1.1 bouyer #include <net/route.h>
61 1.1 bouyer #include <net/netisr.h>
62 1.1 bouyer #include <net/bpf.h>
63 1.1 bouyer
64 1.102 riastrad #include <sys/rndsource.h>
65 1.67 dan
66 1.1 bouyer #ifdef INET
67 1.1 bouyer #include <netinet/in.h>
68 1.1 bouyer #include <netinet/in_systm.h>
69 1.1 bouyer #include <netinet/in_var.h>
70 1.1 bouyer #include <netinet/ip.h>
71 1.1 bouyer #endif
72 1.1 bouyer
73 1.1 bouyer
74 1.1 bouyer #if defined(__NetBSD__)
75 1.1 bouyer #include <net/if_ether.h>
76 1.1 bouyer #if defined(INET)
77 1.1 bouyer #include <netinet/if_inarp.h>
78 1.1 bouyer #endif
79 1.4 thorpej
80 1.84 ad #include <sys/bus.h>
81 1.84 ad #include <sys/intr.h>
82 1.4 thorpej
83 1.1 bouyer #include <dev/pci/pcireg.h>
84 1.1 bouyer #include <dev/pci/pcivar.h>
85 1.1 bouyer #include <dev/pci/pcidevs.h>
86 1.15 thorpej
87 1.58 thorpej #include <dev/i2c/i2cvar.h>
88 1.58 thorpej #include <dev/i2c/i2c_bitbang.h>
89 1.58 thorpej #include <dev/i2c/at24cxxvar.h>
90 1.15 thorpej
91 1.15 thorpej #include <dev/mii/mii.h>
92 1.15 thorpej #include <dev/mii/miivar.h>
93 1.15 thorpej
94 1.15 thorpej #include <dev/mii/tlphyvar.h>
95 1.15 thorpej
96 1.1 bouyer #include <dev/pci/if_tlregs.h>
97 1.15 thorpej #include <dev/pci/if_tlvar.h>
98 1.1 bouyer #endif /* __NetBSD__ */
99 1.1 bouyer
100 1.1 bouyer /* number of transmit/receive buffers */
101 1.59 tsutsui #ifndef TL_NBUF
102 1.62 tsutsui #define TL_NBUF 32
103 1.1 bouyer #endif
104 1.1 bouyer
105 1.89 tsutsui static int tl_pci_match(device_t, cfdata_t, void *);
106 1.89 tsutsui static void tl_pci_attach(device_t, device_t, void *);
107 1.68 perry static int tl_intr(void *);
108 1.68 perry
109 1.82 christos static int tl_ifioctl(struct ifnet *, ioctl_cmd_t, void *);
110 1.68 perry static int tl_mediachange(struct ifnet *);
111 1.68 perry static void tl_ifwatchdog(struct ifnet *);
112 1.92 tsutsui static bool tl_shutdown(device_t, int);
113 1.68 perry
114 1.68 perry static void tl_ifstart(struct ifnet *);
115 1.89 tsutsui static void tl_reset(tl_softc_t *);
116 1.68 perry static int tl_init(struct ifnet *);
117 1.68 perry static void tl_stop(struct ifnet *, int);
118 1.89 tsutsui static void tl_restart(void *);
119 1.89 tsutsui static int tl_add_RxBuff(tl_softc_t *, struct Rx_list *, struct mbuf *);
120 1.89 tsutsui static void tl_read_stats(tl_softc_t *);
121 1.89 tsutsui static void tl_ticks(void *);
122 1.89 tsutsui static int tl_multicast_hash(uint8_t *);
123 1.89 tsutsui static void tl_addr_filter(tl_softc_t *);
124 1.89 tsutsui
125 1.89 tsutsui static uint32_t tl_intreg_read(tl_softc_t *, uint32_t);
126 1.89 tsutsui static void tl_intreg_write(tl_softc_t *, uint32_t, uint32_t);
127 1.89 tsutsui static uint8_t tl_intreg_read_byte(tl_softc_t *, uint32_t);
128 1.89 tsutsui static void tl_intreg_write_byte(tl_softc_t *, uint32_t, uint8_t);
129 1.1 bouyer
130 1.68 perry void tl_mii_sync(struct tl_softc *);
131 1.89 tsutsui void tl_mii_sendbits(struct tl_softc *, uint32_t, int);
132 1.28 tron
133 1.28 tron
134 1.59 tsutsui #if defined(TLDEBUG_RX)
135 1.89 tsutsui static void ether_printheader(struct ether_header *);
136 1.1 bouyer #endif
137 1.1 bouyer
138 1.111 msaitoh int tl_mii_read(device_t, int, int, uint16_t *);
139 1.111 msaitoh int tl_mii_write(device_t, int, int, uint16_t);
140 1.15 thorpej
141 1.98 matt void tl_statchg(struct ifnet *);
142 1.1 bouyer
143 1.58 thorpej /* I2C glue */
144 1.58 thorpej static int tl_i2c_send_start(void *, int);
145 1.58 thorpej static int tl_i2c_send_stop(void *, int);
146 1.58 thorpej static int tl_i2c_initiate_xfer(void *, i2c_addr_t, int);
147 1.58 thorpej static int tl_i2c_read_byte(void *, uint8_t *, int);
148 1.58 thorpej static int tl_i2c_write_byte(void *, uint8_t, int);
149 1.58 thorpej
150 1.58 thorpej /* I2C bit-bang glue */
151 1.58 thorpej static void tl_i2cbb_set_bits(void *, uint32_t);
152 1.58 thorpej static void tl_i2cbb_set_dir(void *, uint32_t);
153 1.58 thorpej static uint32_t tl_i2cbb_read(void *);
154 1.58 thorpej static const struct i2c_bitbang_ops tl_i2cbb_ops = {
155 1.58 thorpej tl_i2cbb_set_bits,
156 1.58 thorpej tl_i2cbb_set_dir,
157 1.58 thorpej tl_i2cbb_read,
158 1.58 thorpej {
159 1.58 thorpej TL_NETSIO_EDATA, /* SDA */
160 1.58 thorpej TL_NETSIO_ECLOCK, /* SCL */
161 1.58 thorpej TL_NETSIO_ETXEN, /* SDA is output */
162 1.58 thorpej 0, /* SDA is input */
163 1.58 thorpej }
164 1.58 thorpej };
165 1.1 bouyer
166 1.89 tsutsui static inline void netsio_clr(tl_softc_t *, uint8_t);
167 1.89 tsutsui static inline void netsio_set(tl_softc_t *, uint8_t);
168 1.89 tsutsui static inline uint8_t netsio_read(tl_softc_t *, uint8_t);
169 1.89 tsutsui
170 1.89 tsutsui static inline void
171 1.89 tsutsui netsio_clr(tl_softc_t *sc, uint8_t bits)
172 1.1 bouyer {
173 1.89 tsutsui
174 1.1 bouyer tl_intreg_write_byte(sc, TL_INT_NET + TL_INT_NetSio,
175 1.17 bouyer tl_intreg_read_byte(sc, TL_INT_NET + TL_INT_NetSio) & (~bits));
176 1.1 bouyer }
177 1.89 tsutsui
178 1.89 tsutsui static inline void
179 1.89 tsutsui netsio_set(tl_softc_t *sc, uint8_t bits)
180 1.1 bouyer {
181 1.89 tsutsui
182 1.1 bouyer tl_intreg_write_byte(sc, TL_INT_NET + TL_INT_NetSio,
183 1.17 bouyer tl_intreg_read_byte(sc, TL_INT_NET + TL_INT_NetSio) | bits);
184 1.1 bouyer }
185 1.89 tsutsui
186 1.89 tsutsui static inline uint8_t
187 1.89 tsutsui netsio_read(tl_softc_t *sc, uint8_t bits)
188 1.1 bouyer {
189 1.89 tsutsui
190 1.89 tsutsui return tl_intreg_read_byte(sc, TL_INT_NET + TL_INT_NetSio) & bits;
191 1.1 bouyer }
192 1.1 bouyer
193 1.89 tsutsui CFATTACH_DECL_NEW(tl, sizeof(tl_softc_t),
194 1.56 thorpej tl_pci_match, tl_pci_attach, NULL, NULL);
195 1.1 bouyer
196 1.89 tsutsui static const struct tl_product_desc tl_compaq_products[] = {
197 1.15 thorpej { PCI_PRODUCT_COMPAQ_N100TX, TLPHY_MEDIA_NO_10_T,
198 1.22 tron "Compaq Netelligent 10/100 TX" },
199 1.65 bouyer { PCI_PRODUCT_COMPAQ_INT100TX, TLPHY_MEDIA_NO_10_T,
200 1.65 bouyer "Integrated Compaq Netelligent 10/100 TX" },
201 1.15 thorpej { PCI_PRODUCT_COMPAQ_N10T, TLPHY_MEDIA_10_5,
202 1.22 tron "Compaq Netelligent 10 T" },
203 1.69 bouyer { PCI_PRODUCT_COMPAQ_N10T2, TLPHY_MEDIA_10_2,
204 1.69 bouyer "Compaq Netelligent 10 T/2 UTP/Coax" },
205 1.15 thorpej { PCI_PRODUCT_COMPAQ_IntNF3P, TLPHY_MEDIA_10_2,
206 1.22 tron "Compaq Integrated NetFlex 3/P" },
207 1.114 msaitoh { PCI_PRODUCT_COMPAQ_IntPL100TX, TLPHY_MEDIA_10_2 |TLPHY_MEDIA_NO_10_T,
208 1.22 tron "Compaq ProLiant Integrated Netelligent 10/100 TX" },
209 1.114 msaitoh { PCI_PRODUCT_COMPAQ_DPNet100TX, TLPHY_MEDIA_10_5 |TLPHY_MEDIA_NO_10_T,
210 1.22 tron "Compaq Dual Port Netelligent 10/100 TX" },
211 1.114 msaitoh { PCI_PRODUCT_COMPAQ_DP4000, TLPHY_MEDIA_10_5 | TLPHY_MEDIA_NO_10_T,
212 1.22 tron "Compaq Deskpro 4000 5233MMX" },
213 1.15 thorpej { PCI_PRODUCT_COMPAQ_NF3P_BNC, TLPHY_MEDIA_10_2,
214 1.22 tron "Compaq NetFlex 3/P w/ BNC" },
215 1.15 thorpej { PCI_PRODUCT_COMPAQ_NF3P, TLPHY_MEDIA_10_5,
216 1.22 tron "Compaq NetFlex 3/P" },
217 1.4 thorpej { 0, 0, NULL },
218 1.4 thorpej };
219 1.4 thorpej
220 1.89 tsutsui static const struct tl_product_desc tl_ti_products[] = {
221 1.10 thorpej /*
222 1.10 thorpej * Built-in Ethernet on the TI TravelMate 5000
223 1.10 thorpej * docking station; better product description?
224 1.10 thorpej */
225 1.15 thorpej { PCI_PRODUCT_TI_TLAN, 0,
226 1.22 tron "Texas Instruments ThunderLAN" },
227 1.4 thorpej { 0, 0, NULL },
228 1.4 thorpej };
229 1.4 thorpej
230 1.4 thorpej struct tl_vendor_desc {
231 1.89 tsutsui uint32_t tv_vendor;
232 1.4 thorpej const struct tl_product_desc *tv_products;
233 1.4 thorpej };
234 1.4 thorpej
235 1.4 thorpej const struct tl_vendor_desc tl_vendors[] = {
236 1.4 thorpej { PCI_VENDOR_COMPAQ, tl_compaq_products },
237 1.4 thorpej { PCI_VENDOR_TI, tl_ti_products },
238 1.4 thorpej { 0, NULL },
239 1.4 thorpej };
240 1.4 thorpej
241 1.89 tsutsui static const struct tl_product_desc *tl_lookup_product(uint32_t);
242 1.4 thorpej
243 1.89 tsutsui static const struct tl_product_desc *
244 1.89 tsutsui tl_lookup_product(uint32_t id)
245 1.4 thorpej {
246 1.4 thorpej const struct tl_product_desc *tp;
247 1.4 thorpej const struct tl_vendor_desc *tv;
248 1.4 thorpej
249 1.4 thorpej for (tv = tl_vendors; tv->tv_products != NULL; tv++)
250 1.4 thorpej if (PCI_VENDOR(id) == tv->tv_vendor)
251 1.4 thorpej break;
252 1.4 thorpej
253 1.4 thorpej if ((tp = tv->tv_products) == NULL)
254 1.89 tsutsui return NULL;
255 1.4 thorpej
256 1.4 thorpej for (; tp->tp_desc != NULL; tp++)
257 1.4 thorpej if (PCI_PRODUCT(id) == tp->tp_product)
258 1.4 thorpej break;
259 1.4 thorpej
260 1.4 thorpej if (tp->tp_desc == NULL)
261 1.89 tsutsui return NULL;
262 1.4 thorpej
263 1.89 tsutsui return tp;
264 1.4 thorpej }
265 1.4 thorpej
266 1.1 bouyer static int
267 1.89 tsutsui tl_pci_match(device_t parent, cfdata_t cf, void *aux)
268 1.1 bouyer {
269 1.89 tsutsui struct pci_attach_args *pa = (struct pci_attach_args *)aux;
270 1.1 bouyer
271 1.4 thorpej if (tl_lookup_product(pa->pa_id) != NULL)
272 1.89 tsutsui return 1;
273 1.4 thorpej
274 1.89 tsutsui return 0;
275 1.1 bouyer }
276 1.1 bouyer
277 1.1 bouyer static void
278 1.89 tsutsui tl_pci_attach(device_t parent, device_t self, void *aux)
279 1.1 bouyer {
280 1.89 tsutsui tl_softc_t *sc = device_private(self);
281 1.89 tsutsui struct pci_attach_args * const pa = (struct pci_attach_args *)aux;
282 1.4 thorpej const struct tl_product_desc *tp;
283 1.1 bouyer struct ifnet * const ifp = &sc->tl_if;
284 1.114 msaitoh struct mii_data * const mii = &sc->tl_mii;
285 1.1 bouyer bus_space_tag_t iot, memt;
286 1.1 bouyer bus_space_handle_t ioh, memh;
287 1.1 bouyer pci_intr_handle_t intrhandle;
288 1.4 thorpej const char *intrstr;
289 1.58 thorpej int ioh_valid, memh_valid;
290 1.23 bouyer int reg_io, reg_mem;
291 1.23 bouyer pcireg_t reg10, reg14;
292 1.4 thorpej pcireg_t csr;
293 1.100 christos char intrbuf[PCI_INTRSTR_LEN];
294 1.4 thorpej
295 1.89 tsutsui sc->sc_dev = self;
296 1.89 tsutsui aprint_normal("\n");
297 1.4 thorpej
298 1.83 ad callout_init(&sc->tl_tick_ch, 0);
299 1.83 ad callout_init(&sc->tl_restart_ch, 0);
300 1.32 thorpej
301 1.10 thorpej tp = tl_lookup_product(pa->pa_id);
302 1.10 thorpej if (tp == NULL)
303 1.89 tsutsui panic("%s: impossible", __func__);
304 1.15 thorpej sc->tl_product = tp;
305 1.10 thorpej
306 1.23 bouyer /*
307 1.52 wiz * Map the card space. First we have to find the I/O and MEM
308 1.59 tsutsui * registers. I/O is supposed to be at 0x10, MEM at 0x14,
309 1.23 bouyer * but some boards (Compaq Netflex 3/P PCI) seem to have it reversed.
310 1.23 bouyer * The ThunderLAN manual is not consistent about this either (there
311 1.23 bouyer * are both cases in code examples).
312 1.23 bouyer */
313 1.23 bouyer reg10 = pci_conf_read(pa->pa_pc, pa->pa_tag, 0x10);
314 1.23 bouyer reg14 = pci_conf_read(pa->pa_pc, pa->pa_tag, 0x14);
315 1.23 bouyer if (PCI_MAPREG_TYPE(reg10) == PCI_MAPREG_TYPE_IO)
316 1.23 bouyer reg_io = 0x10;
317 1.23 bouyer else if (PCI_MAPREG_TYPE(reg14) == PCI_MAPREG_TYPE_IO)
318 1.23 bouyer reg_io = 0x14;
319 1.23 bouyer else
320 1.23 bouyer reg_io = 0;
321 1.23 bouyer if (PCI_MAPREG_TYPE(reg10) == PCI_MAPREG_TYPE_MEM)
322 1.23 bouyer reg_mem = 0x10;
323 1.23 bouyer else if (PCI_MAPREG_TYPE(reg14) == PCI_MAPREG_TYPE_MEM)
324 1.23 bouyer reg_mem = 0x14;
325 1.23 bouyer else
326 1.23 bouyer reg_mem = 0;
327 1.23 bouyer
328 1.23 bouyer if (reg_io != 0)
329 1.23 bouyer ioh_valid = (pci_mapreg_map(pa, reg_io, PCI_MAPREG_TYPE_IO,
330 1.23 bouyer 0, &iot, &ioh, NULL, NULL) == 0);
331 1.23 bouyer else
332 1.23 bouyer ioh_valid = 0;
333 1.23 bouyer if (reg_mem != 0)
334 1.23 bouyer memh_valid = (pci_mapreg_map(pa, PCI_CBMA,
335 1.23 bouyer PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT,
336 1.23 bouyer 0, &memt, &memh, NULL, NULL) == 0);
337 1.23 bouyer else
338 1.23 bouyer memh_valid = 0;
339 1.4 thorpej
340 1.22 tron if (ioh_valid) {
341 1.22 tron sc->tl_bustag = iot;
342 1.22 tron sc->tl_bushandle = ioh;
343 1.22 tron } else if (memh_valid) {
344 1.4 thorpej sc->tl_bustag = memt;
345 1.4 thorpej sc->tl_bushandle = memh;
346 1.1 bouyer } else {
347 1.89 tsutsui aprint_error_dev(self, "unable to map device registers\n");
348 1.4 thorpej return;
349 1.1 bouyer }
350 1.43 bouyer sc->tl_dmatag = pa->pa_dmat;
351 1.1 bouyer
352 1.4 thorpej /* Enable the device. */
353 1.4 thorpej csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
354 1.4 thorpej pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
355 1.4 thorpej csr | PCI_COMMAND_MASTER_ENABLE);
356 1.1 bouyer
357 1.89 tsutsui aprint_normal_dev(self, "%s\n", tp->tp_desc);
358 1.1 bouyer
359 1.1 bouyer tl_reset(sc);
360 1.1 bouyer
361 1.58 thorpej /* fill in the i2c tag */
362 1.118 thorpej iic_tag_init(&sc->sc_i2c);
363 1.58 thorpej sc->sc_i2c.ic_cookie = sc;
364 1.58 thorpej sc->sc_i2c.ic_send_start = tl_i2c_send_start;
365 1.58 thorpej sc->sc_i2c.ic_send_stop = tl_i2c_send_stop;
366 1.58 thorpej sc->sc_i2c.ic_initiate_xfer = tl_i2c_initiate_xfer;
367 1.58 thorpej sc->sc_i2c.ic_read_byte = tl_i2c_read_byte;
368 1.58 thorpej sc->sc_i2c.ic_write_byte = tl_i2c_write_byte;
369 1.1 bouyer
370 1.1 bouyer #ifdef TLDEBUG
371 1.91 tsutsui aprint_debug_dev(self, "default values of INTreg: 0x%x\n",
372 1.17 bouyer tl_intreg_read(sc, TL_INT_Defaults));
373 1.1 bouyer #endif
374 1.1 bouyer
375 1.1 bouyer /* read mac addr */
376 1.88 tsutsui if (seeprom_bootstrap_read(&sc->sc_i2c, 0x50, 0x83, 256 /* 2kbit */,
377 1.89 tsutsui sc->tl_enaddr, ETHER_ADDR_LEN)) {
378 1.89 tsutsui aprint_error_dev(self, "error reading Ethernet address\n");
379 1.89 tsutsui return;
380 1.1 bouyer }
381 1.89 tsutsui aprint_normal_dev(self, "Ethernet address %s\n",
382 1.17 bouyer ether_sprintf(sc->tl_enaddr));
383 1.1 bouyer
384 1.4 thorpej /* Map and establish interrupts */
385 1.39 sommerfe if (pci_intr_map(pa, &intrhandle)) {
386 1.89 tsutsui aprint_error_dev(self, "couldn't map interrupt\n");
387 1.4 thorpej return;
388 1.4 thorpej }
389 1.105 msaitoh intrstr = pci_intr_string(pa->pa_pc, intrhandle, intrbuf,
390 1.105 msaitoh sizeof(intrbuf));
391 1.49 christos sc->tl_if.if_softc = sc;
392 1.110 jdolecek sc->tl_ih = pci_intr_establish_xname(pa->pa_pc, intrhandle, IPL_NET,
393 1.110 jdolecek tl_intr, sc, device_xname(self));
394 1.4 thorpej if (sc->tl_ih == NULL) {
395 1.89 tsutsui aprint_error_dev(self, "couldn't establish interrupt");
396 1.4 thorpej if (intrstr != NULL)
397 1.89 tsutsui aprint_error(" at %s", intrstr);
398 1.89 tsutsui aprint_error("\n");
399 1.4 thorpej return;
400 1.4 thorpej }
401 1.89 tsutsui aprint_normal_dev(self, "interrupting at %s\n", intrstr);
402 1.4 thorpej
403 1.43 bouyer /* init these pointers, so that tl_shutdown won't try to read them */
404 1.43 bouyer sc->Rx_list = NULL;
405 1.43 bouyer sc->Tx_list = NULL;
406 1.43 bouyer
407 1.46 bouyer /* allocate DMA-safe memory for control structs */
408 1.89 tsutsui if (bus_dmamem_alloc(sc->tl_dmatag, PAGE_SIZE, 0, PAGE_SIZE,
409 1.89 tsutsui &sc->ctrl_segs, 1, &sc->ctrl_nsegs, BUS_DMA_NOWAIT) != 0 ||
410 1.46 bouyer bus_dmamem_map(sc->tl_dmatag, &sc->ctrl_segs,
411 1.89 tsutsui sc->ctrl_nsegs, PAGE_SIZE, (void **)&sc->ctrl,
412 1.89 tsutsui BUS_DMA_NOWAIT | BUS_DMA_COHERENT) != 0) {
413 1.89 tsutsui aprint_error_dev(self, "can't allocate DMA memory for lists\n");
414 1.89 tsutsui return;
415 1.46 bouyer }
416 1.4 thorpej
417 1.15 thorpej /*
418 1.15 thorpej * Initialize our media structures and probe the MII.
419 1.15 thorpej *
420 1.15 thorpej * Note that we don't care about the media instance. We
421 1.15 thorpej * are expecting to have multiple PHYs on the 10/100 cards,
422 1.15 thorpej * and on those cards we exclude the internal PHY from providing
423 1.15 thorpej * 10baseT. By ignoring the instance, it allows us to not have
424 1.15 thorpej * to specify it on the command line when switching media.
425 1.15 thorpej */
426 1.114 msaitoh mii->mii_ifp = ifp;
427 1.114 msaitoh mii->mii_readreg = tl_mii_read;
428 1.114 msaitoh mii->mii_writereg = tl_mii_write;
429 1.114 msaitoh mii->mii_statchg = tl_statchg;
430 1.114 msaitoh sc->tl_ec.ec_mii = mii;
431 1.114 msaitoh ifmedia_init(&mii->mii_media, IFM_IMASK, tl_mediachange,
432 1.85 dyoung ether_mediastatus);
433 1.114 msaitoh mii_attach(self, mii, 0xffffffff, MII_PHY_ANY, MII_OFFSET_ANY, 0);
434 1.114 msaitoh if (LIST_FIRST(&mii->mii_phys) == NULL) {
435 1.114 msaitoh ifmedia_add(&mii->mii_media, IFM_ETHER | IFM_NONE, 0, NULL);
436 1.114 msaitoh ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_NONE);
437 1.15 thorpej } else
438 1.114 msaitoh ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_AUTO);
439 1.57 bouyer
440 1.59 tsutsui /*
441 1.57 bouyer * We can support 802.1Q VLAN-sized frames.
442 1.57 bouyer */
443 1.57 bouyer sc->tl_ec.ec_capabilities |= ETHERCAP_VLAN_MTU;
444 1.1 bouyer
445 1.89 tsutsui strlcpy(ifp->if_xname, device_xname(self), IFNAMSIZ);
446 1.112 msaitoh ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
447 1.1 bouyer ifp->if_ioctl = tl_ifioctl;
448 1.1 bouyer ifp->if_start = tl_ifstart;
449 1.1 bouyer ifp->if_watchdog = tl_ifwatchdog;
450 1.46 bouyer ifp->if_init = tl_init;
451 1.46 bouyer ifp->if_stop = tl_stop;
452 1.1 bouyer ifp->if_timer = 0;
453 1.50 itojun IFQ_SET_READY(&ifp->if_snd);
454 1.1 bouyer if_attach(ifp);
455 1.107 ozaki if_deferred_start_init(ifp, NULL);
456 1.1 bouyer ether_ifattach(&(sc)->tl_if, (sc)->tl_enaddr);
457 1.67 dan
458 1.92 tsutsui /*
459 1.92 tsutsui * Add shutdown hook so that DMA is disabled prior to reboot.
460 1.92 tsutsui * Not doing reboot before the driver initializes.
461 1.92 tsutsui */
462 1.92 tsutsui if (pmf_device_register1(self, NULL, NULL, tl_shutdown))
463 1.92 tsutsui pmf_class_network_register(self, ifp);
464 1.92 tsutsui else
465 1.92 tsutsui aprint_error_dev(self, "couldn't establish power handler\n");
466 1.92 tsutsui
467 1.89 tsutsui rnd_attach_source(&sc->rnd_source, device_xname(self),
468 1.101 tls RND_TYPE_NET, RND_FLAG_DEFAULT);
469 1.1 bouyer }
470 1.1 bouyer
471 1.1 bouyer static void
472 1.89 tsutsui tl_reset(tl_softc_t *sc)
473 1.1 bouyer {
474 1.1 bouyer int i;
475 1.1 bouyer
476 1.1 bouyer /* read stats */
477 1.1 bouyer if (sc->tl_if.if_flags & IFF_RUNNING) {
478 1.32 thorpej callout_stop(&sc->tl_tick_ch);
479 1.1 bouyer tl_read_stats(sc);
480 1.1 bouyer }
481 1.1 bouyer /* Reset adapter */
482 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_CMD,
483 1.17 bouyer TL_HR_READ(sc, TL_HOST_CMD) | HOST_CMD_Ad_Rst);
484 1.1 bouyer DELAY(100000);
485 1.1 bouyer /* Disable interrupts */
486 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_CMD, HOST_CMD_IntOff);
487 1.1 bouyer /* setup aregs & hash */
488 1.1 bouyer for (i = TL_INT_Areg0; i <= TL_INT_HASH2; i = i + 4)
489 1.1 bouyer tl_intreg_write(sc, i, 0);
490 1.1 bouyer #ifdef TLDEBUG_ADDR
491 1.1 bouyer printf("Areg & hash registers: \n");
492 1.1 bouyer for (i = TL_INT_Areg0; i <= TL_INT_HASH2; i = i + 4)
493 1.1 bouyer printf(" reg %x: %x\n", i, tl_intreg_read(sc, i));
494 1.1 bouyer #endif
495 1.1 bouyer /* Setup NetConfig */
496 1.1 bouyer tl_intreg_write(sc, TL_INT_NetConfig,
497 1.17 bouyer TL_NETCONFIG_1F | TL_NETCONFIG_1chn | TL_NETCONFIG_PHY_EN);
498 1.1 bouyer /* Bsize: accept default */
499 1.1 bouyer /* TX commit in Acommit: accept default */
500 1.1 bouyer /* Load Ld_tmr and Ld_thr */
501 1.1 bouyer /* Ld_tmr = 3 */
502 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_CMD, 0x3 | HOST_CMD_LdTmr);
503 1.1 bouyer /* Ld_thr = 0 */
504 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_CMD, 0x0 | HOST_CMD_LdThr);
505 1.1 bouyer /* Unreset MII */
506 1.1 bouyer netsio_set(sc, TL_NETSIO_NMRST);
507 1.1 bouyer DELAY(100000);
508 1.15 thorpej sc->tl_mii.mii_media_status &= ~IFM_ACTIVE;
509 1.1 bouyer }
510 1.1 bouyer
511 1.92 tsutsui static bool
512 1.92 tsutsui tl_shutdown(device_t self, int howto)
513 1.1 bouyer {
514 1.92 tsutsui tl_softc_t *sc = device_private(self);
515 1.92 tsutsui struct ifnet *ifp = &sc->tl_if;
516 1.92 tsutsui
517 1.92 tsutsui tl_stop(ifp, 1);
518 1.89 tsutsui
519 1.92 tsutsui return true;
520 1.46 bouyer }
521 1.46 bouyer
522 1.89 tsutsui static void
523 1.89 tsutsui tl_stop(struct ifnet *ifp, int disable)
524 1.46 bouyer {
525 1.46 bouyer tl_softc_t *sc = ifp->if_softc;
526 1.1 bouyer struct Tx_list *Tx;
527 1.1 bouyer int i;
528 1.59 tsutsui
529 1.46 bouyer if ((ifp->if_flags & IFF_RUNNING) == 0)
530 1.1 bouyer return;
531 1.1 bouyer /* disable interrupts */
532 1.17 bouyer TL_HR_WRITE(sc, TL_HOST_CMD, HOST_CMD_IntOff);
533 1.1 bouyer /* stop TX and RX channels */
534 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_CMD,
535 1.17 bouyer HOST_CMD_STOP | HOST_CMD_RT | HOST_CMD_Nes);
536 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_CMD, HOST_CMD_STOP);
537 1.1 bouyer DELAY(100000);
538 1.1 bouyer
539 1.59 tsutsui /* stop statistics reading loop, read stats */
540 1.32 thorpej callout_stop(&sc->tl_tick_ch);
541 1.1 bouyer tl_read_stats(sc);
542 1.26 thorpej
543 1.26 thorpej /* Down the MII. */
544 1.26 thorpej mii_down(&sc->tl_mii);
545 1.1 bouyer
546 1.1 bouyer /* deallocate memory allocations */
547 1.43 bouyer if (sc->Rx_list) {
548 1.89 tsutsui for (i = 0; i< TL_NBUF; i++) {
549 1.43 bouyer if (sc->Rx_list[i].m) {
550 1.43 bouyer bus_dmamap_unload(sc->tl_dmatag,
551 1.43 bouyer sc->Rx_list[i].m_dmamap);
552 1.43 bouyer m_freem(sc->Rx_list[i].m);
553 1.43 bouyer }
554 1.59 tsutsui bus_dmamap_destroy(sc->tl_dmatag,
555 1.44 bouyer sc->Rx_list[i].m_dmamap);
556 1.43 bouyer sc->Rx_list[i].m = NULL;
557 1.43 bouyer }
558 1.43 bouyer free(sc->Rx_list, M_DEVBUF);
559 1.43 bouyer sc->Rx_list = NULL;
560 1.43 bouyer bus_dmamap_unload(sc->tl_dmatag, sc->Rx_dmamap);
561 1.44 bouyer bus_dmamap_destroy(sc->tl_dmatag, sc->Rx_dmamap);
562 1.43 bouyer sc->hw_Rx_list = NULL;
563 1.43 bouyer while ((Tx = sc->active_Tx) != NULL) {
564 1.43 bouyer Tx->hw_list->stat = 0;
565 1.43 bouyer bus_dmamap_unload(sc->tl_dmatag, Tx->m_dmamap);
566 1.44 bouyer bus_dmamap_destroy(sc->tl_dmatag, Tx->m_dmamap);
567 1.43 bouyer m_freem(Tx->m);
568 1.43 bouyer sc->active_Tx = Tx->next;
569 1.43 bouyer Tx->next = sc->Free_Tx;
570 1.43 bouyer sc->Free_Tx = Tx;
571 1.43 bouyer }
572 1.43 bouyer sc->last_Tx = NULL;
573 1.43 bouyer free(sc->Tx_list, M_DEVBUF);
574 1.43 bouyer sc->Tx_list = NULL;
575 1.43 bouyer bus_dmamap_unload(sc->tl_dmatag, sc->Tx_dmamap);
576 1.44 bouyer bus_dmamap_destroy(sc->tl_dmatag, sc->Tx_dmamap);
577 1.43 bouyer sc->hw_Tx_list = NULL;
578 1.1 bouyer }
579 1.46 bouyer ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
580 1.46 bouyer ifp->if_timer = 0;
581 1.15 thorpej sc->tl_mii.mii_media_status &= ~IFM_ACTIVE;
582 1.1 bouyer }
583 1.1 bouyer
584 1.89 tsutsui static void
585 1.89 tsutsui tl_restart(void *v)
586 1.1 bouyer {
587 1.89 tsutsui
588 1.1 bouyer tl_init(v);
589 1.1 bouyer }
590 1.1 bouyer
591 1.89 tsutsui static int
592 1.89 tsutsui tl_init(struct ifnet *ifp)
593 1.1 bouyer {
594 1.46 bouyer tl_softc_t *sc = ifp->if_softc;
595 1.43 bouyer int i, s, error;
596 1.79 rumble bus_size_t boundary;
597 1.79 rumble prop_number_t prop_boundary;
598 1.70 christos const char *errstring;
599 1.44 bouyer char *nullbuf;
600 1.1 bouyer
601 1.14 mycroft s = splnet();
602 1.1 bouyer /* cancel any pending IO */
603 1.46 bouyer tl_stop(ifp, 1);
604 1.1 bouyer tl_reset(sc);
605 1.1 bouyer if ((sc->tl_if.if_flags & IFF_UP) == 0) {
606 1.1 bouyer splx(s);
607 1.1 bouyer return 0;
608 1.1 bouyer }
609 1.1 bouyer /* Set various register to reasonable value */
610 1.1 bouyer /* setup NetCmd in promisc mode if needed */
611 1.1 bouyer i = (ifp->if_flags & IFF_PROMISC) ? TL_NETCOMMAND_CAF : 0;
612 1.1 bouyer tl_intreg_write_byte(sc, TL_INT_NET + TL_INT_NetCmd,
613 1.17 bouyer TL_NETCOMMAND_NRESET | TL_NETCOMMAND_NWRAP | i);
614 1.1 bouyer /* Max receive size : MCLBYTES */
615 1.1 bouyer tl_intreg_write_byte(sc, TL_INT_MISC + TL_MISC_MaxRxL, MCLBYTES & 0xff);
616 1.1 bouyer tl_intreg_write_byte(sc, TL_INT_MISC + TL_MISC_MaxRxH,
617 1.17 bouyer (MCLBYTES >> 8) & 0xff);
618 1.1 bouyer
619 1.1 bouyer /* init MAC addr */
620 1.1 bouyer for (i = 0; i < ETHER_ADDR_LEN; i++)
621 1.1 bouyer tl_intreg_write_byte(sc, TL_INT_Areg0 + i , sc->tl_enaddr[i]);
622 1.1 bouyer /* add multicast filters */
623 1.1 bouyer tl_addr_filter(sc);
624 1.1 bouyer #ifdef TLDEBUG_ADDR
625 1.1 bouyer printf("Wrote Mac addr, Areg & hash registers are now: \n");
626 1.1 bouyer for (i = TL_INT_Areg0; i <= TL_INT_HASH2; i = i + 4)
627 1.1 bouyer printf(" reg %x: %x\n", i, tl_intreg_read(sc, i));
628 1.1 bouyer #endif
629 1.1 bouyer
630 1.1 bouyer /* Pre-allocate receivers mbuf, make the lists */
631 1.17 bouyer sc->Rx_list = malloc(sizeof(struct Rx_list) * TL_NBUF, M_DEVBUF,
632 1.114 msaitoh M_NOWAIT | M_ZERO);
633 1.17 bouyer sc->Tx_list = malloc(sizeof(struct Tx_list) * TL_NBUF, M_DEVBUF,
634 1.114 msaitoh M_NOWAIT | M_ZERO);
635 1.1 bouyer if (sc->Rx_list == NULL || sc->Tx_list == NULL) {
636 1.43 bouyer errstring = "out of memory for lists";
637 1.43 bouyer error = ENOMEM;
638 1.43 bouyer goto bad;
639 1.43 bouyer }
640 1.79 rumble
641 1.79 rumble /*
642 1.79 rumble * Some boards (Set Engineering GFE) do not permit DMA transfers
643 1.79 rumble * across page boundaries.
644 1.79 rumble */
645 1.89 tsutsui prop_boundary = prop_dictionary_get(device_properties(sc->sc_dev),
646 1.79 rumble "tl-dma-page-boundary");
647 1.79 rumble if (prop_boundary != NULL) {
648 1.80 rumble KASSERT(prop_object_type(prop_boundary) == PROP_TYPE_NUMBER);
649 1.79 rumble boundary = (bus_size_t)prop_number_integer_value(prop_boundary);
650 1.79 rumble } else {
651 1.79 rumble boundary = 0;
652 1.79 rumble }
653 1.79 rumble
654 1.43 bouyer error = bus_dmamap_create(sc->tl_dmatag,
655 1.43 bouyer sizeof(struct tl_Rx_list) * TL_NBUF, 1,
656 1.43 bouyer sizeof(struct tl_Rx_list) * TL_NBUF, 0, BUS_DMA_WAITOK,
657 1.43 bouyer &sc->Rx_dmamap);
658 1.43 bouyer if (error == 0)
659 1.43 bouyer error = bus_dmamap_create(sc->tl_dmatag,
660 1.43 bouyer sizeof(struct tl_Tx_list) * TL_NBUF, 1,
661 1.79 rumble sizeof(struct tl_Tx_list) * TL_NBUF, boundary,
662 1.79 rumble BUS_DMA_WAITOK, &sc->Tx_dmamap);
663 1.59 tsutsui if (error == 0)
664 1.44 bouyer error = bus_dmamap_create(sc->tl_dmatag, ETHER_MIN_TX, 1,
665 1.79 rumble ETHER_MIN_TX, boundary, BUS_DMA_WAITOK,
666 1.44 bouyer &sc->null_dmamap);
667 1.43 bouyer if (error) {
668 1.43 bouyer errstring = "can't allocate DMA maps for lists";
669 1.43 bouyer goto bad;
670 1.43 bouyer }
671 1.46 bouyer memset(sc->ctrl, 0, PAGE_SIZE);
672 1.46 bouyer sc->hw_Rx_list = (void *)sc->ctrl;
673 1.46 bouyer sc->hw_Tx_list =
674 1.46 bouyer (void *)(sc->ctrl + sizeof(struct tl_Rx_list) * TL_NBUF);
675 1.46 bouyer nullbuf = sc->ctrl + sizeof(struct tl_Rx_list) * TL_NBUF +
676 1.44 bouyer sizeof(struct tl_Tx_list) * TL_NBUF;
677 1.44 bouyer error = bus_dmamap_load(sc->tl_dmatag, sc->Rx_dmamap,
678 1.44 bouyer sc->hw_Rx_list, sizeof(struct tl_Rx_list) * TL_NBUF, NULL,
679 1.44 bouyer BUS_DMA_WAITOK);
680 1.43 bouyer if (error == 0)
681 1.43 bouyer error = bus_dmamap_load(sc->tl_dmatag, sc->Tx_dmamap,
682 1.43 bouyer sc->hw_Tx_list, sizeof(struct tl_Tx_list) * TL_NBUF, NULL,
683 1.43 bouyer BUS_DMA_WAITOK);
684 1.44 bouyer if (error == 0)
685 1.44 bouyer error = bus_dmamap_load(sc->tl_dmatag, sc->null_dmamap,
686 1.44 bouyer nullbuf, ETHER_MIN_TX, NULL, BUS_DMA_WAITOK);
687 1.43 bouyer if (error) {
688 1.44 bouyer errstring = "can't DMA map DMA memory for lists";
689 1.43 bouyer goto bad;
690 1.1 bouyer }
691 1.89 tsutsui for (i = 0; i < TL_NBUF; i++) {
692 1.43 bouyer error = bus_dmamap_create(sc->tl_dmatag, MCLBYTES,
693 1.79 rumble 1, MCLBYTES, boundary, BUS_DMA_WAITOK | BUS_DMA_ALLOCNOW,
694 1.43 bouyer &sc->Rx_list[i].m_dmamap);
695 1.43 bouyer if (error == 0) {
696 1.43 bouyer error = bus_dmamap_create(sc->tl_dmatag, MCLBYTES,
697 1.79 rumble TL_NSEG, MCLBYTES, boundary,
698 1.43 bouyer BUS_DMA_WAITOK | BUS_DMA_ALLOCNOW,
699 1.43 bouyer &sc->Tx_list[i].m_dmamap);
700 1.43 bouyer }
701 1.43 bouyer if (error) {
702 1.43 bouyer errstring = "can't allocate DMA maps for mbufs";
703 1.43 bouyer goto bad;
704 1.43 bouyer }
705 1.43 bouyer sc->Rx_list[i].hw_list = &sc->hw_Rx_list[i];
706 1.43 bouyer sc->Rx_list[i].hw_listaddr = sc->Rx_dmamap->dm_segs[0].ds_addr
707 1.43 bouyer + sizeof(struct tl_Rx_list) * i;
708 1.43 bouyer sc->Tx_list[i].hw_list = &sc->hw_Tx_list[i];
709 1.43 bouyer sc->Tx_list[i].hw_listaddr = sc->Tx_dmamap->dm_segs[0].ds_addr
710 1.43 bouyer + sizeof(struct tl_Tx_list) * i;
711 1.43 bouyer if (tl_add_RxBuff(sc, &sc->Rx_list[i], NULL) == 0) {
712 1.43 bouyer errstring = "out of mbuf for receive list";
713 1.43 bouyer error = ENOMEM;
714 1.43 bouyer goto bad;
715 1.1 bouyer }
716 1.1 bouyer if (i > 0) { /* chain the list */
717 1.59 tsutsui sc->Rx_list[i - 1].next = &sc->Rx_list[i];
718 1.59 tsutsui sc->hw_Rx_list[i - 1].fwd =
719 1.43 bouyer htole32(sc->Rx_list[i].hw_listaddr);
720 1.59 tsutsui sc->Tx_list[i - 1].next = &sc->Tx_list[i];
721 1.1 bouyer }
722 1.1 bouyer }
723 1.59 tsutsui sc->hw_Rx_list[TL_NBUF - 1].fwd = 0;
724 1.60 tsutsui sc->Rx_list[TL_NBUF - 1].next = NULL;
725 1.59 tsutsui sc->hw_Tx_list[TL_NBUF - 1].fwd = 0;
726 1.59 tsutsui sc->Tx_list[TL_NBUF - 1].next = NULL;
727 1.1 bouyer
728 1.1 bouyer sc->active_Rx = &sc->Rx_list[0];
729 1.59 tsutsui sc->last_Rx = &sc->Rx_list[TL_NBUF - 1];
730 1.1 bouyer sc->active_Tx = sc->last_Tx = NULL;
731 1.1 bouyer sc->Free_Tx = &sc->Tx_list[0];
732 1.43 bouyer bus_dmamap_sync(sc->tl_dmatag, sc->Rx_dmamap, 0,
733 1.43 bouyer sizeof(struct tl_Rx_list) * TL_NBUF,
734 1.43 bouyer BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
735 1.43 bouyer bus_dmamap_sync(sc->tl_dmatag, sc->Tx_dmamap, 0,
736 1.43 bouyer sizeof(struct tl_Tx_list) * TL_NBUF,
737 1.43 bouyer BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
738 1.44 bouyer bus_dmamap_sync(sc->tl_dmatag, sc->null_dmamap, 0, ETHER_MIN_TX,
739 1.43 bouyer BUS_DMASYNC_PREWRITE);
740 1.1 bouyer
741 1.15 thorpej /* set media */
742 1.85 dyoung if ((error = mii_mediachg(&sc->tl_mii)) == ENXIO)
743 1.85 dyoung error = 0;
744 1.85 dyoung else if (error != 0) {
745 1.85 dyoung errstring = "could not set media";
746 1.99 christos goto bad;
747 1.85 dyoung }
748 1.1 bouyer
749 1.1 bouyer /* start ticks calls */
750 1.32 thorpej callout_reset(&sc->tl_tick_ch, hz, tl_ticks, sc);
751 1.64 wiz /* write address of Rx list and enable interrupts */
752 1.43 bouyer TL_HR_WRITE(sc, TL_HOST_CH_PARM, sc->Rx_list[0].hw_listaddr);
753 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_CMD,
754 1.17 bouyer HOST_CMD_GO | HOST_CMD_RT | HOST_CMD_Nes | HOST_CMD_IntOn);
755 1.1 bouyer sc->tl_if.if_flags |= IFF_RUNNING;
756 1.1 bouyer sc->tl_if.if_flags &= ~IFF_OACTIVE;
757 1.90 bouyer splx(s);
758 1.1 bouyer return 0;
759 1.43 bouyer bad:
760 1.89 tsutsui printf("%s: %s\n", device_xname(sc->sc_dev), errstring);
761 1.43 bouyer splx(s);
762 1.43 bouyer return error;
763 1.1 bouyer }
764 1.1 bouyer
765 1.1 bouyer
766 1.89 tsutsui static uint32_t
767 1.89 tsutsui tl_intreg_read(tl_softc_t *sc, uint32_t reg)
768 1.1 bouyer {
769 1.89 tsutsui
770 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_INTR_DIOADR, reg & TL_HOST_DIOADR_MASK);
771 1.1 bouyer return TL_HR_READ(sc, TL_HOST_DIO_DATA);
772 1.1 bouyer }
773 1.1 bouyer
774 1.89 tsutsui static uint8_t
775 1.89 tsutsui tl_intreg_read_byte(tl_softc_t *sc, uint32_t reg)
776 1.1 bouyer {
777 1.89 tsutsui
778 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_INTR_DIOADR,
779 1.17 bouyer (reg & (~0x07)) & TL_HOST_DIOADR_MASK);
780 1.1 bouyer return TL_HR_READ_BYTE(sc, TL_HOST_DIO_DATA + (reg & 0x07));
781 1.1 bouyer }
782 1.1 bouyer
783 1.1 bouyer static void
784 1.89 tsutsui tl_intreg_write(tl_softc_t *sc, uint32_t reg, uint32_t val)
785 1.1 bouyer {
786 1.89 tsutsui
787 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_INTR_DIOADR, reg & TL_HOST_DIOADR_MASK);
788 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_DIO_DATA, val);
789 1.1 bouyer }
790 1.1 bouyer
791 1.1 bouyer static void
792 1.89 tsutsui tl_intreg_write_byte(tl_softc_t *sc, uint32_t reg, uint8_t val)
793 1.1 bouyer {
794 1.89 tsutsui
795 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_INTR_DIOADR,
796 1.17 bouyer (reg & (~0x03)) & TL_HOST_DIOADR_MASK);
797 1.1 bouyer TL_HR_WRITE_BYTE(sc, TL_HOST_DIO_DATA + (reg & 0x03), val);
798 1.1 bouyer }
799 1.1 bouyer
800 1.28 tron void
801 1.89 tsutsui tl_mii_sync(struct tl_softc *sc)
802 1.1 bouyer {
803 1.28 tron int i;
804 1.1 bouyer
805 1.28 tron netsio_clr(sc, TL_NETSIO_MTXEN);
806 1.28 tron for (i = 0; i < 32; i++) {
807 1.28 tron netsio_clr(sc, TL_NETSIO_MCLK);
808 1.28 tron netsio_set(sc, TL_NETSIO_MCLK);
809 1.28 tron }
810 1.1 bouyer }
811 1.1 bouyer
812 1.15 thorpej void
813 1.89 tsutsui tl_mii_sendbits(struct tl_softc *sc, uint32_t data, int nbits)
814 1.1 bouyer {
815 1.28 tron int i;
816 1.1 bouyer
817 1.28 tron netsio_set(sc, TL_NETSIO_MTXEN);
818 1.115 msaitoh for (i = 1 << (nbits - 1); i; i = i >> 1) {
819 1.28 tron netsio_clr(sc, TL_NETSIO_MCLK);
820 1.28 tron netsio_read(sc, TL_NETSIO_MCLK);
821 1.28 tron if (data & i)
822 1.28 tron netsio_set(sc, TL_NETSIO_MDATA);
823 1.28 tron else
824 1.28 tron netsio_clr(sc, TL_NETSIO_MDATA);
825 1.28 tron netsio_set(sc, TL_NETSIO_MCLK);
826 1.28 tron netsio_read(sc, TL_NETSIO_MCLK);
827 1.28 tron }
828 1.1 bouyer }
829 1.1 bouyer
830 1.15 thorpej int
831 1.111 msaitoh tl_mii_read(device_t self, int phy, int reg, uint16_t *val)
832 1.1 bouyer {
833 1.89 tsutsui struct tl_softc *sc = device_private(self);
834 1.111 msaitoh uint16_t data = 0;
835 1.111 msaitoh int i, err;
836 1.28 tron
837 1.28 tron /*
838 1.28 tron * Read the PHY register by manually driving the MII control lines.
839 1.28 tron */
840 1.1 bouyer
841 1.28 tron tl_mii_sync(sc);
842 1.28 tron tl_mii_sendbits(sc, MII_COMMAND_START, 2);
843 1.28 tron tl_mii_sendbits(sc, MII_COMMAND_READ, 2);
844 1.28 tron tl_mii_sendbits(sc, phy, 5);
845 1.28 tron tl_mii_sendbits(sc, reg, 5);
846 1.28 tron
847 1.28 tron netsio_clr(sc, TL_NETSIO_MTXEN);
848 1.28 tron netsio_clr(sc, TL_NETSIO_MCLK);
849 1.28 tron netsio_set(sc, TL_NETSIO_MCLK);
850 1.28 tron netsio_clr(sc, TL_NETSIO_MCLK);
851 1.28 tron
852 1.28 tron err = netsio_read(sc, TL_NETSIO_MDATA);
853 1.28 tron netsio_set(sc, TL_NETSIO_MCLK);
854 1.28 tron
855 1.28 tron /* Even if an error occurs, must still clock out the cycle. */
856 1.28 tron for (i = 0; i < 16; i++) {
857 1.111 msaitoh data <<= 1;
858 1.28 tron netsio_clr(sc, TL_NETSIO_MCLK);
859 1.28 tron if (err == 0 && netsio_read(sc, TL_NETSIO_MDATA))
860 1.111 msaitoh data |= 1;
861 1.28 tron netsio_set(sc, TL_NETSIO_MCLK);
862 1.28 tron }
863 1.28 tron netsio_clr(sc, TL_NETSIO_MCLK);
864 1.28 tron netsio_set(sc, TL_NETSIO_MCLK);
865 1.28 tron
866 1.111 msaitoh *val = data;
867 1.111 msaitoh return err;
868 1.15 thorpej }
869 1.15 thorpej
870 1.111 msaitoh int
871 1.111 msaitoh tl_mii_write(device_t self, int phy, int reg, uint16_t val)
872 1.15 thorpej {
873 1.89 tsutsui struct tl_softc *sc = device_private(self);
874 1.28 tron
875 1.28 tron /*
876 1.28 tron * Write the PHY register by manually driving the MII control lines.
877 1.28 tron */
878 1.28 tron
879 1.28 tron tl_mii_sync(sc);
880 1.28 tron tl_mii_sendbits(sc, MII_COMMAND_START, 2);
881 1.28 tron tl_mii_sendbits(sc, MII_COMMAND_WRITE, 2);
882 1.28 tron tl_mii_sendbits(sc, phy, 5);
883 1.28 tron tl_mii_sendbits(sc, reg, 5);
884 1.28 tron tl_mii_sendbits(sc, MII_COMMAND_ACK, 2);
885 1.28 tron tl_mii_sendbits(sc, val, 16);
886 1.15 thorpej
887 1.28 tron netsio_clr(sc, TL_NETSIO_MCLK);
888 1.28 tron netsio_set(sc, TL_NETSIO_MCLK);
889 1.111 msaitoh
890 1.111 msaitoh return 0;
891 1.15 thorpej }
892 1.15 thorpej
893 1.15 thorpej void
894 1.98 matt tl_statchg(struct ifnet *ifp)
895 1.15 thorpej {
896 1.98 matt tl_softc_t *sc = ifp->if_softc;
897 1.89 tsutsui uint32_t reg;
898 1.15 thorpej
899 1.15 thorpej #ifdef TLDEBUG
900 1.89 tsutsui printf("%s: media %x\n", __func__, sc->tl_mii.mii_media.ifm_media);
901 1.15 thorpej #endif
902 1.15 thorpej
903 1.15 thorpej /*
904 1.15 thorpej * We must keep the ThunderLAN and the PHY in sync as
905 1.15 thorpej * to the status of full-duplex!
906 1.15 thorpej */
907 1.15 thorpej reg = tl_intreg_read_byte(sc, TL_INT_NET + TL_INT_NetCmd);
908 1.15 thorpej if (sc->tl_mii.mii_media_active & IFM_FDX)
909 1.15 thorpej reg |= TL_NETCOMMAND_DUPLEX;
910 1.15 thorpej else
911 1.15 thorpej reg &= ~TL_NETCOMMAND_DUPLEX;
912 1.15 thorpej tl_intreg_write_byte(sc, TL_INT_NET + TL_INT_NetCmd, reg);
913 1.1 bouyer }
914 1.1 bouyer
915 1.58 thorpej /********** I2C glue **********/
916 1.58 thorpej
917 1.58 thorpej static int
918 1.58 thorpej tl_i2c_send_start(void *cookie, int flags)
919 1.58 thorpej {
920 1.58 thorpej
921 1.89 tsutsui return i2c_bitbang_send_start(cookie, flags, &tl_i2cbb_ops);
922 1.58 thorpej }
923 1.58 thorpej
924 1.58 thorpej static int
925 1.58 thorpej tl_i2c_send_stop(void *cookie, int flags)
926 1.58 thorpej {
927 1.58 thorpej
928 1.89 tsutsui return i2c_bitbang_send_stop(cookie, flags, &tl_i2cbb_ops);
929 1.58 thorpej }
930 1.58 thorpej
931 1.58 thorpej static int
932 1.58 thorpej tl_i2c_initiate_xfer(void *cookie, i2c_addr_t addr, int flags)
933 1.58 thorpej {
934 1.58 thorpej
935 1.89 tsutsui return i2c_bitbang_initiate_xfer(cookie, addr, flags, &tl_i2cbb_ops);
936 1.58 thorpej }
937 1.58 thorpej
938 1.58 thorpej static int
939 1.58 thorpej tl_i2c_read_byte(void *cookie, uint8_t *valp, int flags)
940 1.58 thorpej {
941 1.58 thorpej
942 1.89 tsutsui return i2c_bitbang_read_byte(cookie, valp, flags, &tl_i2cbb_ops);
943 1.58 thorpej }
944 1.58 thorpej
945 1.58 thorpej static int
946 1.58 thorpej tl_i2c_write_byte(void *cookie, uint8_t val, int flags)
947 1.58 thorpej {
948 1.58 thorpej
949 1.89 tsutsui return i2c_bitbang_write_byte(cookie, val, flags, &tl_i2cbb_ops);
950 1.58 thorpej }
951 1.58 thorpej
952 1.58 thorpej /********** I2C bit-bang glue **********/
953 1.58 thorpej
954 1.58 thorpej static void
955 1.58 thorpej tl_i2cbb_set_bits(void *cookie, uint32_t bits)
956 1.1 bouyer {
957 1.58 thorpej struct tl_softc *sc = cookie;
958 1.58 thorpej uint8_t reg;
959 1.1 bouyer
960 1.58 thorpej reg = tl_intreg_read_byte(sc, TL_INT_NET + TL_INT_NetSio);
961 1.114 msaitoh reg = (reg & ~(TL_NETSIO_EDATA | TL_NETSIO_ECLOCK)) | bits;
962 1.58 thorpej tl_intreg_write_byte(sc, TL_INT_NET + TL_INT_NetSio, reg);
963 1.1 bouyer }
964 1.1 bouyer
965 1.58 thorpej static void
966 1.58 thorpej tl_i2cbb_set_dir(void *cookie, uint32_t bits)
967 1.1 bouyer {
968 1.58 thorpej struct tl_softc *sc = cookie;
969 1.58 thorpej uint8_t reg;
970 1.1 bouyer
971 1.58 thorpej reg = tl_intreg_read_byte(sc, TL_INT_NET + TL_INT_NetSio);
972 1.58 thorpej reg = (reg & ~TL_NETSIO_ETXEN) | bits;
973 1.58 thorpej tl_intreg_write_byte(sc, TL_INT_NET + TL_INT_NetSio, reg);
974 1.1 bouyer }
975 1.1 bouyer
976 1.58 thorpej static uint32_t
977 1.58 thorpej tl_i2cbb_read(void *cookie)
978 1.1 bouyer {
979 1.1 bouyer
980 1.89 tsutsui return tl_intreg_read_byte(cookie, TL_INT_NET + TL_INT_NetSio);
981 1.1 bouyer }
982 1.58 thorpej
983 1.58 thorpej /********** End of I2C stuff **********/
984 1.1 bouyer
985 1.1 bouyer static int
986 1.89 tsutsui tl_intr(void *v)
987 1.1 bouyer {
988 1.1 bouyer tl_softc_t *sc = v;
989 1.1 bouyer struct ifnet *ifp = &sc->tl_if;
990 1.1 bouyer struct Rx_list *Rx;
991 1.1 bouyer struct Tx_list *Tx;
992 1.1 bouyer struct mbuf *m;
993 1.89 tsutsui uint32_t int_type, int_reg;
994 1.1 bouyer int ack = 0;
995 1.1 bouyer int size;
996 1.1 bouyer
997 1.59 tsutsui int_reg = TL_HR_READ(sc, TL_HOST_INTR_DIOADR);
998 1.1 bouyer int_type = int_reg & TL_INTR_MASK;
999 1.1 bouyer if (int_type == 0)
1000 1.1 bouyer return 0;
1001 1.1 bouyer #if defined(TLDEBUG_RX) || defined(TLDEBUG_TX)
1002 1.105 msaitoh printf("%s: interrupt type %x, intr_reg %x\n",
1003 1.105 msaitoh device_xname(sc->sc_dev), int_type, int_reg);
1004 1.1 bouyer #endif
1005 1.1 bouyer /* disable interrupts */
1006 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_CMD, HOST_CMD_IntOff);
1007 1.114 msaitoh switch (int_type & TL_INTR_MASK) {
1008 1.1 bouyer case TL_INTR_RxEOF:
1009 1.43 bouyer bus_dmamap_sync(sc->tl_dmatag, sc->Rx_dmamap, 0,
1010 1.43 bouyer sizeof(struct tl_Rx_list) * TL_NBUF,
1011 1.43 bouyer BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
1012 1.114 msaitoh while (le32toh(sc->active_Rx->hw_list->stat) &
1013 1.43 bouyer TL_RX_CSTAT_CPLT) {
1014 1.1 bouyer /* dequeue and requeue at end of list */
1015 1.1 bouyer ack++;
1016 1.1 bouyer Rx = sc->active_Rx;
1017 1.1 bouyer sc->active_Rx = Rx->next;
1018 1.43 bouyer bus_dmamap_sync(sc->tl_dmatag, Rx->m_dmamap, 0,
1019 1.61 tsutsui Rx->m_dmamap->dm_mapsize, BUS_DMASYNC_POSTREAD);
1020 1.43 bouyer bus_dmamap_unload(sc->tl_dmatag, Rx->m_dmamap);
1021 1.1 bouyer m = Rx->m;
1022 1.43 bouyer size = le32toh(Rx->hw_list->stat) >> 16;
1023 1.1 bouyer #ifdef TLDEBUG_RX
1024 1.89 tsutsui printf("%s: RX list complete, Rx %p, size=%d\n",
1025 1.89 tsutsui __func__, Rx, size);
1026 1.1 bouyer #endif
1027 1.89 tsutsui if (tl_add_RxBuff(sc, Rx, m) == 0) {
1028 1.17 bouyer /*
1029 1.17 bouyer * No new mbuf, reuse the same. This means
1030 1.17 bouyer * that this packet
1031 1.17 bouyer * is lost
1032 1.17 bouyer */
1033 1.1 bouyer m = NULL;
1034 1.1 bouyer #ifdef TL_PRIV_STATS
1035 1.1 bouyer sc->ierr_nomem++;
1036 1.1 bouyer #endif
1037 1.1 bouyer #ifdef TLDEBUG
1038 1.1 bouyer printf("%s: out of mbuf, lost input packet\n",
1039 1.89 tsutsui device_xname(sc->sc_dev));
1040 1.1 bouyer #endif
1041 1.1 bouyer }
1042 1.1 bouyer Rx->next = NULL;
1043 1.43 bouyer Rx->hw_list->fwd = 0;
1044 1.43 bouyer sc->last_Rx->hw_list->fwd = htole32(Rx->hw_listaddr);
1045 1.1 bouyer sc->last_Rx->next = Rx;
1046 1.1 bouyer sc->last_Rx = Rx;
1047 1.1 bouyer
1048 1.1 bouyer /* deliver packet */
1049 1.1 bouyer if (m) {
1050 1.1 bouyer if (size < sizeof(struct ether_header)) {
1051 1.1 bouyer m_freem(m);
1052 1.1 bouyer continue;
1053 1.1 bouyer }
1054 1.104 ozaki m_set_rcvif(m, ifp);
1055 1.24 thorpej m->m_pkthdr.len = m->m_len = size;
1056 1.1 bouyer #ifdef TLDEBUG_RX
1057 1.89 tsutsui {
1058 1.89 tsutsui struct ether_header *eh =
1059 1.89 tsutsui mtod(m, struct ether_header *);
1060 1.89 tsutsui printf("%s: Rx packet:\n", __func__);
1061 1.89 tsutsui ether_printheader(eh);
1062 1.89 tsutsui }
1063 1.1 bouyer #endif
1064 1.103 ozaki if_percpuq_enqueue(ifp->if_percpuq, m);
1065 1.1 bouyer }
1066 1.1 bouyer }
1067 1.43 bouyer bus_dmamap_sync(sc->tl_dmatag, sc->Rx_dmamap, 0,
1068 1.43 bouyer sizeof(struct tl_Rx_list) * TL_NBUF,
1069 1.43 bouyer BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
1070 1.1 bouyer #ifdef TLDEBUG_RX
1071 1.1 bouyer printf("TL_INTR_RxEOF: ack %d\n", ack);
1072 1.1 bouyer #else
1073 1.1 bouyer if (ack == 0) {
1074 1.1 bouyer printf("%s: EOF intr without anything to read !\n",
1075 1.89 tsutsui device_xname(sc->sc_dev));
1076 1.1 bouyer tl_reset(sc);
1077 1.81 wiz /* schedule reinit of the board */
1078 1.74 rumble callout_reset(&sc->tl_restart_ch, 1, tl_restart, ifp);
1079 1.89 tsutsui return 1;
1080 1.1 bouyer }
1081 1.1 bouyer #endif
1082 1.1 bouyer break;
1083 1.1 bouyer case TL_INTR_RxEOC:
1084 1.1 bouyer ack++;
1085 1.43 bouyer bus_dmamap_sync(sc->tl_dmatag, sc->Rx_dmamap, 0,
1086 1.43 bouyer sizeof(struct tl_Rx_list) * TL_NBUF,
1087 1.43 bouyer BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
1088 1.1 bouyer #ifdef TLDEBUG_RX
1089 1.1 bouyer printf("TL_INTR_RxEOC: ack %d\n", ack);
1090 1.1 bouyer #endif
1091 1.1 bouyer #ifdef DIAGNOSTIC
1092 1.43 bouyer if (le32toh(sc->active_Rx->hw_list->stat) & TL_RX_CSTAT_CPLT) {
1093 1.43 bouyer printf("%s: Rx EOC interrupt and active Tx list not "
1094 1.89 tsutsui "cleared\n", device_xname(sc->sc_dev));
1095 1.1 bouyer return 0;
1096 1.1 bouyer } else
1097 1.59 tsutsui #endif
1098 1.1 bouyer {
1099 1.17 bouyer /*
1100 1.64 wiz * write address of Rx list and send Rx GO command, ack
1101 1.17 bouyer * interrupt and enable interrupts in one command
1102 1.17 bouyer */
1103 1.43 bouyer TL_HR_WRITE(sc, TL_HOST_CH_PARM, sc->active_Rx->hw_listaddr);
1104 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_CMD,
1105 1.17 bouyer HOST_CMD_GO | HOST_CMD_RT | HOST_CMD_Nes | ack | int_type |
1106 1.17 bouyer HOST_CMD_ACK | HOST_CMD_IntOn);
1107 1.1 bouyer return 1;
1108 1.1 bouyer }
1109 1.1 bouyer case TL_INTR_TxEOF:
1110 1.1 bouyer case TL_INTR_TxEOC:
1111 1.43 bouyer bus_dmamap_sync(sc->tl_dmatag, sc->Tx_dmamap, 0,
1112 1.43 bouyer sizeof(struct tl_Tx_list) * TL_NBUF,
1113 1.43 bouyer BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
1114 1.1 bouyer while ((Tx = sc->active_Tx) != NULL) {
1115 1.114 msaitoh if ((le32toh(Tx->hw_list->stat) & TL_TX_CSTAT_CPLT)
1116 1.114 msaitoh == 0)
1117 1.1 bouyer break;
1118 1.1 bouyer ack++;
1119 1.1 bouyer #ifdef TLDEBUG_TX
1120 1.44 bouyer printf("TL_INTR_TxEOC: list 0x%x done\n",
1121 1.44 bouyer (int)Tx->hw_listaddr);
1122 1.1 bouyer #endif
1123 1.43 bouyer Tx->hw_list->stat = 0;
1124 1.43 bouyer bus_dmamap_sync(sc->tl_dmatag, Tx->m_dmamap, 0,
1125 1.61 tsutsui Tx->m_dmamap->dm_mapsize, BUS_DMASYNC_POSTWRITE);
1126 1.43 bouyer bus_dmamap_unload(sc->tl_dmatag, Tx->m_dmamap);
1127 1.1 bouyer m_freem(Tx->m);
1128 1.1 bouyer Tx->m = NULL;
1129 1.1 bouyer sc->active_Tx = Tx->next;
1130 1.1 bouyer if (sc->active_Tx == NULL)
1131 1.1 bouyer sc->last_Tx = NULL;
1132 1.1 bouyer Tx->next = sc->Free_Tx;
1133 1.1 bouyer sc->Free_Tx = Tx;
1134 1.1 bouyer }
1135 1.43 bouyer bus_dmamap_sync(sc->tl_dmatag, sc->Tx_dmamap, 0,
1136 1.43 bouyer sizeof(struct tl_Tx_list) * TL_NBUF,
1137 1.43 bouyer BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
1138 1.1 bouyer /* if this was an EOC, ACK immediatly */
1139 1.45 bouyer if (ack)
1140 1.45 bouyer sc->tl_if.if_flags &= ~IFF_OACTIVE;
1141 1.1 bouyer if (int_type == TL_INTR_TxEOC) {
1142 1.1 bouyer #ifdef TLDEBUG_TX
1143 1.17 bouyer printf("TL_INTR_TxEOC: ack %d (will be set to 1)\n",
1144 1.17 bouyer ack);
1145 1.1 bouyer #endif
1146 1.17 bouyer TL_HR_WRITE(sc, TL_HOST_CMD, 1 | int_type |
1147 1.17 bouyer HOST_CMD_ACK | HOST_CMD_IntOn);
1148 1.89 tsutsui if (sc->active_Tx != NULL) {
1149 1.17 bouyer /* needs a Tx go command */
1150 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_CH_PARM,
1151 1.43 bouyer sc->active_Tx->hw_listaddr);
1152 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_CMD, HOST_CMD_GO);
1153 1.1 bouyer }
1154 1.1 bouyer sc->tl_if.if_timer = 0;
1155 1.107 ozaki if_schedule_deferred_start(&sc->tl_if);
1156 1.1 bouyer return 1;
1157 1.1 bouyer }
1158 1.1 bouyer #ifdef TLDEBUG
1159 1.1 bouyer else {
1160 1.1 bouyer printf("TL_INTR_TxEOF: ack %d\n", ack);
1161 1.1 bouyer }
1162 1.1 bouyer #endif
1163 1.1 bouyer sc->tl_if.if_timer = 0;
1164 1.107 ozaki if_schedule_deferred_start(&sc->tl_if);
1165 1.1 bouyer break;
1166 1.1 bouyer case TL_INTR_Stat:
1167 1.1 bouyer ack++;
1168 1.1 bouyer #ifdef TLDEBUG
1169 1.1 bouyer printf("TL_INTR_Stat: ack %d\n", ack);
1170 1.1 bouyer #endif
1171 1.1 bouyer tl_read_stats(sc);
1172 1.1 bouyer break;
1173 1.1 bouyer case TL_INTR_Adc:
1174 1.1 bouyer if (int_reg & TL_INTVec_MASK) {
1175 1.1 bouyer /* adapter check conditions */
1176 1.17 bouyer printf("%s: check condition, intvect=0x%x, "
1177 1.89 tsutsui "ch_param=0x%x\n", device_xname(sc->sc_dev),
1178 1.17 bouyer int_reg & TL_INTVec_MASK,
1179 1.17 bouyer TL_HR_READ(sc, TL_HOST_CH_PARM));
1180 1.1 bouyer tl_reset(sc);
1181 1.81 wiz /* schedule reinit of the board */
1182 1.74 rumble callout_reset(&sc->tl_restart_ch, 1, tl_restart, ifp);
1183 1.89 tsutsui return 1;
1184 1.1 bouyer } else {
1185 1.89 tsutsui uint8_t netstat;
1186 1.1 bouyer /* Network status */
1187 1.17 bouyer netstat =
1188 1.17 bouyer tl_intreg_read_byte(sc, TL_INT_NET+TL_INT_NetSts);
1189 1.1 bouyer printf("%s: network status, NetSts=%x\n",
1190 1.89 tsutsui device_xname(sc->sc_dev), netstat);
1191 1.1 bouyer /* Ack interrupts */
1192 1.17 bouyer tl_intreg_write_byte(sc, TL_INT_NET+TL_INT_NetSts,
1193 1.59 tsutsui netstat);
1194 1.1 bouyer ack++;
1195 1.1 bouyer }
1196 1.1 bouyer break;
1197 1.1 bouyer default:
1198 1.1 bouyer printf("%s: unhandled interrupt code %x!\n",
1199 1.89 tsutsui device_xname(sc->sc_dev), int_type);
1200 1.1 bouyer ack++;
1201 1.1 bouyer }
1202 1.1 bouyer
1203 1.1 bouyer if (ack) {
1204 1.1 bouyer /* Ack the interrupt and enable interrupts */
1205 1.59 tsutsui TL_HR_WRITE(sc, TL_HOST_CMD, ack | int_type | HOST_CMD_ACK |
1206 1.17 bouyer HOST_CMD_IntOn);
1207 1.97 tls rnd_add_uint32(&sc->rnd_source, int_reg);
1208 1.1 bouyer return 1;
1209 1.1 bouyer }
1210 1.1 bouyer /* ack = 0 ; interrupt was perhaps not our. Just enable interrupts */
1211 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_CMD, HOST_CMD_IntOn);
1212 1.1 bouyer return 0;
1213 1.1 bouyer }
1214 1.1 bouyer
1215 1.1 bouyer static int
1216 1.87 dyoung tl_ifioctl(struct ifnet *ifp, unsigned long cmd, void *data)
1217 1.1 bouyer {
1218 1.1 bouyer struct tl_softc *sc = ifp->if_softc;
1219 1.1 bouyer int s, error;
1220 1.59 tsutsui
1221 1.14 mycroft s = splnet();
1222 1.85 dyoung error = ether_ioctl(ifp, cmd, data);
1223 1.85 dyoung if (error == ENETRESET) {
1224 1.85 dyoung if (ifp->if_flags & IFF_RUNNING)
1225 1.85 dyoung tl_addr_filter(sc);
1226 1.85 dyoung error = 0;
1227 1.1 bouyer }
1228 1.1 bouyer splx(s);
1229 1.1 bouyer return error;
1230 1.1 bouyer }
1231 1.1 bouyer
1232 1.1 bouyer static void
1233 1.89 tsutsui tl_ifstart(struct ifnet *ifp)
1234 1.1 bouyer {
1235 1.1 bouyer tl_softc_t *sc = ifp->if_softc;
1236 1.43 bouyer struct mbuf *mb_head;
1237 1.1 bouyer struct Tx_list *Tx;
1238 1.79 rumble int segment, size;
1239 1.45 bouyer int again, error;
1240 1.59 tsutsui
1241 1.114 msaitoh if ((sc->tl_if.if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING)
1242 1.45 bouyer return;
1243 1.1 bouyer txloop:
1244 1.1 bouyer /* If we don't have more space ... */
1245 1.1 bouyer if (sc->Free_Tx == NULL) {
1246 1.1 bouyer #ifdef TLDEBUG
1247 1.89 tsutsui printf("%s: No free TX list\n", __func__);
1248 1.1 bouyer #endif
1249 1.45 bouyer sc->tl_if.if_flags |= IFF_OACTIVE;
1250 1.1 bouyer return;
1251 1.1 bouyer }
1252 1.1 bouyer /* Grab a paquet for output */
1253 1.50 itojun IFQ_DEQUEUE(&ifp->if_snd, mb_head);
1254 1.1 bouyer if (mb_head == NULL) {
1255 1.1 bouyer #ifdef TLDEBUG_TX
1256 1.89 tsutsui printf("%s: nothing to send\n", __func__);
1257 1.1 bouyer #endif
1258 1.1 bouyer return;
1259 1.1 bouyer }
1260 1.1 bouyer Tx = sc->Free_Tx;
1261 1.1 bouyer sc->Free_Tx = Tx->next;
1262 1.43 bouyer Tx->next = NULL;
1263 1.45 bouyer again = 0;
1264 1.1 bouyer /*
1265 1.1 bouyer * Go through each of the mbufs in the chain and initialize
1266 1.1 bouyer * the transmit list descriptors with the physical address
1267 1.1 bouyer * and size of the mbuf.
1268 1.1 bouyer */
1269 1.1 bouyer tbdinit:
1270 1.43 bouyer memset(Tx->hw_list, 0, sizeof(struct tl_Tx_list));
1271 1.1 bouyer Tx->m = mb_head;
1272 1.43 bouyer size = mb_head->m_pkthdr.len;
1273 1.43 bouyer if ((error = bus_dmamap_load_mbuf(sc->tl_dmatag, Tx->m_dmamap, mb_head,
1274 1.43 bouyer BUS_DMA_NOWAIT)) || (size < ETHER_MIN_TX &&
1275 1.43 bouyer Tx->m_dmamap->dm_nsegs == TL_NSEG)) {
1276 1.43 bouyer struct mbuf *mn;
1277 1.1 bouyer /*
1278 1.17 bouyer * We ran out of segments, or we will. We have to recopy this
1279 1.17 bouyer * mbuf chain first.
1280 1.1 bouyer */
1281 1.43 bouyer if (error == 0)
1282 1.43 bouyer bus_dmamap_unload(sc->tl_dmatag, Tx->m_dmamap);
1283 1.43 bouyer if (again) {
1284 1.43 bouyer /* already copyed, can't do much more */
1285 1.43 bouyer m_freem(mb_head);
1286 1.43 bouyer goto bad;
1287 1.43 bouyer }
1288 1.43 bouyer again = 1;
1289 1.1 bouyer #ifdef TLDEBUG_TX
1290 1.89 tsutsui printf("%s: need to copy mbuf\n", __func__);
1291 1.1 bouyer #endif
1292 1.1 bouyer #ifdef TL_PRIV_STATS
1293 1.1 bouyer sc->oerr_mcopy++;
1294 1.1 bouyer #endif
1295 1.1 bouyer MGETHDR(mn, M_DONTWAIT, MT_DATA);
1296 1.1 bouyer if (mn == NULL) {
1297 1.1 bouyer m_freem(mb_head);
1298 1.1 bouyer goto bad;
1299 1.1 bouyer }
1300 1.1 bouyer if (mb_head->m_pkthdr.len > MHLEN) {
1301 1.1 bouyer MCLGET(mn, M_DONTWAIT);
1302 1.1 bouyer if ((mn->m_flags & M_EXT) == 0) {
1303 1.1 bouyer m_freem(mn);
1304 1.1 bouyer m_freem(mb_head);
1305 1.1 bouyer goto bad;
1306 1.1 bouyer }
1307 1.1 bouyer }
1308 1.1 bouyer m_copydata(mb_head, 0, mb_head->m_pkthdr.len,
1309 1.82 christos mtod(mn, void *));
1310 1.1 bouyer mn->m_pkthdr.len = mn->m_len = mb_head->m_pkthdr.len;
1311 1.1 bouyer m_freem(mb_head);
1312 1.1 bouyer mb_head = mn;
1313 1.1 bouyer goto tbdinit;
1314 1.1 bouyer }
1315 1.79 rumble for (segment = 0; segment < Tx->m_dmamap->dm_nsegs; segment++) {
1316 1.79 rumble Tx->hw_list->seg[segment].data_addr =
1317 1.79 rumble htole32(Tx->m_dmamap->dm_segs[segment].ds_addr);
1318 1.79 rumble Tx->hw_list->seg[segment].data_count =
1319 1.79 rumble htole32(Tx->m_dmamap->dm_segs[segment].ds_len);
1320 1.43 bouyer }
1321 1.61 tsutsui bus_dmamap_sync(sc->tl_dmatag, Tx->m_dmamap, 0,
1322 1.61 tsutsui Tx->m_dmamap->dm_mapsize,
1323 1.43 bouyer BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
1324 1.1 bouyer /* We are at end of mbuf chain. check the size and
1325 1.1 bouyer * see if it needs to be extended
1326 1.59 tsutsui */
1327 1.1 bouyer if (size < ETHER_MIN_TX) {
1328 1.1 bouyer #ifdef DIAGNOSTIC
1329 1.79 rumble if (segment >= TL_NSEG) {
1330 1.89 tsutsui panic("%s: to much segmets (%d)", __func__, segment);
1331 1.1 bouyer }
1332 1.1 bouyer #endif
1333 1.1 bouyer /*
1334 1.115 msaitoh * add the nullbuf in the seg
1335 1.115 msaitoh */
1336 1.79 rumble Tx->hw_list->seg[segment].data_count =
1337 1.43 bouyer htole32(ETHER_MIN_TX - size);
1338 1.79 rumble Tx->hw_list->seg[segment].data_addr =
1339 1.44 bouyer htole32(sc->null_dmamap->dm_segs[0].ds_addr);
1340 1.1 bouyer size = ETHER_MIN_TX;
1341 1.79 rumble segment++;
1342 1.1 bouyer }
1343 1.1 bouyer /* The list is done, finish the list init */
1344 1.79 rumble Tx->hw_list->seg[segment - 1].data_count |=
1345 1.43 bouyer htole32(TL_LAST_SEG);
1346 1.43 bouyer Tx->hw_list->stat = htole32((size << 16) | 0x3000);
1347 1.1 bouyer #ifdef TLDEBUG_TX
1348 1.89 tsutsui printf("%s: sending, Tx : stat = 0x%x\n", device_xname(sc->sc_dev),
1349 1.43 bouyer le32toh(Tx->hw_list->stat));
1350 1.59 tsutsui #if 0
1351 1.89 tsutsui for (segment = 0; segment < TL_NSEG; segment++) {
1352 1.1 bouyer printf(" seg %d addr 0x%x len 0x%x\n",
1353 1.79 rumble segment,
1354 1.79 rumble le32toh(Tx->hw_list->seg[segment].data_addr),
1355 1.79 rumble le32toh(Tx->hw_list->seg[segment].data_count));
1356 1.1 bouyer }
1357 1.1 bouyer #endif
1358 1.1 bouyer #endif
1359 1.1 bouyer if (sc->active_Tx == NULL) {
1360 1.1 bouyer sc->active_Tx = sc->last_Tx = Tx;
1361 1.1 bouyer #ifdef TLDEBUG_TX
1362 1.89 tsutsui printf("%s: Tx GO, addr=0x%ux\n", device_xname(sc->sc_dev),
1363 1.44 bouyer (int)Tx->hw_listaddr);
1364 1.1 bouyer #endif
1365 1.43 bouyer bus_dmamap_sync(sc->tl_dmatag, sc->Tx_dmamap, 0,
1366 1.43 bouyer sizeof(struct tl_Tx_list) * TL_NBUF,
1367 1.43 bouyer BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
1368 1.43 bouyer TL_HR_WRITE(sc, TL_HOST_CH_PARM, Tx->hw_listaddr);
1369 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_CMD, HOST_CMD_GO);
1370 1.1 bouyer } else {
1371 1.1 bouyer #ifdef TLDEBUG_TX
1372 1.89 tsutsui printf("%s: Tx addr=0x%ux queued\n", device_xname(sc->sc_dev),
1373 1.44 bouyer (int)Tx->hw_listaddr);
1374 1.1 bouyer #endif
1375 1.43 bouyer sc->last_Tx->hw_list->fwd = htole32(Tx->hw_listaddr);
1376 1.45 bouyer bus_dmamap_sync(sc->tl_dmatag, sc->Tx_dmamap, 0,
1377 1.45 bouyer sizeof(struct tl_Tx_list) * TL_NBUF,
1378 1.45 bouyer BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
1379 1.1 bouyer sc->last_Tx->next = Tx;
1380 1.1 bouyer sc->last_Tx = Tx;
1381 1.1 bouyer #ifdef DIAGNOSTIC
1382 1.43 bouyer if (sc->last_Tx->hw_list->fwd & 0x7)
1383 1.17 bouyer printf("%s: physical addr 0x%x of list not properly "
1384 1.89 tsutsui "aligned\n",
1385 1.89 tsutsui device_xname(sc->sc_dev),
1386 1.89 tsutsui sc->last_Rx->hw_list->fwd);
1387 1.1 bouyer #endif
1388 1.1 bouyer }
1389 1.1 bouyer /* Pass packet to bpf if there is a listener */
1390 1.109 msaitoh bpf_mtap(ifp, mb_head, BPF_D_OUT);
1391 1.17 bouyer /*
1392 1.17 bouyer * Set a 5 second timer just in case we don't hear from the card again.
1393 1.17 bouyer */
1394 1.1 bouyer ifp->if_timer = 5;
1395 1.1 bouyer goto txloop;
1396 1.1 bouyer bad:
1397 1.1 bouyer #ifdef TLDEBUG
1398 1.89 tsutsui printf("%s: Out of mbuf, Tx pkt lost\n", __func__);
1399 1.1 bouyer #endif
1400 1.1 bouyer Tx->next = sc->Free_Tx;
1401 1.1 bouyer sc->Free_Tx = Tx;
1402 1.1 bouyer }
1403 1.1 bouyer
1404 1.1 bouyer static void
1405 1.89 tsutsui tl_ifwatchdog(struct ifnet *ifp)
1406 1.1 bouyer {
1407 1.1 bouyer tl_softc_t *sc = ifp->if_softc;
1408 1.1 bouyer
1409 1.1 bouyer if ((ifp->if_flags & IFF_RUNNING) == 0)
1410 1.1 bouyer return;
1411 1.89 tsutsui printf("%s: device timeout\n", device_xname(sc->sc_dev));
1412 1.119 thorpej if_statinc(ifp, if_oerrors);
1413 1.46 bouyer tl_init(ifp);
1414 1.1 bouyer }
1415 1.1 bouyer
1416 1.1 bouyer static int
1417 1.89 tsutsui tl_mediachange(struct ifnet *ifp)
1418 1.1 bouyer {
1419 1.15 thorpej
1420 1.15 thorpej if (ifp->if_flags & IFF_UP)
1421 1.51 christos tl_init(ifp);
1422 1.89 tsutsui return 0;
1423 1.1 bouyer }
1424 1.1 bouyer
1425 1.89 tsutsui static int
1426 1.89 tsutsui tl_add_RxBuff(tl_softc_t *sc, struct Rx_list *Rx, struct mbuf *oldm)
1427 1.1 bouyer {
1428 1.1 bouyer struct mbuf *m;
1429 1.43 bouyer int error;
1430 1.1 bouyer
1431 1.1 bouyer MGETHDR(m, M_DONTWAIT, MT_DATA);
1432 1.1 bouyer if (m != NULL) {
1433 1.1 bouyer MCLGET(m, M_DONTWAIT);
1434 1.1 bouyer if ((m->m_flags & M_EXT) == 0) {
1435 1.1 bouyer m_freem(m);
1436 1.1 bouyer if (oldm == NULL)
1437 1.1 bouyer return 0;
1438 1.1 bouyer m = oldm;
1439 1.1 bouyer m->m_data = m->m_ext.ext_buf;
1440 1.1 bouyer }
1441 1.1 bouyer } else {
1442 1.1 bouyer if (oldm == NULL)
1443 1.1 bouyer return 0;
1444 1.1 bouyer m = oldm;
1445 1.1 bouyer m->m_data = m->m_ext.ext_buf;
1446 1.1 bouyer }
1447 1.43 bouyer
1448 1.43 bouyer /* (re)init the Rx_list struct */
1449 1.43 bouyer
1450 1.43 bouyer Rx->m = m;
1451 1.43 bouyer if ((error = bus_dmamap_load(sc->tl_dmatag, Rx->m_dmamap,
1452 1.43 bouyer m->m_ext.ext_buf, m->m_ext.ext_size, NULL, BUS_DMA_NOWAIT)) != 0) {
1453 1.89 tsutsui printf("%s: bus_dmamap_load() failed (error %d) for "
1454 1.89 tsutsui "tl_add_RxBuff ", device_xname(sc->sc_dev), error);
1455 1.43 bouyer printf("size %d (%d)\n", m->m_pkthdr.len, MCLBYTES);
1456 1.43 bouyer m_freem(m);
1457 1.43 bouyer Rx->m = NULL;
1458 1.43 bouyer return 0;
1459 1.43 bouyer }
1460 1.43 bouyer bus_dmamap_sync(sc->tl_dmatag, Rx->m_dmamap, 0,
1461 1.61 tsutsui Rx->m_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD);
1462 1.1 bouyer /*
1463 1.1 bouyer * Move the data pointer up so that the incoming data packet
1464 1.1 bouyer * will be 32-bit aligned.
1465 1.1 bouyer */
1466 1.1 bouyer m->m_data += 2;
1467 1.1 bouyer
1468 1.43 bouyer Rx->hw_list->stat =
1469 1.59 tsutsui htole32(((Rx->m_dmamap->dm_segs[0].ds_len - 2) << 16) | 0x3000);
1470 1.43 bouyer Rx->hw_list->seg.data_count =
1471 1.59 tsutsui htole32(Rx->m_dmamap->dm_segs[0].ds_len - 2);
1472 1.43 bouyer Rx->hw_list->seg.data_addr =
1473 1.43 bouyer htole32(Rx->m_dmamap->dm_segs[0].ds_addr + 2);
1474 1.1 bouyer return (m != oldm);
1475 1.1 bouyer }
1476 1.1 bouyer
1477 1.89 tsutsui static void
1478 1.89 tsutsui tl_ticks(void *v)
1479 1.1 bouyer {
1480 1.1 bouyer tl_softc_t *sc = v;
1481 1.1 bouyer
1482 1.1 bouyer tl_read_stats(sc);
1483 1.19 thorpej
1484 1.19 thorpej /* Tick the MII. */
1485 1.19 thorpej mii_tick(&sc->tl_mii);
1486 1.19 thorpej
1487 1.17 bouyer /* read statistics every seconds */
1488 1.32 thorpej callout_reset(&sc->tl_tick_ch, hz, tl_ticks, sc);
1489 1.17 bouyer }
1490 1.17 bouyer
1491 1.17 bouyer static void
1492 1.89 tsutsui tl_read_stats(tl_softc_t *sc)
1493 1.17 bouyer {
1494 1.89 tsutsui uint32_t reg;
1495 1.17 bouyer int ierr_overr;
1496 1.17 bouyer int ierr_code;
1497 1.17 bouyer int ierr_crc;
1498 1.17 bouyer int oerr_underr;
1499 1.63 wiz int oerr_deferred;
1500 1.17 bouyer int oerr_coll;
1501 1.17 bouyer int oerr_multicoll;
1502 1.17 bouyer int oerr_exesscoll;
1503 1.17 bouyer int oerr_latecoll;
1504 1.17 bouyer int oerr_carrloss;
1505 1.17 bouyer struct ifnet *ifp = &sc->tl_if;
1506 1.17 bouyer
1507 1.119 thorpej net_stat_ref_t nsr = IF_STAT_GETREF(ifp);
1508 1.119 thorpej
1509 1.17 bouyer reg = tl_intreg_read(sc, TL_INT_STATS_TX);
1510 1.119 thorpej if_statadd_ref(nsr, if_opackets, reg & 0x00ffffff);
1511 1.17 bouyer oerr_underr = reg >> 24;
1512 1.17 bouyer
1513 1.17 bouyer reg = tl_intreg_read(sc, TL_INT_STATS_RX);
1514 1.17 bouyer ierr_overr = reg >> 24;
1515 1.17 bouyer
1516 1.17 bouyer reg = tl_intreg_read(sc, TL_INT_STATS_FERR);
1517 1.17 bouyer ierr_crc = (reg & TL_FERR_CRC) >> 16;
1518 1.17 bouyer ierr_code = (reg & TL_FERR_CODE) >> 24;
1519 1.63 wiz oerr_deferred = (reg & TL_FERR_DEF);
1520 1.17 bouyer
1521 1.17 bouyer reg = tl_intreg_read(sc, TL_INT_STATS_COLL);
1522 1.17 bouyer oerr_multicoll = (reg & TL_COL_MULTI);
1523 1.17 bouyer oerr_coll = (reg & TL_COL_SINGLE) >> 16;
1524 1.17 bouyer
1525 1.17 bouyer reg = tl_intreg_read(sc, TL_INT_LERR);
1526 1.17 bouyer oerr_exesscoll = (reg & TL_LERR_ECOLL);
1527 1.17 bouyer oerr_latecoll = (reg & TL_LERR_LCOLL) >> 8;
1528 1.17 bouyer oerr_carrloss = (reg & TL_LERR_CL) >> 16;
1529 1.17 bouyer
1530 1.119 thorpej if_statadd_ref(nsr, if_oerrors,
1531 1.119 thorpej oerr_underr + oerr_exesscoll + oerr_latecoll + oerr_carrloss);
1532 1.119 thorpej if_statadd_ref(nsr, if_collisions, oerr_coll + oerr_multicoll);
1533 1.119 thorpej if_statadd_ref(nsr, if_ierrors, ierr_overr + ierr_code + ierr_crc);
1534 1.119 thorpej IF_STAT_PUTREF(ifp);
1535 1.17 bouyer
1536 1.17 bouyer if (ierr_overr)
1537 1.17 bouyer printf("%s: receiver ring buffer overrun\n",
1538 1.89 tsutsui device_xname(sc->sc_dev));
1539 1.17 bouyer if (oerr_underr)
1540 1.17 bouyer printf("%s: transmit buffer underrun\n",
1541 1.89 tsutsui device_xname(sc->sc_dev));
1542 1.17 bouyer #ifdef TL_PRIV_STATS
1543 1.17 bouyer sc->ierr_overr += ierr_overr;
1544 1.17 bouyer sc->ierr_code += ierr_code;
1545 1.17 bouyer sc->ierr_crc += ierr_crc;
1546 1.17 bouyer sc->oerr_underr += oerr_underr;
1547 1.63 wiz sc->oerr_deferred += oerr_deferred;
1548 1.17 bouyer sc->oerr_coll += oerr_coll;
1549 1.17 bouyer sc->oerr_multicoll += oerr_multicoll;
1550 1.17 bouyer sc->oerr_exesscoll += oerr_exesscoll;
1551 1.17 bouyer sc->oerr_latecoll += oerr_latecoll;
1552 1.17 bouyer sc->oerr_carrloss += oerr_carrloss;
1553 1.17 bouyer #endif
1554 1.17 bouyer }
1555 1.1 bouyer
1556 1.89 tsutsui static void
1557 1.89 tsutsui tl_addr_filter(tl_softc_t *sc)
1558 1.17 bouyer {
1559 1.116 msaitoh struct ethercom *ec = &sc->tl_ec;
1560 1.17 bouyer struct ether_multistep step;
1561 1.17 bouyer struct ether_multi *enm;
1562 1.89 tsutsui uint32_t hash[2] = {0, 0};
1563 1.17 bouyer int i;
1564 1.1 bouyer
1565 1.17 bouyer sc->tl_if.if_flags &= ~IFF_ALLMULTI;
1566 1.116 msaitoh ETHER_LOCK(ec);
1567 1.116 msaitoh ETHER_FIRST_MULTI(step, ec, enm);
1568 1.17 bouyer while (enm != NULL) {
1569 1.17 bouyer #ifdef TLDEBUG
1570 1.89 tsutsui printf("%s: addrs %s %s\n", __func__,
1571 1.17 bouyer ether_sprintf(enm->enm_addrlo),
1572 1.17 bouyer ether_sprintf(enm->enm_addrhi));
1573 1.17 bouyer #endif
1574 1.17 bouyer if (memcmp(enm->enm_addrlo, enm->enm_addrhi, 6) == 0) {
1575 1.17 bouyer i = tl_multicast_hash(enm->enm_addrlo);
1576 1.89 tsutsui hash[i / 32] |= 1 << (i%32);
1577 1.17 bouyer } else {
1578 1.17 bouyer hash[0] = hash[1] = 0xffffffff;
1579 1.17 bouyer sc->tl_if.if_flags |= IFF_ALLMULTI;
1580 1.17 bouyer break;
1581 1.1 bouyer }
1582 1.17 bouyer ETHER_NEXT_MULTI(step, enm);
1583 1.17 bouyer }
1584 1.116 msaitoh ETHER_UNLOCK(ec);
1585 1.17 bouyer #ifdef TLDEBUG
1586 1.89 tsutsui printf("%s: hash1 %x has2 %x\n", __func__, hash[0], hash[1]);
1587 1.17 bouyer #endif
1588 1.17 bouyer tl_intreg_write(sc, TL_INT_HASH1, hash[0]);
1589 1.17 bouyer tl_intreg_write(sc, TL_INT_HASH2, hash[1]);
1590 1.17 bouyer }
1591 1.1 bouyer
1592 1.89 tsutsui static int
1593 1.89 tsutsui tl_multicast_hash(uint8_t *a)
1594 1.17 bouyer {
1595 1.17 bouyer int hash;
1596 1.17 bouyer
1597 1.114 msaitoh #define DA(addr, bit) (addr[5 - (bit / 8)] & (1 << (bit % 8)))
1598 1.114 msaitoh #define xor8(a, b, c, d, e, f, g, h) \
1599 1.115 msaitoh (((a != 0) + (b != 0) + (c != 0) + (d != 0) + \
1600 1.89 tsutsui (e != 0) + (f != 0) + (g != 0) + (h != 0)) & 1)
1601 1.17 bouyer
1602 1.89 tsutsui hash = xor8(DA(a,0), DA(a, 6), DA(a,12), DA(a,18), DA(a,24), DA(a,30),
1603 1.17 bouyer DA(a,36), DA(a,42));
1604 1.89 tsutsui hash |= xor8(DA(a,1), DA(a, 7), DA(a,13), DA(a,19), DA(a,25), DA(a,31),
1605 1.17 bouyer DA(a,37), DA(a,43)) << 1;
1606 1.89 tsutsui hash |= xor8(DA(a,2), DA(a, 8), DA(a,14), DA(a,20), DA(a,26), DA(a,32),
1607 1.17 bouyer DA(a,38), DA(a,44)) << 2;
1608 1.89 tsutsui hash |= xor8(DA(a,3), DA(a, 9), DA(a,15), DA(a,21), DA(a,27), DA(a,33),
1609 1.17 bouyer DA(a,39), DA(a,45)) << 3;
1610 1.89 tsutsui hash |= xor8(DA(a,4), DA(a,10), DA(a,16), DA(a,22), DA(a,28), DA(a,34),
1611 1.17 bouyer DA(a,40), DA(a,46)) << 4;
1612 1.89 tsutsui hash |= xor8(DA(a,5), DA(a,11), DA(a,17), DA(a,23), DA(a,29), DA(a,35),
1613 1.17 bouyer DA(a,41), DA(a,47)) << 5;
1614 1.1 bouyer
1615 1.17 bouyer return hash;
1616 1.17 bouyer }
1617 1.1 bouyer
1618 1.59 tsutsui #if defined(TLDEBUG_RX)
1619 1.17 bouyer void
1620 1.89 tsutsui ether_printheader(struct ether_header *eh)
1621 1.17 bouyer {
1622 1.89 tsutsui uint8_t *c = (uint8_t *)eh;
1623 1.17 bouyer int i;
1624 1.89 tsutsui
1625 1.89 tsutsui for (i = 0; i < sizeof(struct ether_header); i++)
1626 1.89 tsutsui printf("%02x ", (u_int)c[i]);
1627 1.89 tsutsui printf("\n");
1628 1.17 bouyer }
1629 1.1 bouyer #endif
1630