if_tl.c revision 1.43 1 1.43 bouyer /* $NetBSD: if_tl.c,v 1.43 2001/08/03 16:53:08 bouyer Exp $ */
2 1.38 thorpej
3 1.38 thorpej /* XXX ALTQ XXX */
4 1.1 bouyer
5 1.1 bouyer /*
6 1.1 bouyer * Copyright (c) 1997 Manuel Bouyer. All rights reserved.
7 1.1 bouyer *
8 1.1 bouyer * Redistribution and use in source and binary forms, with or without
9 1.1 bouyer * modification, are permitted provided that the following conditions
10 1.1 bouyer * are met:
11 1.1 bouyer * 1. Redistributions of source code must retain the above copyright
12 1.1 bouyer * notice, this list of conditions and the following disclaimer.
13 1.1 bouyer * 2. Redistributions in binary form must reproduce the above copyright
14 1.1 bouyer * notice, this list of conditions and the following disclaimer in the
15 1.1 bouyer * documentation and/or other materials provided with the distribution.
16 1.1 bouyer * 3. All advertising materials mentioning features or use of this software
17 1.1 bouyer * must display the following acknowledgement:
18 1.1 bouyer * This product includes software developed by Manuel Bouyer.
19 1.1 bouyer * 4. The name of the author may not be used to endorse or promote products
20 1.1 bouyer * derived from this software without specific prior written permission.
21 1.1 bouyer *
22 1.1 bouyer * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
23 1.1 bouyer * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24 1.1 bouyer * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25 1.1 bouyer * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
26 1.1 bouyer * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27 1.1 bouyer * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 1.1 bouyer * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 1.1 bouyer * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 1.1 bouyer * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31 1.1 bouyer * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 1.1 bouyer */
33 1.1 bouyer
34 1.1 bouyer /*
35 1.2 bouyer * Texas Instruments ThunderLAN ethernet controller
36 1.1 bouyer * ThunderLAN Programmer's Guide (TI Literature Number SPWU013A)
37 1.1 bouyer * available from www.ti.com
38 1.1 bouyer */
39 1.1 bouyer
40 1.1 bouyer #undef TLDEBUG
41 1.1 bouyer #define TL_PRIV_STATS
42 1.1 bouyer #undef TLDEBUG_RX
43 1.1 bouyer #undef TLDEBUG_TX
44 1.1 bouyer #undef TLDEBUG_ADDR
45 1.12 jonathan
46 1.12 jonathan #include "opt_inet.h"
47 1.13 jonathan #include "opt_ns.h"
48 1.1 bouyer
49 1.1 bouyer #include <sys/param.h>
50 1.1 bouyer #include <sys/systm.h>
51 1.1 bouyer #include <sys/mbuf.h>
52 1.1 bouyer #include <sys/protosw.h>
53 1.1 bouyer #include <sys/socket.h>
54 1.1 bouyer #include <sys/ioctl.h>
55 1.1 bouyer #include <sys/errno.h>
56 1.1 bouyer #include <sys/malloc.h>
57 1.1 bouyer #include <sys/kernel.h>
58 1.1 bouyer #include <sys/proc.h> /* only for declaration of wakeup() used by vm.h */
59 1.1 bouyer #include <sys/device.h>
60 1.1 bouyer
61 1.1 bouyer #include <net/if.h>
62 1.1 bouyer #if defined(SIOCSIFMEDIA)
63 1.1 bouyer #include <net/if_media.h>
64 1.1 bouyer #endif
65 1.1 bouyer #include <net/if_types.h>
66 1.1 bouyer #include <net/if_dl.h>
67 1.1 bouyer #include <net/route.h>
68 1.1 bouyer #include <net/netisr.h>
69 1.1 bouyer
70 1.1 bouyer #include "bpfilter.h"
71 1.1 bouyer #if NBPFILTER > 0
72 1.1 bouyer #include <net/bpf.h>
73 1.1 bouyer #include <net/bpfdesc.h>
74 1.1 bouyer #endif
75 1.1 bouyer
76 1.1 bouyer #ifdef INET
77 1.1 bouyer #include <netinet/in.h>
78 1.1 bouyer #include <netinet/in_systm.h>
79 1.1 bouyer #include <netinet/in_var.h>
80 1.1 bouyer #include <netinet/ip.h>
81 1.1 bouyer #endif
82 1.1 bouyer
83 1.1 bouyer #ifdef NS
84 1.1 bouyer #include <netns/ns.h>
85 1.1 bouyer #include <netns/ns_if.h>
86 1.1 bouyer #endif
87 1.1 bouyer
88 1.1 bouyer #if defined(__NetBSD__)
89 1.1 bouyer #include <net/if_ether.h>
90 1.34 mrg #include <uvm/uvm_extern.h>
91 1.1 bouyer #if defined(INET)
92 1.1 bouyer #include <netinet/if_inarp.h>
93 1.1 bouyer #endif
94 1.4 thorpej
95 1.1 bouyer #include <machine/bus.h>
96 1.1 bouyer #include <machine/intr.h>
97 1.4 thorpej
98 1.1 bouyer #include <dev/pci/pcireg.h>
99 1.1 bouyer #include <dev/pci/pcivar.h>
100 1.1 bouyer #include <dev/pci/pcidevs.h>
101 1.15 thorpej
102 1.1 bouyer #include <dev/i2c/i2c_bus.h>
103 1.1 bouyer #include <dev/i2c/i2c_eeprom.h>
104 1.15 thorpej
105 1.15 thorpej #include <dev/mii/mii.h>
106 1.15 thorpej #include <dev/mii/miivar.h>
107 1.15 thorpej
108 1.15 thorpej #include <dev/mii/tlphyvar.h>
109 1.15 thorpej
110 1.1 bouyer #include <dev/pci/if_tlregs.h>
111 1.15 thorpej #include <dev/pci/if_tlvar.h>
112 1.1 bouyer #endif /* __NetBSD__ */
113 1.1 bouyer
114 1.1 bouyer /* number of transmit/receive buffers */
115 1.1 bouyer #ifndef TL_NBUF
116 1.1 bouyer #define TL_NBUF 10
117 1.1 bouyer #endif
118 1.1 bouyer
119 1.7 drochner static int tl_pci_match __P((struct device *, struct cfdata *, void *));
120 1.1 bouyer static void tl_pci_attach __P((struct device *, struct device *, void *));
121 1.1 bouyer static int tl_intr __P((void *));
122 1.1 bouyer
123 1.1 bouyer static int tl_ifioctl __P((struct ifnet *, ioctl_cmd_t, caddr_t));
124 1.1 bouyer static int tl_mediachange __P((struct ifnet *));
125 1.1 bouyer static void tl_mediastatus __P((struct ifnet *, struct ifmediareq *));
126 1.1 bouyer static void tl_ifwatchdog __P((struct ifnet *));
127 1.1 bouyer static void tl_shutdown __P((void*));
128 1.1 bouyer
129 1.1 bouyer static void tl_ifstart __P((struct ifnet *));
130 1.1 bouyer static void tl_reset __P((tl_softc_t*));
131 1.1 bouyer static int tl_init __P((tl_softc_t*));
132 1.1 bouyer static void tl_restart __P((void *));
133 1.43 bouyer static int tl_add_RxBuff __P((tl_softc_t*, struct Rx_list*, struct mbuf*));
134 1.1 bouyer static void tl_read_stats __P((tl_softc_t*));
135 1.1 bouyer static void tl_ticks __P((void*));
136 1.1 bouyer static int tl_multicast_hash __P((u_int8_t*));
137 1.1 bouyer static void tl_addr_filter __P((tl_softc_t*));
138 1.1 bouyer
139 1.1 bouyer static u_int32_t tl_intreg_read __P((tl_softc_t*, u_int32_t));
140 1.1 bouyer static void tl_intreg_write __P((tl_softc_t*, u_int32_t, u_int32_t));
141 1.1 bouyer static u_int8_t tl_intreg_read_byte __P((tl_softc_t*, u_int32_t));
142 1.1 bouyer static void tl_intreg_write_byte __P((tl_softc_t*, u_int32_t, u_int8_t));
143 1.1 bouyer
144 1.28 tron void tl_mii_sync __P((struct tl_softc *));
145 1.28 tron void tl_mii_sendbits __P((struct tl_softc *, u_int32_t, int));
146 1.28 tron
147 1.28 tron
148 1.1 bouyer #if defined(TLDEBUG_RX)
149 1.1 bouyer static void ether_printheader __P((struct ether_header*));
150 1.1 bouyer #endif
151 1.1 bouyer
152 1.15 thorpej int tl_mii_read __P((struct device *, int, int));
153 1.15 thorpej void tl_mii_write __P((struct device *, int, int, int));
154 1.15 thorpej
155 1.15 thorpej void tl_statchg __P((struct device *));
156 1.1 bouyer
157 1.1 bouyer void tl_i2c_set __P((void*, u_int8_t));
158 1.1 bouyer void tl_i2c_clr __P((void*, u_int8_t));
159 1.1 bouyer int tl_i2c_read __P((void*, u_int8_t));
160 1.1 bouyer
161 1.1 bouyer static __inline void netsio_clr __P((tl_softc_t*, u_int8_t));
162 1.1 bouyer static __inline void netsio_set __P((tl_softc_t*, u_int8_t));
163 1.1 bouyer static __inline u_int8_t netsio_read __P((tl_softc_t*, u_int8_t));
164 1.1 bouyer static __inline void netsio_clr(sc, bits)
165 1.1 bouyer tl_softc_t* sc;
166 1.1 bouyer u_int8_t bits;
167 1.1 bouyer {
168 1.1 bouyer tl_intreg_write_byte(sc, TL_INT_NET + TL_INT_NetSio,
169 1.17 bouyer tl_intreg_read_byte(sc, TL_INT_NET + TL_INT_NetSio) & (~bits));
170 1.1 bouyer }
171 1.1 bouyer static __inline void netsio_set(sc, bits)
172 1.1 bouyer tl_softc_t* sc;
173 1.1 bouyer u_int8_t bits;
174 1.1 bouyer {
175 1.1 bouyer tl_intreg_write_byte(sc, TL_INT_NET + TL_INT_NetSio,
176 1.17 bouyer tl_intreg_read_byte(sc, TL_INT_NET + TL_INT_NetSio) | bits);
177 1.1 bouyer }
178 1.1 bouyer static __inline u_int8_t netsio_read(sc, bits)
179 1.1 bouyer tl_softc_t* sc;
180 1.1 bouyer u_int8_t bits;
181 1.1 bouyer {
182 1.4 thorpej return (tl_intreg_read_byte(sc, TL_INT_NET + TL_INT_NetSio) & bits);
183 1.1 bouyer }
184 1.1 bouyer
185 1.1 bouyer struct cfattach tl_ca = {
186 1.4 thorpej sizeof(tl_softc_t), tl_pci_match, tl_pci_attach
187 1.1 bouyer };
188 1.1 bouyer
189 1.4 thorpej const struct tl_product_desc tl_compaq_products[] = {
190 1.15 thorpej { PCI_PRODUCT_COMPAQ_N100TX, TLPHY_MEDIA_NO_10_T,
191 1.22 tron "Compaq Netelligent 10/100 TX" },
192 1.15 thorpej { PCI_PRODUCT_COMPAQ_N10T, TLPHY_MEDIA_10_5,
193 1.22 tron "Compaq Netelligent 10 T" },
194 1.15 thorpej { PCI_PRODUCT_COMPAQ_IntNF3P, TLPHY_MEDIA_10_2,
195 1.22 tron "Compaq Integrated NetFlex 3/P" },
196 1.15 thorpej { PCI_PRODUCT_COMPAQ_IntPL100TX, TLPHY_MEDIA_10_2|TLPHY_MEDIA_NO_10_T,
197 1.22 tron "Compaq ProLiant Integrated Netelligent 10/100 TX" },
198 1.15 thorpej { PCI_PRODUCT_COMPAQ_DPNet100TX, TLPHY_MEDIA_10_5|TLPHY_MEDIA_NO_10_T,
199 1.22 tron "Compaq Dual Port Netelligent 10/100 TX" },
200 1.40 bouyer { PCI_PRODUCT_COMPAQ_DP4000, TLPHY_MEDIA_10_5|TLPHY_MEDIA_NO_10_T,
201 1.22 tron "Compaq Deskpro 4000 5233MMX" },
202 1.15 thorpej { PCI_PRODUCT_COMPAQ_NF3P_BNC, TLPHY_MEDIA_10_2,
203 1.22 tron "Compaq NetFlex 3/P w/ BNC" },
204 1.15 thorpej { PCI_PRODUCT_COMPAQ_NF3P, TLPHY_MEDIA_10_5,
205 1.22 tron "Compaq NetFlex 3/P" },
206 1.4 thorpej { 0, 0, NULL },
207 1.4 thorpej };
208 1.4 thorpej
209 1.4 thorpej const struct tl_product_desc tl_ti_products[] = {
210 1.10 thorpej /*
211 1.10 thorpej * Built-in Ethernet on the TI TravelMate 5000
212 1.10 thorpej * docking station; better product description?
213 1.10 thorpej */
214 1.15 thorpej { PCI_PRODUCT_TI_TLAN, 0,
215 1.22 tron "Texas Instruments ThunderLAN" },
216 1.4 thorpej { 0, 0, NULL },
217 1.4 thorpej };
218 1.4 thorpej
219 1.4 thorpej struct tl_vendor_desc {
220 1.4 thorpej u_int32_t tv_vendor;
221 1.4 thorpej const struct tl_product_desc *tv_products;
222 1.4 thorpej };
223 1.4 thorpej
224 1.4 thorpej const struct tl_vendor_desc tl_vendors[] = {
225 1.4 thorpej { PCI_VENDOR_COMPAQ, tl_compaq_products },
226 1.4 thorpej { PCI_VENDOR_TI, tl_ti_products },
227 1.4 thorpej { 0, NULL },
228 1.4 thorpej };
229 1.4 thorpej
230 1.4 thorpej const struct tl_product_desc *tl_lookup_product __P((u_int32_t));
231 1.4 thorpej
232 1.4 thorpej const struct tl_product_desc *
233 1.4 thorpej tl_lookup_product(id)
234 1.4 thorpej u_int32_t id;
235 1.4 thorpej {
236 1.4 thorpej const struct tl_product_desc *tp;
237 1.4 thorpej const struct tl_vendor_desc *tv;
238 1.4 thorpej
239 1.4 thorpej for (tv = tl_vendors; tv->tv_products != NULL; tv++)
240 1.4 thorpej if (PCI_VENDOR(id) == tv->tv_vendor)
241 1.4 thorpej break;
242 1.4 thorpej
243 1.4 thorpej if ((tp = tv->tv_products) == NULL)
244 1.4 thorpej return (NULL);
245 1.4 thorpej
246 1.4 thorpej for (; tp->tp_desc != NULL; tp++)
247 1.4 thorpej if (PCI_PRODUCT(id) == tp->tp_product)
248 1.4 thorpej break;
249 1.4 thorpej
250 1.4 thorpej if (tp->tp_desc == NULL)
251 1.4 thorpej return (NULL);
252 1.4 thorpej
253 1.4 thorpej return (tp);
254 1.4 thorpej }
255 1.4 thorpej
256 1.6 bouyer static char *nullbuf = NULL;
257 1.43 bouyer static bus_dmamap_t nullbuf_dmamap = NULL;
258 1.1 bouyer
259 1.1 bouyer static int
260 1.4 thorpej tl_pci_match(parent, match, aux)
261 1.1 bouyer struct device *parent;
262 1.7 drochner struct cfdata *match;
263 1.1 bouyer void *aux;
264 1.1 bouyer {
265 1.1 bouyer struct pci_attach_args *pa = (struct pci_attach_args *) aux;
266 1.1 bouyer
267 1.4 thorpej if (tl_lookup_product(pa->pa_id) != NULL)
268 1.4 thorpej return (1);
269 1.4 thorpej
270 1.4 thorpej return (0);
271 1.1 bouyer }
272 1.1 bouyer
273 1.1 bouyer static void
274 1.1 bouyer tl_pci_attach(parent, self, aux)
275 1.1 bouyer struct device * parent;
276 1.1 bouyer struct device * self;
277 1.1 bouyer void * aux;
278 1.1 bouyer {
279 1.1 bouyer tl_softc_t *sc = (tl_softc_t *)self;
280 1.1 bouyer struct pci_attach_args * const pa = (struct pci_attach_args *) aux;
281 1.4 thorpej const struct tl_product_desc *tp;
282 1.1 bouyer struct ifnet * const ifp = &sc->tl_if;
283 1.1 bouyer bus_space_tag_t iot, memt;
284 1.1 bouyer bus_space_handle_t ioh, memh;
285 1.1 bouyer pci_intr_handle_t intrhandle;
286 1.4 thorpej const char *intrstr;
287 1.4 thorpej int i, tmp, ioh_valid, memh_valid;
288 1.23 bouyer int reg_io, reg_mem;
289 1.23 bouyer pcireg_t reg10, reg14;
290 1.4 thorpej pcireg_t csr;
291 1.4 thorpej
292 1.4 thorpej printf("\n");
293 1.4 thorpej
294 1.32 thorpej callout_init(&sc->tl_tick_ch);
295 1.32 thorpej callout_init(&sc->tl_restart_ch);
296 1.32 thorpej
297 1.10 thorpej tp = tl_lookup_product(pa->pa_id);
298 1.10 thorpej if (tp == NULL)
299 1.10 thorpej panic("tl_pci_attach: impossible");
300 1.15 thorpej sc->tl_product = tp;
301 1.10 thorpej
302 1.23 bouyer /*
303 1.23 bouyer * Map the card space. Fisrt we have to find the I/O and MEM
304 1.23 bouyer * registers. I/O is supposed to be at 0x10, MEM at 0x14,
305 1.23 bouyer * but some boards (Compaq Netflex 3/P PCI) seem to have it reversed.
306 1.23 bouyer * The ThunderLAN manual is not consistent about this either (there
307 1.23 bouyer * are both cases in code examples).
308 1.23 bouyer */
309 1.23 bouyer reg10 = pci_conf_read(pa->pa_pc, pa->pa_tag, 0x10);
310 1.23 bouyer reg14 = pci_conf_read(pa->pa_pc, pa->pa_tag, 0x14);
311 1.23 bouyer if (PCI_MAPREG_TYPE(reg10) == PCI_MAPREG_TYPE_IO)
312 1.23 bouyer reg_io = 0x10;
313 1.23 bouyer else if (PCI_MAPREG_TYPE(reg14) == PCI_MAPREG_TYPE_IO)
314 1.23 bouyer reg_io = 0x14;
315 1.23 bouyer else
316 1.23 bouyer reg_io = 0;
317 1.23 bouyer if (PCI_MAPREG_TYPE(reg10) == PCI_MAPREG_TYPE_MEM)
318 1.23 bouyer reg_mem = 0x10;
319 1.23 bouyer else if (PCI_MAPREG_TYPE(reg14) == PCI_MAPREG_TYPE_MEM)
320 1.23 bouyer reg_mem = 0x14;
321 1.23 bouyer else
322 1.23 bouyer reg_mem = 0;
323 1.23 bouyer
324 1.23 bouyer if (reg_io != 0)
325 1.23 bouyer ioh_valid = (pci_mapreg_map(pa, reg_io, PCI_MAPREG_TYPE_IO,
326 1.23 bouyer 0, &iot, &ioh, NULL, NULL) == 0);
327 1.23 bouyer else
328 1.23 bouyer ioh_valid = 0;
329 1.23 bouyer if (reg_mem != 0)
330 1.23 bouyer memh_valid = (pci_mapreg_map(pa, PCI_CBMA,
331 1.23 bouyer PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT,
332 1.23 bouyer 0, &memt, &memh, NULL, NULL) == 0);
333 1.23 bouyer else
334 1.23 bouyer memh_valid = 0;
335 1.4 thorpej
336 1.22 tron if (ioh_valid) {
337 1.22 tron sc->tl_bustag = iot;
338 1.22 tron sc->tl_bushandle = ioh;
339 1.22 tron } else if (memh_valid) {
340 1.4 thorpej sc->tl_bustag = memt;
341 1.4 thorpej sc->tl_bushandle = memh;
342 1.1 bouyer } else {
343 1.4 thorpej printf("%s: unable to map device registers\n",
344 1.4 thorpej sc->sc_dev.dv_xname);
345 1.4 thorpej return;
346 1.1 bouyer }
347 1.43 bouyer sc->tl_dmatag = pa->pa_dmat;
348 1.1 bouyer
349 1.4 thorpej /* Enable the device. */
350 1.4 thorpej csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
351 1.4 thorpej pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
352 1.4 thorpej csr | PCI_COMMAND_MASTER_ENABLE);
353 1.1 bouyer
354 1.4 thorpej printf("%s: %s\n", sc->sc_dev.dv_xname, tp->tp_desc);
355 1.1 bouyer
356 1.1 bouyer tl_reset(sc);
357 1.1 bouyer
358 1.1 bouyer /* fill in the i2c struct */
359 1.1 bouyer sc->i2cbus.adapter_softc = sc;
360 1.1 bouyer sc->i2cbus.set_bit = tl_i2c_set;
361 1.1 bouyer sc->i2cbus.clr_bit = tl_i2c_clr;
362 1.1 bouyer sc->i2cbus.read_bit = tl_i2c_read;
363 1.1 bouyer
364 1.1 bouyer #ifdef TLDEBUG
365 1.1 bouyer printf("default values of INTreg: 0x%x\n",
366 1.17 bouyer tl_intreg_read(sc, TL_INT_Defaults));
367 1.1 bouyer #endif
368 1.1 bouyer
369 1.1 bouyer /* read mac addr */
370 1.1 bouyer for (i=0; i<ETHER_ADDR_LEN; i++) {
371 1.1 bouyer tmp = i2c_eeprom_read(&sc->i2cbus, 0x83 + i);
372 1.1 bouyer if (tmp < 0) {
373 1.4 thorpej printf("%s: error reading Ethernet adress\n",
374 1.4 thorpej sc->sc_dev.dv_xname);
375 1.1 bouyer return;
376 1.1 bouyer } else {
377 1.1 bouyer sc->tl_enaddr[i] = tmp;
378 1.1 bouyer }
379 1.1 bouyer }
380 1.4 thorpej printf("%s: Ethernet address %s\n", sc->sc_dev.dv_xname,
381 1.17 bouyer ether_sprintf(sc->tl_enaddr));
382 1.1 bouyer
383 1.4 thorpej /* Map and establish interrupts */
384 1.39 sommerfe if (pci_intr_map(pa, &intrhandle)) {
385 1.4 thorpej printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname);
386 1.4 thorpej return;
387 1.4 thorpej }
388 1.4 thorpej intrstr = pci_intr_string(pa->pa_pc, intrhandle);
389 1.4 thorpej sc->tl_ih = pci_intr_establish(pa->pa_pc, intrhandle, IPL_NET,
390 1.17 bouyer tl_intr, sc);
391 1.4 thorpej if (sc->tl_ih == NULL) {
392 1.4 thorpej printf("%s: couldn't establish interrupt",
393 1.4 thorpej sc->sc_dev.dv_xname);
394 1.4 thorpej if (intrstr != NULL)
395 1.4 thorpej printf(" at %s", intrstr);
396 1.4 thorpej printf("\n");
397 1.4 thorpej return;
398 1.4 thorpej }
399 1.4 thorpej printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr);
400 1.4 thorpej
401 1.43 bouyer /* init these pointers, so that tl_shutdown won't try to read them */
402 1.43 bouyer sc->Rx_list = NULL;
403 1.43 bouyer sc->Tx_list = NULL;
404 1.43 bouyer
405 1.4 thorpej /*
406 1.4 thorpej * Add shutdown hook so that DMA is disabled prior to reboot. Not
407 1.4 thorpej * doing do could allow DMA to corrupt kernel memory during the
408 1.4 thorpej * reboot before the driver initializes.
409 1.4 thorpej */
410 1.4 thorpej (void) shutdownhook_establish(tl_shutdown, sc);
411 1.4 thorpej
412 1.15 thorpej /*
413 1.15 thorpej * Initialize our media structures and probe the MII.
414 1.15 thorpej *
415 1.15 thorpej * Note that we don't care about the media instance. We
416 1.15 thorpej * are expecting to have multiple PHYs on the 10/100 cards,
417 1.15 thorpej * and on those cards we exclude the internal PHY from providing
418 1.15 thorpej * 10baseT. By ignoring the instance, it allows us to not have
419 1.15 thorpej * to specify it on the command line when switching media.
420 1.15 thorpej */
421 1.15 thorpej sc->tl_mii.mii_ifp = ifp;
422 1.15 thorpej sc->tl_mii.mii_readreg = tl_mii_read;
423 1.15 thorpej sc->tl_mii.mii_writereg = tl_mii_write;
424 1.15 thorpej sc->tl_mii.mii_statchg = tl_statchg;
425 1.15 thorpej ifmedia_init(&sc->tl_mii.mii_media, IFM_IMASK, tl_mediachange,
426 1.15 thorpej tl_mediastatus);
427 1.29 thorpej mii_attach(self, &sc->tl_mii, 0xffffffff, MII_PHY_ANY,
428 1.30 thorpej MII_OFFSET_ANY, 0);
429 1.15 thorpej if (LIST_FIRST(&sc->tl_mii.mii_phys) == NULL) {
430 1.15 thorpej ifmedia_add(&sc->tl_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL);
431 1.15 thorpej ifmedia_set(&sc->tl_mii.mii_media, IFM_ETHER|IFM_NONE);
432 1.15 thorpej } else
433 1.15 thorpej ifmedia_set(&sc->tl_mii.mii_media, IFM_ETHER|IFM_AUTO);
434 1.1 bouyer
435 1.41 thorpej strcpy(ifp->if_xname, sc->sc_dev.dv_xname);
436 1.1 bouyer sc->tl_if.if_softc = sc;
437 1.1 bouyer ifp->if_flags = IFF_BROADCAST|IFF_SIMPLEX|IFF_NOTRAILERS|IFF_MULTICAST;
438 1.1 bouyer ifp->if_ioctl = tl_ifioctl;
439 1.1 bouyer ifp->if_start = tl_ifstart;
440 1.1 bouyer ifp->if_watchdog = tl_ifwatchdog;
441 1.1 bouyer ifp->if_timer = 0;
442 1.1 bouyer if_attach(ifp);
443 1.1 bouyer ether_ifattach(&(sc)->tl_if, (sc)->tl_enaddr);
444 1.1 bouyer }
445 1.1 bouyer
446 1.1 bouyer static void
447 1.1 bouyer tl_reset(sc)
448 1.1 bouyer tl_softc_t *sc;
449 1.1 bouyer {
450 1.1 bouyer int i;
451 1.1 bouyer
452 1.1 bouyer /* read stats */
453 1.1 bouyer if (sc->tl_if.if_flags & IFF_RUNNING) {
454 1.32 thorpej callout_stop(&sc->tl_tick_ch);
455 1.1 bouyer tl_read_stats(sc);
456 1.1 bouyer }
457 1.1 bouyer /* Reset adapter */
458 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_CMD,
459 1.17 bouyer TL_HR_READ(sc, TL_HOST_CMD) | HOST_CMD_Ad_Rst);
460 1.1 bouyer DELAY(100000);
461 1.1 bouyer /* Disable interrupts */
462 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_CMD, HOST_CMD_IntOff);
463 1.1 bouyer /* setup aregs & hash */
464 1.1 bouyer for (i = TL_INT_Areg0; i <= TL_INT_HASH2; i = i + 4)
465 1.1 bouyer tl_intreg_write(sc, i, 0);
466 1.1 bouyer #ifdef TLDEBUG_ADDR
467 1.1 bouyer printf("Areg & hash registers: \n");
468 1.1 bouyer for (i = TL_INT_Areg0; i <= TL_INT_HASH2; i = i + 4)
469 1.1 bouyer printf(" reg %x: %x\n", i, tl_intreg_read(sc, i));
470 1.1 bouyer #endif
471 1.1 bouyer /* Setup NetConfig */
472 1.1 bouyer tl_intreg_write(sc, TL_INT_NetConfig,
473 1.17 bouyer TL_NETCONFIG_1F | TL_NETCONFIG_1chn | TL_NETCONFIG_PHY_EN);
474 1.1 bouyer /* Bsize: accept default */
475 1.1 bouyer /* TX commit in Acommit: accept default */
476 1.1 bouyer /* Load Ld_tmr and Ld_thr */
477 1.1 bouyer /* Ld_tmr = 3 */
478 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_CMD, 0x3 | HOST_CMD_LdTmr);
479 1.1 bouyer /* Ld_thr = 0 */
480 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_CMD, 0x0 | HOST_CMD_LdThr);
481 1.1 bouyer /* Unreset MII */
482 1.1 bouyer netsio_set(sc, TL_NETSIO_NMRST);
483 1.1 bouyer DELAY(100000);
484 1.15 thorpej sc->tl_mii.mii_media_status &= ~IFM_ACTIVE;
485 1.1 bouyer }
486 1.1 bouyer
487 1.1 bouyer static void tl_shutdown(v)
488 1.1 bouyer void *v;
489 1.1 bouyer {
490 1.1 bouyer tl_softc_t *sc = v;
491 1.1 bouyer struct Tx_list *Tx;
492 1.1 bouyer int i;
493 1.1 bouyer
494 1.1 bouyer if ((sc->tl_if.if_flags & IFF_RUNNING) == 0)
495 1.1 bouyer return;
496 1.1 bouyer /* disable interrupts */
497 1.17 bouyer TL_HR_WRITE(sc, TL_HOST_CMD, HOST_CMD_IntOff);
498 1.1 bouyer /* stop TX and RX channels */
499 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_CMD,
500 1.17 bouyer HOST_CMD_STOP | HOST_CMD_RT | HOST_CMD_Nes);
501 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_CMD, HOST_CMD_STOP);
502 1.1 bouyer DELAY(100000);
503 1.1 bouyer
504 1.1 bouyer /* stop statistics reading loop, read stats */
505 1.32 thorpej callout_stop(&sc->tl_tick_ch);
506 1.1 bouyer tl_read_stats(sc);
507 1.26 thorpej
508 1.26 thorpej /* Down the MII. */
509 1.26 thorpej mii_down(&sc->tl_mii);
510 1.1 bouyer
511 1.1 bouyer /* deallocate memory allocations */
512 1.43 bouyer if (sc->Rx_list) {
513 1.43 bouyer for (i=0; i< TL_NBUF; i++) {
514 1.43 bouyer if (sc->Rx_list[i].m) {
515 1.43 bouyer bus_dmamap_unload(sc->tl_dmatag,
516 1.43 bouyer sc->Rx_list[i].m_dmamap);
517 1.43 bouyer m_freem(sc->Rx_list[i].m);
518 1.43 bouyer }
519 1.43 bouyer sc->Rx_list[i].m = NULL;
520 1.43 bouyer }
521 1.43 bouyer free(sc->Rx_list, M_DEVBUF);
522 1.43 bouyer sc->Rx_list = NULL;
523 1.43 bouyer bus_dmamap_unload(sc->tl_dmatag, sc->Rx_dmamap);
524 1.43 bouyer bus_dmamem_free(sc->tl_dmatag, sc->Rx_dmamap->dm_segs,
525 1.43 bouyer sc->Rx_dmamap->dm_nsegs);
526 1.43 bouyer sc->hw_Rx_list = NULL;
527 1.43 bouyer while ((Tx = sc->active_Tx) != NULL) {
528 1.43 bouyer Tx->hw_list->stat = 0;
529 1.43 bouyer bus_dmamap_unload(sc->tl_dmatag, Tx->m_dmamap);
530 1.43 bouyer m_freem(Tx->m);
531 1.43 bouyer sc->active_Tx = Tx->next;
532 1.43 bouyer Tx->next = sc->Free_Tx;
533 1.43 bouyer sc->Free_Tx = Tx;
534 1.43 bouyer }
535 1.43 bouyer sc->last_Tx = NULL;
536 1.43 bouyer free(sc->Tx_list, M_DEVBUF);
537 1.43 bouyer sc->Tx_list = NULL;
538 1.43 bouyer bus_dmamem_free(sc->tl_dmatag, sc->Tx_dmamap->dm_segs,
539 1.43 bouyer sc->Tx_dmamap->dm_nsegs);
540 1.43 bouyer bus_dmamap_unload(sc->tl_dmatag, sc->Tx_dmamap);
541 1.43 bouyer sc->hw_Tx_list = NULL;
542 1.1 bouyer }
543 1.1 bouyer sc->tl_if.if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
544 1.15 thorpej sc->tl_mii.mii_media_status &= ~IFM_ACTIVE;
545 1.1 bouyer }
546 1.1 bouyer
547 1.1 bouyer static void tl_restart(v)
548 1.1 bouyer void *v;
549 1.1 bouyer {
550 1.1 bouyer tl_init(v);
551 1.1 bouyer }
552 1.1 bouyer
553 1.1 bouyer static int tl_init(sc)
554 1.1 bouyer tl_softc_t *sc;
555 1.1 bouyer {
556 1.1 bouyer struct ifnet *ifp = &sc->tl_if;
557 1.43 bouyer int i, s, error;
558 1.43 bouyer bus_dma_segment_t segs;
559 1.43 bouyer int nsegs;
560 1.43 bouyer char *errstring;
561 1.1 bouyer
562 1.14 mycroft s = splnet();
563 1.1 bouyer /* cancel any pending IO */
564 1.1 bouyer tl_shutdown(sc);
565 1.1 bouyer tl_reset(sc);
566 1.1 bouyer if ((sc->tl_if.if_flags & IFF_UP) == 0) {
567 1.1 bouyer splx(s);
568 1.1 bouyer return 0;
569 1.1 bouyer }
570 1.1 bouyer /* Set various register to reasonable value */
571 1.1 bouyer /* setup NetCmd in promisc mode if needed */
572 1.1 bouyer i = (ifp->if_flags & IFF_PROMISC) ? TL_NETCOMMAND_CAF : 0;
573 1.1 bouyer tl_intreg_write_byte(sc, TL_INT_NET + TL_INT_NetCmd,
574 1.17 bouyer TL_NETCOMMAND_NRESET | TL_NETCOMMAND_NWRAP | i);
575 1.1 bouyer /* Max receive size : MCLBYTES */
576 1.1 bouyer tl_intreg_write_byte(sc, TL_INT_MISC + TL_MISC_MaxRxL, MCLBYTES & 0xff);
577 1.1 bouyer tl_intreg_write_byte(sc, TL_INT_MISC + TL_MISC_MaxRxH,
578 1.17 bouyer (MCLBYTES >> 8) & 0xff);
579 1.1 bouyer
580 1.1 bouyer /* init MAC addr */
581 1.1 bouyer for (i = 0; i < ETHER_ADDR_LEN; i++)
582 1.1 bouyer tl_intreg_write_byte(sc, TL_INT_Areg0 + i , sc->tl_enaddr[i]);
583 1.1 bouyer /* add multicast filters */
584 1.1 bouyer tl_addr_filter(sc);
585 1.1 bouyer #ifdef TLDEBUG_ADDR
586 1.1 bouyer printf("Wrote Mac addr, Areg & hash registers are now: \n");
587 1.1 bouyer for (i = TL_INT_Areg0; i <= TL_INT_HASH2; i = i + 4)
588 1.1 bouyer printf(" reg %x: %x\n", i, tl_intreg_read(sc, i));
589 1.1 bouyer #endif
590 1.1 bouyer
591 1.1 bouyer /* Pre-allocate receivers mbuf, make the lists */
592 1.17 bouyer sc->Rx_list = malloc(sizeof(struct Rx_list) * TL_NBUF, M_DEVBUF,
593 1.17 bouyer M_NOWAIT);
594 1.17 bouyer sc->Tx_list = malloc(sizeof(struct Tx_list) * TL_NBUF, M_DEVBUF,
595 1.17 bouyer M_NOWAIT);
596 1.1 bouyer if (sc->Rx_list == NULL || sc->Tx_list == NULL) {
597 1.43 bouyer errstring = "out of memory for lists";
598 1.43 bouyer error = ENOMEM;
599 1.43 bouyer goto bad;
600 1.43 bouyer }
601 1.43 bouyer memset(sc->Rx_list, 0, sizeof(struct Rx_list) * TL_NBUF);
602 1.43 bouyer memset(sc->Tx_list, 0, sizeof(struct Tx_list) * TL_NBUF);
603 1.43 bouyer error = bus_dmamap_create(sc->tl_dmatag,
604 1.43 bouyer sizeof(struct tl_Rx_list) * TL_NBUF, 1,
605 1.43 bouyer sizeof(struct tl_Rx_list) * TL_NBUF, 0, BUS_DMA_WAITOK,
606 1.43 bouyer &sc->Rx_dmamap);
607 1.43 bouyer if (error == 0)
608 1.43 bouyer error = bus_dmamap_create(sc->tl_dmatag,
609 1.43 bouyer sizeof(struct tl_Tx_list) * TL_NBUF, 1,
610 1.43 bouyer sizeof(struct tl_Tx_list) * TL_NBUF, 0, BUS_DMA_WAITOK,
611 1.43 bouyer &sc->Tx_dmamap);
612 1.43 bouyer if (error) {
613 1.43 bouyer errstring = "can't allocate DMA maps for lists";
614 1.43 bouyer goto bad;
615 1.43 bouyer }
616 1.43 bouyer error = bus_dmamem_alloc(sc->tl_dmatag,
617 1.43 bouyer sizeof(struct tl_Rx_list) * TL_NBUF, 0, PAGE_SIZE,
618 1.43 bouyer &segs, 1, &nsegs, BUS_DMA_NOWAIT);
619 1.43 bouyer if (error == 0)
620 1.43 bouyer error = bus_dmamem_map(sc->tl_dmatag, &segs, nsegs,
621 1.43 bouyer sizeof(struct tl_Rx_list) * TL_NBUF,
622 1.43 bouyer (caddr_t*)&sc->hw_Rx_list,
623 1.43 bouyer BUS_DMA_WAITOK | BUS_DMA_COHERENT);
624 1.43 bouyer if (error == 0)
625 1.43 bouyer error = bus_dmamap_load(sc->tl_dmatag, sc->Rx_dmamap,
626 1.43 bouyer sc->hw_Rx_list, sizeof(struct tl_Rx_list) * TL_NBUF, NULL,
627 1.43 bouyer BUS_DMA_WAITOK);
628 1.43 bouyer if (error == 0)
629 1.43 bouyer error = bus_dmamem_alloc(sc->tl_dmatag,
630 1.43 bouyer sizeof(struct tl_Tx_list) * TL_NBUF, 0, PAGE_SIZE,
631 1.43 bouyer &segs, 1, &nsegs, BUS_DMA_NOWAIT);
632 1.43 bouyer if (error == 0)
633 1.43 bouyer error = bus_dmamem_map(sc->tl_dmatag, &segs, nsegs,
634 1.43 bouyer sizeof(struct tl_Tx_list) * TL_NBUF,
635 1.43 bouyer (caddr_t*)&sc->hw_Tx_list,
636 1.43 bouyer BUS_DMA_WAITOK | BUS_DMA_COHERENT);
637 1.43 bouyer if (error == 0)
638 1.43 bouyer error = bus_dmamap_load(sc->tl_dmatag, sc->Tx_dmamap,
639 1.43 bouyer sc->hw_Tx_list, sizeof(struct tl_Tx_list) * TL_NBUF, NULL,
640 1.43 bouyer BUS_DMA_WAITOK);
641 1.43 bouyer if (error) {
642 1.43 bouyer errstring = "can't allocate DMA memory for lists";
643 1.43 bouyer goto bad;
644 1.1 bouyer }
645 1.43 bouyer memset(sc->hw_Rx_list, 0, sizeof(struct tl_Rx_list) * TL_NBUF);
646 1.43 bouyer memset(sc->hw_Tx_list, 0, sizeof(struct tl_Tx_list) * TL_NBUF);
647 1.1 bouyer for (i=0; i< TL_NBUF; i++) {
648 1.43 bouyer error = bus_dmamap_create(sc->tl_dmatag, MCLBYTES,
649 1.43 bouyer 1, MCLBYTES, 0, BUS_DMA_WAITOK | BUS_DMA_ALLOCNOW,
650 1.43 bouyer &sc->Rx_list[i].m_dmamap);
651 1.43 bouyer if (error == 0) {
652 1.43 bouyer error = bus_dmamap_create(sc->tl_dmatag, MCLBYTES,
653 1.43 bouyer TL_NSEG, MCLBYTES, 0,
654 1.43 bouyer BUS_DMA_WAITOK | BUS_DMA_ALLOCNOW,
655 1.43 bouyer &sc->Tx_list[i].m_dmamap);
656 1.43 bouyer }
657 1.43 bouyer if (error) {
658 1.43 bouyer errstring = "can't allocate DMA maps for mbufs";
659 1.43 bouyer goto bad;
660 1.43 bouyer }
661 1.43 bouyer sc->Rx_list[i].hw_list = &sc->hw_Rx_list[i];
662 1.43 bouyer sc->Rx_list[i].hw_listaddr = sc->Rx_dmamap->dm_segs[0].ds_addr
663 1.43 bouyer + sizeof(struct tl_Rx_list) * i;
664 1.43 bouyer sc->Tx_list[i].hw_list = &sc->hw_Tx_list[i];
665 1.43 bouyer sc->Tx_list[i].hw_listaddr = sc->Tx_dmamap->dm_segs[0].ds_addr
666 1.43 bouyer + sizeof(struct tl_Tx_list) * i;
667 1.43 bouyer if (tl_add_RxBuff(sc, &sc->Rx_list[i], NULL) == 0) {
668 1.43 bouyer errstring = "out of mbuf for receive list";
669 1.43 bouyer error = ENOMEM;
670 1.43 bouyer goto bad;
671 1.1 bouyer }
672 1.1 bouyer if (i > 0) { /* chain the list */
673 1.1 bouyer sc->Rx_list[i-1].next = &sc->Rx_list[i];
674 1.43 bouyer sc->hw_Rx_list[i-1].fwd =
675 1.43 bouyer htole32(sc->Rx_list[i].hw_listaddr);
676 1.1 bouyer sc->Tx_list[i-1].next = &sc->Tx_list[i];
677 1.1 bouyer }
678 1.1 bouyer }
679 1.43 bouyer sc->hw_Rx_list[TL_NBUF-1].fwd = 0;
680 1.1 bouyer sc->Rx_list[TL_NBUF-1].next = NULL;
681 1.43 bouyer sc->hw_Tx_list[TL_NBUF-1].fwd = 0;
682 1.1 bouyer sc->Tx_list[TL_NBUF-1].next = NULL;
683 1.1 bouyer
684 1.1 bouyer sc->active_Rx = &sc->Rx_list[0];
685 1.1 bouyer sc->last_Rx = &sc->Rx_list[TL_NBUF-1];
686 1.1 bouyer sc->active_Tx = sc->last_Tx = NULL;
687 1.1 bouyer sc->Free_Tx = &sc->Tx_list[0];
688 1.43 bouyer bus_dmamap_sync(sc->tl_dmatag, sc->Rx_dmamap, 0,
689 1.43 bouyer sizeof(struct tl_Rx_list) * TL_NBUF,
690 1.43 bouyer BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
691 1.43 bouyer bus_dmamap_sync(sc->tl_dmatag, sc->Tx_dmamap, 0,
692 1.43 bouyer sizeof(struct tl_Tx_list) * TL_NBUF,
693 1.43 bouyer BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
694 1.1 bouyer
695 1.1 bouyer if (nullbuf == NULL) {
696 1.43 bouyer error = bus_dmamap_create(sc->tl_dmatag,
697 1.43 bouyer ETHER_MIN_TX, 1,
698 1.43 bouyer ETHER_MIN_TX, 0, BUS_DMA_WAITOK,
699 1.43 bouyer &nullbuf_dmamap);
700 1.43 bouyer if (error == 0)
701 1.43 bouyer error = bus_dmamem_alloc(sc->tl_dmatag, ETHER_MIN_TX, 0,
702 1.43 bouyer PAGE_SIZE, &segs, 1, &nsegs, BUS_DMA_WAITOK);
703 1.43 bouyer if (error == 0)
704 1.43 bouyer error = bus_dmamem_map(sc->tl_dmatag, &segs, nsegs,
705 1.43 bouyer ETHER_MIN_TX, (caddr_t*)&nullbuf, BUS_DMA_WAITOK);
706 1.43 bouyer if (error == 0)
707 1.43 bouyer error = bus_dmamap_load(sc->tl_dmatag, nullbuf_dmamap,
708 1.43 bouyer nullbuf, ETHER_MIN_TX, NULL, BUS_DMA_WAITOK);
709 1.43 bouyer }
710 1.43 bouyer if (error) {
711 1.43 bouyer errstring = "can't allocate space for pad buffer";
712 1.43 bouyer goto bad;
713 1.1 bouyer }
714 1.42 thorpej memset(nullbuf, 0, ETHER_MIN_TX);
715 1.43 bouyer bus_dmamap_sync(sc->tl_dmatag, nullbuf_dmamap, 0, ETHER_MIN_TX,
716 1.43 bouyer BUS_DMASYNC_PREWRITE);
717 1.1 bouyer
718 1.15 thorpej /* set media */
719 1.15 thorpej mii_mediachg(&sc->tl_mii);
720 1.1 bouyer
721 1.1 bouyer /* start ticks calls */
722 1.32 thorpej callout_reset(&sc->tl_tick_ch, hz, tl_ticks, sc);
723 1.1 bouyer /* write adress of Rx list and enable interrupts */
724 1.43 bouyer TL_HR_WRITE(sc, TL_HOST_CH_PARM, sc->Rx_list[0].hw_listaddr);
725 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_CMD,
726 1.17 bouyer HOST_CMD_GO | HOST_CMD_RT | HOST_CMD_Nes | HOST_CMD_IntOn);
727 1.1 bouyer sc->tl_if.if_flags |= IFF_RUNNING;
728 1.1 bouyer sc->tl_if.if_flags &= ~IFF_OACTIVE;
729 1.1 bouyer return 0;
730 1.43 bouyer bad:
731 1.43 bouyer printf("%s: %s\n", sc->sc_dev.dv_xname, errstring);
732 1.43 bouyer sc->tl_if.if_flags &= ~IFF_UP;
733 1.43 bouyer splx(s);
734 1.43 bouyer return error;
735 1.1 bouyer }
736 1.1 bouyer
737 1.1 bouyer
738 1.1 bouyer static u_int32_t
739 1.1 bouyer tl_intreg_read(sc, reg)
740 1.1 bouyer tl_softc_t *sc;
741 1.1 bouyer u_int32_t reg;
742 1.1 bouyer {
743 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_INTR_DIOADR, reg & TL_HOST_DIOADR_MASK);
744 1.1 bouyer return TL_HR_READ(sc, TL_HOST_DIO_DATA);
745 1.1 bouyer }
746 1.1 bouyer
747 1.1 bouyer static u_int8_t
748 1.1 bouyer tl_intreg_read_byte(sc, reg)
749 1.1 bouyer tl_softc_t *sc;
750 1.1 bouyer u_int32_t reg;
751 1.1 bouyer {
752 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_INTR_DIOADR,
753 1.17 bouyer (reg & (~0x07)) & TL_HOST_DIOADR_MASK);
754 1.1 bouyer return TL_HR_READ_BYTE(sc, TL_HOST_DIO_DATA + (reg & 0x07));
755 1.1 bouyer }
756 1.1 bouyer
757 1.1 bouyer static void
758 1.1 bouyer tl_intreg_write(sc, reg, val)
759 1.1 bouyer tl_softc_t *sc;
760 1.1 bouyer u_int32_t reg;
761 1.1 bouyer u_int32_t val;
762 1.1 bouyer {
763 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_INTR_DIOADR, reg & TL_HOST_DIOADR_MASK);
764 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_DIO_DATA, val);
765 1.1 bouyer }
766 1.1 bouyer
767 1.1 bouyer static void
768 1.1 bouyer tl_intreg_write_byte(sc, reg, val)
769 1.1 bouyer tl_softc_t *sc;
770 1.1 bouyer u_int32_t reg;
771 1.1 bouyer u_int8_t val;
772 1.1 bouyer {
773 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_INTR_DIOADR,
774 1.17 bouyer (reg & (~0x03)) & TL_HOST_DIOADR_MASK);
775 1.1 bouyer TL_HR_WRITE_BYTE(sc, TL_HOST_DIO_DATA + (reg & 0x03), val);
776 1.1 bouyer }
777 1.1 bouyer
778 1.28 tron void
779 1.28 tron tl_mii_sync(sc)
780 1.28 tron struct tl_softc *sc;
781 1.1 bouyer {
782 1.28 tron int i;
783 1.1 bouyer
784 1.28 tron netsio_clr(sc, TL_NETSIO_MTXEN);
785 1.28 tron for (i = 0; i < 32; i++) {
786 1.28 tron netsio_clr(sc, TL_NETSIO_MCLK);
787 1.28 tron netsio_set(sc, TL_NETSIO_MCLK);
788 1.28 tron }
789 1.1 bouyer }
790 1.1 bouyer
791 1.15 thorpej void
792 1.28 tron tl_mii_sendbits(sc, data, nbits)
793 1.28 tron struct tl_softc *sc;
794 1.28 tron u_int32_t data;
795 1.28 tron int nbits;
796 1.1 bouyer {
797 1.28 tron int i;
798 1.1 bouyer
799 1.28 tron netsio_set(sc, TL_NETSIO_MTXEN);
800 1.28 tron for (i = 1 << (nbits - 1); i; i = i >> 1) {
801 1.28 tron netsio_clr(sc, TL_NETSIO_MCLK);
802 1.28 tron netsio_read(sc, TL_NETSIO_MCLK);
803 1.28 tron if (data & i)
804 1.28 tron netsio_set(sc, TL_NETSIO_MDATA);
805 1.28 tron else
806 1.28 tron netsio_clr(sc, TL_NETSIO_MDATA);
807 1.28 tron netsio_set(sc, TL_NETSIO_MCLK);
808 1.28 tron netsio_read(sc, TL_NETSIO_MCLK);
809 1.28 tron }
810 1.1 bouyer }
811 1.1 bouyer
812 1.15 thorpej int
813 1.15 thorpej tl_mii_read(self, phy, reg)
814 1.15 thorpej struct device *self;
815 1.15 thorpej int phy, reg;
816 1.1 bouyer {
817 1.28 tron struct tl_softc *sc = (struct tl_softc *)self;
818 1.28 tron int val = 0, i, err;
819 1.28 tron
820 1.28 tron /*
821 1.28 tron * Read the PHY register by manually driving the MII control lines.
822 1.28 tron */
823 1.1 bouyer
824 1.28 tron tl_mii_sync(sc);
825 1.28 tron tl_mii_sendbits(sc, MII_COMMAND_START, 2);
826 1.28 tron tl_mii_sendbits(sc, MII_COMMAND_READ, 2);
827 1.28 tron tl_mii_sendbits(sc, phy, 5);
828 1.28 tron tl_mii_sendbits(sc, reg, 5);
829 1.28 tron
830 1.28 tron netsio_clr(sc, TL_NETSIO_MTXEN);
831 1.28 tron netsio_clr(sc, TL_NETSIO_MCLK);
832 1.28 tron netsio_set(sc, TL_NETSIO_MCLK);
833 1.28 tron netsio_clr(sc, TL_NETSIO_MCLK);
834 1.28 tron
835 1.28 tron err = netsio_read(sc, TL_NETSIO_MDATA);
836 1.28 tron netsio_set(sc, TL_NETSIO_MCLK);
837 1.28 tron
838 1.28 tron /* Even if an error occurs, must still clock out the cycle. */
839 1.28 tron for (i = 0; i < 16; i++) {
840 1.28 tron val <<= 1;
841 1.28 tron netsio_clr(sc, TL_NETSIO_MCLK);
842 1.28 tron if (err == 0 && netsio_read(sc, TL_NETSIO_MDATA))
843 1.28 tron val |= 1;
844 1.28 tron netsio_set(sc, TL_NETSIO_MCLK);
845 1.28 tron }
846 1.28 tron netsio_clr(sc, TL_NETSIO_MCLK);
847 1.28 tron netsio_set(sc, TL_NETSIO_MCLK);
848 1.28 tron
849 1.28 tron return (err ? 0 : val);
850 1.15 thorpej }
851 1.15 thorpej
852 1.15 thorpej void
853 1.15 thorpej tl_mii_write(self, phy, reg, val)
854 1.15 thorpej struct device *self;
855 1.15 thorpej int phy, reg, val;
856 1.15 thorpej {
857 1.28 tron struct tl_softc *sc = (struct tl_softc *)self;
858 1.28 tron
859 1.28 tron /*
860 1.28 tron * Write the PHY register by manually driving the MII control lines.
861 1.28 tron */
862 1.28 tron
863 1.28 tron tl_mii_sync(sc);
864 1.28 tron tl_mii_sendbits(sc, MII_COMMAND_START, 2);
865 1.28 tron tl_mii_sendbits(sc, MII_COMMAND_WRITE, 2);
866 1.28 tron tl_mii_sendbits(sc, phy, 5);
867 1.28 tron tl_mii_sendbits(sc, reg, 5);
868 1.28 tron tl_mii_sendbits(sc, MII_COMMAND_ACK, 2);
869 1.28 tron tl_mii_sendbits(sc, val, 16);
870 1.15 thorpej
871 1.28 tron netsio_clr(sc, TL_NETSIO_MCLK);
872 1.28 tron netsio_set(sc, TL_NETSIO_MCLK);
873 1.15 thorpej }
874 1.15 thorpej
875 1.15 thorpej void
876 1.15 thorpej tl_statchg(self)
877 1.15 thorpej struct device *self;
878 1.15 thorpej {
879 1.15 thorpej tl_softc_t *sc = (struct tl_softc *)self;
880 1.15 thorpej u_int32_t reg;
881 1.15 thorpej
882 1.15 thorpej #ifdef TLDEBUG
883 1.15 thorpej printf("tl_statchg, media %x\n", sc->tl_ifmedia.ifm_media);
884 1.15 thorpej #endif
885 1.15 thorpej
886 1.15 thorpej /*
887 1.15 thorpej * We must keep the ThunderLAN and the PHY in sync as
888 1.15 thorpej * to the status of full-duplex!
889 1.15 thorpej */
890 1.15 thorpej reg = tl_intreg_read_byte(sc, TL_INT_NET + TL_INT_NetCmd);
891 1.15 thorpej if (sc->tl_mii.mii_media_active & IFM_FDX)
892 1.15 thorpej reg |= TL_NETCOMMAND_DUPLEX;
893 1.15 thorpej else
894 1.15 thorpej reg &= ~TL_NETCOMMAND_DUPLEX;
895 1.15 thorpej tl_intreg_write_byte(sc, TL_INT_NET + TL_INT_NetCmd, reg);
896 1.1 bouyer }
897 1.1 bouyer
898 1.1 bouyer void tl_i2c_set(v, bit)
899 1.1 bouyer void *v;
900 1.1 bouyer u_int8_t bit;
901 1.1 bouyer {
902 1.1 bouyer tl_softc_t *sc = v;
903 1.1 bouyer
904 1.1 bouyer switch (bit) {
905 1.1 bouyer case I2C_DATA:
906 1.1 bouyer netsio_set(sc, TL_NETSIO_EDATA);
907 1.1 bouyer break;
908 1.1 bouyer case I2C_CLOCK:
909 1.1 bouyer netsio_set(sc, TL_NETSIO_ECLOCK);
910 1.1 bouyer break;
911 1.1 bouyer case I2C_TXEN:
912 1.1 bouyer netsio_set(sc, TL_NETSIO_ETXEN);
913 1.1 bouyer break;
914 1.1 bouyer default:
915 1.1 bouyer printf("tl_i2c_set: unknown bit %d\n", bit);
916 1.1 bouyer }
917 1.1 bouyer return;
918 1.1 bouyer }
919 1.1 bouyer
920 1.1 bouyer void tl_i2c_clr(v, bit)
921 1.1 bouyer void *v;
922 1.1 bouyer u_int8_t bit;
923 1.1 bouyer {
924 1.1 bouyer tl_softc_t *sc = v;
925 1.1 bouyer
926 1.1 bouyer switch (bit) {
927 1.1 bouyer case I2C_DATA:
928 1.1 bouyer netsio_clr(sc, TL_NETSIO_EDATA);
929 1.1 bouyer break;
930 1.1 bouyer case I2C_CLOCK:
931 1.1 bouyer netsio_clr(sc, TL_NETSIO_ECLOCK);
932 1.1 bouyer break;
933 1.1 bouyer case I2C_TXEN:
934 1.1 bouyer netsio_clr(sc, TL_NETSIO_ETXEN);
935 1.1 bouyer break;
936 1.1 bouyer default:
937 1.1 bouyer printf("tl_i2c_clr: unknown bit %d\n", bit);
938 1.1 bouyer }
939 1.1 bouyer return;
940 1.1 bouyer }
941 1.1 bouyer
942 1.1 bouyer int tl_i2c_read(v, bit)
943 1.1 bouyer void *v;
944 1.1 bouyer u_int8_t bit;
945 1.1 bouyer {
946 1.1 bouyer tl_softc_t *sc = v;
947 1.1 bouyer
948 1.1 bouyer switch (bit) {
949 1.1 bouyer case I2C_DATA:
950 1.1 bouyer return netsio_read(sc, TL_NETSIO_EDATA);
951 1.1 bouyer break;
952 1.1 bouyer case I2C_CLOCK:
953 1.1 bouyer return netsio_read(sc, TL_NETSIO_ECLOCK);
954 1.1 bouyer break;
955 1.1 bouyer case I2C_TXEN:
956 1.1 bouyer return netsio_read(sc, TL_NETSIO_ETXEN);
957 1.1 bouyer break;
958 1.1 bouyer default:
959 1.1 bouyer printf("tl_i2c_read: unknown bit %d\n", bit);
960 1.1 bouyer return -1;
961 1.1 bouyer }
962 1.1 bouyer }
963 1.1 bouyer
964 1.1 bouyer static int
965 1.1 bouyer tl_intr(v)
966 1.1 bouyer void *v;
967 1.1 bouyer {
968 1.1 bouyer tl_softc_t *sc = v;
969 1.1 bouyer struct ifnet *ifp = &sc->tl_if;
970 1.1 bouyer struct Rx_list *Rx;
971 1.1 bouyer struct Tx_list *Tx;
972 1.1 bouyer struct mbuf *m;
973 1.1 bouyer u_int32_t int_type, int_reg;
974 1.1 bouyer int ack = 0;
975 1.1 bouyer int size;
976 1.1 bouyer
977 1.1 bouyer int_reg = TL_HR_READ(sc, TL_HOST_INTR_DIOADR);
978 1.1 bouyer int_type = int_reg & TL_INTR_MASK;
979 1.1 bouyer if (int_type == 0)
980 1.1 bouyer return 0;
981 1.1 bouyer #if defined(TLDEBUG_RX) || defined(TLDEBUG_TX)
982 1.1 bouyer printf("%s: interrupt type %x, intr_reg %x\n", sc->sc_dev.dv_xname,
983 1.17 bouyer int_type, int_reg);
984 1.1 bouyer #endif
985 1.1 bouyer /* disable interrupts */
986 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_CMD, HOST_CMD_IntOff);
987 1.1 bouyer switch(int_type & TL_INTR_MASK) {
988 1.1 bouyer case TL_INTR_RxEOF:
989 1.43 bouyer bus_dmamap_sync(sc->tl_dmatag, sc->Rx_dmamap, 0,
990 1.43 bouyer sizeof(struct tl_Rx_list) * TL_NBUF,
991 1.43 bouyer BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
992 1.43 bouyer while(le32toh(sc->active_Rx->hw_list->stat) &
993 1.43 bouyer TL_RX_CSTAT_CPLT) {
994 1.1 bouyer /* dequeue and requeue at end of list */
995 1.1 bouyer ack++;
996 1.1 bouyer Rx = sc->active_Rx;
997 1.1 bouyer sc->active_Rx = Rx->next;
998 1.43 bouyer bus_dmamap_sync(sc->tl_dmatag, Rx->m_dmamap, 0,
999 1.43 bouyer MCLBYTES, BUS_DMASYNC_POSTREAD);
1000 1.43 bouyer bus_dmamap_unload(sc->tl_dmatag, Rx->m_dmamap);
1001 1.1 bouyer m = Rx->m;
1002 1.43 bouyer size = le32toh(Rx->hw_list->stat) >> 16;
1003 1.1 bouyer #ifdef TLDEBUG_RX
1004 1.17 bouyer printf("tl_intr: RX list complete, Rx %p, size=%d\n",
1005 1.17 bouyer Rx, size);
1006 1.1 bouyer #endif
1007 1.43 bouyer if (tl_add_RxBuff(sc, Rx, m ) == 0) {
1008 1.17 bouyer /*
1009 1.17 bouyer * No new mbuf, reuse the same. This means
1010 1.17 bouyer * that this packet
1011 1.17 bouyer * is lost
1012 1.17 bouyer */
1013 1.1 bouyer m = NULL;
1014 1.1 bouyer #ifdef TL_PRIV_STATS
1015 1.1 bouyer sc->ierr_nomem++;
1016 1.1 bouyer #endif
1017 1.1 bouyer #ifdef TLDEBUG
1018 1.1 bouyer printf("%s: out of mbuf, lost input packet\n",
1019 1.17 bouyer sc->sc_dev.dv_xname);
1020 1.1 bouyer #endif
1021 1.1 bouyer }
1022 1.1 bouyer Rx->next = NULL;
1023 1.43 bouyer Rx->hw_list->fwd = 0;
1024 1.43 bouyer sc->last_Rx->hw_list->fwd = htole32(Rx->hw_listaddr);
1025 1.1 bouyer sc->last_Rx->next = Rx;
1026 1.1 bouyer sc->last_Rx = Rx;
1027 1.1 bouyer
1028 1.1 bouyer /* deliver packet */
1029 1.1 bouyer if (m) {
1030 1.1 bouyer if (size < sizeof(struct ether_header)) {
1031 1.1 bouyer m_freem(m);
1032 1.1 bouyer continue;
1033 1.1 bouyer }
1034 1.1 bouyer m->m_pkthdr.rcvif = ifp;
1035 1.24 thorpej m->m_pkthdr.len = m->m_len = size;
1036 1.1 bouyer #ifdef TLDEBUG_RX
1037 1.36 thorpej { struct ether_header *eh =
1038 1.36 thorpej mtod(m, struct ether_header *);
1039 1.1 bouyer printf("tl_intr: Rx packet:\n");
1040 1.36 thorpej ether_printheader(eh); }
1041 1.1 bouyer #endif
1042 1.1 bouyer #if NBPFILTER > 0
1043 1.36 thorpej if (ifp->if_bpf)
1044 1.36 thorpej bpf_mtap(ifp->if_bpf, m);
1045 1.1 bouyer #endif /* NBPFILTER > 0 */
1046 1.24 thorpej (*ifp->if_input)(ifp, m);
1047 1.1 bouyer }
1048 1.1 bouyer }
1049 1.43 bouyer bus_dmamap_sync(sc->tl_dmatag, sc->Rx_dmamap, 0,
1050 1.43 bouyer sizeof(struct tl_Rx_list) * TL_NBUF,
1051 1.43 bouyer BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
1052 1.1 bouyer #ifdef TLDEBUG_RX
1053 1.1 bouyer printf("TL_INTR_RxEOF: ack %d\n", ack);
1054 1.1 bouyer #else
1055 1.1 bouyer if (ack == 0) {
1056 1.1 bouyer printf("%s: EOF intr without anything to read !\n",
1057 1.17 bouyer sc->sc_dev.dv_xname);
1058 1.1 bouyer tl_reset(sc);
1059 1.1 bouyer /* shedule reinit of the board */
1060 1.32 thorpej callout_reset(&sc->tl_restart_ch, 1, tl_restart, sc);
1061 1.1 bouyer return(1);
1062 1.1 bouyer }
1063 1.1 bouyer #endif
1064 1.1 bouyer break;
1065 1.1 bouyer case TL_INTR_RxEOC:
1066 1.1 bouyer ack++;
1067 1.43 bouyer bus_dmamap_sync(sc->tl_dmatag, sc->Rx_dmamap, 0,
1068 1.43 bouyer sizeof(struct tl_Rx_list) * TL_NBUF,
1069 1.43 bouyer BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
1070 1.1 bouyer #ifdef TLDEBUG_RX
1071 1.1 bouyer printf("TL_INTR_RxEOC: ack %d\n", ack);
1072 1.1 bouyer #endif
1073 1.1 bouyer #ifdef DIAGNOSTIC
1074 1.43 bouyer if (le32toh(sc->active_Rx->hw_list->stat) & TL_RX_CSTAT_CPLT) {
1075 1.43 bouyer printf("%s: Rx EOC interrupt and active Tx list not "
1076 1.17 bouyer "cleared\n", sc->sc_dev.dv_xname);
1077 1.1 bouyer return 0;
1078 1.1 bouyer } else
1079 1.1 bouyer #endif
1080 1.1 bouyer {
1081 1.17 bouyer /*
1082 1.17 bouyer * write adress of Rx list and send Rx GO command, ack
1083 1.17 bouyer * interrupt and enable interrupts in one command
1084 1.17 bouyer */
1085 1.43 bouyer TL_HR_WRITE(sc, TL_HOST_CH_PARM, sc->active_Rx->hw_listaddr);
1086 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_CMD,
1087 1.17 bouyer HOST_CMD_GO | HOST_CMD_RT | HOST_CMD_Nes | ack | int_type |
1088 1.17 bouyer HOST_CMD_ACK | HOST_CMD_IntOn);
1089 1.1 bouyer return 1;
1090 1.1 bouyer }
1091 1.1 bouyer case TL_INTR_TxEOF:
1092 1.1 bouyer case TL_INTR_TxEOC:
1093 1.43 bouyer bus_dmamap_sync(sc->tl_dmatag, sc->Tx_dmamap, 0,
1094 1.43 bouyer sizeof(struct tl_Tx_list) * TL_NBUF,
1095 1.43 bouyer BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
1096 1.1 bouyer while ((Tx = sc->active_Tx) != NULL) {
1097 1.43 bouyer if((le32toh(Tx->hw_list->stat) & TL_TX_CSTAT_CPLT) == 0)
1098 1.1 bouyer break;
1099 1.1 bouyer ack++;
1100 1.1 bouyer #ifdef TLDEBUG_TX
1101 1.17 bouyer printf("TL_INTR_TxEOC: list 0x%xp done\n",
1102 1.43 bouyer Tx->hw_listaddr);
1103 1.1 bouyer #endif
1104 1.43 bouyer Tx->hw_list->stat = 0;
1105 1.43 bouyer bus_dmamap_sync(sc->tl_dmatag, Tx->m_dmamap, 0,
1106 1.43 bouyer MCLBYTES, BUS_DMASYNC_POSTWRITE);
1107 1.43 bouyer bus_dmamap_unload(sc->tl_dmatag, Tx->m_dmamap);
1108 1.1 bouyer m_freem(Tx->m);
1109 1.1 bouyer Tx->m = NULL;
1110 1.1 bouyer sc->active_Tx = Tx->next;
1111 1.1 bouyer if (sc->active_Tx == NULL)
1112 1.1 bouyer sc->last_Tx = NULL;
1113 1.1 bouyer Tx->next = sc->Free_Tx;
1114 1.1 bouyer sc->Free_Tx = Tx;
1115 1.1 bouyer }
1116 1.43 bouyer bus_dmamap_sync(sc->tl_dmatag, sc->Tx_dmamap, 0,
1117 1.43 bouyer sizeof(struct tl_Tx_list) * TL_NBUF,
1118 1.43 bouyer BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
1119 1.1 bouyer /* if this was an EOC, ACK immediatly */
1120 1.1 bouyer if (int_type == TL_INTR_TxEOC) {
1121 1.1 bouyer #ifdef TLDEBUG_TX
1122 1.17 bouyer printf("TL_INTR_TxEOC: ack %d (will be set to 1)\n",
1123 1.17 bouyer ack);
1124 1.1 bouyer #endif
1125 1.17 bouyer TL_HR_WRITE(sc, TL_HOST_CMD, 1 | int_type |
1126 1.17 bouyer HOST_CMD_ACK | HOST_CMD_IntOn);
1127 1.17 bouyer if ( sc->active_Tx != NULL) {
1128 1.17 bouyer /* needs a Tx go command */
1129 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_CH_PARM,
1130 1.43 bouyer sc->active_Tx->hw_listaddr);
1131 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_CMD, HOST_CMD_GO);
1132 1.1 bouyer }
1133 1.1 bouyer sc->tl_if.if_timer = 0;
1134 1.1 bouyer if (sc->tl_if.if_snd.ifq_head != NULL)
1135 1.1 bouyer tl_ifstart(&sc->tl_if);
1136 1.1 bouyer return 1;
1137 1.1 bouyer }
1138 1.1 bouyer #ifdef TLDEBUG
1139 1.1 bouyer else {
1140 1.1 bouyer printf("TL_INTR_TxEOF: ack %d\n", ack);
1141 1.1 bouyer }
1142 1.1 bouyer #endif
1143 1.1 bouyer sc->tl_if.if_timer = 0;
1144 1.1 bouyer if (sc->tl_if.if_snd.ifq_head != NULL)
1145 1.1 bouyer tl_ifstart(&sc->tl_if);
1146 1.1 bouyer break;
1147 1.1 bouyer case TL_INTR_Stat:
1148 1.1 bouyer ack++;
1149 1.1 bouyer #ifdef TLDEBUG
1150 1.1 bouyer printf("TL_INTR_Stat: ack %d\n", ack);
1151 1.1 bouyer #endif
1152 1.1 bouyer tl_read_stats(sc);
1153 1.1 bouyer break;
1154 1.1 bouyer case TL_INTR_Adc:
1155 1.1 bouyer if (int_reg & TL_INTVec_MASK) {
1156 1.1 bouyer /* adapter check conditions */
1157 1.17 bouyer printf("%s: check condition, intvect=0x%x, "
1158 1.17 bouyer "ch_param=0x%x\n", sc->sc_dev.dv_xname,
1159 1.17 bouyer int_reg & TL_INTVec_MASK,
1160 1.17 bouyer TL_HR_READ(sc, TL_HOST_CH_PARM));
1161 1.1 bouyer tl_reset(sc);
1162 1.1 bouyer /* shedule reinit of the board */
1163 1.32 thorpej callout_reset(&sc->tl_restart_ch, 1, tl_restart, sc);
1164 1.1 bouyer return(1);
1165 1.1 bouyer } else {
1166 1.1 bouyer u_int8_t netstat;
1167 1.1 bouyer /* Network status */
1168 1.17 bouyer netstat =
1169 1.17 bouyer tl_intreg_read_byte(sc, TL_INT_NET+TL_INT_NetSts);
1170 1.1 bouyer printf("%s: network status, NetSts=%x\n",
1171 1.17 bouyer sc->sc_dev.dv_xname, netstat);
1172 1.1 bouyer /* Ack interrupts */
1173 1.17 bouyer tl_intreg_write_byte(sc, TL_INT_NET+TL_INT_NetSts,
1174 1.17 bouyer netstat);
1175 1.1 bouyer ack++;
1176 1.1 bouyer }
1177 1.1 bouyer break;
1178 1.1 bouyer default:
1179 1.1 bouyer printf("%s: unhandled interrupt code %x!\n",
1180 1.17 bouyer sc->sc_dev.dv_xname, int_type);
1181 1.1 bouyer ack++;
1182 1.1 bouyer }
1183 1.1 bouyer
1184 1.1 bouyer if (ack) {
1185 1.1 bouyer /* Ack the interrupt and enable interrupts */
1186 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_CMD, ack | int_type | HOST_CMD_ACK |
1187 1.17 bouyer HOST_CMD_IntOn);
1188 1.1 bouyer return 1;
1189 1.1 bouyer }
1190 1.1 bouyer /* ack = 0 ; interrupt was perhaps not our. Just enable interrupts */
1191 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_CMD, HOST_CMD_IntOn);
1192 1.1 bouyer return 0;
1193 1.1 bouyer }
1194 1.1 bouyer
1195 1.1 bouyer static int
1196 1.1 bouyer tl_ifioctl(ifp, cmd, data)
1197 1.1 bouyer struct ifnet *ifp;
1198 1.1 bouyer ioctl_cmd_t cmd;
1199 1.1 bouyer caddr_t data;
1200 1.1 bouyer {
1201 1.1 bouyer struct tl_softc *sc = ifp->if_softc;
1202 1.1 bouyer struct ifreq *ifr = (struct ifreq *)data;
1203 1.1 bouyer int s, error;
1204 1.1 bouyer
1205 1.14 mycroft s = splnet();
1206 1.1 bouyer switch(cmd) {
1207 1.1 bouyer case SIOCSIFADDR: {
1208 1.1 bouyer struct ifaddr *ifa = (struct ifaddr *)data;
1209 1.1 bouyer sc->tl_if.if_flags |= IFF_UP;
1210 1.1 bouyer if ((error = tl_init(sc)) != NULL) {
1211 1.1 bouyer sc->tl_if.if_flags &= ~IFF_UP;
1212 1.1 bouyer break;
1213 1.1 bouyer }
1214 1.1 bouyer switch (ifa->ifa_addr->sa_family) {
1215 1.1 bouyer #ifdef INET
1216 1.1 bouyer case AF_INET:
1217 1.1 bouyer arp_ifinit(ifp, ifa);
1218 1.1 bouyer break;
1219 1.1 bouyer #endif
1220 1.1 bouyer #ifdef NS
1221 1.1 bouyer case AF_NS: {
1222 1.1 bouyer struct ns_addr *ina = &IA_SNS(ifa)->sns_addr;
1223 1.1 bouyer
1224 1.1 bouyer if (ns_nullhost(*ina))
1225 1.17 bouyer ina->x_host =
1226 1.18 bouyer *(union ns_host*) LLADDR(ifp->if_sadl);
1227 1.1 bouyer else
1228 1.41 thorpej memcpy(LLADDR(ifp->if_sadl), ina->x_host.c_host,
1229 1.1 bouyer ifp->if_addrlen);
1230 1.1 bouyer break;
1231 1.1 bouyer }
1232 1.1 bouyer #endif
1233 1.1 bouyer default:
1234 1.1 bouyer break;
1235 1.1 bouyer }
1236 1.1 bouyer break;
1237 1.1 bouyer }
1238 1.1 bouyer case SIOCSIFFLAGS:
1239 1.1 bouyer {
1240 1.1 bouyer u_int8_t reg;
1241 1.1 bouyer /*
1242 1.1 bouyer * If interface is marked up and not running, then start it.
1243 1.1 bouyer * If it is marked down and running, stop it.
1244 1.1 bouyer */
1245 1.1 bouyer if (ifp->if_flags & IFF_UP) {
1246 1.1 bouyer if ((ifp->if_flags & IFF_RUNNING) == 0) {
1247 1.1 bouyer error = tl_init(sc);
1248 1.1 bouyer /* all flags have been handled by init */
1249 1.1 bouyer break;
1250 1.1 bouyer }
1251 1.1 bouyer error = 0;
1252 1.17 bouyer reg = tl_intreg_read_byte(sc,
1253 1.17 bouyer TL_INT_NET + TL_INT_NetCmd);
1254 1.1 bouyer if (ifp->if_flags & IFF_PROMISC)
1255 1.1 bouyer reg |= TL_NETCOMMAND_CAF;
1256 1.1 bouyer else
1257 1.1 bouyer reg &= ~TL_NETCOMMAND_CAF;
1258 1.17 bouyer tl_intreg_write_byte(sc, TL_INT_NET + TL_INT_NetCmd,
1259 1.17 bouyer reg);
1260 1.1 bouyer #ifdef TL_PRIV_STATS
1261 1.1 bouyer if (ifp->if_flags & IFF_LINK0) {
1262 1.1 bouyer ifp->if_flags &= ~IFF_LINK0;
1263 1.17 bouyer printf("%s errors statistics\n",
1264 1.17 bouyer sc->sc_dev.dv_xname);
1265 1.17 bouyer printf(" %4d RX buffer overrun\n",
1266 1.17 bouyer sc->ierr_overr);
1267 1.17 bouyer printf(" %4d RX code error\n",
1268 1.17 bouyer sc->ierr_code);
1269 1.17 bouyer printf(" %4d RX crc error\n",
1270 1.17 bouyer sc->ierr_crc);
1271 1.17 bouyer printf(" %4d RX out of memory\n",
1272 1.17 bouyer sc->ierr_nomem);
1273 1.17 bouyer printf(" %4d TX buffer underrun\n",
1274 1.17 bouyer sc->oerr_underr);
1275 1.17 bouyer printf(" %4d TX deffered frames\n",
1276 1.17 bouyer sc->oerr_deffered);
1277 1.17 bouyer printf(" %4d TX single collisions\n",
1278 1.17 bouyer sc->oerr_coll);
1279 1.17 bouyer printf(" %4d TX multi collisions\n",
1280 1.17 bouyer sc->oerr_multicoll);
1281 1.17 bouyer printf(" %4d TX exessive collisions\n",
1282 1.17 bouyer sc->oerr_exesscoll);
1283 1.17 bouyer printf(" %4d TX late collisions\n",
1284 1.17 bouyer sc->oerr_latecoll);
1285 1.17 bouyer printf(" %4d TX carrier loss\n",
1286 1.17 bouyer sc->oerr_carrloss);
1287 1.17 bouyer printf(" %4d TX mbuf copy\n",
1288 1.17 bouyer sc->oerr_mcopy);
1289 1.1 bouyer }
1290 1.1 bouyer #endif
1291 1.1 bouyer } else {
1292 1.1 bouyer if (ifp->if_flags & IFF_RUNNING)
1293 1.1 bouyer tl_shutdown(sc);
1294 1.1 bouyer error = 0;
1295 1.1 bouyer }
1296 1.1 bouyer break;
1297 1.1 bouyer }
1298 1.1 bouyer case SIOCADDMULTI:
1299 1.1 bouyer case SIOCDELMULTI:
1300 1.1 bouyer /*
1301 1.1 bouyer * Update multicast listeners
1302 1.1 bouyer */
1303 1.1 bouyer if (cmd == SIOCADDMULTI)
1304 1.1 bouyer error = ether_addmulti(ifr, &sc->tl_ec);
1305 1.1 bouyer else
1306 1.1 bouyer error = ether_delmulti(ifr, &sc->tl_ec);
1307 1.1 bouyer if (error == ENETRESET) {
1308 1.1 bouyer tl_addr_filter(sc);
1309 1.1 bouyer error = 0;
1310 1.1 bouyer }
1311 1.1 bouyer break;
1312 1.1 bouyer case SIOCSIFMEDIA:
1313 1.1 bouyer case SIOCGIFMEDIA:
1314 1.15 thorpej error = ifmedia_ioctl(ifp, ifr, &sc->tl_mii.mii_media, cmd);
1315 1.1 bouyer break;
1316 1.1 bouyer default:
1317 1.1 bouyer error = EINVAL;
1318 1.1 bouyer }
1319 1.1 bouyer splx(s);
1320 1.1 bouyer return error;
1321 1.1 bouyer }
1322 1.1 bouyer
1323 1.1 bouyer static void
1324 1.1 bouyer tl_ifstart(ifp)
1325 1.1 bouyer struct ifnet *ifp;
1326 1.1 bouyer {
1327 1.1 bouyer tl_softc_t *sc = ifp->if_softc;
1328 1.43 bouyer struct mbuf *mb_head;
1329 1.1 bouyer struct Tx_list *Tx;
1330 1.1 bouyer int segment, size;
1331 1.43 bouyer int again = 0, error;
1332 1.1 bouyer
1333 1.1 bouyer txloop:
1334 1.1 bouyer /* If we don't have more space ... */
1335 1.1 bouyer if (sc->Free_Tx == NULL) {
1336 1.1 bouyer #ifdef TLDEBUG
1337 1.1 bouyer printf("tl_ifstart: No free TX list\n");
1338 1.1 bouyer #endif
1339 1.1 bouyer return;
1340 1.1 bouyer }
1341 1.1 bouyer /* Grab a paquet for output */
1342 1.1 bouyer IF_DEQUEUE(&ifp->if_snd, mb_head);
1343 1.1 bouyer if (mb_head == NULL) {
1344 1.1 bouyer #ifdef TLDEBUG_TX
1345 1.1 bouyer printf("tl_ifstart: nothing to send\n");
1346 1.1 bouyer #endif
1347 1.1 bouyer return;
1348 1.1 bouyer }
1349 1.1 bouyer Tx = sc->Free_Tx;
1350 1.1 bouyer sc->Free_Tx = Tx->next;
1351 1.43 bouyer Tx->next = NULL;
1352 1.1 bouyer /*
1353 1.1 bouyer * Go through each of the mbufs in the chain and initialize
1354 1.1 bouyer * the transmit list descriptors with the physical address
1355 1.1 bouyer * and size of the mbuf.
1356 1.1 bouyer */
1357 1.1 bouyer tbdinit:
1358 1.43 bouyer memset(Tx->hw_list, 0, sizeof(struct tl_Tx_list));
1359 1.1 bouyer Tx->m = mb_head;
1360 1.43 bouyer size = mb_head->m_pkthdr.len;
1361 1.43 bouyer if ((error = bus_dmamap_load_mbuf(sc->tl_dmatag, Tx->m_dmamap, mb_head,
1362 1.43 bouyer BUS_DMA_NOWAIT)) || (size < ETHER_MIN_TX &&
1363 1.43 bouyer Tx->m_dmamap->dm_nsegs == TL_NSEG)) {
1364 1.43 bouyer struct mbuf *mn;
1365 1.1 bouyer /*
1366 1.17 bouyer * We ran out of segments, or we will. We have to recopy this
1367 1.17 bouyer * mbuf chain first.
1368 1.1 bouyer */
1369 1.43 bouyer if (error == 0)
1370 1.43 bouyer bus_dmamap_unload(sc->tl_dmatag, Tx->m_dmamap);
1371 1.43 bouyer if (again) {
1372 1.43 bouyer /* already copyed, can't do much more */
1373 1.43 bouyer m_freem(mb_head);
1374 1.43 bouyer goto bad;
1375 1.43 bouyer }
1376 1.43 bouyer again = 1;
1377 1.1 bouyer #ifdef TLDEBUG_TX
1378 1.1 bouyer printf("tl_ifstart: need to copy mbuf\n");
1379 1.1 bouyer #endif
1380 1.1 bouyer #ifdef TL_PRIV_STATS
1381 1.1 bouyer sc->oerr_mcopy++;
1382 1.1 bouyer #endif
1383 1.1 bouyer MGETHDR(mn, M_DONTWAIT, MT_DATA);
1384 1.1 bouyer if (mn == NULL) {
1385 1.1 bouyer m_freem(mb_head);
1386 1.1 bouyer goto bad;
1387 1.1 bouyer }
1388 1.1 bouyer if (mb_head->m_pkthdr.len > MHLEN) {
1389 1.1 bouyer MCLGET(mn, M_DONTWAIT);
1390 1.1 bouyer if ((mn->m_flags & M_EXT) == 0) {
1391 1.1 bouyer m_freem(mn);
1392 1.1 bouyer m_freem(mb_head);
1393 1.1 bouyer goto bad;
1394 1.1 bouyer }
1395 1.1 bouyer }
1396 1.1 bouyer m_copydata(mb_head, 0, mb_head->m_pkthdr.len,
1397 1.17 bouyer mtod(mn, caddr_t));
1398 1.1 bouyer mn->m_pkthdr.len = mn->m_len = mb_head->m_pkthdr.len;
1399 1.1 bouyer m_freem(mb_head);
1400 1.1 bouyer mb_head = mn;
1401 1.1 bouyer goto tbdinit;
1402 1.1 bouyer }
1403 1.43 bouyer for (segment = 0; segment < Tx->m_dmamap->dm_nsegs; segment++) {
1404 1.43 bouyer Tx->hw_list->seg[segment].data_addr =
1405 1.43 bouyer htole32(Tx->m_dmamap->dm_segs[segment].ds_addr);
1406 1.43 bouyer Tx->hw_list->seg[segment].data_count =
1407 1.43 bouyer htole32(Tx->m_dmamap->dm_segs[segment].ds_len);
1408 1.43 bouyer }
1409 1.43 bouyer bus_dmamap_sync(sc->tl_dmatag, Tx->m_dmamap, 0, size,
1410 1.43 bouyer BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
1411 1.1 bouyer /* We are at end of mbuf chain. check the size and
1412 1.1 bouyer * see if it needs to be extended
1413 1.1 bouyer */
1414 1.1 bouyer if (size < ETHER_MIN_TX) {
1415 1.1 bouyer #ifdef DIAGNOSTIC
1416 1.1 bouyer if (segment >= TL_NSEG) {
1417 1.1 bouyer panic("tl_ifstart: to much segmets (%d)\n", segment);
1418 1.1 bouyer }
1419 1.1 bouyer #endif
1420 1.1 bouyer /*
1421 1.1 bouyer * add the nullbuf in the seg
1422 1.1 bouyer */
1423 1.43 bouyer Tx->hw_list->seg[segment].data_count =
1424 1.43 bouyer htole32(ETHER_MIN_TX - size);
1425 1.1 bouyer size = ETHER_MIN_TX;
1426 1.43 bouyer Tx->hw_list->seg[segment].data_addr =
1427 1.43 bouyer htole32(nullbuf_dmamap->dm_segs[0].ds_addr);
1428 1.1 bouyer segment++;
1429 1.1 bouyer }
1430 1.1 bouyer /* The list is done, finish the list init */
1431 1.43 bouyer Tx->hw_list->seg[segment-1].data_count |=
1432 1.43 bouyer htole32(TL_LAST_SEG);
1433 1.43 bouyer Tx->hw_list->stat = htole32((size << 16) | 0x3000);
1434 1.1 bouyer #ifdef TLDEBUG_TX
1435 1.1 bouyer printf("%s: sending, Tx : stat = 0x%x\n", sc->sc_dev.dv_xname,
1436 1.43 bouyer le32toh(Tx->hw_list->stat));
1437 1.1 bouyer #if 0
1438 1.1 bouyer for(segment = 0; segment < TL_NSEG; segment++) {
1439 1.1 bouyer printf(" seg %d addr 0x%x len 0x%x\n",
1440 1.17 bouyer segment,
1441 1.43 bouyer le32toh(Tx->hw_list->seg[segment].data_addr),
1442 1.43 bouyer le32toh(Tx->hw_list->seg[segment].data_count));
1443 1.1 bouyer }
1444 1.1 bouyer #endif
1445 1.1 bouyer #endif
1446 1.1 bouyer if (sc->active_Tx == NULL) {
1447 1.1 bouyer sc->active_Tx = sc->last_Tx = Tx;
1448 1.1 bouyer #ifdef TLDEBUG_TX
1449 1.1 bouyer printf("%s: Tx GO, addr=0x%x\n", sc->sc_dev.dv_xname,
1450 1.43 bouyer Tx->hw_listaddr));
1451 1.1 bouyer #endif
1452 1.43 bouyer bus_dmamap_sync(sc->tl_dmatag, sc->Tx_dmamap, 0,
1453 1.43 bouyer sizeof(struct tl_Tx_list) * TL_NBUF,
1454 1.43 bouyer BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
1455 1.43 bouyer TL_HR_WRITE(sc, TL_HOST_CH_PARM, Tx->hw_listaddr);
1456 1.1 bouyer TL_HR_WRITE(sc, TL_HOST_CMD, HOST_CMD_GO);
1457 1.1 bouyer } else {
1458 1.1 bouyer #ifdef TLDEBUG_TX
1459 1.1 bouyer printf("%s: Tx addr=0x%x queued\n", sc->sc_dev.dv_xname,
1460 1.43 bouyer Tx->hw_listaddr));
1461 1.1 bouyer #endif
1462 1.43 bouyer sc->last_Tx->hw_list->fwd = htole32(Tx->hw_listaddr);
1463 1.1 bouyer sc->last_Tx->next = Tx;
1464 1.1 bouyer sc->last_Tx = Tx;
1465 1.1 bouyer #ifdef DIAGNOSTIC
1466 1.43 bouyer if (sc->last_Tx->hw_list->fwd & 0x7)
1467 1.17 bouyer printf("%s: physical addr 0x%x of list not properly "
1468 1.17 bouyer "aligned\n",
1469 1.43 bouyer sc->sc_dev.dv_xname, sc->last_Rx->hw_list->fwd);
1470 1.1 bouyer #endif
1471 1.43 bouyer bus_dmamap_sync(sc->tl_dmatag, sc->Tx_dmamap, 0,
1472 1.43 bouyer sizeof(struct tl_Tx_list) * TL_NBUF,
1473 1.43 bouyer BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
1474 1.1 bouyer }
1475 1.1 bouyer #if NBPFILTER > 0
1476 1.1 bouyer /* Pass packet to bpf if there is a listener */
1477 1.1 bouyer if (ifp->if_bpf)
1478 1.1 bouyer bpf_mtap(ifp->if_bpf, mb_head);
1479 1.1 bouyer #endif
1480 1.17 bouyer /*
1481 1.17 bouyer * Set a 5 second timer just in case we don't hear from the card again.
1482 1.17 bouyer */
1483 1.1 bouyer ifp->if_timer = 5;
1484 1.1 bouyer goto txloop;
1485 1.1 bouyer bad:
1486 1.1 bouyer #ifdef TLDEBUG
1487 1.1 bouyer printf("tl_ifstart: Out of mbuf, Tx pkt lost\n");
1488 1.1 bouyer #endif
1489 1.1 bouyer Tx->next = sc->Free_Tx;
1490 1.1 bouyer sc->Free_Tx = Tx;
1491 1.1 bouyer return;
1492 1.1 bouyer }
1493 1.1 bouyer
1494 1.1 bouyer static void
1495 1.1 bouyer tl_ifwatchdog(ifp)
1496 1.1 bouyer struct ifnet *ifp;
1497 1.1 bouyer {
1498 1.1 bouyer tl_softc_t *sc = ifp->if_softc;
1499 1.1 bouyer
1500 1.1 bouyer if ((ifp->if_flags & IFF_RUNNING) == 0)
1501 1.1 bouyer return;
1502 1.1 bouyer printf("%s: device timeout\n", sc->sc_dev.dv_xname);
1503 1.1 bouyer ifp->if_oerrors++;
1504 1.1 bouyer tl_init(sc);
1505 1.1 bouyer }
1506 1.1 bouyer
1507 1.1 bouyer static int
1508 1.1 bouyer tl_mediachange(ifp)
1509 1.1 bouyer struct ifnet *ifp;
1510 1.1 bouyer {
1511 1.15 thorpej
1512 1.15 thorpej if (ifp->if_flags & IFF_UP)
1513 1.15 thorpej tl_init(ifp->if_softc);
1514 1.15 thorpej return (0);
1515 1.1 bouyer }
1516 1.1 bouyer
1517 1.1 bouyer static void
1518 1.1 bouyer tl_mediastatus(ifp, ifmr)
1519 1.1 bouyer struct ifnet *ifp;
1520 1.1 bouyer struct ifmediareq *ifmr;
1521 1.1 bouyer {
1522 1.1 bouyer tl_softc_t *sc = ifp->if_softc;
1523 1.15 thorpej
1524 1.15 thorpej mii_pollstat(&sc->tl_mii);
1525 1.15 thorpej ifmr->ifm_active = sc->tl_mii.mii_media_active;
1526 1.15 thorpej ifmr->ifm_status = sc->tl_mii.mii_media_status;
1527 1.1 bouyer }
1528 1.1 bouyer
1529 1.43 bouyer static int tl_add_RxBuff(sc, Rx, oldm)
1530 1.43 bouyer tl_softc_t *sc;
1531 1.1 bouyer struct Rx_list *Rx;
1532 1.1 bouyer struct mbuf *oldm;
1533 1.1 bouyer {
1534 1.1 bouyer struct mbuf *m;
1535 1.43 bouyer int error;
1536 1.1 bouyer
1537 1.1 bouyer MGETHDR(m, M_DONTWAIT, MT_DATA);
1538 1.1 bouyer if (m != NULL) {
1539 1.1 bouyer MCLGET(m, M_DONTWAIT);
1540 1.1 bouyer if ((m->m_flags & M_EXT) == 0) {
1541 1.1 bouyer m_freem(m);
1542 1.1 bouyer if (oldm == NULL)
1543 1.1 bouyer return 0;
1544 1.1 bouyer m = oldm;
1545 1.1 bouyer m->m_data = m->m_ext.ext_buf;
1546 1.1 bouyer }
1547 1.1 bouyer } else {
1548 1.1 bouyer if (oldm == NULL)
1549 1.1 bouyer return 0;
1550 1.1 bouyer m = oldm;
1551 1.1 bouyer m->m_data = m->m_ext.ext_buf;
1552 1.1 bouyer }
1553 1.43 bouyer
1554 1.43 bouyer /* (re)init the Rx_list struct */
1555 1.43 bouyer
1556 1.43 bouyer Rx->m = m;
1557 1.43 bouyer if ((error = bus_dmamap_load(sc->tl_dmatag, Rx->m_dmamap,
1558 1.43 bouyer m->m_ext.ext_buf, m->m_ext.ext_size, NULL, BUS_DMA_NOWAIT)) != 0) {
1559 1.43 bouyer printf("%s: bus_dmamap_load() failed (error %d) for "
1560 1.43 bouyer "tl_add_RxBuff\n", sc->sc_dev.dv_xname, error);
1561 1.43 bouyer printf("size %d (%d)\n", m->m_pkthdr.len, MCLBYTES);
1562 1.43 bouyer m_freem(m);
1563 1.43 bouyer Rx->m = NULL;
1564 1.43 bouyer return 0;
1565 1.43 bouyer }
1566 1.43 bouyer bus_dmamap_sync(sc->tl_dmatag, Rx->m_dmamap, 0,
1567 1.43 bouyer MCLBYTES, BUS_DMASYNC_PREREAD);
1568 1.1 bouyer /*
1569 1.1 bouyer * Move the data pointer up so that the incoming data packet
1570 1.1 bouyer * will be 32-bit aligned.
1571 1.1 bouyer */
1572 1.1 bouyer m->m_data += 2;
1573 1.1 bouyer
1574 1.43 bouyer Rx->hw_list->stat =
1575 1.43 bouyer htole32(((Rx->m_dmamap->dm_segs[0].ds_len -2) << 16) | 0x3000);
1576 1.43 bouyer Rx->hw_list->seg.data_count =
1577 1.43 bouyer htole32(Rx->m_dmamap->dm_segs[0].ds_len -2);
1578 1.43 bouyer Rx->hw_list->seg.data_addr =
1579 1.43 bouyer htole32(Rx->m_dmamap->dm_segs[0].ds_addr + 2);
1580 1.1 bouyer return (m != oldm);
1581 1.1 bouyer }
1582 1.1 bouyer
1583 1.1 bouyer static void tl_ticks(v)
1584 1.1 bouyer void *v;
1585 1.1 bouyer {
1586 1.1 bouyer tl_softc_t *sc = v;
1587 1.1 bouyer
1588 1.1 bouyer tl_read_stats(sc);
1589 1.19 thorpej
1590 1.19 thorpej /* Tick the MII. */
1591 1.19 thorpej mii_tick(&sc->tl_mii);
1592 1.19 thorpej
1593 1.17 bouyer /* read statistics every seconds */
1594 1.32 thorpej callout_reset(&sc->tl_tick_ch, hz, tl_ticks, sc);
1595 1.17 bouyer }
1596 1.17 bouyer
1597 1.17 bouyer static void
1598 1.17 bouyer tl_read_stats(sc)
1599 1.17 bouyer tl_softc_t *sc;
1600 1.17 bouyer {
1601 1.17 bouyer u_int32_t reg;
1602 1.17 bouyer int ierr_overr;
1603 1.17 bouyer int ierr_code;
1604 1.17 bouyer int ierr_crc;
1605 1.17 bouyer int oerr_underr;
1606 1.17 bouyer int oerr_deffered;
1607 1.17 bouyer int oerr_coll;
1608 1.17 bouyer int oerr_multicoll;
1609 1.17 bouyer int oerr_exesscoll;
1610 1.17 bouyer int oerr_latecoll;
1611 1.17 bouyer int oerr_carrloss;
1612 1.17 bouyer struct ifnet *ifp = &sc->tl_if;
1613 1.17 bouyer
1614 1.17 bouyer reg = tl_intreg_read(sc, TL_INT_STATS_TX);
1615 1.17 bouyer ifp->if_opackets += reg & 0x00ffffff;
1616 1.17 bouyer oerr_underr = reg >> 24;
1617 1.17 bouyer
1618 1.17 bouyer reg = tl_intreg_read(sc, TL_INT_STATS_RX);
1619 1.17 bouyer ifp->if_ipackets += reg & 0x00ffffff;
1620 1.17 bouyer ierr_overr = reg >> 24;
1621 1.17 bouyer
1622 1.17 bouyer reg = tl_intreg_read(sc, TL_INT_STATS_FERR);
1623 1.17 bouyer ierr_crc = (reg & TL_FERR_CRC) >> 16;
1624 1.17 bouyer ierr_code = (reg & TL_FERR_CODE) >> 24;
1625 1.17 bouyer oerr_deffered = (reg & TL_FERR_DEF);
1626 1.17 bouyer
1627 1.17 bouyer reg = tl_intreg_read(sc, TL_INT_STATS_COLL);
1628 1.17 bouyer oerr_multicoll = (reg & TL_COL_MULTI);
1629 1.17 bouyer oerr_coll = (reg & TL_COL_SINGLE) >> 16;
1630 1.17 bouyer
1631 1.17 bouyer reg = tl_intreg_read(sc, TL_INT_LERR);
1632 1.17 bouyer oerr_exesscoll = (reg & TL_LERR_ECOLL);
1633 1.17 bouyer oerr_latecoll = (reg & TL_LERR_LCOLL) >> 8;
1634 1.17 bouyer oerr_carrloss = (reg & TL_LERR_CL) >> 16;
1635 1.17 bouyer
1636 1.17 bouyer
1637 1.17 bouyer ifp->if_oerrors += oerr_underr + oerr_exesscoll + oerr_latecoll +
1638 1.17 bouyer oerr_carrloss;
1639 1.17 bouyer ifp->if_collisions += oerr_coll + oerr_multicoll;
1640 1.17 bouyer ifp->if_ierrors += ierr_overr + ierr_code + ierr_crc;
1641 1.17 bouyer
1642 1.17 bouyer if (ierr_overr)
1643 1.17 bouyer printf("%s: receiver ring buffer overrun\n",
1644 1.17 bouyer sc->sc_dev.dv_xname);
1645 1.17 bouyer if (oerr_underr)
1646 1.17 bouyer printf("%s: transmit buffer underrun\n",
1647 1.17 bouyer sc->sc_dev.dv_xname);
1648 1.17 bouyer #ifdef TL_PRIV_STATS
1649 1.17 bouyer sc->ierr_overr += ierr_overr;
1650 1.17 bouyer sc->ierr_code += ierr_code;
1651 1.17 bouyer sc->ierr_crc += ierr_crc;
1652 1.17 bouyer sc->oerr_underr += oerr_underr;
1653 1.17 bouyer sc->oerr_deffered += oerr_deffered;
1654 1.17 bouyer sc->oerr_coll += oerr_coll;
1655 1.17 bouyer sc->oerr_multicoll += oerr_multicoll;
1656 1.17 bouyer sc->oerr_exesscoll += oerr_exesscoll;
1657 1.17 bouyer sc->oerr_latecoll += oerr_latecoll;
1658 1.17 bouyer sc->oerr_carrloss += oerr_carrloss;
1659 1.17 bouyer #endif
1660 1.17 bouyer }
1661 1.1 bouyer
1662 1.17 bouyer static void tl_addr_filter(sc)
1663 1.17 bouyer tl_softc_t *sc;
1664 1.17 bouyer {
1665 1.17 bouyer struct ether_multistep step;
1666 1.17 bouyer struct ether_multi *enm;
1667 1.17 bouyer u_int32_t hash[2] = {0, 0};
1668 1.17 bouyer int i;
1669 1.1 bouyer
1670 1.17 bouyer sc->tl_if.if_flags &= ~IFF_ALLMULTI;
1671 1.17 bouyer ETHER_FIRST_MULTI(step, &sc->tl_ec, enm);
1672 1.17 bouyer while (enm != NULL) {
1673 1.17 bouyer #ifdef TLDEBUG
1674 1.17 bouyer printf("tl_addr_filter: addrs %s %s\n",
1675 1.17 bouyer ether_sprintf(enm->enm_addrlo),
1676 1.17 bouyer ether_sprintf(enm->enm_addrhi));
1677 1.17 bouyer #endif
1678 1.17 bouyer if (memcmp(enm->enm_addrlo, enm->enm_addrhi, 6) == 0) {
1679 1.17 bouyer i = tl_multicast_hash(enm->enm_addrlo);
1680 1.17 bouyer hash[i/32] |= 1 << (i%32);
1681 1.17 bouyer } else {
1682 1.17 bouyer hash[0] = hash[1] = 0xffffffff;
1683 1.17 bouyer sc->tl_if.if_flags |= IFF_ALLMULTI;
1684 1.17 bouyer break;
1685 1.1 bouyer }
1686 1.17 bouyer ETHER_NEXT_MULTI(step, enm);
1687 1.17 bouyer }
1688 1.17 bouyer #ifdef TLDEBUG
1689 1.17 bouyer printf("tl_addr_filer: hash1 %x has2 %x\n", hash[0], hash[1]);
1690 1.17 bouyer #endif
1691 1.17 bouyer tl_intreg_write(sc, TL_INT_HASH1, hash[0]);
1692 1.17 bouyer tl_intreg_write(sc, TL_INT_HASH2, hash[1]);
1693 1.17 bouyer }
1694 1.1 bouyer
1695 1.17 bouyer static int tl_multicast_hash(a)
1696 1.17 bouyer u_int8_t *a;
1697 1.17 bouyer {
1698 1.17 bouyer int hash;
1699 1.17 bouyer
1700 1.17 bouyer #define DA(addr,bit) (addr[5 - (bit/8)] & (1 << bit%8))
1701 1.17 bouyer #define xor8(a,b,c,d,e,f,g,h) (((a != 0) + (b != 0) + (c != 0) + (d != 0) + (e != 0) + (f != 0) + (g != 0) + (h != 0)) & 1)
1702 1.17 bouyer
1703 1.17 bouyer hash = xor8( DA(a,0), DA(a, 6), DA(a,12), DA(a,18), DA(a,24), DA(a,30),
1704 1.17 bouyer DA(a,36), DA(a,42));
1705 1.17 bouyer hash |= xor8( DA(a,1), DA(a, 7), DA(a,13), DA(a,19), DA(a,25), DA(a,31),
1706 1.17 bouyer DA(a,37), DA(a,43)) << 1;
1707 1.17 bouyer hash |= xor8( DA(a,2), DA(a, 8), DA(a,14), DA(a,20), DA(a,26), DA(a,32),
1708 1.17 bouyer DA(a,38), DA(a,44)) << 2;
1709 1.17 bouyer hash |= xor8( DA(a,3), DA(a, 9), DA(a,15), DA(a,21), DA(a,27), DA(a,33),
1710 1.17 bouyer DA(a,39), DA(a,45)) << 3;
1711 1.17 bouyer hash |= xor8( DA(a,4), DA(a,10), DA(a,16), DA(a,22), DA(a,28), DA(a,34),
1712 1.17 bouyer DA(a,40), DA(a,46)) << 4;
1713 1.17 bouyer hash |= xor8( DA(a,5), DA(a,11), DA(a,17), DA(a,23), DA(a,29), DA(a,35),
1714 1.17 bouyer DA(a,41), DA(a,47)) << 5;
1715 1.1 bouyer
1716 1.17 bouyer return hash;
1717 1.17 bouyer }
1718 1.1 bouyer
1719 1.17 bouyer #if defined(TLDEBUG_RX)
1720 1.17 bouyer void
1721 1.17 bouyer ether_printheader(eh)
1722 1.17 bouyer struct ether_header *eh;
1723 1.17 bouyer {
1724 1.17 bouyer u_char *c = (char*)eh;
1725 1.17 bouyer int i;
1726 1.17 bouyer for (i=0; i<sizeof(struct ether_header); i++)
1727 1.17 bouyer printf("%x ", (u_int)c[i]);
1728 1.17 bouyer printf("\n");
1729 1.17 bouyer }
1730 1.1 bouyer #endif
1731