if_tl.c revision 1.27 1 /* $NetBSD: if_tl.c,v 1.27 1999/11/19 18:27:18 thorpej Exp $ */
2
3 /*
4 * Copyright (c) 1997 Manuel Bouyer. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software
15 * must display the following acknowledgement:
16 * This product includes software developed by Manuel Bouyer.
17 * 4. The name of the author may not be used to endorse or promote products
18 * derived from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 /*
33 * Texas Instruments ThunderLAN ethernet controller
34 * ThunderLAN Programmer's Guide (TI Literature Number SPWU013A)
35 * available from www.ti.com
36 */
37
38 #undef TLDEBUG
39 #define TL_PRIV_STATS
40 #undef TLDEBUG_RX
41 #undef TLDEBUG_TX
42 #undef TLDEBUG_ADDR
43
44 #include "opt_inet.h"
45 #include "opt_ns.h"
46
47 #include <sys/param.h>
48 #include <sys/systm.h>
49 #include <sys/mbuf.h>
50 #include <sys/protosw.h>
51 #include <sys/socket.h>
52 #include <sys/ioctl.h>
53 #include <sys/errno.h>
54 #include <sys/malloc.h>
55 #include <sys/kernel.h>
56 #include <sys/proc.h> /* only for declaration of wakeup() used by vm.h */
57 #include <sys/device.h>
58
59 #include <net/if.h>
60 #if defined(SIOCSIFMEDIA)
61 #include <net/if_media.h>
62 #endif
63 #include <net/if_types.h>
64 #include <net/if_dl.h>
65 #include <net/route.h>
66 #include <net/netisr.h>
67
68 #include "bpfilter.h"
69 #if NBPFILTER > 0
70 #include <net/bpf.h>
71 #include <net/bpfdesc.h>
72 #endif
73
74 #ifdef INET
75 #include <netinet/in.h>
76 #include <netinet/in_systm.h>
77 #include <netinet/in_var.h>
78 #include <netinet/ip.h>
79 #endif
80
81 #ifdef NS
82 #include <netns/ns.h>
83 #include <netns/ns_if.h>
84 #endif
85
86 #include <vm/vm.h>
87 #include <vm/vm_param.h>
88 #include <vm/vm_kern.h>
89
90 #if defined(__NetBSD__)
91 #include <net/if_ether.h>
92 #if defined(INET)
93 #include <netinet/if_inarp.h>
94 #endif
95
96 #include <machine/bus.h>
97 #include <machine/intr.h>
98
99 #include <dev/pci/pcireg.h>
100 #include <dev/pci/pcivar.h>
101 #include <dev/pci/pcidevs.h>
102
103 #include <dev/i2c/i2c_bus.h>
104 #include <dev/i2c/i2c_eeprom.h>
105
106 #include <dev/mii/mii.h>
107 #include <dev/mii/miivar.h>
108 #include <dev/mii/mii_bitbang.h>
109
110 #include <dev/mii/tlphyvar.h>
111
112 #include <dev/pci/if_tlregs.h>
113 #include <dev/pci/if_tlvar.h>
114 #endif /* __NetBSD__ */
115
116 #if defined(__NetBSD__) && defined(__alpha__)
117 /* XXX XXX NEED REAL DMA MAPPING SUPPORT XXX XXX */
118 #undef vtophys
119 #define vtophys(va) alpha_XXX_dmamap((vaddr_t)(va))
120 #endif
121
122 /* number of transmit/receive buffers */
123 #ifndef TL_NBUF
124 #define TL_NBUF 10
125 #endif
126
127 /* number of seconds the link can be idle */
128 #ifndef TL_IDLETIME
129 #define TL_IDLETIME 10
130 #endif
131
132 static int tl_pci_match __P((struct device *, struct cfdata *, void *));
133 static void tl_pci_attach __P((struct device *, struct device *, void *));
134 static int tl_intr __P((void *));
135
136 static int tl_ifioctl __P((struct ifnet *, ioctl_cmd_t, caddr_t));
137 static int tl_mediachange __P((struct ifnet *));
138 static void tl_mediastatus __P((struct ifnet *, struct ifmediareq *));
139 static void tl_ifwatchdog __P((struct ifnet *));
140 static void tl_shutdown __P((void*));
141
142 static void tl_ifstart __P((struct ifnet *));
143 static void tl_reset __P((tl_softc_t*));
144 static int tl_init __P((tl_softc_t*));
145 static void tl_restart __P((void *));
146 static int tl_add_RxBuff __P((struct Rx_list*, struct mbuf*));
147 static void tl_read_stats __P((tl_softc_t*));
148 static void tl_ticks __P((void*));
149 static int tl_multicast_hash __P((u_int8_t*));
150 static void tl_addr_filter __P((tl_softc_t*));
151
152 static u_int32_t tl_intreg_read __P((tl_softc_t*, u_int32_t));
153 static void tl_intreg_write __P((tl_softc_t*, u_int32_t, u_int32_t));
154 static u_int8_t tl_intreg_read_byte __P((tl_softc_t*, u_int32_t));
155 static void tl_intreg_write_byte __P((tl_softc_t*, u_int32_t, u_int8_t));
156
157 #if defined(TLDEBUG_RX)
158 static void ether_printheader __P((struct ether_header*));
159 #endif
160
161 int tl_mii_read __P((struct device *, int, int));
162 void tl_mii_write __P((struct device *, int, int, int));
163
164 void tl_statchg __P((struct device *));
165
166 void tl_i2c_set __P((void*, u_int8_t));
167 void tl_i2c_clr __P((void*, u_int8_t));
168 int tl_i2c_read __P((void*, u_int8_t));
169
170 static __inline void netsio_clr __P((tl_softc_t*, u_int8_t));
171 static __inline void netsio_set __P((tl_softc_t*, u_int8_t));
172 static __inline u_int8_t netsio_read __P((tl_softc_t*, u_int8_t));
173 static __inline void netsio_clr(sc, bits)
174 tl_softc_t* sc;
175 u_int8_t bits;
176 {
177 tl_intreg_write_byte(sc, TL_INT_NET + TL_INT_NetSio,
178 tl_intreg_read_byte(sc, TL_INT_NET + TL_INT_NetSio) & (~bits));
179 }
180 static __inline void netsio_set(sc, bits)
181 tl_softc_t* sc;
182 u_int8_t bits;
183 {
184 tl_intreg_write_byte(sc, TL_INT_NET + TL_INT_NetSio,
185 tl_intreg_read_byte(sc, TL_INT_NET + TL_INT_NetSio) | bits);
186 }
187 static __inline u_int8_t netsio_read(sc, bits)
188 tl_softc_t* sc;
189 u_int8_t bits;
190 {
191 return (tl_intreg_read_byte(sc, TL_INT_NET + TL_INT_NetSio) & bits);
192 }
193
194 /*
195 * MII bit-bang glue.
196 */
197 u_int32_t tl_mii_bitbang_read __P((struct device *));
198 void tl_mii_bitbang_write __P((struct device *, u_int32_t));
199
200 const struct mii_bitbang_ops tl_mii_bitbang_ops = {
201 tl_mii_bitbang_read,
202 tl_mii_bitbang_write,
203 {
204 TL_NETSIO_MDATA, /* MII_BIT_MDO */
205 TL_NETSIO_MDATA, /* MII_BIT_MDI */
206 TL_NETSIO_MCLK, /* MII_BIT_MDC */
207 TL_NETSIO_MTXEN, /* MII_BIT_DIR_HOST_PHY */
208 0, /* MII_BIT_DIR_PHY_HOST */
209 }
210 };
211
212 struct cfattach tl_ca = {
213 sizeof(tl_softc_t), tl_pci_match, tl_pci_attach
214 };
215
216 const struct tl_product_desc tl_compaq_products[] = {
217 { PCI_PRODUCT_COMPAQ_N100TX, TLPHY_MEDIA_NO_10_T,
218 "Compaq Netelligent 10/100 TX" },
219 { PCI_PRODUCT_COMPAQ_N10T, TLPHY_MEDIA_10_5,
220 "Compaq Netelligent 10 T" },
221 { PCI_PRODUCT_COMPAQ_IntNF3P, TLPHY_MEDIA_10_2,
222 "Compaq Integrated NetFlex 3/P" },
223 { PCI_PRODUCT_COMPAQ_IntPL100TX, TLPHY_MEDIA_10_2|TLPHY_MEDIA_NO_10_T,
224 "Compaq ProLiant Integrated Netelligent 10/100 TX" },
225 { PCI_PRODUCT_COMPAQ_DPNet100TX, TLPHY_MEDIA_10_5|TLPHY_MEDIA_NO_10_T,
226 "Compaq Dual Port Netelligent 10/100 TX" },
227 { PCI_PRODUCT_COMPAQ_DP4000, TLPHY_MEDIA_10_5,
228 "Compaq Deskpro 4000 5233MMX" },
229 { PCI_PRODUCT_COMPAQ_NF3P_BNC, TLPHY_MEDIA_10_2,
230 "Compaq NetFlex 3/P w/ BNC" },
231 { PCI_PRODUCT_COMPAQ_NF3P, TLPHY_MEDIA_10_5,
232 "Compaq NetFlex 3/P" },
233 { 0, 0, NULL },
234 };
235
236 const struct tl_product_desc tl_ti_products[] = {
237 /*
238 * Built-in Ethernet on the TI TravelMate 5000
239 * docking station; better product description?
240 */
241 { PCI_PRODUCT_TI_TLAN, 0,
242 "Texas Instruments ThunderLAN" },
243 { 0, 0, NULL },
244 };
245
246 struct tl_vendor_desc {
247 u_int32_t tv_vendor;
248 const struct tl_product_desc *tv_products;
249 };
250
251 const struct tl_vendor_desc tl_vendors[] = {
252 { PCI_VENDOR_COMPAQ, tl_compaq_products },
253 { PCI_VENDOR_TI, tl_ti_products },
254 { 0, NULL },
255 };
256
257 const struct tl_product_desc *tl_lookup_product __P((u_int32_t));
258
259 const struct tl_product_desc *
260 tl_lookup_product(id)
261 u_int32_t id;
262 {
263 const struct tl_product_desc *tp;
264 const struct tl_vendor_desc *tv;
265
266 for (tv = tl_vendors; tv->tv_products != NULL; tv++)
267 if (PCI_VENDOR(id) == tv->tv_vendor)
268 break;
269
270 if ((tp = tv->tv_products) == NULL)
271 return (NULL);
272
273 for (; tp->tp_desc != NULL; tp++)
274 if (PCI_PRODUCT(id) == tp->tp_product)
275 break;
276
277 if (tp->tp_desc == NULL)
278 return (NULL);
279
280 return (tp);
281 }
282
283 static char *nullbuf = NULL;
284
285 static int
286 tl_pci_match(parent, match, aux)
287 struct device *parent;
288 struct cfdata *match;
289 void *aux;
290 {
291 struct pci_attach_args *pa = (struct pci_attach_args *) aux;
292
293 if (tl_lookup_product(pa->pa_id) != NULL)
294 return (1);
295
296 return (0);
297 }
298
299 static void
300 tl_pci_attach(parent, self, aux)
301 struct device * parent;
302 struct device * self;
303 void * aux;
304 {
305 tl_softc_t *sc = (tl_softc_t *)self;
306 struct pci_attach_args * const pa = (struct pci_attach_args *) aux;
307 const struct tl_product_desc *tp;
308 struct ifnet * const ifp = &sc->tl_if;
309 bus_space_tag_t iot, memt;
310 bus_space_handle_t ioh, memh;
311 pci_intr_handle_t intrhandle;
312 const char *intrstr;
313 int i, tmp, ioh_valid, memh_valid;
314 int reg_io, reg_mem;
315 pcireg_t reg10, reg14;
316 pcireg_t csr;
317
318 printf("\n");
319
320 tp = tl_lookup_product(pa->pa_id);
321 if (tp == NULL)
322 panic("tl_pci_attach: impossible");
323 sc->tl_product = tp;
324
325 /*
326 * Map the card space. Fisrt we have to find the I/O and MEM
327 * registers. I/O is supposed to be at 0x10, MEM at 0x14,
328 * but some boards (Compaq Netflex 3/P PCI) seem to have it reversed.
329 * The ThunderLAN manual is not consistent about this either (there
330 * are both cases in code examples).
331 */
332 reg10 = pci_conf_read(pa->pa_pc, pa->pa_tag, 0x10);
333 reg14 = pci_conf_read(pa->pa_pc, pa->pa_tag, 0x14);
334 if (PCI_MAPREG_TYPE(reg10) == PCI_MAPREG_TYPE_IO)
335 reg_io = 0x10;
336 else if (PCI_MAPREG_TYPE(reg14) == PCI_MAPREG_TYPE_IO)
337 reg_io = 0x14;
338 else
339 reg_io = 0;
340 if (PCI_MAPREG_TYPE(reg10) == PCI_MAPREG_TYPE_MEM)
341 reg_mem = 0x10;
342 else if (PCI_MAPREG_TYPE(reg14) == PCI_MAPREG_TYPE_MEM)
343 reg_mem = 0x14;
344 else
345 reg_mem = 0;
346
347 if (reg_io != 0)
348 ioh_valid = (pci_mapreg_map(pa, reg_io, PCI_MAPREG_TYPE_IO,
349 0, &iot, &ioh, NULL, NULL) == 0);
350 else
351 ioh_valid = 0;
352 if (reg_mem != 0)
353 memh_valid = (pci_mapreg_map(pa, PCI_CBMA,
354 PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT,
355 0, &memt, &memh, NULL, NULL) == 0);
356 else
357 memh_valid = 0;
358
359 if (ioh_valid) {
360 sc->tl_bustag = iot;
361 sc->tl_bushandle = ioh;
362 } else if (memh_valid) {
363 sc->tl_bustag = memt;
364 sc->tl_bushandle = memh;
365 } else {
366 printf("%s: unable to map device registers\n",
367 sc->sc_dev.dv_xname);
368 return;
369 }
370
371 /* Enable the device. */
372 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
373 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
374 csr | PCI_COMMAND_MASTER_ENABLE);
375
376 printf("%s: %s\n", sc->sc_dev.dv_xname, tp->tp_desc);
377
378 tl_reset(sc);
379
380 /* fill in the i2c struct */
381 sc->i2cbus.adapter_softc = sc;
382 sc->i2cbus.set_bit = tl_i2c_set;
383 sc->i2cbus.clr_bit = tl_i2c_clr;
384 sc->i2cbus.read_bit = tl_i2c_read;
385
386 #ifdef TLDEBUG
387 printf("default values of INTreg: 0x%x\n",
388 tl_intreg_read(sc, TL_INT_Defaults));
389 #endif
390
391 /* read mac addr */
392 for (i=0; i<ETHER_ADDR_LEN; i++) {
393 tmp = i2c_eeprom_read(&sc->i2cbus, 0x83 + i);
394 if (tmp < 0) {
395 printf("%s: error reading Ethernet adress\n",
396 sc->sc_dev.dv_xname);
397 return;
398 } else {
399 sc->tl_enaddr[i] = tmp;
400 }
401 }
402 printf("%s: Ethernet address %s\n", sc->sc_dev.dv_xname,
403 ether_sprintf(sc->tl_enaddr));
404
405 /* Map and establish interrupts */
406 if (pci_intr_map(pa->pa_pc, pa->pa_intrtag, pa->pa_intrpin,
407 pa->pa_intrline, &intrhandle)) {
408 printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname);
409 return;
410 }
411 intrstr = pci_intr_string(pa->pa_pc, intrhandle);
412 sc->tl_ih = pci_intr_establish(pa->pa_pc, intrhandle, IPL_NET,
413 tl_intr, sc);
414 if (sc->tl_ih == NULL) {
415 printf("%s: couldn't establish interrupt",
416 sc->sc_dev.dv_xname);
417 if (intrstr != NULL)
418 printf(" at %s", intrstr);
419 printf("\n");
420 return;
421 }
422 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr);
423
424 /*
425 * Add shutdown hook so that DMA is disabled prior to reboot. Not
426 * doing do could allow DMA to corrupt kernel memory during the
427 * reboot before the driver initializes.
428 */
429 (void) shutdownhook_establish(tl_shutdown, sc);
430
431 /*
432 * Initialize our media structures and probe the MII.
433 *
434 * Note that we don't care about the media instance. We
435 * are expecting to have multiple PHYs on the 10/100 cards,
436 * and on those cards we exclude the internal PHY from providing
437 * 10baseT. By ignoring the instance, it allows us to not have
438 * to specify it on the command line when switching media.
439 */
440 sc->tl_mii.mii_ifp = ifp;
441 sc->tl_mii.mii_readreg = tl_mii_read;
442 sc->tl_mii.mii_writereg = tl_mii_write;
443 sc->tl_mii.mii_statchg = tl_statchg;
444 ifmedia_init(&sc->tl_mii.mii_media, IFM_IMASK, tl_mediachange,
445 tl_mediastatus);
446 mii_phy_probe(self, &sc->tl_mii, 0xffffffff, MII_PHY_ANY,
447 MII_OFFSET_ANY);
448 if (LIST_FIRST(&sc->tl_mii.mii_phys) == NULL) {
449 ifmedia_add(&sc->tl_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL);
450 ifmedia_set(&sc->tl_mii.mii_media, IFM_ETHER|IFM_NONE);
451 } else
452 ifmedia_set(&sc->tl_mii.mii_media, IFM_ETHER|IFM_AUTO);
453
454 bcopy(sc->sc_dev.dv_xname, sc->tl_if.if_xname, IFNAMSIZ);
455 sc->tl_if.if_softc = sc;
456 ifp->if_flags = IFF_BROADCAST|IFF_SIMPLEX|IFF_NOTRAILERS|IFF_MULTICAST;
457 ifp->if_ioctl = tl_ifioctl;
458 ifp->if_start = tl_ifstart;
459 ifp->if_watchdog = tl_ifwatchdog;
460 ifp->if_timer = 0;
461 if_attach(ifp);
462 ether_ifattach(&(sc)->tl_if, (sc)->tl_enaddr);
463 #if NBPFILTER > 0
464 bpfattach(&sc->tl_bpf, &sc->tl_if, DLT_EN10MB,
465 sizeof(struct ether_header));
466 #endif
467 }
468
469 static void
470 tl_reset(sc)
471 tl_softc_t *sc;
472 {
473 int i;
474
475 /* read stats */
476 if (sc->tl_if.if_flags & IFF_RUNNING) {
477 untimeout(tl_ticks, sc);
478 tl_read_stats(sc);
479 }
480 /* Reset adapter */
481 TL_HR_WRITE(sc, TL_HOST_CMD,
482 TL_HR_READ(sc, TL_HOST_CMD) | HOST_CMD_Ad_Rst);
483 DELAY(100000);
484 /* Disable interrupts */
485 TL_HR_WRITE(sc, TL_HOST_CMD, HOST_CMD_IntOff);
486 /* setup aregs & hash */
487 for (i = TL_INT_Areg0; i <= TL_INT_HASH2; i = i + 4)
488 tl_intreg_write(sc, i, 0);
489 #ifdef TLDEBUG_ADDR
490 printf("Areg & hash registers: \n");
491 for (i = TL_INT_Areg0; i <= TL_INT_HASH2; i = i + 4)
492 printf(" reg %x: %x\n", i, tl_intreg_read(sc, i));
493 #endif
494 /* Setup NetConfig */
495 tl_intreg_write(sc, TL_INT_NetConfig,
496 TL_NETCONFIG_1F | TL_NETCONFIG_1chn | TL_NETCONFIG_PHY_EN);
497 /* Bsize: accept default */
498 /* TX commit in Acommit: accept default */
499 /* Load Ld_tmr and Ld_thr */
500 /* Ld_tmr = 3 */
501 TL_HR_WRITE(sc, TL_HOST_CMD, 0x3 | HOST_CMD_LdTmr);
502 /* Ld_thr = 0 */
503 TL_HR_WRITE(sc, TL_HOST_CMD, 0x0 | HOST_CMD_LdThr);
504 /* Unreset MII */
505 netsio_set(sc, TL_NETSIO_NMRST);
506 DELAY(100000);
507 sc->tl_mii.mii_media_status &= ~IFM_ACTIVE;
508 sc->tl_flags = 0;
509 sc->opkt = 0;
510 sc->stats_exesscoll = 0;
511 }
512
513 static void tl_shutdown(v)
514 void *v;
515 {
516 tl_softc_t *sc = v;
517 struct Tx_list *Tx;
518 int i;
519
520 if ((sc->tl_if.if_flags & IFF_RUNNING) == 0)
521 return;
522 /* disable interrupts */
523 TL_HR_WRITE(sc, TL_HOST_CMD, HOST_CMD_IntOff);
524 /* stop TX and RX channels */
525 TL_HR_WRITE(sc, TL_HOST_CMD,
526 HOST_CMD_STOP | HOST_CMD_RT | HOST_CMD_Nes);
527 TL_HR_WRITE(sc, TL_HOST_CMD, HOST_CMD_STOP);
528 DELAY(100000);
529
530 /* stop statistics reading loop, read stats */
531 untimeout(tl_ticks, sc);
532 tl_read_stats(sc);
533
534 /* Down the MII. */
535 mii_down(&sc->tl_mii);
536
537 /* deallocate memory allocations */
538 for (i=0; i< TL_NBUF; i++) {
539 if (sc->Rx_list[i].m)
540 m_freem(sc->Rx_list[i].m);
541 sc->Rx_list[i].m = NULL;
542 }
543 free(sc->Rx_list, M_DEVBUF);
544 sc->Rx_list = NULL;
545 while ((Tx = sc->active_Tx) != NULL) {
546 Tx->hw_list.stat = 0;
547 m_freem(Tx->m);
548 sc->active_Tx = Tx->next;
549 Tx->next = sc->Free_Tx;
550 sc->Free_Tx = Tx;
551 }
552 sc->last_Tx = NULL;
553 free(sc->Tx_list, M_DEVBUF);
554 sc->Tx_list = NULL;
555 sc->tl_if.if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
556 sc->tl_mii.mii_media_status &= ~IFM_ACTIVE;
557 sc->tl_flags = 0;
558 }
559
560 static void tl_restart(v)
561 void *v;
562 {
563 tl_init(v);
564 }
565
566 static int tl_init(sc)
567 tl_softc_t *sc;
568 {
569 struct ifnet *ifp = &sc->tl_if;
570 int i, s;
571
572 s = splnet();
573 /* cancel any pending IO */
574 tl_shutdown(sc);
575 tl_reset(sc);
576 if ((sc->tl_if.if_flags & IFF_UP) == 0) {
577 splx(s);
578 return 0;
579 }
580 /* Set various register to reasonable value */
581 /* setup NetCmd in promisc mode if needed */
582 i = (ifp->if_flags & IFF_PROMISC) ? TL_NETCOMMAND_CAF : 0;
583 tl_intreg_write_byte(sc, TL_INT_NET + TL_INT_NetCmd,
584 TL_NETCOMMAND_NRESET | TL_NETCOMMAND_NWRAP | i);
585 /* Max receive size : MCLBYTES */
586 tl_intreg_write_byte(sc, TL_INT_MISC + TL_MISC_MaxRxL, MCLBYTES & 0xff);
587 tl_intreg_write_byte(sc, TL_INT_MISC + TL_MISC_MaxRxH,
588 (MCLBYTES >> 8) & 0xff);
589
590 /* init MAC addr */
591 for (i = 0; i < ETHER_ADDR_LEN; i++)
592 tl_intreg_write_byte(sc, TL_INT_Areg0 + i , sc->tl_enaddr[i]);
593 /* add multicast filters */
594 tl_addr_filter(sc);
595 #ifdef TLDEBUG_ADDR
596 printf("Wrote Mac addr, Areg & hash registers are now: \n");
597 for (i = TL_INT_Areg0; i <= TL_INT_HASH2; i = i + 4)
598 printf(" reg %x: %x\n", i, tl_intreg_read(sc, i));
599 #endif
600
601 /* Pre-allocate receivers mbuf, make the lists */
602 sc->Rx_list = malloc(sizeof(struct Rx_list) * TL_NBUF, M_DEVBUF,
603 M_NOWAIT);
604 sc->Tx_list = malloc(sizeof(struct Tx_list) * TL_NBUF, M_DEVBUF,
605 M_NOWAIT);
606 if (sc->Rx_list == NULL || sc->Tx_list == NULL) {
607 printf("%s: out of memory for lists\n", sc->sc_dev.dv_xname);
608 sc->tl_if.if_flags &= ~IFF_UP;
609 splx(s);
610 return ENOMEM;
611 }
612 for (i=0; i< TL_NBUF; i++) {
613 if (tl_add_RxBuff(&sc->Rx_list[i], NULL) == 0) {
614 printf("%s: out of mbuf for receive list\n",
615 sc->sc_dev.dv_xname);
616 sc->tl_if.if_flags &= ~IFF_UP;
617 splx(s);
618 return ENOMEM;
619 }
620 if (i > 0) { /* chain the list */
621 sc->Rx_list[i-1].next = &sc->Rx_list[i];
622 sc->Rx_list[i-1].hw_list.fwd =
623 vtophys(&sc->Rx_list[i].hw_list);
624 #ifdef DIAGNOSTIC
625 if (sc->Rx_list[i-1].hw_list.fwd & 0x7)
626 printf("%s: physical addr 0x%x of list not "
627 "properly aligned\n",
628 sc->sc_dev.dv_xname,
629 sc->Rx_list[i-1].hw_list.fwd);
630 #endif
631 sc->Tx_list[i-1].next = &sc->Tx_list[i];
632 }
633 }
634 sc->Rx_list[TL_NBUF-1].next = NULL;
635 sc->Rx_list[TL_NBUF-1].hw_list.fwd = 0;
636 sc->Tx_list[TL_NBUF-1].next = NULL;
637
638 sc->active_Rx = &sc->Rx_list[0];
639 sc->last_Rx = &sc->Rx_list[TL_NBUF-1];
640 sc->active_Tx = sc->last_Tx = NULL;
641 sc->Free_Tx = &sc->Tx_list[0];
642
643 if (nullbuf == NULL)
644 nullbuf = malloc(ETHER_MIN_TX, M_DEVBUF, M_NOWAIT);
645 if (nullbuf == NULL) {
646 printf("%s: can't allocate space for pad buffer\n",
647 sc->sc_dev.dv_xname);
648 sc->tl_if.if_flags &= ~IFF_UP;
649 splx(s);
650 return ENOMEM;
651 }
652 bzero(nullbuf, ETHER_MIN_TX);
653
654 /* set media */
655 mii_mediachg(&sc->tl_mii);
656
657 /* start ticks calls */
658 timeout(tl_ticks, sc, hz);
659 /* write adress of Rx list and enable interrupts */
660 TL_HR_WRITE(sc, TL_HOST_CH_PARM, vtophys(&sc->Rx_list[0].hw_list));
661 TL_HR_WRITE(sc, TL_HOST_CMD,
662 HOST_CMD_GO | HOST_CMD_RT | HOST_CMD_Nes | HOST_CMD_IntOn);
663 sc->tl_if.if_flags |= IFF_RUNNING;
664 sc->tl_if.if_flags &= ~IFF_OACTIVE;
665 return 0;
666 }
667
668
669 static u_int32_t
670 tl_intreg_read(sc, reg)
671 tl_softc_t *sc;
672 u_int32_t reg;
673 {
674 TL_HR_WRITE(sc, TL_HOST_INTR_DIOADR, reg & TL_HOST_DIOADR_MASK);
675 return TL_HR_READ(sc, TL_HOST_DIO_DATA);
676 }
677
678 static u_int8_t
679 tl_intreg_read_byte(sc, reg)
680 tl_softc_t *sc;
681 u_int32_t reg;
682 {
683 TL_HR_WRITE(sc, TL_HOST_INTR_DIOADR,
684 (reg & (~0x07)) & TL_HOST_DIOADR_MASK);
685 return TL_HR_READ_BYTE(sc, TL_HOST_DIO_DATA + (reg & 0x07));
686 }
687
688 static void
689 tl_intreg_write(sc, reg, val)
690 tl_softc_t *sc;
691 u_int32_t reg;
692 u_int32_t val;
693 {
694 TL_HR_WRITE(sc, TL_HOST_INTR_DIOADR, reg & TL_HOST_DIOADR_MASK);
695 TL_HR_WRITE(sc, TL_HOST_DIO_DATA, val);
696 }
697
698 static void
699 tl_intreg_write_byte(sc, reg, val)
700 tl_softc_t *sc;
701 u_int32_t reg;
702 u_int8_t val;
703 {
704 TL_HR_WRITE(sc, TL_HOST_INTR_DIOADR,
705 (reg & (~0x03)) & TL_HOST_DIOADR_MASK);
706 TL_HR_WRITE_BYTE(sc, TL_HOST_DIO_DATA + (reg & 0x03), val);
707 }
708
709 u_int32_t
710 tl_mii_bitbang_read(self)
711 struct device *self;
712 {
713 struct tl_softc *sc = (void *) self;
714
715 return (tl_intreg_read_byte(sc, TL_INT_NET + TL_INT_NetSio));
716 }
717
718 void
719 tl_mii_bitbang_write(self, val)
720 struct device *self;
721 u_int32_t val;
722 {
723 struct tl_softc *sc = (void *) self;
724
725 tl_intreg_write_byte(sc, TL_INT_NET + TL_INT_NetSio, val & 0xff);
726 }
727
728 int
729 tl_mii_read(self, phy, reg)
730 struct device *self;
731 int phy, reg;
732 {
733
734 return (mii_bitbang_readreg(self, &tl_mii_bitbang_ops, phy, reg));
735 }
736
737 void
738 tl_mii_write(self, phy, reg, val)
739 struct device *self;
740 int phy, reg, val;
741 {
742
743 mii_bitbang_writereg(self, &tl_mii_bitbang_ops, phy, reg, val);
744 }
745
746 void
747 tl_statchg(self)
748 struct device *self;
749 {
750 tl_softc_t *sc = (struct tl_softc *)self;
751 u_int32_t reg;
752
753 #ifdef TLDEBUG
754 printf("tl_statchg, media %x\n", sc->tl_ifmedia.ifm_media);
755 #endif
756
757 /*
758 * We must keep the ThunderLAN and the PHY in sync as
759 * to the status of full-duplex!
760 */
761 reg = tl_intreg_read_byte(sc, TL_INT_NET + TL_INT_NetCmd);
762 if (sc->tl_mii.mii_media_active & IFM_FDX)
763 reg |= TL_NETCOMMAND_DUPLEX;
764 else
765 reg &= ~TL_NETCOMMAND_DUPLEX;
766 tl_intreg_write_byte(sc, TL_INT_NET + TL_INT_NetCmd, reg);
767
768 /* XXX Update ifp->if_baudrate */
769 }
770
771 void tl_i2c_set(v, bit)
772 void *v;
773 u_int8_t bit;
774 {
775 tl_softc_t *sc = v;
776
777 switch (bit) {
778 case I2C_DATA:
779 netsio_set(sc, TL_NETSIO_EDATA);
780 break;
781 case I2C_CLOCK:
782 netsio_set(sc, TL_NETSIO_ECLOCK);
783 break;
784 case I2C_TXEN:
785 netsio_set(sc, TL_NETSIO_ETXEN);
786 break;
787 default:
788 printf("tl_i2c_set: unknown bit %d\n", bit);
789 }
790 return;
791 }
792
793 void tl_i2c_clr(v, bit)
794 void *v;
795 u_int8_t bit;
796 {
797 tl_softc_t *sc = v;
798
799 switch (bit) {
800 case I2C_DATA:
801 netsio_clr(sc, TL_NETSIO_EDATA);
802 break;
803 case I2C_CLOCK:
804 netsio_clr(sc, TL_NETSIO_ECLOCK);
805 break;
806 case I2C_TXEN:
807 netsio_clr(sc, TL_NETSIO_ETXEN);
808 break;
809 default:
810 printf("tl_i2c_clr: unknown bit %d\n", bit);
811 }
812 return;
813 }
814
815 int tl_i2c_read(v, bit)
816 void *v;
817 u_int8_t bit;
818 {
819 tl_softc_t *sc = v;
820
821 switch (bit) {
822 case I2C_DATA:
823 return netsio_read(sc, TL_NETSIO_EDATA);
824 break;
825 case I2C_CLOCK:
826 return netsio_read(sc, TL_NETSIO_ECLOCK);
827 break;
828 case I2C_TXEN:
829 return netsio_read(sc, TL_NETSIO_ETXEN);
830 break;
831 default:
832 printf("tl_i2c_read: unknown bit %d\n", bit);
833 return -1;
834 }
835 }
836
837 static int
838 tl_intr(v)
839 void *v;
840 {
841 tl_softc_t *sc = v;
842 struct ifnet *ifp = &sc->tl_if;
843 struct Rx_list *Rx;
844 struct Tx_list *Tx;
845 struct mbuf *m;
846 u_int32_t int_type, int_reg;
847 int ack = 0;
848 int size;
849
850 int_reg = TL_HR_READ(sc, TL_HOST_INTR_DIOADR);
851 int_type = int_reg & TL_INTR_MASK;
852 if (int_type == 0)
853 return 0;
854 #if defined(TLDEBUG_RX) || defined(TLDEBUG_TX)
855 printf("%s: interrupt type %x, intr_reg %x\n", sc->sc_dev.dv_xname,
856 int_type, int_reg);
857 #endif
858 /* disable interrupts */
859 TL_HR_WRITE(sc, TL_HOST_CMD, HOST_CMD_IntOff);
860 switch(int_type & TL_INTR_MASK) {
861 case TL_INTR_RxEOF:
862 while(sc->active_Rx->hw_list.stat & TL_RX_CSTAT_CPLT) {
863 /* dequeue and requeue at end of list */
864 ack++;
865 Rx = sc->active_Rx;
866 sc->active_Rx = Rx->next;
867 m = Rx->m;
868 size = Rx->hw_list.stat >> 16;
869 #ifdef TLDEBUG_RX
870 printf("tl_intr: RX list complete, Rx %p, size=%d\n",
871 Rx, size);
872 #endif
873 if (tl_add_RxBuff(Rx, m ) == 0) {
874 /*
875 * No new mbuf, reuse the same. This means
876 * that this packet
877 * is lost
878 */
879 m = NULL;
880 #ifdef TL_PRIV_STATS
881 sc->ierr_nomem++;
882 #endif
883 #ifdef TLDEBUG
884 printf("%s: out of mbuf, lost input packet\n",
885 sc->sc_dev.dv_xname);
886 #endif
887 }
888 Rx->next = NULL;
889 Rx->hw_list.fwd = 0;
890 sc->last_Rx->hw_list.fwd = vtophys(&Rx->hw_list);
891 #ifdef DIAGNOSTIC
892 if (sc->last_Rx->hw_list.fwd & 0x7)
893 printf("%s: physical addr 0x%x of list not "
894 "properly aligned\n",
895 sc->sc_dev.dv_xname,
896 sc->last_Rx->hw_list.fwd);
897 #endif
898 sc->last_Rx->next = Rx;
899 sc->last_Rx = Rx;
900
901 /* deliver packet */
902 if (m) {
903 struct ether_header *eh;
904 if (size < sizeof(struct ether_header)) {
905 m_freem(m);
906 continue;
907 }
908 m->m_pkthdr.rcvif = ifp;
909 m->m_pkthdr.len = m->m_len = size;
910 eh = mtod(m, struct ether_header *);
911 #ifdef TLDEBUG_RX
912 printf("tl_intr: Rx packet:\n");
913 ether_printheader(eh);
914 #endif
915 #if NBPFILTER > 0
916 if (ifp->if_bpf) {
917 bpf_tap(ifp->if_bpf,
918 mtod(m, caddr_t), size);
919 /*
920 * Only pass this packet up
921 * if it is for us.
922 */
923 if ((ifp->if_flags & IFF_PROMISC) &&
924 /* !mcast and !bcast */
925 (eh->ether_dhost[0] & 1) == 0 &&
926 bcmp(eh->ether_dhost,
927 LLADDR(ifp->if_sadl),
928 sizeof(eh->ether_dhost)) != 0) {
929 m_freem(m);
930 continue;
931 }
932 }
933 #endif /* NBPFILTER > 0 */
934 (*ifp->if_input)(ifp, m);
935 }
936 }
937 #ifdef TLDEBUG_RX
938 printf("TL_INTR_RxEOF: ack %d\n", ack);
939 #else
940 if (ack == 0) {
941 printf("%s: EOF intr without anything to read !\n",
942 sc->sc_dev.dv_xname);
943 tl_reset(sc);
944 /* shedule reinit of the board */
945 timeout(tl_restart, sc, 1);
946 return(1);
947 }
948 #endif
949 break;
950 case TL_INTR_RxEOC:
951 ack++;
952 #ifdef TLDEBUG_RX
953 printf("TL_INTR_RxEOC: ack %d\n", ack);
954 #endif
955 #ifdef DIAGNOSTIC
956 if (sc->active_Rx->hw_list.stat & TL_RX_CSTAT_CPLT) {
957 printf("%s: Rx EOC interrupt and active Rx list not "
958 "cleared\n", sc->sc_dev.dv_xname);
959 return 0;
960 } else
961 #endif
962 {
963 /*
964 * write adress of Rx list and send Rx GO command, ack
965 * interrupt and enable interrupts in one command
966 */
967 TL_HR_WRITE(sc, TL_HOST_CH_PARM,
968 vtophys(&sc->active_Rx->hw_list));
969 TL_HR_WRITE(sc, TL_HOST_CMD,
970 HOST_CMD_GO | HOST_CMD_RT | HOST_CMD_Nes | ack | int_type |
971 HOST_CMD_ACK | HOST_CMD_IntOn);
972 return 1;
973 }
974 case TL_INTR_TxEOF:
975 case TL_INTR_TxEOC:
976 while ((Tx = sc->active_Tx) != NULL) {
977 if((Tx->hw_list.stat & TL_TX_CSTAT_CPLT) == 0)
978 break;
979 ack++;
980 #ifdef TLDEBUG_TX
981 printf("TL_INTR_TxEOC: list 0x%xp done\n",
982 vtophys(&Tx->hw_list));
983 #endif
984 Tx->hw_list.stat = 0;
985 m_freem(Tx->m);
986 Tx->m = NULL;
987 sc->active_Tx = Tx->next;
988 if (sc->active_Tx == NULL)
989 sc->last_Tx = NULL;
990 Tx->next = sc->Free_Tx;
991 sc->Free_Tx = Tx;
992 }
993 /* if this was an EOC, ACK immediatly */
994 if (int_type == TL_INTR_TxEOC) {
995 #ifdef TLDEBUG_TX
996 printf("TL_INTR_TxEOC: ack %d (will be set to 1)\n",
997 ack);
998 #endif
999 TL_HR_WRITE(sc, TL_HOST_CMD, 1 | int_type |
1000 HOST_CMD_ACK | HOST_CMD_IntOn);
1001 if ( sc->active_Tx != NULL) {
1002 /* needs a Tx go command */
1003 TL_HR_WRITE(sc, TL_HOST_CH_PARM,
1004 vtophys(&sc->active_Tx->hw_list));
1005 TL_HR_WRITE(sc, TL_HOST_CMD, HOST_CMD_GO);
1006 }
1007 sc->tl_if.if_timer = 0;
1008 if (sc->tl_if.if_snd.ifq_head != NULL)
1009 tl_ifstart(&sc->tl_if);
1010 return 1;
1011 }
1012 #ifdef TLDEBUG
1013 else {
1014 printf("TL_INTR_TxEOF: ack %d\n", ack);
1015 }
1016 #endif
1017 sc->tl_if.if_timer = 0;
1018 if (sc->tl_if.if_snd.ifq_head != NULL)
1019 tl_ifstart(&sc->tl_if);
1020 break;
1021 case TL_INTR_Stat:
1022 ack++;
1023 #ifdef TLDEBUG
1024 printf("TL_INTR_Stat: ack %d\n", ack);
1025 #endif
1026 tl_read_stats(sc);
1027 break;
1028 case TL_INTR_Adc:
1029 if (int_reg & TL_INTVec_MASK) {
1030 /* adapter check conditions */
1031 printf("%s: check condition, intvect=0x%x, "
1032 "ch_param=0x%x\n", sc->sc_dev.dv_xname,
1033 int_reg & TL_INTVec_MASK,
1034 TL_HR_READ(sc, TL_HOST_CH_PARM));
1035 tl_reset(sc);
1036 /* shedule reinit of the board */
1037 timeout(tl_restart, sc, 1);
1038 return(1);
1039 } else {
1040 u_int8_t netstat;
1041 /* Network status */
1042 netstat =
1043 tl_intreg_read_byte(sc, TL_INT_NET+TL_INT_NetSts);
1044 printf("%s: network status, NetSts=%x\n",
1045 sc->sc_dev.dv_xname, netstat);
1046 /* Ack interrupts */
1047 tl_intreg_write_byte(sc, TL_INT_NET+TL_INT_NetSts,
1048 netstat);
1049 ack++;
1050 }
1051 break;
1052 default:
1053 printf("%s: unhandled interrupt code %x!\n",
1054 sc->sc_dev.dv_xname, int_type);
1055 ack++;
1056 }
1057
1058 if (ack) {
1059 /* Ack the interrupt and enable interrupts */
1060 TL_HR_WRITE(sc, TL_HOST_CMD, ack | int_type | HOST_CMD_ACK |
1061 HOST_CMD_IntOn);
1062 return 1;
1063 }
1064 /* ack = 0 ; interrupt was perhaps not our. Just enable interrupts */
1065 TL_HR_WRITE(sc, TL_HOST_CMD, HOST_CMD_IntOn);
1066 return 0;
1067 }
1068
1069 static int
1070 tl_ifioctl(ifp, cmd, data)
1071 struct ifnet *ifp;
1072 ioctl_cmd_t cmd;
1073 caddr_t data;
1074 {
1075 struct tl_softc *sc = ifp->if_softc;
1076 struct ifreq *ifr = (struct ifreq *)data;
1077 int s, error;
1078
1079 s = splnet();
1080 switch(cmd) {
1081 case SIOCSIFADDR: {
1082 struct ifaddr *ifa = (struct ifaddr *)data;
1083 sc->tl_if.if_flags |= IFF_UP;
1084 if ((error = tl_init(sc)) != NULL) {
1085 sc->tl_if.if_flags &= ~IFF_UP;
1086 break;
1087 }
1088 switch (ifa->ifa_addr->sa_family) {
1089 #ifdef INET
1090 case AF_INET:
1091 arp_ifinit(ifp, ifa);
1092 break;
1093 #endif
1094 #ifdef NS
1095 case AF_NS: {
1096 struct ns_addr *ina = &IA_SNS(ifa)->sns_addr;
1097
1098 if (ns_nullhost(*ina))
1099 ina->x_host =
1100 *(union ns_host*) LLADDR(ifp->if_sadl);
1101 else
1102 bcopy(ina->x_host.c_host, LLADDR(ifp->if_sadl),
1103 ifp->if_addrlen);
1104 break;
1105 }
1106 #endif
1107 default:
1108 break;
1109 }
1110 break;
1111 }
1112 case SIOCSIFFLAGS:
1113 {
1114 u_int8_t reg;
1115 /*
1116 * If interface is marked up and not running, then start it.
1117 * If it is marked down and running, stop it.
1118 */
1119 if (ifp->if_flags & IFF_UP) {
1120 if ((ifp->if_flags & IFF_RUNNING) == 0) {
1121 error = tl_init(sc);
1122 /* all flags have been handled by init */
1123 break;
1124 }
1125 error = 0;
1126 reg = tl_intreg_read_byte(sc,
1127 TL_INT_NET + TL_INT_NetCmd);
1128 if (ifp->if_flags & IFF_PROMISC)
1129 reg |= TL_NETCOMMAND_CAF;
1130 else
1131 reg &= ~TL_NETCOMMAND_CAF;
1132 tl_intreg_write_byte(sc, TL_INT_NET + TL_INT_NetCmd,
1133 reg);
1134 #ifdef TL_PRIV_STATS
1135 if (ifp->if_flags & IFF_LINK0) {
1136 ifp->if_flags &= ~IFF_LINK0;
1137 printf("%s errors statistics\n",
1138 sc->sc_dev.dv_xname);
1139 printf(" %4d RX buffer overrun\n",
1140 sc->ierr_overr);
1141 printf(" %4d RX code error\n",
1142 sc->ierr_code);
1143 printf(" %4d RX crc error\n",
1144 sc->ierr_crc);
1145 printf(" %4d RX out of memory\n",
1146 sc->ierr_nomem);
1147 printf(" %4d TX buffer underrun\n",
1148 sc->oerr_underr);
1149 printf(" %4d TX deffered frames\n",
1150 sc->oerr_deffered);
1151 printf(" %4d TX single collisions\n",
1152 sc->oerr_coll);
1153 printf(" %4d TX multi collisions\n",
1154 sc->oerr_multicoll);
1155 printf(" %4d TX exessive collisions\n",
1156 sc->oerr_exesscoll);
1157 printf(" %4d TX late collisions\n",
1158 sc->oerr_latecoll);
1159 printf(" %4d TX carrier loss\n",
1160 sc->oerr_carrloss);
1161 printf(" %4d TX mbuf copy\n",
1162 sc->oerr_mcopy);
1163 }
1164 #endif
1165 } else {
1166 if (ifp->if_flags & IFF_RUNNING)
1167 tl_shutdown(sc);
1168 error = 0;
1169 }
1170 break;
1171 }
1172 case SIOCADDMULTI:
1173 case SIOCDELMULTI:
1174 /*
1175 * Update multicast listeners
1176 */
1177 if (cmd == SIOCADDMULTI)
1178 error = ether_addmulti(ifr, &sc->tl_ec);
1179 else
1180 error = ether_delmulti(ifr, &sc->tl_ec);
1181 if (error == ENETRESET) {
1182 tl_addr_filter(sc);
1183 error = 0;
1184 }
1185 break;
1186 case SIOCSIFMEDIA:
1187 case SIOCGIFMEDIA:
1188 error = ifmedia_ioctl(ifp, ifr, &sc->tl_mii.mii_media, cmd);
1189 break;
1190 default:
1191 error = EINVAL;
1192 }
1193 splx(s);
1194 return error;
1195 }
1196
1197 static void
1198 tl_ifstart(ifp)
1199 struct ifnet *ifp;
1200 {
1201 tl_softc_t *sc = ifp->if_softc;
1202 struct mbuf *m, *mb_head;
1203 struct Tx_list *Tx;
1204 int segment, size;
1205
1206 txloop:
1207 /* If we don't have more space ... */
1208 if (sc->Free_Tx == NULL) {
1209 #ifdef TLDEBUG
1210 printf("tl_ifstart: No free TX list\n");
1211 #endif
1212 return;
1213 }
1214 /* Grab a paquet for output */
1215 IF_DEQUEUE(&ifp->if_snd, mb_head);
1216 if (mb_head == NULL) {
1217 #ifdef TLDEBUG_TX
1218 printf("tl_ifstart: nothing to send\n");
1219 #endif
1220 return;
1221 }
1222 Tx = sc->Free_Tx;
1223 sc->Free_Tx = Tx->next;
1224 /*
1225 * Go through each of the mbufs in the chain and initialize
1226 * the transmit list descriptors with the physical address
1227 * and size of the mbuf.
1228 */
1229 tbdinit:
1230 bzero(Tx, sizeof(struct Tx_list));
1231 Tx->m = mb_head;
1232 size = 0;
1233 for (m = mb_head, segment = 0; m != NULL ; m = m->m_next) {
1234 if (m->m_len != 0) {
1235 if (segment == TL_NSEG)
1236 break;
1237 size += m->m_len;
1238 Tx->hw_list.seg[segment].data_addr =
1239 vtophys(mtod(m, vaddr_t));
1240 Tx->hw_list.seg[segment].data_count = m->m_len;
1241 segment++;
1242 }
1243 }
1244 if (m != NULL || (size < ETHER_MIN_TX && segment == TL_NSEG)) {
1245 /*
1246 * We ran out of segments, or we will. We have to recopy this
1247 * mbuf chain first.
1248 */
1249 struct mbuf *mn;
1250 #ifdef TLDEBUG_TX
1251 printf("tl_ifstart: need to copy mbuf\n");
1252 #endif
1253 #ifdef TL_PRIV_STATS
1254 sc->oerr_mcopy++;
1255 #endif
1256 MGETHDR(mn, M_DONTWAIT, MT_DATA);
1257 if (mn == NULL) {
1258 m_freem(mb_head);
1259 goto bad;
1260 }
1261 if (mb_head->m_pkthdr.len > MHLEN) {
1262 MCLGET(mn, M_DONTWAIT);
1263 if ((mn->m_flags & M_EXT) == 0) {
1264 m_freem(mn);
1265 m_freem(mb_head);
1266 goto bad;
1267 }
1268 }
1269 m_copydata(mb_head, 0, mb_head->m_pkthdr.len,
1270 mtod(mn, caddr_t));
1271 mn->m_pkthdr.len = mn->m_len = mb_head->m_pkthdr.len;
1272 m_freem(mb_head);
1273 mb_head = mn;
1274 goto tbdinit;
1275 }
1276 /* We are at end of mbuf chain. check the size and
1277 * see if it needs to be extended
1278 */
1279 if (size < ETHER_MIN_TX) {
1280 #ifdef DIAGNOSTIC
1281 if (segment >= TL_NSEG) {
1282 panic("tl_ifstart: to much segmets (%d)\n", segment);
1283 }
1284 #endif
1285 /*
1286 * add the nullbuf in the seg
1287 */
1288 Tx->hw_list.seg[segment].data_count =
1289 ETHER_MIN_TX - size;
1290 Tx->hw_list.seg[segment].data_addr =
1291 vtophys(nullbuf);
1292 size = ETHER_MIN_TX;
1293 segment++;
1294 }
1295 /* The list is done, finish the list init */
1296 Tx->hw_list.seg[segment-1].data_count |=
1297 TL_LAST_SEG;
1298 Tx->hw_list.stat = (size << 16) | 0x3000;
1299 #ifdef TLDEBUG_TX
1300 printf("%s: sending, Tx : stat = 0x%x\n", sc->sc_dev.dv_xname,
1301 Tx->hw_list.stat);
1302 #if 0
1303 for(segment = 0; segment < TL_NSEG; segment++) {
1304 printf(" seg %d addr 0x%x len 0x%x\n",
1305 segment,
1306 Tx->hw_list.seg[segment].data_addr,
1307 Tx->hw_list.seg[segment].data_count);
1308 }
1309 #endif
1310 #endif
1311 sc->opkt++;
1312 if (sc->active_Tx == NULL) {
1313 sc->active_Tx = sc->last_Tx = Tx;
1314 #ifdef TLDEBUG_TX
1315 printf("%s: Tx GO, addr=0x%x\n", sc->sc_dev.dv_xname,
1316 vtophys(&Tx->hw_list));
1317 #endif
1318 TL_HR_WRITE(sc, TL_HOST_CH_PARM, vtophys(&Tx->hw_list));
1319 TL_HR_WRITE(sc, TL_HOST_CMD, HOST_CMD_GO);
1320 } else {
1321 #ifdef TLDEBUG_TX
1322 printf("%s: Tx addr=0x%x queued\n", sc->sc_dev.dv_xname,
1323 vtophys(&Tx->hw_list));
1324 #endif
1325 sc->last_Tx->hw_list.fwd = vtophys(&Tx->hw_list);
1326 sc->last_Tx->next = Tx;
1327 sc->last_Tx = Tx;
1328 #ifdef DIAGNOSTIC
1329 if (sc->last_Tx->hw_list.fwd & 0x7)
1330 printf("%s: physical addr 0x%x of list not properly "
1331 "aligned\n",
1332 sc->sc_dev.dv_xname, sc->last_Rx->hw_list.fwd);
1333 #endif
1334 }
1335 #if NBPFILTER > 0
1336 /* Pass packet to bpf if there is a listener */
1337 if (ifp->if_bpf)
1338 bpf_mtap(ifp->if_bpf, mb_head);
1339 #endif
1340 /*
1341 * Set a 5 second timer just in case we don't hear from the card again.
1342 */
1343 ifp->if_timer = 5;
1344 goto txloop;
1345 bad:
1346 #ifdef TLDEBUG
1347 printf("tl_ifstart: Out of mbuf, Tx pkt lost\n");
1348 #endif
1349 Tx->next = sc->Free_Tx;
1350 sc->Free_Tx = Tx;
1351 return;
1352 }
1353
1354 static void
1355 tl_ifwatchdog(ifp)
1356 struct ifnet *ifp;
1357 {
1358 tl_softc_t *sc = ifp->if_softc;
1359
1360 if ((ifp->if_flags & IFF_RUNNING) == 0)
1361 return;
1362 printf("%s: device timeout\n", sc->sc_dev.dv_xname);
1363 ifp->if_oerrors++;
1364 tl_init(sc);
1365 }
1366
1367 static int
1368 tl_mediachange(ifp)
1369 struct ifnet *ifp;
1370 {
1371
1372 if (ifp->if_flags & IFF_UP)
1373 tl_init(ifp->if_softc);
1374 return (0);
1375 }
1376
1377 static void
1378 tl_mediastatus(ifp, ifmr)
1379 struct ifnet *ifp;
1380 struct ifmediareq *ifmr;
1381 {
1382 tl_softc_t *sc = ifp->if_softc;
1383
1384 mii_pollstat(&sc->tl_mii);
1385 ifmr->ifm_active = sc->tl_mii.mii_media_active;
1386 ifmr->ifm_status = sc->tl_mii.mii_media_status;
1387 }
1388
1389 static int tl_add_RxBuff(Rx, oldm)
1390 struct Rx_list *Rx;
1391 struct mbuf *oldm;
1392 {
1393 struct mbuf *m;
1394
1395 MGETHDR(m, M_DONTWAIT, MT_DATA);
1396 if (m != NULL) {
1397 MCLGET(m, M_DONTWAIT);
1398 if ((m->m_flags & M_EXT) == 0) {
1399 m_freem(m);
1400 if (oldm == NULL)
1401 return 0;
1402 m = oldm;
1403 m->m_data = m->m_ext.ext_buf;
1404 }
1405 } else {
1406 if (oldm == NULL)
1407 return 0;
1408 m = oldm;
1409 m->m_data = m->m_ext.ext_buf;
1410 }
1411 /*
1412 * Move the data pointer up so that the incoming data packet
1413 * will be 32-bit aligned.
1414 */
1415 m->m_data += 2;
1416
1417 /* (re)init the Rx_list struct */
1418
1419 Rx->m = m;
1420 Rx->hw_list.stat = ((MCLBYTES -2) << 16) | 0x3000;
1421 Rx->hw_list.seg.data_count = (MCLBYTES -2);
1422 Rx->hw_list.seg.data_addr = vtophys(m->m_data);
1423 return (m != oldm);
1424 }
1425
1426 static void tl_ticks(v)
1427 void *v;
1428 {
1429 tl_softc_t *sc = v;
1430
1431 tl_read_stats(sc);
1432
1433 /* Tick the MII. */
1434 mii_tick(&sc->tl_mii);
1435
1436 if (sc->opkt > 0) {
1437 if (sc->oerr_exesscoll > sc->opkt / 100) {
1438 /* exess collisions */
1439 if (sc->tl_flags & TL_IFACT) /* only print once */
1440 printf("%s: no carrier\n",
1441 sc->sc_dev.dv_xname);
1442 sc->tl_flags &= ~TL_IFACT;
1443 } else
1444 sc->tl_flags |= TL_IFACT;
1445 sc->oerr_exesscoll = sc->opkt = 0;
1446 sc->tl_lasttx = 0;
1447 } else {
1448 sc->tl_lasttx++;
1449 if (sc->tl_lasttx >= TL_IDLETIME) {
1450 /*
1451 * No TX activity in the last TL_IDLETIME seconds.
1452 * sends a LLC Class1 TEST pkt
1453 */
1454 struct mbuf *m;
1455 int s;
1456 MGETHDR(m, M_DONTWAIT, MT_DATA);
1457 if (m != NULL) {
1458 #ifdef TLDEBUG
1459 printf("tl_ticks: sending LLC test pkt\n");
1460 #endif
1461 bcopy(sc->tl_enaddr,
1462 mtod(m, struct ether_header *)->ether_dhost,
1463 6);
1464 bcopy(sc->tl_enaddr,
1465 mtod(m, struct ether_header *)->ether_shost,
1466 6);
1467 mtod(m, struct ether_header *)->ether_type =
1468 htons(3);
1469 mtod(m, unsigned char *)[14] = 0;
1470 mtod(m, unsigned char *)[15] = 0;
1471 mtod(m, unsigned char *)[16] = 0xE3;
1472 /* LLC Class1 TEST (no poll) */
1473 m->m_len = m->m_pkthdr.len =
1474 sizeof(struct ether_header) + 3;
1475 s = splnet();
1476 IF_PREPEND(&sc->tl_if.if_snd, m);
1477 tl_ifstart(&sc->tl_if);
1478 splx(s);
1479 }
1480 }
1481 }
1482
1483 /* read statistics every seconds */
1484 timeout(tl_ticks, v, hz);
1485 }
1486
1487 static void
1488 tl_read_stats(sc)
1489 tl_softc_t *sc;
1490 {
1491 u_int32_t reg;
1492 int ierr_overr;
1493 int ierr_code;
1494 int ierr_crc;
1495 int oerr_underr;
1496 int oerr_deffered;
1497 int oerr_coll;
1498 int oerr_multicoll;
1499 int oerr_exesscoll;
1500 int oerr_latecoll;
1501 int oerr_carrloss;
1502 struct ifnet *ifp = &sc->tl_if;
1503
1504 reg = tl_intreg_read(sc, TL_INT_STATS_TX);
1505 ifp->if_opackets += reg & 0x00ffffff;
1506 oerr_underr = reg >> 24;
1507
1508 reg = tl_intreg_read(sc, TL_INT_STATS_RX);
1509 ifp->if_ipackets += reg & 0x00ffffff;
1510 ierr_overr = reg >> 24;
1511
1512 reg = tl_intreg_read(sc, TL_INT_STATS_FERR);
1513 ierr_crc = (reg & TL_FERR_CRC) >> 16;
1514 ierr_code = (reg & TL_FERR_CODE) >> 24;
1515 oerr_deffered = (reg & TL_FERR_DEF);
1516
1517 reg = tl_intreg_read(sc, TL_INT_STATS_COLL);
1518 oerr_multicoll = (reg & TL_COL_MULTI);
1519 oerr_coll = (reg & TL_COL_SINGLE) >> 16;
1520
1521 reg = tl_intreg_read(sc, TL_INT_LERR);
1522 oerr_exesscoll = (reg & TL_LERR_ECOLL);
1523 oerr_latecoll = (reg & TL_LERR_LCOLL) >> 8;
1524 oerr_carrloss = (reg & TL_LERR_CL) >> 16;
1525
1526
1527 sc->stats_exesscoll += oerr_exesscoll;
1528 ifp->if_oerrors += oerr_underr + oerr_exesscoll + oerr_latecoll +
1529 oerr_carrloss;
1530 ifp->if_collisions += oerr_coll + oerr_multicoll;
1531 ifp->if_ierrors += ierr_overr + ierr_code + ierr_crc;
1532
1533 if (ierr_overr)
1534 printf("%s: receiver ring buffer overrun\n",
1535 sc->sc_dev.dv_xname);
1536 if (oerr_underr)
1537 printf("%s: transmit buffer underrun\n",
1538 sc->sc_dev.dv_xname);
1539 #ifdef TL_PRIV_STATS
1540 sc->ierr_overr += ierr_overr;
1541 sc->ierr_code += ierr_code;
1542 sc->ierr_crc += ierr_crc;
1543 sc->oerr_underr += oerr_underr;
1544 sc->oerr_deffered += oerr_deffered;
1545 sc->oerr_coll += oerr_coll;
1546 sc->oerr_multicoll += oerr_multicoll;
1547 sc->oerr_exesscoll += oerr_exesscoll;
1548 sc->oerr_latecoll += oerr_latecoll;
1549 sc->oerr_carrloss += oerr_carrloss;
1550 #endif
1551 }
1552
1553 static void tl_addr_filter(sc)
1554 tl_softc_t *sc;
1555 {
1556 struct ether_multistep step;
1557 struct ether_multi *enm;
1558 u_int32_t hash[2] = {0, 0};
1559 int i;
1560
1561 sc->tl_if.if_flags &= ~IFF_ALLMULTI;
1562 ETHER_FIRST_MULTI(step, &sc->tl_ec, enm);
1563 while (enm != NULL) {
1564 #ifdef TLDEBUG
1565 printf("tl_addr_filter: addrs %s %s\n",
1566 ether_sprintf(enm->enm_addrlo),
1567 ether_sprintf(enm->enm_addrhi));
1568 #endif
1569 if (memcmp(enm->enm_addrlo, enm->enm_addrhi, 6) == 0) {
1570 i = tl_multicast_hash(enm->enm_addrlo);
1571 hash[i/32] |= 1 << (i%32);
1572 } else {
1573 hash[0] = hash[1] = 0xffffffff;
1574 sc->tl_if.if_flags |= IFF_ALLMULTI;
1575 break;
1576 }
1577 ETHER_NEXT_MULTI(step, enm);
1578 }
1579 #ifdef TLDEBUG
1580 printf("tl_addr_filer: hash1 %x has2 %x\n", hash[0], hash[1]);
1581 #endif
1582 tl_intreg_write(sc, TL_INT_HASH1, hash[0]);
1583 tl_intreg_write(sc, TL_INT_HASH2, hash[1]);
1584 }
1585
1586 static int tl_multicast_hash(a)
1587 u_int8_t *a;
1588 {
1589 int hash;
1590
1591 #define DA(addr,bit) (addr[5 - (bit/8)] & (1 << bit%8))
1592 #define xor8(a,b,c,d,e,f,g,h) (((a != 0) + (b != 0) + (c != 0) + (d != 0) + (e != 0) + (f != 0) + (g != 0) + (h != 0)) & 1)
1593
1594 hash = xor8( DA(a,0), DA(a, 6), DA(a,12), DA(a,18), DA(a,24), DA(a,30),
1595 DA(a,36), DA(a,42));
1596 hash |= xor8( DA(a,1), DA(a, 7), DA(a,13), DA(a,19), DA(a,25), DA(a,31),
1597 DA(a,37), DA(a,43)) << 1;
1598 hash |= xor8( DA(a,2), DA(a, 8), DA(a,14), DA(a,20), DA(a,26), DA(a,32),
1599 DA(a,38), DA(a,44)) << 2;
1600 hash |= xor8( DA(a,3), DA(a, 9), DA(a,15), DA(a,21), DA(a,27), DA(a,33),
1601 DA(a,39), DA(a,45)) << 3;
1602 hash |= xor8( DA(a,4), DA(a,10), DA(a,16), DA(a,22), DA(a,28), DA(a,34),
1603 DA(a,40), DA(a,46)) << 4;
1604 hash |= xor8( DA(a,5), DA(a,11), DA(a,17), DA(a,23), DA(a,29), DA(a,35),
1605 DA(a,41), DA(a,47)) << 5;
1606
1607 return hash;
1608 }
1609
1610 #if defined(TLDEBUG_RX)
1611 void
1612 ether_printheader(eh)
1613 struct ether_header *eh;
1614 {
1615 u_char *c = (char*)eh;
1616 int i;
1617 for (i=0; i<sizeof(struct ether_header); i++)
1618 printf("%x ", (u_int)c[i]);
1619 printf("\n");
1620 }
1621 #endif
1622