if_tl.c revision 1.9
1 /* $NetBSD: if_tl.c,v 1.9 1998/02/11 19:02:14 bouyer Exp $ */ 2 3 /* 4 * Copyright (c) 1997 Manuel Bouyer. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Manuel Bouyer. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * Texas Instruments ThunderLAN ethernet controller 34 * ThunderLAN Programmer's Guide (TI Literature Number SPWU013A) 35 * available from www.ti.com 36 */ 37 38 #undef TLDEBUG 39 #define TL_PRIV_STATS 40 #undef TLDEBUG_RX 41 #undef TLDEBUG_TX 42 #undef TLDEBUG_ADDR 43 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #include <sys/mbuf.h> 47 #include <sys/protosw.h> 48 #include <sys/socket.h> 49 #include <sys/ioctl.h> 50 #include <sys/errno.h> 51 #include <sys/malloc.h> 52 #include <sys/kernel.h> 53 #include <sys/proc.h> /* only for declaration of wakeup() used by vm.h */ 54 #include <sys/device.h> 55 56 #include <net/if.h> 57 #if defined(SIOCSIFMEDIA) 58 #include <net/if_media.h> 59 #endif 60 #include <net/if_types.h> 61 #include <net/if_dl.h> 62 #include <net/route.h> 63 #include <net/netisr.h> 64 65 #include "bpfilter.h" 66 #if NBPFILTER > 0 67 #include <net/bpf.h> 68 #include <net/bpfdesc.h> 69 #endif 70 71 #ifdef INET 72 #include <netinet/in.h> 73 #include <netinet/in_systm.h> 74 #include <netinet/in_var.h> 75 #include <netinet/ip.h> 76 #endif 77 78 #ifdef NS 79 #include <netns/ns.h> 80 #include <netns/ns_if.h> 81 #endif 82 83 #include <vm/vm.h> 84 #include <vm/vm_param.h> 85 #include <vm/vm_kern.h> 86 87 #if defined(__NetBSD__) 88 #include <net/if_ether.h> 89 #if defined(INET) 90 #include <netinet/if_inarp.h> 91 #endif 92 93 #include <machine/bus.h> 94 #include <machine/intr.h> 95 96 #include <dev/pci/pcireg.h> 97 #include <dev/pci/pcivar.h> 98 #include <dev/pci/pcidevs.h> 99 #include <dev/i2c/i2c_bus.h> 100 #include <dev/i2c/i2c_eeprom.h> 101 #include <dev/mii/mii_adapter.h> 102 #include <dev/mii/mii_adapters_id.h> 103 #include <dev/pci/if_tlregs.h> 104 #endif /* __NetBSD__ */ 105 106 /* number of transmit/receive buffers */ 107 #ifndef TL_NBUF 108 #define TL_NBUF 10 109 #endif 110 111 /* number of seconds the link can be idle */ 112 #ifndef TL_IDLETIME 113 #define TL_IDLETIME 10 114 #endif 115 116 struct tl_softc { 117 struct device sc_dev; /* base device */ 118 bus_space_tag_t tl_bustag; 119 bus_space_handle_t tl_bushandle; /* CSR region handle */ 120 void* tl_ih; 121 struct ethercom tl_ec; 122 u_int8_t tl_enaddr[ETHER_ADDR_LEN]; /* hardware adress */ 123 struct ifmedia tl_ifmedia; 124 u_int16_t tl_flags; 125 #define TL_IFACT 0x0001 /* chip has interface activity */ 126 u_int8_t tl_lasttx; /* we were without input this many seconds */ 127 i2c_adapter_t i2cbus; /* i2c bus, for eeprom */ 128 mii_data_t mii; /* mii bus */ 129 struct Rx_list *Rx_list; /* Receive and transmit lists */ 130 struct Tx_list *Tx_list; 131 struct Rx_list *active_Rx, *last_Rx; 132 struct Tx_list *active_Tx, *last_Tx; 133 struct Tx_list *Free_Tx; 134 int opkt; /* used to detect link up/down for AUI/BNC */ 135 int stats_exesscoll; /* idem */ 136 #ifdef TL_PRIV_STATS 137 int ierr_overr; 138 int ierr_code; 139 int ierr_crc; 140 int ierr_nomem; 141 int oerr_underr; 142 int oerr_deffered; 143 int oerr_coll; 144 int oerr_multicoll; 145 int oerr_latecoll; 146 int oerr_exesscoll; 147 int oerr_carrloss; 148 int oerr_mcopy; 149 #endif 150 }; 151 #define tl_if tl_ec.ec_if 152 #define tl_bpf tl_if.if_bpf 153 154 typedef struct tl_softc tl_softc_t; 155 typedef u_long ioctl_cmd_t; 156 157 #define TL_HR_READ(sc, reg) \ 158 bus_space_read_4(sc->tl_bustag, sc->tl_bushandle, (reg)) 159 #define TL_HR_READ_BYTE(sc, reg) \ 160 bus_space_read_1(sc->tl_bustag, sc->tl_bushandle, (reg)) 161 #define TL_HR_WRITE(sc, reg, data) \ 162 bus_space_write_4(sc->tl_bustag, sc->tl_bushandle, (reg), (data)) 163 #define TL_HR_WRITE_BYTE(sc, reg, data) \ 164 bus_space_write_1(sc->tl_bustag, sc->tl_bushandle, (reg), (data)) 165 #define ETHER_MIN_TX (ETHERMIN + sizeof(struct ether_header)) 166 167 #ifdef __BROKEN_INDIRECT_CONFIG 168 static int tl_pci_match __P((struct device *, void *, void *)); 169 #else 170 static int tl_pci_match __P((struct device *, struct cfdata *, void *)); 171 #endif 172 static void tl_pci_attach __P((struct device *, struct device *, void *)); 173 static int tl_intr __P((void *)); 174 175 static int tl_ifioctl __P((struct ifnet *, ioctl_cmd_t, caddr_t)); 176 static int tl_mediachange __P((struct ifnet *)); 177 static void tl_mediastatus __P((struct ifnet *, struct ifmediareq *)); 178 static void tl_ifwatchdog __P((struct ifnet *)); 179 static void tl_shutdown __P((void*)); 180 181 static void tl_ifstart __P((struct ifnet *)); 182 static void tl_reset __P((tl_softc_t*)); 183 static int tl_init __P((tl_softc_t*)); 184 static void tl_restart __P((void *)); 185 static int tl_add_RxBuff __P((struct Rx_list*, struct mbuf*)); 186 static void tl_read_stats __P((tl_softc_t*)); 187 static void tl_ticks __P((void*)); 188 static int tl_multicast_hash __P((u_int8_t*)); 189 static void tl_addr_filter __P((tl_softc_t*)); 190 191 static u_int32_t tl_intreg_read __P((tl_softc_t*, u_int32_t)); 192 static void tl_intreg_write __P((tl_softc_t*, u_int32_t, u_int32_t)); 193 static u_int8_t tl_intreg_read_byte __P((tl_softc_t*, u_int32_t)); 194 static void tl_intreg_write_byte __P((tl_softc_t*, u_int32_t, u_int8_t)); 195 196 197 #if defined(TLDEBUG_RX) 198 static void ether_printheader __P((struct ether_header*)); 199 #endif 200 201 void tl_mii_set __P((void*, u_int8_t)); 202 void tl_mii_clr __P((void*, u_int8_t)); 203 int tl_mii_read __P((void*, u_int8_t)); 204 205 void tl_i2c_set __P((void*, u_int8_t)); 206 void tl_i2c_clr __P((void*, u_int8_t)); 207 int tl_i2c_read __P((void*, u_int8_t)); 208 209 static __inline void netsio_clr __P((tl_softc_t*, u_int8_t)); 210 static __inline void netsio_set __P((tl_softc_t*, u_int8_t)); 211 static __inline u_int8_t netsio_read __P((tl_softc_t*, u_int8_t)); 212 static __inline void netsio_clr(sc, bits) 213 tl_softc_t* sc; 214 u_int8_t bits; 215 { 216 tl_intreg_write_byte(sc, TL_INT_NET + TL_INT_NetSio, 217 tl_intreg_read_byte(sc, TL_INT_NET + TL_INT_NetSio) & (~bits)); 218 } 219 static __inline void netsio_set(sc, bits) 220 tl_softc_t* sc; 221 u_int8_t bits; 222 { 223 tl_intreg_write_byte(sc, TL_INT_NET + TL_INT_NetSio, 224 tl_intreg_read_byte(sc, TL_INT_NET + TL_INT_NetSio) | bits); 225 } 226 static __inline u_int8_t netsio_read(sc, bits) 227 tl_softc_t* sc; 228 u_int8_t bits; 229 { 230 return (tl_intreg_read_byte(sc, TL_INT_NET + TL_INT_NetSio) & bits); 231 } 232 233 struct cfattach tl_ca = { 234 sizeof(tl_softc_t), tl_pci_match, tl_pci_attach 235 }; 236 237 struct tl_product_desc { 238 u_int32_t tp_product; 239 u_int32_t tp_adapter; 240 const char *tp_desc; 241 }; 242 243 const struct tl_product_desc tl_compaq_products[] = { 244 { PCI_PRODUCT_COMPAQ_N100TX, COMPAQ_NETLIGENT_10_100, 245 "Compaq Netelligent 10/100 TX" }, 246 { PCI_PRODUCT_COMPAQ_N10T, COMPAQ_NETLIGENT_10, 247 "Compaq Netelligent 10 T" }, 248 { PCI_PRODUCT_COMPAQ_IntNF3P, COMPAQ_INT_NETFLEX, 249 "Compaq Integrated NetFlex 3/P" }, 250 { PCI_PRODUCT_COMPAQ_IntPL100TX, COMPAQ_INT_NETLIGENT_10_100, 251 "Compaq ProLiant Integrated Netelligent 10/100 TX" }, 252 { PCI_PRODUCT_COMPAQ_DPNet100TX, COMPAQ_DUAL_NETLIGENT_10_100, 253 "Compaq Dual Port Netelligent 10/100 TX" }, 254 { PCI_PRODUCT_COMPAQ_DP4000, COMPAQ_DSKP4000, 255 "Compaq Deskpro 4000 5233MMX" }, 256 { PCI_PRODUCT_COMPAQ_NF3P_BNC, COMPAQ_NETFLEX_BNC, 257 "Compaq NetFlex 3/P w/ BNC" }, 258 { PCI_PRODUCT_COMPAQ_NF3P, COMPAQ_NETFLEX, 259 "Compaq NetFlex 3/P" }, 260 { 0, 0, NULL }, 261 }; 262 263 const struct tl_product_desc tl_ti_products[] = { 264 { PCI_PRODUCT_TI_TLAN, TI_TLAN, 265 "Texas Instruments ThunderLAN" }, 266 { 0, 0, NULL }, 267 }; 268 269 struct tl_vendor_desc { 270 u_int32_t tv_vendor; 271 const struct tl_product_desc *tv_products; 272 }; 273 274 const struct tl_vendor_desc tl_vendors[] = { 275 { PCI_VENDOR_COMPAQ, tl_compaq_products }, 276 { PCI_VENDOR_TI, tl_ti_products }, 277 { 0, NULL }, 278 }; 279 280 const struct tl_product_desc *tl_lookup_product __P((u_int32_t)); 281 282 const struct tl_product_desc * 283 tl_lookup_product(id) 284 u_int32_t id; 285 { 286 const struct tl_product_desc *tp; 287 const struct tl_vendor_desc *tv; 288 289 for (tv = tl_vendors; tv->tv_products != NULL; tv++) 290 if (PCI_VENDOR(id) == tv->tv_vendor) 291 break; 292 293 if ((tp = tv->tv_products) == NULL) 294 return (NULL); 295 296 for (; tp->tp_desc != NULL; tp++) 297 if (PCI_PRODUCT(id) == tp->tp_product) 298 break; 299 300 if (tp->tp_desc == NULL) 301 return (NULL); 302 303 return (tp); 304 } 305 306 static char *nullbuf = NULL; 307 308 static int 309 tl_pci_match(parent, match, aux) 310 struct device *parent; 311 #ifdef __BROKEN_INDIRECT_CONFIG 312 void *match; 313 #else 314 struct cfdata *match; 315 #endif 316 void *aux; 317 { 318 struct pci_attach_args *pa = (struct pci_attach_args *) aux; 319 320 if (tl_lookup_product(pa->pa_id) != NULL) 321 return (1); 322 323 return (0); 324 } 325 326 static void 327 tl_pci_attach(parent, self, aux) 328 struct device * parent; 329 struct device * self; 330 void * aux; 331 { 332 tl_softc_t *sc = (tl_softc_t *)self; 333 struct pci_attach_args * const pa = (struct pci_attach_args *) aux; 334 const struct tl_product_desc *tp; 335 struct ifnet * const ifp = &sc->tl_if; 336 bus_space_tag_t iot, memt; 337 bus_space_handle_t ioh, memh; 338 pci_intr_handle_t intrhandle; 339 const char *intrstr; 340 int i, tmp, ioh_valid, memh_valid; 341 pcireg_t csr; 342 343 printf("\n"); 344 345 /* Map the card space. */ 346 ioh_valid = (pci_mapreg_map(pa, PCI_CBIO, PCI_MAPREG_TYPE_IO, 0, 347 &iot, &ioh, NULL, NULL) == 0); 348 memh_valid = (pci_mapreg_map(pa, PCI_CBMA, 349 PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 350 0, &memt, &memh, NULL, NULL) == 0); 351 352 #if 1 353 /* 354 * XXX HACK! Due to a bug in a previous revision of this driver, 355 * XXX i/o space was always selected. Now that this bug is fixed, 356 * XXX we discover that memory mapped use fails on at least one 357 * XXX ThunderLAN variant - the built-in Ethernet on TI Travelmate 358 * XXX docking stations. We hack around this by "prefering" i/o 359 * XXX access for now. 360 */ 361 if (ioh_valid) { 362 sc->tl_bustag = iot; 363 sc->tl_bushandle = ioh; 364 } else if (memh_valid) { 365 sc->tl_bustag = memt; 366 sc->tl_bushandle = memh; 367 } else { 368 printf("%s: unable to map device registers\n", 369 sc->sc_dev.dv_xname); 370 return; 371 } 372 #else 373 if (memh_valid) { 374 sc->tl_bustag = memt; 375 sc->tl_bushandle = memh; 376 } else if (ioh_valid) { 377 sc->tl_bustag = iot; 378 sc->tl_bushandle = ioh; 379 } else { 380 printf("%s: unable to map device registers\n", 381 sc->sc_dev.dv_xname); 382 return; 383 } 384 #endif 385 386 /* Enable the device. */ 387 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 388 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 389 csr | PCI_COMMAND_MASTER_ENABLE); 390 391 tp = tl_lookup_product(pa->pa_id); 392 if (tp == NULL) 393 panic("tl_pci_attach: impossible"); 394 395 printf("%s: %s\n", sc->sc_dev.dv_xname, tp->tp_desc); 396 sc->mii.adapter_id = tp->tp_adapter; 397 398 tl_reset(sc); 399 400 /* fill in the i2c struct */ 401 sc->i2cbus.adapter_softc = sc; 402 sc->i2cbus.set_bit = tl_i2c_set; 403 sc->i2cbus.clr_bit = tl_i2c_clr; 404 sc->i2cbus.read_bit = tl_i2c_read; 405 406 #ifdef TLDEBUG 407 printf("default values of INTreg: 0x%x\n", 408 tl_intreg_read(sc, TL_INT_Defaults)); 409 #endif 410 411 /* read mac addr */ 412 for (i=0; i<ETHER_ADDR_LEN; i++) { 413 tmp = i2c_eeprom_read(&sc->i2cbus, 0x83 + i); 414 if (tmp < 0) { 415 printf("%s: error reading Ethernet adress\n", 416 sc->sc_dev.dv_xname); 417 return; 418 } else { 419 sc->tl_enaddr[i] = tmp; 420 } 421 } 422 printf("%s: Ethernet address %s\n", sc->sc_dev.dv_xname, 423 ether_sprintf(sc->tl_enaddr)); 424 425 /* Map and establish interrupts */ 426 if (pci_intr_map(pa->pa_pc, pa->pa_intrtag, pa->pa_intrpin, 427 pa->pa_intrline, &intrhandle)) { 428 printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname); 429 return; 430 } 431 intrstr = pci_intr_string(pa->pa_pc, intrhandle); 432 sc->tl_ih = pci_intr_establish(pa->pa_pc, intrhandle, IPL_NET, 433 tl_intr, sc); 434 if (sc->tl_ih == NULL) { 435 printf("%s: couldn't establish interrupt", 436 sc->sc_dev.dv_xname); 437 if (intrstr != NULL) 438 printf(" at %s", intrstr); 439 printf("\n"); 440 return; 441 } 442 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); 443 444 /* 445 * Add shutdown hook so that DMA is disabled prior to reboot. Not 446 * doing do could allow DMA to corrupt kernel memory during the 447 * reboot before the driver initializes. 448 */ 449 (void) shutdownhook_establish(tl_shutdown, sc); 450 451 sc->mii.adapter_softc = sc; 452 sc->mii.mii_setbit = tl_mii_set; 453 sc->mii.mii_clrbit = tl_mii_clr; 454 sc->mii.mii_readbit = tl_mii_read; 455 sc->mii.mii_readreg = NULL; /* Let generic MII function handle that */ 456 sc->mii.mii_writereg = NULL; 457 if (config_found(self, (void*)&sc->mii, mii_adapter_print) == NULL) { 458 return; 459 } 460 461 ifmedia_init(&sc->tl_ifmedia, 0, tl_mediachange, tl_mediastatus); 462 mii_media_add(&sc->tl_ifmedia, &sc->mii); 463 ifmedia_set(&sc->tl_ifmedia, IFM_ETHER | IFM_NONE); 464 465 bcopy(sc->sc_dev.dv_xname, sc->tl_if.if_xname, IFNAMSIZ); 466 sc->tl_if.if_softc = sc; 467 ifp->if_flags = IFF_BROADCAST|IFF_SIMPLEX|IFF_NOTRAILERS|IFF_MULTICAST; 468 ifp->if_ioctl = tl_ifioctl; 469 ifp->if_start = tl_ifstart; 470 ifp->if_watchdog = tl_ifwatchdog; 471 ifp->if_timer = 0; 472 if_attach(ifp); 473 ether_ifattach(&(sc)->tl_if, (sc)->tl_enaddr); 474 #if NBPFILTER > 0 475 bpfattach(&sc->tl_bpf, &sc->tl_if, DLT_EN10MB, 476 sizeof(struct ether_header)); 477 #endif 478 sc->mii.mii_media_active = IFM_NONE; 479 } 480 481 static void 482 tl_reset(sc) 483 tl_softc_t *sc; 484 { 485 int i; 486 487 /* read stats */ 488 if (sc->tl_if.if_flags & IFF_RUNNING) { 489 untimeout(tl_ticks, sc); 490 tl_read_stats(sc); 491 } 492 /* Reset adapter */ 493 TL_HR_WRITE(sc, TL_HOST_CMD, 494 TL_HR_READ(sc, TL_HOST_CMD) | HOST_CMD_Ad_Rst); 495 DELAY(100000); 496 /* Disable interrupts */ 497 TL_HR_WRITE(sc, TL_HOST_CMD, HOST_CMD_IntOff); 498 /* setup aregs & hash */ 499 for (i = TL_INT_Areg0; i <= TL_INT_HASH2; i = i + 4) 500 tl_intreg_write(sc, i, 0); 501 #ifdef TLDEBUG_ADDR 502 printf("Areg & hash registers: \n"); 503 for (i = TL_INT_Areg0; i <= TL_INT_HASH2; i = i + 4) 504 printf(" reg %x: %x\n", i, tl_intreg_read(sc, i)); 505 #endif 506 /* Setup NetConfig */ 507 tl_intreg_write(sc, TL_INT_NetConfig, 508 TL_NETCONFIG_1F | TL_NETCONFIG_1chn | TL_NETCONFIG_PHY_EN); 509 /* Bsize: accept default */ 510 /* TX commit in Acommit: accept default */ 511 /* Load Ld_tmr and Ld_thr */ 512 /* Ld_tmr = 3 */ 513 TL_HR_WRITE(sc, TL_HOST_CMD, 0x3 | HOST_CMD_LdTmr); 514 /* Ld_thr = 0 */ 515 TL_HR_WRITE(sc, TL_HOST_CMD, 0x0 | HOST_CMD_LdThr); 516 /* Unreset MII */ 517 netsio_set(sc, TL_NETSIO_NMRST); 518 DELAY(100000); 519 sc->mii.mii_media_status &= ~IFM_ACTIVE; 520 sc->tl_flags = 0; 521 sc->opkt = 0; 522 sc->stats_exesscoll = 0; 523 } 524 525 static void tl_shutdown(v) 526 void *v; 527 { 528 tl_softc_t *sc = v; 529 struct Tx_list *Tx; 530 int i; 531 532 if ((sc->tl_if.if_flags & IFF_RUNNING) == 0) 533 return; 534 /* disable interrupts */ 535 TL_HR_WRITE(sc, TL_HOST_CMD, 536 HOST_CMD_IntOff); 537 /* stop TX and RX channels */ 538 TL_HR_WRITE(sc, TL_HOST_CMD, 539 HOST_CMD_STOP | HOST_CMD_RT | HOST_CMD_Nes); 540 TL_HR_WRITE(sc, TL_HOST_CMD, HOST_CMD_STOP); 541 DELAY(100000); 542 543 /* stop statistics reading loop, read stats */ 544 untimeout(tl_ticks, sc); 545 tl_read_stats(sc); 546 547 /* deallocate memory allocations */ 548 for (i=0; i< TL_NBUF; i++) { 549 if (sc->Rx_list[i].m) 550 m_freem(sc->Rx_list[i].m); 551 sc->Rx_list[i].m = NULL; 552 } 553 free(sc->Rx_list, M_DEVBUF); 554 sc->Rx_list = NULL; 555 while ((Tx = sc->active_Tx) != NULL) { 556 Tx->hw_list.stat = 0; 557 m_freem(Tx->m); 558 sc->active_Tx = Tx->next; 559 Tx->next = sc->Free_Tx; 560 sc->Free_Tx = Tx; 561 } 562 sc->last_Tx = NULL; 563 free(sc->Tx_list, M_DEVBUF); 564 sc->Tx_list = NULL; 565 sc->tl_if.if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 566 sc->mii.mii_media_status &= ~IFM_ACTIVE; 567 sc->tl_flags = 0; 568 } 569 570 static void tl_restart(v) 571 void *v; 572 { 573 tl_init(v); 574 } 575 576 static int tl_init(sc) 577 tl_softc_t *sc; 578 { 579 struct ifnet *ifp = &sc->tl_if; 580 int i, s; 581 582 s = splimp(); 583 /* cancel any pending IO */ 584 tl_shutdown(sc); 585 tl_reset(sc); 586 if ((sc->tl_if.if_flags & IFF_UP) == 0) { 587 splx(s); 588 return 0; 589 } 590 /* Set various register to reasonable value */ 591 /* setup NetCmd in promisc mode if needed */ 592 i = (ifp->if_flags & IFF_PROMISC) ? TL_NETCOMMAND_CAF : 0; 593 tl_intreg_write_byte(sc, TL_INT_NET + TL_INT_NetCmd, 594 TL_NETCOMMAND_NRESET | TL_NETCOMMAND_NWRAP | i); 595 /* Max receive size : MCLBYTES */ 596 tl_intreg_write_byte(sc, TL_INT_MISC + TL_MISC_MaxRxL, MCLBYTES & 0xff); 597 tl_intreg_write_byte(sc, TL_INT_MISC + TL_MISC_MaxRxH, 598 (MCLBYTES >> 8) & 0xff); 599 600 /* init MAC addr */ 601 for (i = 0; i < ETHER_ADDR_LEN; i++) 602 tl_intreg_write_byte(sc, TL_INT_Areg0 + i , sc->tl_enaddr[i]); 603 /* add multicast filters */ 604 tl_addr_filter(sc); 605 #ifdef TLDEBUG_ADDR 606 printf("Wrote Mac addr, Areg & hash registers are now: \n"); 607 for (i = TL_INT_Areg0; i <= TL_INT_HASH2; i = i + 4) 608 printf(" reg %x: %x\n", i, tl_intreg_read(sc, i)); 609 #endif 610 611 /* Pre-allocate receivers mbuf, make the lists */ 612 sc->Rx_list = malloc(sizeof(struct Rx_list) * TL_NBUF, M_DEVBUF, M_NOWAIT); 613 sc->Tx_list = malloc(sizeof(struct Tx_list) * TL_NBUF, M_DEVBUF, M_NOWAIT); 614 if (sc->Rx_list == NULL || sc->Tx_list == NULL) { 615 printf("%s: out of memory for lists\n", sc->sc_dev.dv_xname); 616 sc->tl_if.if_flags &= ~IFF_UP; 617 splx(s); 618 return ENOMEM; 619 } 620 for (i=0; i< TL_NBUF; i++) { 621 if(tl_add_RxBuff(&sc->Rx_list[i], NULL) == 0) { 622 printf("%s: out of mbuf for receive list\n", sc->sc_dev.dv_xname); 623 sc->tl_if.if_flags &= ~IFF_UP; 624 splx(s); 625 return ENOMEM; 626 } 627 if (i > 0) { /* chain the list */ 628 sc->Rx_list[i-1].next = &sc->Rx_list[i]; 629 sc->Rx_list[i-1].hw_list.fwd = vtophys(&sc->Rx_list[i].hw_list); 630 #ifdef DIAGNOSTIC 631 if (sc->Rx_list[i-1].hw_list.fwd & 0x7) 632 printf("%s: physical addr 0x%x of list not properly aligned\n", 633 sc->sc_dev.dv_xname, sc->Rx_list[i-1].hw_list.fwd); 634 #endif 635 sc->Tx_list[i-1].next = &sc->Tx_list[i]; 636 } 637 } 638 sc->Rx_list[TL_NBUF-1].next = NULL; 639 sc->Rx_list[TL_NBUF-1].hw_list.fwd = 0; 640 sc->Tx_list[TL_NBUF-1].next = NULL; 641 642 sc->active_Rx = &sc->Rx_list[0]; 643 sc->last_Rx = &sc->Rx_list[TL_NBUF-1]; 644 sc->active_Tx = sc->last_Tx = NULL; 645 sc->Free_Tx = &sc->Tx_list[0]; 646 647 if (nullbuf == NULL) 648 nullbuf = malloc(ETHER_MIN_TX, M_DEVBUF, M_NOWAIT); 649 if (nullbuf == NULL) { 650 printf("%s: can't allocate space for pad buffer\n", 651 sc->sc_dev.dv_xname); 652 sc->tl_if.if_flags &= ~IFF_UP; 653 splx(s); 654 return ENOMEM; 655 } 656 bzero(nullbuf, ETHER_MIN_TX); 657 658 /* set media if needed */ 659 if (IFM_SUBTYPE(sc->mii.mii_media_active) != IFM_NONE) { 660 mii_mediachg(&sc->mii); 661 } 662 663 /* start ticks calls */ 664 timeout(tl_ticks, sc, hz); 665 /* write adress of Rx list and enable interrupts */ 666 TL_HR_WRITE(sc, TL_HOST_CH_PARM, vtophys(&sc->Rx_list[0].hw_list)); 667 TL_HR_WRITE(sc, TL_HOST_CMD, 668 HOST_CMD_GO | HOST_CMD_RT | HOST_CMD_Nes | HOST_CMD_IntOn); 669 sc->tl_if.if_flags |= IFF_RUNNING; 670 sc->tl_if.if_flags &= ~IFF_OACTIVE; 671 return 0; 672 } 673 674 675 static u_int32_t 676 tl_intreg_read(sc, reg) 677 tl_softc_t *sc; 678 u_int32_t reg; 679 { 680 TL_HR_WRITE(sc, TL_HOST_INTR_DIOADR, reg & TL_HOST_DIOADR_MASK); 681 return TL_HR_READ(sc, TL_HOST_DIO_DATA); 682 } 683 684 static u_int8_t 685 tl_intreg_read_byte(sc, reg) 686 tl_softc_t *sc; 687 u_int32_t reg; 688 { 689 TL_HR_WRITE(sc, TL_HOST_INTR_DIOADR, 690 (reg & (~0x07)) & TL_HOST_DIOADR_MASK); 691 return TL_HR_READ_BYTE(sc, TL_HOST_DIO_DATA + (reg & 0x07)); 692 } 693 694 static void 695 tl_intreg_write(sc, reg, val) 696 tl_softc_t *sc; 697 u_int32_t reg; 698 u_int32_t val; 699 { 700 TL_HR_WRITE(sc, TL_HOST_INTR_DIOADR, reg & TL_HOST_DIOADR_MASK); 701 TL_HR_WRITE(sc, TL_HOST_DIO_DATA, val); 702 } 703 704 static void 705 tl_intreg_write_byte(sc, reg, val) 706 tl_softc_t *sc; 707 u_int32_t reg; 708 u_int8_t val; 709 { 710 TL_HR_WRITE(sc, TL_HOST_INTR_DIOADR, 711 (reg & (~0x03)) & TL_HOST_DIOADR_MASK); 712 TL_HR_WRITE_BYTE(sc, TL_HOST_DIO_DATA + (reg & 0x03), val); 713 } 714 715 void tl_mii_set(v, bit) 716 void *v; 717 u_int8_t bit; 718 { 719 tl_softc_t *sc = v; 720 721 switch (bit) { 722 case MII_DATA: 723 netsio_set(sc, TL_NETSIO_MDATA); 724 break; 725 case MII_CLOCK: 726 netsio_set(sc, TL_NETSIO_MCLK); 727 break; 728 case MII_TXEN: 729 netsio_set(sc, TL_NETSIO_MTXEN); 730 break; 731 default: 732 printf("tl_mii_set: unknown bit %d\n", bit); 733 } 734 } 735 736 void tl_mii_clr(v, bit) 737 void *v; 738 u_int8_t bit; 739 { 740 tl_softc_t *sc = v; 741 742 switch (bit) { 743 case MII_DATA: 744 netsio_clr(sc, TL_NETSIO_MDATA); 745 break; 746 case MII_CLOCK: 747 netsio_clr(sc, TL_NETSIO_MCLK); 748 break; 749 case MII_TXEN: 750 netsio_clr(sc, TL_NETSIO_MTXEN); 751 break; 752 default: 753 printf("tl_mii_clr: unknown bit %d\n", bit); 754 } 755 return; 756 } 757 758 int tl_mii_read(v, bit) 759 void *v; 760 u_int8_t bit; 761 { 762 tl_softc_t *sc = v; 763 764 switch (bit) { 765 case MII_DATA: 766 return netsio_read(sc, TL_NETSIO_MDATA); 767 break; 768 case MII_CLOCK: 769 return netsio_read(sc, TL_NETSIO_MCLK); 770 break; 771 case MII_TXEN: 772 return netsio_read(sc, TL_NETSIO_MTXEN); 773 break; 774 default: 775 printf("tl_mii_read: unknown bit %d\n", bit); 776 return -1; 777 } 778 } 779 780 void tl_i2c_set(v, bit) 781 void *v; 782 u_int8_t bit; 783 { 784 tl_softc_t *sc = v; 785 786 switch (bit) { 787 case I2C_DATA: 788 netsio_set(sc, TL_NETSIO_EDATA); 789 break; 790 case I2C_CLOCK: 791 netsio_set(sc, TL_NETSIO_ECLOCK); 792 break; 793 case I2C_TXEN: 794 netsio_set(sc, TL_NETSIO_ETXEN); 795 break; 796 default: 797 printf("tl_i2c_set: unknown bit %d\n", bit); 798 } 799 return; 800 } 801 802 void tl_i2c_clr(v, bit) 803 void *v; 804 u_int8_t bit; 805 { 806 tl_softc_t *sc = v; 807 808 switch (bit) { 809 case I2C_DATA: 810 netsio_clr(sc, TL_NETSIO_EDATA); 811 break; 812 case I2C_CLOCK: 813 netsio_clr(sc, TL_NETSIO_ECLOCK); 814 break; 815 case I2C_TXEN: 816 netsio_clr(sc, TL_NETSIO_ETXEN); 817 break; 818 default: 819 printf("tl_i2c_clr: unknown bit %d\n", bit); 820 } 821 return; 822 } 823 824 int tl_i2c_read(v, bit) 825 void *v; 826 u_int8_t bit; 827 { 828 tl_softc_t *sc = v; 829 830 switch (bit) { 831 case I2C_DATA: 832 return netsio_read(sc, TL_NETSIO_EDATA); 833 break; 834 case I2C_CLOCK: 835 return netsio_read(sc, TL_NETSIO_ECLOCK); 836 break; 837 case I2C_TXEN: 838 return netsio_read(sc, TL_NETSIO_ETXEN); 839 break; 840 default: 841 printf("tl_i2c_read: unknown bit %d\n", bit); 842 return -1; 843 } 844 } 845 846 static int 847 tl_intr(v) 848 void *v; 849 { 850 tl_softc_t *sc = v; 851 struct ifnet *ifp = &sc->tl_if; 852 struct Rx_list *Rx; 853 struct Tx_list *Tx; 854 struct mbuf *m; 855 u_int32_t int_type, int_reg; 856 int ack = 0; 857 int size; 858 859 int_reg = TL_HR_READ(sc, TL_HOST_INTR_DIOADR); 860 int_type = int_reg & TL_INTR_MASK; 861 if (int_type == 0) 862 return 0; 863 #if defined(TLDEBUG_RX) || defined(TLDEBUG_TX) 864 printf("%s: interrupt type %x, intr_reg %x\n", sc->sc_dev.dv_xname, 865 int_type, int_reg); 866 #endif 867 /* disable interrupts */ 868 TL_HR_WRITE(sc, TL_HOST_CMD, HOST_CMD_IntOff); 869 switch(int_type & TL_INTR_MASK) { 870 case TL_INTR_RxEOF: 871 while(sc->active_Rx->hw_list.stat & TL_RX_CSTAT_CPLT) { 872 /* dequeue and requeue at end of list */ 873 ack++; 874 Rx = sc->active_Rx; 875 sc->active_Rx = Rx->next; 876 m = Rx->m; 877 size = Rx->hw_list.stat >> 16; 878 #ifdef TLDEBUG_RX 879 printf("tl_intr: RX list complete, Rx %p, size=%d\n", Rx, size); 880 #endif 881 if (tl_add_RxBuff(Rx, m ) == 0) { 882 /* No new mbuf, reuse the same. This means that this packet 883 is lost */ 884 m = NULL; 885 #ifdef TL_PRIV_STATS 886 sc->ierr_nomem++; 887 #endif 888 #ifdef TLDEBUG 889 printf("%s: out of mbuf, lost input packet\n", 890 sc->sc_dev.dv_xname); 891 #endif 892 } 893 Rx->next = NULL; 894 Rx->hw_list.fwd = 0; 895 sc->last_Rx->hw_list.fwd = vtophys(&Rx->hw_list); 896 #ifdef DIAGNOSTIC 897 if (sc->last_Rx->hw_list.fwd & 0x7) 898 printf("%s: physical addr 0x%x of list not properly aligned\n", 899 sc->sc_dev.dv_xname, sc->last_Rx->hw_list.fwd); 900 #endif 901 sc->last_Rx->next = Rx; 902 sc->last_Rx = Rx; 903 904 /* deliver packet */ 905 if (m) { 906 struct ether_header *eh; 907 if (size < sizeof(struct ether_header)) { 908 m_freem(m); 909 continue; 910 } 911 m->m_pkthdr.rcvif = ifp; 912 m->m_pkthdr.len = m->m_len = 913 size - sizeof(struct ether_header); 914 eh = mtod(m, struct ether_header *); 915 #ifdef TLDEBUG_RX 916 printf("tl_intr: Rx packet:\n"); 917 ether_printheader(eh); 918 #endif 919 #if NBPFILTER > 0 920 if (ifp->if_bpf) { 921 bpf_tap(ifp->if_bpf, 922 mtod(m, caddr_t), 923 size); 924 /* 925 * Only pass this packet up 926 * if it is for us. 927 */ 928 if ((ifp->if_flags & IFF_PROMISC) && 929 (eh->ether_dhost[0] & 1) == 0 && /* !mcast and !bcast */ 930 bcmp(eh->ether_dhost, LLADDR(ifp->if_sadl), 931 sizeof(eh->ether_dhost)) != 0) { 932 m_freem(m); 933 continue; 934 } 935 } 936 #endif /* NBPFILTER > 0 */ 937 m->m_data += sizeof(struct ether_header); 938 ether_input(ifp, eh, m); 939 } 940 } 941 #ifdef TLDEBUG_RX 942 printf("TL_INTR_RxEOF: ack %d\n", ack); 943 #else 944 if (ack == 0) { 945 printf("%s: EOF intr without anything to read !\n", 946 sc->sc_dev.dv_xname); 947 tl_reset(sc); 948 /* shedule reinit of the board */ 949 timeout(tl_restart, sc, 1); 950 return(1); 951 } 952 #endif 953 break; 954 case TL_INTR_RxEOC: 955 ack++; 956 #ifdef TLDEBUG_RX 957 printf("TL_INTR_RxEOC: ack %d\n", ack); 958 #endif 959 #ifdef DIAGNOSTIC 960 if (sc->active_Rx->hw_list.stat & TL_RX_CSTAT_CPLT) { 961 printf("%s: Rx EOC interrupt and active Rx list not cleared\n", 962 sc->sc_dev.dv_xname); 963 return 0; 964 } else 965 #endif 966 { 967 /* write adress of Rx list and send Rx GO command, ack interrupt 968 and enable interrupts in one command */ 969 TL_HR_WRITE(sc, TL_HOST_CH_PARM, 970 vtophys(&sc->active_Rx->hw_list)); 971 TL_HR_WRITE(sc, TL_HOST_CMD, 972 HOST_CMD_GO | HOST_CMD_RT | HOST_CMD_Nes | ack | int_type | 973 HOST_CMD_ACK | HOST_CMD_IntOn); 974 return 1; 975 } 976 case TL_INTR_TxEOF: 977 case TL_INTR_TxEOC: 978 while ((Tx = sc->active_Tx) != NULL) { 979 if((Tx->hw_list.stat & TL_TX_CSTAT_CPLT) == 0) 980 break; 981 ack++; 982 #ifdef TLDEBUG_TX 983 printf("TL_INTR_TxEOC: list 0x%xp done\n", vtophys(&Tx->hw_list)); 984 #endif 985 Tx->hw_list.stat = 0; 986 m_freem(Tx->m); 987 Tx->m = NULL; 988 sc->active_Tx = Tx->next; 989 if (sc->active_Tx == NULL) 990 sc->last_Tx = NULL; 991 Tx->next = sc->Free_Tx; 992 sc->Free_Tx = Tx; 993 } 994 /* if this was an EOC, ACK immediatly */ 995 if (int_type == TL_INTR_TxEOC) { 996 #ifdef TLDEBUG_TX 997 printf("TL_INTR_TxEOC: ack %d (will be set to 1)\n", ack); 998 #endif 999 TL_HR_WRITE(sc, TL_HOST_CMD, 1 | int_type | HOST_CMD_ACK | 1000 HOST_CMD_IntOn); 1001 if ( sc->active_Tx != NULL) { /* needs a Tx go command */ 1002 TL_HR_WRITE(sc, TL_HOST_CH_PARM, 1003 vtophys(&sc->active_Tx->hw_list)); 1004 TL_HR_WRITE(sc, TL_HOST_CMD, HOST_CMD_GO); 1005 } 1006 sc->tl_if.if_timer = 0; 1007 if (sc->tl_if.if_snd.ifq_head != NULL) 1008 tl_ifstart(&sc->tl_if); 1009 return 1; 1010 } 1011 #ifdef TLDEBUG 1012 else { 1013 printf("TL_INTR_TxEOF: ack %d\n", ack); 1014 } 1015 #endif 1016 sc->tl_if.if_timer = 0; 1017 if (sc->tl_if.if_snd.ifq_head != NULL) 1018 tl_ifstart(&sc->tl_if); 1019 break; 1020 case TL_INTR_Stat: 1021 ack++; 1022 #ifdef TLDEBUG 1023 printf("TL_INTR_Stat: ack %d\n", ack); 1024 #endif 1025 tl_read_stats(sc); 1026 break; 1027 case TL_INTR_Adc: 1028 if (int_reg & TL_INTVec_MASK) { 1029 /* adapter check conditions */ 1030 printf("%s: check condition, intvect=0x%x, ch_param=0x%x\n", 1031 sc->sc_dev.dv_xname, int_reg & TL_INTVec_MASK, 1032 TL_HR_READ(sc, TL_HOST_CH_PARM)); 1033 tl_reset(sc); 1034 /* shedule reinit of the board */ 1035 timeout(tl_restart, sc, 1); 1036 return(1); 1037 } else { 1038 u_int8_t netstat; 1039 /* Network status */ 1040 netstat = tl_intreg_read_byte(sc, TL_INT_NET+TL_INT_NetSts); 1041 printf("%s: network status, NetSts=%x\n", 1042 sc->sc_dev.dv_xname, netstat); 1043 /* Ack interrupts */ 1044 tl_intreg_write_byte(sc, TL_INT_NET+TL_INT_NetSts, netstat); 1045 ack++; 1046 } 1047 break; 1048 default: 1049 printf("%s: unhandled interrupt code %x!\n", 1050 sc->sc_dev.dv_xname, int_type); 1051 ack++; 1052 } 1053 1054 if (ack) { 1055 /* Ack the interrupt and enable interrupts */ 1056 TL_HR_WRITE(sc, TL_HOST_CMD, ack | int_type | HOST_CMD_ACK | 1057 HOST_CMD_IntOn); 1058 return 1; 1059 } 1060 /* ack = 0 ; interrupt was perhaps not our. Just enable interrupts */ 1061 TL_HR_WRITE(sc, TL_HOST_CMD, HOST_CMD_IntOn); 1062 return 0; 1063 } 1064 1065 static int 1066 tl_ifioctl(ifp, cmd, data) 1067 struct ifnet *ifp; 1068 ioctl_cmd_t cmd; 1069 caddr_t data; 1070 { 1071 struct tl_softc *sc = ifp->if_softc; 1072 struct ifreq *ifr = (struct ifreq *)data; 1073 int s, error; 1074 1075 s = splimp(); 1076 switch(cmd) { 1077 case SIOCSIFADDR: { 1078 struct ifaddr *ifa = (struct ifaddr *)data; 1079 sc->tl_if.if_flags |= IFF_UP; 1080 if ((error = tl_init(sc)) != NULL) { 1081 sc->tl_if.if_flags &= ~IFF_UP; 1082 break; 1083 } 1084 switch (ifa->ifa_addr->sa_family) { 1085 #ifdef INET 1086 case AF_INET: 1087 arp_ifinit(ifp, ifa); 1088 break; 1089 #endif 1090 #ifdef NS 1091 case AF_NS: { 1092 struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 1093 1094 if (ns_nullhost(*ina)) 1095 ina->x_host = *(union ns_host*) LLADDR(ifp->if_sadl); 1096 else 1097 bcopy(ina->x_host.c_host, LLADDR(ifp->if_sadl), 1098 ifp->if_addrlen); 1099 break; 1100 } 1101 #endif 1102 default: 1103 break; 1104 } 1105 break; 1106 } 1107 case SIOCSIFFLAGS: 1108 { 1109 u_int8_t reg; 1110 /* 1111 * If interface is marked up and not running, then start it. 1112 * If it is marked down and running, stop it. 1113 */ 1114 if (ifp->if_flags & IFF_UP) { 1115 if ((ifp->if_flags & IFF_RUNNING) == 0) { 1116 error = tl_init(sc); 1117 /* all flags have been handled by init */ 1118 break; 1119 } 1120 error = 0; 1121 reg = tl_intreg_read_byte(sc, TL_INT_NET + TL_INT_NetCmd); 1122 if (ifp->if_flags & IFF_PROMISC) 1123 reg |= TL_NETCOMMAND_CAF; 1124 else 1125 reg &= ~TL_NETCOMMAND_CAF; 1126 tl_intreg_write_byte(sc, TL_INT_NET + TL_INT_NetCmd, reg); 1127 #ifdef TL_PRIV_STATS 1128 if (ifp->if_flags & IFF_LINK0) { 1129 ifp->if_flags &= ~IFF_LINK0; 1130 printf("%s errors statistics\n", sc->sc_dev.dv_xname); 1131 printf(" %4d RX buffer overrun\n",sc->ierr_overr); 1132 printf(" %4d RX code error\n", sc->ierr_code); 1133 printf(" %4d RX crc error\n", sc->ierr_crc); 1134 printf(" %4d RX out of memory\n", sc->ierr_nomem); 1135 printf(" %4d TX buffer underrun\n", sc->oerr_underr); 1136 printf(" %4d TX deffered frames\n", sc->oerr_deffered); 1137 printf(" %4d TX single collisions\n", sc->oerr_coll); 1138 printf(" %4d TX multi collisions\n", sc->oerr_multicoll); 1139 printf(" %4d TX exessive collisions\n", sc->oerr_exesscoll); 1140 printf(" %4d TX late collisions\n", sc->oerr_latecoll); 1141 printf(" %4d TX carrier loss\n", sc->oerr_carrloss); 1142 printf(" %4d TX mbuf copy\n", sc->oerr_mcopy); 1143 } 1144 #endif 1145 } else { 1146 if (ifp->if_flags & IFF_RUNNING) 1147 tl_shutdown(sc); 1148 error = 0; 1149 } 1150 break; 1151 } 1152 case SIOCADDMULTI: 1153 case SIOCDELMULTI: 1154 /* 1155 * Update multicast listeners 1156 */ 1157 if (cmd == SIOCADDMULTI) 1158 error = ether_addmulti(ifr, &sc->tl_ec); 1159 else 1160 error = ether_delmulti(ifr, &sc->tl_ec); 1161 if (error == ENETRESET) { 1162 tl_addr_filter(sc); 1163 error = 0; 1164 } 1165 break; 1166 case SIOCSIFMEDIA: 1167 case SIOCGIFMEDIA: 1168 error = ifmedia_ioctl(ifp, ifr, &sc->tl_ifmedia, cmd); 1169 break; 1170 default: 1171 error = EINVAL; 1172 } 1173 splx(s); 1174 return error; 1175 } 1176 1177 static void 1178 tl_ifstart(ifp) 1179 struct ifnet *ifp; 1180 { 1181 tl_softc_t *sc = ifp->if_softc; 1182 struct mbuf *m, *mb_head; 1183 struct Tx_list *Tx; 1184 int segment, size; 1185 1186 txloop: 1187 /* If we don't have more space ... */ 1188 if (sc->Free_Tx == NULL) { 1189 #ifdef TLDEBUG 1190 printf("tl_ifstart: No free TX list\n"); 1191 #endif 1192 return; 1193 } 1194 /* Grab a paquet for output */ 1195 IF_DEQUEUE(&ifp->if_snd, mb_head); 1196 if (mb_head == NULL) { 1197 #ifdef TLDEBUG_TX 1198 printf("tl_ifstart: nothing to send\n"); 1199 #endif 1200 return; 1201 } 1202 Tx = sc->Free_Tx; 1203 sc->Free_Tx = Tx->next; 1204 /* 1205 * Go through each of the mbufs in the chain and initialize 1206 * the transmit list descriptors with the physical address 1207 * and size of the mbuf. 1208 */ 1209 tbdinit: 1210 bzero(Tx, sizeof(struct Tx_list)); 1211 Tx->m = mb_head; 1212 size = 0; 1213 for (m = mb_head, segment = 0; m != NULL ; m = m->m_next) { 1214 if (m->m_len != 0) { 1215 if (segment == TL_NSEG) 1216 break; 1217 size += m->m_len; 1218 Tx->hw_list.seg[segment].data_addr = 1219 vtophys(mtod(m, vm_offset_t)); 1220 Tx->hw_list.seg[segment].data_count = m->m_len; 1221 segment++; 1222 } 1223 } 1224 if (m != NULL || (size < ETHER_MIN_TX && segment == TL_NSEG)) { 1225 /* 1226 * We ran out of segments, or we will. We have to recopy this mbuf 1227 * chain first. 1228 */ 1229 struct mbuf *mn; 1230 #ifdef TLDEBUG_TX 1231 printf("tl_ifstart: need to copy mbuf\n"); 1232 #endif 1233 #ifdef TL_PRIV_STATS 1234 sc->oerr_mcopy++; 1235 #endif 1236 MGETHDR(mn, M_DONTWAIT, MT_DATA); 1237 if (mn == NULL) { 1238 m_freem(mb_head); 1239 goto bad; 1240 } 1241 if (mb_head->m_pkthdr.len > MHLEN) { 1242 MCLGET(mn, M_DONTWAIT); 1243 if ((mn->m_flags & M_EXT) == 0) { 1244 m_freem(mn); 1245 m_freem(mb_head); 1246 goto bad; 1247 } 1248 } 1249 m_copydata(mb_head, 0, mb_head->m_pkthdr.len, 1250 mtod(mn, caddr_t)); 1251 mn->m_pkthdr.len = mn->m_len = mb_head->m_pkthdr.len; 1252 m_freem(mb_head); 1253 mb_head = mn; 1254 goto tbdinit; 1255 } 1256 /* We are at end of mbuf chain. check the size and 1257 * see if it needs to be extended 1258 */ 1259 if (size < ETHER_MIN_TX) { 1260 #ifdef DIAGNOSTIC 1261 if (segment >= TL_NSEG) { 1262 panic("tl_ifstart: to much segmets (%d)\n", segment); 1263 } 1264 #endif 1265 /* 1266 * add the nullbuf in the seg 1267 */ 1268 Tx->hw_list.seg[segment].data_count = 1269 ETHER_MIN_TX - size; 1270 Tx->hw_list.seg[segment].data_addr = 1271 vtophys(nullbuf); 1272 size = ETHER_MIN_TX; 1273 segment++; 1274 } 1275 /* The list is done, finish the list init */ 1276 Tx->hw_list.seg[segment-1].data_count |= 1277 TL_LAST_SEG; 1278 Tx->hw_list.stat = (size << 16) | 0x3000; 1279 #ifdef TLDEBUG_TX 1280 printf("%s: sending, Tx : stat = 0x%x\n", sc->sc_dev.dv_xname, 1281 Tx->hw_list.stat); 1282 #if 0 1283 for(segment = 0; segment < TL_NSEG; segment++) { 1284 printf(" seg %d addr 0x%x len 0x%x\n", 1285 segment, 1286 Tx->hw_list.seg[segment].data_addr, 1287 Tx->hw_list.seg[segment].data_count); 1288 } 1289 #endif 1290 #endif 1291 sc->opkt++; 1292 if (sc->active_Tx == NULL) { 1293 sc->active_Tx = sc->last_Tx = Tx; 1294 #ifdef TLDEBUG_TX 1295 printf("%s: Tx GO, addr=0x%x\n", sc->sc_dev.dv_xname, 1296 vtophys(&Tx->hw_list)); 1297 #endif 1298 TL_HR_WRITE(sc, TL_HOST_CH_PARM, vtophys(&Tx->hw_list)); 1299 TL_HR_WRITE(sc, TL_HOST_CMD, HOST_CMD_GO); 1300 } else { 1301 #ifdef TLDEBUG_TX 1302 printf("%s: Tx addr=0x%x queued\n", sc->sc_dev.dv_xname, 1303 vtophys(&Tx->hw_list)); 1304 #endif 1305 sc->last_Tx->hw_list.fwd = vtophys(&Tx->hw_list); 1306 sc->last_Tx->next = Tx; 1307 sc->last_Tx = Tx; 1308 #ifdef DIAGNOSTIC 1309 if (sc->last_Tx->hw_list.fwd & 0x7) 1310 printf("%s: physical addr 0x%x of list not properly aligned\n", 1311 sc->sc_dev.dv_xname, sc->last_Rx->hw_list.fwd); 1312 #endif 1313 } 1314 #if NBPFILTER > 0 1315 /* Pass packet to bpf if there is a listener */ 1316 if (ifp->if_bpf) 1317 bpf_mtap(ifp->if_bpf, mb_head); 1318 #endif 1319 /* Set a 5 second timer just in case we don't hear from the card again. */ 1320 ifp->if_timer = 5; 1321 1322 goto txloop; 1323 bad: 1324 #ifdef TLDEBUG 1325 printf("tl_ifstart: Out of mbuf, Tx pkt lost\n"); 1326 #endif 1327 Tx->next = sc->Free_Tx; 1328 sc->Free_Tx = Tx; 1329 return; 1330 } 1331 1332 static void 1333 tl_ifwatchdog(ifp) 1334 struct ifnet *ifp; 1335 { 1336 tl_softc_t *sc = ifp->if_softc; 1337 1338 if ((ifp->if_flags & IFF_RUNNING) == 0) 1339 return; 1340 printf("%s: device timeout\n", sc->sc_dev.dv_xname); 1341 ifp->if_oerrors++; 1342 tl_init(sc); 1343 } 1344 1345 static int 1346 tl_mediachange(ifp) 1347 struct ifnet *ifp; 1348 { 1349 1350 tl_softc_t *sc = ifp->if_softc; 1351 int err; 1352 u_int32_t reg; 1353 int oldmedia; 1354 #ifdef TLDEBUG 1355 printf("tl_mediachange, media %x\n", sc->tl_ifmedia.ifm_media); 1356 #endif 1357 oldmedia = sc->mii.mii_media_active; 1358 sc->mii.mii_media_active = sc->tl_ifmedia.ifm_media; 1359 if ((err = mii_mediachg(&sc->mii)) != 0) 1360 sc->mii.mii_media_active = oldmedia; 1361 reg = tl_intreg_read_byte(sc, TL_INT_NET + TL_INT_NetCmd); 1362 if (sc->mii.mii_media_active & IFM_FDX) 1363 reg |= TL_NETCOMMAND_DUPLEX; 1364 else 1365 reg &= ~TL_NETCOMMAND_DUPLEX; 1366 tl_intreg_write_byte(sc, TL_INT_NET + TL_INT_NetCmd, reg); 1367 return err; 1368 } 1369 1370 static void 1371 tl_mediastatus(ifp, ifmr) 1372 struct ifnet *ifp; 1373 struct ifmediareq *ifmr; 1374 { 1375 tl_softc_t *sc = ifp->if_softc; 1376 if (IFM_SUBTYPE(sc->mii.mii_media_active) == IFM_10_2 || 1377 IFM_SUBTYPE(sc->mii.mii_media_active) == IFM_10_5) 1378 if (sc->tl_flags & TL_IFACT) 1379 sc->mii.mii_media_status = IFM_AVALID | IFM_ACTIVE; 1380 else 1381 sc->mii.mii_media_status = IFM_AVALID; 1382 else 1383 mii_pollstat(&sc->mii); 1384 1385 ifmr->ifm_active = sc->mii.mii_media_active; 1386 ifmr->ifm_status = sc->mii.mii_media_status; 1387 } 1388 1389 static int tl_add_RxBuff(Rx, oldm) 1390 struct Rx_list *Rx; 1391 struct mbuf *oldm; 1392 { 1393 struct mbuf *m; 1394 1395 MGETHDR(m, M_DONTWAIT, MT_DATA); 1396 if (m != NULL) { 1397 MCLGET(m, M_DONTWAIT); 1398 if ((m->m_flags & M_EXT) == 0) { 1399 m_freem(m); 1400 if (oldm == NULL) 1401 return 0; 1402 m = oldm; 1403 m->m_data = m->m_ext.ext_buf; 1404 } 1405 } else { 1406 if (oldm == NULL) 1407 return 0; 1408 m = oldm; 1409 m->m_data = m->m_ext.ext_buf; 1410 } 1411 /* 1412 * Move the data pointer up so that the incoming data packet 1413 * will be 32-bit aligned. 1414 */ 1415 m->m_data += 2; 1416 1417 /* (re)init the Rx_list struct */ 1418 1419 Rx->m = m; 1420 Rx->hw_list.stat = ((MCLBYTES -2) << 16) | 0x3000; 1421 Rx->hw_list.seg.data_count = (MCLBYTES -2); 1422 Rx->hw_list.seg.data_addr = vtophys(m->m_data); 1423 return (m != oldm); 1424 } 1425 1426 static void tl_ticks(v) 1427 void *v; 1428 { 1429 tl_softc_t *sc = v; 1430 1431 tl_read_stats(sc); 1432 if (sc->opkt > 0) { 1433 if (sc->oerr_exesscoll > sc->opkt / 100) { /* exess collisions */ 1434 if (sc->tl_flags & TL_IFACT) /* only print once */ 1435 printf("%s: no carrier\n", sc->sc_dev.dv_xname); 1436 sc->tl_flags &= ~TL_IFACT; 1437 } else 1438 sc->tl_flags |= TL_IFACT; 1439 sc->oerr_exesscoll = sc->opkt = 0; 1440 sc->tl_lasttx = 0; 1441 } else { 1442 sc->tl_lasttx++; 1443 if (sc->tl_lasttx >= TL_IDLETIME) { 1444 /* 1445 * No TX activity in the last TL_IDLETIME seconds. 1446 * sends a LLC Class1 TEST pkt 1447 */ 1448 struct mbuf *m; 1449 int s; 1450 MGETHDR(m, M_DONTWAIT, MT_DATA); 1451 if (m != NULL) { 1452 #ifdef TLDEBUG 1453 printf("tl_ticks: sending LLC test pkt\n"); 1454 #endif 1455 bcopy(sc->tl_enaddr, 1456 mtod(m, struct ether_header *)->ether_dhost, 6); 1457 bcopy(sc->tl_enaddr, 1458 mtod(m, struct ether_header *)->ether_shost, 6); 1459 mtod(m, struct ether_header *)->ether_type = htons(3); 1460 mtod(m, unsigned char *)[14] = 0; 1461 mtod(m, unsigned char *)[15] = 0; 1462 mtod(m, unsigned char *)[16] = 0xE3; 1463 /* LLC Class1 TEST (no poll) */ 1464 m->m_len = m->m_pkthdr.len = sizeof(struct ether_header) + 3; 1465 s = splnet(); 1466 IF_PREPEND(&sc->tl_if.if_snd, m); 1467 tl_ifstart(&sc->tl_if); 1468 splx(s); 1469 } 1470 } 1471 } 1472 1473 /* read statistics every seconds */ 1474 timeout(tl_ticks, v, hz); 1475 } 1476 1477 static void 1478 tl_read_stats(sc) 1479 tl_softc_t *sc; 1480 { 1481 u_int32_t reg; 1482 int ierr_overr; 1483 int ierr_code; 1484 int ierr_crc; 1485 int oerr_underr; 1486 int oerr_deffered; 1487 int oerr_coll; 1488 int oerr_multicoll; 1489 int oerr_exesscoll; 1490 int oerr_latecoll; 1491 int oerr_carrloss; 1492 struct ifnet *ifp = &sc->tl_if; 1493 1494 reg = tl_intreg_read(sc, TL_INT_STATS_TX); 1495 ifp->if_opackets += reg & 0x00ffffff; 1496 oerr_underr = reg >> 24; 1497 1498 reg = tl_intreg_read(sc, TL_INT_STATS_RX); 1499 ifp->if_ipackets += reg & 0x00ffffff; 1500 ierr_overr = reg >> 24; 1501 1502 reg = tl_intreg_read(sc, TL_INT_STATS_FERR); 1503 ierr_crc = (reg & TL_FERR_CRC) >> 16; 1504 ierr_code = (reg & TL_FERR_CODE) >> 24; 1505 oerr_deffered = (reg & TL_FERR_DEF); 1506 1507 reg = tl_intreg_read(sc, TL_INT_STATS_COLL); 1508 oerr_multicoll = (reg & TL_COL_MULTI); 1509 oerr_coll = (reg & TL_COL_SINGLE) >> 16; 1510 1511 reg = tl_intreg_read(sc, TL_INT_LERR); 1512 oerr_exesscoll = (reg & TL_LERR_ECOLL); 1513 oerr_latecoll = (reg & TL_LERR_LCOLL) >> 8; 1514 oerr_carrloss = (reg & TL_LERR_CL) >> 16; 1515 1516 1517 sc->stats_exesscoll += oerr_exesscoll; 1518 ifp->if_oerrors += oerr_underr + oerr_exesscoll + oerr_latecoll + 1519 oerr_carrloss; 1520 ifp->if_collisions += oerr_coll + oerr_multicoll; 1521 ifp->if_ierrors += ierr_overr + ierr_code + ierr_crc; 1522 1523 if (ierr_overr) 1524 printf("%s: receiver ring buffer overrun\n", sc->sc_dev.dv_xname); 1525 if (oerr_underr) 1526 printf("%s: transmit buffer underrun\n", sc->sc_dev.dv_xname); 1527 #ifdef TL_PRIV_STATS 1528 sc->ierr_overr += ierr_overr; 1529 sc->ierr_code += ierr_code; 1530 sc->ierr_crc += ierr_crc; 1531 sc->oerr_underr += oerr_underr; 1532 sc->oerr_deffered += oerr_deffered; 1533 sc->oerr_coll += oerr_coll; 1534 sc->oerr_multicoll += oerr_multicoll; 1535 sc->oerr_exesscoll += oerr_exesscoll; 1536 sc->oerr_latecoll += oerr_latecoll; 1537 sc->oerr_carrloss += oerr_carrloss; 1538 #endif 1539 } 1540 1541 static void tl_addr_filter(sc) 1542 tl_softc_t *sc; 1543 { 1544 struct ether_multistep step; 1545 struct ether_multi *enm; 1546 u_int32_t hash[2] = {0, 0}; 1547 int i; 1548 1549 sc->tl_if.if_flags &= ~IFF_ALLMULTI; 1550 ETHER_FIRST_MULTI(step, &sc->tl_ec, enm); 1551 while (enm != NULL) { 1552 #ifdef TLDEBUG 1553 printf("tl_addr_filter: addrs %s %s\n", ether_sprintf(enm->enm_addrlo), ether_sprintf(enm->enm_addrhi)); 1554 #endif 1555 if (memcmp(enm->enm_addrlo, enm->enm_addrhi, 6) == 0) { 1556 i = tl_multicast_hash(enm->enm_addrlo); 1557 hash[i/32] |= 1 << (i%32); 1558 } else { 1559 hash[0] = hash[1] = 0xffffffff; 1560 sc->tl_if.if_flags |= IFF_ALLMULTI; 1561 break; 1562 } 1563 ETHER_NEXT_MULTI(step, enm); 1564 } 1565 #ifdef TLDEBUG 1566 printf("tl_addr_filer: hash1 %x has2 %x\n", hash[0], hash[1]); 1567 #endif 1568 tl_intreg_write(sc, TL_INT_HASH1, hash[0]); 1569 tl_intreg_write(sc, TL_INT_HASH2, hash[1]); 1570 } 1571 1572 static int tl_multicast_hash(a) 1573 u_int8_t *a; 1574 { 1575 int hash; 1576 1577 #define DA(addr,bit) (addr[5 - (bit/8)] & (1 << bit%8)) 1578 #define xor8(a,b,c,d,e,f,g,h) (((a != 0) + (b != 0) + (c != 0) + (d != 0) + (e != 0) + (f != 0) + (g != 0) + (h != 0)) & 1) 1579 1580 hash = xor8( DA(a,0), DA(a, 6), DA(a,12), DA(a,18), DA(a,24), DA(a,30), 1581 DA(a,36), DA(a,42)); 1582 hash |= xor8( DA(a,1), DA(a, 7), DA(a,13), DA(a,19), DA(a,25), DA(a,31), 1583 DA(a,37), DA(a,43)) << 1; 1584 hash |= xor8( DA(a,2), DA(a, 8), DA(a,14), DA(a,20), DA(a,26), DA(a,32), 1585 DA(a,38), DA(a,44)) << 2; 1586 hash |= xor8( DA(a,3), DA(a, 9), DA(a,15), DA(a,21), DA(a,27), DA(a,33), 1587 DA(a,39), DA(a,45)) << 3; 1588 hash |= xor8( DA(a,4), DA(a,10), DA(a,16), DA(a,22), DA(a,28), DA(a,34), 1589 DA(a,40), DA(a,46)) << 4; 1590 hash |= xor8( DA(a,5), DA(a,11), DA(a,17), DA(a,23), DA(a,29), DA(a,35), 1591 DA(a,41), DA(a,47)) << 5; 1592 1593 return hash; 1594 } 1595 1596 #if defined(TLDEBUG_RX) 1597 void ether_printheader(eh) 1598 struct ether_header *eh; 1599 { 1600 u_char *c = (char*)eh; 1601 int i; 1602 for (i=0; i<sizeof(struct ether_header); i++) 1603 printf("%x ", (u_int)c[i]); 1604 printf("\n"); 1605 } 1606 #endif 1607
Indexes created Thu Sep 25 06:09:39 GMT 2025