if_tlp_pci.c revision 1.103
1 /* $NetBSD: if_tlp_pci.c,v 1.103 2008/03/21 07:47:43 dyoung Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center; and Charles M. Hannum. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * PCI bus front-end for the Digital Semiconductor ``Tulip'' (21x4x) 42 * Ethernet controller family driver. 43 */ 44 45 #include <sys/cdefs.h> 46 __KERNEL_RCSID(0, "$NetBSD: if_tlp_pci.c,v 1.103 2008/03/21 07:47:43 dyoung Exp $"); 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/mbuf.h> 51 #include <sys/malloc.h> 52 #include <sys/kernel.h> 53 #include <sys/socket.h> 54 #include <sys/ioctl.h> 55 #include <sys/errno.h> 56 #include <sys/device.h> 57 58 #include <machine/endian.h> 59 60 #include <net/if.h> 61 #include <net/if_dl.h> 62 #include <net/if_media.h> 63 #include <net/if_ether.h> 64 65 #include <sys/bus.h> 66 #include <sys/intr.h> 67 #ifdef __sparc__ 68 #include <machine/promlib.h> 69 #endif 70 71 #include <dev/mii/miivar.h> 72 #include <dev/mii/mii_bitbang.h> 73 74 #include <dev/ic/tulipreg.h> 75 #include <dev/ic/tulipvar.h> 76 77 #include <dev/pci/pcivar.h> 78 #include <dev/pci/pcireg.h> 79 #include <dev/pci/pcidevs.h> 80 81 /* 82 * PCI configuration space registers used by the Tulip. 83 */ 84 #define TULIP_PCI_IOBA 0x10 /* i/o mapped base */ 85 #define TULIP_PCI_MMBA 0x14 /* memory mapped base */ 86 #define TULIP_PCI_CFDA 0x40 /* configuration driver area */ 87 88 #define CFDA_SLEEP 0x80000000 /* sleep mode */ 89 #define CFDA_SNOOZE 0x40000000 /* snooze mode */ 90 91 struct tulip_pci_softc { 92 struct tulip_softc sc_tulip; /* real Tulip softc */ 93 94 /* PCI-specific goo. */ 95 void *sc_ih; /* interrupt handle */ 96 97 pci_chipset_tag_t sc_pc; /* our PCI chipset */ 98 pcitag_t sc_pcitag; /* our PCI tag */ 99 100 int sc_flags; /* flags; see below */ 101 102 LIST_HEAD(, tulip_pci_softc) sc_intrslaves; 103 LIST_ENTRY(tulip_pci_softc) sc_intrq; 104 105 /* Our {ROM,interrupt} master. */ 106 struct tulip_pci_softc *sc_master; 107 }; 108 109 /* sc_flags */ 110 #define TULIP_PCI_SHAREDINTR 0x01 /* interrupt is shared */ 111 #define TULIP_PCI_SLAVEINTR 0x02 /* interrupt is slave */ 112 #define TULIP_PCI_SHAREDROM 0x04 /* ROM is shared */ 113 #define TULIP_PCI_SLAVEROM 0x08 /* slave of shared ROM */ 114 115 static int tlp_pci_match(device_t, struct cfdata *, void *); 116 static void tlp_pci_attach(device_t, device_t, void *); 117 118 CFATTACH_DECL(tlp_pci, sizeof(struct tulip_pci_softc), 119 tlp_pci_match, tlp_pci_attach, NULL, NULL); 120 121 static const struct tulip_pci_product { 122 uint32_t tpp_vendor; /* PCI vendor ID */ 123 uint32_t tpp_product; /* PCI product ID */ 124 tulip_chip_t tpp_chip; /* base Tulip chip type */ 125 } tlp_pci_products[] = { 126 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21040, 127 TULIP_CHIP_21040 }, 128 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21041, 129 TULIP_CHIP_21041 }, 130 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21140, 131 TULIP_CHIP_21140 }, 132 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142, 133 TULIP_CHIP_21142 }, 134 135 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C168, 136 TULIP_CHIP_82C168 }, 137 138 /* 139 * Note: This is like a MX98725 with Wake-On-LAN and a 140 * 128-bit multicast hash table. 141 */ 142 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C115, 143 TULIP_CHIP_82C115 }, 144 145 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98713, 146 TULIP_CHIP_MX98713 }, 147 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX987x5, 148 TULIP_CHIP_MX98715 }, 149 150 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100TX, 151 TULIP_CHIP_MX98713 }, 152 153 { PCI_VENDOR_WINBOND, PCI_PRODUCT_WINBOND_W89C840F, 154 TULIP_CHIP_WB89C840F }, 155 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100ATX, 156 TULIP_CHIP_WB89C840F }, 157 158 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9102, 159 TULIP_CHIP_DM9102 }, 160 161 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AL981, 162 TULIP_CHIP_AL981 }, 163 164 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN983, 165 TULIP_CHIP_AN985 }, 166 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_ADM9511, 167 TULIP_CHIP_AN985 }, 168 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_ADM9513, 169 TULIP_CHIP_AN985 }, 170 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN2242, 171 TULIP_CHIP_AN985 }, 172 173 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C910SOHOB, 174 TULIP_CHIP_AN985 }, 175 176 { PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX88140A, 177 TULIP_CHIP_AX88140 }, 178 179 { PCI_VENDOR_CONEXANT, PCI_PRODUCT_CONEXANT_LANFINITY, 180 TULIP_CHIP_RS7112 }, 181 182 { 0, 0, 183 TULIP_CHIP_INVALID }, 184 }; 185 186 struct tlp_pci_quirks { 187 void (*tpq_func)(struct tulip_pci_softc *, 188 const uint8_t *); 189 uint8_t tpq_oui[3]; 190 }; 191 192 static void tlp_pci_dec_quirks(struct tulip_pci_softc *, 193 const uint8_t *); 194 195 static void tlp_pci_znyx_21040_quirks(struct tulip_pci_softc *, 196 const uint8_t *); 197 static void tlp_pci_smc_21040_quirks(struct tulip_pci_softc *, 198 const uint8_t *); 199 static void tlp_pci_cogent_21040_quirks(struct tulip_pci_softc *, 200 const uint8_t *); 201 static void tlp_pci_accton_21040_quirks(struct tulip_pci_softc *, 202 const uint8_t *); 203 204 static void tlp_pci_cobalt_21142_quirks(struct tulip_pci_softc *, 205 const uint8_t *); 206 static void tlp_pci_algor_21142_quirks(struct tulip_pci_softc *, 207 const uint8_t *); 208 static void tlp_pci_netwinder_21142_quirks(struct tulip_pci_softc *, 209 const uint8_t *); 210 static void tlp_pci_phobos_21142_quirks(struct tulip_pci_softc *, 211 const uint8_t *); 212 static void tlp_pci_znyx_21142_quirks(struct tulip_pci_softc *, 213 const uint8_t *); 214 215 static void tlp_pci_adaptec_quirks(struct tulip_pci_softc *, 216 const uint8_t *); 217 218 static const struct tlp_pci_quirks tlp_pci_21040_quirks[] = { 219 { tlp_pci_znyx_21040_quirks, { 0x00, 0xc0, 0x95 } }, 220 { tlp_pci_smc_21040_quirks, { 0x00, 0x00, 0xc0 } }, 221 { tlp_pci_cogent_21040_quirks, { 0x00, 0x00, 0x92 } }, 222 { tlp_pci_accton_21040_quirks, { 0x00, 0x00, 0xe8 } }, 223 { NULL, { 0, 0, 0 } } 224 }; 225 226 static const struct tlp_pci_quirks tlp_pci_21041_quirks[] = { 227 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 228 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 229 { NULL, { 0, 0, 0 } } 230 }; 231 232 static void tlp_pci_asante_21140_quirks(struct tulip_pci_softc *, 233 const uint8_t *); 234 static void tlp_pci_e100_quirks(struct tulip_pci_softc *, 235 const uint8_t *); 236 static void tlp_pci_phobos_21140_quirks(struct tulip_pci_softc *, 237 const uint8_t *); 238 static void tlp_pci_smc_21140_quirks(struct tulip_pci_softc *, 239 const uint8_t *); 240 static void tlp_pci_vpc_21140_quirks(struct tulip_pci_softc *, 241 const uint8_t *); 242 243 static const struct tlp_pci_quirks tlp_pci_21140_quirks[] = { 244 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 245 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 246 { tlp_pci_e100_quirks, { 0x00, 0xa0, 0x59 } }, 247 { tlp_pci_asante_21140_quirks, { 0x00, 0x00, 0x94 } }, 248 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0x92 } }, 249 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } }, 250 { tlp_pci_phobos_21140_quirks, { 0x00, 0x60, 0xf5 } }, 251 { tlp_pci_smc_21140_quirks, { 0x00, 0x00, 0xc0 } }, 252 { tlp_pci_vpc_21140_quirks, { 0x00, 0x03, 0xff } }, 253 { NULL, { 0, 0, 0 } } 254 }; 255 256 static const struct tlp_pci_quirks tlp_pci_21142_quirks[] = { 257 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 258 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 259 { tlp_pci_cobalt_21142_quirks, { 0x00, 0x10, 0xe0 } }, 260 { tlp_pci_algor_21142_quirks, { 0x00, 0x40, 0xbc } }, 261 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } }, 262 { tlp_pci_netwinder_21142_quirks,{ 0x00, 0x10, 0x57 } }, 263 { tlp_pci_phobos_21142_quirks, { 0x00, 0x60, 0xf5 } }, 264 { tlp_pci_znyx_21142_quirks, { 0x00, 0xc0, 0x95 } }, 265 { NULL, { 0, 0, 0 } } 266 }; 267 268 static int tlp_pci_shared_intr(void *); 269 270 static const struct tulip_pci_product * 271 tlp_pci_lookup(const struct pci_attach_args *pa) 272 { 273 const struct tulip_pci_product *tpp; 274 275 /* Don't match lmc cards */ 276 if (PCI_VENDOR(pci_conf_read(pa->pa_pc, pa->pa_tag, 277 PCI_SUBSYS_ID_REG)) == PCI_VENDOR_LMC) 278 return NULL; 279 280 for (tpp = tlp_pci_products; 281 tlp_chip_names[tpp->tpp_chip] != NULL; 282 tpp++) { 283 if (PCI_VENDOR(pa->pa_id) == tpp->tpp_vendor && 284 PCI_PRODUCT(pa->pa_id) == tpp->tpp_product) 285 return tpp; 286 } 287 return NULL; 288 } 289 290 static void 291 tlp_pci_get_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr, 292 const struct tlp_pci_quirks *tpq) 293 { 294 295 for (; tpq->tpq_func != NULL; tpq++) { 296 if (tpq->tpq_oui[0] == enaddr[0] && 297 tpq->tpq_oui[1] == enaddr[1] && 298 tpq->tpq_oui[2] == enaddr[2]) { 299 (*tpq->tpq_func)(psc, enaddr); 300 return; 301 } 302 } 303 } 304 305 static void 306 tlp_pci_check_slaved(struct tulip_pci_softc *psc, int shared, int slaved) 307 { 308 extern struct cfdriver tlp_cd; 309 struct tulip_pci_softc *cur, *best = NULL; 310 struct tulip_softc *sc = &psc->sc_tulip; 311 int i; 312 313 /* 314 * First of all, find the lowest pcidev numbered device on our 315 * bus marked as shared. That should be our master. 316 */ 317 for (i = 0; i < tlp_cd.cd_ndevs; i++) { 318 if ((cur = tlp_cd.cd_devs[i]) == NULL) 319 continue; 320 if (device_parent(&cur->sc_tulip.sc_dev) != 321 device_parent(&sc->sc_dev)) 322 continue; 323 if ((cur->sc_flags & shared) == 0) 324 continue; 325 if (cur == psc) 326 continue; 327 if (best == NULL || 328 best->sc_tulip.sc_devno > cur->sc_tulip.sc_devno) 329 best = cur; 330 } 331 332 if (best != NULL) { 333 psc->sc_master = best; 334 psc->sc_flags |= (shared | slaved); 335 } 336 } 337 338 static int 339 tlp_pci_match(device_t parent, struct cfdata *match, void *aux) 340 { 341 struct pci_attach_args *pa = aux; 342 343 if (tlp_pci_lookup(pa) != NULL) 344 return 10; /* beat if_de.c */ 345 346 return 0; 347 } 348 349 static void 350 tlp_pci_attach(device_t parent, device_t self, void *aux) 351 { 352 struct tulip_pci_softc *psc = device_private(self); 353 struct tulip_softc *sc = &psc->sc_tulip; 354 struct pci_attach_args *pa = aux; 355 pci_chipset_tag_t pc = pa->pa_pc; 356 pci_intr_handle_t ih; 357 const char *intrstr = NULL; 358 bus_space_tag_t iot, memt; 359 bus_space_handle_t ioh, memh; 360 int ioh_valid, memh_valid, i, j; 361 const struct tulip_pci_product *tpp; 362 prop_data_t ea; 363 uint8_t enaddr[ETHER_ADDR_LEN]; 364 uint32_t val = 0; 365 pcireg_t reg; 366 int error; 367 368 sc->sc_devno = pa->pa_device; 369 psc->sc_pc = pa->pa_pc; 370 psc->sc_pcitag = pa->pa_tag; 371 372 LIST_INIT(&psc->sc_intrslaves); 373 374 tpp = tlp_pci_lookup(pa); 375 if (tpp == NULL) { 376 printf("\n"); 377 panic("tlp_pci_attach: impossible"); 378 } 379 sc->sc_chip = tpp->tpp_chip; 380 381 /* 382 * By default, Tulip registers are 8 bytes long (4 bytes 383 * followed by a 4 byte pad). 384 */ 385 sc->sc_regshift = 3; 386 387 /* 388 * No power management hooks. 389 * XXX Maybe we should add some! 390 */ 391 sc->sc_flags |= TULIPF_ENABLED; 392 393 /* 394 * Get revision info, and set some chip-specific variables. 395 */ 396 sc->sc_rev = PCI_REVISION(pa->pa_class); 397 switch (sc->sc_chip) { 398 case TULIP_CHIP_21140: 399 if (sc->sc_rev >= 0x20) 400 sc->sc_chip = TULIP_CHIP_21140A; 401 break; 402 403 case TULIP_CHIP_21142: 404 if (sc->sc_rev >= 0x20) 405 sc->sc_chip = TULIP_CHIP_21143; 406 break; 407 408 case TULIP_CHIP_82C168: 409 if (sc->sc_rev >= 0x20) 410 sc->sc_chip = TULIP_CHIP_82C169; 411 break; 412 413 case TULIP_CHIP_MX98713: 414 if (sc->sc_rev >= 0x10) 415 sc->sc_chip = TULIP_CHIP_MX98713A; 416 break; 417 418 case TULIP_CHIP_MX98715: 419 if (sc->sc_rev >= 0x20) 420 sc->sc_chip = TULIP_CHIP_MX98715A; 421 if (sc->sc_rev >= 0x25) 422 sc->sc_chip = TULIP_CHIP_MX98715AEC_X; 423 if (sc->sc_rev >= 0x30) 424 sc->sc_chip = TULIP_CHIP_MX98725; 425 break; 426 427 case TULIP_CHIP_WB89C840F: 428 sc->sc_regshift = 2; 429 break; 430 431 case TULIP_CHIP_AN985: 432 /* 433 * The AN983 and AN985 are very similar, and are 434 * differentiated by a "signature" register that 435 * is like, but not identical, to a PCI ID register. 436 */ 437 reg = pci_conf_read(pc, pa->pa_tag, 0x80); 438 switch (reg) { 439 case 0x09811317: 440 sc->sc_chip = TULIP_CHIP_AN985; 441 break; 442 443 case 0x09851317: 444 sc->sc_chip = TULIP_CHIP_AN983; 445 break; 446 447 default: 448 /* Unknown -- use default. */ 449 break; 450 } 451 break; 452 453 case TULIP_CHIP_AX88140: 454 if (sc->sc_rev >= 0x10) 455 sc->sc_chip = TULIP_CHIP_AX88141; 456 break; 457 458 case TULIP_CHIP_DM9102: 459 if (sc->sc_rev >= 0x30) 460 sc->sc_chip = TULIP_CHIP_DM9102A; 461 break; 462 463 default: 464 /* Nothing. */ 465 break; 466 } 467 468 printf(": %s Ethernet, pass %d.%d\n", 469 tlp_chip_names[sc->sc_chip], 470 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf); 471 472 switch (sc->sc_chip) { 473 case TULIP_CHIP_21040: 474 if (sc->sc_rev < 0x20) { 475 printf("%s: 21040 must be at least pass 2.0\n", 476 sc->sc_dev.dv_xname); 477 return; 478 } 479 break; 480 481 case TULIP_CHIP_21140: 482 if (sc->sc_rev < 0x11) { 483 printf("%s: 21140 must be at least pass 1.1\n", 484 sc->sc_dev.dv_xname); 485 return; 486 } 487 break; 488 489 default: 490 /* Nothing. */ 491 break; 492 } 493 494 /* 495 * Check to see if the device is in power-save mode, and 496 * being it out if necessary. 497 */ 498 switch (sc->sc_chip) { 499 case TULIP_CHIP_21140: 500 case TULIP_CHIP_21140A: 501 case TULIP_CHIP_21142: 502 case TULIP_CHIP_21143: 503 case TULIP_CHIP_MX98713A: 504 case TULIP_CHIP_MX98715: 505 case TULIP_CHIP_MX98715A: 506 case TULIP_CHIP_MX98715AEC_X: 507 case TULIP_CHIP_MX98725: 508 case TULIP_CHIP_DM9102: 509 case TULIP_CHIP_DM9102A: 510 case TULIP_CHIP_AX88140: 511 case TULIP_CHIP_AX88141: 512 case TULIP_CHIP_RS7112: 513 /* 514 * Clear the "sleep mode" bit in the CFDA register. 515 */ 516 reg = pci_conf_read(pc, pa->pa_tag, TULIP_PCI_CFDA); 517 if (reg & (CFDA_SLEEP|CFDA_SNOOZE)) 518 pci_conf_write(pc, pa->pa_tag, TULIP_PCI_CFDA, 519 reg & ~(CFDA_SLEEP|CFDA_SNOOZE)); 520 break; 521 522 default: 523 /* Nothing. */ 524 break; 525 } 526 527 /* power up chip */ 528 if ((error = pci_activate(pa->pa_pc, pa->pa_tag, self, 529 NULL)) && error != EOPNOTSUPP) { 530 aprint_error("%s: cannot activate %d\n", sc->sc_dev.dv_xname, 531 error); 532 return; 533 } 534 535 /* 536 * Map the device. 537 */ 538 539 ioh_valid = (pci_mapreg_map(pa, TULIP_PCI_IOBA, 540 PCI_MAPREG_TYPE_IO, 0, 541 &iot, &ioh, NULL, NULL) == 0); 542 memh_valid = (pci_mapreg_map(pa, TULIP_PCI_MMBA, 543 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 544 &memt, &memh, NULL, NULL) == 0); 545 if (memh_valid) { 546 sc->sc_st = memt; 547 sc->sc_sh = memh; 548 } else if (ioh_valid) { 549 sc->sc_st = iot; 550 sc->sc_sh = ioh; 551 } else { 552 printf("%s: unable to map device registers\n", 553 sc->sc_dev.dv_xname); 554 return; 555 } 556 557 sc->sc_dmat = pa->pa_dmat; 558 559 /* 560 * Make sure bus mastering is enabled. 561 */ 562 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 563 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 564 PCI_COMMAND_MASTER_ENABLE); 565 566 /* 567 * Get the cacheline size. 568 */ 569 sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag, 570 PCI_BHLC_REG)); 571 572 /* 573 * Get PCI data moving command info. 574 */ 575 if (pa->pa_flags & PCI_FLAGS_MRL_OKAY) 576 sc->sc_flags |= TULIPF_MRL; 577 if (pa->pa_flags & PCI_FLAGS_MRM_OKAY) 578 sc->sc_flags |= TULIPF_MRM; 579 if (pa->pa_flags & PCI_FLAGS_MWI_OKAY) 580 sc->sc_flags |= TULIPF_MWI; 581 582 /* 583 * Read the contents of the Ethernet Address ROM/SROM. 584 */ 585 switch (sc->sc_chip) { 586 case TULIP_CHIP_21040: 587 sc->sc_srom_addrbits = 6; 588 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, M_NOWAIT); 589 TULIP_WRITE(sc, CSR_MIIROM, MIIROM_SROMCS); 590 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 591 for (j = 0; j < 10000; j++) { 592 val = TULIP_READ(sc, CSR_MIIROM); 593 if ((val & MIIROM_DN) == 0) 594 break; 595 } 596 sc->sc_srom[i] = val & MIIROM_DATA; 597 } 598 break; 599 600 case TULIP_CHIP_82C168: 601 case TULIP_CHIP_82C169: 602 { 603 sc->sc_srom_addrbits = 2; 604 sc->sc_srom = malloc(TULIP_ROM_SIZE(2), M_DEVBUF, M_NOWAIT); 605 606 /* 607 * The Lite-On PNIC stores the Ethernet address in 608 * the first 3 words of the EEPROM. EEPROM access 609 * is not like the other Tulip chips. 610 */ 611 for (i = 0; i < 6; i += 2) { 612 TULIP_WRITE(sc, CSR_PNIC_SROMCTL, 613 PNIC_SROMCTL_READ | (i >> 1)); 614 for (j = 0; j < 500; j++) { 615 delay(2); 616 val = TULIP_READ(sc, CSR_MIIROM); 617 if ((val & PNIC_MIIROM_BUSY) == 0) 618 break; 619 } 620 if (val & PNIC_MIIROM_BUSY) { 621 printf("%s: EEPROM timed out\n", 622 sc->sc_dev.dv_xname); 623 return; 624 } 625 val &= PNIC_MIIROM_DATA; 626 sc->sc_srom[i] = val >> 8; 627 sc->sc_srom[i + 1] = val & 0xff; 628 } 629 break; 630 } 631 632 default: 633 /* 634 * XXX This isn't quite the right way to do this; we should 635 * XXX be attempting to fetch the mac-addr property in the 636 * XXX bus-agnostic part of the driver independently. But 637 * XXX that requires a larger change in the SROM handling 638 * XXX logic, and for now we can at least remove a machine- 639 * XXX dependent wart from the PCI front-end. 640 */ 641 ea = prop_dictionary_get(device_properties(&sc->sc_dev), 642 "mac-addr"); 643 if (ea != NULL) { 644 extern int tlp_srom_debug; 645 KASSERT(prop_object_type(ea) == PROP_TYPE_DATA); 646 KASSERT(prop_data_size(ea) == ETHER_ADDR_LEN); 647 648 memcpy(enaddr, prop_data_data_nocopy(ea), 649 ETHER_ADDR_LEN); 650 651 sc->sc_srom_addrbits = 6; 652 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, 653 M_NOWAIT|M_ZERO); 654 memcpy(sc->sc_srom, enaddr, sizeof(enaddr)); 655 if (tlp_srom_debug) { 656 printf("SROM CONTENTS:"); 657 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 658 if ((i % 8) == 0) 659 printf("\n\t"); 660 printf("0x%02x ", sc->sc_srom[i]); 661 } 662 printf("\n"); 663 } 664 break; 665 } 666 667 /* Check for a slaved ROM on a multi-port board. */ 668 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDROM, 669 TULIP_PCI_SLAVEROM); 670 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 671 sc->sc_srom_addrbits = 672 psc->sc_master->sc_tulip.sc_srom_addrbits; 673 sc->sc_srom = psc->sc_master->sc_tulip.sc_srom; 674 enaddr[5] += 675 sc->sc_devno - psc->sc_master->sc_tulip.sc_devno; 676 } 677 else if (tlp_read_srom(sc) == 0) 678 goto cant_cope; 679 break; 680 } 681 682 /* 683 * Deal with chip/board quirks. This includes setting up 684 * the mediasw, and extracting the Ethernet address from 685 * the rombuf. 686 */ 687 switch (sc->sc_chip) { 688 case TULIP_CHIP_21040: 689 /* 690 * Parse the Ethernet Address ROM. 691 */ 692 if (tlp_parse_old_srom(sc, enaddr) == 0) 693 goto cant_cope; 694 695 696 /* 697 * All 21040 boards start out with the same 698 * media switch. 699 */ 700 sc->sc_mediasw = &tlp_21040_mediasw; 701 702 /* 703 * Deal with any quirks this board might have. 704 */ 705 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21040_quirks); 706 break; 707 708 case TULIP_CHIP_21041: 709 /* Check for new format SROM. */ 710 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 711 /* 712 * Not an ISV SROM; try the old DEC Ethernet Address 713 * ROM format. 714 */ 715 if (tlp_parse_old_srom(sc, enaddr) == 0) 716 goto cant_cope; 717 } 718 719 /* 720 * All 21041 boards use the same media switch; they all 721 * work basically the same! Yippee! 722 */ 723 sc->sc_mediasw = &tlp_21041_mediasw; 724 725 /* 726 * Deal with any quirks this board might have. 727 */ 728 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21041_quirks); 729 break; 730 731 case TULIP_CHIP_21140: 732 case TULIP_CHIP_21140A: 733 /* Check for new format SROM. */ 734 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 735 /* 736 * Not an ISV SROM; try the old DEC Ethernet Address 737 * ROM format. 738 */ 739 if (tlp_parse_old_srom(sc, enaddr) == 0) 740 goto cant_cope; 741 } else { 742 /* 743 * We start out with the 2114x ISV media switch. 744 * When we search for quirks, we may change to 745 * a different switch. 746 */ 747 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 748 } 749 750 /* 751 * Deal with any quirks this board might have. 752 */ 753 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21140_quirks); 754 755 /* 756 * Bail out now if we can't deal with this board. 757 */ 758 if (sc->sc_mediasw == NULL) 759 goto cant_cope; 760 break; 761 762 case TULIP_CHIP_21142: 763 case TULIP_CHIP_21143: 764 /* Check for new format SROM. */ 765 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 766 /* 767 * Not an ISV SROM; try the old DEC Ethernet Address 768 * ROM format. 769 */ 770 if (tlp_parse_old_srom(sc, enaddr) == 0) { 771 /* 772 * One last try: just copy the address 773 * from offset 20 and try to look 774 * up quirks. 775 */ 776 memcpy(enaddr, &sc->sc_srom[20], 777 ETHER_ADDR_LEN); 778 } 779 } else { 780 /* 781 * We start out with the 2114x ISV media switch. 782 * When we search for quirks, we may change to 783 * a different switch. 784 */ 785 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 786 } 787 788 /* 789 * Deal with any quirks this board might have. 790 */ 791 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21142_quirks); 792 793 /* 794 * Bail out now if we can't deal with this board. 795 */ 796 if (sc->sc_mediasw == NULL) 797 goto cant_cope; 798 break; 799 800 case TULIP_CHIP_82C168: 801 case TULIP_CHIP_82C169: 802 /* 803 * Lite-On PNIC's Ethernet address is the first 6 804 * bytes of its EEPROM. 805 */ 806 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 807 808 /* 809 * Lite-On PNICs always use the same mediasw; we 810 * select MII vs. internal NWAY automatically. 811 */ 812 sc->sc_mediasw = &tlp_pnic_mediasw; 813 break; 814 815 case TULIP_CHIP_MX98713: 816 /* 817 * The Macronix MX98713 has an MII and GPIO, but no 818 * internal Nway block. This chip is basically a 819 * perfect 21140A clone, with the exception of the 820 * a magic register frobbing in order to make the 821 * interface function. 822 */ 823 if (tlp_isv_srom_enaddr(sc, enaddr)) { 824 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 825 break; 826 } 827 /* FALLTHROUGH */ 828 829 case TULIP_CHIP_82C115: 830 /* 831 * Yippee! The Lite-On 82C115 is a clone of 832 * the MX98725 (the data sheet even says `MXIC' 833 * on it)! Imagine that, a clone of a clone. 834 * 835 * The differences are really minimal: 836 * 837 * - Wake-On-LAN support 838 * - 128-bit multicast hash table, rather than 839 * the standard 512-bit hash table 840 */ 841 /* FALLTHROUGH */ 842 843 case TULIP_CHIP_MX98713A: 844 case TULIP_CHIP_MX98715A: 845 case TULIP_CHIP_MX98715AEC_X: 846 case TULIP_CHIP_MX98725: 847 /* 848 * The MX98713A has an MII as well as an internal Nway block, 849 * but no GPIO. The MX98715 and MX98725 have an internal 850 * Nway block only. 851 * 852 * The internal Nway block, unlike the Lite-On PNIC's, does 853 * just that - performs Nway. Once autonegotiation completes, 854 * we must program the GPR media information into the chip. 855 * 856 * The byte offset of the Ethernet address is stored at 857 * offset 0x70. 858 */ 859 memcpy(enaddr, &sc->sc_srom[sc->sc_srom[0x70]], ETHER_ADDR_LEN); 860 sc->sc_mediasw = &tlp_pmac_mediasw; 861 break; 862 863 case TULIP_CHIP_WB89C840F: 864 /* 865 * Winbond 89C840F's Ethernet address is the first 866 * 6 bytes of its EEPROM. 867 */ 868 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 869 870 /* 871 * Winbond 89C840F has an MII attached to the SIO. 872 */ 873 sc->sc_mediasw = &tlp_sio_mii_mediasw; 874 break; 875 876 case TULIP_CHIP_AL981: 877 /* 878 * The ADMtek AL981's Ethernet address is located 879 * at offset 8 of its EEPROM. 880 */ 881 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 882 883 /* 884 * ADMtek AL981 has a built-in PHY accessed through 885 * special registers. 886 */ 887 sc->sc_mediasw = &tlp_al981_mediasw; 888 break; 889 890 case TULIP_CHIP_AN983: 891 case TULIP_CHIP_AN985: 892 /* 893 * The ADMtek AN985's Ethernet address is located 894 * at offset 8 of its EEPROM. 895 */ 896 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 897 898 /* 899 * The ADMtek AN985 can be configured in Single-Chip 900 * mode or MAC-only mode. Single-Chip uses the built-in 901 * PHY, MAC-only has an external PHY (usually HomePNA). 902 * The selection is based on an EEPROM setting, and both 903 * PHYs are accessed via MII attached to SIO. 904 * 905 * The AN985 "ghosts" the internal PHY onto all 906 * MII addresses, so we have to use a media init 907 * routine that limits the search. 908 * XXX How does this work with MAC-only mode? 909 */ 910 sc->sc_mediasw = &tlp_an985_mediasw; 911 break; 912 913 case TULIP_CHIP_DM9102: 914 case TULIP_CHIP_DM9102A: 915 /* 916 * Some boards with the Davicom chip have an ISV 917 * SROM (mostly DM9102A boards -- trying to describe 918 * the HomePNA PHY, probably) although the data in 919 * them is generally wrong. Check for ISV format 920 * and grab the Ethernet address that way, and if 921 * that fails, fall back on grabbing it from an 922 * observed offset of 20 (which is where it would 923 * be in an ISV SROM anyhow, tho ISV can cope with 924 * multi-port boards). 925 */ 926 if (!tlp_isv_srom_enaddr(sc, enaddr)) { 927 #ifdef __sparc__ 928 if ((sc->sc_srom[20] == 0 && 929 sc->sc_srom[21] == 0 && 930 sc->sc_srom[22] == 0) || 931 (sc->sc_srom[20] == 0xff && 932 sc->sc_srom[21] == 0xff && 933 sc->sc_srom[22] == 0xff)) { 934 prom_getether(PCITAG_NODE(pa->pa_tag), enaddr); 935 } else 936 #endif 937 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN); 938 } 939 940 /* 941 * Davicom chips all have an internal MII interface 942 * and a built-in PHY. DM9102A also has a an external 943 * MII interface, usually with a HomePNA PHY attached 944 * to it. 945 */ 946 sc->sc_mediasw = &tlp_dm9102_mediasw; 947 break; 948 949 case TULIP_CHIP_AX88140: 950 case TULIP_CHIP_AX88141: 951 /* 952 * ASIX AX88140/AX88141 Ethernet Address is located at offset 953 * 20 of the SROM. 954 */ 955 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN); 956 957 /* 958 * ASIX AX88140A/AX88141 chip can have a built-in PHY or 959 * an external MII interface. 960 */ 961 sc->sc_mediasw = &tlp_asix_mediasw; 962 break; 963 964 case TULIP_CHIP_RS7112: 965 /* 966 * RS7112 Ethernet Address is located of offset 0x19a 967 * of the SROM 968 */ 969 memcpy(enaddr, &sc->sc_srom[0x19a], ETHER_ADDR_LEN); 970 971 /* RS7112 chip has a PHY at MII address 1 */ 972 sc->sc_mediasw = &tlp_rs7112_mediasw; 973 break; 974 975 default: 976 cant_cope: 977 printf("%s: sorry, unable to handle your board\n", 978 sc->sc_dev.dv_xname); 979 return; 980 } 981 982 /* 983 * Handle shared interrupts. 984 */ 985 if (psc->sc_flags & TULIP_PCI_SHAREDINTR) { 986 if (psc->sc_master) 987 psc->sc_flags |= TULIP_PCI_SLAVEINTR; 988 else { 989 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDINTR, 990 TULIP_PCI_SLAVEINTR); 991 if (psc->sc_master == NULL) 992 psc->sc_master = psc; 993 } 994 LIST_INSERT_HEAD(&psc->sc_master->sc_intrslaves, 995 psc, sc_intrq); 996 } 997 998 if (psc->sc_flags & TULIP_PCI_SLAVEINTR) { 999 printf("%s: sharing interrupt with %s\n", 1000 sc->sc_dev.dv_xname, 1001 psc->sc_master->sc_tulip.sc_dev.dv_xname); 1002 } else { 1003 /* 1004 * Map and establish our interrupt. 1005 */ 1006 if (pci_intr_map(pa, &ih)) { 1007 printf("%s: unable to map interrupt\n", 1008 sc->sc_dev.dv_xname); 1009 return; 1010 } 1011 intrstr = pci_intr_string(pc, ih); 1012 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, 1013 (psc->sc_flags & TULIP_PCI_SHAREDINTR) ? 1014 tlp_pci_shared_intr : tlp_intr, sc); 1015 if (psc->sc_ih == NULL) { 1016 printf("%s: unable to establish interrupt", 1017 sc->sc_dev.dv_xname); 1018 if (intrstr != NULL) 1019 printf(" at %s", intrstr); 1020 printf("\n"); 1021 return; 1022 } 1023 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, 1024 intrstr); 1025 } 1026 1027 /* 1028 * Finish off the attach. 1029 */ 1030 tlp_attach(sc, enaddr); 1031 } 1032 1033 static int 1034 tlp_pci_shared_intr(void *arg) 1035 { 1036 struct tulip_pci_softc *master = arg, *slave; 1037 int rv = 0; 1038 1039 for (slave = LIST_FIRST(&master->sc_intrslaves); 1040 slave != NULL; 1041 slave = LIST_NEXT(slave, sc_intrq)) 1042 rv |= tlp_intr(&slave->sc_tulip); 1043 1044 return rv; 1045 } 1046 1047 static void 1048 tlp_pci_dec_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1049 { 1050 struct tulip_softc *sc = &psc->sc_tulip; 1051 1052 /* 1053 * This isn't really a quirk-gathering device, really. We 1054 * just want to get the spiffy DEC board name from the SROM. 1055 */ 1056 strcpy(sc->sc_name, "DEC "); 1057 1058 if (memcmp(&sc->sc_srom[29], "DE500", 5) == 0 || 1059 memcmp(&sc->sc_srom[29], "DE450", 5) == 0) 1060 memcpy(&sc->sc_name[4], &sc->sc_srom[29], 8); 1061 else 1062 sc->sc_name[3] = '\0'; 1063 } 1064 1065 static void 1066 tlp_pci_znyx_21040_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1067 { 1068 struct tulip_softc *sc = &psc->sc_tulip; 1069 uint16_t id = 0; 1070 1071 /* 1072 * If we have a slaved ROM, just copy the bits from the master. 1073 * This is in case we fail the ROM ID check (older boards) and 1074 * need to fall back on Ethernet address model checking; that 1075 * will fail for slave chips. 1076 */ 1077 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 1078 strcpy(sc->sc_name, psc->sc_master->sc_tulip.sc_name); 1079 sc->sc_mediasw = psc->sc_master->sc_tulip.sc_mediasw; 1080 psc->sc_flags |= 1081 psc->sc_master->sc_flags & TULIP_PCI_SHAREDINTR; 1082 return; 1083 } 1084 1085 if (sc->sc_srom[32] == 0x4a && sc->sc_srom[33] == 0x52) { 1086 id = sc->sc_srom[37] | (sc->sc_srom[36] << 8); 1087 switch (id) { 1088 zx312: 1089 case 0x0602: /* ZX312 */ 1090 strcpy(sc->sc_name, "ZNYX ZX312"); 1091 return; 1092 1093 case 0x0622: /* ZX312T */ 1094 strcpy(sc->sc_name, "ZNYX ZX312T"); 1095 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1096 return; 1097 1098 zx314_inta: 1099 case 0x0701: /* ZX314 INTA */ 1100 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1101 /* FALLTHROUGH */ 1102 case 0x0711: /* ZX314 */ 1103 strcpy(sc->sc_name, "ZNYX ZX314"); 1104 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1105 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1106 return; 1107 1108 zx315_inta: 1109 case 0x0801: /* ZX315 INTA */ 1110 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1111 /* FALLTHROUGH */ 1112 case 0x0811: /* ZX315 */ 1113 strcpy(sc->sc_name, "ZNYX ZX315"); 1114 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1115 return; 1116 1117 default: 1118 id = 0; 1119 break; 1120 } 1121 } 1122 1123 /* 1124 * Deal with boards that have broken ROMs. 1125 */ 1126 if (id == 0) { 1127 if ((enaddr[3] & ~3) == 0xf0 && (enaddr[5] & 3) == 0x00) 1128 goto zx314_inta; 1129 if ((enaddr[3] & ~3) == 0xf4 && (enaddr[5] & 1) == 0x00) 1130 goto zx315_inta; 1131 if ((enaddr[3] & ~3) == 0xec) 1132 goto zx312; 1133 } 1134 1135 strcpy(sc->sc_name, "ZNYX ZX31x"); 1136 } 1137 1138 static void tlp_pci_znyx_21142_qs6611_reset(struct tulip_softc *); 1139 1140 static void 1141 tlp_pci_znyx_21142_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1142 { 1143 struct tulip_softc *sc = &psc->sc_tulip; 1144 pcireg_t subid; 1145 1146 subid = pci_conf_read(psc->sc_pc, psc->sc_pcitag, PCI_SUBSYS_ID_REG); 1147 1148 if (PCI_VENDOR(subid) != PCI_VENDOR_ZNYX) 1149 return; /* ? */ 1150 1151 switch (PCI_PRODUCT(subid) & 0xff) { 1152 /* 1153 * ZNYX 21143 boards with QS6611 PHY 1154 */ 1155 case 0x12: /* ZX345Q */ 1156 case 0x13: /* ZX346Q */ 1157 case 0x14: /* ZX348Q */ 1158 case 0x18: /* ZX414 */ 1159 case 0x19: /* ZX412 */ 1160 case 0x1a: /* ZX444 */ 1161 case 0x1b: /* ZX442 */ 1162 case 0x23: /* ZX212 */ 1163 case 0x24: /* ZX214 */ 1164 case 0x29: /* ZX374 */ 1165 case 0x2d: /* ZX372 */ 1166 case 0x2b: /* ZX244 */ 1167 case 0x2c: /* ZX424 */ 1168 case 0x2e: /* ZX422 */ 1169 printf("%s: QS6611 PHY\n", sc->sc_dev.dv_xname); 1170 sc->sc_reset = tlp_pci_znyx_21142_qs6611_reset; 1171 break; 1172 } 1173 } 1174 1175 static void 1176 tlp_pci_znyx_21142_qs6611_reset(struct tulip_softc *sc) 1177 { 1178 1179 /* 1180 * Reset QS6611 PHY. 1181 */ 1182 TULIP_WRITE(sc, CSR_SIAGEN, 1183 SIAGEN_CWE | SIAGEN_LGS1 | SIAGEN_ABM | (0xf << 16)); 1184 delay(200); 1185 TULIP_WRITE(sc, CSR_SIAGEN, (0x4 << 16)); 1186 delay(10000); 1187 } 1188 1189 static void 1190 tlp_pci_smc_21040_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1191 { 1192 struct tulip_softc *sc = &psc->sc_tulip; 1193 uint16_t id1, id2, ei; 1194 int auibnc = 0, utp = 0; 1195 char *cp; 1196 1197 id1 = sc->sc_srom[0x60] | (sc->sc_srom[0x61] << 8); 1198 id2 = sc->sc_srom[0x62] | (sc->sc_srom[0x63] << 8); 1199 ei = sc->sc_srom[0x66] | (sc->sc_srom[0x67] << 8); 1200 1201 strcpy(sc->sc_name, "SMC 8432"); 1202 cp = &sc->sc_name[8]; 1203 1204 if ((id1 & 1) == 0) { 1205 *cp++ = 'B'; 1206 auibnc = 1; 1207 } 1208 if ((id1 & 0xff) > 0x32) { 1209 *cp++ = 'T'; 1210 utp = 1; 1211 } 1212 if ((id1 & 0x4000) == 0) { 1213 *cp++ = 'A'; 1214 auibnc = 1; 1215 } 1216 if (id2 == 0x15) { 1217 sc->sc_name[7] = '4'; 1218 *cp++ = '-'; 1219 *cp++ = 'C'; 1220 *cp++ = 'H'; 1221 *cp++ = ei ? '2' : '1'; 1222 } 1223 *cp = '\0'; 1224 1225 if (utp != 0 && auibnc == 0) 1226 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1227 else if (utp == 0 && auibnc != 0) 1228 sc->sc_mediasw = &tlp_21040_auibnc_mediasw; 1229 } 1230 1231 static void 1232 tlp_pci_cogent_21040_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1233 { 1234 1235 strcpy(psc->sc_tulip.sc_name, "Cogent multi-port"); 1236 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1237 } 1238 1239 static void 1240 tlp_pci_accton_21040_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1241 { 1242 1243 strcpy(psc->sc_tulip.sc_name, "ACCTON EN1203"); 1244 } 1245 1246 static void tlp_pci_asante_21140_reset(struct tulip_softc *); 1247 1248 static void 1249 tlp_pci_asante_21140_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1250 { 1251 struct tulip_softc *sc = &psc->sc_tulip; 1252 1253 /* 1254 * Some Asante boards don't use the ISV SROM format. For 1255 * those that don't, we initialize the GPIO direction bits, 1256 * and provide our own reset hook, which resets the MII. 1257 * 1258 * All of these boards use SIO-attached-MII media. 1259 */ 1260 if (sc->sc_mediasw == &tlp_2114x_isv_mediasw) 1261 return; 1262 1263 strcpy(sc->sc_name, "Asante"); 1264 1265 sc->sc_gp_dir = 0xbf; 1266 sc->sc_reset = tlp_pci_asante_21140_reset; 1267 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1268 } 1269 1270 static void 1271 tlp_pci_e100_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1272 { 1273 struct tulip_softc *sc = &psc->sc_tulip; 1274 1275 if (sc->sc_mediasw == &tlp_2114x_isv_mediasw) 1276 return; 1277 1278 strcpy(sc->sc_name, "UMAX E100"); 1279 1280 sc->sc_gp_dir = 0xbf; 1281 sc->sc_reset = tlp_pci_asante_21140_reset; 1282 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1283 } 1284 1285 static void 1286 tlp_pci_asante_21140_reset(struct tulip_softc *sc) 1287 { 1288 1289 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1290 TULIP_WRITE(sc, CSR_GPP, 0x8); 1291 delay(100); 1292 TULIP_WRITE(sc, CSR_GPP, 0); 1293 } 1294 1295 static void tlp_pci_phobos_21140_reset(struct tulip_softc *); 1296 1297 static void 1298 tlp_pci_phobos_21140_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1299 { 1300 struct tulip_softc *sc = &psc->sc_tulip; 1301 1302 /* 1303 * Phobo boards just use MII-on_SIO. 1304 */ 1305 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1306 sc->sc_reset = tlp_pci_phobos_21140_reset; 1307 1308 /* 1309 * These boards appear solely on sgimips machines behind a special 1310 * GIO<->PCI ASIC and require the DBO and BLE bits to be set in CSR0. 1311 */ 1312 sc->sc_flags |= (TULIPF_BLE | TULIPF_DBO); 1313 } 1314 1315 static void 1316 tlp_pci_phobos_21140_reset(struct tulip_softc *sc) 1317 { 1318 1319 TULIP_WRITE(sc, CSR_GPP, 0x1fd); 1320 delay(10); 1321 TULIP_WRITE(sc, CSR_GPP, 0xfd); 1322 delay(10); 1323 TULIP_WRITE(sc, CSR_GPP, 0); 1324 } 1325 1326 /* 1327 * SMC 9332DST media switch. 1328 */ 1329 static void tlp_smc9332dst_tmsw_init(struct tulip_softc *); 1330 1331 static const struct tulip_mediasw tlp_smc9332dst_mediasw = { 1332 tlp_smc9332dst_tmsw_init, 1333 tlp_21140_gpio_get, 1334 tlp_21140_gpio_set 1335 }; 1336 1337 static void 1338 tlp_pci_smc_21140_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1339 { 1340 struct tulip_softc *sc = &psc->sc_tulip; 1341 1342 if (sc->sc_mediasw != NULL) { 1343 return; 1344 } 1345 strcpy(psc->sc_tulip.sc_name, "SMC 9332DST"); 1346 sc->sc_mediasw = &tlp_smc9332dst_mediasw; 1347 } 1348 1349 static void 1350 tlp_smc9332dst_tmsw_init(struct tulip_softc *sc) 1351 { 1352 struct tulip_21x4x_media *tm; 1353 const char *sep = ""; 1354 uint32_t reg; 1355 int i, cnt; 1356 1357 sc->sc_gp_dir = GPP_SMC9332DST_PINS; 1358 sc->sc_opmode = OPMODE_MBO | OPMODE_PS; 1359 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 1360 1361 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 1362 tlp_mediastatus); 1363 printf("%s: ", sc->sc_dev.dv_xname); 1364 1365 #define ADD(m, c) \ 1366 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK|M_ZERO); \ 1367 tm->tm_opmode = (c); \ 1368 tm->tm_gpdata = GPP_SMC9332DST_INIT; \ 1369 ifmedia_add(&sc->sc_mii.mii_media, (m), 0, tm) 1370 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 1371 1372 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0), OPMODE_TTM); 1373 PRINT("10baseT"); 1374 1375 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, 0), 1376 OPMODE_TTM | OPMODE_FD); 1377 PRINT("10baseT-FDX"); 1378 1379 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 1380 OPMODE_PS | OPMODE_PCS | OPMODE_SCR); 1381 PRINT("100baseTX"); 1382 1383 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, 0), 1384 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD); 1385 PRINT("100baseTX-FDX"); 1386 1387 #undef ADD 1388 #undef PRINT 1389 1390 printf("\n"); 1391 1392 tlp_reset(sc); 1393 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode | OPMODE_PCS | OPMODE_SCR); 1394 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1395 delay(10); 1396 TULIP_WRITE(sc, CSR_GPP, GPP_SMC9332DST_INIT); 1397 delay(200000); 1398 cnt = 0; 1399 for (i = 1000; i > 0; i--) { 1400 reg = TULIP_READ(sc, CSR_GPP); 1401 if ((~reg & (GPP_SMC9332DST_OK10 | 1402 GPP_SMC9332DST_OK100)) == 0) { 1403 if (cnt++ > 100) { 1404 break; 1405 } 1406 } else if ((reg & GPP_SMC9332DST_OK10) == 0) { 1407 break; 1408 } else { 1409 cnt = 0; 1410 } 1411 delay(1000); 1412 } 1413 if (cnt > 100) { 1414 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX); 1415 } else { 1416 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 1417 } 1418 } 1419 1420 static void 1421 tlp_pci_vpc_21140_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1422 { 1423 struct tulip_softc *sc = &psc->sc_tulip; 1424 char *p1 = (char *) &sc->sc_srom[32]; 1425 char *p2 = &sc->sc_name[0]; 1426 1427 do { 1428 if ((unsigned char) *p1 & 0x80) 1429 *p2++ = ' '; 1430 else 1431 *p2++ = *p1; 1432 } while (*p1++); 1433 } 1434 1435 static void tlp_pci_cobalt_21142_reset(struct tulip_softc *); 1436 1437 static void 1438 tlp_pci_cobalt_21142_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1439 { 1440 struct tulip_softc *sc = &psc->sc_tulip; 1441 1442 /* 1443 * Cobalt Networks interfaces are just MII-on-SIO. 1444 */ 1445 sc->sc_reset = tlp_pci_cobalt_21142_reset; 1446 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1447 1448 /* 1449 * The Cobalt systems tend to fall back to store-and-forward 1450 * pretty quickly, so we select that from the beginning to 1451 * avoid initial timeouts. 1452 */ 1453 sc->sc_txthresh = TXTH_SF; 1454 } 1455 1456 static void 1457 tlp_pci_cobalt_21142_reset(struct tulip_softc *sc) 1458 { 1459 1460 /* 1461 * Reset PHY. 1462 */ 1463 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE | (1 << 16)); 1464 delay(10); 1465 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE); 1466 delay(10); 1467 } 1468 1469 static void 1470 tlp_pci_algor_21142_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1471 { 1472 struct tulip_softc *sc = &psc->sc_tulip; 1473 1474 /* 1475 * Algorithmics boards just have MII-on-SIO. 1476 * 1477 * XXX They also have AUI on the serial interface. 1478 * XXX Deal with this. 1479 */ 1480 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1481 } 1482 1483 /* 1484 * Cogent EM1x0 (aka. Adaptec ANA-6910) media switch. 1485 */ 1486 static void tlp_cogent_em1x0_tmsw_init(struct tulip_softc *); 1487 1488 static const struct tulip_mediasw tlp_cogent_em1x0_mediasw = { 1489 tlp_cogent_em1x0_tmsw_init, 1490 tlp_21140_gpio_get, 1491 tlp_21140_gpio_set 1492 }; 1493 1494 static void 1495 tlp_pci_adaptec_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1496 { 1497 struct tulip_softc *sc = &psc->sc_tulip; 1498 uint8_t *srom = sc->sc_srom, id0; 1499 uint16_t id1, id2; 1500 1501 if (sc->sc_mediasw == NULL) { 1502 id0 = srom[32]; 1503 switch (id0) { 1504 case 0x12: 1505 strcpy(psc->sc_tulip.sc_name, "Cogent EM100TX"); 1506 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1507 break; 1508 1509 case 0x15: 1510 strcpy(psc->sc_tulip.sc_name, "Cogent EM100FX"); 1511 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1512 break; 1513 1514 #if 0 1515 case XXX: 1516 strcpy(psc->sc_tulip.sc_name, "Cogent EM110TX"); 1517 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1518 break; 1519 #endif 1520 1521 default: 1522 printf("%s: unknown Cogent board ID 0x%02x\n", 1523 sc->sc_dev.dv_xname, id0); 1524 } 1525 return; 1526 } 1527 1528 id1 = TULIP_ROM_GETW(srom, 0); 1529 id2 = TULIP_ROM_GETW(srom, 2); 1530 if (id1 != 0x1109) { 1531 goto unknown; 1532 } 1533 1534 switch (id2) { 1535 case 0x1900: 1536 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911"); 1537 break; 1538 1539 case 0x2400: 1540 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6944A"); 1541 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1542 break; 1543 1544 case 0x2b00: 1545 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911A"); 1546 break; 1547 1548 case 0x3000: 1549 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6922"); 1550 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1551 break; 1552 1553 default: 1554 unknown: 1555 printf("%s: unknown Adaptec/Cogent board ID 0x%04x/0x%04x\n", 1556 sc->sc_dev.dv_xname, id1, id2); 1557 } 1558 } 1559 1560 static void 1561 tlp_cogent_em1x0_tmsw_init(struct tulip_softc *sc) 1562 { 1563 struct tulip_21x4x_media *tm; 1564 const char *sep = ""; 1565 1566 sc->sc_gp_dir = GPP_COGENT_EM1x0_PINS; 1567 sc->sc_opmode = OPMODE_MBO | OPMODE_PS; 1568 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 1569 1570 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 1571 tlp_mediastatus); 1572 printf("%s: ", sc->sc_dev.dv_xname); 1573 1574 #define ADD(m, c) \ 1575 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK|M_ZERO); \ 1576 tm->tm_opmode = (c); \ 1577 tm->tm_gpdata = GPP_COGENT_EM1x0_INIT; \ 1578 ifmedia_add(&sc->sc_mii.mii_media, (m), 0, tm) 1579 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 1580 1581 if (sc->sc_srom[32] == 0x15) { 1582 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, 0, 0), 1583 OPMODE_PS | OPMODE_PCS); 1584 PRINT("100baseFX"); 1585 1586 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0), 1587 OPMODE_PS | OPMODE_PCS | OPMODE_FD); 1588 PRINT("100baseFX-FDX"); 1589 printf("\n"); 1590 1591 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_FX); 1592 } else { 1593 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 1594 OPMODE_PS | OPMODE_PCS | OPMODE_SCR); 1595 PRINT("100baseTX"); 1596 1597 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0), 1598 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD); 1599 PRINT("100baseTX-FDX"); 1600 printf("\n"); 1601 1602 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX); 1603 } 1604 1605 #undef ADD 1606 #undef PRINT 1607 } 1608 1609 static void tlp_pci_netwinder_21142_reset(struct tulip_softc *); 1610 1611 static void 1612 tlp_pci_netwinder_21142_quirks(struct tulip_pci_softc *psc, 1613 const uint8_t *enaddr) 1614 { 1615 struct tulip_softc *sc = &psc->sc_tulip; 1616 1617 /* 1618 * Netwinders just use MII-on_SIO. 1619 */ 1620 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1621 sc->sc_reset = tlp_pci_netwinder_21142_reset; 1622 } 1623 1624 void 1625 tlp_pci_netwinder_21142_reset(struct tulip_softc *sc) 1626 { 1627 1628 /* 1629 * Reset the PHY. 1630 */ 1631 TULIP_WRITE(sc, CSR_SIAGEN, 0x0821 << 16); 1632 delay(10); 1633 TULIP_WRITE(sc, CSR_SIAGEN, 0x0000 << 16); 1634 delay(10); 1635 TULIP_WRITE(sc, CSR_SIAGEN, 0x0001 << 16); 1636 delay(10); 1637 } 1638 1639 static void tlp_pci_phobos_21142_reset(struct tulip_softc *); 1640 1641 static void 1642 tlp_pci_phobos_21142_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1643 { 1644 struct tulip_softc *sc = &psc->sc_tulip; 1645 1646 /* 1647 * Phobo boards just use MII-on_SIO. 1648 */ 1649 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1650 sc->sc_reset = tlp_pci_phobos_21142_reset; 1651 1652 /* 1653 * These boards appear solely on sgimips machines behind a special 1654 * GIO<->PCI ASIC and require the DBO and BLE bits to be set in CSR0. 1655 */ 1656 sc->sc_flags |= (TULIPF_BLE | TULIPF_DBO); 1657 } 1658 1659 static void 1660 tlp_pci_phobos_21142_reset(struct tulip_softc *sc) 1661 { 1662 /* 1663 * Reset PHY. 1664 */ 1665 TULIP_WRITE(sc, CSR_SIAGEN, (0x880f << 16)); 1666 delay(10); 1667 TULIP_WRITE(sc, CSR_SIAGEN, (0x800f << 16)); 1668 delay(10); 1669 } 1670
Indexes created Sun Sep 21 20:09:37 GMT 2025