if_tlp_pci.c revision 1.104
1 /* $NetBSD: if_tlp_pci.c,v 1.104 2008/04/10 19:13:37 cegger Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center; and Charles M. Hannum. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * PCI bus front-end for the Digital Semiconductor ``Tulip'' (21x4x) 42 * Ethernet controller family driver. 43 */ 44 45 #include <sys/cdefs.h> 46 __KERNEL_RCSID(0, "$NetBSD: if_tlp_pci.c,v 1.104 2008/04/10 19:13:37 cegger Exp $"); 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/mbuf.h> 51 #include <sys/malloc.h> 52 #include <sys/kernel.h> 53 #include <sys/socket.h> 54 #include <sys/ioctl.h> 55 #include <sys/errno.h> 56 #include <sys/device.h> 57 58 #include <machine/endian.h> 59 60 #include <net/if.h> 61 #include <net/if_dl.h> 62 #include <net/if_media.h> 63 #include <net/if_ether.h> 64 65 #include <sys/bus.h> 66 #include <sys/intr.h> 67 #ifdef __sparc__ 68 #include <machine/promlib.h> 69 #endif 70 71 #include <dev/mii/miivar.h> 72 #include <dev/mii/mii_bitbang.h> 73 74 #include <dev/ic/tulipreg.h> 75 #include <dev/ic/tulipvar.h> 76 77 #include <dev/pci/pcivar.h> 78 #include <dev/pci/pcireg.h> 79 #include <dev/pci/pcidevs.h> 80 81 /* 82 * PCI configuration space registers used by the Tulip. 83 */ 84 #define TULIP_PCI_IOBA 0x10 /* i/o mapped base */ 85 #define TULIP_PCI_MMBA 0x14 /* memory mapped base */ 86 #define TULIP_PCI_CFDA 0x40 /* configuration driver area */ 87 88 #define CFDA_SLEEP 0x80000000 /* sleep mode */ 89 #define CFDA_SNOOZE 0x40000000 /* snooze mode */ 90 91 struct tulip_pci_softc { 92 struct tulip_softc sc_tulip; /* real Tulip softc */ 93 94 /* PCI-specific goo. */ 95 void *sc_ih; /* interrupt handle */ 96 97 pci_chipset_tag_t sc_pc; /* our PCI chipset */ 98 pcitag_t sc_pcitag; /* our PCI tag */ 99 100 int sc_flags; /* flags; see below */ 101 102 LIST_HEAD(, tulip_pci_softc) sc_intrslaves; 103 LIST_ENTRY(tulip_pci_softc) sc_intrq; 104 105 /* Our {ROM,interrupt} master. */ 106 struct tulip_pci_softc *sc_master; 107 }; 108 109 /* sc_flags */ 110 #define TULIP_PCI_SHAREDINTR 0x01 /* interrupt is shared */ 111 #define TULIP_PCI_SLAVEINTR 0x02 /* interrupt is slave */ 112 #define TULIP_PCI_SHAREDROM 0x04 /* ROM is shared */ 113 #define TULIP_PCI_SLAVEROM 0x08 /* slave of shared ROM */ 114 115 static int tlp_pci_match(device_t, struct cfdata *, void *); 116 static void tlp_pci_attach(device_t, device_t, void *); 117 118 CFATTACH_DECL(tlp_pci, sizeof(struct tulip_pci_softc), 119 tlp_pci_match, tlp_pci_attach, NULL, NULL); 120 121 static const struct tulip_pci_product { 122 uint32_t tpp_vendor; /* PCI vendor ID */ 123 uint32_t tpp_product; /* PCI product ID */ 124 tulip_chip_t tpp_chip; /* base Tulip chip type */ 125 } tlp_pci_products[] = { 126 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21040, 127 TULIP_CHIP_21040 }, 128 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21041, 129 TULIP_CHIP_21041 }, 130 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21140, 131 TULIP_CHIP_21140 }, 132 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142, 133 TULIP_CHIP_21142 }, 134 135 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C168, 136 TULIP_CHIP_82C168 }, 137 138 /* 139 * Note: This is like a MX98725 with Wake-On-LAN and a 140 * 128-bit multicast hash table. 141 */ 142 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C115, 143 TULIP_CHIP_82C115 }, 144 145 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98713, 146 TULIP_CHIP_MX98713 }, 147 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX987x5, 148 TULIP_CHIP_MX98715 }, 149 150 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100TX, 151 TULIP_CHIP_MX98713 }, 152 153 { PCI_VENDOR_WINBOND, PCI_PRODUCT_WINBOND_W89C840F, 154 TULIP_CHIP_WB89C840F }, 155 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100ATX, 156 TULIP_CHIP_WB89C840F }, 157 158 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9102, 159 TULIP_CHIP_DM9102 }, 160 161 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AL981, 162 TULIP_CHIP_AL981 }, 163 164 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN983, 165 TULIP_CHIP_AN985 }, 166 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_ADM9511, 167 TULIP_CHIP_AN985 }, 168 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_ADM9513, 169 TULIP_CHIP_AN985 }, 170 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN2242, 171 TULIP_CHIP_AN985 }, 172 173 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C910SOHOB, 174 TULIP_CHIP_AN985 }, 175 176 { PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX88140A, 177 TULIP_CHIP_AX88140 }, 178 179 { PCI_VENDOR_CONEXANT, PCI_PRODUCT_CONEXANT_LANFINITY, 180 TULIP_CHIP_RS7112 }, 181 182 { 0, 0, 183 TULIP_CHIP_INVALID }, 184 }; 185 186 struct tlp_pci_quirks { 187 void (*tpq_func)(struct tulip_pci_softc *, 188 const uint8_t *); 189 uint8_t tpq_oui[3]; 190 }; 191 192 static void tlp_pci_dec_quirks(struct tulip_pci_softc *, 193 const uint8_t *); 194 195 static void tlp_pci_znyx_21040_quirks(struct tulip_pci_softc *, 196 const uint8_t *); 197 static void tlp_pci_smc_21040_quirks(struct tulip_pci_softc *, 198 const uint8_t *); 199 static void tlp_pci_cogent_21040_quirks(struct tulip_pci_softc *, 200 const uint8_t *); 201 static void tlp_pci_accton_21040_quirks(struct tulip_pci_softc *, 202 const uint8_t *); 203 204 static void tlp_pci_cobalt_21142_quirks(struct tulip_pci_softc *, 205 const uint8_t *); 206 static void tlp_pci_algor_21142_quirks(struct tulip_pci_softc *, 207 const uint8_t *); 208 static void tlp_pci_netwinder_21142_quirks(struct tulip_pci_softc *, 209 const uint8_t *); 210 static void tlp_pci_phobos_21142_quirks(struct tulip_pci_softc *, 211 const uint8_t *); 212 static void tlp_pci_znyx_21142_quirks(struct tulip_pci_softc *, 213 const uint8_t *); 214 215 static void tlp_pci_adaptec_quirks(struct tulip_pci_softc *, 216 const uint8_t *); 217 218 static const struct tlp_pci_quirks tlp_pci_21040_quirks[] = { 219 { tlp_pci_znyx_21040_quirks, { 0x00, 0xc0, 0x95 } }, 220 { tlp_pci_smc_21040_quirks, { 0x00, 0x00, 0xc0 } }, 221 { tlp_pci_cogent_21040_quirks, { 0x00, 0x00, 0x92 } }, 222 { tlp_pci_accton_21040_quirks, { 0x00, 0x00, 0xe8 } }, 223 { NULL, { 0, 0, 0 } } 224 }; 225 226 static const struct tlp_pci_quirks tlp_pci_21041_quirks[] = { 227 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 228 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 229 { NULL, { 0, 0, 0 } } 230 }; 231 232 static void tlp_pci_asante_21140_quirks(struct tulip_pci_softc *, 233 const uint8_t *); 234 static void tlp_pci_e100_quirks(struct tulip_pci_softc *, 235 const uint8_t *); 236 static void tlp_pci_phobos_21140_quirks(struct tulip_pci_softc *, 237 const uint8_t *); 238 static void tlp_pci_smc_21140_quirks(struct tulip_pci_softc *, 239 const uint8_t *); 240 static void tlp_pci_vpc_21140_quirks(struct tulip_pci_softc *, 241 const uint8_t *); 242 243 static const struct tlp_pci_quirks tlp_pci_21140_quirks[] = { 244 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 245 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 246 { tlp_pci_e100_quirks, { 0x00, 0xa0, 0x59 } }, 247 { tlp_pci_asante_21140_quirks, { 0x00, 0x00, 0x94 } }, 248 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0x92 } }, 249 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } }, 250 { tlp_pci_phobos_21140_quirks, { 0x00, 0x60, 0xf5 } }, 251 { tlp_pci_smc_21140_quirks, { 0x00, 0x00, 0xc0 } }, 252 { tlp_pci_vpc_21140_quirks, { 0x00, 0x03, 0xff } }, 253 { NULL, { 0, 0, 0 } } 254 }; 255 256 static const struct tlp_pci_quirks tlp_pci_21142_quirks[] = { 257 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 258 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 259 { tlp_pci_cobalt_21142_quirks, { 0x00, 0x10, 0xe0 } }, 260 { tlp_pci_algor_21142_quirks, { 0x00, 0x40, 0xbc } }, 261 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } }, 262 { tlp_pci_netwinder_21142_quirks,{ 0x00, 0x10, 0x57 } }, 263 { tlp_pci_phobos_21142_quirks, { 0x00, 0x60, 0xf5 } }, 264 { tlp_pci_znyx_21142_quirks, { 0x00, 0xc0, 0x95 } }, 265 { NULL, { 0, 0, 0 } } 266 }; 267 268 static int tlp_pci_shared_intr(void *); 269 270 static const struct tulip_pci_product * 271 tlp_pci_lookup(const struct pci_attach_args *pa) 272 { 273 const struct tulip_pci_product *tpp; 274 275 /* Don't match lmc cards */ 276 if (PCI_VENDOR(pci_conf_read(pa->pa_pc, pa->pa_tag, 277 PCI_SUBSYS_ID_REG)) == PCI_VENDOR_LMC) 278 return NULL; 279 280 for (tpp = tlp_pci_products; 281 tlp_chip_names[tpp->tpp_chip] != NULL; 282 tpp++) { 283 if (PCI_VENDOR(pa->pa_id) == tpp->tpp_vendor && 284 PCI_PRODUCT(pa->pa_id) == tpp->tpp_product) 285 return tpp; 286 } 287 return NULL; 288 } 289 290 static void 291 tlp_pci_get_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr, 292 const struct tlp_pci_quirks *tpq) 293 { 294 295 for (; tpq->tpq_func != NULL; tpq++) { 296 if (tpq->tpq_oui[0] == enaddr[0] && 297 tpq->tpq_oui[1] == enaddr[1] && 298 tpq->tpq_oui[2] == enaddr[2]) { 299 (*tpq->tpq_func)(psc, enaddr); 300 return; 301 } 302 } 303 } 304 305 static void 306 tlp_pci_check_slaved(struct tulip_pci_softc *psc, int shared, int slaved) 307 { 308 extern struct cfdriver tlp_cd; 309 struct tulip_pci_softc *cur, *best = NULL; 310 struct tulip_softc *sc = &psc->sc_tulip; 311 int i; 312 313 /* 314 * First of all, find the lowest pcidev numbered device on our 315 * bus marked as shared. That should be our master. 316 */ 317 for (i = 0; i < tlp_cd.cd_ndevs; i++) { 318 if ((cur = tlp_cd.cd_devs[i]) == NULL) 319 continue; 320 if (device_parent(&cur->sc_tulip.sc_dev) != 321 device_parent(&sc->sc_dev)) 322 continue; 323 if ((cur->sc_flags & shared) == 0) 324 continue; 325 if (cur == psc) 326 continue; 327 if (best == NULL || 328 best->sc_tulip.sc_devno > cur->sc_tulip.sc_devno) 329 best = cur; 330 } 331 332 if (best != NULL) { 333 psc->sc_master = best; 334 psc->sc_flags |= (shared | slaved); 335 } 336 } 337 338 static int 339 tlp_pci_match(device_t parent, struct cfdata *match, void *aux) 340 { 341 struct pci_attach_args *pa = aux; 342 343 if (tlp_pci_lookup(pa) != NULL) 344 return 10; /* beat if_de.c */ 345 346 return 0; 347 } 348 349 static void 350 tlp_pci_attach(device_t parent, device_t self, void *aux) 351 { 352 struct tulip_pci_softc *psc = device_private(self); 353 struct tulip_softc *sc = &psc->sc_tulip; 354 struct pci_attach_args *pa = aux; 355 pci_chipset_tag_t pc = pa->pa_pc; 356 pci_intr_handle_t ih; 357 const char *intrstr = NULL; 358 bus_space_tag_t iot, memt; 359 bus_space_handle_t ioh, memh; 360 int ioh_valid, memh_valid, i, j; 361 const struct tulip_pci_product *tpp; 362 prop_data_t ea; 363 uint8_t enaddr[ETHER_ADDR_LEN]; 364 uint32_t val = 0; 365 pcireg_t reg; 366 int error; 367 368 sc->sc_devno = pa->pa_device; 369 psc->sc_pc = pa->pa_pc; 370 psc->sc_pcitag = pa->pa_tag; 371 372 LIST_INIT(&psc->sc_intrslaves); 373 374 tpp = tlp_pci_lookup(pa); 375 if (tpp == NULL) { 376 printf("\n"); 377 panic("tlp_pci_attach: impossible"); 378 } 379 sc->sc_chip = tpp->tpp_chip; 380 381 /* 382 * By default, Tulip registers are 8 bytes long (4 bytes 383 * followed by a 4 byte pad). 384 */ 385 sc->sc_regshift = 3; 386 387 /* 388 * No power management hooks. 389 * XXX Maybe we should add some! 390 */ 391 sc->sc_flags |= TULIPF_ENABLED; 392 393 /* 394 * Get revision info, and set some chip-specific variables. 395 */ 396 sc->sc_rev = PCI_REVISION(pa->pa_class); 397 switch (sc->sc_chip) { 398 case TULIP_CHIP_21140: 399 if (sc->sc_rev >= 0x20) 400 sc->sc_chip = TULIP_CHIP_21140A; 401 break; 402 403 case TULIP_CHIP_21142: 404 if (sc->sc_rev >= 0x20) 405 sc->sc_chip = TULIP_CHIP_21143; 406 break; 407 408 case TULIP_CHIP_82C168: 409 if (sc->sc_rev >= 0x20) 410 sc->sc_chip = TULIP_CHIP_82C169; 411 break; 412 413 case TULIP_CHIP_MX98713: 414 if (sc->sc_rev >= 0x10) 415 sc->sc_chip = TULIP_CHIP_MX98713A; 416 break; 417 418 case TULIP_CHIP_MX98715: 419 if (sc->sc_rev >= 0x20) 420 sc->sc_chip = TULIP_CHIP_MX98715A; 421 if (sc->sc_rev >= 0x25) 422 sc->sc_chip = TULIP_CHIP_MX98715AEC_X; 423 if (sc->sc_rev >= 0x30) 424 sc->sc_chip = TULIP_CHIP_MX98725; 425 break; 426 427 case TULIP_CHIP_WB89C840F: 428 sc->sc_regshift = 2; 429 break; 430 431 case TULIP_CHIP_AN985: 432 /* 433 * The AN983 and AN985 are very similar, and are 434 * differentiated by a "signature" register that 435 * is like, but not identical, to a PCI ID register. 436 */ 437 reg = pci_conf_read(pc, pa->pa_tag, 0x80); 438 switch (reg) { 439 case 0x09811317: 440 sc->sc_chip = TULIP_CHIP_AN985; 441 break; 442 443 case 0x09851317: 444 sc->sc_chip = TULIP_CHIP_AN983; 445 break; 446 447 default: 448 /* Unknown -- use default. */ 449 break; 450 } 451 break; 452 453 case TULIP_CHIP_AX88140: 454 if (sc->sc_rev >= 0x10) 455 sc->sc_chip = TULIP_CHIP_AX88141; 456 break; 457 458 case TULIP_CHIP_DM9102: 459 if (sc->sc_rev >= 0x30) 460 sc->sc_chip = TULIP_CHIP_DM9102A; 461 break; 462 463 default: 464 /* Nothing. */ 465 break; 466 } 467 468 printf(": %s Ethernet, pass %d.%d\n", 469 tlp_chip_names[sc->sc_chip], 470 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf); 471 472 switch (sc->sc_chip) { 473 case TULIP_CHIP_21040: 474 if (sc->sc_rev < 0x20) { 475 printf("%s: 21040 must be at least pass 2.0\n", 476 device_xname(&sc->sc_dev)); 477 return; 478 } 479 break; 480 481 case TULIP_CHIP_21140: 482 if (sc->sc_rev < 0x11) { 483 printf("%s: 21140 must be at least pass 1.1\n", 484 device_xname(&sc->sc_dev)); 485 return; 486 } 487 break; 488 489 default: 490 /* Nothing. */ 491 break; 492 } 493 494 /* 495 * Check to see if the device is in power-save mode, and 496 * being it out if necessary. 497 */ 498 switch (sc->sc_chip) { 499 case TULIP_CHIP_21140: 500 case TULIP_CHIP_21140A: 501 case TULIP_CHIP_21142: 502 case TULIP_CHIP_21143: 503 case TULIP_CHIP_MX98713A: 504 case TULIP_CHIP_MX98715: 505 case TULIP_CHIP_MX98715A: 506 case TULIP_CHIP_MX98715AEC_X: 507 case TULIP_CHIP_MX98725: 508 case TULIP_CHIP_DM9102: 509 case TULIP_CHIP_DM9102A: 510 case TULIP_CHIP_AX88140: 511 case TULIP_CHIP_AX88141: 512 case TULIP_CHIP_RS7112: 513 /* 514 * Clear the "sleep mode" bit in the CFDA register. 515 */ 516 reg = pci_conf_read(pc, pa->pa_tag, TULIP_PCI_CFDA); 517 if (reg & (CFDA_SLEEP|CFDA_SNOOZE)) 518 pci_conf_write(pc, pa->pa_tag, TULIP_PCI_CFDA, 519 reg & ~(CFDA_SLEEP|CFDA_SNOOZE)); 520 break; 521 522 default: 523 /* Nothing. */ 524 break; 525 } 526 527 /* power up chip */ 528 if ((error = pci_activate(pa->pa_pc, pa->pa_tag, self, 529 NULL)) && error != EOPNOTSUPP) { 530 aprint_error_dev(&sc->sc_dev, "cannot activate %d\n", 531 error); 532 return; 533 } 534 535 /* 536 * Map the device. 537 */ 538 539 ioh_valid = (pci_mapreg_map(pa, TULIP_PCI_IOBA, 540 PCI_MAPREG_TYPE_IO, 0, 541 &iot, &ioh, NULL, NULL) == 0); 542 memh_valid = (pci_mapreg_map(pa, TULIP_PCI_MMBA, 543 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 544 &memt, &memh, NULL, NULL) == 0); 545 if (memh_valid) { 546 sc->sc_st = memt; 547 sc->sc_sh = memh; 548 } else if (ioh_valid) { 549 sc->sc_st = iot; 550 sc->sc_sh = ioh; 551 } else { 552 aprint_error_dev(&sc->sc_dev, "unable to map device registers\n"); 553 return; 554 } 555 556 sc->sc_dmat = pa->pa_dmat; 557 558 /* 559 * Make sure bus mastering is enabled. 560 */ 561 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 562 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 563 PCI_COMMAND_MASTER_ENABLE); 564 565 /* 566 * Get the cacheline size. 567 */ 568 sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag, 569 PCI_BHLC_REG)); 570 571 /* 572 * Get PCI data moving command info. 573 */ 574 if (pa->pa_flags & PCI_FLAGS_MRL_OKAY) 575 sc->sc_flags |= TULIPF_MRL; 576 if (pa->pa_flags & PCI_FLAGS_MRM_OKAY) 577 sc->sc_flags |= TULIPF_MRM; 578 if (pa->pa_flags & PCI_FLAGS_MWI_OKAY) 579 sc->sc_flags |= TULIPF_MWI; 580 581 /* 582 * Read the contents of the Ethernet Address ROM/SROM. 583 */ 584 switch (sc->sc_chip) { 585 case TULIP_CHIP_21040: 586 sc->sc_srom_addrbits = 6; 587 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, M_NOWAIT); 588 TULIP_WRITE(sc, CSR_MIIROM, MIIROM_SROMCS); 589 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 590 for (j = 0; j < 10000; j++) { 591 val = TULIP_READ(sc, CSR_MIIROM); 592 if ((val & MIIROM_DN) == 0) 593 break; 594 } 595 sc->sc_srom[i] = val & MIIROM_DATA; 596 } 597 break; 598 599 case TULIP_CHIP_82C168: 600 case TULIP_CHIP_82C169: 601 { 602 sc->sc_srom_addrbits = 2; 603 sc->sc_srom = malloc(TULIP_ROM_SIZE(2), M_DEVBUF, M_NOWAIT); 604 605 /* 606 * The Lite-On PNIC stores the Ethernet address in 607 * the first 3 words of the EEPROM. EEPROM access 608 * is not like the other Tulip chips. 609 */ 610 for (i = 0; i < 6; i += 2) { 611 TULIP_WRITE(sc, CSR_PNIC_SROMCTL, 612 PNIC_SROMCTL_READ | (i >> 1)); 613 for (j = 0; j < 500; j++) { 614 delay(2); 615 val = TULIP_READ(sc, CSR_MIIROM); 616 if ((val & PNIC_MIIROM_BUSY) == 0) 617 break; 618 } 619 if (val & PNIC_MIIROM_BUSY) { 620 printf("%s: EEPROM timed out\n", 621 device_xname(&sc->sc_dev)); 622 return; 623 } 624 val &= PNIC_MIIROM_DATA; 625 sc->sc_srom[i] = val >> 8; 626 sc->sc_srom[i + 1] = val & 0xff; 627 } 628 break; 629 } 630 631 default: 632 /* 633 * XXX This isn't quite the right way to do this; we should 634 * XXX be attempting to fetch the mac-addr property in the 635 * XXX bus-agnostic part of the driver independently. But 636 * XXX that requires a larger change in the SROM handling 637 * XXX logic, and for now we can at least remove a machine- 638 * XXX dependent wart from the PCI front-end. 639 */ 640 ea = prop_dictionary_get(device_properties(&sc->sc_dev), 641 "mac-addr"); 642 if (ea != NULL) { 643 extern int tlp_srom_debug; 644 KASSERT(prop_object_type(ea) == PROP_TYPE_DATA); 645 KASSERT(prop_data_size(ea) == ETHER_ADDR_LEN); 646 647 memcpy(enaddr, prop_data_data_nocopy(ea), 648 ETHER_ADDR_LEN); 649 650 sc->sc_srom_addrbits = 6; 651 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, 652 M_NOWAIT|M_ZERO); 653 memcpy(sc->sc_srom, enaddr, sizeof(enaddr)); 654 if (tlp_srom_debug) { 655 printf("SROM CONTENTS:"); 656 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 657 if ((i % 8) == 0) 658 printf("\n\t"); 659 printf("0x%02x ", sc->sc_srom[i]); 660 } 661 printf("\n"); 662 } 663 break; 664 } 665 666 /* Check for a slaved ROM on a multi-port board. */ 667 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDROM, 668 TULIP_PCI_SLAVEROM); 669 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 670 sc->sc_srom_addrbits = 671 psc->sc_master->sc_tulip.sc_srom_addrbits; 672 sc->sc_srom = psc->sc_master->sc_tulip.sc_srom; 673 enaddr[5] += 674 sc->sc_devno - psc->sc_master->sc_tulip.sc_devno; 675 } 676 else if (tlp_read_srom(sc) == 0) 677 goto cant_cope; 678 break; 679 } 680 681 /* 682 * Deal with chip/board quirks. This includes setting up 683 * the mediasw, and extracting the Ethernet address from 684 * the rombuf. 685 */ 686 switch (sc->sc_chip) { 687 case TULIP_CHIP_21040: 688 /* 689 * Parse the Ethernet Address ROM. 690 */ 691 if (tlp_parse_old_srom(sc, enaddr) == 0) 692 goto cant_cope; 693 694 695 /* 696 * All 21040 boards start out with the same 697 * media switch. 698 */ 699 sc->sc_mediasw = &tlp_21040_mediasw; 700 701 /* 702 * Deal with any quirks this board might have. 703 */ 704 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21040_quirks); 705 break; 706 707 case TULIP_CHIP_21041: 708 /* Check for new format SROM. */ 709 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 710 /* 711 * Not an ISV SROM; try the old DEC Ethernet Address 712 * ROM format. 713 */ 714 if (tlp_parse_old_srom(sc, enaddr) == 0) 715 goto cant_cope; 716 } 717 718 /* 719 * All 21041 boards use the same media switch; they all 720 * work basically the same! Yippee! 721 */ 722 sc->sc_mediasw = &tlp_21041_mediasw; 723 724 /* 725 * Deal with any quirks this board might have. 726 */ 727 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21041_quirks); 728 break; 729 730 case TULIP_CHIP_21140: 731 case TULIP_CHIP_21140A: 732 /* Check for new format SROM. */ 733 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 734 /* 735 * Not an ISV SROM; try the old DEC Ethernet Address 736 * ROM format. 737 */ 738 if (tlp_parse_old_srom(sc, enaddr) == 0) 739 goto cant_cope; 740 } else { 741 /* 742 * We start out with the 2114x ISV media switch. 743 * When we search for quirks, we may change to 744 * a different switch. 745 */ 746 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 747 } 748 749 /* 750 * Deal with any quirks this board might have. 751 */ 752 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21140_quirks); 753 754 /* 755 * Bail out now if we can't deal with this board. 756 */ 757 if (sc->sc_mediasw == NULL) 758 goto cant_cope; 759 break; 760 761 case TULIP_CHIP_21142: 762 case TULIP_CHIP_21143: 763 /* Check for new format SROM. */ 764 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 765 /* 766 * Not an ISV SROM; try the old DEC Ethernet Address 767 * ROM format. 768 */ 769 if (tlp_parse_old_srom(sc, enaddr) == 0) { 770 /* 771 * One last try: just copy the address 772 * from offset 20 and try to look 773 * up quirks. 774 */ 775 memcpy(enaddr, &sc->sc_srom[20], 776 ETHER_ADDR_LEN); 777 } 778 } else { 779 /* 780 * We start out with the 2114x ISV media switch. 781 * When we search for quirks, we may change to 782 * a different switch. 783 */ 784 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 785 } 786 787 /* 788 * Deal with any quirks this board might have. 789 */ 790 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21142_quirks); 791 792 /* 793 * Bail out now if we can't deal with this board. 794 */ 795 if (sc->sc_mediasw == NULL) 796 goto cant_cope; 797 break; 798 799 case TULIP_CHIP_82C168: 800 case TULIP_CHIP_82C169: 801 /* 802 * Lite-On PNIC's Ethernet address is the first 6 803 * bytes of its EEPROM. 804 */ 805 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 806 807 /* 808 * Lite-On PNICs always use the same mediasw; we 809 * select MII vs. internal NWAY automatically. 810 */ 811 sc->sc_mediasw = &tlp_pnic_mediasw; 812 break; 813 814 case TULIP_CHIP_MX98713: 815 /* 816 * The Macronix MX98713 has an MII and GPIO, but no 817 * internal Nway block. This chip is basically a 818 * perfect 21140A clone, with the exception of the 819 * a magic register frobbing in order to make the 820 * interface function. 821 */ 822 if (tlp_isv_srom_enaddr(sc, enaddr)) { 823 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 824 break; 825 } 826 /* FALLTHROUGH */ 827 828 case TULIP_CHIP_82C115: 829 /* 830 * Yippee! The Lite-On 82C115 is a clone of 831 * the MX98725 (the data sheet even says `MXIC' 832 * on it)! Imagine that, a clone of a clone. 833 * 834 * The differences are really minimal: 835 * 836 * - Wake-On-LAN support 837 * - 128-bit multicast hash table, rather than 838 * the standard 512-bit hash table 839 */ 840 /* FALLTHROUGH */ 841 842 case TULIP_CHIP_MX98713A: 843 case TULIP_CHIP_MX98715A: 844 case TULIP_CHIP_MX98715AEC_X: 845 case TULIP_CHIP_MX98725: 846 /* 847 * The MX98713A has an MII as well as an internal Nway block, 848 * but no GPIO. The MX98715 and MX98725 have an internal 849 * Nway block only. 850 * 851 * The internal Nway block, unlike the Lite-On PNIC's, does 852 * just that - performs Nway. Once autonegotiation completes, 853 * we must program the GPR media information into the chip. 854 * 855 * The byte offset of the Ethernet address is stored at 856 * offset 0x70. 857 */ 858 memcpy(enaddr, &sc->sc_srom[sc->sc_srom[0x70]], ETHER_ADDR_LEN); 859 sc->sc_mediasw = &tlp_pmac_mediasw; 860 break; 861 862 case TULIP_CHIP_WB89C840F: 863 /* 864 * Winbond 89C840F's Ethernet address is the first 865 * 6 bytes of its EEPROM. 866 */ 867 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 868 869 /* 870 * Winbond 89C840F has an MII attached to the SIO. 871 */ 872 sc->sc_mediasw = &tlp_sio_mii_mediasw; 873 break; 874 875 case TULIP_CHIP_AL981: 876 /* 877 * The ADMtek AL981's Ethernet address is located 878 * at offset 8 of its EEPROM. 879 */ 880 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 881 882 /* 883 * ADMtek AL981 has a built-in PHY accessed through 884 * special registers. 885 */ 886 sc->sc_mediasw = &tlp_al981_mediasw; 887 break; 888 889 case TULIP_CHIP_AN983: 890 case TULIP_CHIP_AN985: 891 /* 892 * The ADMtek AN985's Ethernet address is located 893 * at offset 8 of its EEPROM. 894 */ 895 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 896 897 /* 898 * The ADMtek AN985 can be configured in Single-Chip 899 * mode or MAC-only mode. Single-Chip uses the built-in 900 * PHY, MAC-only has an external PHY (usually HomePNA). 901 * The selection is based on an EEPROM setting, and both 902 * PHYs are accessed via MII attached to SIO. 903 * 904 * The AN985 "ghosts" the internal PHY onto all 905 * MII addresses, so we have to use a media init 906 * routine that limits the search. 907 * XXX How does this work with MAC-only mode? 908 */ 909 sc->sc_mediasw = &tlp_an985_mediasw; 910 break; 911 912 case TULIP_CHIP_DM9102: 913 case TULIP_CHIP_DM9102A: 914 /* 915 * Some boards with the Davicom chip have an ISV 916 * SROM (mostly DM9102A boards -- trying to describe 917 * the HomePNA PHY, probably) although the data in 918 * them is generally wrong. Check for ISV format 919 * and grab the Ethernet address that way, and if 920 * that fails, fall back on grabbing it from an 921 * observed offset of 20 (which is where it would 922 * be in an ISV SROM anyhow, tho ISV can cope with 923 * multi-port boards). 924 */ 925 if (!tlp_isv_srom_enaddr(sc, enaddr)) { 926 #ifdef __sparc__ 927 if ((sc->sc_srom[20] == 0 && 928 sc->sc_srom[21] == 0 && 929 sc->sc_srom[22] == 0) || 930 (sc->sc_srom[20] == 0xff && 931 sc->sc_srom[21] == 0xff && 932 sc->sc_srom[22] == 0xff)) { 933 prom_getether(PCITAG_NODE(pa->pa_tag), enaddr); 934 } else 935 #endif 936 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN); 937 } 938 939 /* 940 * Davicom chips all have an internal MII interface 941 * and a built-in PHY. DM9102A also has a an external 942 * MII interface, usually with a HomePNA PHY attached 943 * to it. 944 */ 945 sc->sc_mediasw = &tlp_dm9102_mediasw; 946 break; 947 948 case TULIP_CHIP_AX88140: 949 case TULIP_CHIP_AX88141: 950 /* 951 * ASIX AX88140/AX88141 Ethernet Address is located at offset 952 * 20 of the SROM. 953 */ 954 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN); 955 956 /* 957 * ASIX AX88140A/AX88141 chip can have a built-in PHY or 958 * an external MII interface. 959 */ 960 sc->sc_mediasw = &tlp_asix_mediasw; 961 break; 962 963 case TULIP_CHIP_RS7112: 964 /* 965 * RS7112 Ethernet Address is located of offset 0x19a 966 * of the SROM 967 */ 968 memcpy(enaddr, &sc->sc_srom[0x19a], ETHER_ADDR_LEN); 969 970 /* RS7112 chip has a PHY at MII address 1 */ 971 sc->sc_mediasw = &tlp_rs7112_mediasw; 972 break; 973 974 default: 975 cant_cope: 976 printf("%s: sorry, unable to handle your board\n", 977 device_xname(&sc->sc_dev)); 978 return; 979 } 980 981 /* 982 * Handle shared interrupts. 983 */ 984 if (psc->sc_flags & TULIP_PCI_SHAREDINTR) { 985 if (psc->sc_master) 986 psc->sc_flags |= TULIP_PCI_SLAVEINTR; 987 else { 988 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDINTR, 989 TULIP_PCI_SLAVEINTR); 990 if (psc->sc_master == NULL) 991 psc->sc_master = psc; 992 } 993 LIST_INSERT_HEAD(&psc->sc_master->sc_intrslaves, 994 psc, sc_intrq); 995 } 996 997 if (psc->sc_flags & TULIP_PCI_SLAVEINTR) { 998 printf("%s: sharing interrupt with %s\n", 999 device_xname(&sc->sc_dev), 1000 device_xname(&psc->sc_master->sc_tulip.sc_dev)); 1001 } else { 1002 /* 1003 * Map and establish our interrupt. 1004 */ 1005 if (pci_intr_map(pa, &ih)) { 1006 aprint_error_dev(&sc->sc_dev, "unable to map interrupt\n"); 1007 return; 1008 } 1009 intrstr = pci_intr_string(pc, ih); 1010 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, 1011 (psc->sc_flags & TULIP_PCI_SHAREDINTR) ? 1012 tlp_pci_shared_intr : tlp_intr, sc); 1013 if (psc->sc_ih == NULL) { 1014 aprint_error_dev(&sc->sc_dev, "unable to establish interrupt"); 1015 if (intrstr != NULL) 1016 printf(" at %s", intrstr); 1017 printf("\n"); 1018 return; 1019 } 1020 printf("%s: interrupting at %s\n", device_xname(&sc->sc_dev), 1021 intrstr); 1022 } 1023 1024 /* 1025 * Finish off the attach. 1026 */ 1027 tlp_attach(sc, enaddr); 1028 } 1029 1030 static int 1031 tlp_pci_shared_intr(void *arg) 1032 { 1033 struct tulip_pci_softc *master = arg, *slave; 1034 int rv = 0; 1035 1036 for (slave = LIST_FIRST(&master->sc_intrslaves); 1037 slave != NULL; 1038 slave = LIST_NEXT(slave, sc_intrq)) 1039 rv |= tlp_intr(&slave->sc_tulip); 1040 1041 return rv; 1042 } 1043 1044 static void 1045 tlp_pci_dec_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1046 { 1047 struct tulip_softc *sc = &psc->sc_tulip; 1048 1049 /* 1050 * This isn't really a quirk-gathering device, really. We 1051 * just want to get the spiffy DEC board name from the SROM. 1052 */ 1053 strcpy(sc->sc_name, "DEC "); 1054 1055 if (memcmp(&sc->sc_srom[29], "DE500", 5) == 0 || 1056 memcmp(&sc->sc_srom[29], "DE450", 5) == 0) 1057 memcpy(&sc->sc_name[4], &sc->sc_srom[29], 8); 1058 else 1059 sc->sc_name[3] = '\0'; 1060 } 1061 1062 static void 1063 tlp_pci_znyx_21040_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1064 { 1065 struct tulip_softc *sc = &psc->sc_tulip; 1066 uint16_t id = 0; 1067 1068 /* 1069 * If we have a slaved ROM, just copy the bits from the master. 1070 * This is in case we fail the ROM ID check (older boards) and 1071 * need to fall back on Ethernet address model checking; that 1072 * will fail for slave chips. 1073 */ 1074 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 1075 strcpy(sc->sc_name, psc->sc_master->sc_tulip.sc_name); 1076 sc->sc_mediasw = psc->sc_master->sc_tulip.sc_mediasw; 1077 psc->sc_flags |= 1078 psc->sc_master->sc_flags & TULIP_PCI_SHAREDINTR; 1079 return; 1080 } 1081 1082 if (sc->sc_srom[32] == 0x4a && sc->sc_srom[33] == 0x52) { 1083 id = sc->sc_srom[37] | (sc->sc_srom[36] << 8); 1084 switch (id) { 1085 zx312: 1086 case 0x0602: /* ZX312 */ 1087 strcpy(sc->sc_name, "ZNYX ZX312"); 1088 return; 1089 1090 case 0x0622: /* ZX312T */ 1091 strcpy(sc->sc_name, "ZNYX ZX312T"); 1092 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1093 return; 1094 1095 zx314_inta: 1096 case 0x0701: /* ZX314 INTA */ 1097 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1098 /* FALLTHROUGH */ 1099 case 0x0711: /* ZX314 */ 1100 strcpy(sc->sc_name, "ZNYX ZX314"); 1101 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1102 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1103 return; 1104 1105 zx315_inta: 1106 case 0x0801: /* ZX315 INTA */ 1107 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1108 /* FALLTHROUGH */ 1109 case 0x0811: /* ZX315 */ 1110 strcpy(sc->sc_name, "ZNYX ZX315"); 1111 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1112 return; 1113 1114 default: 1115 id = 0; 1116 break; 1117 } 1118 } 1119 1120 /* 1121 * Deal with boards that have broken ROMs. 1122 */ 1123 if (id == 0) { 1124 if ((enaddr[3] & ~3) == 0xf0 && (enaddr[5] & 3) == 0x00) 1125 goto zx314_inta; 1126 if ((enaddr[3] & ~3) == 0xf4 && (enaddr[5] & 1) == 0x00) 1127 goto zx315_inta; 1128 if ((enaddr[3] & ~3) == 0xec) 1129 goto zx312; 1130 } 1131 1132 strcpy(sc->sc_name, "ZNYX ZX31x"); 1133 } 1134 1135 static void tlp_pci_znyx_21142_qs6611_reset(struct tulip_softc *); 1136 1137 static void 1138 tlp_pci_znyx_21142_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1139 { 1140 struct tulip_softc *sc = &psc->sc_tulip; 1141 pcireg_t subid; 1142 1143 subid = pci_conf_read(psc->sc_pc, psc->sc_pcitag, PCI_SUBSYS_ID_REG); 1144 1145 if (PCI_VENDOR(subid) != PCI_VENDOR_ZNYX) 1146 return; /* ? */ 1147 1148 switch (PCI_PRODUCT(subid) & 0xff) { 1149 /* 1150 * ZNYX 21143 boards with QS6611 PHY 1151 */ 1152 case 0x12: /* ZX345Q */ 1153 case 0x13: /* ZX346Q */ 1154 case 0x14: /* ZX348Q */ 1155 case 0x18: /* ZX414 */ 1156 case 0x19: /* ZX412 */ 1157 case 0x1a: /* ZX444 */ 1158 case 0x1b: /* ZX442 */ 1159 case 0x23: /* ZX212 */ 1160 case 0x24: /* ZX214 */ 1161 case 0x29: /* ZX374 */ 1162 case 0x2d: /* ZX372 */ 1163 case 0x2b: /* ZX244 */ 1164 case 0x2c: /* ZX424 */ 1165 case 0x2e: /* ZX422 */ 1166 printf("%s: QS6611 PHY\n", device_xname(&sc->sc_dev)); 1167 sc->sc_reset = tlp_pci_znyx_21142_qs6611_reset; 1168 break; 1169 } 1170 } 1171 1172 static void 1173 tlp_pci_znyx_21142_qs6611_reset(struct tulip_softc *sc) 1174 { 1175 1176 /* 1177 * Reset QS6611 PHY. 1178 */ 1179 TULIP_WRITE(sc, CSR_SIAGEN, 1180 SIAGEN_CWE | SIAGEN_LGS1 | SIAGEN_ABM | (0xf << 16)); 1181 delay(200); 1182 TULIP_WRITE(sc, CSR_SIAGEN, (0x4 << 16)); 1183 delay(10000); 1184 } 1185 1186 static void 1187 tlp_pci_smc_21040_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1188 { 1189 struct tulip_softc *sc = &psc->sc_tulip; 1190 uint16_t id1, id2, ei; 1191 int auibnc = 0, utp = 0; 1192 char *cp; 1193 1194 id1 = sc->sc_srom[0x60] | (sc->sc_srom[0x61] << 8); 1195 id2 = sc->sc_srom[0x62] | (sc->sc_srom[0x63] << 8); 1196 ei = sc->sc_srom[0x66] | (sc->sc_srom[0x67] << 8); 1197 1198 strcpy(sc->sc_name, "SMC 8432"); 1199 cp = &sc->sc_name[8]; 1200 1201 if ((id1 & 1) == 0) { 1202 *cp++ = 'B'; 1203 auibnc = 1; 1204 } 1205 if ((id1 & 0xff) > 0x32) { 1206 *cp++ = 'T'; 1207 utp = 1; 1208 } 1209 if ((id1 & 0x4000) == 0) { 1210 *cp++ = 'A'; 1211 auibnc = 1; 1212 } 1213 if (id2 == 0x15) { 1214 sc->sc_name[7] = '4'; 1215 *cp++ = '-'; 1216 *cp++ = 'C'; 1217 *cp++ = 'H'; 1218 *cp++ = ei ? '2' : '1'; 1219 } 1220 *cp = '\0'; 1221 1222 if (utp != 0 && auibnc == 0) 1223 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1224 else if (utp == 0 && auibnc != 0) 1225 sc->sc_mediasw = &tlp_21040_auibnc_mediasw; 1226 } 1227 1228 static void 1229 tlp_pci_cogent_21040_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1230 { 1231 1232 strcpy(psc->sc_tulip.sc_name, "Cogent multi-port"); 1233 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1234 } 1235 1236 static void 1237 tlp_pci_accton_21040_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1238 { 1239 1240 strcpy(psc->sc_tulip.sc_name, "ACCTON EN1203"); 1241 } 1242 1243 static void tlp_pci_asante_21140_reset(struct tulip_softc *); 1244 1245 static void 1246 tlp_pci_asante_21140_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1247 { 1248 struct tulip_softc *sc = &psc->sc_tulip; 1249 1250 /* 1251 * Some Asante boards don't use the ISV SROM format. For 1252 * those that don't, we initialize the GPIO direction bits, 1253 * and provide our own reset hook, which resets the MII. 1254 * 1255 * All of these boards use SIO-attached-MII media. 1256 */ 1257 if (sc->sc_mediasw == &tlp_2114x_isv_mediasw) 1258 return; 1259 1260 strcpy(sc->sc_name, "Asante"); 1261 1262 sc->sc_gp_dir = 0xbf; 1263 sc->sc_reset = tlp_pci_asante_21140_reset; 1264 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1265 } 1266 1267 static void 1268 tlp_pci_e100_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1269 { 1270 struct tulip_softc *sc = &psc->sc_tulip; 1271 1272 if (sc->sc_mediasw == &tlp_2114x_isv_mediasw) 1273 return; 1274 1275 strcpy(sc->sc_name, "UMAX E100"); 1276 1277 sc->sc_gp_dir = 0xbf; 1278 sc->sc_reset = tlp_pci_asante_21140_reset; 1279 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1280 } 1281 1282 static void 1283 tlp_pci_asante_21140_reset(struct tulip_softc *sc) 1284 { 1285 1286 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1287 TULIP_WRITE(sc, CSR_GPP, 0x8); 1288 delay(100); 1289 TULIP_WRITE(sc, CSR_GPP, 0); 1290 } 1291 1292 static void tlp_pci_phobos_21140_reset(struct tulip_softc *); 1293 1294 static void 1295 tlp_pci_phobos_21140_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1296 { 1297 struct tulip_softc *sc = &psc->sc_tulip; 1298 1299 /* 1300 * Phobo boards just use MII-on_SIO. 1301 */ 1302 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1303 sc->sc_reset = tlp_pci_phobos_21140_reset; 1304 1305 /* 1306 * These boards appear solely on sgimips machines behind a special 1307 * GIO<->PCI ASIC and require the DBO and BLE bits to be set in CSR0. 1308 */ 1309 sc->sc_flags |= (TULIPF_BLE | TULIPF_DBO); 1310 } 1311 1312 static void 1313 tlp_pci_phobos_21140_reset(struct tulip_softc *sc) 1314 { 1315 1316 TULIP_WRITE(sc, CSR_GPP, 0x1fd); 1317 delay(10); 1318 TULIP_WRITE(sc, CSR_GPP, 0xfd); 1319 delay(10); 1320 TULIP_WRITE(sc, CSR_GPP, 0); 1321 } 1322 1323 /* 1324 * SMC 9332DST media switch. 1325 */ 1326 static void tlp_smc9332dst_tmsw_init(struct tulip_softc *); 1327 1328 static const struct tulip_mediasw tlp_smc9332dst_mediasw = { 1329 tlp_smc9332dst_tmsw_init, 1330 tlp_21140_gpio_get, 1331 tlp_21140_gpio_set 1332 }; 1333 1334 static void 1335 tlp_pci_smc_21140_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1336 { 1337 struct tulip_softc *sc = &psc->sc_tulip; 1338 1339 if (sc->sc_mediasw != NULL) { 1340 return; 1341 } 1342 strcpy(psc->sc_tulip.sc_name, "SMC 9332DST"); 1343 sc->sc_mediasw = &tlp_smc9332dst_mediasw; 1344 } 1345 1346 static void 1347 tlp_smc9332dst_tmsw_init(struct tulip_softc *sc) 1348 { 1349 struct tulip_21x4x_media *tm; 1350 const char *sep = ""; 1351 uint32_t reg; 1352 int i, cnt; 1353 1354 sc->sc_gp_dir = GPP_SMC9332DST_PINS; 1355 sc->sc_opmode = OPMODE_MBO | OPMODE_PS; 1356 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 1357 1358 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 1359 tlp_mediastatus); 1360 printf("%s: ", device_xname(&sc->sc_dev)); 1361 1362 #define ADD(m, c) \ 1363 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK|M_ZERO); \ 1364 tm->tm_opmode = (c); \ 1365 tm->tm_gpdata = GPP_SMC9332DST_INIT; \ 1366 ifmedia_add(&sc->sc_mii.mii_media, (m), 0, tm) 1367 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 1368 1369 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0), OPMODE_TTM); 1370 PRINT("10baseT"); 1371 1372 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, 0), 1373 OPMODE_TTM | OPMODE_FD); 1374 PRINT("10baseT-FDX"); 1375 1376 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 1377 OPMODE_PS | OPMODE_PCS | OPMODE_SCR); 1378 PRINT("100baseTX"); 1379 1380 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, 0), 1381 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD); 1382 PRINT("100baseTX-FDX"); 1383 1384 #undef ADD 1385 #undef PRINT 1386 1387 printf("\n"); 1388 1389 tlp_reset(sc); 1390 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode | OPMODE_PCS | OPMODE_SCR); 1391 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1392 delay(10); 1393 TULIP_WRITE(sc, CSR_GPP, GPP_SMC9332DST_INIT); 1394 delay(200000); 1395 cnt = 0; 1396 for (i = 1000; i > 0; i--) { 1397 reg = TULIP_READ(sc, CSR_GPP); 1398 if ((~reg & (GPP_SMC9332DST_OK10 | 1399 GPP_SMC9332DST_OK100)) == 0) { 1400 if (cnt++ > 100) { 1401 break; 1402 } 1403 } else if ((reg & GPP_SMC9332DST_OK10) == 0) { 1404 break; 1405 } else { 1406 cnt = 0; 1407 } 1408 delay(1000); 1409 } 1410 if (cnt > 100) { 1411 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX); 1412 } else { 1413 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 1414 } 1415 } 1416 1417 static void 1418 tlp_pci_vpc_21140_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1419 { 1420 struct tulip_softc *sc = &psc->sc_tulip; 1421 char *p1 = (char *) &sc->sc_srom[32]; 1422 char *p2 = &sc->sc_name[0]; 1423 1424 do { 1425 if ((unsigned char) *p1 & 0x80) 1426 *p2++ = ' '; 1427 else 1428 *p2++ = *p1; 1429 } while (*p1++); 1430 } 1431 1432 static void tlp_pci_cobalt_21142_reset(struct tulip_softc *); 1433 1434 static void 1435 tlp_pci_cobalt_21142_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1436 { 1437 struct tulip_softc *sc = &psc->sc_tulip; 1438 1439 /* 1440 * Cobalt Networks interfaces are just MII-on-SIO. 1441 */ 1442 sc->sc_reset = tlp_pci_cobalt_21142_reset; 1443 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1444 1445 /* 1446 * The Cobalt systems tend to fall back to store-and-forward 1447 * pretty quickly, so we select that from the beginning to 1448 * avoid initial timeouts. 1449 */ 1450 sc->sc_txthresh = TXTH_SF; 1451 } 1452 1453 static void 1454 tlp_pci_cobalt_21142_reset(struct tulip_softc *sc) 1455 { 1456 1457 /* 1458 * Reset PHY. 1459 */ 1460 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE | (1 << 16)); 1461 delay(10); 1462 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE); 1463 delay(10); 1464 } 1465 1466 static void 1467 tlp_pci_algor_21142_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1468 { 1469 struct tulip_softc *sc = &psc->sc_tulip; 1470 1471 /* 1472 * Algorithmics boards just have MII-on-SIO. 1473 * 1474 * XXX They also have AUI on the serial interface. 1475 * XXX Deal with this. 1476 */ 1477 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1478 } 1479 1480 /* 1481 * Cogent EM1x0 (aka. Adaptec ANA-6910) media switch. 1482 */ 1483 static void tlp_cogent_em1x0_tmsw_init(struct tulip_softc *); 1484 1485 static const struct tulip_mediasw tlp_cogent_em1x0_mediasw = { 1486 tlp_cogent_em1x0_tmsw_init, 1487 tlp_21140_gpio_get, 1488 tlp_21140_gpio_set 1489 }; 1490 1491 static void 1492 tlp_pci_adaptec_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1493 { 1494 struct tulip_softc *sc = &psc->sc_tulip; 1495 uint8_t *srom = sc->sc_srom, id0; 1496 uint16_t id1, id2; 1497 1498 if (sc->sc_mediasw == NULL) { 1499 id0 = srom[32]; 1500 switch (id0) { 1501 case 0x12: 1502 strcpy(psc->sc_tulip.sc_name, "Cogent EM100TX"); 1503 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1504 break; 1505 1506 case 0x15: 1507 strcpy(psc->sc_tulip.sc_name, "Cogent EM100FX"); 1508 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1509 break; 1510 1511 #if 0 1512 case XXX: 1513 strcpy(psc->sc_tulip.sc_name, "Cogent EM110TX"); 1514 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1515 break; 1516 #endif 1517 1518 default: 1519 printf("%s: unknown Cogent board ID 0x%02x\n", 1520 device_xname(&sc->sc_dev), id0); 1521 } 1522 return; 1523 } 1524 1525 id1 = TULIP_ROM_GETW(srom, 0); 1526 id2 = TULIP_ROM_GETW(srom, 2); 1527 if (id1 != 0x1109) { 1528 goto unknown; 1529 } 1530 1531 switch (id2) { 1532 case 0x1900: 1533 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911"); 1534 break; 1535 1536 case 0x2400: 1537 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6944A"); 1538 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1539 break; 1540 1541 case 0x2b00: 1542 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911A"); 1543 break; 1544 1545 case 0x3000: 1546 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6922"); 1547 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1548 break; 1549 1550 default: 1551 unknown: 1552 printf("%s: unknown Adaptec/Cogent board ID 0x%04x/0x%04x\n", 1553 device_xname(&sc->sc_dev), id1, id2); 1554 } 1555 } 1556 1557 static void 1558 tlp_cogent_em1x0_tmsw_init(struct tulip_softc *sc) 1559 { 1560 struct tulip_21x4x_media *tm; 1561 const char *sep = ""; 1562 1563 sc->sc_gp_dir = GPP_COGENT_EM1x0_PINS; 1564 sc->sc_opmode = OPMODE_MBO | OPMODE_PS; 1565 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 1566 1567 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 1568 tlp_mediastatus); 1569 printf("%s: ", device_xname(&sc->sc_dev)); 1570 1571 #define ADD(m, c) \ 1572 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK|M_ZERO); \ 1573 tm->tm_opmode = (c); \ 1574 tm->tm_gpdata = GPP_COGENT_EM1x0_INIT; \ 1575 ifmedia_add(&sc->sc_mii.mii_media, (m), 0, tm) 1576 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 1577 1578 if (sc->sc_srom[32] == 0x15) { 1579 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, 0, 0), 1580 OPMODE_PS | OPMODE_PCS); 1581 PRINT("100baseFX"); 1582 1583 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0), 1584 OPMODE_PS | OPMODE_PCS | OPMODE_FD); 1585 PRINT("100baseFX-FDX"); 1586 printf("\n"); 1587 1588 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_FX); 1589 } else { 1590 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 1591 OPMODE_PS | OPMODE_PCS | OPMODE_SCR); 1592 PRINT("100baseTX"); 1593 1594 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0), 1595 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD); 1596 PRINT("100baseTX-FDX"); 1597 printf("\n"); 1598 1599 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX); 1600 } 1601 1602 #undef ADD 1603 #undef PRINT 1604 } 1605 1606 static void tlp_pci_netwinder_21142_reset(struct tulip_softc *); 1607 1608 static void 1609 tlp_pci_netwinder_21142_quirks(struct tulip_pci_softc *psc, 1610 const uint8_t *enaddr) 1611 { 1612 struct tulip_softc *sc = &psc->sc_tulip; 1613 1614 /* 1615 * Netwinders just use MII-on_SIO. 1616 */ 1617 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1618 sc->sc_reset = tlp_pci_netwinder_21142_reset; 1619 } 1620 1621 void 1622 tlp_pci_netwinder_21142_reset(struct tulip_softc *sc) 1623 { 1624 1625 /* 1626 * Reset the PHY. 1627 */ 1628 TULIP_WRITE(sc, CSR_SIAGEN, 0x0821 << 16); 1629 delay(10); 1630 TULIP_WRITE(sc, CSR_SIAGEN, 0x0000 << 16); 1631 delay(10); 1632 TULIP_WRITE(sc, CSR_SIAGEN, 0x0001 << 16); 1633 delay(10); 1634 } 1635 1636 static void tlp_pci_phobos_21142_reset(struct tulip_softc *); 1637 1638 static void 1639 tlp_pci_phobos_21142_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1640 { 1641 struct tulip_softc *sc = &psc->sc_tulip; 1642 1643 /* 1644 * Phobo boards just use MII-on_SIO. 1645 */ 1646 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1647 sc->sc_reset = tlp_pci_phobos_21142_reset; 1648 1649 /* 1650 * These boards appear solely on sgimips machines behind a special 1651 * GIO<->PCI ASIC and require the DBO and BLE bits to be set in CSR0. 1652 */ 1653 sc->sc_flags |= (TULIPF_BLE | TULIPF_DBO); 1654 } 1655 1656 static void 1657 tlp_pci_phobos_21142_reset(struct tulip_softc *sc) 1658 { 1659 /* 1660 * Reset PHY. 1661 */ 1662 TULIP_WRITE(sc, CSR_SIAGEN, (0x880f << 16)); 1663 delay(10); 1664 TULIP_WRITE(sc, CSR_SIAGEN, (0x800f << 16)); 1665 delay(10); 1666 } 1667
Indexes created Wed Oct 01 13:09:50 GMT 2025