if_tlp_pci.c revision 1.104.4.1
1 /* $NetBSD: if_tlp_pci.c,v 1.104.4.1 2008/05/16 02:24:44 yamt Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center; and Charles M. Hannum. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * PCI bus front-end for the Digital Semiconductor ``Tulip'' (21x4x) 35 * Ethernet controller family driver. 36 */ 37 38 #include <sys/cdefs.h> 39 __KERNEL_RCSID(0, "$NetBSD: if_tlp_pci.c,v 1.104.4.1 2008/05/16 02:24:44 yamt Exp $"); 40 41 #include <sys/param.h> 42 #include <sys/systm.h> 43 #include <sys/mbuf.h> 44 #include <sys/malloc.h> 45 #include <sys/kernel.h> 46 #include <sys/socket.h> 47 #include <sys/ioctl.h> 48 #include <sys/errno.h> 49 #include <sys/device.h> 50 51 #include <machine/endian.h> 52 53 #include <net/if.h> 54 #include <net/if_dl.h> 55 #include <net/if_media.h> 56 #include <net/if_ether.h> 57 58 #include <sys/bus.h> 59 #include <sys/intr.h> 60 #ifdef __sparc__ 61 #include <machine/promlib.h> 62 #endif 63 64 #include <dev/mii/miivar.h> 65 #include <dev/mii/mii_bitbang.h> 66 67 #include <dev/ic/tulipreg.h> 68 #include <dev/ic/tulipvar.h> 69 70 #include <dev/pci/pcivar.h> 71 #include <dev/pci/pcireg.h> 72 #include <dev/pci/pcidevs.h> 73 74 /* 75 * PCI configuration space registers used by the Tulip. 76 */ 77 #define TULIP_PCI_IOBA 0x10 /* i/o mapped base */ 78 #define TULIP_PCI_MMBA 0x14 /* memory mapped base */ 79 #define TULIP_PCI_CFDA 0x40 /* configuration driver area */ 80 81 #define CFDA_SLEEP 0x80000000 /* sleep mode */ 82 #define CFDA_SNOOZE 0x40000000 /* snooze mode */ 83 84 struct tulip_pci_softc { 85 struct tulip_softc sc_tulip; /* real Tulip softc */ 86 87 /* PCI-specific goo. */ 88 void *sc_ih; /* interrupt handle */ 89 90 pci_chipset_tag_t sc_pc; /* our PCI chipset */ 91 pcitag_t sc_pcitag; /* our PCI tag */ 92 93 int sc_flags; /* flags; see below */ 94 95 LIST_HEAD(, tulip_pci_softc) sc_intrslaves; 96 LIST_ENTRY(tulip_pci_softc) sc_intrq; 97 98 /* Our {ROM,interrupt} master. */ 99 struct tulip_pci_softc *sc_master; 100 }; 101 102 /* sc_flags */ 103 #define TULIP_PCI_SHAREDINTR 0x01 /* interrupt is shared */ 104 #define TULIP_PCI_SLAVEINTR 0x02 /* interrupt is slave */ 105 #define TULIP_PCI_SHAREDROM 0x04 /* ROM is shared */ 106 #define TULIP_PCI_SLAVEROM 0x08 /* slave of shared ROM */ 107 108 static int tlp_pci_match(device_t, struct cfdata *, void *); 109 static void tlp_pci_attach(device_t, device_t, void *); 110 111 CFATTACH_DECL(tlp_pci, sizeof(struct tulip_pci_softc), 112 tlp_pci_match, tlp_pci_attach, NULL, NULL); 113 114 static const struct tulip_pci_product { 115 uint32_t tpp_vendor; /* PCI vendor ID */ 116 uint32_t tpp_product; /* PCI product ID */ 117 tulip_chip_t tpp_chip; /* base Tulip chip type */ 118 } tlp_pci_products[] = { 119 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21040, 120 TULIP_CHIP_21040 }, 121 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21041, 122 TULIP_CHIP_21041 }, 123 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21140, 124 TULIP_CHIP_21140 }, 125 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142, 126 TULIP_CHIP_21142 }, 127 128 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C168, 129 TULIP_CHIP_82C168 }, 130 131 /* 132 * Note: This is like a MX98725 with Wake-On-LAN and a 133 * 128-bit multicast hash table. 134 */ 135 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C115, 136 TULIP_CHIP_82C115 }, 137 138 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98713, 139 TULIP_CHIP_MX98713 }, 140 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX987x5, 141 TULIP_CHIP_MX98715 }, 142 143 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100TX, 144 TULIP_CHIP_MX98713 }, 145 146 { PCI_VENDOR_WINBOND, PCI_PRODUCT_WINBOND_W89C840F, 147 TULIP_CHIP_WB89C840F }, 148 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100ATX, 149 TULIP_CHIP_WB89C840F }, 150 151 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9102, 152 TULIP_CHIP_DM9102 }, 153 154 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AL981, 155 TULIP_CHIP_AL981 }, 156 157 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN983, 158 TULIP_CHIP_AN985 }, 159 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_ADM9511, 160 TULIP_CHIP_AN985 }, 161 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_ADM9513, 162 TULIP_CHIP_AN985 }, 163 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN2242, 164 TULIP_CHIP_AN985 }, 165 166 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C910SOHOB, 167 TULIP_CHIP_AN985 }, 168 169 { PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX88140A, 170 TULIP_CHIP_AX88140 }, 171 172 { PCI_VENDOR_CONEXANT, PCI_PRODUCT_CONEXANT_LANFINITY, 173 TULIP_CHIP_RS7112 }, 174 175 { 0, 0, 176 TULIP_CHIP_INVALID }, 177 }; 178 179 struct tlp_pci_quirks { 180 void (*tpq_func)(struct tulip_pci_softc *, 181 const uint8_t *); 182 uint8_t tpq_oui[3]; 183 }; 184 185 static void tlp_pci_dec_quirks(struct tulip_pci_softc *, 186 const uint8_t *); 187 188 static void tlp_pci_znyx_21040_quirks(struct tulip_pci_softc *, 189 const uint8_t *); 190 static void tlp_pci_smc_21040_quirks(struct tulip_pci_softc *, 191 const uint8_t *); 192 static void tlp_pci_cogent_21040_quirks(struct tulip_pci_softc *, 193 const uint8_t *); 194 static void tlp_pci_accton_21040_quirks(struct tulip_pci_softc *, 195 const uint8_t *); 196 197 static void tlp_pci_cobalt_21142_quirks(struct tulip_pci_softc *, 198 const uint8_t *); 199 static void tlp_pci_algor_21142_quirks(struct tulip_pci_softc *, 200 const uint8_t *); 201 static void tlp_pci_netwinder_21142_quirks(struct tulip_pci_softc *, 202 const uint8_t *); 203 static void tlp_pci_phobos_21142_quirks(struct tulip_pci_softc *, 204 const uint8_t *); 205 static void tlp_pci_znyx_21142_quirks(struct tulip_pci_softc *, 206 const uint8_t *); 207 208 static void tlp_pci_adaptec_quirks(struct tulip_pci_softc *, 209 const uint8_t *); 210 211 static const struct tlp_pci_quirks tlp_pci_21040_quirks[] = { 212 { tlp_pci_znyx_21040_quirks, { 0x00, 0xc0, 0x95 } }, 213 { tlp_pci_smc_21040_quirks, { 0x00, 0x00, 0xc0 } }, 214 { tlp_pci_cogent_21040_quirks, { 0x00, 0x00, 0x92 } }, 215 { tlp_pci_accton_21040_quirks, { 0x00, 0x00, 0xe8 } }, 216 { NULL, { 0, 0, 0 } } 217 }; 218 219 static const struct tlp_pci_quirks tlp_pci_21041_quirks[] = { 220 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 221 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 222 { NULL, { 0, 0, 0 } } 223 }; 224 225 static void tlp_pci_asante_21140_quirks(struct tulip_pci_softc *, 226 const uint8_t *); 227 static void tlp_pci_e100_quirks(struct tulip_pci_softc *, 228 const uint8_t *); 229 static void tlp_pci_phobos_21140_quirks(struct tulip_pci_softc *, 230 const uint8_t *); 231 static void tlp_pci_smc_21140_quirks(struct tulip_pci_softc *, 232 const uint8_t *); 233 static void tlp_pci_vpc_21140_quirks(struct tulip_pci_softc *, 234 const uint8_t *); 235 236 static const struct tlp_pci_quirks tlp_pci_21140_quirks[] = { 237 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 238 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 239 { tlp_pci_e100_quirks, { 0x00, 0xa0, 0x59 } }, 240 { tlp_pci_asante_21140_quirks, { 0x00, 0x00, 0x94 } }, 241 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0x92 } }, 242 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } }, 243 { tlp_pci_phobos_21140_quirks, { 0x00, 0x60, 0xf5 } }, 244 { tlp_pci_smc_21140_quirks, { 0x00, 0x00, 0xc0 } }, 245 { tlp_pci_vpc_21140_quirks, { 0x00, 0x03, 0xff } }, 246 { NULL, { 0, 0, 0 } } 247 }; 248 249 static const struct tlp_pci_quirks tlp_pci_21142_quirks[] = { 250 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 251 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 252 { tlp_pci_cobalt_21142_quirks, { 0x00, 0x10, 0xe0 } }, 253 { tlp_pci_algor_21142_quirks, { 0x00, 0x40, 0xbc } }, 254 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } }, 255 { tlp_pci_netwinder_21142_quirks,{ 0x00, 0x10, 0x57 } }, 256 { tlp_pci_phobos_21142_quirks, { 0x00, 0x60, 0xf5 } }, 257 { tlp_pci_znyx_21142_quirks, { 0x00, 0xc0, 0x95 } }, 258 { NULL, { 0, 0, 0 } } 259 }; 260 261 static int tlp_pci_shared_intr(void *); 262 263 static const struct tulip_pci_product * 264 tlp_pci_lookup(const struct pci_attach_args *pa) 265 { 266 const struct tulip_pci_product *tpp; 267 268 /* Don't match lmc cards */ 269 if (PCI_VENDOR(pci_conf_read(pa->pa_pc, pa->pa_tag, 270 PCI_SUBSYS_ID_REG)) == PCI_VENDOR_LMC) 271 return NULL; 272 273 for (tpp = tlp_pci_products; 274 tlp_chip_names[tpp->tpp_chip] != NULL; 275 tpp++) { 276 if (PCI_VENDOR(pa->pa_id) == tpp->tpp_vendor && 277 PCI_PRODUCT(pa->pa_id) == tpp->tpp_product) 278 return tpp; 279 } 280 return NULL; 281 } 282 283 static void 284 tlp_pci_get_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr, 285 const struct tlp_pci_quirks *tpq) 286 { 287 288 for (; tpq->tpq_func != NULL; tpq++) { 289 if (tpq->tpq_oui[0] == enaddr[0] && 290 tpq->tpq_oui[1] == enaddr[1] && 291 tpq->tpq_oui[2] == enaddr[2]) { 292 (*tpq->tpq_func)(psc, enaddr); 293 return; 294 } 295 } 296 } 297 298 static void 299 tlp_pci_check_slaved(struct tulip_pci_softc *psc, int shared, int slaved) 300 { 301 extern struct cfdriver tlp_cd; 302 struct tulip_pci_softc *cur, *best = NULL; 303 struct tulip_softc *sc = &psc->sc_tulip; 304 int i; 305 306 /* 307 * First of all, find the lowest pcidev numbered device on our 308 * bus marked as shared. That should be our master. 309 */ 310 for (i = 0; i < tlp_cd.cd_ndevs; i++) { 311 if ((cur = tlp_cd.cd_devs[i]) == NULL) 312 continue; 313 if (device_parent(&cur->sc_tulip.sc_dev) != 314 device_parent(&sc->sc_dev)) 315 continue; 316 if ((cur->sc_flags & shared) == 0) 317 continue; 318 if (cur == psc) 319 continue; 320 if (best == NULL || 321 best->sc_tulip.sc_devno > cur->sc_tulip.sc_devno) 322 best = cur; 323 } 324 325 if (best != NULL) { 326 psc->sc_master = best; 327 psc->sc_flags |= (shared | slaved); 328 } 329 } 330 331 static int 332 tlp_pci_match(device_t parent, struct cfdata *match, void *aux) 333 { 334 struct pci_attach_args *pa = aux; 335 336 if (tlp_pci_lookup(pa) != NULL) 337 return 10; /* beat if_de.c */ 338 339 return 0; 340 } 341 342 static void 343 tlp_pci_attach(device_t parent, device_t self, void *aux) 344 { 345 struct tulip_pci_softc *psc = device_private(self); 346 struct tulip_softc *sc = &psc->sc_tulip; 347 struct pci_attach_args *pa = aux; 348 pci_chipset_tag_t pc = pa->pa_pc; 349 pci_intr_handle_t ih; 350 const char *intrstr = NULL; 351 bus_space_tag_t iot, memt; 352 bus_space_handle_t ioh, memh; 353 int ioh_valid, memh_valid, i, j; 354 const struct tulip_pci_product *tpp; 355 prop_data_t ea; 356 uint8_t enaddr[ETHER_ADDR_LEN]; 357 uint32_t val = 0; 358 pcireg_t reg; 359 int error; 360 361 sc->sc_devno = pa->pa_device; 362 psc->sc_pc = pa->pa_pc; 363 psc->sc_pcitag = pa->pa_tag; 364 365 LIST_INIT(&psc->sc_intrslaves); 366 367 tpp = tlp_pci_lookup(pa); 368 if (tpp == NULL) { 369 printf("\n"); 370 panic("tlp_pci_attach: impossible"); 371 } 372 sc->sc_chip = tpp->tpp_chip; 373 374 /* 375 * By default, Tulip registers are 8 bytes long (4 bytes 376 * followed by a 4 byte pad). 377 */ 378 sc->sc_regshift = 3; 379 380 /* 381 * No power management hooks. 382 * XXX Maybe we should add some! 383 */ 384 sc->sc_flags |= TULIPF_ENABLED; 385 386 /* 387 * Get revision info, and set some chip-specific variables. 388 */ 389 sc->sc_rev = PCI_REVISION(pa->pa_class); 390 switch (sc->sc_chip) { 391 case TULIP_CHIP_21140: 392 if (sc->sc_rev >= 0x20) 393 sc->sc_chip = TULIP_CHIP_21140A; 394 break; 395 396 case TULIP_CHIP_21142: 397 if (sc->sc_rev >= 0x20) 398 sc->sc_chip = TULIP_CHIP_21143; 399 break; 400 401 case TULIP_CHIP_82C168: 402 if (sc->sc_rev >= 0x20) 403 sc->sc_chip = TULIP_CHIP_82C169; 404 break; 405 406 case TULIP_CHIP_MX98713: 407 if (sc->sc_rev >= 0x10) 408 sc->sc_chip = TULIP_CHIP_MX98713A; 409 break; 410 411 case TULIP_CHIP_MX98715: 412 if (sc->sc_rev >= 0x20) 413 sc->sc_chip = TULIP_CHIP_MX98715A; 414 if (sc->sc_rev >= 0x25) 415 sc->sc_chip = TULIP_CHIP_MX98715AEC_X; 416 if (sc->sc_rev >= 0x30) 417 sc->sc_chip = TULIP_CHIP_MX98725; 418 break; 419 420 case TULIP_CHIP_WB89C840F: 421 sc->sc_regshift = 2; 422 break; 423 424 case TULIP_CHIP_AN985: 425 /* 426 * The AN983 and AN985 are very similar, and are 427 * differentiated by a "signature" register that 428 * is like, but not identical, to a PCI ID register. 429 */ 430 reg = pci_conf_read(pc, pa->pa_tag, 0x80); 431 switch (reg) { 432 case 0x09811317: 433 sc->sc_chip = TULIP_CHIP_AN985; 434 break; 435 436 case 0x09851317: 437 sc->sc_chip = TULIP_CHIP_AN983; 438 break; 439 440 default: 441 /* Unknown -- use default. */ 442 break; 443 } 444 break; 445 446 case TULIP_CHIP_AX88140: 447 if (sc->sc_rev >= 0x10) 448 sc->sc_chip = TULIP_CHIP_AX88141; 449 break; 450 451 case TULIP_CHIP_DM9102: 452 if (sc->sc_rev >= 0x30) 453 sc->sc_chip = TULIP_CHIP_DM9102A; 454 break; 455 456 default: 457 /* Nothing. */ 458 break; 459 } 460 461 printf(": %s Ethernet, pass %d.%d\n", 462 tlp_chip_names[sc->sc_chip], 463 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf); 464 465 switch (sc->sc_chip) { 466 case TULIP_CHIP_21040: 467 if (sc->sc_rev < 0x20) { 468 printf("%s: 21040 must be at least pass 2.0\n", 469 device_xname(&sc->sc_dev)); 470 return; 471 } 472 break; 473 474 case TULIP_CHIP_21140: 475 if (sc->sc_rev < 0x11) { 476 printf("%s: 21140 must be at least pass 1.1\n", 477 device_xname(&sc->sc_dev)); 478 return; 479 } 480 break; 481 482 default: 483 /* Nothing. */ 484 break; 485 } 486 487 /* 488 * Check to see if the device is in power-save mode, and 489 * being it out if necessary. 490 */ 491 switch (sc->sc_chip) { 492 case TULIP_CHIP_21140: 493 case TULIP_CHIP_21140A: 494 case TULIP_CHIP_21142: 495 case TULIP_CHIP_21143: 496 case TULIP_CHIP_MX98713A: 497 case TULIP_CHIP_MX98715: 498 case TULIP_CHIP_MX98715A: 499 case TULIP_CHIP_MX98715AEC_X: 500 case TULIP_CHIP_MX98725: 501 case TULIP_CHIP_DM9102: 502 case TULIP_CHIP_DM9102A: 503 case TULIP_CHIP_AX88140: 504 case TULIP_CHIP_AX88141: 505 case TULIP_CHIP_RS7112: 506 /* 507 * Clear the "sleep mode" bit in the CFDA register. 508 */ 509 reg = pci_conf_read(pc, pa->pa_tag, TULIP_PCI_CFDA); 510 if (reg & (CFDA_SLEEP|CFDA_SNOOZE)) 511 pci_conf_write(pc, pa->pa_tag, TULIP_PCI_CFDA, 512 reg & ~(CFDA_SLEEP|CFDA_SNOOZE)); 513 break; 514 515 default: 516 /* Nothing. */ 517 break; 518 } 519 520 /* power up chip */ 521 if ((error = pci_activate(pa->pa_pc, pa->pa_tag, self, 522 NULL)) && error != EOPNOTSUPP) { 523 aprint_error_dev(&sc->sc_dev, "cannot activate %d\n", 524 error); 525 return; 526 } 527 528 /* 529 * Map the device. 530 */ 531 532 ioh_valid = (pci_mapreg_map(pa, TULIP_PCI_IOBA, 533 PCI_MAPREG_TYPE_IO, 0, 534 &iot, &ioh, NULL, NULL) == 0); 535 memh_valid = (pci_mapreg_map(pa, TULIP_PCI_MMBA, 536 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 537 &memt, &memh, NULL, NULL) == 0); 538 if (memh_valid) { 539 sc->sc_st = memt; 540 sc->sc_sh = memh; 541 } else if (ioh_valid) { 542 sc->sc_st = iot; 543 sc->sc_sh = ioh; 544 } else { 545 aprint_error_dev(&sc->sc_dev, "unable to map device registers\n"); 546 return; 547 } 548 549 sc->sc_dmat = pa->pa_dmat; 550 551 /* 552 * Make sure bus mastering is enabled. 553 */ 554 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 555 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 556 PCI_COMMAND_MASTER_ENABLE); 557 558 /* 559 * Get the cacheline size. 560 */ 561 sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag, 562 PCI_BHLC_REG)); 563 564 /* 565 * Get PCI data moving command info. 566 */ 567 if (pa->pa_flags & PCI_FLAGS_MRL_OKAY) 568 sc->sc_flags |= TULIPF_MRL; 569 if (pa->pa_flags & PCI_FLAGS_MRM_OKAY) 570 sc->sc_flags |= TULIPF_MRM; 571 if (pa->pa_flags & PCI_FLAGS_MWI_OKAY) 572 sc->sc_flags |= TULIPF_MWI; 573 574 /* 575 * Read the contents of the Ethernet Address ROM/SROM. 576 */ 577 switch (sc->sc_chip) { 578 case TULIP_CHIP_21040: 579 sc->sc_srom_addrbits = 6; 580 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, M_NOWAIT); 581 TULIP_WRITE(sc, CSR_MIIROM, MIIROM_SROMCS); 582 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 583 for (j = 0; j < 10000; j++) { 584 val = TULIP_READ(sc, CSR_MIIROM); 585 if ((val & MIIROM_DN) == 0) 586 break; 587 } 588 sc->sc_srom[i] = val & MIIROM_DATA; 589 } 590 break; 591 592 case TULIP_CHIP_82C168: 593 case TULIP_CHIP_82C169: 594 { 595 sc->sc_srom_addrbits = 2; 596 sc->sc_srom = malloc(TULIP_ROM_SIZE(2), M_DEVBUF, M_NOWAIT); 597 598 /* 599 * The Lite-On PNIC stores the Ethernet address in 600 * the first 3 words of the EEPROM. EEPROM access 601 * is not like the other Tulip chips. 602 */ 603 for (i = 0; i < 6; i += 2) { 604 TULIP_WRITE(sc, CSR_PNIC_SROMCTL, 605 PNIC_SROMCTL_READ | (i >> 1)); 606 for (j = 0; j < 500; j++) { 607 delay(2); 608 val = TULIP_READ(sc, CSR_MIIROM); 609 if ((val & PNIC_MIIROM_BUSY) == 0) 610 break; 611 } 612 if (val & PNIC_MIIROM_BUSY) { 613 printf("%s: EEPROM timed out\n", 614 device_xname(&sc->sc_dev)); 615 return; 616 } 617 val &= PNIC_MIIROM_DATA; 618 sc->sc_srom[i] = val >> 8; 619 sc->sc_srom[i + 1] = val & 0xff; 620 } 621 break; 622 } 623 624 default: 625 /* 626 * XXX This isn't quite the right way to do this; we should 627 * XXX be attempting to fetch the mac-addr property in the 628 * XXX bus-agnostic part of the driver independently. But 629 * XXX that requires a larger change in the SROM handling 630 * XXX logic, and for now we can at least remove a machine- 631 * XXX dependent wart from the PCI front-end. 632 */ 633 ea = prop_dictionary_get(device_properties(&sc->sc_dev), 634 "mac-addr"); 635 if (ea != NULL) { 636 extern int tlp_srom_debug; 637 KASSERT(prop_object_type(ea) == PROP_TYPE_DATA); 638 KASSERT(prop_data_size(ea) == ETHER_ADDR_LEN); 639 640 memcpy(enaddr, prop_data_data_nocopy(ea), 641 ETHER_ADDR_LEN); 642 643 sc->sc_srom_addrbits = 6; 644 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, 645 M_NOWAIT|M_ZERO); 646 memcpy(sc->sc_srom, enaddr, sizeof(enaddr)); 647 if (tlp_srom_debug) { 648 printf("SROM CONTENTS:"); 649 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 650 if ((i % 8) == 0) 651 printf("\n\t"); 652 printf("0x%02x ", sc->sc_srom[i]); 653 } 654 printf("\n"); 655 } 656 break; 657 } 658 659 /* Check for a slaved ROM on a multi-port board. */ 660 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDROM, 661 TULIP_PCI_SLAVEROM); 662 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 663 sc->sc_srom_addrbits = 664 psc->sc_master->sc_tulip.sc_srom_addrbits; 665 sc->sc_srom = psc->sc_master->sc_tulip.sc_srom; 666 enaddr[5] += 667 sc->sc_devno - psc->sc_master->sc_tulip.sc_devno; 668 } 669 else if (tlp_read_srom(sc) == 0) 670 goto cant_cope; 671 break; 672 } 673 674 /* 675 * Deal with chip/board quirks. This includes setting up 676 * the mediasw, and extracting the Ethernet address from 677 * the rombuf. 678 */ 679 switch (sc->sc_chip) { 680 case TULIP_CHIP_21040: 681 /* 682 * Parse the Ethernet Address ROM. 683 */ 684 if (tlp_parse_old_srom(sc, enaddr) == 0) 685 goto cant_cope; 686 687 688 /* 689 * All 21040 boards start out with the same 690 * media switch. 691 */ 692 sc->sc_mediasw = &tlp_21040_mediasw; 693 694 /* 695 * Deal with any quirks this board might have. 696 */ 697 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21040_quirks); 698 break; 699 700 case TULIP_CHIP_21041: 701 /* Check for new format SROM. */ 702 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 703 /* 704 * Not an ISV SROM; try the old DEC Ethernet Address 705 * ROM format. 706 */ 707 if (tlp_parse_old_srom(sc, enaddr) == 0) 708 goto cant_cope; 709 } 710 711 /* 712 * All 21041 boards use the same media switch; they all 713 * work basically the same! Yippee! 714 */ 715 sc->sc_mediasw = &tlp_21041_mediasw; 716 717 /* 718 * Deal with any quirks this board might have. 719 */ 720 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21041_quirks); 721 break; 722 723 case TULIP_CHIP_21140: 724 case TULIP_CHIP_21140A: 725 /* Check for new format SROM. */ 726 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 727 /* 728 * Not an ISV SROM; try the old DEC Ethernet Address 729 * ROM format. 730 */ 731 if (tlp_parse_old_srom(sc, enaddr) == 0) 732 goto cant_cope; 733 } else { 734 /* 735 * We start out with the 2114x ISV media switch. 736 * When we search for quirks, we may change to 737 * a different switch. 738 */ 739 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 740 } 741 742 /* 743 * Deal with any quirks this board might have. 744 */ 745 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21140_quirks); 746 747 /* 748 * Bail out now if we can't deal with this board. 749 */ 750 if (sc->sc_mediasw == NULL) 751 goto cant_cope; 752 break; 753 754 case TULIP_CHIP_21142: 755 case TULIP_CHIP_21143: 756 /* Check for new format SROM. */ 757 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 758 /* 759 * Not an ISV SROM; try the old DEC Ethernet Address 760 * ROM format. 761 */ 762 if (tlp_parse_old_srom(sc, enaddr) == 0) { 763 /* 764 * One last try: just copy the address 765 * from offset 20 and try to look 766 * up quirks. 767 */ 768 memcpy(enaddr, &sc->sc_srom[20], 769 ETHER_ADDR_LEN); 770 } 771 } else { 772 /* 773 * We start out with the 2114x ISV media switch. 774 * When we search for quirks, we may change to 775 * a different switch. 776 */ 777 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 778 } 779 780 /* 781 * Deal with any quirks this board might have. 782 */ 783 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21142_quirks); 784 785 /* 786 * Bail out now if we can't deal with this board. 787 */ 788 if (sc->sc_mediasw == NULL) 789 goto cant_cope; 790 break; 791 792 case TULIP_CHIP_82C168: 793 case TULIP_CHIP_82C169: 794 /* 795 * Lite-On PNIC's Ethernet address is the first 6 796 * bytes of its EEPROM. 797 */ 798 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 799 800 /* 801 * Lite-On PNICs always use the same mediasw; we 802 * select MII vs. internal NWAY automatically. 803 */ 804 sc->sc_mediasw = &tlp_pnic_mediasw; 805 break; 806 807 case TULIP_CHIP_MX98713: 808 /* 809 * The Macronix MX98713 has an MII and GPIO, but no 810 * internal Nway block. This chip is basically a 811 * perfect 21140A clone, with the exception of the 812 * a magic register frobbing in order to make the 813 * interface function. 814 */ 815 if (tlp_isv_srom_enaddr(sc, enaddr)) { 816 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 817 break; 818 } 819 /* FALLTHROUGH */ 820 821 case TULIP_CHIP_82C115: 822 /* 823 * Yippee! The Lite-On 82C115 is a clone of 824 * the MX98725 (the data sheet even says `MXIC' 825 * on it)! Imagine that, a clone of a clone. 826 * 827 * The differences are really minimal: 828 * 829 * - Wake-On-LAN support 830 * - 128-bit multicast hash table, rather than 831 * the standard 512-bit hash table 832 */ 833 /* FALLTHROUGH */ 834 835 case TULIP_CHIP_MX98713A: 836 case TULIP_CHIP_MX98715A: 837 case TULIP_CHIP_MX98715AEC_X: 838 case TULIP_CHIP_MX98725: 839 /* 840 * The MX98713A has an MII as well as an internal Nway block, 841 * but no GPIO. The MX98715 and MX98725 have an internal 842 * Nway block only. 843 * 844 * The internal Nway block, unlike the Lite-On PNIC's, does 845 * just that - performs Nway. Once autonegotiation completes, 846 * we must program the GPR media information into the chip. 847 * 848 * The byte offset of the Ethernet address is stored at 849 * offset 0x70. 850 */ 851 memcpy(enaddr, &sc->sc_srom[sc->sc_srom[0x70]], ETHER_ADDR_LEN); 852 sc->sc_mediasw = &tlp_pmac_mediasw; 853 break; 854 855 case TULIP_CHIP_WB89C840F: 856 /* 857 * Winbond 89C840F's Ethernet address is the first 858 * 6 bytes of its EEPROM. 859 */ 860 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 861 862 /* 863 * Winbond 89C840F has an MII attached to the SIO. 864 */ 865 sc->sc_mediasw = &tlp_sio_mii_mediasw; 866 break; 867 868 case TULIP_CHIP_AL981: 869 /* 870 * The ADMtek AL981's Ethernet address is located 871 * at offset 8 of its EEPROM. 872 */ 873 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 874 875 /* 876 * ADMtek AL981 has a built-in PHY accessed through 877 * special registers. 878 */ 879 sc->sc_mediasw = &tlp_al981_mediasw; 880 break; 881 882 case TULIP_CHIP_AN983: 883 case TULIP_CHIP_AN985: 884 /* 885 * The ADMtek AN985's Ethernet address is located 886 * at offset 8 of its EEPROM. 887 */ 888 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 889 890 /* 891 * The ADMtek AN985 can be configured in Single-Chip 892 * mode or MAC-only mode. Single-Chip uses the built-in 893 * PHY, MAC-only has an external PHY (usually HomePNA). 894 * The selection is based on an EEPROM setting, and both 895 * PHYs are accessed via MII attached to SIO. 896 * 897 * The AN985 "ghosts" the internal PHY onto all 898 * MII addresses, so we have to use a media init 899 * routine that limits the search. 900 * XXX How does this work with MAC-only mode? 901 */ 902 sc->sc_mediasw = &tlp_an985_mediasw; 903 break; 904 905 case TULIP_CHIP_DM9102: 906 case TULIP_CHIP_DM9102A: 907 /* 908 * Some boards with the Davicom chip have an ISV 909 * SROM (mostly DM9102A boards -- trying to describe 910 * the HomePNA PHY, probably) although the data in 911 * them is generally wrong. Check for ISV format 912 * and grab the Ethernet address that way, and if 913 * that fails, fall back on grabbing it from an 914 * observed offset of 20 (which is where it would 915 * be in an ISV SROM anyhow, tho ISV can cope with 916 * multi-port boards). 917 */ 918 if (!tlp_isv_srom_enaddr(sc, enaddr)) { 919 #ifdef __sparc__ 920 if ((sc->sc_srom[20] == 0 && 921 sc->sc_srom[21] == 0 && 922 sc->sc_srom[22] == 0) || 923 (sc->sc_srom[20] == 0xff && 924 sc->sc_srom[21] == 0xff && 925 sc->sc_srom[22] == 0xff)) { 926 prom_getether(PCITAG_NODE(pa->pa_tag), enaddr); 927 } else 928 #endif 929 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN); 930 } 931 932 /* 933 * Davicom chips all have an internal MII interface 934 * and a built-in PHY. DM9102A also has a an external 935 * MII interface, usually with a HomePNA PHY attached 936 * to it. 937 */ 938 sc->sc_mediasw = &tlp_dm9102_mediasw; 939 break; 940 941 case TULIP_CHIP_AX88140: 942 case TULIP_CHIP_AX88141: 943 /* 944 * ASIX AX88140/AX88141 Ethernet Address is located at offset 945 * 20 of the SROM. 946 */ 947 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN); 948 949 /* 950 * ASIX AX88140A/AX88141 chip can have a built-in PHY or 951 * an external MII interface. 952 */ 953 sc->sc_mediasw = &tlp_asix_mediasw; 954 break; 955 956 case TULIP_CHIP_RS7112: 957 /* 958 * RS7112 Ethernet Address is located of offset 0x19a 959 * of the SROM 960 */ 961 memcpy(enaddr, &sc->sc_srom[0x19a], ETHER_ADDR_LEN); 962 963 /* RS7112 chip has a PHY at MII address 1 */ 964 sc->sc_mediasw = &tlp_rs7112_mediasw; 965 break; 966 967 default: 968 cant_cope: 969 printf("%s: sorry, unable to handle your board\n", 970 device_xname(&sc->sc_dev)); 971 return; 972 } 973 974 /* 975 * Handle shared interrupts. 976 */ 977 if (psc->sc_flags & TULIP_PCI_SHAREDINTR) { 978 if (psc->sc_master) 979 psc->sc_flags |= TULIP_PCI_SLAVEINTR; 980 else { 981 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDINTR, 982 TULIP_PCI_SLAVEINTR); 983 if (psc->sc_master == NULL) 984 psc->sc_master = psc; 985 } 986 LIST_INSERT_HEAD(&psc->sc_master->sc_intrslaves, 987 psc, sc_intrq); 988 } 989 990 if (psc->sc_flags & TULIP_PCI_SLAVEINTR) { 991 printf("%s: sharing interrupt with %s\n", 992 device_xname(&sc->sc_dev), 993 device_xname(&psc->sc_master->sc_tulip.sc_dev)); 994 } else { 995 /* 996 * Map and establish our interrupt. 997 */ 998 if (pci_intr_map(pa, &ih)) { 999 aprint_error_dev(&sc->sc_dev, "unable to map interrupt\n"); 1000 return; 1001 } 1002 intrstr = pci_intr_string(pc, ih); 1003 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, 1004 (psc->sc_flags & TULIP_PCI_SHAREDINTR) ? 1005 tlp_pci_shared_intr : tlp_intr, sc); 1006 if (psc->sc_ih == NULL) { 1007 aprint_error_dev(&sc->sc_dev, "unable to establish interrupt"); 1008 if (intrstr != NULL) 1009 printf(" at %s", intrstr); 1010 printf("\n"); 1011 return; 1012 } 1013 printf("%s: interrupting at %s\n", device_xname(&sc->sc_dev), 1014 intrstr); 1015 } 1016 1017 /* 1018 * Finish off the attach. 1019 */ 1020 tlp_attach(sc, enaddr); 1021 } 1022 1023 static int 1024 tlp_pci_shared_intr(void *arg) 1025 { 1026 struct tulip_pci_softc *master = arg, *slave; 1027 int rv = 0; 1028 1029 for (slave = LIST_FIRST(&master->sc_intrslaves); 1030 slave != NULL; 1031 slave = LIST_NEXT(slave, sc_intrq)) 1032 rv |= tlp_intr(&slave->sc_tulip); 1033 1034 return rv; 1035 } 1036 1037 static void 1038 tlp_pci_dec_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1039 { 1040 struct tulip_softc *sc = &psc->sc_tulip; 1041 1042 /* 1043 * This isn't really a quirk-gathering device, really. We 1044 * just want to get the spiffy DEC board name from the SROM. 1045 */ 1046 strcpy(sc->sc_name, "DEC "); 1047 1048 if (memcmp(&sc->sc_srom[29], "DE500", 5) == 0 || 1049 memcmp(&sc->sc_srom[29], "DE450", 5) == 0) 1050 memcpy(&sc->sc_name[4], &sc->sc_srom[29], 8); 1051 else 1052 sc->sc_name[3] = '\0'; 1053 } 1054 1055 static void 1056 tlp_pci_znyx_21040_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1057 { 1058 struct tulip_softc *sc = &psc->sc_tulip; 1059 uint16_t id = 0; 1060 1061 /* 1062 * If we have a slaved ROM, just copy the bits from the master. 1063 * This is in case we fail the ROM ID check (older boards) and 1064 * need to fall back on Ethernet address model checking; that 1065 * will fail for slave chips. 1066 */ 1067 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 1068 strcpy(sc->sc_name, psc->sc_master->sc_tulip.sc_name); 1069 sc->sc_mediasw = psc->sc_master->sc_tulip.sc_mediasw; 1070 psc->sc_flags |= 1071 psc->sc_master->sc_flags & TULIP_PCI_SHAREDINTR; 1072 return; 1073 } 1074 1075 if (sc->sc_srom[32] == 0x4a && sc->sc_srom[33] == 0x52) { 1076 id = sc->sc_srom[37] | (sc->sc_srom[36] << 8); 1077 switch (id) { 1078 zx312: 1079 case 0x0602: /* ZX312 */ 1080 strcpy(sc->sc_name, "ZNYX ZX312"); 1081 return; 1082 1083 case 0x0622: /* ZX312T */ 1084 strcpy(sc->sc_name, "ZNYX ZX312T"); 1085 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1086 return; 1087 1088 zx314_inta: 1089 case 0x0701: /* ZX314 INTA */ 1090 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1091 /* FALLTHROUGH */ 1092 case 0x0711: /* ZX314 */ 1093 strcpy(sc->sc_name, "ZNYX ZX314"); 1094 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1095 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1096 return; 1097 1098 zx315_inta: 1099 case 0x0801: /* ZX315 INTA */ 1100 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1101 /* FALLTHROUGH */ 1102 case 0x0811: /* ZX315 */ 1103 strcpy(sc->sc_name, "ZNYX ZX315"); 1104 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1105 return; 1106 1107 default: 1108 id = 0; 1109 break; 1110 } 1111 } 1112 1113 /* 1114 * Deal with boards that have broken ROMs. 1115 */ 1116 if (id == 0) { 1117 if ((enaddr[3] & ~3) == 0xf0 && (enaddr[5] & 3) == 0x00) 1118 goto zx314_inta; 1119 if ((enaddr[3] & ~3) == 0xf4 && (enaddr[5] & 1) == 0x00) 1120 goto zx315_inta; 1121 if ((enaddr[3] & ~3) == 0xec) 1122 goto zx312; 1123 } 1124 1125 strcpy(sc->sc_name, "ZNYX ZX31x"); 1126 } 1127 1128 static void tlp_pci_znyx_21142_qs6611_reset(struct tulip_softc *); 1129 1130 static void 1131 tlp_pci_znyx_21142_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1132 { 1133 struct tulip_softc *sc = &psc->sc_tulip; 1134 pcireg_t subid; 1135 1136 subid = pci_conf_read(psc->sc_pc, psc->sc_pcitag, PCI_SUBSYS_ID_REG); 1137 1138 if (PCI_VENDOR(subid) != PCI_VENDOR_ZNYX) 1139 return; /* ? */ 1140 1141 switch (PCI_PRODUCT(subid) & 0xff) { 1142 /* 1143 * ZNYX 21143 boards with QS6611 PHY 1144 */ 1145 case 0x12: /* ZX345Q */ 1146 case 0x13: /* ZX346Q */ 1147 case 0x14: /* ZX348Q */ 1148 case 0x18: /* ZX414 */ 1149 case 0x19: /* ZX412 */ 1150 case 0x1a: /* ZX444 */ 1151 case 0x1b: /* ZX442 */ 1152 case 0x23: /* ZX212 */ 1153 case 0x24: /* ZX214 */ 1154 case 0x29: /* ZX374 */ 1155 case 0x2d: /* ZX372 */ 1156 case 0x2b: /* ZX244 */ 1157 case 0x2c: /* ZX424 */ 1158 case 0x2e: /* ZX422 */ 1159 printf("%s: QS6611 PHY\n", device_xname(&sc->sc_dev)); 1160 sc->sc_reset = tlp_pci_znyx_21142_qs6611_reset; 1161 break; 1162 } 1163 } 1164 1165 static void 1166 tlp_pci_znyx_21142_qs6611_reset(struct tulip_softc *sc) 1167 { 1168 1169 /* 1170 * Reset QS6611 PHY. 1171 */ 1172 TULIP_WRITE(sc, CSR_SIAGEN, 1173 SIAGEN_CWE | SIAGEN_LGS1 | SIAGEN_ABM | (0xf << 16)); 1174 delay(200); 1175 TULIP_WRITE(sc, CSR_SIAGEN, (0x4 << 16)); 1176 delay(10000); 1177 } 1178 1179 static void 1180 tlp_pci_smc_21040_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1181 { 1182 struct tulip_softc *sc = &psc->sc_tulip; 1183 uint16_t id1, id2, ei; 1184 int auibnc = 0, utp = 0; 1185 char *cp; 1186 1187 id1 = sc->sc_srom[0x60] | (sc->sc_srom[0x61] << 8); 1188 id2 = sc->sc_srom[0x62] | (sc->sc_srom[0x63] << 8); 1189 ei = sc->sc_srom[0x66] | (sc->sc_srom[0x67] << 8); 1190 1191 strcpy(sc->sc_name, "SMC 8432"); 1192 cp = &sc->sc_name[8]; 1193 1194 if ((id1 & 1) == 0) { 1195 *cp++ = 'B'; 1196 auibnc = 1; 1197 } 1198 if ((id1 & 0xff) > 0x32) { 1199 *cp++ = 'T'; 1200 utp = 1; 1201 } 1202 if ((id1 & 0x4000) == 0) { 1203 *cp++ = 'A'; 1204 auibnc = 1; 1205 } 1206 if (id2 == 0x15) { 1207 sc->sc_name[7] = '4'; 1208 *cp++ = '-'; 1209 *cp++ = 'C'; 1210 *cp++ = 'H'; 1211 *cp++ = ei ? '2' : '1'; 1212 } 1213 *cp = '\0'; 1214 1215 if (utp != 0 && auibnc == 0) 1216 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1217 else if (utp == 0 && auibnc != 0) 1218 sc->sc_mediasw = &tlp_21040_auibnc_mediasw; 1219 } 1220 1221 static void 1222 tlp_pci_cogent_21040_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1223 { 1224 1225 strcpy(psc->sc_tulip.sc_name, "Cogent multi-port"); 1226 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1227 } 1228 1229 static void 1230 tlp_pci_accton_21040_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1231 { 1232 1233 strcpy(psc->sc_tulip.sc_name, "ACCTON EN1203"); 1234 } 1235 1236 static void tlp_pci_asante_21140_reset(struct tulip_softc *); 1237 1238 static void 1239 tlp_pci_asante_21140_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1240 { 1241 struct tulip_softc *sc = &psc->sc_tulip; 1242 1243 /* 1244 * Some Asante boards don't use the ISV SROM format. For 1245 * those that don't, we initialize the GPIO direction bits, 1246 * and provide our own reset hook, which resets the MII. 1247 * 1248 * All of these boards use SIO-attached-MII media. 1249 */ 1250 if (sc->sc_mediasw == &tlp_2114x_isv_mediasw) 1251 return; 1252 1253 strcpy(sc->sc_name, "Asante"); 1254 1255 sc->sc_gp_dir = 0xbf; 1256 sc->sc_reset = tlp_pci_asante_21140_reset; 1257 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1258 } 1259 1260 static void 1261 tlp_pci_e100_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1262 { 1263 struct tulip_softc *sc = &psc->sc_tulip; 1264 1265 if (sc->sc_mediasw == &tlp_2114x_isv_mediasw) 1266 return; 1267 1268 strcpy(sc->sc_name, "UMAX E100"); 1269 1270 sc->sc_gp_dir = 0xbf; 1271 sc->sc_reset = tlp_pci_asante_21140_reset; 1272 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1273 } 1274 1275 static void 1276 tlp_pci_asante_21140_reset(struct tulip_softc *sc) 1277 { 1278 1279 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1280 TULIP_WRITE(sc, CSR_GPP, 0x8); 1281 delay(100); 1282 TULIP_WRITE(sc, CSR_GPP, 0); 1283 } 1284 1285 static void tlp_pci_phobos_21140_reset(struct tulip_softc *); 1286 1287 static void 1288 tlp_pci_phobos_21140_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1289 { 1290 struct tulip_softc *sc = &psc->sc_tulip; 1291 1292 /* 1293 * Phobo boards just use MII-on_SIO. 1294 */ 1295 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1296 sc->sc_reset = tlp_pci_phobos_21140_reset; 1297 1298 /* 1299 * These boards appear solely on sgimips machines behind a special 1300 * GIO<->PCI ASIC and require the DBO and BLE bits to be set in CSR0. 1301 */ 1302 sc->sc_flags |= (TULIPF_BLE | TULIPF_DBO); 1303 } 1304 1305 static void 1306 tlp_pci_phobos_21140_reset(struct tulip_softc *sc) 1307 { 1308 1309 TULIP_WRITE(sc, CSR_GPP, 0x1fd); 1310 delay(10); 1311 TULIP_WRITE(sc, CSR_GPP, 0xfd); 1312 delay(10); 1313 TULIP_WRITE(sc, CSR_GPP, 0); 1314 } 1315 1316 /* 1317 * SMC 9332DST media switch. 1318 */ 1319 static void tlp_smc9332dst_tmsw_init(struct tulip_softc *); 1320 1321 static const struct tulip_mediasw tlp_smc9332dst_mediasw = { 1322 tlp_smc9332dst_tmsw_init, 1323 tlp_21140_gpio_get, 1324 tlp_21140_gpio_set 1325 }; 1326 1327 static void 1328 tlp_pci_smc_21140_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1329 { 1330 struct tulip_softc *sc = &psc->sc_tulip; 1331 1332 if (sc->sc_mediasw != NULL) { 1333 return; 1334 } 1335 strcpy(psc->sc_tulip.sc_name, "SMC 9332DST"); 1336 sc->sc_mediasw = &tlp_smc9332dst_mediasw; 1337 } 1338 1339 static void 1340 tlp_smc9332dst_tmsw_init(struct tulip_softc *sc) 1341 { 1342 struct tulip_21x4x_media *tm; 1343 const char *sep = ""; 1344 uint32_t reg; 1345 int i, cnt; 1346 1347 sc->sc_gp_dir = GPP_SMC9332DST_PINS; 1348 sc->sc_opmode = OPMODE_MBO | OPMODE_PS; 1349 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 1350 1351 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 1352 tlp_mediastatus); 1353 printf("%s: ", device_xname(&sc->sc_dev)); 1354 1355 #define ADD(m, c) \ 1356 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK|M_ZERO); \ 1357 tm->tm_opmode = (c); \ 1358 tm->tm_gpdata = GPP_SMC9332DST_INIT; \ 1359 ifmedia_add(&sc->sc_mii.mii_media, (m), 0, tm) 1360 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 1361 1362 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0), OPMODE_TTM); 1363 PRINT("10baseT"); 1364 1365 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, 0), 1366 OPMODE_TTM | OPMODE_FD); 1367 PRINT("10baseT-FDX"); 1368 1369 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 1370 OPMODE_PS | OPMODE_PCS | OPMODE_SCR); 1371 PRINT("100baseTX"); 1372 1373 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, 0), 1374 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD); 1375 PRINT("100baseTX-FDX"); 1376 1377 #undef ADD 1378 #undef PRINT 1379 1380 printf("\n"); 1381 1382 tlp_reset(sc); 1383 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode | OPMODE_PCS | OPMODE_SCR); 1384 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1385 delay(10); 1386 TULIP_WRITE(sc, CSR_GPP, GPP_SMC9332DST_INIT); 1387 delay(200000); 1388 cnt = 0; 1389 for (i = 1000; i > 0; i--) { 1390 reg = TULIP_READ(sc, CSR_GPP); 1391 if ((~reg & (GPP_SMC9332DST_OK10 | 1392 GPP_SMC9332DST_OK100)) == 0) { 1393 if (cnt++ > 100) { 1394 break; 1395 } 1396 } else if ((reg & GPP_SMC9332DST_OK10) == 0) { 1397 break; 1398 } else { 1399 cnt = 0; 1400 } 1401 delay(1000); 1402 } 1403 if (cnt > 100) { 1404 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX); 1405 } else { 1406 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 1407 } 1408 } 1409 1410 static void 1411 tlp_pci_vpc_21140_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1412 { 1413 struct tulip_softc *sc = &psc->sc_tulip; 1414 char *p1 = (char *) &sc->sc_srom[32]; 1415 char *p2 = &sc->sc_name[0]; 1416 1417 do { 1418 if ((unsigned char) *p1 & 0x80) 1419 *p2++ = ' '; 1420 else 1421 *p2++ = *p1; 1422 } while (*p1++); 1423 } 1424 1425 static void tlp_pci_cobalt_21142_reset(struct tulip_softc *); 1426 1427 static void 1428 tlp_pci_cobalt_21142_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1429 { 1430 struct tulip_softc *sc = &psc->sc_tulip; 1431 1432 /* 1433 * Cobalt Networks interfaces are just MII-on-SIO. 1434 */ 1435 sc->sc_reset = tlp_pci_cobalt_21142_reset; 1436 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1437 1438 /* 1439 * The Cobalt systems tend to fall back to store-and-forward 1440 * pretty quickly, so we select that from the beginning to 1441 * avoid initial timeouts. 1442 */ 1443 sc->sc_txthresh = TXTH_SF; 1444 } 1445 1446 static void 1447 tlp_pci_cobalt_21142_reset(struct tulip_softc *sc) 1448 { 1449 1450 /* 1451 * Reset PHY. 1452 */ 1453 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE | (1 << 16)); 1454 delay(10); 1455 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE); 1456 delay(10); 1457 } 1458 1459 static void 1460 tlp_pci_algor_21142_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1461 { 1462 struct tulip_softc *sc = &psc->sc_tulip; 1463 1464 /* 1465 * Algorithmics boards just have MII-on-SIO. 1466 * 1467 * XXX They also have AUI on the serial interface. 1468 * XXX Deal with this. 1469 */ 1470 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1471 } 1472 1473 /* 1474 * Cogent EM1x0 (aka. Adaptec ANA-6910) media switch. 1475 */ 1476 static void tlp_cogent_em1x0_tmsw_init(struct tulip_softc *); 1477 1478 static const struct tulip_mediasw tlp_cogent_em1x0_mediasw = { 1479 tlp_cogent_em1x0_tmsw_init, 1480 tlp_21140_gpio_get, 1481 tlp_21140_gpio_set 1482 }; 1483 1484 static void 1485 tlp_pci_adaptec_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1486 { 1487 struct tulip_softc *sc = &psc->sc_tulip; 1488 uint8_t *srom = sc->sc_srom, id0; 1489 uint16_t id1, id2; 1490 1491 if (sc->sc_mediasw == NULL) { 1492 id0 = srom[32]; 1493 switch (id0) { 1494 case 0x12: 1495 strcpy(psc->sc_tulip.sc_name, "Cogent EM100TX"); 1496 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1497 break; 1498 1499 case 0x15: 1500 strcpy(psc->sc_tulip.sc_name, "Cogent EM100FX"); 1501 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1502 break; 1503 1504 #if 0 1505 case XXX: 1506 strcpy(psc->sc_tulip.sc_name, "Cogent EM110TX"); 1507 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1508 break; 1509 #endif 1510 1511 default: 1512 printf("%s: unknown Cogent board ID 0x%02x\n", 1513 device_xname(&sc->sc_dev), id0); 1514 } 1515 return; 1516 } 1517 1518 id1 = TULIP_ROM_GETW(srom, 0); 1519 id2 = TULIP_ROM_GETW(srom, 2); 1520 if (id1 != 0x1109) { 1521 goto unknown; 1522 } 1523 1524 switch (id2) { 1525 case 0x1900: 1526 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911"); 1527 break; 1528 1529 case 0x2400: 1530 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6944A"); 1531 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1532 break; 1533 1534 case 0x2b00: 1535 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911A"); 1536 break; 1537 1538 case 0x3000: 1539 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6922"); 1540 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1541 break; 1542 1543 default: 1544 unknown: 1545 printf("%s: unknown Adaptec/Cogent board ID 0x%04x/0x%04x\n", 1546 device_xname(&sc->sc_dev), id1, id2); 1547 } 1548 } 1549 1550 static void 1551 tlp_cogent_em1x0_tmsw_init(struct tulip_softc *sc) 1552 { 1553 struct tulip_21x4x_media *tm; 1554 const char *sep = ""; 1555 1556 sc->sc_gp_dir = GPP_COGENT_EM1x0_PINS; 1557 sc->sc_opmode = OPMODE_MBO | OPMODE_PS; 1558 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 1559 1560 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 1561 tlp_mediastatus); 1562 printf("%s: ", device_xname(&sc->sc_dev)); 1563 1564 #define ADD(m, c) \ 1565 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK|M_ZERO); \ 1566 tm->tm_opmode = (c); \ 1567 tm->tm_gpdata = GPP_COGENT_EM1x0_INIT; \ 1568 ifmedia_add(&sc->sc_mii.mii_media, (m), 0, tm) 1569 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 1570 1571 if (sc->sc_srom[32] == 0x15) { 1572 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, 0, 0), 1573 OPMODE_PS | OPMODE_PCS); 1574 PRINT("100baseFX"); 1575 1576 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0), 1577 OPMODE_PS | OPMODE_PCS | OPMODE_FD); 1578 PRINT("100baseFX-FDX"); 1579 printf("\n"); 1580 1581 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_FX); 1582 } else { 1583 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 1584 OPMODE_PS | OPMODE_PCS | OPMODE_SCR); 1585 PRINT("100baseTX"); 1586 1587 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0), 1588 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD); 1589 PRINT("100baseTX-FDX"); 1590 printf("\n"); 1591 1592 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX); 1593 } 1594 1595 #undef ADD 1596 #undef PRINT 1597 } 1598 1599 static void tlp_pci_netwinder_21142_reset(struct tulip_softc *); 1600 1601 static void 1602 tlp_pci_netwinder_21142_quirks(struct tulip_pci_softc *psc, 1603 const uint8_t *enaddr) 1604 { 1605 struct tulip_softc *sc = &psc->sc_tulip; 1606 1607 /* 1608 * Netwinders just use MII-on_SIO. 1609 */ 1610 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1611 sc->sc_reset = tlp_pci_netwinder_21142_reset; 1612 } 1613 1614 void 1615 tlp_pci_netwinder_21142_reset(struct tulip_softc *sc) 1616 { 1617 1618 /* 1619 * Reset the PHY. 1620 */ 1621 TULIP_WRITE(sc, CSR_SIAGEN, 0x0821 << 16); 1622 delay(10); 1623 TULIP_WRITE(sc, CSR_SIAGEN, 0x0000 << 16); 1624 delay(10); 1625 TULIP_WRITE(sc, CSR_SIAGEN, 0x0001 << 16); 1626 delay(10); 1627 } 1628 1629 static void tlp_pci_phobos_21142_reset(struct tulip_softc *); 1630 1631 static void 1632 tlp_pci_phobos_21142_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1633 { 1634 struct tulip_softc *sc = &psc->sc_tulip; 1635 1636 /* 1637 * Phobo boards just use MII-on_SIO. 1638 */ 1639 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1640 sc->sc_reset = tlp_pci_phobos_21142_reset; 1641 1642 /* 1643 * These boards appear solely on sgimips machines behind a special 1644 * GIO<->PCI ASIC and require the DBO and BLE bits to be set in CSR0. 1645 */ 1646 sc->sc_flags |= (TULIPF_BLE | TULIPF_DBO); 1647 } 1648 1649 static void 1650 tlp_pci_phobos_21142_reset(struct tulip_softc *sc) 1651 { 1652 /* 1653 * Reset PHY. 1654 */ 1655 TULIP_WRITE(sc, CSR_SIAGEN, (0x880f << 16)); 1656 delay(10); 1657 TULIP_WRITE(sc, CSR_SIAGEN, (0x800f << 16)); 1658 delay(10); 1659 } 1660
Indexes created Wed Oct 01 13:09:50 GMT 2025