if_tlp_pci.c revision 1.107
1 /* $NetBSD: if_tlp_pci.c,v 1.107 2009/04/17 10:20:32 cegger Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center; and Charles M. Hannum. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * PCI bus front-end for the Digital Semiconductor ``Tulip'' (21x4x) 35 * Ethernet controller family driver. 36 */ 37 38 #include <sys/cdefs.h> 39 __KERNEL_RCSID(0, "$NetBSD: if_tlp_pci.c,v 1.107 2009/04/17 10:20:32 cegger Exp $"); 40 41 #include <sys/param.h> 42 #include <sys/systm.h> 43 #include <sys/mbuf.h> 44 #include <sys/malloc.h> 45 #include <sys/kernel.h> 46 #include <sys/socket.h> 47 #include <sys/ioctl.h> 48 #include <sys/errno.h> 49 #include <sys/device.h> 50 51 #include <machine/endian.h> 52 53 #include <net/if.h> 54 #include <net/if_dl.h> 55 #include <net/if_media.h> 56 #include <net/if_ether.h> 57 58 #include <sys/bus.h> 59 #include <sys/intr.h> 60 #ifdef __sparc__ 61 #include <machine/promlib.h> 62 #endif 63 64 #include <dev/mii/miivar.h> 65 #include <dev/mii/mii_bitbang.h> 66 67 #include <dev/ic/tulipreg.h> 68 #include <dev/ic/tulipvar.h> 69 70 #include <dev/pci/pcivar.h> 71 #include <dev/pci/pcireg.h> 72 #include <dev/pci/pcidevs.h> 73 74 /* 75 * PCI configuration space registers used by the Tulip. 76 */ 77 #define TULIP_PCI_IOBA 0x10 /* i/o mapped base */ 78 #define TULIP_PCI_MMBA 0x14 /* memory mapped base */ 79 #define TULIP_PCI_CFDA 0x40 /* configuration driver area */ 80 81 #define CFDA_SLEEP 0x80000000 /* sleep mode */ 82 #define CFDA_SNOOZE 0x40000000 /* snooze mode */ 83 84 struct tulip_pci_softc { 85 struct tulip_softc sc_tulip; /* real Tulip softc */ 86 87 /* PCI-specific goo. */ 88 void *sc_ih; /* interrupt handle */ 89 90 pci_chipset_tag_t sc_pc; /* our PCI chipset */ 91 pcitag_t sc_pcitag; /* our PCI tag */ 92 93 int sc_flags; /* flags; see below */ 94 95 LIST_HEAD(, tulip_pci_softc) sc_intrslaves; 96 LIST_ENTRY(tulip_pci_softc) sc_intrq; 97 98 /* Our {ROM,interrupt} master. */ 99 struct tulip_pci_softc *sc_master; 100 }; 101 102 /* sc_flags */ 103 #define TULIP_PCI_SHAREDINTR 0x01 /* interrupt is shared */ 104 #define TULIP_PCI_SLAVEINTR 0x02 /* interrupt is slave */ 105 #define TULIP_PCI_SHAREDROM 0x04 /* ROM is shared */ 106 #define TULIP_PCI_SLAVEROM 0x08 /* slave of shared ROM */ 107 108 static int tlp_pci_match(device_t, struct cfdata *, void *); 109 static void tlp_pci_attach(device_t, device_t, void *); 110 111 CFATTACH_DECL_NEW(tlp_pci, sizeof(struct tulip_pci_softc), 112 tlp_pci_match, tlp_pci_attach, NULL, NULL); 113 114 static const struct tulip_pci_product { 115 uint32_t tpp_vendor; /* PCI vendor ID */ 116 uint32_t tpp_product; /* PCI product ID */ 117 tulip_chip_t tpp_chip; /* base Tulip chip type */ 118 } tlp_pci_products[] = { 119 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21040, 120 TULIP_CHIP_21040 }, 121 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21041, 122 TULIP_CHIP_21041 }, 123 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21140, 124 TULIP_CHIP_21140 }, 125 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142, 126 TULIP_CHIP_21142 }, 127 128 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C168, 129 TULIP_CHIP_82C168 }, 130 131 /* 132 * Note: This is like a MX98725 with Wake-On-LAN and a 133 * 128-bit multicast hash table. 134 */ 135 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C115, 136 TULIP_CHIP_82C115 }, 137 138 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98713, 139 TULIP_CHIP_MX98713 }, 140 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX987x5, 141 TULIP_CHIP_MX98715 }, 142 143 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100TX, 144 TULIP_CHIP_MX98713 }, 145 146 { PCI_VENDOR_WINBOND, PCI_PRODUCT_WINBOND_W89C840F, 147 TULIP_CHIP_WB89C840F }, 148 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100ATX, 149 TULIP_CHIP_WB89C840F }, 150 151 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9102, 152 TULIP_CHIP_DM9102 }, 153 154 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AL981, 155 TULIP_CHIP_AL981 }, 156 157 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN983, 158 TULIP_CHIP_AN985 }, 159 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_ADM9511, 160 TULIP_CHIP_AN985 }, 161 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_ADM9513, 162 TULIP_CHIP_AN985 }, 163 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN2242, 164 TULIP_CHIP_AN985 }, 165 166 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C910SOHOB, 167 TULIP_CHIP_AN985 }, 168 169 { PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX88140A, 170 TULIP_CHIP_AX88140 }, 171 172 { PCI_VENDOR_CONEXANT, PCI_PRODUCT_CONEXANT_LANFINITY, 173 TULIP_CHIP_RS7112 }, 174 175 { 0, 0, 176 TULIP_CHIP_INVALID }, 177 }; 178 179 struct tlp_pci_quirks { 180 void (*tpq_func)(struct tulip_pci_softc *, 181 const uint8_t *); 182 uint8_t tpq_oui[3]; 183 }; 184 185 static void tlp_pci_dec_quirks(struct tulip_pci_softc *, 186 const uint8_t *); 187 188 static void tlp_pci_znyx_21040_quirks(struct tulip_pci_softc *, 189 const uint8_t *); 190 static void tlp_pci_smc_21040_quirks(struct tulip_pci_softc *, 191 const uint8_t *); 192 static void tlp_pci_cogent_21040_quirks(struct tulip_pci_softc *, 193 const uint8_t *); 194 static void tlp_pci_accton_21040_quirks(struct tulip_pci_softc *, 195 const uint8_t *); 196 197 static void tlp_pci_cobalt_21142_quirks(struct tulip_pci_softc *, 198 const uint8_t *); 199 static void tlp_pci_algor_21142_quirks(struct tulip_pci_softc *, 200 const uint8_t *); 201 static void tlp_pci_netwinder_21142_quirks(struct tulip_pci_softc *, 202 const uint8_t *); 203 static void tlp_pci_phobos_21142_quirks(struct tulip_pci_softc *, 204 const uint8_t *); 205 static void tlp_pci_znyx_21142_quirks(struct tulip_pci_softc *, 206 const uint8_t *); 207 208 static void tlp_pci_adaptec_quirks(struct tulip_pci_softc *, 209 const uint8_t *); 210 211 static const struct tlp_pci_quirks tlp_pci_21040_quirks[] = { 212 { tlp_pci_znyx_21040_quirks, { 0x00, 0xc0, 0x95 } }, 213 { tlp_pci_smc_21040_quirks, { 0x00, 0x00, 0xc0 } }, 214 { tlp_pci_cogent_21040_quirks, { 0x00, 0x00, 0x92 } }, 215 { tlp_pci_accton_21040_quirks, { 0x00, 0x00, 0xe8 } }, 216 { NULL, { 0, 0, 0 } } 217 }; 218 219 static const struct tlp_pci_quirks tlp_pci_21041_quirks[] = { 220 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 221 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 222 { NULL, { 0, 0, 0 } } 223 }; 224 225 static void tlp_pci_asante_21140_quirks(struct tulip_pci_softc *, 226 const uint8_t *); 227 static void tlp_pci_e100_quirks(struct tulip_pci_softc *, 228 const uint8_t *); 229 static void tlp_pci_phobos_21140_quirks(struct tulip_pci_softc *, 230 const uint8_t *); 231 static void tlp_pci_smc_21140_quirks(struct tulip_pci_softc *, 232 const uint8_t *); 233 static void tlp_pci_vpc_21140_quirks(struct tulip_pci_softc *, 234 const uint8_t *); 235 236 static const struct tlp_pci_quirks tlp_pci_21140_quirks[] = { 237 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 238 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 239 { tlp_pci_e100_quirks, { 0x00, 0xa0, 0x59 } }, 240 { tlp_pci_asante_21140_quirks, { 0x00, 0x00, 0x94 } }, 241 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0x92 } }, 242 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } }, 243 { tlp_pci_phobos_21140_quirks, { 0x00, 0x60, 0xf5 } }, 244 { tlp_pci_smc_21140_quirks, { 0x00, 0x00, 0xc0 } }, 245 { tlp_pci_vpc_21140_quirks, { 0x00, 0x03, 0xff } }, 246 { NULL, { 0, 0, 0 } } 247 }; 248 249 static const struct tlp_pci_quirks tlp_pci_21142_quirks[] = { 250 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 251 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 252 { tlp_pci_cobalt_21142_quirks, { 0x00, 0x10, 0xe0 } }, 253 { tlp_pci_algor_21142_quirks, { 0x00, 0x40, 0xbc } }, 254 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } }, 255 { tlp_pci_netwinder_21142_quirks,{ 0x00, 0x10, 0x57 } }, 256 { tlp_pci_phobos_21142_quirks, { 0x00, 0x60, 0xf5 } }, 257 { tlp_pci_znyx_21142_quirks, { 0x00, 0xc0, 0x95 } }, 258 { NULL, { 0, 0, 0 } } 259 }; 260 261 static int tlp_pci_shared_intr(void *); 262 263 static const struct tulip_pci_product * 264 tlp_pci_lookup(const struct pci_attach_args *pa) 265 { 266 const struct tulip_pci_product *tpp; 267 268 /* Don't match lmc cards */ 269 if (PCI_VENDOR(pci_conf_read(pa->pa_pc, pa->pa_tag, 270 PCI_SUBSYS_ID_REG)) == PCI_VENDOR_LMC) 271 return NULL; 272 273 for (tpp = tlp_pci_products; 274 tlp_chip_names[tpp->tpp_chip] != NULL; 275 tpp++) { 276 if (PCI_VENDOR(pa->pa_id) == tpp->tpp_vendor && 277 PCI_PRODUCT(pa->pa_id) == tpp->tpp_product) 278 return tpp; 279 } 280 return NULL; 281 } 282 283 static void 284 tlp_pci_get_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr, 285 const struct tlp_pci_quirks *tpq) 286 { 287 288 for (; tpq->tpq_func != NULL; tpq++) { 289 if (tpq->tpq_oui[0] == enaddr[0] && 290 tpq->tpq_oui[1] == enaddr[1] && 291 tpq->tpq_oui[2] == enaddr[2]) { 292 (*tpq->tpq_func)(psc, enaddr); 293 return; 294 } 295 } 296 } 297 298 static void 299 tlp_pci_check_slaved(struct tulip_pci_softc *psc, int shared, int slaved) 300 { 301 extern struct cfdriver tlp_cd; 302 struct tulip_pci_softc *cur, *best = NULL; 303 struct tulip_softc *sc = &psc->sc_tulip; 304 int i; 305 306 /* 307 * First of all, find the lowest pcidev numbered device on our 308 * bus marked as shared. That should be our master. 309 */ 310 for (i = 0; i < tlp_cd.cd_ndevs; i++) { 311 if ((cur = device_lookup_private(&tlp_cd, i)) == NULL) 312 continue; 313 if (device_parent(cur->sc_tulip.sc_dev) != 314 device_parent(sc->sc_dev)) 315 continue; 316 if ((cur->sc_flags & shared) == 0) 317 continue; 318 if (cur == psc) 319 continue; 320 if (best == NULL || 321 best->sc_tulip.sc_devno > cur->sc_tulip.sc_devno) 322 best = cur; 323 } 324 325 if (best != NULL) { 326 psc->sc_master = best; 327 psc->sc_flags |= (shared | slaved); 328 } 329 } 330 331 static int 332 tlp_pci_match(device_t parent, cfdata_t match, void *aux) 333 { 334 struct pci_attach_args *pa = aux; 335 336 if (tlp_pci_lookup(pa) != NULL) 337 return 10; /* beat if_de.c */ 338 339 return 0; 340 } 341 342 static void 343 tlp_pci_attach(device_t parent, device_t self, void *aux) 344 { 345 struct tulip_pci_softc *psc = device_private(self); 346 struct tulip_softc *sc = &psc->sc_tulip; 347 struct pci_attach_args *pa = aux; 348 pci_chipset_tag_t pc = pa->pa_pc; 349 pci_intr_handle_t ih; 350 const char *intrstr = NULL; 351 bus_space_tag_t iot, memt; 352 bus_space_handle_t ioh, memh; 353 int ioh_valid, memh_valid, i, j; 354 const struct tulip_pci_product *tpp; 355 prop_data_t ea; 356 uint8_t enaddr[ETHER_ADDR_LEN]; 357 uint32_t val = 0; 358 pcireg_t reg; 359 int error; 360 361 sc->sc_dev = self; 362 sc->sc_devno = pa->pa_device; 363 psc->sc_pc = pa->pa_pc; 364 psc->sc_pcitag = pa->pa_tag; 365 366 LIST_INIT(&psc->sc_intrslaves); 367 368 tpp = tlp_pci_lookup(pa); 369 if (tpp == NULL) { 370 printf("\n"); 371 panic("tlp_pci_attach: impossible"); 372 } 373 sc->sc_chip = tpp->tpp_chip; 374 375 /* 376 * By default, Tulip registers are 8 bytes long (4 bytes 377 * followed by a 4 byte pad). 378 */ 379 sc->sc_regshift = 3; 380 381 /* 382 * No power management hooks. 383 * XXX Maybe we should add some! 384 */ 385 sc->sc_flags |= TULIPF_ENABLED; 386 387 /* 388 * Get revision info, and set some chip-specific variables. 389 */ 390 sc->sc_rev = PCI_REVISION(pa->pa_class); 391 switch (sc->sc_chip) { 392 case TULIP_CHIP_21140: 393 if (sc->sc_rev >= 0x20) 394 sc->sc_chip = TULIP_CHIP_21140A; 395 break; 396 397 case TULIP_CHIP_21142: 398 if (sc->sc_rev >= 0x20) 399 sc->sc_chip = TULIP_CHIP_21143; 400 break; 401 402 case TULIP_CHIP_82C168: 403 if (sc->sc_rev >= 0x20) 404 sc->sc_chip = TULIP_CHIP_82C169; 405 break; 406 407 case TULIP_CHIP_MX98713: 408 if (sc->sc_rev >= 0x10) 409 sc->sc_chip = TULIP_CHIP_MX98713A; 410 break; 411 412 case TULIP_CHIP_MX98715: 413 if (sc->sc_rev >= 0x20) 414 sc->sc_chip = TULIP_CHIP_MX98715A; 415 if (sc->sc_rev >= 0x25) 416 sc->sc_chip = TULIP_CHIP_MX98715AEC_X; 417 if (sc->sc_rev >= 0x30) 418 sc->sc_chip = TULIP_CHIP_MX98725; 419 break; 420 421 case TULIP_CHIP_WB89C840F: 422 sc->sc_regshift = 2; 423 break; 424 425 case TULIP_CHIP_AN985: 426 /* 427 * The AN983 and AN985 are very similar, and are 428 * differentiated by a "signature" register that 429 * is like, but not identical, to a PCI ID register. 430 */ 431 reg = pci_conf_read(pc, pa->pa_tag, 0x80); 432 switch (reg) { 433 case 0x09811317: 434 sc->sc_chip = TULIP_CHIP_AN985; 435 break; 436 437 case 0x09851317: 438 sc->sc_chip = TULIP_CHIP_AN983; 439 break; 440 441 default: 442 /* Unknown -- use default. */ 443 break; 444 } 445 break; 446 447 case TULIP_CHIP_AX88140: 448 if (sc->sc_rev >= 0x10) 449 sc->sc_chip = TULIP_CHIP_AX88141; 450 break; 451 452 case TULIP_CHIP_DM9102: 453 if (sc->sc_rev >= 0x30) 454 sc->sc_chip = TULIP_CHIP_DM9102A; 455 break; 456 457 default: 458 /* Nothing. */ 459 break; 460 } 461 462 printf(": %s Ethernet, pass %d.%d\n", 463 tlp_chip_names[sc->sc_chip], 464 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf); 465 466 switch (sc->sc_chip) { 467 case TULIP_CHIP_21040: 468 if (sc->sc_rev < 0x20) { 469 printf("%s: 21040 must be at least pass 2.0\n", 470 device_xname(self)); 471 return; 472 } 473 break; 474 475 case TULIP_CHIP_21140: 476 if (sc->sc_rev < 0x11) { 477 printf("%s: 21140 must be at least pass 1.1\n", 478 device_xname(self)); 479 return; 480 } 481 break; 482 483 default: 484 /* Nothing. */ 485 break; 486 } 487 488 /* 489 * Check to see if the device is in power-save mode, and 490 * being it out if necessary. 491 */ 492 switch (sc->sc_chip) { 493 case TULIP_CHIP_21140: 494 case TULIP_CHIP_21140A: 495 case TULIP_CHIP_21142: 496 case TULIP_CHIP_21143: 497 case TULIP_CHIP_MX98713A: 498 case TULIP_CHIP_MX98715: 499 case TULIP_CHIP_MX98715A: 500 case TULIP_CHIP_MX98715AEC_X: 501 case TULIP_CHIP_MX98725: 502 case TULIP_CHIP_DM9102: 503 case TULIP_CHIP_DM9102A: 504 case TULIP_CHIP_AX88140: 505 case TULIP_CHIP_AX88141: 506 case TULIP_CHIP_RS7112: 507 /* 508 * Clear the "sleep mode" bit in the CFDA register. 509 */ 510 reg = pci_conf_read(pc, pa->pa_tag, TULIP_PCI_CFDA); 511 if (reg & (CFDA_SLEEP|CFDA_SNOOZE)) 512 pci_conf_write(pc, pa->pa_tag, TULIP_PCI_CFDA, 513 reg & ~(CFDA_SLEEP|CFDA_SNOOZE)); 514 break; 515 516 default: 517 /* Nothing. */ 518 break; 519 } 520 521 /* power up chip */ 522 if ((error = pci_activate(pa->pa_pc, pa->pa_tag, self, 523 NULL)) && error != EOPNOTSUPP) { 524 aprint_error_dev(self, "cannot activate %d\n", 525 error); 526 return; 527 } 528 529 /* 530 * Map the device. 531 */ 532 533 ioh_valid = (pci_mapreg_map(pa, TULIP_PCI_IOBA, 534 PCI_MAPREG_TYPE_IO, 0, 535 &iot, &ioh, NULL, NULL) == 0); 536 memh_valid = (pci_mapreg_map(pa, TULIP_PCI_MMBA, 537 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 538 &memt, &memh, NULL, NULL) == 0); 539 if (memh_valid) { 540 sc->sc_st = memt; 541 sc->sc_sh = memh; 542 } else if (ioh_valid) { 543 sc->sc_st = iot; 544 sc->sc_sh = ioh; 545 } else { 546 aprint_error_dev(self, "unable to map device registers\n"); 547 return; 548 } 549 550 sc->sc_dmat = pa->pa_dmat; 551 552 /* 553 * Make sure bus mastering is enabled. 554 */ 555 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 556 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 557 PCI_COMMAND_MASTER_ENABLE); 558 559 /* 560 * Get the cacheline size. 561 */ 562 sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag, 563 PCI_BHLC_REG)); 564 565 /* 566 * Get PCI data moving command info. 567 */ 568 if (pa->pa_flags & PCI_FLAGS_MRL_OKAY) 569 sc->sc_flags |= TULIPF_MRL; 570 if (pa->pa_flags & PCI_FLAGS_MRM_OKAY) 571 sc->sc_flags |= TULIPF_MRM; 572 if (pa->pa_flags & PCI_FLAGS_MWI_OKAY) 573 sc->sc_flags |= TULIPF_MWI; 574 575 /* 576 * Read the contents of the Ethernet Address ROM/SROM. 577 */ 578 switch (sc->sc_chip) { 579 case TULIP_CHIP_21040: 580 sc->sc_srom_addrbits = 6; 581 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, M_NOWAIT); 582 TULIP_WRITE(sc, CSR_MIIROM, MIIROM_SROMCS); 583 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 584 for (j = 0; j < 10000; j++) { 585 val = TULIP_READ(sc, CSR_MIIROM); 586 if ((val & MIIROM_DN) == 0) 587 break; 588 } 589 sc->sc_srom[i] = val & MIIROM_DATA; 590 } 591 break; 592 593 case TULIP_CHIP_82C168: 594 case TULIP_CHIP_82C169: 595 { 596 sc->sc_srom_addrbits = 2; 597 sc->sc_srom = malloc(TULIP_ROM_SIZE(2), M_DEVBUF, M_NOWAIT); 598 599 /* 600 * The Lite-On PNIC stores the Ethernet address in 601 * the first 3 words of the EEPROM. EEPROM access 602 * is not like the other Tulip chips. 603 */ 604 for (i = 0; i < 6; i += 2) { 605 TULIP_WRITE(sc, CSR_PNIC_SROMCTL, 606 PNIC_SROMCTL_READ | (i >> 1)); 607 for (j = 0; j < 500; j++) { 608 delay(2); 609 val = TULIP_READ(sc, CSR_MIIROM); 610 if ((val & PNIC_MIIROM_BUSY) == 0) 611 break; 612 } 613 if (val & PNIC_MIIROM_BUSY) { 614 printf("%s: EEPROM timed out\n", 615 device_xname(self)); 616 return; 617 } 618 val &= PNIC_MIIROM_DATA; 619 sc->sc_srom[i] = val >> 8; 620 sc->sc_srom[i + 1] = val & 0xff; 621 } 622 break; 623 } 624 625 default: 626 /* 627 * XXX This isn't quite the right way to do this; we should 628 * XXX be attempting to fetch the mac-addr property in the 629 * XXX bus-agnostic part of the driver independently. But 630 * XXX that requires a larger change in the SROM handling 631 * XXX logic, and for now we can at least remove a machine- 632 * XXX dependent wart from the PCI front-end. 633 */ 634 ea = prop_dictionary_get(device_properties(self), 635 "mac-addr"); 636 if (ea != NULL) { 637 extern int tlp_srom_debug; 638 KASSERT(prop_object_type(ea) == PROP_TYPE_DATA); 639 KASSERT(prop_data_size(ea) == ETHER_ADDR_LEN); 640 641 memcpy(enaddr, prop_data_data_nocopy(ea), 642 ETHER_ADDR_LEN); 643 644 sc->sc_srom_addrbits = 6; 645 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, 646 M_NOWAIT|M_ZERO); 647 memcpy(sc->sc_srom, enaddr, sizeof(enaddr)); 648 if (tlp_srom_debug) { 649 printf("SROM CONTENTS:"); 650 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 651 if ((i % 8) == 0) 652 printf("\n\t"); 653 printf("0x%02x ", sc->sc_srom[i]); 654 } 655 printf("\n"); 656 } 657 break; 658 } 659 660 /* Check for a slaved ROM on a multi-port board. */ 661 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDROM, 662 TULIP_PCI_SLAVEROM); 663 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 664 sc->sc_srom_addrbits = 665 psc->sc_master->sc_tulip.sc_srom_addrbits; 666 sc->sc_srom = psc->sc_master->sc_tulip.sc_srom; 667 enaddr[5] += 668 sc->sc_devno - psc->sc_master->sc_tulip.sc_devno; 669 } 670 else if (tlp_read_srom(sc) == 0) 671 goto cant_cope; 672 break; 673 } 674 675 /* 676 * Deal with chip/board quirks. This includes setting up 677 * the mediasw, and extracting the Ethernet address from 678 * the rombuf. 679 */ 680 switch (sc->sc_chip) { 681 case TULIP_CHIP_21040: 682 /* 683 * Parse the Ethernet Address ROM. 684 */ 685 if (tlp_parse_old_srom(sc, enaddr) == 0) 686 goto cant_cope; 687 688 689 /* 690 * All 21040 boards start out with the same 691 * media switch. 692 */ 693 sc->sc_mediasw = &tlp_21040_mediasw; 694 695 /* 696 * Deal with any quirks this board might have. 697 */ 698 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21040_quirks); 699 break; 700 701 case TULIP_CHIP_21041: 702 /* Check for new format SROM. */ 703 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 704 /* 705 * Not an ISV SROM; try the old DEC Ethernet Address 706 * ROM format. 707 */ 708 if (tlp_parse_old_srom(sc, enaddr) == 0) 709 goto cant_cope; 710 } 711 712 /* 713 * All 21041 boards use the same media switch; they all 714 * work basically the same! Yippee! 715 */ 716 sc->sc_mediasw = &tlp_21041_mediasw; 717 718 /* 719 * Deal with any quirks this board might have. 720 */ 721 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21041_quirks); 722 break; 723 724 case TULIP_CHIP_21140: 725 case TULIP_CHIP_21140A: 726 /* Check for new format SROM. */ 727 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 728 /* 729 * Not an ISV SROM; try the old DEC Ethernet Address 730 * ROM format. 731 */ 732 if (tlp_parse_old_srom(sc, enaddr) == 0) 733 goto cant_cope; 734 } else { 735 /* 736 * We start out with the 2114x ISV media switch. 737 * When we search for quirks, we may change to 738 * a different switch. 739 */ 740 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 741 } 742 743 /* 744 * Deal with any quirks this board might have. 745 */ 746 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21140_quirks); 747 748 /* 749 * Bail out now if we can't deal with this board. 750 */ 751 if (sc->sc_mediasw == NULL) 752 goto cant_cope; 753 break; 754 755 case TULIP_CHIP_21142: 756 case TULIP_CHIP_21143: 757 /* Check for new format SROM. */ 758 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 759 /* 760 * Not an ISV SROM; try the old DEC Ethernet Address 761 * ROM format. 762 */ 763 if (tlp_parse_old_srom(sc, enaddr) == 0) { 764 /* 765 * One last try: just copy the address 766 * from offset 20 and try to look 767 * up quirks. 768 */ 769 memcpy(enaddr, &sc->sc_srom[20], 770 ETHER_ADDR_LEN); 771 } 772 } else { 773 /* 774 * We start out with the 2114x ISV media switch. 775 * When we search for quirks, we may change to 776 * a different switch. 777 */ 778 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 779 } 780 781 /* 782 * Deal with any quirks this board might have. 783 */ 784 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21142_quirks); 785 786 /* 787 * Bail out now if we can't deal with this board. 788 */ 789 if (sc->sc_mediasw == NULL) 790 goto cant_cope; 791 break; 792 793 case TULIP_CHIP_82C168: 794 case TULIP_CHIP_82C169: 795 /* 796 * Lite-On PNIC's Ethernet address is the first 6 797 * bytes of its EEPROM. 798 */ 799 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 800 801 /* 802 * Lite-On PNICs always use the same mediasw; we 803 * select MII vs. internal NWAY automatically. 804 */ 805 sc->sc_mediasw = &tlp_pnic_mediasw; 806 break; 807 808 case TULIP_CHIP_MX98713: 809 /* 810 * The Macronix MX98713 has an MII and GPIO, but no 811 * internal Nway block. This chip is basically a 812 * perfect 21140A clone, with the exception of the 813 * a magic register frobbing in order to make the 814 * interface function. 815 */ 816 if (tlp_isv_srom_enaddr(sc, enaddr)) { 817 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 818 break; 819 } 820 /* FALLTHROUGH */ 821 822 case TULIP_CHIP_82C115: 823 /* 824 * Yippee! The Lite-On 82C115 is a clone of 825 * the MX98725 (the data sheet even says `MXIC' 826 * on it)! Imagine that, a clone of a clone. 827 * 828 * The differences are really minimal: 829 * 830 * - Wake-On-LAN support 831 * - 128-bit multicast hash table, rather than 832 * the standard 512-bit hash table 833 */ 834 /* FALLTHROUGH */ 835 836 case TULIP_CHIP_MX98713A: 837 case TULIP_CHIP_MX98715A: 838 case TULIP_CHIP_MX98715AEC_X: 839 case TULIP_CHIP_MX98725: 840 /* 841 * The MX98713A has an MII as well as an internal Nway block, 842 * but no GPIO. The MX98715 and MX98725 have an internal 843 * Nway block only. 844 * 845 * The internal Nway block, unlike the Lite-On PNIC's, does 846 * just that - performs Nway. Once autonegotiation completes, 847 * we must program the GPR media information into the chip. 848 * 849 * The byte offset of the Ethernet address is stored at 850 * offset 0x70. 851 */ 852 memcpy(enaddr, &sc->sc_srom[sc->sc_srom[0x70]], ETHER_ADDR_LEN); 853 sc->sc_mediasw = &tlp_pmac_mediasw; 854 break; 855 856 case TULIP_CHIP_WB89C840F: 857 /* 858 * Winbond 89C840F's Ethernet address is the first 859 * 6 bytes of its EEPROM. 860 */ 861 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 862 863 /* 864 * Winbond 89C840F has an MII attached to the SIO. 865 */ 866 sc->sc_mediasw = &tlp_sio_mii_mediasw; 867 break; 868 869 case TULIP_CHIP_AL981: 870 /* 871 * The ADMtek AL981's Ethernet address is located 872 * at offset 8 of its EEPROM. 873 */ 874 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 875 876 /* 877 * ADMtek AL981 has a built-in PHY accessed through 878 * special registers. 879 */ 880 sc->sc_mediasw = &tlp_al981_mediasw; 881 break; 882 883 case TULIP_CHIP_AN983: 884 case TULIP_CHIP_AN985: 885 /* 886 * The ADMtek AN985's Ethernet address is located 887 * at offset 8 of its EEPROM. 888 */ 889 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 890 891 /* 892 * The ADMtek AN985 can be configured in Single-Chip 893 * mode or MAC-only mode. Single-Chip uses the built-in 894 * PHY, MAC-only has an external PHY (usually HomePNA). 895 * The selection is based on an EEPROM setting, and both 896 * PHYs are accessed via MII attached to SIO. 897 * 898 * The AN985 "ghosts" the internal PHY onto all 899 * MII addresses, so we have to use a media init 900 * routine that limits the search. 901 * XXX How does this work with MAC-only mode? 902 */ 903 sc->sc_mediasw = &tlp_an985_mediasw; 904 break; 905 906 case TULIP_CHIP_DM9102: 907 case TULIP_CHIP_DM9102A: 908 /* 909 * Some boards with the Davicom chip have an ISV 910 * SROM (mostly DM9102A boards -- trying to describe 911 * the HomePNA PHY, probably) although the data in 912 * them is generally wrong. Check for ISV format 913 * and grab the Ethernet address that way, and if 914 * that fails, fall back on grabbing it from an 915 * observed offset of 20 (which is where it would 916 * be in an ISV SROM anyhow, tho ISV can cope with 917 * multi-port boards). 918 */ 919 if (!tlp_isv_srom_enaddr(sc, enaddr)) { 920 #ifdef __sparc__ 921 if ((sc->sc_srom[20] == 0 && 922 sc->sc_srom[21] == 0 && 923 sc->sc_srom[22] == 0) || 924 (sc->sc_srom[20] == 0xff && 925 sc->sc_srom[21] == 0xff && 926 sc->sc_srom[22] == 0xff)) { 927 prom_getether(PCITAG_NODE(pa->pa_tag), enaddr); 928 } else 929 #endif 930 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN); 931 } 932 933 /* 934 * Davicom chips all have an internal MII interface 935 * and a built-in PHY. DM9102A also has a an external 936 * MII interface, usually with a HomePNA PHY attached 937 * to it. 938 */ 939 sc->sc_mediasw = &tlp_dm9102_mediasw; 940 break; 941 942 case TULIP_CHIP_AX88140: 943 case TULIP_CHIP_AX88141: 944 /* 945 * ASIX AX88140/AX88141 Ethernet Address is located at offset 946 * 20 of the SROM. 947 */ 948 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN); 949 950 /* 951 * ASIX AX88140A/AX88141 chip can have a built-in PHY or 952 * an external MII interface. 953 */ 954 sc->sc_mediasw = &tlp_asix_mediasw; 955 break; 956 957 case TULIP_CHIP_RS7112: 958 /* 959 * RS7112 Ethernet Address is located of offset 0x19a 960 * of the SROM 961 */ 962 memcpy(enaddr, &sc->sc_srom[0x19a], ETHER_ADDR_LEN); 963 964 /* RS7112 chip has a PHY at MII address 1 */ 965 sc->sc_mediasw = &tlp_rs7112_mediasw; 966 break; 967 968 default: 969 cant_cope: 970 printf("%s: sorry, unable to handle your board\n", 971 device_xname(self)); 972 return; 973 } 974 975 /* 976 * Handle shared interrupts. 977 */ 978 if (psc->sc_flags & TULIP_PCI_SHAREDINTR) { 979 if (psc->sc_master) 980 psc->sc_flags |= TULIP_PCI_SLAVEINTR; 981 else { 982 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDINTR, 983 TULIP_PCI_SLAVEINTR); 984 if (psc->sc_master == NULL) 985 psc->sc_master = psc; 986 } 987 LIST_INSERT_HEAD(&psc->sc_master->sc_intrslaves, 988 psc, sc_intrq); 989 } 990 991 if (psc->sc_flags & TULIP_PCI_SLAVEINTR) { 992 printf("%s: sharing interrupt with %s\n", 993 device_xname(self), 994 device_xname(psc->sc_master->sc_tulip.sc_dev)); 995 } else { 996 /* 997 * Map and establish our interrupt. 998 */ 999 if (pci_intr_map(pa, &ih)) { 1000 aprint_error_dev(self, "unable to map interrupt\n"); 1001 return; 1002 } 1003 intrstr = pci_intr_string(pc, ih); 1004 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, 1005 (psc->sc_flags & TULIP_PCI_SHAREDINTR) ? 1006 tlp_pci_shared_intr : tlp_intr, sc); 1007 if (psc->sc_ih == NULL) { 1008 aprint_error_dev(self, "unable to establish interrupt"); 1009 if (intrstr != NULL) 1010 printf(" at %s", intrstr); 1011 printf("\n"); 1012 return; 1013 } 1014 printf("%s: interrupting at %s\n", device_xname(self), 1015 intrstr); 1016 } 1017 1018 /* 1019 * Finish off the attach. 1020 */ 1021 tlp_attach(sc, enaddr); 1022 } 1023 1024 static int 1025 tlp_pci_shared_intr(void *arg) 1026 { 1027 struct tulip_pci_softc *master = arg, *slave; 1028 int rv = 0; 1029 1030 for (slave = LIST_FIRST(&master->sc_intrslaves); 1031 slave != NULL; 1032 slave = LIST_NEXT(slave, sc_intrq)) 1033 rv |= tlp_intr(&slave->sc_tulip); 1034 1035 return rv; 1036 } 1037 1038 static void 1039 tlp_pci_dec_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1040 { 1041 struct tulip_softc *sc = &psc->sc_tulip; 1042 1043 /* 1044 * This isn't really a quirk-gathering device, really. We 1045 * just want to get the spiffy DEC board name from the SROM. 1046 */ 1047 strcpy(sc->sc_name, "DEC "); 1048 1049 if (memcmp(&sc->sc_srom[29], "DE500", 5) == 0 || 1050 memcmp(&sc->sc_srom[29], "DE450", 5) == 0) 1051 memcpy(&sc->sc_name[4], &sc->sc_srom[29], 8); 1052 else 1053 sc->sc_name[3] = '\0'; 1054 } 1055 1056 static void 1057 tlp_pci_znyx_21040_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1058 { 1059 struct tulip_softc *sc = &psc->sc_tulip; 1060 uint16_t id = 0; 1061 1062 /* 1063 * If we have a slaved ROM, just copy the bits from the master. 1064 * This is in case we fail the ROM ID check (older boards) and 1065 * need to fall back on Ethernet address model checking; that 1066 * will fail for slave chips. 1067 */ 1068 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 1069 strcpy(sc->sc_name, psc->sc_master->sc_tulip.sc_name); 1070 sc->sc_mediasw = psc->sc_master->sc_tulip.sc_mediasw; 1071 psc->sc_flags |= 1072 psc->sc_master->sc_flags & TULIP_PCI_SHAREDINTR; 1073 return; 1074 } 1075 1076 if (sc->sc_srom[32] == 0x4a && sc->sc_srom[33] == 0x52) { 1077 id = sc->sc_srom[37] | (sc->sc_srom[36] << 8); 1078 switch (id) { 1079 zx312: 1080 case 0x0602: /* ZX312 */ 1081 strcpy(sc->sc_name, "ZNYX ZX312"); 1082 return; 1083 1084 case 0x0622: /* ZX312T */ 1085 strcpy(sc->sc_name, "ZNYX ZX312T"); 1086 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1087 return; 1088 1089 zx314_inta: 1090 case 0x0701: /* ZX314 INTA */ 1091 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1092 /* FALLTHROUGH */ 1093 case 0x0711: /* ZX314 */ 1094 strcpy(sc->sc_name, "ZNYX ZX314"); 1095 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1096 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1097 return; 1098 1099 zx315_inta: 1100 case 0x0801: /* ZX315 INTA */ 1101 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1102 /* FALLTHROUGH */ 1103 case 0x0811: /* ZX315 */ 1104 strcpy(sc->sc_name, "ZNYX ZX315"); 1105 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1106 return; 1107 1108 default: 1109 id = 0; 1110 break; 1111 } 1112 } 1113 1114 /* 1115 * Deal with boards that have broken ROMs. 1116 */ 1117 if (id == 0) { 1118 if ((enaddr[3] & ~3) == 0xf0 && (enaddr[5] & 3) == 0x00) 1119 goto zx314_inta; 1120 if ((enaddr[3] & ~3) == 0xf4 && (enaddr[5] & 1) == 0x00) 1121 goto zx315_inta; 1122 if ((enaddr[3] & ~3) == 0xec) 1123 goto zx312; 1124 } 1125 1126 strcpy(sc->sc_name, "ZNYX ZX31x"); 1127 } 1128 1129 static void tlp_pci_znyx_21142_qs6611_reset(struct tulip_softc *); 1130 1131 static void 1132 tlp_pci_znyx_21142_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1133 { 1134 struct tulip_softc *sc = &psc->sc_tulip; 1135 pcireg_t subid; 1136 1137 subid = pci_conf_read(psc->sc_pc, psc->sc_pcitag, PCI_SUBSYS_ID_REG); 1138 1139 if (PCI_VENDOR(subid) != PCI_VENDOR_ZNYX) 1140 return; /* ? */ 1141 1142 switch (PCI_PRODUCT(subid) & 0xff) { 1143 /* 1144 * ZNYX 21143 boards with QS6611 PHY 1145 */ 1146 case 0x12: /* ZX345Q */ 1147 case 0x13: /* ZX346Q */ 1148 case 0x14: /* ZX348Q */ 1149 case 0x18: /* ZX414 */ 1150 case 0x19: /* ZX412 */ 1151 case 0x1a: /* ZX444 */ 1152 case 0x1b: /* ZX442 */ 1153 case 0x23: /* ZX212 */ 1154 case 0x24: /* ZX214 */ 1155 case 0x29: /* ZX374 */ 1156 case 0x2d: /* ZX372 */ 1157 case 0x2b: /* ZX244 */ 1158 case 0x2c: /* ZX424 */ 1159 case 0x2e: /* ZX422 */ 1160 printf("%s: QS6611 PHY\n", device_xname(sc->sc_dev)); 1161 sc->sc_reset = tlp_pci_znyx_21142_qs6611_reset; 1162 break; 1163 } 1164 } 1165 1166 static void 1167 tlp_pci_znyx_21142_qs6611_reset(struct tulip_softc *sc) 1168 { 1169 1170 /* 1171 * Reset QS6611 PHY. 1172 */ 1173 TULIP_WRITE(sc, CSR_SIAGEN, 1174 SIAGEN_CWE | SIAGEN_LGS1 | SIAGEN_ABM | (0xf << 16)); 1175 delay(200); 1176 TULIP_WRITE(sc, CSR_SIAGEN, (0x4 << 16)); 1177 delay(10000); 1178 } 1179 1180 static void 1181 tlp_pci_smc_21040_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1182 { 1183 struct tulip_softc *sc = &psc->sc_tulip; 1184 uint16_t id1, id2, ei; 1185 int auibnc = 0, utp = 0; 1186 char *cp; 1187 1188 id1 = sc->sc_srom[0x60] | (sc->sc_srom[0x61] << 8); 1189 id2 = sc->sc_srom[0x62] | (sc->sc_srom[0x63] << 8); 1190 ei = sc->sc_srom[0x66] | (sc->sc_srom[0x67] << 8); 1191 1192 strcpy(sc->sc_name, "SMC 8432"); 1193 cp = &sc->sc_name[8]; 1194 1195 if ((id1 & 1) == 0) { 1196 *cp++ = 'B'; 1197 auibnc = 1; 1198 } 1199 if ((id1 & 0xff) > 0x32) { 1200 *cp++ = 'T'; 1201 utp = 1; 1202 } 1203 if ((id1 & 0x4000) == 0) { 1204 *cp++ = 'A'; 1205 auibnc = 1; 1206 } 1207 if (id2 == 0x15) { 1208 sc->sc_name[7] = '4'; 1209 *cp++ = '-'; 1210 *cp++ = 'C'; 1211 *cp++ = 'H'; 1212 *cp++ = ei ? '2' : '1'; 1213 } 1214 *cp = '\0'; 1215 1216 if (utp != 0 && auibnc == 0) 1217 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1218 else if (utp == 0 && auibnc != 0) 1219 sc->sc_mediasw = &tlp_21040_auibnc_mediasw; 1220 } 1221 1222 static void 1223 tlp_pci_cogent_21040_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1224 { 1225 1226 strcpy(psc->sc_tulip.sc_name, "Cogent multi-port"); 1227 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1228 } 1229 1230 static void 1231 tlp_pci_accton_21040_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1232 { 1233 1234 strcpy(psc->sc_tulip.sc_name, "ACCTON EN1203"); 1235 } 1236 1237 static void tlp_pci_asante_21140_reset(struct tulip_softc *); 1238 1239 static void 1240 tlp_pci_asante_21140_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1241 { 1242 struct tulip_softc *sc = &psc->sc_tulip; 1243 1244 /* 1245 * Some Asante boards don't use the ISV SROM format. For 1246 * those that don't, we initialize the GPIO direction bits, 1247 * and provide our own reset hook, which resets the MII. 1248 * 1249 * All of these boards use SIO-attached-MII media. 1250 */ 1251 if (sc->sc_mediasw == &tlp_2114x_isv_mediasw) 1252 return; 1253 1254 strcpy(sc->sc_name, "Asante"); 1255 1256 sc->sc_gp_dir = 0xbf; 1257 sc->sc_reset = tlp_pci_asante_21140_reset; 1258 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1259 } 1260 1261 static void 1262 tlp_pci_e100_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1263 { 1264 struct tulip_softc *sc = &psc->sc_tulip; 1265 1266 if (sc->sc_mediasw == &tlp_2114x_isv_mediasw) 1267 return; 1268 1269 strcpy(sc->sc_name, "UMAX E100"); 1270 1271 sc->sc_gp_dir = 0xbf; 1272 sc->sc_reset = tlp_pci_asante_21140_reset; 1273 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1274 } 1275 1276 static void 1277 tlp_pci_asante_21140_reset(struct tulip_softc *sc) 1278 { 1279 1280 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1281 TULIP_WRITE(sc, CSR_GPP, 0x8); 1282 delay(100); 1283 TULIP_WRITE(sc, CSR_GPP, 0); 1284 } 1285 1286 static void tlp_pci_phobos_21140_reset(struct tulip_softc *); 1287 1288 static void 1289 tlp_pci_phobos_21140_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1290 { 1291 struct tulip_softc *sc = &psc->sc_tulip; 1292 1293 /* 1294 * Phobo boards just use MII-on_SIO. 1295 */ 1296 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1297 sc->sc_reset = tlp_pci_phobos_21140_reset; 1298 1299 /* 1300 * These boards appear solely on sgimips machines behind a special 1301 * GIO<->PCI ASIC and require the DBO and BLE bits to be set in CSR0. 1302 */ 1303 sc->sc_flags |= (TULIPF_BLE | TULIPF_DBO); 1304 } 1305 1306 static void 1307 tlp_pci_phobos_21140_reset(struct tulip_softc *sc) 1308 { 1309 1310 TULIP_WRITE(sc, CSR_GPP, 0x1fd); 1311 delay(10); 1312 TULIP_WRITE(sc, CSR_GPP, 0xfd); 1313 delay(10); 1314 TULIP_WRITE(sc, CSR_GPP, 0); 1315 } 1316 1317 /* 1318 * SMC 9332DST media switch. 1319 */ 1320 static void tlp_smc9332dst_tmsw_init(struct tulip_softc *); 1321 1322 static const struct tulip_mediasw tlp_smc9332dst_mediasw = { 1323 tlp_smc9332dst_tmsw_init, 1324 tlp_21140_gpio_get, 1325 tlp_21140_gpio_set 1326 }; 1327 1328 static void 1329 tlp_pci_smc_21140_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1330 { 1331 struct tulip_softc *sc = &psc->sc_tulip; 1332 1333 if (sc->sc_mediasw != NULL) { 1334 return; 1335 } 1336 strcpy(psc->sc_tulip.sc_name, "SMC 9332DST"); 1337 sc->sc_mediasw = &tlp_smc9332dst_mediasw; 1338 } 1339 1340 static void 1341 tlp_smc9332dst_tmsw_init(struct tulip_softc *sc) 1342 { 1343 struct tulip_21x4x_media *tm; 1344 const char *sep = ""; 1345 uint32_t reg; 1346 int i, cnt; 1347 1348 sc->sc_gp_dir = GPP_SMC9332DST_PINS; 1349 sc->sc_opmode = OPMODE_MBO | OPMODE_PS; 1350 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 1351 1352 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 1353 tlp_mediastatus); 1354 printf("%s: ", device_xname(sc->sc_dev)); 1355 1356 #define ADD(m, c) \ 1357 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK|M_ZERO); \ 1358 tm->tm_opmode = (c); \ 1359 tm->tm_gpdata = GPP_SMC9332DST_INIT; \ 1360 ifmedia_add(&sc->sc_mii.mii_media, (m), 0, tm) 1361 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 1362 1363 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0), OPMODE_TTM); 1364 PRINT("10baseT"); 1365 1366 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, 0), 1367 OPMODE_TTM | OPMODE_FD); 1368 PRINT("10baseT-FDX"); 1369 1370 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 1371 OPMODE_PS | OPMODE_PCS | OPMODE_SCR); 1372 PRINT("100baseTX"); 1373 1374 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, 0), 1375 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD); 1376 PRINT("100baseTX-FDX"); 1377 1378 #undef ADD 1379 #undef PRINT 1380 1381 printf("\n"); 1382 1383 tlp_reset(sc); 1384 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode | OPMODE_PCS | OPMODE_SCR); 1385 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1386 delay(10); 1387 TULIP_WRITE(sc, CSR_GPP, GPP_SMC9332DST_INIT); 1388 delay(200000); 1389 cnt = 0; 1390 for (i = 1000; i > 0; i--) { 1391 reg = TULIP_READ(sc, CSR_GPP); 1392 if ((~reg & (GPP_SMC9332DST_OK10 | 1393 GPP_SMC9332DST_OK100)) == 0) { 1394 if (cnt++ > 100) { 1395 break; 1396 } 1397 } else if ((reg & GPP_SMC9332DST_OK10) == 0) { 1398 break; 1399 } else { 1400 cnt = 0; 1401 } 1402 delay(1000); 1403 } 1404 if (cnt > 100) { 1405 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX); 1406 } else { 1407 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 1408 } 1409 } 1410 1411 static void 1412 tlp_pci_vpc_21140_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1413 { 1414 struct tulip_softc *sc = &psc->sc_tulip; 1415 char *p1 = (char *) &sc->sc_srom[32]; 1416 char *p2 = &sc->sc_name[0]; 1417 1418 do { 1419 if ((unsigned char) *p1 & 0x80) 1420 *p2++ = ' '; 1421 else 1422 *p2++ = *p1; 1423 } while (*p1++); 1424 } 1425 1426 static void tlp_pci_cobalt_21142_reset(struct tulip_softc *); 1427 1428 static void 1429 tlp_pci_cobalt_21142_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1430 { 1431 struct tulip_softc *sc = &psc->sc_tulip; 1432 1433 /* 1434 * Cobalt Networks interfaces are just MII-on-SIO. 1435 */ 1436 sc->sc_reset = tlp_pci_cobalt_21142_reset; 1437 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1438 1439 /* 1440 * The Cobalt systems tend to fall back to store-and-forward 1441 * pretty quickly, so we select that from the beginning to 1442 * avoid initial timeouts. 1443 */ 1444 sc->sc_txthresh = TXTH_SF; 1445 } 1446 1447 static void 1448 tlp_pci_cobalt_21142_reset(struct tulip_softc *sc) 1449 { 1450 1451 /* 1452 * Reset PHY. 1453 */ 1454 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE | (1 << 16)); 1455 delay(10); 1456 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE); 1457 delay(10); 1458 } 1459 1460 static void 1461 tlp_pci_algor_21142_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1462 { 1463 struct tulip_softc *sc = &psc->sc_tulip; 1464 1465 /* 1466 * Algorithmics boards just have MII-on-SIO. 1467 * 1468 * XXX They also have AUI on the serial interface. 1469 * XXX Deal with this. 1470 */ 1471 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1472 } 1473 1474 /* 1475 * Cogent EM1x0 (aka. Adaptec ANA-6910) media switch. 1476 */ 1477 static void tlp_cogent_em1x0_tmsw_init(struct tulip_softc *); 1478 1479 static const struct tulip_mediasw tlp_cogent_em1x0_mediasw = { 1480 tlp_cogent_em1x0_tmsw_init, 1481 tlp_21140_gpio_get, 1482 tlp_21140_gpio_set 1483 }; 1484 1485 static void 1486 tlp_pci_adaptec_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1487 { 1488 struct tulip_softc *sc = &psc->sc_tulip; 1489 uint8_t *srom = sc->sc_srom, id0; 1490 uint16_t id1, id2; 1491 1492 if (sc->sc_mediasw == NULL) { 1493 id0 = srom[32]; 1494 switch (id0) { 1495 case 0x12: 1496 strcpy(psc->sc_tulip.sc_name, "Cogent EM100TX"); 1497 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1498 break; 1499 1500 case 0x15: 1501 strcpy(psc->sc_tulip.sc_name, "Cogent EM100FX"); 1502 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1503 break; 1504 1505 #if 0 1506 case XXX: 1507 strcpy(psc->sc_tulip.sc_name, "Cogent EM110TX"); 1508 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1509 break; 1510 #endif 1511 1512 default: 1513 printf("%s: unknown Cogent board ID 0x%02x\n", 1514 device_xname(sc->sc_dev), id0); 1515 } 1516 return; 1517 } 1518 1519 id1 = TULIP_ROM_GETW(srom, 0); 1520 id2 = TULIP_ROM_GETW(srom, 2); 1521 if (id1 != 0x1109) { 1522 goto unknown; 1523 } 1524 1525 switch (id2) { 1526 case 0x1900: 1527 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911"); 1528 break; 1529 1530 case 0x2400: 1531 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6944A"); 1532 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1533 break; 1534 1535 case 0x2b00: 1536 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911A"); 1537 break; 1538 1539 case 0x3000: 1540 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6922"); 1541 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1542 break; 1543 1544 default: 1545 unknown: 1546 printf("%s: unknown Adaptec/Cogent board ID 0x%04x/0x%04x\n", 1547 device_xname(sc->sc_dev), id1, id2); 1548 } 1549 } 1550 1551 static void 1552 tlp_cogent_em1x0_tmsw_init(struct tulip_softc *sc) 1553 { 1554 struct tulip_21x4x_media *tm; 1555 const char *sep = ""; 1556 1557 sc->sc_gp_dir = GPP_COGENT_EM1x0_PINS; 1558 sc->sc_opmode = OPMODE_MBO | OPMODE_PS; 1559 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 1560 1561 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 1562 tlp_mediastatus); 1563 printf("%s: ", device_xname(sc->sc_dev)); 1564 1565 #define ADD(m, c) \ 1566 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK|M_ZERO); \ 1567 tm->tm_opmode = (c); \ 1568 tm->tm_gpdata = GPP_COGENT_EM1x0_INIT; \ 1569 ifmedia_add(&sc->sc_mii.mii_media, (m), 0, tm) 1570 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 1571 1572 if (sc->sc_srom[32] == 0x15) { 1573 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, 0, 0), 1574 OPMODE_PS | OPMODE_PCS); 1575 PRINT("100baseFX"); 1576 1577 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0), 1578 OPMODE_PS | OPMODE_PCS | OPMODE_FD); 1579 PRINT("100baseFX-FDX"); 1580 printf("\n"); 1581 1582 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_FX); 1583 } else { 1584 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 1585 OPMODE_PS | OPMODE_PCS | OPMODE_SCR); 1586 PRINT("100baseTX"); 1587 1588 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0), 1589 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD); 1590 PRINT("100baseTX-FDX"); 1591 printf("\n"); 1592 1593 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX); 1594 } 1595 1596 #undef ADD 1597 #undef PRINT 1598 } 1599 1600 static void tlp_pci_netwinder_21142_reset(struct tulip_softc *); 1601 1602 static void 1603 tlp_pci_netwinder_21142_quirks(struct tulip_pci_softc *psc, 1604 const uint8_t *enaddr) 1605 { 1606 struct tulip_softc *sc = &psc->sc_tulip; 1607 1608 /* 1609 * Netwinders just use MII-on_SIO. 1610 */ 1611 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1612 sc->sc_reset = tlp_pci_netwinder_21142_reset; 1613 } 1614 1615 void 1616 tlp_pci_netwinder_21142_reset(struct tulip_softc *sc) 1617 { 1618 1619 /* 1620 * Reset the PHY. 1621 */ 1622 TULIP_WRITE(sc, CSR_SIAGEN, 0x0821 << 16); 1623 delay(10); 1624 TULIP_WRITE(sc, CSR_SIAGEN, 0x0000 << 16); 1625 delay(10); 1626 TULIP_WRITE(sc, CSR_SIAGEN, 0x0001 << 16); 1627 delay(10); 1628 } 1629 1630 static void tlp_pci_phobos_21142_reset(struct tulip_softc *); 1631 1632 static void 1633 tlp_pci_phobos_21142_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1634 { 1635 struct tulip_softc *sc = &psc->sc_tulip; 1636 1637 /* 1638 * Phobo boards just use MII-on_SIO. 1639 */ 1640 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1641 sc->sc_reset = tlp_pci_phobos_21142_reset; 1642 1643 /* 1644 * These boards appear solely on sgimips machines behind a special 1645 * GIO<->PCI ASIC and require the DBO and BLE bits to be set in CSR0. 1646 */ 1647 sc->sc_flags |= (TULIPF_BLE | TULIPF_DBO); 1648 } 1649 1650 static void 1651 tlp_pci_phobos_21142_reset(struct tulip_softc *sc) 1652 { 1653 /* 1654 * Reset PHY. 1655 */ 1656 TULIP_WRITE(sc, CSR_SIAGEN, (0x880f << 16)); 1657 delay(10); 1658 TULIP_WRITE(sc, CSR_SIAGEN, (0x800f << 16)); 1659 delay(10); 1660 } 1661
Indexes created Sun Sep 21 20:09:37 GMT 2025