if_tlp_pci.c revision 1.123
1 /* $NetBSD: if_tlp_pci.c,v 1.123 2014/03/29 19:28:25 christos Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center; and Charles M. Hannum. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * PCI bus front-end for the Digital Semiconductor ``Tulip'' (21x4x) 35 * Ethernet controller family driver. 36 */ 37 38 #include <sys/cdefs.h> 39 __KERNEL_RCSID(0, "$NetBSD: if_tlp_pci.c,v 1.123 2014/03/29 19:28:25 christos Exp $"); 40 41 #include <sys/param.h> 42 #include <sys/systm.h> 43 #include <sys/mbuf.h> 44 #include <sys/malloc.h> 45 #include <sys/kernel.h> 46 #include <sys/socket.h> 47 #include <sys/ioctl.h> 48 #include <sys/errno.h> 49 #include <sys/device.h> 50 51 #include <machine/endian.h> 52 53 #include <net/if.h> 54 #include <net/if_dl.h> 55 #include <net/if_media.h> 56 #include <net/if_ether.h> 57 58 #include <sys/bus.h> 59 #include <sys/intr.h> 60 61 #include <dev/mii/miivar.h> 62 #include <dev/mii/mii_bitbang.h> 63 64 #include <dev/ic/tulipreg.h> 65 #include <dev/ic/tulipvar.h> 66 67 #include <dev/pci/pcivar.h> 68 #include <dev/pci/pcireg.h> 69 #include <dev/pci/pcidevs.h> 70 71 /* 72 * PCI configuration space registers used by the Tulip. 73 */ 74 #define TULIP_PCI_IOBA PCI_BAR(0) /* i/o mapped base */ 75 #define TULIP_PCI_MMBA PCI_BAR(1) /* memory mapped base */ 76 #define TULIP_PCI_CFDA 0x40 /* configuration driver area */ 77 78 #define CFDA_SLEEP 0x80000000 /* sleep mode */ 79 #define CFDA_SNOOZE 0x40000000 /* snooze mode */ 80 81 struct tulip_pci_softc { 82 struct tulip_softc sc_tulip; /* real Tulip softc */ 83 84 /* PCI-specific goo. */ 85 void *sc_ih; /* interrupt handle */ 86 bus_size_t sc_mapsize; 87 88 pci_chipset_tag_t sc_pc; /* our PCI chipset */ 89 pcitag_t sc_pcitag; /* our PCI tag */ 90 91 int sc_flags; /* flags; see below */ 92 93 LIST_HEAD(, tulip_pci_softc) sc_intrslaves; 94 LIST_ENTRY(tulip_pci_softc) sc_intrq; 95 96 /* Our {ROM,interrupt} master. */ 97 struct tulip_pci_softc *sc_master; 98 }; 99 100 /* sc_flags */ 101 #define TULIP_PCI_SHAREDINTR 0x01 /* interrupt is shared */ 102 #define TULIP_PCI_SLAVEINTR 0x02 /* interrupt is slave */ 103 #define TULIP_PCI_SHAREDROM 0x04 /* ROM is shared */ 104 #define TULIP_PCI_SLAVEROM 0x08 /* slave of shared ROM */ 105 106 static int tlp_pci_match(device_t, cfdata_t, void *); 107 static void tlp_pci_attach(device_t, device_t, void *); 108 static int tlp_pci_detach(device_t, int); 109 110 CFATTACH_DECL3_NEW(tlp_pci, sizeof(struct tulip_pci_softc), 111 tlp_pci_match, tlp_pci_attach, tlp_pci_detach, NULL, NULL, NULL, 112 DVF_DETACH_SHUTDOWN); 113 114 static const struct tulip_pci_product { 115 uint32_t tpp_vendor; /* PCI vendor ID */ 116 uint32_t tpp_product; /* PCI product ID */ 117 tulip_chip_t tpp_chip; /* base Tulip chip type */ 118 } tlp_pci_products[] = { 119 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21040, 120 TULIP_CHIP_21040 }, 121 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21041, 122 TULIP_CHIP_21041 }, 123 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21140, 124 TULIP_CHIP_21140 }, 125 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142, 126 TULIP_CHIP_21142 }, 127 128 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C168, 129 TULIP_CHIP_82C168 }, 130 131 /* 132 * Note: This is like a MX98725 with Wake-On-LAN and a 133 * 128-bit multicast hash table. 134 */ 135 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C115, 136 TULIP_CHIP_82C115 }, 137 138 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98713, 139 TULIP_CHIP_MX98713 }, 140 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX987x5, 141 TULIP_CHIP_MX98715 }, 142 143 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100TX, 144 TULIP_CHIP_MX98713 }, 145 146 { PCI_VENDOR_WINBOND, PCI_PRODUCT_WINBOND_W89C840F, 147 TULIP_CHIP_WB89C840F }, 148 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100ATX, 149 TULIP_CHIP_WB89C840F }, 150 151 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9102, 152 TULIP_CHIP_DM9102 }, 153 154 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AL981, 155 TULIP_CHIP_AL981 }, 156 157 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN983, 158 TULIP_CHIP_AN985 }, 159 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_ADM9511, 160 TULIP_CHIP_AN985 }, 161 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_ADM9513, 162 TULIP_CHIP_AN985 }, 163 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN2242, 164 TULIP_CHIP_AN985 }, 165 166 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C910SOHOB, 167 TULIP_CHIP_AN985 }, 168 169 { PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX88140A, 170 TULIP_CHIP_AX88140 }, 171 172 { PCI_VENDOR_CONEXANT, PCI_PRODUCT_CONEXANT_LANFINITY, 173 TULIP_CHIP_RS7112 }, 174 175 { 0, 0, 176 TULIP_CHIP_INVALID }, 177 }; 178 179 struct tlp_pci_quirks { 180 void (*tpq_func)(struct tulip_pci_softc *, 181 const uint8_t *); 182 uint8_t tpq_oui[3]; 183 }; 184 185 static void tlp_pci_dec_quirks(struct tulip_pci_softc *, 186 const uint8_t *); 187 188 static void tlp_pci_znyx_21040_quirks(struct tulip_pci_softc *, 189 const uint8_t *); 190 static void tlp_pci_smc_21040_quirks(struct tulip_pci_softc *, 191 const uint8_t *); 192 static void tlp_pci_cogent_21040_quirks(struct tulip_pci_softc *, 193 const uint8_t *); 194 static void tlp_pci_accton_21040_quirks(struct tulip_pci_softc *, 195 const uint8_t *); 196 197 static void tlp_pci_cobalt_21142_quirks(struct tulip_pci_softc *, 198 const uint8_t *); 199 static void tlp_pci_algor_21142_quirks(struct tulip_pci_softc *, 200 const uint8_t *); 201 static void tlp_pci_netwinder_21142_quirks(struct tulip_pci_softc *, 202 const uint8_t *); 203 static void tlp_pci_phobos_21142_quirks(struct tulip_pci_softc *, 204 const uint8_t *); 205 static void tlp_pci_znyx_21142_quirks(struct tulip_pci_softc *, 206 const uint8_t *); 207 208 static void tlp_pci_adaptec_quirks(struct tulip_pci_softc *, 209 const uint8_t *); 210 211 static const struct tlp_pci_quirks tlp_pci_21040_quirks[] = { 212 { tlp_pci_znyx_21040_quirks, { 0x00, 0xc0, 0x95 } }, 213 { tlp_pci_smc_21040_quirks, { 0x00, 0x00, 0xc0 } }, 214 { tlp_pci_cogent_21040_quirks, { 0x00, 0x00, 0x92 } }, 215 { tlp_pci_accton_21040_quirks, { 0x00, 0x00, 0xe8 } }, 216 { NULL, { 0, 0, 0 } } 217 }; 218 219 static const struct tlp_pci_quirks tlp_pci_21041_quirks[] = { 220 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 221 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 222 { NULL, { 0, 0, 0 } } 223 }; 224 225 static void tlp_pci_asante_21140_quirks(struct tulip_pci_softc *, 226 const uint8_t *); 227 static void tlp_pci_e100_quirks(struct tulip_pci_softc *, 228 const uint8_t *); 229 static void tlp_pci_phobos_21140_quirks(struct tulip_pci_softc *, 230 const uint8_t *); 231 static void tlp_pci_smc_21140_quirks(struct tulip_pci_softc *, 232 const uint8_t *); 233 static void tlp_pci_vpc_21140_quirks(struct tulip_pci_softc *, 234 const uint8_t *); 235 236 static const struct tlp_pci_quirks tlp_pci_21140_quirks[] = { 237 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 238 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 239 { tlp_pci_e100_quirks, { 0x00, 0xa0, 0x59 } }, 240 { tlp_pci_asante_21140_quirks, { 0x00, 0x00, 0x94 } }, 241 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0x92 } }, 242 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } }, 243 { tlp_pci_phobos_21140_quirks, { 0x00, 0x60, 0xf5 } }, 244 { tlp_pci_smc_21140_quirks, { 0x00, 0x00, 0xc0 } }, 245 { tlp_pci_vpc_21140_quirks, { 0x00, 0x03, 0xff } }, 246 { NULL, { 0, 0, 0 } } 247 }; 248 249 static const struct tlp_pci_quirks tlp_pci_21142_quirks[] = { 250 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 251 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 252 { tlp_pci_cobalt_21142_quirks, { 0x00, 0x10, 0xe0 } }, 253 { tlp_pci_algor_21142_quirks, { 0x00, 0x40, 0xbc } }, 254 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } }, 255 { tlp_pci_netwinder_21142_quirks,{ 0x00, 0x10, 0x57 } }, 256 { tlp_pci_phobos_21142_quirks, { 0x00, 0x60, 0xf5 } }, 257 { tlp_pci_znyx_21142_quirks, { 0x00, 0xc0, 0x95 } }, 258 { NULL, { 0, 0, 0 } } 259 }; 260 261 static int tlp_pci_shared_intr(void *); 262 263 static const struct tulip_pci_product * 264 tlp_pci_lookup(const struct pci_attach_args *pa) 265 { 266 const struct tulip_pci_product *tpp; 267 268 /* Don't match lmc cards */ 269 if (PCI_VENDOR(pci_conf_read(pa->pa_pc, pa->pa_tag, 270 PCI_SUBSYS_ID_REG)) == PCI_VENDOR_LMC) 271 return NULL; 272 273 for (tpp = tlp_pci_products; tpp->tpp_chip != TULIP_CHIP_INVALID; 274 tpp++) { 275 if (PCI_VENDOR(pa->pa_id) == tpp->tpp_vendor && 276 PCI_PRODUCT(pa->pa_id) == tpp->tpp_product) 277 return tpp; 278 } 279 return NULL; 280 } 281 282 static void 283 tlp_pci_get_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr, 284 const struct tlp_pci_quirks *tpq) 285 { 286 287 for (; tpq->tpq_func != NULL; tpq++) { 288 if (tpq->tpq_oui[0] == enaddr[0] && 289 tpq->tpq_oui[1] == enaddr[1] && 290 tpq->tpq_oui[2] == enaddr[2]) { 291 (*tpq->tpq_func)(psc, enaddr); 292 return; 293 } 294 } 295 } 296 297 static void 298 tlp_pci_check_slaved(struct tulip_pci_softc *psc, int shared, int slaved) 299 { 300 extern struct cfdriver tlp_cd; 301 struct tulip_pci_softc *cur, *best = NULL; 302 struct tulip_softc *sc = &psc->sc_tulip; 303 int i; 304 305 /* 306 * First of all, find the lowest pcidev numbered device on our 307 * bus marked as shared. That should be our master. 308 */ 309 for (i = 0; i < tlp_cd.cd_ndevs; i++) { 310 if ((cur = device_lookup_private(&tlp_cd, i)) == NULL) 311 continue; 312 if (device_parent(cur->sc_tulip.sc_dev) != 313 device_parent(sc->sc_dev)) 314 continue; 315 if ((cur->sc_flags & shared) == 0) 316 continue; 317 if (cur == psc) 318 continue; 319 if (best == NULL || 320 best->sc_tulip.sc_devno > cur->sc_tulip.sc_devno) 321 best = cur; 322 } 323 324 if (best != NULL) { 325 psc->sc_master = best; 326 psc->sc_flags |= (shared | slaved); 327 } 328 } 329 330 static int 331 tlp_pci_match(device_t parent, cfdata_t match, void *aux) 332 { 333 struct pci_attach_args *pa = aux; 334 335 if (tlp_pci_lookup(pa) != NULL) 336 return 10; /* beat if_de.c */ 337 338 return 0; 339 } 340 341 static void 342 tlp_pci_attach(device_t parent, device_t self, void *aux) 343 { 344 struct tulip_pci_softc *psc = device_private(self); 345 struct tulip_softc *sc = &psc->sc_tulip; 346 struct pci_attach_args *pa = aux; 347 pci_chipset_tag_t pc = pa->pa_pc; 348 pci_intr_handle_t ih; 349 const char *intrstr = NULL; 350 bus_space_tag_t iot, memt; 351 bus_space_handle_t ioh, memh; 352 int ioh_valid, memh_valid, i, j; 353 const struct tulip_pci_product *tpp; 354 prop_data_t ea; 355 uint8_t enaddr[ETHER_ADDR_LEN]; 356 uint32_t val = 0; 357 pcireg_t reg; 358 int error; 359 bus_size_t iosize = 0, memsize = 0; 360 char intrbuf[PCI_INTRSTR_LEN]; 361 362 sc->sc_dev = self; 363 sc->sc_devno = pa->pa_device; 364 psc->sc_pc = pa->pa_pc; 365 psc->sc_pcitag = pa->pa_tag; 366 367 LIST_INIT(&psc->sc_intrslaves); 368 369 tpp = tlp_pci_lookup(pa); 370 if (tpp == NULL) { 371 printf("\n"); 372 panic("tlp_pci_attach: impossible"); 373 } 374 sc->sc_chip = tpp->tpp_chip; 375 376 /* 377 * By default, Tulip registers are 8 bytes long (4 bytes 378 * followed by a 4 byte pad). 379 */ 380 sc->sc_regshift = 3; 381 382 /* 383 * No power management hooks. 384 * XXX Maybe we should add some! 385 */ 386 sc->sc_flags |= TULIPF_ENABLED; 387 388 /* 389 * Get revision info, and set some chip-specific variables. 390 */ 391 sc->sc_rev = PCI_REVISION(pa->pa_class); 392 switch (sc->sc_chip) { 393 case TULIP_CHIP_21140: 394 if (sc->sc_rev >= 0x20) 395 sc->sc_chip = TULIP_CHIP_21140A; 396 break; 397 398 case TULIP_CHIP_21142: 399 if (sc->sc_rev >= 0x20) 400 sc->sc_chip = TULIP_CHIP_21143; 401 break; 402 403 case TULIP_CHIP_82C168: 404 if (sc->sc_rev >= 0x20) 405 sc->sc_chip = TULIP_CHIP_82C169; 406 break; 407 408 case TULIP_CHIP_MX98713: 409 if (sc->sc_rev >= 0x10) 410 sc->sc_chip = TULIP_CHIP_MX98713A; 411 break; 412 413 case TULIP_CHIP_MX98715: 414 if (sc->sc_rev >= 0x20) 415 sc->sc_chip = TULIP_CHIP_MX98715A; 416 if (sc->sc_rev >= 0x25) 417 sc->sc_chip = TULIP_CHIP_MX98715AEC_X; 418 if (sc->sc_rev >= 0x30) 419 sc->sc_chip = TULIP_CHIP_MX98725; 420 break; 421 422 case TULIP_CHIP_WB89C840F: 423 sc->sc_regshift = 2; 424 break; 425 426 case TULIP_CHIP_AN985: 427 /* 428 * The AN983 and AN985 are very similar, and are 429 * differentiated by a "signature" register that 430 * is like, but not identical, to a PCI ID register. 431 */ 432 reg = pci_conf_read(pc, pa->pa_tag, 0x80); 433 switch (reg) { 434 case 0x09811317: 435 sc->sc_chip = TULIP_CHIP_AN985; 436 break; 437 438 case 0x09851317: 439 sc->sc_chip = TULIP_CHIP_AN983; 440 break; 441 442 default: 443 /* Unknown -- use default. */ 444 break; 445 } 446 break; 447 448 case TULIP_CHIP_AX88140: 449 if (sc->sc_rev >= 0x10) 450 sc->sc_chip = TULIP_CHIP_AX88141; 451 break; 452 453 case TULIP_CHIP_DM9102: 454 if (sc->sc_rev >= 0x30) 455 sc->sc_chip = TULIP_CHIP_DM9102A; 456 break; 457 458 default: 459 /* Nothing. */ 460 break; 461 } 462 463 aprint_normal(": %s Ethernet, pass %d.%d\n", 464 tlp_chip_name(sc->sc_chip), 465 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf); 466 467 switch (sc->sc_chip) { 468 case TULIP_CHIP_21040: 469 if (sc->sc_rev < 0x20) { 470 aprint_normal_dev(self, 471 "21040 must be at least pass 2.0\n"); 472 return; 473 } 474 break; 475 476 case TULIP_CHIP_21140: 477 if (sc->sc_rev < 0x11) { 478 aprint_normal_dev(self, 479 "21140 must be at least pass 1.1\n"); 480 return; 481 } 482 break; 483 484 default: 485 /* Nothing. */ 486 break; 487 } 488 489 /* 490 * Check to see if the device is in power-save mode, and 491 * being it out if necessary. 492 */ 493 switch (sc->sc_chip) { 494 case TULIP_CHIP_21140: 495 case TULIP_CHIP_21140A: 496 case TULIP_CHIP_21142: 497 case TULIP_CHIP_21143: 498 case TULIP_CHIP_MX98713A: 499 case TULIP_CHIP_MX98715: 500 case TULIP_CHIP_MX98715A: 501 case TULIP_CHIP_MX98715AEC_X: 502 case TULIP_CHIP_MX98725: 503 case TULIP_CHIP_DM9102: 504 case TULIP_CHIP_DM9102A: 505 case TULIP_CHIP_AX88140: 506 case TULIP_CHIP_AX88141: 507 case TULIP_CHIP_RS7112: 508 /* 509 * Clear the "sleep mode" bit in the CFDA register. 510 */ 511 reg = pci_conf_read(pc, pa->pa_tag, TULIP_PCI_CFDA); 512 if (reg & (CFDA_SLEEP|CFDA_SNOOZE)) 513 pci_conf_write(pc, pa->pa_tag, TULIP_PCI_CFDA, 514 reg & ~(CFDA_SLEEP|CFDA_SNOOZE)); 515 break; 516 517 default: 518 /* Nothing. */ 519 break; 520 } 521 522 /* power up chip */ 523 if ((error = pci_activate(pa->pa_pc, pa->pa_tag, self, 524 NULL)) && error != EOPNOTSUPP) { 525 aprint_error_dev(self, "cannot activate %d\n", 526 error); 527 return; 528 } 529 530 /* 531 * Map the device. 532 */ 533 534 ioh_valid = (pci_mapreg_map(pa, TULIP_PCI_IOBA, 535 PCI_MAPREG_TYPE_IO, 0, 536 &iot, &ioh, NULL, &iosize) == 0); 537 memh_valid = (pci_mapreg_map(pa, TULIP_PCI_MMBA, 538 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 539 &memt, &memh, NULL, &memsize) == 0); 540 if (memh_valid) { 541 sc->sc_st = memt; 542 sc->sc_sh = memh; 543 psc->sc_mapsize = memsize; 544 if (ioh_valid) { 545 bus_space_unmap(iot, ioh, iosize); 546 ioh_valid = 0; 547 } 548 } else if (ioh_valid) { 549 sc->sc_st = iot; 550 sc->sc_sh = ioh; 551 psc->sc_mapsize = iosize; 552 if (memh_valid) { 553 bus_space_unmap(memt, memh, memsize); 554 memh_valid = 0; 555 } 556 } else { 557 aprint_error_dev(self, "unable to map device registers\n"); 558 goto fail; 559 } 560 561 sc->sc_dmat = pa->pa_dmat; 562 563 /* 564 * Make sure bus mastering is enabled. 565 */ 566 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 567 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 568 PCI_COMMAND_MASTER_ENABLE); 569 570 /* 571 * Get the cacheline size. 572 */ 573 sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag, 574 PCI_BHLC_REG)); 575 576 /* 577 * Get PCI data moving command info. 578 */ 579 if (pa->pa_flags & PCI_FLAGS_MRL_OKAY) 580 sc->sc_flags |= TULIPF_MRL; 581 if (pa->pa_flags & PCI_FLAGS_MRM_OKAY) 582 sc->sc_flags |= TULIPF_MRM; 583 if (pa->pa_flags & PCI_FLAGS_MWI_OKAY) 584 sc->sc_flags |= TULIPF_MWI; 585 586 /* 587 * Read the contents of the Ethernet Address ROM/SROM. 588 */ 589 switch (sc->sc_chip) { 590 case TULIP_CHIP_21040: 591 sc->sc_srom_addrbits = 6; 592 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, M_NOWAIT); 593 TULIP_WRITE(sc, CSR_MIIROM, MIIROM_SROMCS); 594 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 595 for (j = 0; j < 10000; j++) { 596 val = TULIP_READ(sc, CSR_MIIROM); 597 if ((val & MIIROM_DN) == 0) 598 break; 599 } 600 sc->sc_srom[i] = val & MIIROM_DATA; 601 } 602 break; 603 604 case TULIP_CHIP_82C168: 605 case TULIP_CHIP_82C169: 606 { 607 sc->sc_srom_addrbits = 2; 608 sc->sc_srom = malloc(TULIP_ROM_SIZE(2), M_DEVBUF, M_NOWAIT); 609 610 /* 611 * The Lite-On PNIC stores the Ethernet address in 612 * the first 3 words of the EEPROM. EEPROM access 613 * is not like the other Tulip chips. 614 */ 615 for (i = 0; i < 6; i += 2) { 616 TULIP_WRITE(sc, CSR_PNIC_SROMCTL, 617 PNIC_SROMCTL_READ | (i >> 1)); 618 for (j = 0; j < 500; j++) { 619 delay(2); 620 val = TULIP_READ(sc, CSR_MIIROM); 621 if ((val & PNIC_MIIROM_BUSY) == 0) 622 break; 623 } 624 if (val & PNIC_MIIROM_BUSY) { 625 aprint_error_dev(self, "EEPROM timed out\n"); 626 goto fail; 627 } 628 val &= PNIC_MIIROM_DATA; 629 sc->sc_srom[i] = val >> 8; 630 sc->sc_srom[i + 1] = val & 0xff; 631 } 632 break; 633 } 634 635 default: 636 /* 637 * XXX This isn't quite the right way to do this; we should 638 * XXX be attempting to fetch the mac-addr property in the 639 * XXX bus-agnostic part of the driver independently. But 640 * XXX that requires a larger change in the SROM handling 641 * XXX logic, and for now we can at least remove a machine- 642 * XXX dependent wart from the PCI front-end. 643 */ 644 ea = prop_dictionary_get(device_properties(self), 645 "mac-address"); 646 if (ea != NULL) { 647 extern int tlp_srom_debug; 648 KASSERT(prop_object_type(ea) == PROP_TYPE_DATA); 649 KASSERT(prop_data_size(ea) == ETHER_ADDR_LEN); 650 651 memcpy(enaddr, prop_data_data_nocopy(ea), 652 ETHER_ADDR_LEN); 653 654 sc->sc_srom_addrbits = 6; 655 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, 656 M_NOWAIT|M_ZERO); 657 memcpy(sc->sc_srom, enaddr, sizeof(enaddr)); 658 if (tlp_srom_debug) { 659 aprint_normal("SROM CONTENTS:"); 660 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 661 if ((i % 8) == 0) 662 aprint_normal("\n\t"); 663 aprint_normal("0x%02x ", sc->sc_srom[i]); 664 } 665 aprint_normal("\n"); 666 } 667 break; 668 } 669 670 /* Check for a slaved ROM on a multi-port board. */ 671 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDROM, 672 TULIP_PCI_SLAVEROM); 673 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 674 sc->sc_srom_addrbits = 675 psc->sc_master->sc_tulip.sc_srom_addrbits; 676 sc->sc_srom = psc->sc_master->sc_tulip.sc_srom; 677 enaddr[5] += 678 sc->sc_devno - psc->sc_master->sc_tulip.sc_devno; 679 } 680 else if (tlp_read_srom(sc) == 0) 681 goto cant_cope; 682 break; 683 } 684 685 /* 686 * Deal with chip/board quirks. This includes setting up 687 * the mediasw, and extracting the Ethernet address from 688 * the rombuf. 689 */ 690 switch (sc->sc_chip) { 691 case TULIP_CHIP_21040: 692 /* 693 * Parse the Ethernet Address ROM. 694 */ 695 if (tlp_parse_old_srom(sc, enaddr) == 0) 696 goto cant_cope; 697 698 699 /* 700 * All 21040 boards start out with the same 701 * media switch. 702 */ 703 sc->sc_mediasw = &tlp_21040_mediasw; 704 705 /* 706 * Deal with any quirks this board might have. 707 */ 708 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21040_quirks); 709 break; 710 711 case TULIP_CHIP_21041: 712 /* Check for new format SROM. */ 713 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 714 /* 715 * Not an ISV SROM; try the old DEC Ethernet Address 716 * ROM format. 717 */ 718 if (tlp_parse_old_srom(sc, enaddr) == 0) 719 goto cant_cope; 720 } 721 722 /* 723 * All 21041 boards use the same media switch; they all 724 * work basically the same! Yippee! 725 */ 726 sc->sc_mediasw = &tlp_21041_mediasw; 727 728 /* 729 * Deal with any quirks this board might have. 730 */ 731 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21041_quirks); 732 break; 733 734 case TULIP_CHIP_21140: 735 case TULIP_CHIP_21140A: 736 /* Check for new format SROM. */ 737 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 738 /* 739 * Not an ISV SROM; try the old DEC Ethernet Address 740 * ROM format. 741 */ 742 if (tlp_parse_old_srom(sc, enaddr) == 0) 743 goto cant_cope; 744 } else { 745 /* 746 * We start out with the 2114x ISV media switch. 747 * When we search for quirks, we may change to 748 * a different switch. 749 */ 750 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 751 } 752 753 /* 754 * Deal with any quirks this board might have. 755 */ 756 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21140_quirks); 757 758 /* 759 * Bail out now if we can't deal with this board. 760 */ 761 if (sc->sc_mediasw == NULL) 762 goto cant_cope; 763 break; 764 765 case TULIP_CHIP_21142: 766 case TULIP_CHIP_21143: 767 /* Check for new format SROM. */ 768 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 769 /* 770 * Not an ISV SROM; try the old DEC Ethernet Address 771 * ROM format. 772 */ 773 if (tlp_parse_old_srom(sc, enaddr) == 0) { 774 /* 775 * One last try: just copy the address 776 * from offset 20 and try to look 777 * up quirks. 778 */ 779 memcpy(enaddr, &sc->sc_srom[20], 780 ETHER_ADDR_LEN); 781 } 782 } else { 783 /* 784 * We start out with the 2114x ISV media switch. 785 * When we search for quirks, we may change to 786 * a different switch. 787 */ 788 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 789 } 790 791 /* 792 * Deal with any quirks this board might have. 793 */ 794 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21142_quirks); 795 796 /* 797 * Bail out now if we can't deal with this board. 798 */ 799 if (sc->sc_mediasw == NULL) 800 goto cant_cope; 801 break; 802 803 case TULIP_CHIP_82C168: 804 case TULIP_CHIP_82C169: 805 /* 806 * Lite-On PNIC's Ethernet address is the first 6 807 * bytes of its EEPROM. 808 */ 809 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 810 811 /* 812 * Lite-On PNICs always use the same mediasw; we 813 * select MII vs. internal NWAY automatically. 814 */ 815 sc->sc_mediasw = &tlp_pnic_mediasw; 816 break; 817 818 case TULIP_CHIP_MX98713: 819 /* 820 * The Macronix MX98713 has an MII and GPIO, but no 821 * internal Nway block. This chip is basically a 822 * perfect 21140A clone, with the exception of the 823 * a magic register frobbing in order to make the 824 * interface function. 825 */ 826 if (tlp_isv_srom_enaddr(sc, enaddr)) { 827 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 828 break; 829 } 830 /* FALLTHROUGH */ 831 832 case TULIP_CHIP_82C115: 833 /* 834 * Yippee! The Lite-On 82C115 is a clone of 835 * the MX98725 (the data sheet even says `MXIC' 836 * on it)! Imagine that, a clone of a clone. 837 * 838 * The differences are really minimal: 839 * 840 * - Wake-On-LAN support 841 * - 128-bit multicast hash table, rather than 842 * the standard 512-bit hash table 843 */ 844 /* FALLTHROUGH */ 845 846 case TULIP_CHIP_MX98713A: 847 case TULIP_CHIP_MX98715A: 848 case TULIP_CHIP_MX98715AEC_X: 849 case TULIP_CHIP_MX98725: 850 /* 851 * The MX98713A has an MII as well as an internal Nway block, 852 * but no GPIO. The MX98715 and MX98725 have an internal 853 * Nway block only. 854 * 855 * The internal Nway block, unlike the Lite-On PNIC's, does 856 * just that - performs Nway. Once autonegotiation completes, 857 * we must program the GPR media information into the chip. 858 * 859 * The byte offset of the Ethernet address is stored at 860 * offset 0x70. 861 */ 862 memcpy(enaddr, &sc->sc_srom[sc->sc_srom[0x70]], ETHER_ADDR_LEN); 863 sc->sc_mediasw = &tlp_pmac_mediasw; 864 break; 865 866 case TULIP_CHIP_WB89C840F: 867 /* 868 * Winbond 89C840F's Ethernet address is the first 869 * 6 bytes of its EEPROM. 870 */ 871 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 872 873 /* 874 * Winbond 89C840F has an MII attached to the SIO. 875 */ 876 sc->sc_mediasw = &tlp_sio_mii_mediasw; 877 break; 878 879 case TULIP_CHIP_AL981: 880 /* 881 * The ADMtek AL981's Ethernet address is located 882 * at offset 8 of its EEPROM. 883 */ 884 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 885 886 /* 887 * ADMtek AL981 has a built-in PHY accessed through 888 * special registers. 889 */ 890 sc->sc_mediasw = &tlp_al981_mediasw; 891 break; 892 893 case TULIP_CHIP_AN983: 894 case TULIP_CHIP_AN985: 895 /* 896 * The ADMtek AN985's Ethernet address is located 897 * at offset 8 of its EEPROM. 898 */ 899 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 900 901 /* 902 * The ADMtek AN985 can be configured in Single-Chip 903 * mode or MAC-only mode. Single-Chip uses the built-in 904 * PHY, MAC-only has an external PHY (usually HomePNA). 905 * The selection is based on an EEPROM setting, and both 906 * PHYs are accessed via MII attached to SIO. 907 * 908 * The AN985 "ghosts" the internal PHY onto all 909 * MII addresses, so we have to use a media init 910 * routine that limits the search. 911 * XXX How does this work with MAC-only mode? 912 */ 913 sc->sc_mediasw = &tlp_an985_mediasw; 914 break; 915 916 case TULIP_CHIP_DM9102: 917 case TULIP_CHIP_DM9102A: 918 /* 919 * Some boards with the Davicom chip have an ISV 920 * SROM (mostly DM9102A boards -- trying to describe 921 * the HomePNA PHY, probably) although the data in 922 * them is generally wrong. Check for ISV format 923 * and grab the Ethernet address that way, and if 924 * that fails, fall back on grabbing it from an 925 * observed offset of 20 (which is where it would 926 * be in an ISV SROM anyhow, tho ISV can cope with 927 * multi-port boards). 928 */ 929 if (!tlp_isv_srom_enaddr(sc, enaddr)) { 930 931 prop_data_t eaddrprop; 932 933 eaddrprop = prop_dictionary_get( 934 device_properties(self), "mac-address"); 935 936 if (eaddrprop != NULL 937 && prop_data_size(eaddrprop) == ETHER_ADDR_LEN) 938 memcpy(enaddr, 939 prop_data_data_nocopy(eaddrprop), 940 ETHER_ADDR_LEN); 941 else 942 memcpy(enaddr, &sc->sc_srom[20], 943 ETHER_ADDR_LEN); 944 } 945 946 /* 947 * Davicom chips all have an internal MII interface 948 * and a built-in PHY. DM9102A also has a an external 949 * MII interface, usually with a HomePNA PHY attached 950 * to it. 951 */ 952 sc->sc_mediasw = &tlp_dm9102_mediasw; 953 break; 954 955 case TULIP_CHIP_AX88140: 956 case TULIP_CHIP_AX88141: 957 /* 958 * ASIX AX88140/AX88141 Ethernet Address is located at offset 959 * 20 of the SROM. 960 */ 961 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN); 962 963 /* 964 * ASIX AX88140A/AX88141 chip can have a built-in PHY or 965 * an external MII interface. 966 */ 967 sc->sc_mediasw = &tlp_asix_mediasw; 968 break; 969 970 case TULIP_CHIP_RS7112: 971 /* 972 * RS7112 Ethernet Address is located of offset 0x19a 973 * of the SROM 974 */ 975 memcpy(enaddr, &sc->sc_srom[0x19a], ETHER_ADDR_LEN); 976 977 /* RS7112 chip has a PHY at MII address 1 */ 978 sc->sc_mediasw = &tlp_rs7112_mediasw; 979 break; 980 981 default: 982 cant_cope: 983 aprint_error_dev(self, "sorry, unable to handle your board\n"); 984 goto fail; 985 } 986 987 /* 988 * Handle shared interrupts. 989 */ 990 if (psc->sc_flags & TULIP_PCI_SHAREDINTR) { 991 if (psc->sc_master) 992 psc->sc_flags |= TULIP_PCI_SLAVEINTR; 993 else { 994 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDINTR, 995 TULIP_PCI_SLAVEINTR); 996 if (psc->sc_master == NULL) 997 psc->sc_master = psc; 998 } 999 LIST_INSERT_HEAD(&psc->sc_master->sc_intrslaves, 1000 psc, sc_intrq); 1001 } 1002 1003 if (psc->sc_flags & TULIP_PCI_SLAVEINTR) { 1004 aprint_normal_dev(self, "sharing interrupt with %s\n", 1005 device_xname(psc->sc_master->sc_tulip.sc_dev)); 1006 } else { 1007 /* 1008 * Map and establish our interrupt. 1009 */ 1010 if (pci_intr_map(pa, &ih)) { 1011 aprint_error_dev(self, "unable to map interrupt\n"); 1012 goto fail; 1013 } 1014 intrstr = pci_intr_string(pc, ih, intrbuf, sizeof(intrbuf)); 1015 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, 1016 (psc->sc_flags & TULIP_PCI_SHAREDINTR) ? 1017 tlp_pci_shared_intr : tlp_intr, sc); 1018 if (psc->sc_ih == NULL) { 1019 aprint_error_dev(self, "unable to establish interrupt"); 1020 if (intrstr != NULL) 1021 aprint_error(" at %s", intrstr); 1022 aprint_error("\n"); 1023 goto fail; 1024 } 1025 aprint_normal_dev(self, "interrupting at %s\n", 1026 intrstr); 1027 } 1028 1029 /* 1030 * Finish off the attach. 1031 */ 1032 error = tlp_attach(sc, enaddr); 1033 if (error) 1034 goto fail; 1035 return; 1036 1037 fail: 1038 if (psc->sc_ih != NULL) { 1039 pci_intr_disestablish(psc->sc_pc, psc->sc_ih); 1040 psc->sc_ih = NULL; 1041 } 1042 1043 if (ioh_valid) 1044 bus_space_unmap(iot, ioh, iosize); 1045 if (memh_valid) 1046 bus_space_unmap(memt, memh, memsize); 1047 psc->sc_mapsize = 0; 1048 return; 1049 } 1050 1051 static int 1052 tlp_pci_detach(device_t self, int flags) 1053 { 1054 struct tulip_pci_softc *psc = device_private(self); 1055 struct tulip_softc *sc = &psc->sc_tulip; 1056 int rv; 1057 1058 rv = tlp_detach(sc); 1059 if (rv) 1060 return rv; 1061 1062 if (psc->sc_ih != NULL) { 1063 pci_intr_disestablish(psc->sc_pc, psc->sc_ih); 1064 psc->sc_ih = NULL; 1065 } 1066 1067 if (psc->sc_mapsize) { 1068 bus_space_unmap(sc->sc_st, sc->sc_sh, psc->sc_mapsize); 1069 psc->sc_mapsize = 0; 1070 } 1071 1072 return 0; 1073 } 1074 1075 static int 1076 tlp_pci_shared_intr(void *arg) 1077 { 1078 struct tulip_pci_softc *master = arg, *slave; 1079 int rv = 0; 1080 1081 for (slave = LIST_FIRST(&master->sc_intrslaves); 1082 slave != NULL; 1083 slave = LIST_NEXT(slave, sc_intrq)) 1084 rv |= tlp_intr(&slave->sc_tulip); 1085 1086 return rv; 1087 } 1088 1089 static void 1090 tlp_pci_dec_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1091 { 1092 struct tulip_softc *sc = &psc->sc_tulip; 1093 1094 /* 1095 * This isn't really a quirk-gathering device, really. We 1096 * just want to get the spiffy DEC board name from the SROM. 1097 */ 1098 strcpy(sc->sc_name, "DEC "); 1099 1100 if (memcmp(&sc->sc_srom[29], "DE500", 5) == 0 || 1101 memcmp(&sc->sc_srom[29], "DE450", 5) == 0) 1102 memcpy(&sc->sc_name[4], &sc->sc_srom[29], 8); 1103 else 1104 sc->sc_name[3] = '\0'; 1105 } 1106 1107 static void 1108 tlp_pci_znyx_21040_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1109 { 1110 struct tulip_softc *sc = &psc->sc_tulip; 1111 uint16_t id = 0; 1112 1113 /* 1114 * If we have a slaved ROM, just copy the bits from the master. 1115 * This is in case we fail the ROM ID check (older boards) and 1116 * need to fall back on Ethernet address model checking; that 1117 * will fail for slave chips. 1118 */ 1119 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 1120 strcpy(sc->sc_name, psc->sc_master->sc_tulip.sc_name); 1121 sc->sc_mediasw = psc->sc_master->sc_tulip.sc_mediasw; 1122 psc->sc_flags |= 1123 psc->sc_master->sc_flags & TULIP_PCI_SHAREDINTR; 1124 return; 1125 } 1126 1127 if (sc->sc_srom[32] == 0x4a && sc->sc_srom[33] == 0x52) { 1128 id = sc->sc_srom[37] | (sc->sc_srom[36] << 8); 1129 switch (id) { 1130 zx312: 1131 case 0x0602: /* ZX312 */ 1132 strcpy(sc->sc_name, "ZNYX ZX312"); 1133 return; 1134 1135 case 0x0622: /* ZX312T */ 1136 strcpy(sc->sc_name, "ZNYX ZX312T"); 1137 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1138 return; 1139 1140 zx314_inta: 1141 case 0x0701: /* ZX314 INTA */ 1142 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1143 /* FALLTHROUGH */ 1144 case 0x0711: /* ZX314 */ 1145 strcpy(sc->sc_name, "ZNYX ZX314"); 1146 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1147 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1148 return; 1149 1150 zx315_inta: 1151 case 0x0801: /* ZX315 INTA */ 1152 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1153 /* FALLTHROUGH */ 1154 case 0x0811: /* ZX315 */ 1155 strcpy(sc->sc_name, "ZNYX ZX315"); 1156 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1157 return; 1158 1159 default: 1160 id = 0; 1161 break; 1162 } 1163 } 1164 1165 /* 1166 * Deal with boards that have broken ROMs. 1167 */ 1168 if (id == 0) { 1169 if ((enaddr[3] & ~3) == 0xf0 && (enaddr[5] & 3) == 0x00) 1170 goto zx314_inta; 1171 if ((enaddr[3] & ~3) == 0xf4 && (enaddr[5] & 1) == 0x00) 1172 goto zx315_inta; 1173 if ((enaddr[3] & ~3) == 0xec) 1174 goto zx312; 1175 } 1176 1177 strcpy(sc->sc_name, "ZNYX ZX31x"); 1178 } 1179 1180 static void tlp_pci_znyx_21142_qs6611_reset(struct tulip_softc *); 1181 1182 static void 1183 tlp_pci_znyx_21142_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1184 { 1185 struct tulip_softc *sc = &psc->sc_tulip; 1186 pcireg_t subid; 1187 1188 subid = pci_conf_read(psc->sc_pc, psc->sc_pcitag, PCI_SUBSYS_ID_REG); 1189 1190 if (PCI_VENDOR(subid) != PCI_VENDOR_ZNYX) 1191 return; /* ? */ 1192 1193 switch (PCI_PRODUCT(subid) & 0xff) { 1194 /* 1195 * ZNYX 21143 boards with QS6611 PHY 1196 */ 1197 case 0x12: /* ZX345Q */ 1198 case 0x13: /* ZX346Q */ 1199 case 0x14: /* ZX348Q */ 1200 case 0x18: /* ZX414 */ 1201 case 0x19: /* ZX412 */ 1202 case 0x1a: /* ZX444 */ 1203 case 0x1b: /* ZX442 */ 1204 case 0x23: /* ZX212 */ 1205 case 0x24: /* ZX214 */ 1206 case 0x29: /* ZX374 */ 1207 case 0x2d: /* ZX372 */ 1208 case 0x2b: /* ZX244 */ 1209 case 0x2c: /* ZX424 */ 1210 case 0x2e: /* ZX422 */ 1211 aprint_normal_dev(sc->sc_dev, "QS6611 PHY\n"); 1212 sc->sc_reset = tlp_pci_znyx_21142_qs6611_reset; 1213 break; 1214 } 1215 } 1216 1217 static void 1218 tlp_pci_znyx_21142_qs6611_reset(struct tulip_softc *sc) 1219 { 1220 1221 /* 1222 * Reset QS6611 PHY. 1223 */ 1224 TULIP_WRITE(sc, CSR_SIAGEN, 1225 SIAGEN_CWE | SIAGEN_LGS1 | SIAGEN_ABM | (0xf << 16)); 1226 delay(200); 1227 TULIP_WRITE(sc, CSR_SIAGEN, (0x4 << 16)); 1228 delay(10000); 1229 } 1230 1231 static void 1232 tlp_pci_smc_21040_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1233 { 1234 struct tulip_softc *sc = &psc->sc_tulip; 1235 uint16_t id1, id2, ei; 1236 int auibnc = 0, utp = 0; 1237 char *cp; 1238 1239 id1 = sc->sc_srom[0x60] | (sc->sc_srom[0x61] << 8); 1240 id2 = sc->sc_srom[0x62] | (sc->sc_srom[0x63] << 8); 1241 ei = sc->sc_srom[0x66] | (sc->sc_srom[0x67] << 8); 1242 1243 strcpy(sc->sc_name, "SMC 8432"); 1244 cp = &sc->sc_name[8]; 1245 1246 if ((id1 & 1) == 0) { 1247 *cp++ = 'B'; 1248 auibnc = 1; 1249 } 1250 if ((id1 & 0xff) > 0x32) { 1251 *cp++ = 'T'; 1252 utp = 1; 1253 } 1254 if ((id1 & 0x4000) == 0) { 1255 *cp++ = 'A'; 1256 auibnc = 1; 1257 } 1258 if (id2 == 0x15) { 1259 sc->sc_name[7] = '4'; 1260 *cp++ = '-'; 1261 *cp++ = 'C'; 1262 *cp++ = 'H'; 1263 *cp++ = ei ? '2' : '1'; 1264 } 1265 *cp = '\0'; 1266 1267 if (utp != 0 && auibnc == 0) 1268 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1269 else if (utp == 0 && auibnc != 0) 1270 sc->sc_mediasw = &tlp_21040_auibnc_mediasw; 1271 } 1272 1273 static void 1274 tlp_pci_cogent_21040_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1275 { 1276 1277 strcpy(psc->sc_tulip.sc_name, "Cogent multi-port"); 1278 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1279 } 1280 1281 static void 1282 tlp_pci_accton_21040_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1283 { 1284 1285 strcpy(psc->sc_tulip.sc_name, "ACCTON EN1203"); 1286 } 1287 1288 static void tlp_pci_asante_21140_reset(struct tulip_softc *); 1289 1290 static void 1291 tlp_pci_asante_21140_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1292 { 1293 struct tulip_softc *sc = &psc->sc_tulip; 1294 1295 /* 1296 * Some Asante boards don't use the ISV SROM format. For 1297 * those that don't, we initialize the GPIO direction bits, 1298 * and provide our own reset hook, which resets the MII. 1299 * 1300 * All of these boards use SIO-attached-MII media. 1301 */ 1302 if (sc->sc_mediasw == &tlp_2114x_isv_mediasw) 1303 return; 1304 1305 strcpy(sc->sc_name, "Asante"); 1306 1307 sc->sc_gp_dir = 0xbf; 1308 sc->sc_reset = tlp_pci_asante_21140_reset; 1309 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1310 } 1311 1312 static void 1313 tlp_pci_e100_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1314 { 1315 struct tulip_softc *sc = &psc->sc_tulip; 1316 1317 if (sc->sc_mediasw == &tlp_2114x_isv_mediasw) 1318 return; 1319 1320 strcpy(sc->sc_name, "UMAX E100"); 1321 1322 sc->sc_gp_dir = 0xbf; 1323 sc->sc_reset = tlp_pci_asante_21140_reset; 1324 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1325 } 1326 1327 static void 1328 tlp_pci_asante_21140_reset(struct tulip_softc *sc) 1329 { 1330 1331 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1332 TULIP_WRITE(sc, CSR_GPP, 0x8); 1333 delay(100); 1334 TULIP_WRITE(sc, CSR_GPP, 0); 1335 } 1336 1337 static void tlp_pci_phobos_21140_reset(struct tulip_softc *); 1338 1339 static void 1340 tlp_pci_phobos_21140_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1341 { 1342 struct tulip_softc *sc = &psc->sc_tulip; 1343 1344 /* 1345 * Phobos boards just use MII-on-SIO. 1346 */ 1347 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1348 sc->sc_reset = tlp_pci_phobos_21140_reset; 1349 1350 /* 1351 * These boards appear solely on sgimips machines behind a special 1352 * GIO<->PCI ASIC and require the DBO and BLE bits to be set in CSR0. 1353 */ 1354 sc->sc_flags |= (TULIPF_BLE | TULIPF_DBO); 1355 } 1356 1357 static void 1358 tlp_pci_phobos_21140_reset(struct tulip_softc *sc) 1359 { 1360 1361 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | 0xfd); 1362 delay(10); 1363 TULIP_WRITE(sc, CSR_GPP, 0xfd); 1364 delay(10); 1365 TULIP_WRITE(sc, CSR_GPP, 0); 1366 } 1367 1368 /* 1369 * SMC 9332DST media switch. 1370 */ 1371 static void tlp_smc9332dst_tmsw_init(struct tulip_softc *); 1372 1373 static const struct tulip_mediasw tlp_smc9332dst_mediasw = { 1374 tlp_smc9332dst_tmsw_init, 1375 tlp_21140_gpio_get, 1376 tlp_21140_gpio_set 1377 }; 1378 1379 static void 1380 tlp_pci_smc_21140_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1381 { 1382 struct tulip_softc *sc = &psc->sc_tulip; 1383 1384 strcpy(psc->sc_tulip.sc_name, "SMC 9332DST"); 1385 sc->sc_mediasw = &tlp_smc9332dst_mediasw; 1386 } 1387 1388 static void 1389 tlp_smc9332dst_tmsw_init(struct tulip_softc *sc) 1390 { 1391 struct tulip_21x4x_media *tm; 1392 const char *sep = ""; 1393 uint32_t reg; 1394 int i, cnt; 1395 1396 sc->sc_gp_dir = GPP_SMC9332DST_PINS; 1397 sc->sc_opmode = OPMODE_MBO | OPMODE_PS; 1398 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 1399 1400 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 1401 tlp_mediastatus); 1402 aprint_normal_dev(sc->sc_dev, ""); 1403 1404 #define ADD(m, c) \ 1405 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK|M_ZERO); \ 1406 tm->tm_opmode = (c); \ 1407 tm->tm_gpdata = GPP_SMC9332DST_INIT; \ 1408 ifmedia_add(&sc->sc_mii.mii_media, (m), 0, tm) 1409 #define PRINT(str) aprint_normal("%s%s", sep, str); sep = ", " 1410 1411 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0), OPMODE_TTM); 1412 PRINT("10baseT"); 1413 1414 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, 0), 1415 OPMODE_TTM | OPMODE_FD); 1416 PRINT("10baseT-FDX"); 1417 1418 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 1419 OPMODE_PS | OPMODE_PCS | OPMODE_SCR); 1420 PRINT("100baseTX"); 1421 1422 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, 0), 1423 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD); 1424 PRINT("100baseTX-FDX"); 1425 1426 #undef ADD 1427 #undef PRINT 1428 1429 aprint_normal("\n"); 1430 1431 tlp_reset(sc); 1432 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode | OPMODE_PCS | OPMODE_SCR); 1433 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1434 delay(10); 1435 TULIP_WRITE(sc, CSR_GPP, GPP_SMC9332DST_INIT); 1436 delay(200000); 1437 cnt = 0; 1438 for (i = 1000; i > 0; i--) { 1439 reg = TULIP_READ(sc, CSR_GPP); 1440 if ((~reg & (GPP_SMC9332DST_OK10 | 1441 GPP_SMC9332DST_OK100)) == 0) { 1442 if (cnt++ > 100) { 1443 break; 1444 } 1445 } else if ((reg & GPP_SMC9332DST_OK10) == 0) { 1446 break; 1447 } else { 1448 cnt = 0; 1449 } 1450 delay(1000); 1451 } 1452 if (cnt > 100) { 1453 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX); 1454 } else { 1455 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 1456 } 1457 } 1458 1459 static void 1460 tlp_pci_vpc_21140_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1461 { 1462 struct tulip_softc *sc = &psc->sc_tulip; 1463 char *p1 = (char *) &sc->sc_srom[32]; 1464 char *p2 = &sc->sc_name[0]; 1465 1466 do { 1467 if ((unsigned char) *p1 & 0x80) 1468 *p2++ = ' '; 1469 else 1470 *p2++ = *p1; 1471 } while (*p1++); 1472 } 1473 1474 static void tlp_pci_cobalt_21142_reset(struct tulip_softc *); 1475 1476 static void 1477 tlp_pci_cobalt_21142_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1478 { 1479 struct tulip_softc *sc = &psc->sc_tulip; 1480 1481 /* 1482 * Cobalt Networks interfaces are just MII-on-SIO. 1483 */ 1484 sc->sc_reset = tlp_pci_cobalt_21142_reset; 1485 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1486 1487 /* 1488 * The Cobalt systems tend to fall back to store-and-forward 1489 * pretty quickly, so we select that from the beginning to 1490 * avoid initial timeouts. 1491 */ 1492 sc->sc_txthresh = TXTH_SF; 1493 } 1494 1495 static void 1496 tlp_pci_cobalt_21142_reset(struct tulip_softc *sc) 1497 { 1498 1499 /* 1500 * Reset PHY. 1501 */ 1502 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE | (1 << 16)); 1503 delay(10); 1504 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE); 1505 delay(10); 1506 } 1507 1508 static void 1509 tlp_pci_algor_21142_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1510 { 1511 struct tulip_softc *sc = &psc->sc_tulip; 1512 1513 /* 1514 * Algorithmics boards just have MII-on-SIO. 1515 * 1516 * XXX They also have AUI on the serial interface. 1517 * XXX Deal with this. 1518 */ 1519 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1520 } 1521 1522 /* 1523 * Cogent EM1x0 (aka. Adaptec ANA-6910) media switch. 1524 */ 1525 static void tlp_cogent_em1x0_tmsw_init(struct tulip_softc *); 1526 1527 static const struct tulip_mediasw tlp_cogent_em1x0_mediasw = { 1528 tlp_cogent_em1x0_tmsw_init, 1529 tlp_21140_gpio_get, 1530 tlp_21140_gpio_set 1531 }; 1532 1533 static void 1534 tlp_pci_adaptec_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1535 { 1536 struct tulip_softc *sc = &psc->sc_tulip; 1537 uint8_t *srom = sc->sc_srom, id0; 1538 uint16_t id1, id2; 1539 1540 if (sc->sc_mediasw == NULL) { 1541 id0 = srom[32]; 1542 switch (id0) { 1543 case 0x12: 1544 strcpy(psc->sc_tulip.sc_name, "Cogent EM100TX"); 1545 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1546 break; 1547 1548 case 0x13: 1549 strcpy(psc->sc_tulip.sc_name, "Cogent ???"); 1550 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1551 psc->sc_flags |= TULIP_PCI_SHAREDINTR | 1552 TULIP_PCI_SHAREDROM; 1553 break; 1554 1555 case 0x15: 1556 strcpy(psc->sc_tulip.sc_name, "Cogent EM100FX"); 1557 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1558 break; 1559 1560 #if 0 1561 case XXX: 1562 strcpy(psc->sc_tulip.sc_name, "Cogent EM110TX"); 1563 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1564 break; 1565 #endif 1566 1567 default: 1568 printf("%s: unknown Cogent board ID 0x%02x\n", 1569 device_xname(sc->sc_dev), id0); 1570 } 1571 return; 1572 } 1573 1574 id1 = TULIP_ROM_GETW(srom, 0); 1575 id2 = TULIP_ROM_GETW(srom, 2); 1576 if (id1 != 0x1109) { 1577 goto unknown; 1578 } 1579 1580 switch (id2) { 1581 case 0x1900: 1582 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911"); 1583 break; 1584 1585 case 0x2400: 1586 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6944A"); 1587 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1588 break; 1589 1590 case 0x2b00: 1591 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911A"); 1592 break; 1593 1594 case 0x3000: 1595 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6922"); 1596 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1597 break; 1598 1599 default: 1600 unknown: 1601 printf("%s: unknown Adaptec/Cogent board ID 0x%04x/0x%04x\n", 1602 device_xname(sc->sc_dev), id1, id2); 1603 } 1604 } 1605 1606 static void 1607 tlp_cogent_em1x0_tmsw_init(struct tulip_softc *sc) 1608 { 1609 struct tulip_21x4x_media *tm; 1610 const char *sep = ""; 1611 1612 sc->sc_gp_dir = GPP_COGENT_EM1x0_PINS; 1613 sc->sc_opmode = OPMODE_MBO | OPMODE_PS; 1614 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 1615 1616 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 1617 tlp_mediastatus); 1618 aprint_normal_dev(sc->sc_dev, ""); 1619 1620 #define ADD(m, c) \ 1621 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK|M_ZERO); \ 1622 tm->tm_opmode = (c); \ 1623 tm->tm_gpdata = GPP_COGENT_EM1x0_INIT; \ 1624 ifmedia_add(&sc->sc_mii.mii_media, (m), 0, tm) 1625 #define PRINT(str) aprint_normal("%s%s", sep, str); sep = ", " 1626 1627 if (sc->sc_srom[32] == 0x15) { 1628 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, 0, 0), 1629 OPMODE_PS | OPMODE_PCS); 1630 PRINT("100baseFX"); 1631 1632 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0), 1633 OPMODE_PS | OPMODE_PCS | OPMODE_FD); 1634 PRINT("100baseFX-FDX"); 1635 aprint_normal("\n"); 1636 1637 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_FX); 1638 } else { 1639 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 1640 OPMODE_PS | OPMODE_PCS | OPMODE_SCR); 1641 PRINT("100baseTX"); 1642 1643 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0), 1644 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD); 1645 PRINT("100baseTX-FDX"); 1646 aprint_normal("\n"); 1647 1648 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX); 1649 } 1650 1651 #undef ADD 1652 #undef PRINT 1653 } 1654 1655 static void tlp_pci_netwinder_21142_reset(struct tulip_softc *); 1656 1657 static void 1658 tlp_pci_netwinder_21142_quirks(struct tulip_pci_softc *psc, 1659 const uint8_t *enaddr) 1660 { 1661 struct tulip_softc *sc = &psc->sc_tulip; 1662 1663 /* 1664 * Netwinders just use MII-on-SIO. 1665 */ 1666 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1667 sc->sc_reset = tlp_pci_netwinder_21142_reset; 1668 } 1669 1670 void 1671 tlp_pci_netwinder_21142_reset(struct tulip_softc *sc) 1672 { 1673 1674 /* 1675 * Reset the PHY. 1676 */ 1677 TULIP_WRITE(sc, CSR_SIAGEN, 0x0821 << 16); 1678 delay(10); 1679 TULIP_WRITE(sc, CSR_SIAGEN, 0x0000 << 16); 1680 delay(10); 1681 TULIP_WRITE(sc, CSR_SIAGEN, 0x0001 << 16); 1682 delay(10); 1683 } 1684 1685 static void tlp_pci_phobos_21142_reset(struct tulip_softc *); 1686 1687 static void 1688 tlp_pci_phobos_21142_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1689 { 1690 struct tulip_softc *sc = &psc->sc_tulip; 1691 1692 /* 1693 * Phobos boards just use MII-on-SIO. 1694 */ 1695 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1696 sc->sc_reset = tlp_pci_phobos_21142_reset; 1697 1698 /* 1699 * These boards appear solely on sgimips machines behind a special 1700 * GIO<->PCI ASIC and require the DBO and BLE bits to be set in CSR0. 1701 */ 1702 sc->sc_flags |= (TULIPF_BLE | TULIPF_DBO); 1703 } 1704 1705 static void 1706 tlp_pci_phobos_21142_reset(struct tulip_softc *sc) 1707 { 1708 /* 1709 * Reset PHY. 1710 */ 1711 TULIP_WRITE(sc, CSR_SIAGEN, (0x880f << 16)); 1712 delay(10); 1713 TULIP_WRITE(sc, CSR_SIAGEN, (0x800f << 16)); 1714 delay(10); 1715 } 1716
Indexes created Wed Oct 01 13:09:50 GMT 2025