if_tlp_pci.c revision 1.128
1 /* $NetBSD: if_tlp_pci.c,v 1.128 2020/07/02 09:07:10 msaitoh Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center; and Charles M. Hannum. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * PCI bus front-end for the Digital Semiconductor ``Tulip'' (21x4x) 35 * Ethernet controller family driver. 36 */ 37 38 #include <sys/cdefs.h> 39 __KERNEL_RCSID(0, "$NetBSD: if_tlp_pci.c,v 1.128 2020/07/02 09:07:10 msaitoh Exp $"); 40 41 #include <sys/param.h> 42 #include <sys/systm.h> 43 #include <sys/mbuf.h> 44 #include <sys/malloc.h> 45 #include <sys/kernel.h> 46 #include <sys/socket.h> 47 #include <sys/ioctl.h> 48 #include <sys/errno.h> 49 #include <sys/device.h> 50 51 #include <machine/endian.h> 52 53 #include <net/if.h> 54 #include <net/if_dl.h> 55 #include <net/if_media.h> 56 #include <net/if_ether.h> 57 58 #include <sys/bus.h> 59 #include <sys/intr.h> 60 61 #include <dev/mii/miivar.h> 62 #include <dev/mii/mii_bitbang.h> 63 64 #include <dev/ic/tulipreg.h> 65 #include <dev/ic/tulipvar.h> 66 67 #include <dev/pci/pcivar.h> 68 #include <dev/pci/pcireg.h> 69 #include <dev/pci/pcidevs.h> 70 71 /* 72 * PCI configuration space registers used by the Tulip. 73 */ 74 #define TULIP_PCI_IOBA PCI_BAR(0) /* i/o mapped base */ 75 #define TULIP_PCI_MMBA PCI_BAR(1) /* memory mapped base */ 76 #define TULIP_PCI_CFDA 0x40 /* configuration driver area */ 77 78 #define CFDA_SLEEP 0x80000000 /* sleep mode */ 79 #define CFDA_SNOOZE 0x40000000 /* snooze mode */ 80 81 struct tulip_pci_softc { 82 struct tulip_softc sc_tulip; /* real Tulip softc */ 83 84 /* PCI-specific goo. */ 85 void *sc_ih; /* interrupt handle */ 86 bus_size_t sc_mapsize; 87 88 pci_chipset_tag_t sc_pc; /* our PCI chipset */ 89 pcitag_t sc_pcitag; /* our PCI tag */ 90 91 int sc_flags; /* flags; see below */ 92 93 LIST_HEAD(, tulip_pci_softc) sc_intrslaves; 94 LIST_ENTRY(tulip_pci_softc) sc_intrq; 95 96 /* Our {ROM,interrupt} master. */ 97 struct tulip_pci_softc *sc_master; 98 }; 99 100 /* sc_flags */ 101 #define TULIP_PCI_SHAREDINTR 0x01 /* interrupt is shared */ 102 #define TULIP_PCI_SLAVEINTR 0x02 /* interrupt is slave */ 103 #define TULIP_PCI_SHAREDROM 0x04 /* ROM is shared */ 104 #define TULIP_PCI_SLAVEROM 0x08 /* slave of shared ROM */ 105 106 static int tlp_pci_match(device_t, cfdata_t, void *); 107 static void tlp_pci_attach(device_t, device_t, void *); 108 static int tlp_pci_detach(device_t, int); 109 110 CFATTACH_DECL3_NEW(tlp_pci, sizeof(struct tulip_pci_softc), 111 tlp_pci_match, tlp_pci_attach, tlp_pci_detach, NULL, NULL, NULL, 112 DVF_DETACH_SHUTDOWN); 113 114 static const struct tulip_pci_product { 115 uint32_t tpp_vendor; /* PCI vendor ID */ 116 uint32_t tpp_product; /* PCI product ID */ 117 tulip_chip_t tpp_chip; /* base Tulip chip type */ 118 } tlp_pci_products[] = { 119 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21040, 120 TULIP_CHIP_21040 }, 121 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21041, 122 TULIP_CHIP_21041 }, 123 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21140, 124 TULIP_CHIP_21140 }, 125 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142, 126 TULIP_CHIP_21142 }, 127 128 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C168, 129 TULIP_CHIP_82C168 }, 130 131 /* 132 * Note: This is like a MX98725 with Wake-On-LAN and a 133 * 128-bit multicast hash table. 134 */ 135 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C115, 136 TULIP_CHIP_82C115 }, 137 138 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98713, 139 TULIP_CHIP_MX98713 }, 140 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX987x5, 141 TULIP_CHIP_MX98715 }, 142 143 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100TX, 144 TULIP_CHIP_MX98713 }, 145 146 { PCI_VENDOR_WINBOND, PCI_PRODUCT_WINBOND_W89C840F, 147 TULIP_CHIP_WB89C840F }, 148 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100ATX, 149 TULIP_CHIP_WB89C840F }, 150 151 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9102, 152 TULIP_CHIP_DM9102 }, 153 154 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AL981, 155 TULIP_CHIP_AL981 }, 156 157 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN983, 158 TULIP_CHIP_AN985 }, 159 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_ADM9511, 160 TULIP_CHIP_AN985 }, 161 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_ADM9513, 162 TULIP_CHIP_AN985 }, 163 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN2242, 164 TULIP_CHIP_AN985 }, 165 166 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C910SOHOB, 167 TULIP_CHIP_AN985 }, 168 169 { PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX88140A, 170 TULIP_CHIP_AX88140 }, 171 172 { PCI_VENDOR_CONEXANT, PCI_PRODUCT_CONEXANT_LANFINITY, 173 TULIP_CHIP_RS7112 }, 174 175 { 0, 0, 176 TULIP_CHIP_INVALID }, 177 }; 178 179 struct tlp_pci_quirks { 180 void (*tpq_func)(struct tulip_pci_softc *, 181 const uint8_t *); 182 uint8_t tpq_oui[3]; 183 }; 184 185 static void tlp_pci_dec_quirks(struct tulip_pci_softc *, 186 const uint8_t *); 187 188 static void tlp_pci_znyx_21040_quirks(struct tulip_pci_softc *, 189 const uint8_t *); 190 static void tlp_pci_smc_21040_quirks(struct tulip_pci_softc *, 191 const uint8_t *); 192 static void tlp_pci_cogent_21040_quirks(struct tulip_pci_softc *, 193 const uint8_t *); 194 static void tlp_pci_accton_21040_quirks(struct tulip_pci_softc *, 195 const uint8_t *); 196 197 static void tlp_pci_cobalt_21142_quirks(struct tulip_pci_softc *, 198 const uint8_t *); 199 static void tlp_pci_algor_21142_quirks(struct tulip_pci_softc *, 200 const uint8_t *); 201 static void tlp_pci_netwinder_21142_quirks(struct tulip_pci_softc *, 202 const uint8_t *); 203 static void tlp_pci_phobos_21142_quirks(struct tulip_pci_softc *, 204 const uint8_t *); 205 static void tlp_pci_znyx_21142_quirks(struct tulip_pci_softc *, 206 const uint8_t *); 207 208 static void tlp_pci_adaptec_quirks(struct tulip_pci_softc *, 209 const uint8_t *); 210 211 static const struct tlp_pci_quirks tlp_pci_21040_quirks[] = { 212 { tlp_pci_znyx_21040_quirks, { 0x00, 0xc0, 0x95 } }, 213 { tlp_pci_smc_21040_quirks, { 0x00, 0x00, 0xc0 } }, 214 { tlp_pci_cogent_21040_quirks, { 0x00, 0x00, 0x92 } }, 215 { tlp_pci_accton_21040_quirks, { 0x00, 0x00, 0xe8 } }, 216 { NULL, { 0, 0, 0 } } 217 }; 218 219 static const struct tlp_pci_quirks tlp_pci_21041_quirks[] = { 220 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 221 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 222 { NULL, { 0, 0, 0 } } 223 }; 224 225 static void tlp_pci_asante_21140_quirks(struct tulip_pci_softc *, 226 const uint8_t *); 227 static void tlp_pci_e100_quirks(struct tulip_pci_softc *, 228 const uint8_t *); 229 static void tlp_pci_phobos_21140_quirks(struct tulip_pci_softc *, 230 const uint8_t *); 231 static void tlp_pci_smc_21140_quirks(struct tulip_pci_softc *, 232 const uint8_t *); 233 static void tlp_pci_vpc_21140_quirks(struct tulip_pci_softc *, 234 const uint8_t *); 235 236 static const struct tlp_pci_quirks tlp_pci_21140_quirks[] = { 237 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 238 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 239 { tlp_pci_e100_quirks, { 0x00, 0xa0, 0x59 } }, 240 { tlp_pci_asante_21140_quirks, { 0x00, 0x00, 0x94 } }, 241 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0x92 } }, 242 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } }, 243 { tlp_pci_phobos_21140_quirks, { 0x00, 0x60, 0xf5 } }, 244 { tlp_pci_smc_21140_quirks, { 0x00, 0x00, 0xc0 } }, 245 { tlp_pci_vpc_21140_quirks, { 0x00, 0x03, 0xff } }, 246 { NULL, { 0, 0, 0 } } 247 }; 248 249 static const struct tlp_pci_quirks tlp_pci_21142_quirks[] = { 250 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 251 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 252 { tlp_pci_cobalt_21142_quirks, { 0x00, 0x10, 0xe0 } }, 253 { tlp_pci_algor_21142_quirks, { 0x00, 0x40, 0xbc } }, 254 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } }, 255 { tlp_pci_netwinder_21142_quirks,{ 0x00, 0x10, 0x57 } }, 256 { tlp_pci_phobos_21142_quirks, { 0x00, 0x60, 0xf5 } }, 257 { tlp_pci_znyx_21142_quirks, { 0x00, 0xc0, 0x95 } }, 258 { NULL, { 0, 0, 0 } } 259 }; 260 261 static int tlp_pci_shared_intr(void *); 262 263 static const struct tulip_pci_product * 264 tlp_pci_lookup(const struct pci_attach_args *pa) 265 { 266 const struct tulip_pci_product *tpp; 267 268 /* Don't match lmc cards */ 269 if (PCI_VENDOR(pci_conf_read(pa->pa_pc, pa->pa_tag, 270 PCI_SUBSYS_ID_REG)) == PCI_VENDOR_LMC) 271 return NULL; 272 273 for (tpp = tlp_pci_products; tpp->tpp_chip != TULIP_CHIP_INVALID; 274 tpp++) { 275 if (PCI_VENDOR(pa->pa_id) == tpp->tpp_vendor && 276 PCI_PRODUCT(pa->pa_id) == tpp->tpp_product) 277 return tpp; 278 } 279 return NULL; 280 } 281 282 static void 283 tlp_pci_get_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr, 284 const struct tlp_pci_quirks *tpq) 285 { 286 287 for (; tpq->tpq_func != NULL; tpq++) { 288 if (tpq->tpq_oui[0] == enaddr[0] && 289 tpq->tpq_oui[1] == enaddr[1] && 290 tpq->tpq_oui[2] == enaddr[2]) { 291 (*tpq->tpq_func)(psc, enaddr); 292 return; 293 } 294 } 295 } 296 297 static void 298 tlp_pci_check_slaved(struct tulip_pci_softc *psc, int shared, int slaved) 299 { 300 extern struct cfdriver tlp_cd; 301 struct tulip_pci_softc *cur, *best = NULL; 302 struct tulip_softc *sc = &psc->sc_tulip; 303 int i; 304 305 /* 306 * First of all, find the lowest pcidev numbered device on our 307 * bus marked as shared. That should be our master. 308 */ 309 for (i = 0; i < tlp_cd.cd_ndevs; i++) { 310 if ((cur = device_lookup_private(&tlp_cd, i)) == NULL) 311 continue; 312 if (device_parent(cur->sc_tulip.sc_dev) != 313 device_parent(sc->sc_dev)) 314 continue; 315 if ((cur->sc_flags & shared) == 0) 316 continue; 317 if (cur == psc) 318 continue; 319 if (best == NULL || 320 best->sc_tulip.sc_devno > cur->sc_tulip.sc_devno) 321 best = cur; 322 } 323 324 if (best != NULL) { 325 psc->sc_master = best; 326 psc->sc_flags |= (shared | slaved); 327 } 328 } 329 330 static int 331 tlp_pci_match(device_t parent, cfdata_t match, void *aux) 332 { 333 struct pci_attach_args *pa = aux; 334 335 if (tlp_pci_lookup(pa) != NULL) 336 return 10; /* beat if_de.c */ 337 338 return 0; 339 } 340 341 static void 342 tlp_pci_attach(device_t parent, device_t self, void *aux) 343 { 344 struct tulip_pci_softc *psc = device_private(self); 345 struct tulip_softc *sc = &psc->sc_tulip; 346 struct pci_attach_args *pa = aux; 347 pci_chipset_tag_t pc = pa->pa_pc; 348 pci_intr_handle_t ih; 349 const char *intrstr = NULL; 350 bus_space_tag_t iot, memt; 351 bus_space_handle_t ioh, memh; 352 int ioh_valid, memh_valid, i, j; 353 const struct tulip_pci_product *tpp; 354 prop_data_t ea; 355 uint8_t enaddr[ETHER_ADDR_LEN]; 356 uint32_t val = 0; 357 pcireg_t reg; 358 int error; 359 bus_size_t iosize = 0, memsize = 0; 360 char intrbuf[PCI_INTRSTR_LEN]; 361 362 sc->sc_dev = self; 363 sc->sc_devno = pa->pa_device; 364 psc->sc_pc = pa->pa_pc; 365 psc->sc_pcitag = pa->pa_tag; 366 367 LIST_INIT(&psc->sc_intrslaves); 368 369 tpp = tlp_pci_lookup(pa); 370 if (tpp == NULL) { 371 printf("\n"); 372 panic("tlp_pci_attach: impossible"); 373 } 374 sc->sc_chip = tpp->tpp_chip; 375 376 /* 377 * By default, Tulip registers are 8 bytes long (4 bytes 378 * followed by a 4 byte pad). 379 */ 380 sc->sc_regshift = 3; 381 382 /* 383 * No power management hooks. 384 * XXX Maybe we should add some! 385 */ 386 sc->sc_flags |= TULIPF_ENABLED; 387 388 /* 389 * Get revision info, and set some chip-specific variables. 390 */ 391 sc->sc_rev = PCI_REVISION(pa->pa_class); 392 switch (sc->sc_chip) { 393 case TULIP_CHIP_21140: 394 if (sc->sc_rev >= 0x20) 395 sc->sc_chip = TULIP_CHIP_21140A; 396 break; 397 398 case TULIP_CHIP_21142: 399 if (sc->sc_rev >= 0x20) 400 sc->sc_chip = TULIP_CHIP_21143; 401 break; 402 403 case TULIP_CHIP_82C168: 404 if (sc->sc_rev >= 0x20) 405 sc->sc_chip = TULIP_CHIP_82C169; 406 break; 407 408 case TULIP_CHIP_MX98713: 409 if (sc->sc_rev >= 0x10) 410 sc->sc_chip = TULIP_CHIP_MX98713A; 411 break; 412 413 case TULIP_CHIP_MX98715: 414 if (sc->sc_rev >= 0x20) 415 sc->sc_chip = TULIP_CHIP_MX98715A; 416 if (sc->sc_rev >= 0x25) 417 sc->sc_chip = TULIP_CHIP_MX98715AEC_X; 418 if (sc->sc_rev >= 0x30) 419 sc->sc_chip = TULIP_CHIP_MX98725; 420 break; 421 422 case TULIP_CHIP_WB89C840F: 423 sc->sc_regshift = 2; 424 break; 425 426 case TULIP_CHIP_AN985: 427 /* 428 * The AN983 and AN985 are very similar, and are 429 * differentiated by a "signature" register that 430 * is like, but not identical, to a PCI ID register. 431 */ 432 reg = pci_conf_read(pc, pa->pa_tag, 0x80); 433 switch (reg) { 434 case 0x09811317: 435 sc->sc_chip = TULIP_CHIP_AN985; 436 break; 437 438 case 0x09851317: 439 sc->sc_chip = TULIP_CHIP_AN983; 440 break; 441 442 default: 443 /* Unknown -- use default. */ 444 break; 445 } 446 break; 447 448 case TULIP_CHIP_AX88140: 449 if (sc->sc_rev >= 0x10) 450 sc->sc_chip = TULIP_CHIP_AX88141; 451 break; 452 453 case TULIP_CHIP_DM9102: 454 if (sc->sc_rev >= 0x30) 455 sc->sc_chip = TULIP_CHIP_DM9102A; 456 break; 457 458 default: 459 /* Nothing. */ 460 break; 461 } 462 463 aprint_normal(": %s Ethernet, pass %d.%d\n", 464 tlp_chip_name(sc->sc_chip), 465 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf); 466 467 switch (sc->sc_chip) { 468 case TULIP_CHIP_21040: 469 if (sc->sc_rev < 0x20) { 470 aprint_normal_dev(self, 471 "21040 must be at least pass 2.0\n"); 472 return; 473 } 474 break; 475 476 case TULIP_CHIP_21140: 477 if (sc->sc_rev < 0x11) { 478 aprint_normal_dev(self, 479 "21140 must be at least pass 1.1\n"); 480 return; 481 } 482 break; 483 484 default: 485 /* Nothing. */ 486 break; 487 } 488 489 /* 490 * Check to see if the device is in power-save mode, and 491 * being it out if necessary. 492 */ 493 switch (sc->sc_chip) { 494 case TULIP_CHIP_21140: 495 case TULIP_CHIP_21140A: 496 case TULIP_CHIP_21142: 497 case TULIP_CHIP_21143: 498 case TULIP_CHIP_MX98713A: 499 case TULIP_CHIP_MX98715: 500 case TULIP_CHIP_MX98715A: 501 case TULIP_CHIP_MX98715AEC_X: 502 case TULIP_CHIP_MX98725: 503 case TULIP_CHIP_DM9102: 504 case TULIP_CHIP_DM9102A: 505 case TULIP_CHIP_AX88140: 506 case TULIP_CHIP_AX88141: 507 case TULIP_CHIP_RS7112: 508 /* 509 * Clear the "sleep mode" bit in the CFDA register. 510 */ 511 reg = pci_conf_read(pc, pa->pa_tag, TULIP_PCI_CFDA); 512 if (reg & (CFDA_SLEEP | CFDA_SNOOZE)) 513 pci_conf_write(pc, pa->pa_tag, TULIP_PCI_CFDA, 514 reg & ~(CFDA_SLEEP | CFDA_SNOOZE)); 515 break; 516 517 default: 518 /* Nothing. */ 519 break; 520 } 521 522 /* power up chip */ 523 if ((error = pci_activate(pa->pa_pc, pa->pa_tag, self, 524 NULL)) && error != EOPNOTSUPP) { 525 aprint_error_dev(self, "cannot activate %d\n", error); 526 return; 527 } 528 529 /* 530 * Map the device. 531 */ 532 533 ioh_valid = (pci_mapreg_map(pa, TULIP_PCI_IOBA, 534 PCI_MAPREG_TYPE_IO, 0, 535 &iot, &ioh, NULL, &iosize) == 0); 536 memh_valid = (pci_mapreg_map(pa, TULIP_PCI_MMBA, 537 PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 0, 538 &memt, &memh, NULL, &memsize) == 0); 539 if (memh_valid) { 540 sc->sc_st = memt; 541 sc->sc_sh = memh; 542 psc->sc_mapsize = memsize; 543 if (ioh_valid) { 544 bus_space_unmap(iot, ioh, iosize); 545 ioh_valid = 0; 546 } 547 } else if (ioh_valid) { 548 sc->sc_st = iot; 549 sc->sc_sh = ioh; 550 psc->sc_mapsize = iosize; 551 if (memh_valid) { 552 bus_space_unmap(memt, memh, memsize); 553 memh_valid = 0; 554 } 555 } else { 556 aprint_error_dev(self, "unable to map device registers\n"); 557 goto fail; 558 } 559 560 sc->sc_dmat = pa->pa_dmat; 561 562 /* 563 * Make sure bus mastering is enabled. 564 */ 565 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 566 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 567 PCI_COMMAND_MASTER_ENABLE); 568 569 /* 570 * Get the cacheline size. 571 */ 572 sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag, 573 PCI_BHLC_REG)); 574 575 /* 576 * Get PCI data moving command info. 577 */ 578 if (pa->pa_flags & PCI_FLAGS_MRL_OKAY) 579 sc->sc_flags |= TULIPF_MRL; 580 if (pa->pa_flags & PCI_FLAGS_MRM_OKAY) 581 sc->sc_flags |= TULIPF_MRM; 582 if (pa->pa_flags & PCI_FLAGS_MWI_OKAY) 583 sc->sc_flags |= TULIPF_MWI; 584 585 /* 586 * Read the contents of the Ethernet Address ROM/SROM. 587 */ 588 switch (sc->sc_chip) { 589 case TULIP_CHIP_21040: 590 sc->sc_srom_addrbits = 6; 591 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, M_WAITOK); 592 TULIP_WRITE(sc, CSR_MIIROM, MIIROM_SROMCS); 593 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 594 for (j = 0; j < 10000; j++) { 595 val = TULIP_READ(sc, CSR_MIIROM); 596 if ((val & MIIROM_DN) == 0) 597 break; 598 } 599 sc->sc_srom[i] = val & MIIROM_DATA; 600 } 601 break; 602 603 case TULIP_CHIP_82C168: 604 case TULIP_CHIP_82C169: 605 { 606 sc->sc_srom_addrbits = 2; 607 sc->sc_srom = malloc(TULIP_ROM_SIZE(2), M_DEVBUF, M_WAITOK); 608 609 /* 610 * The Lite-On PNIC stores the Ethernet address in 611 * the first 3 words of the EEPROM. EEPROM access 612 * is not like the other Tulip chips. 613 */ 614 for (i = 0; i < 6; i += 2) { 615 TULIP_WRITE(sc, CSR_PNIC_SROMCTL, 616 PNIC_SROMCTL_READ | (i >> 1)); 617 for (j = 0; j < 500; j++) { 618 delay(2); 619 val = TULIP_READ(sc, CSR_MIIROM); 620 if ((val & PNIC_MIIROM_BUSY) == 0) 621 break; 622 } 623 if (val & PNIC_MIIROM_BUSY) { 624 aprint_error_dev(self, "EEPROM timed out\n"); 625 goto fail; 626 } 627 val &= PNIC_MIIROM_DATA; 628 sc->sc_srom[i] = val >> 8; 629 sc->sc_srom[i + 1] = val & 0xff; 630 } 631 break; 632 } 633 634 default: 635 /* 636 * XXX This isn't quite the right way to do this; we should 637 * XXX be attempting to fetch the mac-addr property in the 638 * XXX bus-agnostic part of the driver independently. But 639 * XXX that requires a larger change in the SROM handling 640 * XXX logic, and for now we can at least remove a machine- 641 * XXX dependent wart from the PCI front-end. 642 */ 643 ea = prop_dictionary_get(device_properties(self), 644 "mac-address"); 645 if (ea != NULL) { 646 extern int tlp_srom_debug; 647 KASSERT(prop_object_type(ea) == PROP_TYPE_DATA); 648 KASSERT(prop_data_size(ea) == ETHER_ADDR_LEN); 649 650 memcpy(enaddr, prop_data_value(ea), 651 ETHER_ADDR_LEN); 652 653 sc->sc_srom_addrbits = 6; 654 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, 655 M_WAITOK | M_ZERO); 656 memcpy(sc->sc_srom, enaddr, sizeof(enaddr)); 657 if (tlp_srom_debug) { 658 aprint_normal("SROM CONTENTS:"); 659 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 660 if ((i % 8) == 0) 661 aprint_normal("\n\t"); 662 aprint_normal("0x%02x ", sc->sc_srom[i]); 663 } 664 aprint_normal("\n"); 665 } 666 break; 667 } 668 669 /* Check for a slaved ROM on a multi-port board. */ 670 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDROM, 671 TULIP_PCI_SLAVEROM); 672 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 673 sc->sc_srom_addrbits = 674 psc->sc_master->sc_tulip.sc_srom_addrbits; 675 sc->sc_srom = psc->sc_master->sc_tulip.sc_srom; 676 enaddr[5] += 677 sc->sc_devno - psc->sc_master->sc_tulip.sc_devno; 678 } 679 else if (tlp_read_srom(sc) == 0) 680 goto cant_cope; 681 break; 682 } 683 684 /* 685 * Deal with chip/board quirks. This includes setting up 686 * the mediasw, and extracting the Ethernet address from 687 * the rombuf. 688 */ 689 switch (sc->sc_chip) { 690 case TULIP_CHIP_21040: 691 /* 692 * Parse the Ethernet Address ROM. 693 */ 694 if (tlp_parse_old_srom(sc, enaddr) == 0) 695 goto cant_cope; 696 697 698 /* 699 * All 21040 boards start out with the same 700 * media switch. 701 */ 702 sc->sc_mediasw = &tlp_21040_mediasw; 703 704 /* 705 * Deal with any quirks this board might have. 706 */ 707 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21040_quirks); 708 break; 709 710 case TULIP_CHIP_21041: 711 /* Check for new format SROM. */ 712 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 713 /* 714 * Not an ISV SROM; try the old DEC Ethernet Address 715 * ROM format. 716 */ 717 if (tlp_parse_old_srom(sc, enaddr) == 0) 718 goto cant_cope; 719 } 720 721 /* 722 * All 21041 boards use the same media switch; they all 723 * work basically the same! Yippee! 724 */ 725 sc->sc_mediasw = &tlp_21041_mediasw; 726 727 /* 728 * Deal with any quirks this board might have. 729 */ 730 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21041_quirks); 731 break; 732 733 case TULIP_CHIP_21140: 734 case TULIP_CHIP_21140A: 735 /* Check for new format SROM. */ 736 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 737 /* 738 * Not an ISV SROM; try the old DEC Ethernet Address 739 * ROM format. 740 */ 741 if (tlp_parse_old_srom(sc, enaddr) == 0) 742 goto cant_cope; 743 } else { 744 /* 745 * We start out with the 2114x ISV media switch. 746 * When we search for quirks, we may change to 747 * a different switch. 748 */ 749 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 750 } 751 752 /* 753 * Deal with any quirks this board might have. 754 */ 755 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21140_quirks); 756 757 /* 758 * Bail out now if we can't deal with this board. 759 */ 760 if (sc->sc_mediasw == NULL) 761 goto cant_cope; 762 break; 763 764 case TULIP_CHIP_21142: 765 case TULIP_CHIP_21143: 766 /* Check for new format SROM. */ 767 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 768 /* 769 * Not an ISV SROM; try the old DEC Ethernet Address 770 * ROM format. 771 */ 772 if (tlp_parse_old_srom(sc, enaddr) == 0) { 773 /* 774 * One last try: just copy the address 775 * from offset 20 and try to look 776 * up quirks. 777 */ 778 memcpy(enaddr, &sc->sc_srom[20], 779 ETHER_ADDR_LEN); 780 } 781 } else { 782 /* 783 * We start out with the 2114x ISV media switch. 784 * When we search for quirks, we may change to 785 * a different switch. 786 */ 787 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 788 } 789 790 /* 791 * Deal with any quirks this board might have. 792 */ 793 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21142_quirks); 794 795 /* 796 * Bail out now if we can't deal with this board. 797 */ 798 if (sc->sc_mediasw == NULL) 799 goto cant_cope; 800 break; 801 802 case TULIP_CHIP_82C168: 803 case TULIP_CHIP_82C169: 804 /* 805 * Lite-On PNIC's Ethernet address is the first 6 806 * bytes of its EEPROM. 807 */ 808 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 809 810 /* 811 * Lite-On PNICs always use the same mediasw; we 812 * select MII vs. internal NWAY automatically. 813 */ 814 sc->sc_mediasw = &tlp_pnic_mediasw; 815 break; 816 817 case TULIP_CHIP_MX98713: 818 /* 819 * The Macronix MX98713 has an MII and GPIO, but no 820 * internal Nway block. This chip is basically a 821 * perfect 21140A clone, with the exception of the 822 * a magic register frobbing in order to make the 823 * interface function. 824 */ 825 if (tlp_isv_srom_enaddr(sc, enaddr)) { 826 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 827 break; 828 } 829 /* FALLTHROUGH */ 830 831 case TULIP_CHIP_82C115: 832 /* 833 * Yippee! The Lite-On 82C115 is a clone of 834 * the MX98725 (the data sheet even says `MXIC' 835 * on it)! Imagine that, a clone of a clone. 836 * 837 * The differences are really minimal: 838 * 839 * - Wake-On-LAN support 840 * - 128-bit multicast hash table, rather than 841 * the standard 512-bit hash table 842 */ 843 /* FALLTHROUGH */ 844 845 case TULIP_CHIP_MX98713A: 846 case TULIP_CHIP_MX98715A: 847 case TULIP_CHIP_MX98715AEC_X: 848 case TULIP_CHIP_MX98725: 849 /* 850 * The MX98713A has an MII as well as an internal Nway block, 851 * but no GPIO. The MX98715 and MX98725 have an internal 852 * Nway block only. 853 * 854 * The internal Nway block, unlike the Lite-On PNIC's, does 855 * just that - performs Nway. Once autonegotiation completes, 856 * we must program the GPR media information into the chip. 857 * 858 * The byte offset of the Ethernet address is stored at 859 * offset 0x70. 860 */ 861 memcpy(enaddr, &sc->sc_srom[sc->sc_srom[0x70]], ETHER_ADDR_LEN); 862 sc->sc_mediasw = &tlp_pmac_mediasw; 863 break; 864 865 case TULIP_CHIP_WB89C840F: 866 /* 867 * Winbond 89C840F's Ethernet address is the first 868 * 6 bytes of its EEPROM. 869 */ 870 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 871 872 /* 873 * Winbond 89C840F has an MII attached to the SIO. 874 */ 875 sc->sc_mediasw = &tlp_sio_mii_mediasw; 876 break; 877 878 case TULIP_CHIP_AL981: 879 /* 880 * The ADMtek AL981's Ethernet address is located 881 * at offset 8 of its EEPROM. 882 */ 883 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 884 885 /* 886 * ADMtek AL981 has a built-in PHY accessed through 887 * special registers. 888 */ 889 sc->sc_mediasw = &tlp_al981_mediasw; 890 break; 891 892 case TULIP_CHIP_AN983: 893 case TULIP_CHIP_AN985: 894 /* 895 * The ADMtek AN985's Ethernet address is located 896 * at offset 8 of its EEPROM. 897 */ 898 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 899 900 /* 901 * The ADMtek AN985 can be configured in Single-Chip 902 * mode or MAC-only mode. Single-Chip uses the built-in 903 * PHY, MAC-only has an external PHY (usually HomePNA). 904 * The selection is based on an EEPROM setting, and both 905 * PHYs are accessed via MII attached to SIO. 906 * 907 * The AN985 "ghosts" the internal PHY onto all 908 * MII addresses, so we have to use a media init 909 * routine that limits the search. 910 * XXX How does this work with MAC-only mode? 911 */ 912 sc->sc_mediasw = &tlp_an985_mediasw; 913 break; 914 915 case TULIP_CHIP_DM9102: 916 case TULIP_CHIP_DM9102A: 917 /* 918 * Some boards with the Davicom chip have an ISV 919 * SROM (mostly DM9102A boards -- trying to describe 920 * the HomePNA PHY, probably) although the data in 921 * them is generally wrong. Check for ISV format 922 * and grab the Ethernet address that way, and if 923 * that fails, fall back on grabbing it from an 924 * observed offset of 20 (which is where it would 925 * be in an ISV SROM anyhow, tho ISV can cope with 926 * multi-port boards). 927 */ 928 if (!tlp_isv_srom_enaddr(sc, enaddr)) { 929 930 prop_data_t eaddrprop; 931 932 eaddrprop = prop_dictionary_get( 933 device_properties(self), "mac-address"); 934 935 if (eaddrprop != NULL 936 && prop_data_size(eaddrprop) == ETHER_ADDR_LEN) 937 memcpy(enaddr, 938 prop_data_value(eaddrprop), 939 ETHER_ADDR_LEN); 940 else 941 memcpy(enaddr, &sc->sc_srom[20], 942 ETHER_ADDR_LEN); 943 } 944 945 /* 946 * Davicom chips all have an internal MII interface 947 * and a built-in PHY. DM9102A also has a an external 948 * MII interface, usually with a HomePNA PHY attached 949 * to it. 950 */ 951 sc->sc_mediasw = &tlp_dm9102_mediasw; 952 break; 953 954 case TULIP_CHIP_AX88140: 955 case TULIP_CHIP_AX88141: 956 /* 957 * ASIX AX88140/AX88141 Ethernet Address is located at offset 958 * 20 of the SROM. 959 */ 960 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN); 961 962 /* 963 * ASIX AX88140A/AX88141 chip can have a built-in PHY or 964 * an external MII interface. 965 */ 966 sc->sc_mediasw = &tlp_asix_mediasw; 967 break; 968 969 case TULIP_CHIP_RS7112: 970 /* 971 * RS7112 Ethernet Address is located of offset 0x19a 972 * of the SROM 973 */ 974 memcpy(enaddr, &sc->sc_srom[0x19a], ETHER_ADDR_LEN); 975 976 /* RS7112 chip has a PHY at MII address 1 */ 977 sc->sc_mediasw = &tlp_rs7112_mediasw; 978 break; 979 980 default: 981 cant_cope: 982 aprint_error_dev(self, "sorry, unable to handle your board\n"); 983 goto fail; 984 } 985 986 /* 987 * Handle shared interrupts. 988 */ 989 if (psc->sc_flags & TULIP_PCI_SHAREDINTR) { 990 if (psc->sc_master) 991 psc->sc_flags |= TULIP_PCI_SLAVEINTR; 992 else { 993 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDINTR, 994 TULIP_PCI_SLAVEINTR); 995 if (psc->sc_master == NULL) 996 psc->sc_master = psc; 997 } 998 LIST_INSERT_HEAD(&psc->sc_master->sc_intrslaves, 999 psc, sc_intrq); 1000 } 1001 1002 if (psc->sc_flags & TULIP_PCI_SLAVEINTR) { 1003 aprint_normal_dev(self, "sharing interrupt with %s\n", 1004 device_xname(psc->sc_master->sc_tulip.sc_dev)); 1005 } else { 1006 /* 1007 * Map and establish our interrupt. 1008 */ 1009 if (pci_intr_map(pa, &ih)) { 1010 aprint_error_dev(self, "unable to map interrupt\n"); 1011 goto fail; 1012 } 1013 intrstr = pci_intr_string(pc, ih, intrbuf, sizeof(intrbuf)); 1014 psc->sc_ih = pci_intr_establish_xname(pc, ih, IPL_NET, 1015 (psc->sc_flags & TULIP_PCI_SHAREDINTR) ? 1016 tlp_pci_shared_intr : tlp_intr, sc, device_xname(self)); 1017 if (psc->sc_ih == NULL) { 1018 aprint_error_dev(self, "unable to establish interrupt"); 1019 if (intrstr != NULL) 1020 aprint_error(" at %s", intrstr); 1021 aprint_error("\n"); 1022 goto fail; 1023 } 1024 aprint_normal_dev(self, "interrupting at %s\n", 1025 intrstr); 1026 } 1027 1028 /* 1029 * Finish off the attach. 1030 */ 1031 error = tlp_attach(sc, enaddr); 1032 if (error) 1033 goto fail; 1034 return; 1035 1036 fail: 1037 if (psc->sc_ih != NULL) { 1038 pci_intr_disestablish(psc->sc_pc, psc->sc_ih); 1039 psc->sc_ih = NULL; 1040 } 1041 1042 if (ioh_valid) 1043 bus_space_unmap(iot, ioh, iosize); 1044 if (memh_valid) 1045 bus_space_unmap(memt, memh, memsize); 1046 psc->sc_mapsize = 0; 1047 return; 1048 } 1049 1050 static int 1051 tlp_pci_detach(device_t self, int flags) 1052 { 1053 struct tulip_pci_softc *psc = device_private(self); 1054 struct tulip_softc *sc = &psc->sc_tulip; 1055 int rv; 1056 1057 rv = tlp_detach(sc); 1058 if (rv) 1059 return rv; 1060 1061 if (psc->sc_ih != NULL) { 1062 pci_intr_disestablish(psc->sc_pc, psc->sc_ih); 1063 psc->sc_ih = NULL; 1064 } 1065 1066 if (psc->sc_mapsize) { 1067 bus_space_unmap(sc->sc_st, sc->sc_sh, psc->sc_mapsize); 1068 psc->sc_mapsize = 0; 1069 } 1070 1071 return 0; 1072 } 1073 1074 static int 1075 tlp_pci_shared_intr(void *arg) 1076 { 1077 struct tulip_pci_softc *master = arg, *slave; 1078 int rv = 0; 1079 1080 for (slave = LIST_FIRST(&master->sc_intrslaves); 1081 slave != NULL; 1082 slave = LIST_NEXT(slave, sc_intrq)) 1083 rv |= tlp_intr(&slave->sc_tulip); 1084 1085 return rv; 1086 } 1087 1088 static void 1089 tlp_pci_dec_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1090 { 1091 struct tulip_softc *sc = &psc->sc_tulip; 1092 1093 /* 1094 * This isn't really a quirk-gathering device, really. We 1095 * just want to get the spiffy DEC board name from the SROM. 1096 */ 1097 strcpy(sc->sc_name, "DEC "); 1098 1099 if (memcmp(&sc->sc_srom[29], "DE500", 5) == 0 || 1100 memcmp(&sc->sc_srom[29], "DE450", 5) == 0) 1101 memcpy(&sc->sc_name[4], &sc->sc_srom[29], 8); 1102 else 1103 sc->sc_name[3] = '\0'; 1104 } 1105 1106 static void 1107 tlp_pci_znyx_21040_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1108 { 1109 struct tulip_softc *sc = &psc->sc_tulip; 1110 uint16_t id = 0; 1111 1112 /* 1113 * If we have a slaved ROM, just copy the bits from the master. 1114 * This is in case we fail the ROM ID check (older boards) and 1115 * need to fall back on Ethernet address model checking; that 1116 * will fail for slave chips. 1117 */ 1118 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 1119 strcpy(sc->sc_name, psc->sc_master->sc_tulip.sc_name); 1120 sc->sc_mediasw = psc->sc_master->sc_tulip.sc_mediasw; 1121 psc->sc_flags |= 1122 psc->sc_master->sc_flags & TULIP_PCI_SHAREDINTR; 1123 return; 1124 } 1125 1126 if (sc->sc_srom[32] == 0x4a && sc->sc_srom[33] == 0x52) { 1127 id = sc->sc_srom[37] | (sc->sc_srom[36] << 8); 1128 switch (id) { 1129 zx312: 1130 case 0x0602: /* ZX312 */ 1131 strcpy(sc->sc_name, "ZNYX ZX312"); 1132 return; 1133 1134 case 0x0622: /* ZX312T */ 1135 strcpy(sc->sc_name, "ZNYX ZX312T"); 1136 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1137 return; 1138 1139 zx314_inta: 1140 case 0x0701: /* ZX314 INTA */ 1141 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1142 /* FALLTHROUGH */ 1143 case 0x0711: /* ZX314 */ 1144 strcpy(sc->sc_name, "ZNYX ZX314"); 1145 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1146 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1147 return; 1148 1149 zx315_inta: 1150 case 0x0801: /* ZX315 INTA */ 1151 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1152 /* FALLTHROUGH */ 1153 case 0x0811: /* ZX315 */ 1154 strcpy(sc->sc_name, "ZNYX ZX315"); 1155 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1156 return; 1157 1158 default: 1159 id = 0; 1160 break; 1161 } 1162 } 1163 1164 /* 1165 * Deal with boards that have broken ROMs. 1166 */ 1167 if (id == 0) { 1168 if ((enaddr[3] & ~3) == 0xf0 && (enaddr[5] & 3) == 0x00) 1169 goto zx314_inta; 1170 if ((enaddr[3] & ~3) == 0xf4 && (enaddr[5] & 1) == 0x00) 1171 goto zx315_inta; 1172 if ((enaddr[3] & ~3) == 0xec) 1173 goto zx312; 1174 } 1175 1176 strcpy(sc->sc_name, "ZNYX ZX31x"); 1177 } 1178 1179 static void tlp_pci_znyx_21142_qs6611_reset(struct tulip_softc *); 1180 1181 static void 1182 tlp_pci_znyx_21142_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1183 { 1184 struct tulip_softc *sc = &psc->sc_tulip; 1185 pcireg_t subid; 1186 1187 subid = pci_conf_read(psc->sc_pc, psc->sc_pcitag, PCI_SUBSYS_ID_REG); 1188 1189 if (PCI_VENDOR(subid) != PCI_VENDOR_ZNYX) 1190 return; /* ? */ 1191 1192 switch (PCI_PRODUCT(subid) & 0xff) { 1193 /* 1194 * ZNYX 21143 boards with QS6611 PHY 1195 */ 1196 case 0x12: /* ZX345Q */ 1197 case 0x13: /* ZX346Q */ 1198 case 0x14: /* ZX348Q */ 1199 case 0x18: /* ZX414 */ 1200 case 0x19: /* ZX412 */ 1201 case 0x1a: /* ZX444 */ 1202 case 0x1b: /* ZX442 */ 1203 case 0x23: /* ZX212 */ 1204 case 0x24: /* ZX214 */ 1205 case 0x29: /* ZX374 */ 1206 case 0x2d: /* ZX372 */ 1207 case 0x2b: /* ZX244 */ 1208 case 0x2c: /* ZX424 */ 1209 case 0x2e: /* ZX422 */ 1210 aprint_normal_dev(sc->sc_dev, "QS6611 PHY\n"); 1211 sc->sc_reset = tlp_pci_znyx_21142_qs6611_reset; 1212 break; 1213 } 1214 } 1215 1216 static void 1217 tlp_pci_znyx_21142_qs6611_reset(struct tulip_softc *sc) 1218 { 1219 1220 /* 1221 * Reset QS6611 PHY. 1222 */ 1223 TULIP_WRITE(sc, CSR_SIAGEN, 1224 SIAGEN_CWE | SIAGEN_LGS1 | SIAGEN_ABM | (0xf << 16)); 1225 delay(200); 1226 TULIP_WRITE(sc, CSR_SIAGEN, (0x4 << 16)); 1227 delay(10000); 1228 } 1229 1230 static void 1231 tlp_pci_smc_21040_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1232 { 1233 struct tulip_softc *sc = &psc->sc_tulip; 1234 uint16_t id1, id2, ei; 1235 int auibnc = 0, utp = 0; 1236 char *cp; 1237 1238 id1 = sc->sc_srom[0x60] | (sc->sc_srom[0x61] << 8); 1239 id2 = sc->sc_srom[0x62] | (sc->sc_srom[0x63] << 8); 1240 ei = sc->sc_srom[0x66] | (sc->sc_srom[0x67] << 8); 1241 1242 strcpy(sc->sc_name, "SMC 8432"); 1243 cp = &sc->sc_name[8]; 1244 1245 if ((id1 & 1) == 0) { 1246 *cp++ = 'B'; 1247 auibnc = 1; 1248 } 1249 if ((id1 & 0xff) > 0x32) { 1250 *cp++ = 'T'; 1251 utp = 1; 1252 } 1253 if ((id1 & 0x4000) == 0) { 1254 *cp++ = 'A'; 1255 auibnc = 1; 1256 } 1257 if (id2 == 0x15) { 1258 sc->sc_name[7] = '4'; 1259 *cp++ = '-'; 1260 *cp++ = 'C'; 1261 *cp++ = 'H'; 1262 *cp++ = ei ? '2' : '1'; 1263 } 1264 *cp = '\0'; 1265 1266 if (utp != 0 && auibnc == 0) 1267 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1268 else if (utp == 0 && auibnc != 0) 1269 sc->sc_mediasw = &tlp_21040_auibnc_mediasw; 1270 } 1271 1272 static void 1273 tlp_pci_cogent_21040_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1274 { 1275 1276 strcpy(psc->sc_tulip.sc_name, "Cogent multi-port"); 1277 psc->sc_flags |= TULIP_PCI_SHAREDINTR | TULIP_PCI_SHAREDROM; 1278 } 1279 1280 static void 1281 tlp_pci_accton_21040_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1282 { 1283 1284 strcpy(psc->sc_tulip.sc_name, "ACCTON EN1203"); 1285 } 1286 1287 static void tlp_pci_asante_21140_reset(struct tulip_softc *); 1288 1289 static void 1290 tlp_pci_asante_21140_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1291 { 1292 struct tulip_softc *sc = &psc->sc_tulip; 1293 1294 /* 1295 * Some Asante boards don't use the ISV SROM format. For 1296 * those that don't, we initialize the GPIO direction bits, 1297 * and provide our own reset hook, which resets the MII. 1298 * 1299 * All of these boards use SIO-attached-MII media. 1300 */ 1301 if (sc->sc_mediasw == &tlp_2114x_isv_mediasw) 1302 return; 1303 1304 strcpy(sc->sc_name, "Asante"); 1305 1306 sc->sc_gp_dir = 0xbf; 1307 sc->sc_reset = tlp_pci_asante_21140_reset; 1308 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1309 } 1310 1311 static void 1312 tlp_pci_e100_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1313 { 1314 struct tulip_softc *sc = &psc->sc_tulip; 1315 1316 if (sc->sc_mediasw == &tlp_2114x_isv_mediasw) 1317 return; 1318 1319 strcpy(sc->sc_name, "UMAX E100"); 1320 1321 sc->sc_gp_dir = 0xbf; 1322 sc->sc_reset = tlp_pci_asante_21140_reset; 1323 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1324 } 1325 1326 static void 1327 tlp_pci_asante_21140_reset(struct tulip_softc *sc) 1328 { 1329 1330 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1331 TULIP_WRITE(sc, CSR_GPP, 0x8); 1332 delay(100); 1333 TULIP_WRITE(sc, CSR_GPP, 0); 1334 } 1335 1336 static void tlp_pci_phobos_21140_reset(struct tulip_softc *); 1337 1338 static void 1339 tlp_pci_phobos_21140_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1340 { 1341 struct tulip_softc *sc = &psc->sc_tulip; 1342 1343 /* 1344 * Phobos boards just use MII-on-SIO. 1345 */ 1346 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1347 sc->sc_reset = tlp_pci_phobos_21140_reset; 1348 1349 /* 1350 * These boards appear solely on sgimips machines behind a special 1351 * GIO<->PCI ASIC and require the DBO and BLE bits to be set in CSR0. 1352 */ 1353 sc->sc_flags |= (TULIPF_BLE | TULIPF_DBO); 1354 } 1355 1356 static void 1357 tlp_pci_phobos_21140_reset(struct tulip_softc *sc) 1358 { 1359 1360 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | 0xfd); 1361 delay(10); 1362 TULIP_WRITE(sc, CSR_GPP, 0xfd); 1363 delay(10); 1364 TULIP_WRITE(sc, CSR_GPP, 0); 1365 } 1366 1367 /* 1368 * SMC 9332DST media switch. 1369 */ 1370 static void tlp_smc9332dst_tmsw_init(struct tulip_softc *); 1371 1372 static const struct tulip_mediasw tlp_smc9332dst_mediasw = { 1373 tlp_smc9332dst_tmsw_init, 1374 tlp_21140_gpio_get, 1375 tlp_21140_gpio_set 1376 }; 1377 1378 static void 1379 tlp_pci_smc_21140_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1380 { 1381 struct tulip_softc *sc = &psc->sc_tulip; 1382 1383 strcpy(psc->sc_tulip.sc_name, "SMC 9332DST"); 1384 sc->sc_mediasw = &tlp_smc9332dst_mediasw; 1385 } 1386 1387 static void 1388 tlp_smc9332dst_tmsw_init(struct tulip_softc *sc) 1389 { 1390 struct tulip_21x4x_media *tm; 1391 struct mii_data *mii = &sc->sc_mii; 1392 const char *sep = ""; 1393 uint32_t reg; 1394 int i, cnt; 1395 1396 sc->sc_gp_dir = GPP_SMC9332DST_PINS; 1397 sc->sc_opmode = OPMODE_MBO | OPMODE_PS; 1398 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 1399 1400 ifmedia_init(&mii->mii_media, 0, tlp_mediachange, tlp_mediastatus); 1401 aprint_normal_dev(sc->sc_dev, ""); 1402 1403 #define ADD(m, c) \ 1404 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK | M_ZERO); \ 1405 tm->tm_opmode = (c); \ 1406 tm->tm_gpdata = GPP_SMC9332DST_INIT; \ 1407 ifmedia_add(&mii->mii_media, (m), 0, tm) 1408 #define PRINT(str) aprint_normal("%s%s", sep, str); sep = ", " 1409 1410 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0), OPMODE_TTM); 1411 PRINT("10baseT"); 1412 1413 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, 0), 1414 OPMODE_TTM | OPMODE_FD); 1415 PRINT("10baseT-FDX"); 1416 1417 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 1418 OPMODE_PS | OPMODE_PCS | OPMODE_SCR); 1419 PRINT("100baseTX"); 1420 1421 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, 0), 1422 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD); 1423 PRINT("100baseTX-FDX"); 1424 1425 #undef ADD 1426 #undef PRINT 1427 1428 aprint_normal("\n"); 1429 1430 tlp_reset(sc); 1431 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode | OPMODE_PCS | OPMODE_SCR); 1432 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1433 delay(10); 1434 TULIP_WRITE(sc, CSR_GPP, GPP_SMC9332DST_INIT); 1435 delay(200000); 1436 cnt = 0; 1437 for (i = 1000; i > 0; i--) { 1438 reg = TULIP_READ(sc, CSR_GPP); 1439 if ((~reg & (GPP_SMC9332DST_OK10 | 1440 GPP_SMC9332DST_OK100)) == 0) { 1441 if (cnt++ > 100) { 1442 break; 1443 } 1444 } else if ((reg & GPP_SMC9332DST_OK10) == 0) { 1445 break; 1446 } else { 1447 cnt = 0; 1448 } 1449 delay(1000); 1450 } 1451 if (cnt > 100) 1452 ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_100_TX); 1453 else 1454 ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_10_T); 1455 } 1456 1457 static void 1458 tlp_pci_vpc_21140_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1459 { 1460 struct tulip_softc *sc = &psc->sc_tulip; 1461 char *p1 = (char *)&sc->sc_srom[32]; 1462 char *p2 = &sc->sc_name[0]; 1463 1464 do { 1465 if ((unsigned char) *p1 & 0x80) 1466 *p2++ = ' '; 1467 else 1468 *p2++ = *p1; 1469 } while (*p1++); 1470 } 1471 1472 static void tlp_pci_cobalt_21142_reset(struct tulip_softc *); 1473 1474 static void 1475 tlp_pci_cobalt_21142_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1476 { 1477 struct tulip_softc *sc = &psc->sc_tulip; 1478 1479 /* 1480 * Cobalt Networks interfaces are just MII-on-SIO. 1481 */ 1482 sc->sc_reset = tlp_pci_cobalt_21142_reset; 1483 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1484 1485 /* 1486 * The Cobalt systems tend to fall back to store-and-forward 1487 * pretty quickly, so we select that from the beginning to 1488 * avoid initial timeouts. 1489 */ 1490 sc->sc_txthresh = TXTH_SF; 1491 } 1492 1493 static void 1494 tlp_pci_cobalt_21142_reset(struct tulip_softc *sc) 1495 { 1496 1497 /* 1498 * Reset PHY. 1499 */ 1500 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE | (1 << 16)); 1501 delay(10); 1502 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE); 1503 delay(10); 1504 } 1505 1506 static void 1507 tlp_pci_algor_21142_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1508 { 1509 struct tulip_softc *sc = &psc->sc_tulip; 1510 1511 /* 1512 * Algorithmics boards just have MII-on-SIO. 1513 * 1514 * XXX They also have AUI on the serial interface. 1515 * XXX Deal with this. 1516 */ 1517 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1518 } 1519 1520 /* 1521 * Cogent EM1x0 (aka. Adaptec ANA-6910) media switch. 1522 */ 1523 static void tlp_cogent_em1x0_tmsw_init(struct tulip_softc *); 1524 1525 static const struct tulip_mediasw tlp_cogent_em1x0_mediasw = { 1526 tlp_cogent_em1x0_tmsw_init, 1527 tlp_21140_gpio_get, 1528 tlp_21140_gpio_set 1529 }; 1530 1531 static void 1532 tlp_pci_adaptec_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1533 { 1534 struct tulip_softc *sc = &psc->sc_tulip; 1535 uint8_t *srom = sc->sc_srom, id0; 1536 uint16_t id1, id2; 1537 1538 if (sc->sc_mediasw == NULL) { 1539 id0 = srom[32]; 1540 switch (id0) { 1541 case 0x12: 1542 strcpy(psc->sc_tulip.sc_name, "Cogent EM100TX"); 1543 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1544 break; 1545 1546 case 0x13: 1547 strcpy(psc->sc_tulip.sc_name, "Cogent ???"); 1548 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1549 psc->sc_flags |= TULIP_PCI_SHAREDINTR | 1550 TULIP_PCI_SHAREDROM; 1551 break; 1552 1553 case 0x15: 1554 strcpy(psc->sc_tulip.sc_name, "Cogent EM100FX"); 1555 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1556 break; 1557 1558 #if 0 1559 case XXX: 1560 strcpy(psc->sc_tulip.sc_name, "Cogent EM110TX"); 1561 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1562 break; 1563 #endif 1564 1565 default: 1566 printf("%s: unknown Cogent board ID 0x%02x\n", 1567 device_xname(sc->sc_dev), id0); 1568 } 1569 return; 1570 } 1571 1572 id1 = TULIP_ROM_GETW(srom, 0); 1573 id2 = TULIP_ROM_GETW(srom, 2); 1574 if (id1 != 0x1109) { 1575 goto unknown; 1576 } 1577 1578 switch (id2) { 1579 case 0x1900: 1580 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911"); 1581 break; 1582 1583 case 0x2400: 1584 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6944A"); 1585 psc->sc_flags |= TULIP_PCI_SHAREDINTR | TULIP_PCI_SHAREDROM; 1586 break; 1587 1588 case 0x2b00: 1589 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911A"); 1590 break; 1591 1592 case 0x3000: 1593 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6922"); 1594 psc->sc_flags |= TULIP_PCI_SHAREDINTR | TULIP_PCI_SHAREDROM; 1595 break; 1596 1597 default: 1598 unknown: 1599 printf("%s: unknown Adaptec/Cogent board ID 0x%04x/0x%04x\n", 1600 device_xname(sc->sc_dev), id1, id2); 1601 } 1602 } 1603 1604 static void 1605 tlp_cogent_em1x0_tmsw_init(struct tulip_softc *sc) 1606 { 1607 struct tulip_21x4x_media *tm; 1608 struct mii_data *mii = &sc->sc_mii; 1609 const char *sep = ""; 1610 1611 sc->sc_gp_dir = GPP_COGENT_EM1x0_PINS; 1612 sc->sc_opmode = OPMODE_MBO | OPMODE_PS; 1613 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 1614 1615 ifmedia_init(&mii->mii_media, 0, tlp_mediachange, tlp_mediastatus); 1616 aprint_normal_dev(sc->sc_dev, ""); 1617 1618 #define ADD(m, c) \ 1619 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK | M_ZERO); \ 1620 tm->tm_opmode = (c); \ 1621 tm->tm_gpdata = GPP_COGENT_EM1x0_INIT; \ 1622 ifmedia_add(&mii->mii_media, (m), 0, tm) 1623 #define PRINT(str) aprint_normal("%s%s", sep, str); sep = ", " 1624 1625 if (sc->sc_srom[32] == 0x15) { 1626 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, 0, 0), 1627 OPMODE_PS | OPMODE_PCS); 1628 PRINT("100baseFX"); 1629 1630 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0), 1631 OPMODE_PS | OPMODE_PCS | OPMODE_FD); 1632 PRINT("100baseFX-FDX"); 1633 aprint_normal("\n"); 1634 1635 ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_100_FX); 1636 } else { 1637 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 1638 OPMODE_PS | OPMODE_PCS | OPMODE_SCR); 1639 PRINT("100baseTX"); 1640 1641 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0), 1642 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD); 1643 PRINT("100baseTX-FDX"); 1644 aprint_normal("\n"); 1645 1646 ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_100_TX); 1647 } 1648 1649 #undef ADD 1650 #undef PRINT 1651 } 1652 1653 static void tlp_pci_netwinder_21142_reset(struct tulip_softc *); 1654 1655 static void 1656 tlp_pci_netwinder_21142_quirks(struct tulip_pci_softc *psc, 1657 const uint8_t *enaddr) 1658 { 1659 struct tulip_softc *sc = &psc->sc_tulip; 1660 1661 /* 1662 * Netwinders just use MII-on-SIO. 1663 */ 1664 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1665 sc->sc_reset = tlp_pci_netwinder_21142_reset; 1666 } 1667 1668 void 1669 tlp_pci_netwinder_21142_reset(struct tulip_softc *sc) 1670 { 1671 1672 /* 1673 * Reset the PHY. 1674 */ 1675 TULIP_WRITE(sc, CSR_SIAGEN, 0x0821 << 16); 1676 delay(10); 1677 TULIP_WRITE(sc, CSR_SIAGEN, 0x0000 << 16); 1678 delay(10); 1679 TULIP_WRITE(sc, CSR_SIAGEN, 0x0001 << 16); 1680 delay(10); 1681 } 1682 1683 static void tlp_pci_phobos_21142_reset(struct tulip_softc *); 1684 1685 static void 1686 tlp_pci_phobos_21142_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1687 { 1688 struct tulip_softc *sc = &psc->sc_tulip; 1689 1690 /* 1691 * Phobos boards just use MII-on-SIO. 1692 */ 1693 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1694 sc->sc_reset = tlp_pci_phobos_21142_reset; 1695 1696 /* 1697 * These boards appear solely on sgimips machines behind a special 1698 * GIO<->PCI ASIC and require the DBO and BLE bits to be set in CSR0. 1699 */ 1700 sc->sc_flags |= (TULIPF_BLE | TULIPF_DBO); 1701 } 1702 1703 static void 1704 tlp_pci_phobos_21142_reset(struct tulip_softc *sc) 1705 { 1706 /* 1707 * Reset PHY. 1708 */ 1709 TULIP_WRITE(sc, CSR_SIAGEN, (0x880f << 16)); 1710 delay(10); 1711 TULIP_WRITE(sc, CSR_SIAGEN, (0x800f << 16)); 1712 delay(10); 1713 } 1714
Indexes created Sun Sep 21 20:09:37 GMT 2025