if_tlp_pci.c revision 1.20.2.1
1 /* $NetBSD: if_tlp_pci.c,v 1.20.2.1 2000/11/20 11:42:24 bouyer Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * PCI bus front-end for the Digital Semiconductor ``Tulip'' (21x4x) 42 * Ethernet controller family driver. 43 */ 44 45 #include "opt_inet.h" 46 #include "opt_ns.h" 47 #include "bpfilter.h" 48 #include "opt_tlp.h" 49 50 #include <sys/param.h> 51 #include <sys/systm.h> 52 #include <sys/mbuf.h> 53 #include <sys/malloc.h> 54 #include <sys/kernel.h> 55 #include <sys/socket.h> 56 #include <sys/ioctl.h> 57 #include <sys/errno.h> 58 #include <sys/device.h> 59 60 #include <machine/endian.h> 61 62 #include <net/if.h> 63 #include <net/if_dl.h> 64 #include <net/if_media.h> 65 #include <net/if_ether.h> 66 67 #if NBPFILTER > 0 68 #include <net/bpf.h> 69 #endif 70 71 #ifdef INET 72 #include <netinet/in.h> 73 #include <netinet/if_inarp.h> 74 #endif 75 76 #ifdef NS 77 #include <netns/ns.h> 78 #include <netns/ns_if.h> 79 #endif 80 81 #include <machine/bus.h> 82 #include <machine/intr.h> 83 84 #include <dev/mii/miivar.h> 85 #include <dev/mii/mii_bitbang.h> 86 87 #include <dev/ic/tulipreg.h> 88 #include <dev/ic/tulipvar.h> 89 90 #include <dev/pci/pcivar.h> 91 #include <dev/pci/pcireg.h> 92 #include <dev/pci/pcidevs.h> 93 94 /* 95 * PCI configuration space registers used by the Tulip. 96 */ 97 #define TULIP_PCI_IOBA 0x10 /* i/o mapped base */ 98 #define TULIP_PCI_MMBA 0x14 /* memory mapped base */ 99 #define TULIP_PCI_CFDA 0x40 /* configuration driver area */ 100 101 #define CFDA_SLEEP 0x80000000 /* sleep mode */ 102 #define CFDA_SNOOZE 0x40000000 /* snooze mode */ 103 104 struct tulip_pci_softc { 105 struct tulip_softc sc_tulip; /* real Tulip softc */ 106 107 /* PCI-specific goo. */ 108 void *sc_ih; /* interrupt handle */ 109 110 pci_chipset_tag_t sc_pc; /* our PCI chipset */ 111 pcitag_t sc_pcitag; /* our PCI tag */ 112 113 int sc_flags; /* flags; see below */ 114 115 LIST_HEAD(, tulip_pci_softc) sc_intrslaves; 116 LIST_ENTRY(tulip_pci_softc) sc_intrq; 117 118 /* Our {ROM,interrupt} master. */ 119 struct tulip_pci_softc *sc_master; 120 }; 121 122 /* sc_flags */ 123 #define TULIP_PCI_SHAREDINTR 0x01 /* interrupt is shared */ 124 #define TULIP_PCI_SLAVEINTR 0x02 /* interrupt is slave */ 125 #define TULIP_PCI_SHAREDROM 0x04 /* ROM is shared */ 126 #define TULIP_PCI_SLAVEROM 0x08 /* slave of shared ROM */ 127 128 int tlp_pci_match __P((struct device *, struct cfdata *, void *)); 129 void tlp_pci_attach __P((struct device *, struct device *, void *)); 130 131 struct cfattach tlp_pci_ca = { 132 sizeof(struct tulip_pci_softc), tlp_pci_match, tlp_pci_attach, 133 }; 134 135 const struct tulip_pci_product { 136 u_int32_t tpp_vendor; /* PCI vendor ID */ 137 u_int32_t tpp_product; /* PCI product ID */ 138 tulip_chip_t tpp_chip; /* base Tulip chip type */ 139 } tlp_pci_products[] = { 140 #ifdef TLP_MATCH_21040 141 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21040, 142 TULIP_CHIP_21040 }, 143 #endif 144 #ifdef TLP_MATCH_21041 145 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21041, 146 TULIP_CHIP_21041 }, 147 #endif 148 #ifdef TLP_MATCH_21140 149 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21140, 150 TULIP_CHIP_21140 }, 151 #endif 152 #ifdef TLP_MATCH_21142 153 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142, 154 TULIP_CHIP_21142 }, 155 #endif 156 157 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C168, 158 TULIP_CHIP_82C168 }, 159 160 /* 161 * Note: This is like a MX98725 with Wake-On-LAN and a 162 * 128-bit multicast hash table. 163 */ 164 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C115, 165 TULIP_CHIP_82C115 }, 166 167 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98713, 168 TULIP_CHIP_MX98713 }, 169 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX987x5, 170 TULIP_CHIP_MX98715 }, 171 172 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100TX, 173 TULIP_CHIP_MX98713 }, 174 175 { PCI_VENDOR_WINBOND, PCI_PRODUCT_WINBOND_W89C840F, 176 TULIP_CHIP_WB89C840F }, 177 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100ATX, 178 TULIP_CHIP_WB89C840F }, 179 180 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9102, 181 TULIP_CHIP_DM9102 }, 182 183 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AL981, 184 TULIP_CHIP_AL981 }, 185 186 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN985, 187 TULIP_CHIP_AN985 }, 188 189 #if 0 190 { PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX88140A, 191 TULIP_CHIP_AX88140 }, 192 #endif 193 194 { 0, 0, 195 TULIP_CHIP_INVALID }, 196 }; 197 198 struct tlp_pci_quirks { 199 void (*tpq_func) __P((struct tulip_pci_softc *, 200 const u_int8_t *)); 201 u_int8_t tpq_oui[3]; 202 }; 203 204 void tlp_pci_dec_quirks __P((struct tulip_pci_softc *, 205 const u_int8_t *)); 206 207 void tlp_pci_znyx_21040_quirks __P((struct tulip_pci_softc *, 208 const u_int8_t *)); 209 void tlp_pci_smc_21040_quirks __P((struct tulip_pci_softc *, 210 const u_int8_t *)); 211 void tlp_pci_cogent_21040_quirks __P((struct tulip_pci_softc *, 212 const u_int8_t *)); 213 void tlp_pci_accton_21040_quirks __P((struct tulip_pci_softc *, 214 const u_int8_t *)); 215 216 void tlp_pci_cobalt_21142_quirks __P((struct tulip_pci_softc *, 217 const u_int8_t *)); 218 219 const struct tlp_pci_quirks tlp_pci_21040_quirks[] = { 220 { tlp_pci_znyx_21040_quirks, { 0x00, 0xc0, 0x95 } }, 221 { tlp_pci_smc_21040_quirks, { 0x00, 0x00, 0xc0 } }, 222 { tlp_pci_cogent_21040_quirks, { 0x00, 0x00, 0x92 } }, 223 { tlp_pci_accton_21040_quirks, { 0x00, 0x00, 0xe8 } }, 224 { NULL, { 0, 0, 0 } } 225 }; 226 227 const struct tlp_pci_quirks tlp_pci_21041_quirks[] = { 228 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 229 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 230 { NULL, { 0, 0, 0 } } 231 }; 232 233 void tlp_pci_asante_21140_quirks __P((struct tulip_pci_softc *, 234 const u_int8_t *)); 235 236 const struct tlp_pci_quirks tlp_pci_21140_quirks[] = { 237 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 238 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 239 { tlp_pci_asante_21140_quirks, { 0x00, 0x00, 0x94 } }, 240 { NULL, { 0, 0, 0 } } 241 }; 242 243 const struct tlp_pci_quirks tlp_pci_21142_quirks[] = { 244 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 245 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 246 { tlp_pci_cobalt_21142_quirks, { 0x00, 0x10, 0xe0 } }, 247 { NULL, { 0, 0, 0 } } 248 }; 249 250 int tlp_pci_shared_intr __P((void *)); 251 252 const struct tulip_pci_product *tlp_pci_lookup 253 __P((const struct pci_attach_args *)); 254 void tlp_pci_get_quirks __P((struct tulip_pci_softc *, const u_int8_t *, 255 const struct tlp_pci_quirks *)); 256 void tlp_pci_check_slaved __P((struct tulip_pci_softc *, int, int)); 257 258 const struct tulip_pci_product * 259 tlp_pci_lookup(pa) 260 const struct pci_attach_args *pa; 261 { 262 const struct tulip_pci_product *tpp; 263 264 for (tpp = tlp_pci_products; 265 tlp_chip_names[tpp->tpp_chip] != NULL; 266 tpp++) { 267 if (PCI_VENDOR(pa->pa_id) == tpp->tpp_vendor && 268 PCI_PRODUCT(pa->pa_id) == tpp->tpp_product) 269 return (tpp); 270 } 271 return (NULL); 272 } 273 274 void 275 tlp_pci_get_quirks(psc, enaddr, tpq) 276 struct tulip_pci_softc *psc; 277 const u_int8_t *enaddr; 278 const struct tlp_pci_quirks *tpq; 279 { 280 281 for (; tpq->tpq_func != NULL; tpq++) { 282 if (tpq->tpq_oui[0] == enaddr[0] && 283 tpq->tpq_oui[1] == enaddr[1] && 284 tpq->tpq_oui[2] == enaddr[2]) { 285 (*tpq->tpq_func)(psc, enaddr); 286 return; 287 } 288 } 289 } 290 291 void 292 tlp_pci_check_slaved(psc, shared, slaved) 293 struct tulip_pci_softc *psc; 294 int shared, slaved; 295 { 296 extern struct cfdriver tlp_cd; 297 struct tulip_pci_softc *cur, *best = NULL; 298 struct tulip_softc *sc = &psc->sc_tulip; 299 int i; 300 301 /* 302 * First of all, find the lowest pcidev numbered device on our 303 * bus marked as shared. That should be our master. 304 */ 305 for (i = 0; i < tlp_cd.cd_ndevs; i++) { 306 if ((cur = tlp_cd.cd_devs[i]) == NULL) 307 continue; 308 if (cur->sc_tulip.sc_dev.dv_parent != sc->sc_dev.dv_parent) 309 continue; 310 if ((cur->sc_flags & shared) == 0) 311 continue; 312 if (cur == psc) 313 continue; 314 if (best == NULL || 315 best->sc_tulip.sc_devno > cur->sc_tulip.sc_devno) 316 best = cur; 317 } 318 319 if (best != NULL) { 320 psc->sc_master = best; 321 psc->sc_flags |= (shared | slaved); 322 } 323 } 324 325 int 326 tlp_pci_match(parent, match, aux) 327 struct device *parent; 328 struct cfdata *match; 329 void *aux; 330 { 331 struct pci_attach_args *pa = aux; 332 333 if (tlp_pci_lookup(pa) != NULL) 334 return (10); /* beat if_de.c */ 335 336 return (0); 337 } 338 339 void 340 tlp_pci_attach(parent, self, aux) 341 struct device *parent, *self; 342 void *aux; 343 { 344 struct tulip_pci_softc *psc = (void *) self; 345 struct tulip_softc *sc = &psc->sc_tulip; 346 struct pci_attach_args *pa = aux; 347 pci_chipset_tag_t pc = pa->pa_pc; 348 pci_intr_handle_t ih; 349 const char *intrstr = NULL; 350 bus_space_tag_t iot, memt; 351 bus_space_handle_t ioh, memh; 352 int ioh_valid, memh_valid, i, j; 353 const struct tulip_pci_product *tpp; 354 u_int8_t enaddr[ETHER_ADDR_LEN]; 355 u_int32_t val; 356 pcireg_t reg; 357 int pmreg; 358 359 sc->sc_devno = pa->pa_device; 360 psc->sc_pc = pa->pa_pc; 361 psc->sc_pcitag = pa->pa_tag; 362 363 LIST_INIT(&psc->sc_intrslaves); 364 365 tpp = tlp_pci_lookup(pa); 366 if (tpp == NULL) { 367 printf("\n"); 368 panic("tlp_pci_attach: impossible"); 369 } 370 sc->sc_chip = tpp->tpp_chip; 371 372 /* 373 * By default, Tulip registers are 8 bytes long (4 bytes 374 * followed by a 4 byte pad). 375 */ 376 sc->sc_regshift = 3; 377 378 /* 379 * No power management hooks. 380 * XXX Maybe we should add some! 381 */ 382 sc->sc_flags |= TULIPF_ENABLED; 383 384 /* 385 * Get revision info, and set some chip-specific variables. 386 */ 387 sc->sc_rev = PCI_REVISION(pa->pa_class); 388 switch (sc->sc_chip) { 389 case TULIP_CHIP_21140: 390 if (sc->sc_rev >= 0x20) 391 sc->sc_chip = TULIP_CHIP_21140A; 392 break; 393 394 case TULIP_CHIP_21142: 395 if (sc->sc_rev >= 0x20) 396 sc->sc_chip = TULIP_CHIP_21143; 397 break; 398 399 case TULIP_CHIP_82C168: 400 if (sc->sc_rev >= 0x20) 401 sc->sc_chip = TULIP_CHIP_82C169; 402 break; 403 404 case TULIP_CHIP_MX98713: 405 if (sc->sc_rev >= 0x10) 406 sc->sc_chip = TULIP_CHIP_MX98713A; 407 break; 408 409 case TULIP_CHIP_MX98715: 410 if (sc->sc_rev >= 0x20) 411 sc->sc_chip = TULIP_CHIP_MX98715A; 412 if (sc->sc_rev >= 0x25) 413 sc->sc_chip = TULIP_CHIP_MX98715AEC_X; 414 if (sc->sc_rev >= 0x30) 415 sc->sc_chip = TULIP_CHIP_MX98725; 416 break; 417 418 case TULIP_CHIP_WB89C840F: 419 sc->sc_regshift = 2; 420 break; 421 422 case TULIP_CHIP_AN985: 423 /* 424 * The AN983 and AN985 are very similar, and are 425 * differentiated by a "signature" register that 426 * is like, but not identical, to a PCI ID register. 427 */ 428 reg = pci_conf_read(pc, pa->pa_tag, 0x80); 429 switch (reg) { 430 case 0x09811317: 431 sc->sc_chip = TULIP_CHIP_AN985; 432 break; 433 434 case 0x09851317: 435 sc->sc_chip = TULIP_CHIP_AN983; 436 break; 437 438 default: 439 /* Unknown -- use default. */ 440 } 441 break; 442 443 case TULIP_CHIP_AX88140: 444 if (sc->sc_rev >= 0x10) 445 sc->sc_chip = TULIP_CHIP_AX88141; 446 break; 447 448 case TULIP_CHIP_DM9102: 449 if (sc->sc_rev >= 0x30) 450 sc->sc_chip = TULIP_CHIP_DM9102A; 451 break; 452 453 default: 454 /* Nothing. */ 455 } 456 457 printf(": %s Ethernet, pass %d.%d\n", 458 tlp_chip_names[sc->sc_chip], 459 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf); 460 461 switch (sc->sc_chip) { 462 case TULIP_CHIP_21040: 463 if (sc->sc_rev < 0x20) { 464 printf("%s: 21040 must be at least pass 2.0\n", 465 sc->sc_dev.dv_xname); 466 return; 467 } 468 break; 469 470 case TULIP_CHIP_21140: 471 if (sc->sc_rev < 0x11) { 472 printf("%s: 21140 must be at least pass 1.1\n", 473 sc->sc_dev.dv_xname); 474 return; 475 } 476 break; 477 478 default: 479 /* Nothing. */ 480 } 481 482 /* 483 * Check to see if the device is in power-save mode, and 484 * being it out if necessary. 485 */ 486 switch (sc->sc_chip) { 487 case TULIP_CHIP_21140: 488 case TULIP_CHIP_21140A: 489 case TULIP_CHIP_21142: 490 case TULIP_CHIP_21143: 491 case TULIP_CHIP_MX98713A: 492 case TULIP_CHIP_MX98715: 493 case TULIP_CHIP_MX98715A: 494 case TULIP_CHIP_MX98715AEC_X: 495 case TULIP_CHIP_MX98725: 496 case TULIP_CHIP_DM9102: 497 case TULIP_CHIP_DM9102A: 498 /* 499 * Clear the "sleep mode" bit in the CFDA register. 500 */ 501 reg = pci_conf_read(pc, pa->pa_tag, TULIP_PCI_CFDA); 502 if (reg & (CFDA_SLEEP|CFDA_SNOOZE)) 503 pci_conf_write(pc, pa->pa_tag, TULIP_PCI_CFDA, 504 reg & ~(CFDA_SLEEP|CFDA_SNOOZE)); 505 break; 506 507 default: 508 /* Nothing. */ 509 } 510 511 if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PWRMGMT, &pmreg, 0)) { 512 reg = pci_conf_read(pc, pa->pa_tag, pmreg + 4); 513 switch (reg & PCI_PMCSR_STATE_MASK) { 514 case PCI_PMCSR_STATE_D1: 515 case PCI_PMCSR_STATE_D2: 516 printf(": waking up from power state D%d\n%s", 517 reg & PCI_PMCSR_STATE_MASK, sc->sc_dev.dv_xname); 518 pci_conf_write(pc, pa->pa_tag, pmreg + 4, 519 (reg & ~PCI_PMCSR_STATE_MASK) | 520 PCI_PMCSR_STATE_D0); 521 break; 522 case PCI_PMCSR_STATE_D3: 523 /* 524 * The card has lost all configuration data in 525 * this state, so punt. 526 */ 527 printf(": unable to wake up from power state D3, " 528 "reboot required.\n"); 529 pci_conf_write(pc, pa->pa_tag, pmreg + 4, 530 (reg & ~PCI_PMCSR_STATE_MASK) | 531 PCI_PMCSR_STATE_D0); 532 return; 533 } 534 } 535 536 /* 537 * Map the device. 538 */ 539 ioh_valid = (pci_mapreg_map(pa, TULIP_PCI_IOBA, 540 PCI_MAPREG_TYPE_IO, 0, 541 &iot, &ioh, NULL, NULL) == 0); 542 memh_valid = (pci_mapreg_map(pa, TULIP_PCI_MMBA, 543 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 544 &memt, &memh, NULL, NULL) == 0); 545 546 if (memh_valid) { 547 sc->sc_st = memt; 548 sc->sc_sh = memh; 549 } else if (ioh_valid) { 550 sc->sc_st = iot; 551 sc->sc_sh = ioh; 552 } else { 553 printf(": unable to map device registers\n"); 554 return; 555 } 556 557 sc->sc_dmat = pa->pa_dmat; 558 559 /* 560 * Make sure bus mastering is enabled. 561 */ 562 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 563 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 564 PCI_COMMAND_MASTER_ENABLE); 565 566 /* 567 * Get the cacheline size. 568 */ 569 sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag, 570 PCI_BHLC_REG)); 571 572 /* 573 * Get PCI data moving command info. 574 */ 575 if (pa->pa_flags & PCI_FLAGS_MRL_OKAY) 576 sc->sc_flags |= TULIPF_MRL; 577 if (pa->pa_flags & PCI_FLAGS_MRM_OKAY) 578 sc->sc_flags |= TULIPF_MRM; 579 if (pa->pa_flags & PCI_FLAGS_MWI_OKAY) 580 sc->sc_flags |= TULIPF_MWI; 581 582 /* 583 * Read the contents of the Ethernet Address ROM/SROM. 584 */ 585 switch (sc->sc_chip) { 586 case TULIP_CHIP_21040: 587 sc->sc_srom_addrbits = 6; 588 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, M_NOWAIT); 589 TULIP_WRITE(sc, CSR_MIIROM, MIIROM_SROMCS); 590 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 591 for (j = 0; j < 10000; j++) { 592 val = TULIP_READ(sc, CSR_MIIROM); 593 if ((val & MIIROM_DN) == 0) 594 break; 595 } 596 sc->sc_srom[i] = val & MIIROM_DATA; 597 } 598 break; 599 600 case TULIP_CHIP_82C168: 601 case TULIP_CHIP_82C169: 602 { 603 sc->sc_srom_addrbits = 2; 604 sc->sc_srom = malloc(TULIP_ROM_SIZE(2), M_DEVBUF, M_NOWAIT); 605 606 /* 607 * The Lite-On PNIC stores the Ethernet address in 608 * the first 3 words of the EEPROM. EEPROM access 609 * is not like the other Tulip chips. 610 */ 611 for (i = 0; i < 6; i += 2) { 612 TULIP_WRITE(sc, CSR_PNIC_SROMCTL, 613 PNIC_SROMCTL_READ | (i >> 1)); 614 for (j = 0; j < 500; j++) { 615 delay(2); 616 val = TULIP_READ(sc, CSR_MIIROM); 617 if ((val & PNIC_MIIROM_BUSY) == 0) 618 break; 619 } 620 if (val & PNIC_MIIROM_BUSY) { 621 printf("%s: EEPROM timed out\n", 622 sc->sc_dev.dv_xname); 623 return; 624 } 625 val &= PNIC_MIIROM_DATA; 626 sc->sc_srom[i] = val >> 8; 627 sc->sc_srom[i + 1] = val & 0xff; 628 } 629 break; 630 } 631 632 default: 633 if (tlp_read_srom(sc) == 0) 634 goto cant_cope; 635 break; 636 } 637 638 /* 639 * Deal with chip/board quirks. This includes setting up 640 * the mediasw, and extracting the Ethernet address from 641 * the rombuf. 642 */ 643 switch (sc->sc_chip) { 644 case TULIP_CHIP_21040: 645 /* Check for a slaved ROM on a multi-port board. */ 646 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDROM, 647 TULIP_PCI_SLAVEROM); 648 if (psc->sc_flags & TULIP_PCI_SLAVEROM) 649 memcpy(sc->sc_srom, psc->sc_master->sc_tulip.sc_srom, 650 sizeof(sc->sc_srom)); 651 652 /* 653 * Parse the Ethernet Address ROM. 654 */ 655 if (tlp_parse_old_srom(sc, enaddr) == 0) 656 goto cant_cope; 657 658 /* 659 * If we have a slaved ROM, adjust the Ethernet address. 660 */ 661 if (psc->sc_flags & TULIP_PCI_SLAVEROM) 662 enaddr[5] += 663 sc->sc_devno - psc->sc_master->sc_tulip.sc_devno; 664 665 /* 666 * All 21040 boards start out with the same 667 * media switch. 668 */ 669 sc->sc_mediasw = &tlp_21040_mediasw; 670 671 /* 672 * Deal with any quirks this board might have. 673 */ 674 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21040_quirks); 675 break; 676 677 case TULIP_CHIP_21041: 678 /* Check for a slaved ROM on a multi-port board. */ 679 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDROM, 680 TULIP_PCI_SLAVEROM); 681 if (psc->sc_flags & TULIP_PCI_SLAVEROM) 682 memcpy(sc->sc_srom, psc->sc_master->sc_tulip.sc_srom, 683 sizeof(sc->sc_srom)); 684 685 /* Check for new format SROM. */ 686 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 687 /* 688 * Not an ISV SROM; try the old DEC Ethernet Address 689 * ROM format. 690 */ 691 if (tlp_parse_old_srom(sc, enaddr) == 0) 692 goto cant_cope; 693 } 694 695 /* 696 * All 21041 boards use the same media switch; they all 697 * work basically the same! Yippee! 698 */ 699 sc->sc_mediasw = &tlp_21041_mediasw; 700 701 /* 702 * Deal with any quirks this board might have. 703 */ 704 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21041_quirks); 705 break; 706 707 case TULIP_CHIP_21140: 708 case TULIP_CHIP_21140A: 709 /* Check for new format SROM. */ 710 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 711 /* 712 * Not an ISV SROM; try the old DEC Ethernet Address 713 * ROM format. 714 */ 715 if (tlp_parse_old_srom(sc, enaddr) == 0) 716 goto cant_cope; 717 } else { 718 /* 719 * We start out with the 2114x ISV media switch. 720 * When we search for quirks, we may change to 721 * a different switch. 722 */ 723 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 724 } 725 726 /* 727 * Deal with any quirks this board might have. 728 */ 729 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21140_quirks); 730 731 /* 732 * Bail out now if we can't deal with this board. 733 */ 734 if (sc->sc_mediasw == NULL) 735 goto cant_cope; 736 break; 737 738 case TULIP_CHIP_21142: 739 case TULIP_CHIP_21143: 740 /* Check for new format SROM. */ 741 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 742 /* 743 * Not an ISV SROM; try the old DEC Ethernet Address 744 * ROM format. 745 */ 746 if (tlp_parse_old_srom(sc, enaddr) == 0) 747 goto cant_cope; 748 } else { 749 /* 750 * We start out with the 2114x ISV media switch. 751 * When we search for quirks, we may change to 752 * a different switch. 753 */ 754 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 755 } 756 757 /* 758 * Deal with any quirks this board might have. 759 */ 760 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21142_quirks); 761 762 /* 763 * Bail out now if we can't deal with this board. 764 */ 765 if (sc->sc_mediasw == NULL) 766 goto cant_cope; 767 break; 768 769 case TULIP_CHIP_82C168: 770 case TULIP_CHIP_82C169: 771 /* 772 * Lite-On PNIC's Ethernet address is the first 6 773 * bytes of its EEPROM. 774 */ 775 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 776 777 /* 778 * Lite-On PNICs always use the same mediasw; we 779 * select MII vs. internal NWAY automatically. 780 */ 781 sc->sc_mediasw = &tlp_pnic_mediasw; 782 break; 783 784 case TULIP_CHIP_MX98713: 785 /* 786 * The Macronix MX98713 has an MII and GPIO, but no 787 * internal Nway block. This chip is basically a 788 * perfect 21140A clone, with the exception of the 789 * a magic register frobbing in order to make the 790 * interface function. 791 */ 792 if (tlp_isv_srom_enaddr(sc, enaddr)) { 793 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 794 break; 795 } 796 /* FALLTHROUGH */ 797 798 case TULIP_CHIP_82C115: 799 /* 800 * Yippee! The Lite-On 82C115 is a clone of 801 * the MX98725 (the data sheet even says `MXIC' 802 * on it)! Imagine that, a clone of a clone. 803 * 804 * The differences are really minimal: 805 * 806 * - Wake-On-LAN support 807 * - 128-bit multicast hash table, rather than 808 * the standard 512-bit hash table 809 */ 810 /* FALLTHROUGH */ 811 812 case TULIP_CHIP_MX98713A: 813 case TULIP_CHIP_MX98715A: 814 case TULIP_CHIP_MX98715AEC_X: 815 case TULIP_CHIP_MX98725: 816 /* 817 * The MX98713A has an MII as well as an internal Nway block, 818 * but no GPIO. The MX98715 and MX98725 have an internal 819 * Nway block only. 820 * 821 * The internal Nway block, unlike the Lite-On PNIC's, does 822 * just that - performs Nway. Once autonegotiation completes, 823 * we must program the GPR media information into the chip. 824 * 825 * The byte offset of the Ethernet address is stored at 826 * offset 0x70. 827 */ 828 memcpy(enaddr, &sc->sc_srom[sc->sc_srom[0x70]], ETHER_ADDR_LEN); 829 sc->sc_mediasw = &tlp_pmac_mediasw; 830 break; 831 832 case TULIP_CHIP_WB89C840F: 833 /* 834 * Winbond 89C840F's Ethernet address is the first 835 * 6 bytes of its EEPROM. 836 */ 837 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 838 839 /* 840 * Winbond 89C840F has an MII attached to the SIO. 841 */ 842 sc->sc_mediasw = &tlp_sio_mii_mediasw; 843 break; 844 845 case TULIP_CHIP_AL981: 846 /* 847 * The ADMtek AL981's Ethernet address is located 848 * at offset 8 of its EEPROM. 849 */ 850 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 851 852 /* 853 * ADMtek AL981 has a built-in PHY accessed through 854 * special registers. 855 */ 856 sc->sc_mediasw = &tlp_al981_mediasw; 857 break; 858 859 case TULIP_CHIP_AN983: 860 case TULIP_CHIP_AN985: 861 /* 862 * The ADMtek AN985's Ethernet address is located 863 * at offset 8 of its EEPROM. 864 */ 865 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 866 867 /* 868 * The ADMtek AN985 can be configured in Single-Chip 869 * mode or MAC-only mode. Single-Chip uses the built-in 870 * PHY, MAC-only has an external PHY (usually HomePNA). 871 * The selection is based on an EEPROM setting, and both 872 * PHYs are accessed via MII attached to SIO. 873 */ 874 sc->sc_mediasw = &tlp_sio_mii_mediasw; 875 break; 876 877 case TULIP_CHIP_DM9102: 878 case TULIP_CHIP_DM9102A: 879 /* 880 * Some boards with the Davicom chip have an ISV 881 * SROM (mostly DM9102A boards -- trying to describe 882 * the HomePNA PHY, probably) although the data in 883 * them is generally wrong. Check for ISV format 884 * and grab the Ethernet address that way, and if 885 * that fails, fall back on grabbing it from an 886 * observed offset of 20 (which is where it would 887 * be in an ISV SROM anyhow, tho ISV can cope with 888 * multi-port boards). 889 */ 890 if (tlp_isv_srom_enaddr(sc, enaddr)) 891 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN); 892 893 /* 894 * Davicom chips all have an internal MII interface 895 * and a built-in PHY. DM9102A also has a an external 896 * MII interface, usually with a HomePNA PHY attached 897 * to it. 898 */ 899 sc->sc_mediasw = &tlp_dm9102_mediasw; 900 break; 901 902 default: 903 cant_cope: 904 printf("%s: sorry, unable to handle your board\n", 905 sc->sc_dev.dv_xname); 906 return; 907 } 908 909 /* 910 * Handle shared interrupts. 911 */ 912 if (psc->sc_flags & TULIP_PCI_SHAREDINTR) { 913 if (psc->sc_master) 914 psc->sc_flags |= TULIP_PCI_SLAVEINTR; 915 else { 916 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDINTR, 917 TULIP_PCI_SLAVEINTR); 918 if (psc->sc_master == NULL) 919 psc->sc_master = psc; 920 } 921 LIST_INSERT_HEAD(&psc->sc_master->sc_intrslaves, 922 psc, sc_intrq); 923 } 924 925 if (psc->sc_flags & TULIP_PCI_SLAVEINTR) { 926 printf("%s: sharing interrupt with %s\n", 927 sc->sc_dev.dv_xname, 928 psc->sc_master->sc_tulip.sc_dev.dv_xname); 929 } else { 930 /* 931 * Map and establish our interrupt. 932 */ 933 if (pci_intr_map(pc, pa->pa_intrtag, pa->pa_intrpin, 934 pa->pa_intrline, &ih)) { 935 printf("%s: unable to map interrupt\n", 936 sc->sc_dev.dv_xname); 937 return; 938 } 939 intrstr = pci_intr_string(pc, ih); 940 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, 941 (psc->sc_flags & TULIP_PCI_SHAREDINTR) ? 942 tlp_pci_shared_intr : tlp_intr, sc); 943 if (psc->sc_ih == NULL) { 944 printf("%s: unable to establish interrupt", 945 sc->sc_dev.dv_xname); 946 if (intrstr != NULL) 947 printf(" at %s", intrstr); 948 printf("\n"); 949 return; 950 } 951 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, 952 intrstr); 953 } 954 955 /* 956 * Finish off the attach. 957 */ 958 tlp_attach(sc, enaddr); 959 } 960 961 int 962 tlp_pci_shared_intr(arg) 963 void *arg; 964 { 965 struct tulip_pci_softc *master = arg, *slave; 966 int rv = 0; 967 968 for (slave = LIST_FIRST(&master->sc_intrslaves); 969 slave != NULL; 970 slave = LIST_NEXT(slave, sc_intrq)) 971 rv |= tlp_intr(&slave->sc_tulip); 972 973 return (rv); 974 } 975 976 void 977 tlp_pci_dec_quirks(psc, enaddr) 978 struct tulip_pci_softc *psc; 979 const u_int8_t *enaddr; 980 { 981 struct tulip_softc *sc = &psc->sc_tulip; 982 983 /* 984 * This isn't really a quirk-gathering device, really. We 985 * just want to get the spiffy DEC board name from the SROM. 986 */ 987 strcpy(sc->sc_name, "DEC "); 988 989 if (memcmp(&sc->sc_srom[29], "DE500", 5) == 0 || 990 memcmp(&sc->sc_srom[29], "DE450", 5) == 0) 991 memcpy(&sc->sc_name[4], &sc->sc_srom[29], 8); 992 } 993 994 void 995 tlp_pci_znyx_21040_quirks(psc, enaddr) 996 struct tulip_pci_softc *psc; 997 const u_int8_t *enaddr; 998 { 999 struct tulip_softc *sc = &psc->sc_tulip; 1000 u_int16_t id = 0; 1001 1002 /* 1003 * If we have a slaved ROM, just copy the bits from the master. 1004 * This is in case we fail the ROM ID check (older boards) and 1005 * need to fall back on Ethernet address model checking; that 1006 * will fail for slave chips. 1007 */ 1008 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 1009 strcpy(sc->sc_name, psc->sc_master->sc_tulip.sc_name); 1010 sc->sc_mediasw = psc->sc_master->sc_tulip.sc_mediasw; 1011 psc->sc_flags |= 1012 psc->sc_master->sc_flags & TULIP_PCI_SHAREDINTR; 1013 return; 1014 } 1015 1016 if (sc->sc_srom[32] == 0x4a && sc->sc_srom[33] == 0x52) { 1017 id = sc->sc_srom[37] | (sc->sc_srom[36] << 8); 1018 switch (id) { 1019 zx312: 1020 case 0x0602: /* ZX312 */ 1021 strcpy(sc->sc_name, "ZNYX ZX312"); 1022 return; 1023 1024 case 0x0622: /* ZX312T */ 1025 strcpy(sc->sc_name, "ZNYX ZX312T"); 1026 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1027 return; 1028 1029 zx314_inta: 1030 case 0x0701: /* ZX314 INTA */ 1031 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1032 /* FALLTHROUGH */ 1033 case 0x0711: /* ZX314 */ 1034 strcpy(sc->sc_name, "ZNYX ZX314"); 1035 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1036 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1037 return; 1038 1039 zx315_inta: 1040 case 0x0801: /* ZX315 INTA */ 1041 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1042 /* FALLTHROUGH */ 1043 case 0x0811: /* ZX315 */ 1044 strcpy(sc->sc_name, "ZNYX ZX315"); 1045 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1046 return; 1047 1048 default: 1049 id = 0; 1050 } 1051 } 1052 1053 /* 1054 * Deal with boards that have broken ROMs. 1055 */ 1056 if (id == 0) { 1057 if ((enaddr[3] & ~3) == 0xf0 && (enaddr[5] & 3) == 0x00) 1058 goto zx314_inta; 1059 if ((enaddr[3] & ~3) == 0xf4 && (enaddr[5] & 1) == 0x00) 1060 goto zx315_inta; 1061 if ((enaddr[3] & ~3) == 0xec) 1062 goto zx312; 1063 } 1064 1065 strcpy(sc->sc_name, "ZNYX ZX31x"); 1066 } 1067 1068 void 1069 tlp_pci_smc_21040_quirks(psc, enaddr) 1070 struct tulip_pci_softc *psc; 1071 const u_int8_t *enaddr; 1072 { 1073 struct tulip_softc *sc = &psc->sc_tulip; 1074 u_int16_t id1, id2, ei; 1075 int auibnc = 0, utp = 0; 1076 char *cp; 1077 1078 id1 = sc->sc_srom[0x60] | (sc->sc_srom[0x61] << 8); 1079 id2 = sc->sc_srom[0x62] | (sc->sc_srom[0x63] << 8); 1080 ei = sc->sc_srom[0x66] | (sc->sc_srom[0x67] << 8); 1081 1082 strcpy(sc->sc_name, "SMC 8432"); 1083 cp = &sc->sc_name[8]; 1084 1085 if ((id1 & 1) == 0) { 1086 *cp++ = 'B'; 1087 auibnc = 1; 1088 } 1089 if ((id1 & 0xff) > 0x32) { 1090 *cp++ = 'T'; 1091 utp = 1; 1092 } 1093 if ((id1 & 0x4000) == 0) { 1094 *cp++ = 'A'; 1095 auibnc = 1; 1096 } 1097 if (id2 == 0x15) { 1098 sc->sc_name[7] = '4'; 1099 *cp++ = '-'; 1100 *cp++ = 'C'; 1101 *cp++ = 'H'; 1102 *cp++ = ei ? '2' : '1'; 1103 } 1104 *cp = '\0'; 1105 1106 if (utp != 0 && auibnc == 0) 1107 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1108 else if (utp == 0 && auibnc != 0) 1109 sc->sc_mediasw = &tlp_21040_auibnc_mediasw; 1110 } 1111 1112 void 1113 tlp_pci_cogent_21040_quirks(psc, enaddr) 1114 struct tulip_pci_softc *psc; 1115 const u_int8_t *enaddr; 1116 { 1117 1118 strcpy(psc->sc_tulip.sc_name, "Cogent multi-port"); 1119 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1120 } 1121 1122 void 1123 tlp_pci_accton_21040_quirks(psc, enaddr) 1124 struct tulip_pci_softc *psc; 1125 const u_int8_t *enaddr; 1126 { 1127 1128 strcpy(psc->sc_tulip.sc_name, "ACCTON EN1203"); 1129 } 1130 1131 void tlp_pci_asante_21140_reset __P((struct tulip_softc *)); 1132 1133 void 1134 tlp_pci_asante_21140_quirks(psc, enaddr) 1135 struct tulip_pci_softc *psc; 1136 const u_int8_t *enaddr; 1137 { 1138 struct tulip_softc *sc = &psc->sc_tulip; 1139 1140 /* 1141 * Some Asante boards don't use the ISV SROM format. For 1142 * those that don't, we initialize the GPIO direction bits, 1143 * and provide our own reset hook, which resets the MII. 1144 * 1145 * All of these boards use SIO-attached-MII media. 1146 */ 1147 if (sc->sc_mediasw == &tlp_2114x_isv_mediasw) 1148 return; 1149 1150 strcpy(sc->sc_name, "Asante"); 1151 1152 sc->sc_gp_dir = 0xbf; 1153 sc->sc_reset = tlp_pci_asante_21140_reset; 1154 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1155 } 1156 1157 void 1158 tlp_pci_asante_21140_reset(sc) 1159 struct tulip_softc *sc; 1160 { 1161 1162 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1163 TULIP_WRITE(sc, CSR_GPP, 0x8); 1164 delay(100); 1165 TULIP_WRITE(sc, CSR_GPP, 0); 1166 } 1167 1168 void tlp_pci_cobalt_21142_reset __P((struct tulip_softc *)); 1169 1170 void 1171 tlp_pci_cobalt_21142_quirks(psc, enaddr) 1172 struct tulip_pci_softc *psc; 1173 const u_int8_t *enaddr; 1174 { 1175 struct tulip_softc *sc = &psc->sc_tulip; 1176 1177 /* 1178 * Cobalt Networks interfaces are just MII-on-SIO. 1179 */ 1180 sc->sc_reset = tlp_pci_cobalt_21142_reset; 1181 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1182 1183 /* 1184 * The Cobalt systems tend to fall back to store-and-forward 1185 * pretty quickly, so we select that from the beginning to 1186 * avoid initial timeouts. 1187 */ 1188 sc->sc_txthresh = TXTH_SF; 1189 } 1190 1191 void 1192 tlp_pci_cobalt_21142_reset(sc) 1193 struct tulip_softc *sc; 1194 { 1195 /* 1196 * Reset PHY. 1197 */ 1198 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE | (1 << 16)); 1199 delay(10); 1200 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE); 1201 delay(10); 1202 } 1203
Indexes created Wed Oct 01 13:09:50 GMT 2025