if_tlp_pci.c revision 1.27 1 /* $NetBSD: if_tlp_pci.c,v 1.27 1999/12/11 00:33:01 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the NetBSD
22 * Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 * contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40 /*
41 * PCI bus front-end for the Digital Semiconductor ``Tulip'' (21x4x)
42 * Ethernet controller family driver.
43 */
44
45 #include "opt_inet.h"
46 #include "opt_ns.h"
47 #include "bpfilter.h"
48
49 #include <sys/param.h>
50 #include <sys/systm.h>
51 #include <sys/mbuf.h>
52 #include <sys/malloc.h>
53 #include <sys/kernel.h>
54 #include <sys/socket.h>
55 #include <sys/ioctl.h>
56 #include <sys/errno.h>
57 #include <sys/device.h>
58
59 #include <machine/endian.h>
60
61 #include <net/if.h>
62 #include <net/if_dl.h>
63 #include <net/if_media.h>
64 #include <net/if_ether.h>
65
66 #if NBPFILTER > 0
67 #include <net/bpf.h>
68 #endif
69
70 #ifdef INET
71 #include <netinet/in.h>
72 #include <netinet/if_inarp.h>
73 #endif
74
75 #ifdef NS
76 #include <netns/ns.h>
77 #include <netns/ns_if.h>
78 #endif
79
80 #include <machine/bus.h>
81 #include <machine/intr.h>
82
83 #include <dev/mii/miivar.h>
84 #include <dev/mii/mii_bitbang.h>
85
86 #include <dev/ic/tulipreg.h>
87 #include <dev/ic/tulipvar.h>
88
89 #include <dev/pci/pcivar.h>
90 #include <dev/pci/pcireg.h>
91 #include <dev/pci/pcidevs.h>
92
93 /*
94 * PCI configuration space registers used by the Tulip.
95 */
96 #define TULIP_PCI_IOBA 0x10 /* i/o mapped base */
97 #define TULIP_PCI_MMBA 0x14 /* memory mapped base */
98 #define TULIP_PCI_CFDA 0x40 /* configuration driver area */
99
100 #define CFDA_SLEEP 0x80000000 /* sleep mode */
101 #define CFDA_SNOOZE 0x40000000 /* snooze mode */
102
103 struct tulip_pci_softc {
104 struct tulip_softc sc_tulip; /* real Tulip softc */
105
106 /* PCI-specific goo. */
107 void *sc_ih; /* interrupt handle */
108
109 pci_chipset_tag_t sc_pc; /* our PCI chipset */
110 pcitag_t sc_pcitag; /* our PCI tag */
111
112 int sc_flags; /* flags; see below */
113
114 LIST_HEAD(, tulip_pci_softc) sc_intrslaves;
115 LIST_ENTRY(tulip_pci_softc) sc_intrq;
116
117 /* Our {ROM,interrupt} master. */
118 struct tulip_pci_softc *sc_master;
119 };
120
121 /* sc_flags */
122 #define TULIP_PCI_SHAREDINTR 0x01 /* interrupt is shared */
123 #define TULIP_PCI_SLAVEINTR 0x02 /* interrupt is slave */
124 #define TULIP_PCI_SHAREDROM 0x04 /* ROM is shared */
125 #define TULIP_PCI_SLAVEROM 0x08 /* slave of shared ROM */
126
127 int tlp_pci_match __P((struct device *, struct cfdata *, void *));
128 void tlp_pci_attach __P((struct device *, struct device *, void *));
129
130 struct cfattach tlp_pci_ca = {
131 sizeof(struct tulip_pci_softc), tlp_pci_match, tlp_pci_attach,
132 };
133
134 const struct tulip_pci_product {
135 u_int32_t tpp_vendor; /* PCI vendor ID */
136 u_int32_t tpp_product; /* PCI product ID */
137 tulip_chip_t tpp_chip; /* base Tulip chip type */
138 int tpp_pmreg; /* power management register offset */
139 } tlp_pci_products[] = {
140 #ifdef TLP_MATCH_21040
141 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21040,
142 TULIP_CHIP_21040, 0 },
143 #endif
144 #ifdef TLP_MATCH_21041
145 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21041,
146 TULIP_CHIP_21041, 0 },
147 #endif
148 #ifdef TLP_MATCH_21140
149 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21140,
150 TULIP_CHIP_21140, 0 },
151 #endif
152 #ifdef TLP_MATCH_21142
153 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142,
154 TULIP_CHIP_21142, 0xe0 },
155 #endif
156
157 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C168,
158 TULIP_CHIP_82C168, 0 },
159
160 /*
161 * Note: This is like a MX98725 with Wake-On-LAN and a
162 * 128-bit multicast hash table.
163 */
164 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C115,
165 TULIP_CHIP_82C115, 0x48 },
166
167 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98713,
168 TULIP_CHIP_MX98713, 0 },
169 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX987x5,
170 TULIP_CHIP_MX98715, 0x48 },
171
172 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100TX,
173 TULIP_CHIP_MX98713, 0 },
174
175 { PCI_VENDOR_WINBOND, PCI_PRODUCT_WINBOND_W89C840F,
176 TULIP_CHIP_WB89C840F, 0 },
177 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100ATX,
178 TULIP_CHIP_WB89C840F, 0 },
179
180 #if 0
181 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9102,
182 TULIP_CHIP_DM9102, 0 },
183 #endif
184
185 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AL981,
186 TULIP_CHIP_AL981, 0xc4 },
187
188 #if 0
189 { PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX88140A,
190 TULIP_CHIP_AX88140, 0 },
191 #endif
192
193 { 0, 0,
194 TULIP_CHIP_INVALID, 0 },
195 };
196
197 struct tlp_pci_quirks {
198 void (*tpq_func) __P((struct tulip_pci_softc *,
199 const u_int8_t *));
200 u_int8_t tpq_oui[3];
201 };
202
203 void tlp_pci_dec_quirks __P((struct tulip_pci_softc *,
204 const u_int8_t *));
205
206 void tlp_pci_znyx_21040_quirks __P((struct tulip_pci_softc *,
207 const u_int8_t *));
208 void tlp_pci_smc_21040_quirks __P((struct tulip_pci_softc *,
209 const u_int8_t *));
210 void tlp_pci_cogent_21040_quirks __P((struct tulip_pci_softc *,
211 const u_int8_t *));
212 void tlp_pci_accton_21040_quirks __P((struct tulip_pci_softc *,
213 const u_int8_t *));
214
215 const struct tlp_pci_quirks tlp_pci_21040_quirks[] = {
216 { tlp_pci_znyx_21040_quirks, { 0x00, 0xc0, 0x95 } },
217 { tlp_pci_smc_21040_quirks, { 0x00, 0x00, 0xc0 } },
218 { tlp_pci_cogent_21040_quirks, { 0x00, 0x00, 0x92 } },
219 { tlp_pci_accton_21040_quirks, { 0x00, 0x00, 0xe8 } },
220 { NULL, { 0, 0, 0 } }
221 };
222
223 const struct tlp_pci_quirks tlp_pci_21041_quirks[] = {
224 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } },
225 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } },
226 { NULL, { 0, 0, 0 } }
227 };
228
229 void tlp_pci_asante_21140_quirks __P((struct tulip_pci_softc *,
230 const u_int8_t *));
231
232 const struct tlp_pci_quirks tlp_pci_21140_quirks[] = {
233 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } },
234 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } },
235 { tlp_pci_asante_21140_quirks, { 0x00, 0x00, 0x94 } },
236 { NULL, { 0, 0, 0 } }
237 };
238
239 const struct tlp_pci_quirks tlp_pci_21142_quirks[] = {
240 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } },
241 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } },
242 { NULL, { 0, 0, 0 } }
243 };
244
245 const char *tlp_pci_chip_names[] = TULIP_CHIP_NAMES;
246
247 int tlp_pci_shared_intr __P((void *));
248
249 const struct tulip_pci_product *tlp_pci_lookup
250 __P((const struct pci_attach_args *));
251 void tlp_pci_get_quirks __P((struct tulip_pci_softc *, const u_int8_t *,
252 const struct tlp_pci_quirks *));
253 void tlp_pci_check_slaved __P((struct tulip_pci_softc *, int, int));
254
255 const struct tulip_pci_product *
256 tlp_pci_lookup(pa)
257 const struct pci_attach_args *pa;
258 {
259 const struct tulip_pci_product *tpp;
260
261 for (tpp = tlp_pci_products;
262 tlp_pci_chip_names[tpp->tpp_chip] != NULL;
263 tpp++) {
264 if (PCI_VENDOR(pa->pa_id) == tpp->tpp_vendor &&
265 PCI_PRODUCT(pa->pa_id) == tpp->tpp_product)
266 return (tpp);
267 }
268 return (NULL);
269 }
270
271 void
272 tlp_pci_get_quirks(psc, enaddr, tpq)
273 struct tulip_pci_softc *psc;
274 const u_int8_t *enaddr;
275 const struct tlp_pci_quirks *tpq;
276 {
277
278 for (; tpq->tpq_func != NULL; tpq++) {
279 if (tpq->tpq_oui[0] == enaddr[0] &&
280 tpq->tpq_oui[1] == enaddr[1] &&
281 tpq->tpq_oui[2] == enaddr[2]) {
282 (*tpq->tpq_func)(psc, enaddr);
283 return;
284 }
285 }
286 }
287
288 void
289 tlp_pci_check_slaved(psc, shared, slaved)
290 struct tulip_pci_softc *psc;
291 int shared, slaved;
292 {
293 extern struct cfdriver tlp_cd;
294 struct tulip_pci_softc *cur, *best = NULL;
295 struct tulip_softc *sc = &psc->sc_tulip;
296 int i;
297
298 /*
299 * First of all, find the lowest pcidev numbered device on our
300 * bus marked as shared. That should be our master.
301 */
302 for (i = 0; i < tlp_cd.cd_ndevs; i++) {
303 if ((cur = tlp_cd.cd_devs[i]) == NULL)
304 continue;
305 if (cur->sc_tulip.sc_dev.dv_parent != sc->sc_dev.dv_parent)
306 continue;
307 if ((cur->sc_flags & shared) == 0)
308 continue;
309 if (cur == psc)
310 continue;
311 if (best == NULL ||
312 best->sc_tulip.sc_devno > cur->sc_tulip.sc_devno)
313 best = cur;
314 }
315
316 if (best != NULL) {
317 psc->sc_master = best;
318 psc->sc_flags |= (shared | slaved);
319 }
320 }
321
322 int
323 tlp_pci_match(parent, match, aux)
324 struct device *parent;
325 struct cfdata *match;
326 void *aux;
327 {
328 struct pci_attach_args *pa = aux;
329
330 if (tlp_pci_lookup(pa) != NULL)
331 return (10); /* beat if_de.c */
332
333 return (0);
334 }
335
336 void
337 tlp_pci_attach(parent, self, aux)
338 struct device *parent, *self;
339 void *aux;
340 {
341 struct tulip_pci_softc *psc = (void *) self;
342 struct tulip_softc *sc = &psc->sc_tulip;
343 struct pci_attach_args *pa = aux;
344 pci_chipset_tag_t pc = pa->pa_pc;
345 pci_intr_handle_t ih;
346 const char *intrstr = NULL;
347 bus_space_tag_t iot, memt;
348 bus_space_handle_t ioh, memh;
349 int ioh_valid, memh_valid, i, j;
350 const struct tulip_pci_product *tpp;
351 u_int8_t enaddr[ETHER_ADDR_LEN];
352 u_int32_t val;
353 pcireg_t reg;
354
355 sc->sc_devno = pa->pa_device;
356 psc->sc_pc = pa->pa_pc;
357 psc->sc_pcitag = pa->pa_tag;
358
359 LIST_INIT(&psc->sc_intrslaves);
360
361 tpp = tlp_pci_lookup(pa);
362 if (tpp == NULL) {
363 printf("\n");
364 panic("tlp_pci_attach: impossible");
365 }
366 sc->sc_chip = tpp->tpp_chip;
367
368 /*
369 * By default, Tulip registers are 8 bytes long (4 bytes
370 * followed by a 4 byte pad).
371 */
372 sc->sc_regshift = 3;
373
374 /*
375 * Get revision info, and set some chip-specific variables.
376 */
377 sc->sc_rev = PCI_REVISION(pa->pa_class);
378 switch (sc->sc_chip) {
379 case TULIP_CHIP_21140:
380 if (sc->sc_rev >= 0x20)
381 sc->sc_chip = TULIP_CHIP_21140A;
382 break;
383
384 case TULIP_CHIP_21142:
385 if (sc->sc_rev >= 0x20)
386 sc->sc_chip = TULIP_CHIP_21143;
387 break;
388
389 case TULIP_CHIP_82C168:
390 if (sc->sc_rev >= 0x20)
391 sc->sc_chip = TULIP_CHIP_82C169;
392 break;
393
394 case TULIP_CHIP_MX98713:
395 if (sc->sc_rev >= 0x10)
396 sc->sc_chip = TULIP_CHIP_MX98713A;
397 break;
398
399 case TULIP_CHIP_MX98715:
400 if (sc->sc_rev >= 0x20)
401 sc->sc_chip = TULIP_CHIP_MX98715A;
402 if (sc->sc_rev >= 0x30)
403 sc->sc_chip = TULIP_CHIP_MX98725;
404 break;
405
406 case TULIP_CHIP_WB89C840F:
407 sc->sc_regshift = 2;
408 break;
409
410 case TULIP_CHIP_AX88140:
411 if (sc->sc_rev >= 0x10)
412 sc->sc_chip = TULIP_CHIP_AX88141;
413 break;
414
415 default:
416 /* Nothing. */
417 }
418
419 printf(": %s Ethernet, pass %d.%d\n",
420 tlp_pci_chip_names[sc->sc_chip],
421 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf);
422
423 switch (sc->sc_chip) {
424 case TULIP_CHIP_21040:
425 if (sc->sc_rev < 0x20) {
426 printf("%s: 21040 must be at least pass 2.0\n",
427 sc->sc_dev.dv_xname);
428 return;
429 }
430 break;
431
432 case TULIP_CHIP_21140:
433 if (sc->sc_rev < 0x11) {
434 printf("%s: 21140 must be at least pass 1.1\n",
435 sc->sc_dev.dv_xname);
436 return;
437 }
438 break;
439
440 default:
441 /* Nothing. */
442 }
443
444 /*
445 * Check to see if the device is in power-save mode, and
446 * being it out if necessary.
447 */
448 switch (sc->sc_chip) {
449 case TULIP_CHIP_21140:
450 case TULIP_CHIP_21140A:
451 case TULIP_CHIP_21142:
452 case TULIP_CHIP_21143:
453 case TULIP_CHIP_MX98713A:
454 case TULIP_CHIP_MX98715:
455 case TULIP_CHIP_MX98715A:
456 case TULIP_CHIP_MX98725:
457 /*
458 * Clear the "sleep mode" bit in the CFDA register.
459 */
460 reg = pci_conf_read(pc, pa->pa_tag, TULIP_PCI_CFDA);
461 if (reg & (CFDA_SLEEP|CFDA_SNOOZE))
462 pci_conf_write(pc, pa->pa_tag, TULIP_PCI_CFDA,
463 reg & ~(CFDA_SLEEP|CFDA_SNOOZE));
464 break;
465
466 default:
467 /* Nothing. */
468 }
469
470 if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PWRMGMT, 0, 0)) {
471 if (tpp->tpp_pmreg == 0) {
472 printf("%s: don't know location of PMCSR for this "
473 "chip\n", sc->sc_dev.dv_xname);
474 return;
475 }
476 reg = pci_conf_read(pc, pa->pa_tag, tpp->tpp_pmreg) & 0x3;
477 if (reg == 3) {
478 /*
479 * The card has lost all configuration data in
480 * this state, so punt.
481 */
482 printf("%s: unable to wake up from power state D3\n",
483 sc->sc_dev.dv_xname);
484 return;
485 }
486 if (reg != 0) {
487 printf("%s: waking up from power state D%d\n",
488 sc->sc_dev.dv_xname, reg);
489 pci_conf_write(pc, pa->pa_tag, tpp->tpp_pmreg, 0);
490 }
491 }
492
493 /*
494 * Map the device.
495 */
496 ioh_valid = (pci_mapreg_map(pa, TULIP_PCI_IOBA,
497 PCI_MAPREG_TYPE_IO, 0,
498 &iot, &ioh, NULL, NULL) == 0);
499 memh_valid = (pci_mapreg_map(pa, TULIP_PCI_MMBA,
500 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0,
501 &memt, &memh, NULL, NULL) == 0);
502
503 if (memh_valid) {
504 sc->sc_st = memt;
505 sc->sc_sh = memh;
506 } else if (ioh_valid) {
507 sc->sc_st = iot;
508 sc->sc_sh = ioh;
509 } else {
510 printf(": unable to map device registers\n");
511 return;
512 }
513
514 sc->sc_dmat = pa->pa_dmat;
515
516 /*
517 * Make sure bus mastering is enabled.
518 */
519 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
520 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) |
521 PCI_COMMAND_MASTER_ENABLE);
522
523 /*
524 * Get the cacheline size.
525 */
526 sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag,
527 PCI_BHLC_REG));
528
529 /*
530 * Get PCI data moving command info.
531 */
532 if (pa->pa_flags & PCI_FLAGS_MRL_OKAY)
533 sc->sc_flags |= TULIPF_MRL;
534 if (pa->pa_flags & PCI_FLAGS_MRM_OKAY)
535 sc->sc_flags |= TULIPF_MRM;
536 if (pa->pa_flags & PCI_FLAGS_MWI_OKAY)
537 sc->sc_flags |= TULIPF_MWI;
538
539 /*
540 * Read the contents of the Ethernet Address ROM/SROM. Some
541 * chips have a 128 byte SROM (6 address bits), and some
542 * have a 512 byte SROM (8 address bits).
543 */
544 sc->sc_srom_addrbits = 6;
545 try_again:
546 memset(sc->sc_srom, 0, sizeof(sc->sc_srom));
547 switch (sc->sc_chip) {
548 case TULIP_CHIP_21040:
549 TULIP_WRITE(sc, CSR_MIIROM, MIIROM_SROMCS);
550 for (i = 0; i < TULIP_ROM_SIZE(sc->sc_srom_addrbits); i++) {
551 for (j = 0; j < 10000; j++) {
552 val = TULIP_READ(sc, CSR_MIIROM);
553 if ((val & MIIROM_DN) == 0)
554 break;
555 }
556 sc->sc_srom[i] = val & MIIROM_DATA;
557 }
558 break;
559
560 case TULIP_CHIP_82C168:
561 case TULIP_CHIP_82C169:
562 {
563 u_int16_t *rombuf = (u_int16_t *)sc->sc_srom;
564
565 /*
566 * The Lite-On PNIC stores the Ethernet address in
567 * the first 3 words of the EEPROM. EEPROM access
568 * is not like the other Tulip chips.
569 */
570 for (i = 0; i < 3; i++) {
571 TULIP_WRITE(sc, CSR_PNIC_SROMCTL,
572 PNIC_SROMCTL_READ | i);
573 for (j = 0; j < 500; j++) {
574 delay(2);
575 val = TULIP_READ(sc, CSR_MIIROM);
576 if ((val & PNIC_MIIROM_BUSY) == 0)
577 break;
578 }
579 if (val & PNIC_MIIROM_BUSY) {
580 printf("%s: EEPROM timed out\n",
581 sc->sc_dev.dv_xname);
582 return;
583 }
584 rombuf[i] = bswap16(val & PNIC_MIIROM_DATA);
585 }
586 break;
587 }
588
589 default:
590 tlp_read_srom(sc, 0, TULIP_ROM_SIZE(sc->sc_srom_addrbits) >> 1,
591 sc->sc_srom);
592 #if 0
593 printf("SROM CONTENTS:");
594 for (i = 0; i < TULIP_ROM_SIZE(sc->sc_srom_addrbits); i++) {
595 if ((i % 8) == 0)
596 printf("\n\t");
597 printf("0x%02x ", sc->sc_srom[i]);
598 }
599 printf("\n");
600 #endif
601 }
602
603 /*
604 * Deal with chip/board quirks. This includes setting up
605 * the mediasw, and extracting the Ethernet address from
606 * the rombuf.
607 */
608 switch (sc->sc_chip) {
609 case TULIP_CHIP_21040:
610 /* Check for a slaved ROM on a multi-port board. */
611 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDROM,
612 TULIP_PCI_SLAVEROM);
613 if (psc->sc_flags & TULIP_PCI_SLAVEROM)
614 memcpy(sc->sc_srom, psc->sc_master->sc_tulip.sc_srom,
615 sizeof(sc->sc_srom));
616
617 /*
618 * Parse the Ethernet Address ROM.
619 */
620 if (tlp_parse_old_srom(sc, enaddr) == 0) {
621 printf("%s: unable to decode Ethernet Address ROM\n",
622 sc->sc_dev.dv_xname);
623 return;
624 }
625
626 /*
627 * If we have a slaved ROM, adjust the Ethernet address.
628 */
629 if (psc->sc_flags & TULIP_PCI_SLAVEROM)
630 enaddr[5] +=
631 sc->sc_devno - psc->sc_master->sc_tulip.sc_devno;
632
633 /*
634 * All 21040 boards start out with the same
635 * media switch.
636 */
637 sc->sc_mediasw = &tlp_21040_mediasw;
638
639 /*
640 * Deal with any quirks this board might have.
641 */
642 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21040_quirks);
643 break;
644
645 case TULIP_CHIP_21041:
646 /* Check for a slaved ROM on a multi-port board. */
647 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDROM,
648 TULIP_PCI_SLAVEROM);
649 if (psc->sc_flags & TULIP_PCI_SLAVEROM)
650 memcpy(sc->sc_srom, psc->sc_master->sc_tulip.sc_srom,
651 sizeof(sc->sc_srom));
652
653 /* Check for new format SROM. */
654 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) {
655 /*
656 * Not an ISV SROM; try the old DEC Ethernet Address
657 * ROM format.
658 */
659 if (tlp_parse_old_srom(sc, enaddr) == 0) {
660 printf("%s: unable to decode Ethernet "
661 "Address ROM\n", sc->sc_dev.dv_xname);
662 return;
663 }
664 }
665
666 /*
667 * All 21041 boards use the same media switch; they all
668 * work basically the same! Yippee!
669 */
670 sc->sc_mediasw = &tlp_21041_mediasw;
671
672 /*
673 * Deal with any quirks this board might have.
674 */
675 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21041_quirks);
676 break;
677
678 case TULIP_CHIP_21140:
679 case TULIP_CHIP_21140A:
680 /* Check for new format SROM. */
681 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) {
682 /*
683 * Not an ISV SROM; try the old DEC Ethernet Address
684 * ROM format.
685 */
686 if (tlp_parse_old_srom(sc, enaddr) == 0) {
687 printf("%s: unable to decode Ethernet "
688 "Address ROM\n", sc->sc_dev.dv_xname);
689 return;
690 }
691 } else {
692 /*
693 * We start out with the 2114x ISV media switch.
694 * When we search for quirks, we may change to
695 * a different switch.
696 */
697 sc->sc_mediasw = &tlp_2114x_isv_mediasw;
698 }
699
700 /*
701 * Deal with any quirks this board might have.
702 */
703 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21140_quirks);
704
705 /*
706 * Bail out now if we can't deal with this board.
707 */
708 if (sc->sc_mediasw == NULL)
709 goto cant_cope;
710 break;
711
712 case TULIP_CHIP_21142:
713 case TULIP_CHIP_21143:
714 /* Check for new format SROM. */
715 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) {
716 /*
717 * Not an ISV SROM; can't cope, for now.
718 */
719 goto cant_cope;
720 } else {
721 /*
722 * We start out with the 2114x ISV media switch.
723 * When we search for quirks, we may change to
724 * a different switch.
725 */
726 sc->sc_mediasw = &tlp_2114x_isv_mediasw;
727 }
728
729 /*
730 * Deal with any quirks this board might have.
731 */
732 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21142_quirks);
733
734 /*
735 * Bail out now if we can't deal with this board.
736 */
737 if (sc->sc_mediasw == NULL)
738 goto cant_cope;
739 break;
740
741 case TULIP_CHIP_82C168:
742 case TULIP_CHIP_82C169:
743 /*
744 * Lite-On PNIC's Ethernet address is the first 6
745 * bytes of its EEPROM.
746 */
747 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN);
748
749 /*
750 * Lite-On PNICs always use the same mediasw; we
751 * select MII vs. internal NWAY automatically.
752 */
753 sc->sc_mediasw = &tlp_pnic_mediasw;
754 break;
755
756 case TULIP_CHIP_MX98713:
757 /*
758 * The Macronix MX98713 has an MII and GPIO, but no
759 * internal Nway block. This chip is basically a
760 * perfect 21140A clone, with the exception of the
761 * a magic register frobbing in order to make the
762 * interface function.
763 */
764 if (tlp_isv_srom_enaddr(sc, enaddr)) {
765 sc->sc_mediasw = &tlp_2114x_isv_mediasw;
766 break;
767 }
768 /* FALLTHROUGH */
769
770 case TULIP_CHIP_82C115:
771 /*
772 * Yippee! The Lite-On 82C115 is a clone of
773 * the MX98725 (the data sheet even says `MXIC'
774 * on it)! Imagine that, a clone of a clone.
775 *
776 * The differences are really minimal:
777 *
778 * - Wake-On-LAN support
779 * - 128-bit multicast hash table, rather than
780 * the standard 512-bit hash table
781 */
782 /* FALLTHROUGH */
783
784 case TULIP_CHIP_MX98713A:
785 case TULIP_CHIP_MX98715A:
786 case TULIP_CHIP_MX98725:
787 /*
788 * The MX98713A has an MII as well as an internal Nway block,
789 * but no GPIO. The MX98715 and MX98725 have an internal
790 * Nway block only.
791 *
792 * The internal Nway block, unlike the Lite-On PNIC's, does
793 * just that - performs Nway. Once autonegotiation completes,
794 * we must program the GPR media information into the chip.
795 *
796 * The byte offset of the Ethernet address is stored at
797 * offset 0x70.
798 */
799 memcpy(enaddr, &sc->sc_srom[sc->sc_srom[0x70]], ETHER_ADDR_LEN);
800 sc->sc_mediasw = &tlp_pmac_mediasw;
801 break;
802
803 case TULIP_CHIP_WB89C840F:
804 /*
805 * Winbond 89C840F's Ethernet address is the first
806 * 6 bytes of its EEPROM.
807 */
808 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN);
809
810 /*
811 * Winbond 89C840F has an MII attached to the SIO.
812 */
813 sc->sc_mediasw = &tlp_sio_mii_mediasw;
814 break;
815
816 case TULIP_CHIP_AL981:
817 /*
818 * The ADMtek AL981's Ethernet address is located
819 * at offset 8 of its EEPROM.
820 */
821 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN);
822
823 /*
824 * ADMtek AL981 has a built-in PHY accessed through
825 * special registers.
826 */
827 sc->sc_mediasw = &tlp_al981_mediasw;
828 break;
829
830 default:
831 cant_cope:
832 switch (sc->sc_chip) {
833 case TULIP_CHIP_21143:
834 /*
835 * Try reading it again, with larger SROM
836 * size, if we haven't already.
837 */
838 if (sc->sc_srom_addrbits != 8) {
839 sc->sc_srom_addrbits = 8;
840 goto try_again;
841 }
842 break;
843
844 default:
845 /* Nothing. */
846 }
847
848 printf("%s: sorry, unable to handle your board\n",
849 sc->sc_dev.dv_xname);
850 return;
851 }
852
853 /*
854 * Handle shared interrupts.
855 */
856 if (psc->sc_flags & TULIP_PCI_SHAREDINTR) {
857 if (psc->sc_master)
858 psc->sc_flags |= TULIP_PCI_SLAVEINTR;
859 else {
860 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDINTR,
861 TULIP_PCI_SLAVEINTR);
862 if (psc->sc_master == NULL)
863 psc->sc_master = psc;
864 }
865 LIST_INSERT_HEAD(&psc->sc_master->sc_intrslaves,
866 psc, sc_intrq);
867 }
868
869 if (psc->sc_flags & TULIP_PCI_SLAVEINTR) {
870 printf("%s: sharing interrupt with %s\n",
871 sc->sc_dev.dv_xname,
872 psc->sc_master->sc_tulip.sc_dev.dv_xname);
873 } else {
874 /*
875 * Map and establish our interrupt.
876 */
877 if (pci_intr_map(pc, pa->pa_intrtag, pa->pa_intrpin,
878 pa->pa_intrline, &ih)) {
879 printf("%s: unable to map interrupt\n",
880 sc->sc_dev.dv_xname);
881 return;
882 }
883 intrstr = pci_intr_string(pc, ih);
884 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET,
885 (psc->sc_flags & TULIP_PCI_SHAREDINTR) ?
886 tlp_pci_shared_intr : tlp_intr, sc);
887 if (psc->sc_ih == NULL) {
888 printf("%s: unable to establish interrupt",
889 sc->sc_dev.dv_xname);
890 if (intrstr != NULL)
891 printf(" at %s", intrstr);
892 printf("\n");
893 return;
894 }
895 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname,
896 intrstr);
897 }
898
899 /*
900 * Finish off the attach.
901 */
902 tlp_attach(sc, enaddr);
903 }
904
905 int
906 tlp_pci_shared_intr(arg)
907 void *arg;
908 {
909 struct tulip_pci_softc *master = arg, *slave;
910 int rv = 0;
911
912 for (slave = LIST_FIRST(&master->sc_intrslaves);
913 slave != NULL;
914 slave = LIST_NEXT(slave, sc_intrq))
915 rv |= tlp_intr(&slave->sc_tulip);
916
917 return (rv);
918 }
919
920 void
921 tlp_pci_dec_quirks(psc, enaddr)
922 struct tulip_pci_softc *psc;
923 const u_int8_t *enaddr;
924 {
925 struct tulip_softc *sc = &psc->sc_tulip;
926
927 /*
928 * This isn't really a quirk-gathering device, really. We
929 * just want to get the spiffy DEC board name from the SROM.
930 */
931 strcpy(sc->sc_name, "DEC ");
932
933 if (memcmp(&sc->sc_srom[29], "DE500", 5) == 0 ||
934 memcmp(&sc->sc_srom[29], "DE450", 5) == 0)
935 memcpy(&sc->sc_name[4], &sc->sc_srom[29], 8);
936 }
937
938 void
939 tlp_pci_znyx_21040_quirks(psc, enaddr)
940 struct tulip_pci_softc *psc;
941 const u_int8_t *enaddr;
942 {
943 struct tulip_softc *sc = &psc->sc_tulip;
944 u_int16_t id = 0;
945
946 /*
947 * If we have a slaved ROM, just copy the bits from the master.
948 * This is in case we fail the ROM ID check (older boards) and
949 * need to fall back on Ethernet address model checking; that
950 * will fail for slave chips.
951 */
952 if (psc->sc_flags & TULIP_PCI_SLAVEROM) {
953 strcpy(sc->sc_name, psc->sc_master->sc_tulip.sc_name);
954 sc->sc_mediasw = psc->sc_master->sc_tulip.sc_mediasw;
955 psc->sc_flags |=
956 psc->sc_master->sc_flags & TULIP_PCI_SHAREDINTR;
957 return;
958 }
959
960 if (sc->sc_srom[32] == 0x4a && sc->sc_srom[33] == 0x52) {
961 id = sc->sc_srom[37] | (sc->sc_srom[36] << 8);
962 switch (id) {
963 zx312:
964 case 0x0602: /* ZX312 */
965 strcpy(sc->sc_name, "ZNYX ZX312");
966 return;
967
968 case 0x0622: /* ZX312T */
969 strcpy(sc->sc_name, "ZNYX ZX312T");
970 sc->sc_mediasw = &tlp_21040_tp_mediasw;
971 return;
972
973 zx314_inta:
974 case 0x0701: /* ZX314 INTA */
975 psc->sc_flags |= TULIP_PCI_SHAREDINTR;
976 /* FALLTHROUGH */
977 case 0x0711: /* ZX314 */
978 strcpy(sc->sc_name, "ZNYX ZX314");
979 psc->sc_flags |= TULIP_PCI_SHAREDROM;
980 sc->sc_mediasw = &tlp_21040_tp_mediasw;
981 return;
982
983 zx315_inta:
984 case 0x0801: /* ZX315 INTA */
985 psc->sc_flags |= TULIP_PCI_SHAREDINTR;
986 /* FALLTHROUGH */
987 case 0x0811: /* ZX315 */
988 strcpy(sc->sc_name, "ZNYX ZX315");
989 psc->sc_flags |= TULIP_PCI_SHAREDROM;
990 return;
991
992 default:
993 id = 0;
994 }
995 }
996
997 /*
998 * Deal with boards that have broken ROMs.
999 */
1000 if (id == 0) {
1001 if ((enaddr[3] & ~3) == 0xf0 && (enaddr[5] & 3) == 0x00)
1002 goto zx314_inta;
1003 if ((enaddr[3] & ~3) == 0xf4 && (enaddr[5] & 1) == 0x00)
1004 goto zx315_inta;
1005 if ((enaddr[3] & ~3) == 0xec)
1006 goto zx312;
1007 }
1008
1009 strcpy(sc->sc_name, "ZNYX ZX31x");
1010 }
1011
1012 void
1013 tlp_pci_smc_21040_quirks(psc, enaddr)
1014 struct tulip_pci_softc *psc;
1015 const u_int8_t *enaddr;
1016 {
1017 struct tulip_softc *sc = &psc->sc_tulip;
1018 u_int16_t id1, id2, ei;
1019 int auibnc = 0, utp = 0;
1020 char *cp;
1021
1022 id1 = sc->sc_srom[0x60] | (sc->sc_srom[0x61] << 8);
1023 id2 = sc->sc_srom[0x62] | (sc->sc_srom[0x63] << 8);
1024 ei = sc->sc_srom[0x66] | (sc->sc_srom[0x67] << 8);
1025
1026 strcpy(sc->sc_name, "SMC 8432");
1027 cp = &sc->sc_name[8];
1028
1029 if ((id1 & 1) == 0) {
1030 *cp++ = 'B';
1031 auibnc = 1;
1032 }
1033 if ((id1 & 0xff) > 0x32) {
1034 *cp++ = 'T';
1035 utp = 1;
1036 }
1037 if ((id1 & 0x4000) == 0) {
1038 *cp++ = 'A';
1039 auibnc = 1;
1040 }
1041 if (id2 == 0x15) {
1042 sc->sc_name[7] = '4';
1043 *cp++ = '-';
1044 *cp++ = 'C';
1045 *cp++ = 'H';
1046 *cp++ = ei ? '2' : '1';
1047 }
1048 *cp = '\0';
1049
1050 if (utp != 0 && auibnc == 0)
1051 sc->sc_mediasw = &tlp_21040_tp_mediasw;
1052 else if (utp == 0 && auibnc != 0)
1053 sc->sc_mediasw = &tlp_21040_auibnc_mediasw;
1054 }
1055
1056 void
1057 tlp_pci_cogent_21040_quirks(psc, enaddr)
1058 struct tulip_pci_softc *psc;
1059 const u_int8_t *enaddr;
1060 {
1061
1062 strcpy(psc->sc_tulip.sc_name, "Cogent multi-port");
1063 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM;
1064 }
1065
1066 void
1067 tlp_pci_accton_21040_quirks(psc, enaddr)
1068 struct tulip_pci_softc *psc;
1069 const u_int8_t *enaddr;
1070 {
1071
1072 strcpy(psc->sc_tulip.sc_name, "ACCTON EN1203");
1073 }
1074
1075 void tlp_pci_asante_21140_reset __P((struct tulip_softc *));
1076
1077 void
1078 tlp_pci_asante_21140_quirks(psc, enaddr)
1079 struct tulip_pci_softc *psc;
1080 const u_int8_t *enaddr;
1081 {
1082 struct tulip_softc *sc = &psc->sc_tulip;
1083
1084 /*
1085 * Some Asante boards don't use the ISV SROM format. For
1086 * those that don't, we initialize the GPIO direction bits,
1087 * and provide our own reset hook, which resets the MII.
1088 *
1089 * All of these boards use SIO-attached-MII media.
1090 */
1091 if (sc->sc_mediasw == &tlp_2114x_isv_mediasw)
1092 return;
1093
1094 strcpy(sc->sc_name, "Asante");
1095
1096 sc->sc_gp_dir = 0xbf;
1097 sc->sc_reset = tlp_pci_asante_21140_reset;
1098 sc->sc_mediasw = &tlp_sio_mii_mediasw;
1099 }
1100
1101 void
1102 tlp_pci_asante_21140_reset(sc)
1103 struct tulip_softc *sc;
1104 {
1105
1106 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir);
1107 TULIP_WRITE(sc, CSR_GPP, 0x8);
1108 delay(100);
1109 TULIP_WRITE(sc, CSR_GPP, 0);
1110 }
1111