if_tlp_pci.c revision 1.32 1 /* $NetBSD: if_tlp_pci.c,v 1.32 2000/01/26 16:51:11 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the NetBSD
22 * Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 * contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40 /*
41 * PCI bus front-end for the Digital Semiconductor ``Tulip'' (21x4x)
42 * Ethernet controller family driver.
43 */
44
45 #include "opt_inet.h"
46 #include "opt_ns.h"
47 #include "bpfilter.h"
48
49 #include <sys/param.h>
50 #include <sys/systm.h>
51 #include <sys/mbuf.h>
52 #include <sys/malloc.h>
53 #include <sys/kernel.h>
54 #include <sys/socket.h>
55 #include <sys/ioctl.h>
56 #include <sys/errno.h>
57 #include <sys/device.h>
58
59 #include <machine/endian.h>
60
61 #include <net/if.h>
62 #include <net/if_dl.h>
63 #include <net/if_media.h>
64 #include <net/if_ether.h>
65
66 #if NBPFILTER > 0
67 #include <net/bpf.h>
68 #endif
69
70 #ifdef INET
71 #include <netinet/in.h>
72 #include <netinet/if_inarp.h>
73 #endif
74
75 #ifdef NS
76 #include <netns/ns.h>
77 #include <netns/ns_if.h>
78 #endif
79
80 #include <machine/bus.h>
81 #include <machine/intr.h>
82
83 #include <dev/mii/miivar.h>
84 #include <dev/mii/mii_bitbang.h>
85
86 #include <dev/ic/tulipreg.h>
87 #include <dev/ic/tulipvar.h>
88
89 #include <dev/pci/pcivar.h>
90 #include <dev/pci/pcireg.h>
91 #include <dev/pci/pcidevs.h>
92
93 /*
94 * PCI configuration space registers used by the Tulip.
95 */
96 #define TULIP_PCI_IOBA 0x10 /* i/o mapped base */
97 #define TULIP_PCI_MMBA 0x14 /* memory mapped base */
98 #define TULIP_PCI_CFDA 0x40 /* configuration driver area */
99
100 #define CFDA_SLEEP 0x80000000 /* sleep mode */
101 #define CFDA_SNOOZE 0x40000000 /* snooze mode */
102
103 struct tulip_pci_softc {
104 struct tulip_softc sc_tulip; /* real Tulip softc */
105
106 /* PCI-specific goo. */
107 void *sc_ih; /* interrupt handle */
108
109 pci_chipset_tag_t sc_pc; /* our PCI chipset */
110 pcitag_t sc_pcitag; /* our PCI tag */
111
112 int sc_flags; /* flags; see below */
113
114 LIST_HEAD(, tulip_pci_softc) sc_intrslaves;
115 LIST_ENTRY(tulip_pci_softc) sc_intrq;
116
117 /* Our {ROM,interrupt} master. */
118 struct tulip_pci_softc *sc_master;
119 };
120
121 /* sc_flags */
122 #define TULIP_PCI_SHAREDINTR 0x01 /* interrupt is shared */
123 #define TULIP_PCI_SLAVEINTR 0x02 /* interrupt is slave */
124 #define TULIP_PCI_SHAREDROM 0x04 /* ROM is shared */
125 #define TULIP_PCI_SLAVEROM 0x08 /* slave of shared ROM */
126
127 int tlp_pci_match __P((struct device *, struct cfdata *, void *));
128 void tlp_pci_attach __P((struct device *, struct device *, void *));
129
130 struct cfattach tlp_pci_ca = {
131 sizeof(struct tulip_pci_softc), tlp_pci_match, tlp_pci_attach,
132 };
133
134 const struct tulip_pci_product {
135 u_int32_t tpp_vendor; /* PCI vendor ID */
136 u_int32_t tpp_product; /* PCI product ID */
137 tulip_chip_t tpp_chip; /* base Tulip chip type */
138 int tpp_pmreg; /* power management register offset */
139 } tlp_pci_products[] = {
140 #ifdef TLP_MATCH_21040
141 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21040,
142 TULIP_CHIP_21040, 0 },
143 #endif
144 #ifdef TLP_MATCH_21041
145 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21041,
146 TULIP_CHIP_21041, 0 },
147 #endif
148 #ifdef TLP_MATCH_21140
149 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21140,
150 TULIP_CHIP_21140, 0 },
151 #endif
152 #ifdef TLP_MATCH_21142
153 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142,
154 TULIP_CHIP_21142, 0xe0 },
155 #endif
156
157 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C168,
158 TULIP_CHIP_82C168, 0 },
159
160 /*
161 * Note: This is like a MX98725 with Wake-On-LAN and a
162 * 128-bit multicast hash table.
163 */
164 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C115,
165 TULIP_CHIP_82C115, 0x48 },
166
167 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98713,
168 TULIP_CHIP_MX98713, 0 },
169 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX987x5,
170 TULIP_CHIP_MX98715, 0x48 },
171
172 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100TX,
173 TULIP_CHIP_MX98713, 0 },
174
175 { PCI_VENDOR_WINBOND, PCI_PRODUCT_WINBOND_W89C840F,
176 TULIP_CHIP_WB89C840F, 0 },
177 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100ATX,
178 TULIP_CHIP_WB89C840F, 0 },
179
180 #if 0
181 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9102,
182 TULIP_CHIP_DM9102, 0 },
183 #endif
184
185 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AL981,
186 TULIP_CHIP_AL981, 0xc4 },
187
188 #if 0
189 { PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX88140A,
190 TULIP_CHIP_AX88140, 0 },
191 #endif
192
193 { 0, 0,
194 TULIP_CHIP_INVALID, 0 },
195 };
196
197 struct tlp_pci_quirks {
198 void (*tpq_func) __P((struct tulip_pci_softc *,
199 const u_int8_t *));
200 u_int8_t tpq_oui[3];
201 };
202
203 void tlp_pci_dec_quirks __P((struct tulip_pci_softc *,
204 const u_int8_t *));
205
206 void tlp_pci_znyx_21040_quirks __P((struct tulip_pci_softc *,
207 const u_int8_t *));
208 void tlp_pci_smc_21040_quirks __P((struct tulip_pci_softc *,
209 const u_int8_t *));
210 void tlp_pci_cogent_21040_quirks __P((struct tulip_pci_softc *,
211 const u_int8_t *));
212 void tlp_pci_accton_21040_quirks __P((struct tulip_pci_softc *,
213 const u_int8_t *));
214
215 void tlp_pci_cobalt_21142_quirks __P((struct tulip_pci_softc *,
216 const u_int8_t *));
217
218 const struct tlp_pci_quirks tlp_pci_21040_quirks[] = {
219 { tlp_pci_znyx_21040_quirks, { 0x00, 0xc0, 0x95 } },
220 { tlp_pci_smc_21040_quirks, { 0x00, 0x00, 0xc0 } },
221 { tlp_pci_cogent_21040_quirks, { 0x00, 0x00, 0x92 } },
222 { tlp_pci_accton_21040_quirks, { 0x00, 0x00, 0xe8 } },
223 { NULL, { 0, 0, 0 } }
224 };
225
226 const struct tlp_pci_quirks tlp_pci_21041_quirks[] = {
227 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } },
228 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } },
229 { NULL, { 0, 0, 0 } }
230 };
231
232 void tlp_pci_asante_21140_quirks __P((struct tulip_pci_softc *,
233 const u_int8_t *));
234
235 const struct tlp_pci_quirks tlp_pci_21140_quirks[] = {
236 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } },
237 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } },
238 { tlp_pci_asante_21140_quirks, { 0x00, 0x00, 0x94 } },
239 { NULL, { 0, 0, 0 } }
240 };
241
242 const struct tlp_pci_quirks tlp_pci_21142_quirks[] = {
243 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } },
244 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } },
245 { tlp_pci_cobalt_21142_quirks, { 0x00, 0x10, 0xe0 } },
246 { NULL, { 0, 0, 0 } }
247 };
248
249 /*
250 * Even more disgusting... some 21143 implementations (namely Cobalt's)
251 * which should have a 8-address-bit SROM actually only have a
252 * 6-address-bit SROM (even though it's rev 4.1!). Broken! This
253 * quirk detects that.
254 */
255 #define TPSQ_NOMATCH 0
256 #define TPSQ_CONTINUE 1
257 #define TPSQ_READ_AGAIN_AND_CONTINUE 2
258
259 typedef int (*tlp_pci_srom_quirk_t) __P((struct tulip_pci_softc *));
260
261 int tlp_pci_cobalt_21143_srom_quirks __P((struct tulip_pci_softc *));
262 int tlp_pci_21143_srom_quirks __P((struct tulip_pci_softc *));
263
264 tlp_pci_srom_quirk_t tlp_pci_21143_srom_quirks_list[] = {
265 tlp_pci_cobalt_21143_srom_quirks,
266 tlp_pci_21143_srom_quirks, /* MUST BE AT THE END */
267 };
268
269 int tlp_pci_shared_intr __P((void *));
270
271 const struct tulip_pci_product *tlp_pci_lookup
272 __P((const struct pci_attach_args *));
273 void tlp_pci_get_quirks __P((struct tulip_pci_softc *, const u_int8_t *,
274 const struct tlp_pci_quirks *));
275 void tlp_pci_check_slaved __P((struct tulip_pci_softc *, int, int));
276
277 const struct tulip_pci_product *
278 tlp_pci_lookup(pa)
279 const struct pci_attach_args *pa;
280 {
281 const struct tulip_pci_product *tpp;
282
283 for (tpp = tlp_pci_products;
284 tlp_chip_names[tpp->tpp_chip] != NULL;
285 tpp++) {
286 if (PCI_VENDOR(pa->pa_id) == tpp->tpp_vendor &&
287 PCI_PRODUCT(pa->pa_id) == tpp->tpp_product)
288 return (tpp);
289 }
290 return (NULL);
291 }
292
293 void
294 tlp_pci_get_quirks(psc, enaddr, tpq)
295 struct tulip_pci_softc *psc;
296 const u_int8_t *enaddr;
297 const struct tlp_pci_quirks *tpq;
298 {
299
300 for (; tpq->tpq_func != NULL; tpq++) {
301 if (tpq->tpq_oui[0] == enaddr[0] &&
302 tpq->tpq_oui[1] == enaddr[1] &&
303 tpq->tpq_oui[2] == enaddr[2]) {
304 (*tpq->tpq_func)(psc, enaddr);
305 return;
306 }
307 }
308 }
309
310 void
311 tlp_pci_check_slaved(psc, shared, slaved)
312 struct tulip_pci_softc *psc;
313 int shared, slaved;
314 {
315 extern struct cfdriver tlp_cd;
316 struct tulip_pci_softc *cur, *best = NULL;
317 struct tulip_softc *sc = &psc->sc_tulip;
318 int i;
319
320 /*
321 * First of all, find the lowest pcidev numbered device on our
322 * bus marked as shared. That should be our master.
323 */
324 for (i = 0; i < tlp_cd.cd_ndevs; i++) {
325 if ((cur = tlp_cd.cd_devs[i]) == NULL)
326 continue;
327 if (cur->sc_tulip.sc_dev.dv_parent != sc->sc_dev.dv_parent)
328 continue;
329 if ((cur->sc_flags & shared) == 0)
330 continue;
331 if (cur == psc)
332 continue;
333 if (best == NULL ||
334 best->sc_tulip.sc_devno > cur->sc_tulip.sc_devno)
335 best = cur;
336 }
337
338 if (best != NULL) {
339 psc->sc_master = best;
340 psc->sc_flags |= (shared | slaved);
341 }
342 }
343
344 int
345 tlp_pci_match(parent, match, aux)
346 struct device *parent;
347 struct cfdata *match;
348 void *aux;
349 {
350 struct pci_attach_args *pa = aux;
351
352 if (tlp_pci_lookup(pa) != NULL)
353 return (10); /* beat if_de.c */
354
355 return (0);
356 }
357
358 void
359 tlp_pci_attach(parent, self, aux)
360 struct device *parent, *self;
361 void *aux;
362 {
363 struct tulip_pci_softc *psc = (void *) self;
364 struct tulip_softc *sc = &psc->sc_tulip;
365 struct pci_attach_args *pa = aux;
366 pci_chipset_tag_t pc = pa->pa_pc;
367 pci_intr_handle_t ih;
368 const char *intrstr = NULL;
369 bus_space_tag_t iot, memt;
370 bus_space_handle_t ioh, memh;
371 int ioh_valid, memh_valid, i, j;
372 const struct tulip_pci_product *tpp;
373 u_int8_t enaddr[ETHER_ADDR_LEN];
374 u_int32_t val;
375 pcireg_t reg;
376
377 sc->sc_devno = pa->pa_device;
378 psc->sc_pc = pa->pa_pc;
379 psc->sc_pcitag = pa->pa_tag;
380
381 LIST_INIT(&psc->sc_intrslaves);
382
383 tpp = tlp_pci_lookup(pa);
384 if (tpp == NULL) {
385 printf("\n");
386 panic("tlp_pci_attach: impossible");
387 }
388 sc->sc_chip = tpp->tpp_chip;
389
390 /*
391 * By default, Tulip registers are 8 bytes long (4 bytes
392 * followed by a 4 byte pad).
393 */
394 sc->sc_regshift = 3;
395
396 /*
397 * Some chips have a 128 byte SROM (6 address bits), and some
398 * have a 512 byte SROM (8 address bits). Default to 6; we'll
399 * adjust below.
400 */
401 sc->sc_srom_addrbits = 6;
402
403 /*
404 * Get revision info, and set some chip-specific variables.
405 */
406 sc->sc_rev = PCI_REVISION(pa->pa_class);
407 switch (sc->sc_chip) {
408 case TULIP_CHIP_21140:
409 if (sc->sc_rev >= 0x20)
410 sc->sc_chip = TULIP_CHIP_21140A;
411 break;
412
413 case TULIP_CHIP_21142:
414 if (sc->sc_rev >= 0x20)
415 sc->sc_chip = TULIP_CHIP_21143;
416 break;
417
418 case TULIP_CHIP_82C168:
419 if (sc->sc_rev >= 0x20)
420 sc->sc_chip = TULIP_CHIP_82C169;
421 break;
422
423 case TULIP_CHIP_MX98713:
424 if (sc->sc_rev >= 0x10)
425 sc->sc_chip = TULIP_CHIP_MX98713A;
426 break;
427
428 case TULIP_CHIP_MX98715:
429 if (sc->sc_rev >= 0x20)
430 sc->sc_chip = TULIP_CHIP_MX98715A;
431 if (sc->sc_rev >= 0x30)
432 sc->sc_chip = TULIP_CHIP_MX98725;
433 break;
434
435 case TULIP_CHIP_WB89C840F:
436 sc->sc_regshift = 2;
437 break;
438
439 case TULIP_CHIP_AX88140:
440 if (sc->sc_rev >= 0x10)
441 sc->sc_chip = TULIP_CHIP_AX88141;
442 break;
443
444 default:
445 /* Nothing. */
446 }
447
448 printf(": %s Ethernet, pass %d.%d\n",
449 tlp_chip_names[sc->sc_chip],
450 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf);
451
452 switch (sc->sc_chip) {
453 case TULIP_CHIP_21040:
454 if (sc->sc_rev < 0x20) {
455 printf("%s: 21040 must be at least pass 2.0\n",
456 sc->sc_dev.dv_xname);
457 return;
458 }
459 break;
460
461 case TULIP_CHIP_21140:
462 if (sc->sc_rev < 0x11) {
463 printf("%s: 21140 must be at least pass 1.1\n",
464 sc->sc_dev.dv_xname);
465 return;
466 }
467 break;
468
469 default:
470 /* Nothing. */
471 }
472
473 /*
474 * Check to see if the device is in power-save mode, and
475 * being it out if necessary.
476 */
477 switch (sc->sc_chip) {
478 case TULIP_CHIP_21140:
479 case TULIP_CHIP_21140A:
480 case TULIP_CHIP_21142:
481 case TULIP_CHIP_21143:
482 case TULIP_CHIP_MX98713A:
483 case TULIP_CHIP_MX98715:
484 case TULIP_CHIP_MX98715A:
485 case TULIP_CHIP_MX98725:
486 /*
487 * Clear the "sleep mode" bit in the CFDA register.
488 */
489 reg = pci_conf_read(pc, pa->pa_tag, TULIP_PCI_CFDA);
490 if (reg & (CFDA_SLEEP|CFDA_SNOOZE))
491 pci_conf_write(pc, pa->pa_tag, TULIP_PCI_CFDA,
492 reg & ~(CFDA_SLEEP|CFDA_SNOOZE));
493 break;
494
495 default:
496 /* Nothing. */
497 }
498
499 if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PWRMGMT, 0, 0)) {
500 if (tpp->tpp_pmreg == 0) {
501 printf("%s: don't know location of PMCSR for this "
502 "chip\n", sc->sc_dev.dv_xname);
503 return;
504 }
505 reg = pci_conf_read(pc, pa->pa_tag, tpp->tpp_pmreg) & 0x3;
506 if (reg == 3) {
507 /*
508 * The card has lost all configuration data in
509 * this state, so punt.
510 */
511 printf("%s: unable to wake up from power state D3\n",
512 sc->sc_dev.dv_xname);
513 return;
514 }
515 if (reg != 0) {
516 printf("%s: waking up from power state D%d\n",
517 sc->sc_dev.dv_xname, reg);
518 pci_conf_write(pc, pa->pa_tag, tpp->tpp_pmreg, 0);
519 }
520 }
521
522 /*
523 * Map the device.
524 */
525 ioh_valid = (pci_mapreg_map(pa, TULIP_PCI_IOBA,
526 PCI_MAPREG_TYPE_IO, 0,
527 &iot, &ioh, NULL, NULL) == 0);
528 memh_valid = (pci_mapreg_map(pa, TULIP_PCI_MMBA,
529 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0,
530 &memt, &memh, NULL, NULL) == 0);
531
532 if (memh_valid) {
533 sc->sc_st = memt;
534 sc->sc_sh = memh;
535 } else if (ioh_valid) {
536 sc->sc_st = iot;
537 sc->sc_sh = ioh;
538 } else {
539 printf(": unable to map device registers\n");
540 return;
541 }
542
543 sc->sc_dmat = pa->pa_dmat;
544
545 /*
546 * Make sure bus mastering is enabled.
547 */
548 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
549 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) |
550 PCI_COMMAND_MASTER_ENABLE);
551
552 /*
553 * Get the cacheline size.
554 */
555 sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag,
556 PCI_BHLC_REG));
557
558 /*
559 * Get PCI data moving command info.
560 */
561 if (pa->pa_flags & PCI_FLAGS_MRL_OKAY)
562 sc->sc_flags |= TULIPF_MRL;
563 if (pa->pa_flags & PCI_FLAGS_MRM_OKAY)
564 sc->sc_flags |= TULIPF_MRM;
565 if (pa->pa_flags & PCI_FLAGS_MWI_OKAY)
566 sc->sc_flags |= TULIPF_MWI;
567
568 /*
569 * Read the contents of the Ethernet Address ROM/SROM.
570 */
571 read_srom_again:
572 memset(sc->sc_srom, 0, sizeof(sc->sc_srom));
573 switch (sc->sc_chip) {
574 case TULIP_CHIP_21040:
575 TULIP_WRITE(sc, CSR_MIIROM, MIIROM_SROMCS);
576 for (i = 0; i < TULIP_ROM_SIZE(sc->sc_srom_addrbits); i++) {
577 for (j = 0; j < 10000; j++) {
578 val = TULIP_READ(sc, CSR_MIIROM);
579 if ((val & MIIROM_DN) == 0)
580 break;
581 }
582 sc->sc_srom[i] = val & MIIROM_DATA;
583 }
584 break;
585
586 case TULIP_CHIP_82C168:
587 case TULIP_CHIP_82C169:
588 {
589 u_int16_t *rombuf = (u_int16_t *)sc->sc_srom;
590
591 /*
592 * The Lite-On PNIC stores the Ethernet address in
593 * the first 3 words of the EEPROM. EEPROM access
594 * is not like the other Tulip chips.
595 */
596 for (i = 0; i < 3; i++) {
597 TULIP_WRITE(sc, CSR_PNIC_SROMCTL,
598 PNIC_SROMCTL_READ | i);
599 for (j = 0; j < 500; j++) {
600 delay(2);
601 val = TULIP_READ(sc, CSR_MIIROM);
602 if ((val & PNIC_MIIROM_BUSY) == 0)
603 break;
604 }
605 if (val & PNIC_MIIROM_BUSY) {
606 printf("%s: EEPROM timed out\n",
607 sc->sc_dev.dv_xname);
608 return;
609 }
610 rombuf[i] = bswap16(val & PNIC_MIIROM_DATA);
611 }
612 break;
613 }
614
615 default:
616 tlp_read_srom(sc, 0, TULIP_ROM_SIZE(sc->sc_srom_addrbits) >> 1,
617 sc->sc_srom);
618 #if 0
619 printf("SROM CONTENTS:");
620 for (i = 0; i < TULIP_ROM_SIZE(sc->sc_srom_addrbits); i++) {
621 if ((i % 8) == 0)
622 printf("\n\t");
623 printf("0x%02x ", sc->sc_srom[i]);
624 }
625 printf("\n");
626 #endif
627 }
628
629 /*
630 * Deal with chip/board quirks. This includes setting up
631 * the mediasw, and extracting the Ethernet address from
632 * the rombuf.
633 */
634 switch (sc->sc_chip) {
635 case TULIP_CHIP_21040:
636 /* Check for a slaved ROM on a multi-port board. */
637 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDROM,
638 TULIP_PCI_SLAVEROM);
639 if (psc->sc_flags & TULIP_PCI_SLAVEROM)
640 memcpy(sc->sc_srom, psc->sc_master->sc_tulip.sc_srom,
641 sizeof(sc->sc_srom));
642
643 /*
644 * Parse the Ethernet Address ROM.
645 */
646 if (tlp_parse_old_srom(sc, enaddr) == 0) {
647 printf("%s: unable to decode Ethernet Address ROM\n",
648 sc->sc_dev.dv_xname);
649 return;
650 }
651
652 /*
653 * If we have a slaved ROM, adjust the Ethernet address.
654 */
655 if (psc->sc_flags & TULIP_PCI_SLAVEROM)
656 enaddr[5] +=
657 sc->sc_devno - psc->sc_master->sc_tulip.sc_devno;
658
659 /*
660 * All 21040 boards start out with the same
661 * media switch.
662 */
663 sc->sc_mediasw = &tlp_21040_mediasw;
664
665 /*
666 * Deal with any quirks this board might have.
667 */
668 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21040_quirks);
669 break;
670
671 case TULIP_CHIP_21041:
672 /* Check for a slaved ROM on a multi-port board. */
673 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDROM,
674 TULIP_PCI_SLAVEROM);
675 if (psc->sc_flags & TULIP_PCI_SLAVEROM)
676 memcpy(sc->sc_srom, psc->sc_master->sc_tulip.sc_srom,
677 sizeof(sc->sc_srom));
678
679 /* Check for new format SROM. */
680 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) {
681 /*
682 * Not an ISV SROM; try the old DEC Ethernet Address
683 * ROM format.
684 */
685 if (tlp_parse_old_srom(sc, enaddr) == 0) {
686 printf("%s: unable to decode Ethernet "
687 "Address ROM\n", sc->sc_dev.dv_xname);
688 return;
689 }
690 }
691
692 /*
693 * All 21041 boards use the same media switch; they all
694 * work basically the same! Yippee!
695 */
696 sc->sc_mediasw = &tlp_21041_mediasw;
697
698 /*
699 * Deal with any quirks this board might have.
700 */
701 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21041_quirks);
702 break;
703
704 case TULIP_CHIP_21140:
705 case TULIP_CHIP_21140A:
706 /* Check for new format SROM. */
707 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) {
708 /*
709 * Not an ISV SROM; try the old DEC Ethernet Address
710 * ROM format.
711 */
712 if (tlp_parse_old_srom(sc, enaddr) == 0) {
713 printf("%s: unable to decode Ethernet "
714 "Address ROM\n", sc->sc_dev.dv_xname);
715 return;
716 }
717 } else {
718 /*
719 * We start out with the 2114x ISV media switch.
720 * When we search for quirks, we may change to
721 * a different switch.
722 */
723 sc->sc_mediasw = &tlp_2114x_isv_mediasw;
724 }
725
726 /*
727 * Deal with any quirks this board might have.
728 */
729 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21140_quirks);
730
731 /*
732 * Bail out now if we can't deal with this board.
733 */
734 if (sc->sc_mediasw == NULL)
735 goto cant_cope;
736 break;
737
738 case TULIP_CHIP_21142:
739 case TULIP_CHIP_21143:
740 /* Check for new format SROM. */
741 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) {
742 if (sc->sc_chip == TULIP_CHIP_21143) {
743 tlp_pci_srom_quirk_t q;
744
745 /*
746 * Check for SROM quirkiness.
747 */
748 for (i = 0; sc->sc_srom_addrbits != 8; i++) {
749 q = tlp_pci_21143_srom_quirks_list[i];
750 switch ((*q)(psc)) {
751 case TPSQ_NOMATCH:
752 continue;
753
754 case TPSQ_CONTINUE:
755 break;
756
757 case TPSQ_READ_AGAIN_AND_CONTINUE:
758 goto read_srom_again;
759 }
760 break; /* for TPSQ_CONTINUE */
761 }
762 }
763
764 /*
765 * Not an ISV SROM; try the old DEC Ethernet Address
766 * ROM format.
767 */
768 if (tlp_parse_old_srom(sc, enaddr) == 0) {
769 printf("%s: unable to decode Ethernet "
770 "Address ROM\n", sc->sc_dev.dv_xname);
771 return;
772 }
773 } else {
774 /*
775 * We start out with the 2114x ISV media switch.
776 * When we search for quirks, we may change to
777 * a different switch.
778 */
779 sc->sc_mediasw = &tlp_2114x_isv_mediasw;
780 }
781
782 /*
783 * Deal with any quirks this board might have.
784 */
785 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21142_quirks);
786
787 /*
788 * Bail out now if we can't deal with this board.
789 */
790 if (sc->sc_mediasw == NULL)
791 goto cant_cope;
792 break;
793
794 case TULIP_CHIP_82C168:
795 case TULIP_CHIP_82C169:
796 /*
797 * Lite-On PNIC's Ethernet address is the first 6
798 * bytes of its EEPROM.
799 */
800 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN);
801
802 /*
803 * Lite-On PNICs always use the same mediasw; we
804 * select MII vs. internal NWAY automatically.
805 */
806 sc->sc_mediasw = &tlp_pnic_mediasw;
807 break;
808
809 case TULIP_CHIP_MX98713:
810 /*
811 * The Macronix MX98713 has an MII and GPIO, but no
812 * internal Nway block. This chip is basically a
813 * perfect 21140A clone, with the exception of the
814 * a magic register frobbing in order to make the
815 * interface function.
816 */
817 if (tlp_isv_srom_enaddr(sc, enaddr)) {
818 sc->sc_mediasw = &tlp_2114x_isv_mediasw;
819 break;
820 }
821 /* FALLTHROUGH */
822
823 case TULIP_CHIP_82C115:
824 /*
825 * Yippee! The Lite-On 82C115 is a clone of
826 * the MX98725 (the data sheet even says `MXIC'
827 * on it)! Imagine that, a clone of a clone.
828 *
829 * The differences are really minimal:
830 *
831 * - Wake-On-LAN support
832 * - 128-bit multicast hash table, rather than
833 * the standard 512-bit hash table
834 */
835 /* FALLTHROUGH */
836
837 case TULIP_CHIP_MX98713A:
838 case TULIP_CHIP_MX98715A:
839 case TULIP_CHIP_MX98725:
840 /*
841 * The MX98713A has an MII as well as an internal Nway block,
842 * but no GPIO. The MX98715 and MX98725 have an internal
843 * Nway block only.
844 *
845 * The internal Nway block, unlike the Lite-On PNIC's, does
846 * just that - performs Nway. Once autonegotiation completes,
847 * we must program the GPR media information into the chip.
848 *
849 * The byte offset of the Ethernet address is stored at
850 * offset 0x70.
851 */
852 memcpy(enaddr, &sc->sc_srom[sc->sc_srom[0x70]], ETHER_ADDR_LEN);
853 sc->sc_mediasw = &tlp_pmac_mediasw;
854 break;
855
856 case TULIP_CHIP_WB89C840F:
857 /*
858 * Winbond 89C840F's Ethernet address is the first
859 * 6 bytes of its EEPROM.
860 */
861 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN);
862
863 /*
864 * Winbond 89C840F has an MII attached to the SIO.
865 */
866 sc->sc_mediasw = &tlp_sio_mii_mediasw;
867 break;
868
869 case TULIP_CHIP_AL981:
870 /*
871 * The ADMtek AL981's Ethernet address is located
872 * at offset 8 of its EEPROM.
873 */
874 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN);
875
876 /*
877 * ADMtek AL981 has a built-in PHY accessed through
878 * special registers.
879 */
880 sc->sc_mediasw = &tlp_al981_mediasw;
881 break;
882
883 default:
884 cant_cope:
885 printf("%s: sorry, unable to handle your board\n",
886 sc->sc_dev.dv_xname);
887 return;
888 }
889
890 /*
891 * Handle shared interrupts.
892 */
893 if (psc->sc_flags & TULIP_PCI_SHAREDINTR) {
894 if (psc->sc_master)
895 psc->sc_flags |= TULIP_PCI_SLAVEINTR;
896 else {
897 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDINTR,
898 TULIP_PCI_SLAVEINTR);
899 if (psc->sc_master == NULL)
900 psc->sc_master = psc;
901 }
902 LIST_INSERT_HEAD(&psc->sc_master->sc_intrslaves,
903 psc, sc_intrq);
904 }
905
906 if (psc->sc_flags & TULIP_PCI_SLAVEINTR) {
907 printf("%s: sharing interrupt with %s\n",
908 sc->sc_dev.dv_xname,
909 psc->sc_master->sc_tulip.sc_dev.dv_xname);
910 } else {
911 /*
912 * Map and establish our interrupt.
913 */
914 if (pci_intr_map(pc, pa->pa_intrtag, pa->pa_intrpin,
915 pa->pa_intrline, &ih)) {
916 printf("%s: unable to map interrupt\n",
917 sc->sc_dev.dv_xname);
918 return;
919 }
920 intrstr = pci_intr_string(pc, ih);
921 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET,
922 (psc->sc_flags & TULIP_PCI_SHAREDINTR) ?
923 tlp_pci_shared_intr : tlp_intr, sc);
924 if (psc->sc_ih == NULL) {
925 printf("%s: unable to establish interrupt",
926 sc->sc_dev.dv_xname);
927 if (intrstr != NULL)
928 printf(" at %s", intrstr);
929 printf("\n");
930 return;
931 }
932 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname,
933 intrstr);
934 }
935
936 /*
937 * Finish off the attach.
938 */
939 tlp_attach(sc, enaddr);
940 }
941
942 int
943 tlp_pci_shared_intr(arg)
944 void *arg;
945 {
946 struct tulip_pci_softc *master = arg, *slave;
947 int rv = 0;
948
949 for (slave = LIST_FIRST(&master->sc_intrslaves);
950 slave != NULL;
951 slave = LIST_NEXT(slave, sc_intrq))
952 rv |= tlp_intr(&slave->sc_tulip);
953
954 return (rv);
955 }
956
957 void
958 tlp_pci_dec_quirks(psc, enaddr)
959 struct tulip_pci_softc *psc;
960 const u_int8_t *enaddr;
961 {
962 struct tulip_softc *sc = &psc->sc_tulip;
963
964 /*
965 * This isn't really a quirk-gathering device, really. We
966 * just want to get the spiffy DEC board name from the SROM.
967 */
968 strcpy(sc->sc_name, "DEC ");
969
970 if (memcmp(&sc->sc_srom[29], "DE500", 5) == 0 ||
971 memcmp(&sc->sc_srom[29], "DE450", 5) == 0)
972 memcpy(&sc->sc_name[4], &sc->sc_srom[29], 8);
973 }
974
975 void
976 tlp_pci_znyx_21040_quirks(psc, enaddr)
977 struct tulip_pci_softc *psc;
978 const u_int8_t *enaddr;
979 {
980 struct tulip_softc *sc = &psc->sc_tulip;
981 u_int16_t id = 0;
982
983 /*
984 * If we have a slaved ROM, just copy the bits from the master.
985 * This is in case we fail the ROM ID check (older boards) and
986 * need to fall back on Ethernet address model checking; that
987 * will fail for slave chips.
988 */
989 if (psc->sc_flags & TULIP_PCI_SLAVEROM) {
990 strcpy(sc->sc_name, psc->sc_master->sc_tulip.sc_name);
991 sc->sc_mediasw = psc->sc_master->sc_tulip.sc_mediasw;
992 psc->sc_flags |=
993 psc->sc_master->sc_flags & TULIP_PCI_SHAREDINTR;
994 return;
995 }
996
997 if (sc->sc_srom[32] == 0x4a && sc->sc_srom[33] == 0x52) {
998 id = sc->sc_srom[37] | (sc->sc_srom[36] << 8);
999 switch (id) {
1000 zx312:
1001 case 0x0602: /* ZX312 */
1002 strcpy(sc->sc_name, "ZNYX ZX312");
1003 return;
1004
1005 case 0x0622: /* ZX312T */
1006 strcpy(sc->sc_name, "ZNYX ZX312T");
1007 sc->sc_mediasw = &tlp_21040_tp_mediasw;
1008 return;
1009
1010 zx314_inta:
1011 case 0x0701: /* ZX314 INTA */
1012 psc->sc_flags |= TULIP_PCI_SHAREDINTR;
1013 /* FALLTHROUGH */
1014 case 0x0711: /* ZX314 */
1015 strcpy(sc->sc_name, "ZNYX ZX314");
1016 psc->sc_flags |= TULIP_PCI_SHAREDROM;
1017 sc->sc_mediasw = &tlp_21040_tp_mediasw;
1018 return;
1019
1020 zx315_inta:
1021 case 0x0801: /* ZX315 INTA */
1022 psc->sc_flags |= TULIP_PCI_SHAREDINTR;
1023 /* FALLTHROUGH */
1024 case 0x0811: /* ZX315 */
1025 strcpy(sc->sc_name, "ZNYX ZX315");
1026 psc->sc_flags |= TULIP_PCI_SHAREDROM;
1027 return;
1028
1029 default:
1030 id = 0;
1031 }
1032 }
1033
1034 /*
1035 * Deal with boards that have broken ROMs.
1036 */
1037 if (id == 0) {
1038 if ((enaddr[3] & ~3) == 0xf0 && (enaddr[5] & 3) == 0x00)
1039 goto zx314_inta;
1040 if ((enaddr[3] & ~3) == 0xf4 && (enaddr[5] & 1) == 0x00)
1041 goto zx315_inta;
1042 if ((enaddr[3] & ~3) == 0xec)
1043 goto zx312;
1044 }
1045
1046 strcpy(sc->sc_name, "ZNYX ZX31x");
1047 }
1048
1049 void
1050 tlp_pci_smc_21040_quirks(psc, enaddr)
1051 struct tulip_pci_softc *psc;
1052 const u_int8_t *enaddr;
1053 {
1054 struct tulip_softc *sc = &psc->sc_tulip;
1055 u_int16_t id1, id2, ei;
1056 int auibnc = 0, utp = 0;
1057 char *cp;
1058
1059 id1 = sc->sc_srom[0x60] | (sc->sc_srom[0x61] << 8);
1060 id2 = sc->sc_srom[0x62] | (sc->sc_srom[0x63] << 8);
1061 ei = sc->sc_srom[0x66] | (sc->sc_srom[0x67] << 8);
1062
1063 strcpy(sc->sc_name, "SMC 8432");
1064 cp = &sc->sc_name[8];
1065
1066 if ((id1 & 1) == 0) {
1067 *cp++ = 'B';
1068 auibnc = 1;
1069 }
1070 if ((id1 & 0xff) > 0x32) {
1071 *cp++ = 'T';
1072 utp = 1;
1073 }
1074 if ((id1 & 0x4000) == 0) {
1075 *cp++ = 'A';
1076 auibnc = 1;
1077 }
1078 if (id2 == 0x15) {
1079 sc->sc_name[7] = '4';
1080 *cp++ = '-';
1081 *cp++ = 'C';
1082 *cp++ = 'H';
1083 *cp++ = ei ? '2' : '1';
1084 }
1085 *cp = '\0';
1086
1087 if (utp != 0 && auibnc == 0)
1088 sc->sc_mediasw = &tlp_21040_tp_mediasw;
1089 else if (utp == 0 && auibnc != 0)
1090 sc->sc_mediasw = &tlp_21040_auibnc_mediasw;
1091 }
1092
1093 void
1094 tlp_pci_cogent_21040_quirks(psc, enaddr)
1095 struct tulip_pci_softc *psc;
1096 const u_int8_t *enaddr;
1097 {
1098
1099 strcpy(psc->sc_tulip.sc_name, "Cogent multi-port");
1100 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM;
1101 }
1102
1103 void
1104 tlp_pci_accton_21040_quirks(psc, enaddr)
1105 struct tulip_pci_softc *psc;
1106 const u_int8_t *enaddr;
1107 {
1108
1109 strcpy(psc->sc_tulip.sc_name, "ACCTON EN1203");
1110 }
1111
1112 void tlp_pci_asante_21140_reset __P((struct tulip_softc *));
1113
1114 void
1115 tlp_pci_asante_21140_quirks(psc, enaddr)
1116 struct tulip_pci_softc *psc;
1117 const u_int8_t *enaddr;
1118 {
1119 struct tulip_softc *sc = &psc->sc_tulip;
1120
1121 /*
1122 * Some Asante boards don't use the ISV SROM format. For
1123 * those that don't, we initialize the GPIO direction bits,
1124 * and provide our own reset hook, which resets the MII.
1125 *
1126 * All of these boards use SIO-attached-MII media.
1127 */
1128 if (sc->sc_mediasw == &tlp_2114x_isv_mediasw)
1129 return;
1130
1131 strcpy(sc->sc_name, "Asante");
1132
1133 sc->sc_gp_dir = 0xbf;
1134 sc->sc_reset = tlp_pci_asante_21140_reset;
1135 sc->sc_mediasw = &tlp_sio_mii_mediasw;
1136 }
1137
1138 void
1139 tlp_pci_asante_21140_reset(sc)
1140 struct tulip_softc *sc;
1141 {
1142
1143 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir);
1144 TULIP_WRITE(sc, CSR_GPP, 0x8);
1145 delay(100);
1146 TULIP_WRITE(sc, CSR_GPP, 0);
1147 }
1148
1149 void
1150 tlp_pci_cobalt_21142_quirks(psc, enaddr)
1151 struct tulip_pci_softc *psc;
1152 const u_int8_t *enaddr;
1153 {
1154 struct tulip_softc *sc = &psc->sc_tulip;
1155
1156 /*
1157 * Cobalt Networks interfaces are just MII-on-SIO.
1158 */
1159 sc->sc_mediasw = &tlp_sio_mii_mediasw;
1160 }
1161
1162 int
1163 tlp_pci_cobalt_21143_srom_quirks(psc)
1164 struct tulip_pci_softc *psc;
1165 {
1166 struct tulip_softc *sc = &psc->sc_tulip;
1167
1168 /*
1169 * Check for broken Cobalt interface; pass 4.1 Tulip with
1170 * only 6-bit SROM and Ethernet address in first 6 bytes.
1171 */
1172 if (sc->sc_srom[0] == 0x00 &&
1173 sc->sc_srom[1] == 0x10 &&
1174 sc->sc_srom[2] == 0xe0)
1175 return (TPSQ_CONTINUE);
1176
1177 return (TPSQ_NOMATCH);
1178 }
1179
1180 int
1181 tlp_pci_21143_srom_quirks(psc)
1182 struct tulip_pci_softc *psc;
1183 {
1184 struct tulip_softc *sc = &psc->sc_tulip;
1185
1186 /*
1187 * Pass 4.1 21143s are supposed to have an 8-address-bit SROM.
1188 * We need to read them again.
1189 */
1190 if (sc->sc_rev >= 0x41) {
1191 sc->sc_srom_addrbits = 8;
1192 return (TPSQ_READ_AGAIN_AND_CONTINUE);
1193 }
1194
1195 /*
1196 * ...otherwise, what we read is just fine.
1197 */
1198 return (TPSQ_CONTINUE);
1199 }
1200