if_tlp_pci.c revision 1.45 1 /* $NetBSD: if_tlp_pci.c,v 1.45 2000/07/17 18:12:00 tron Exp $ */
2
3 /*-
4 * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the NetBSD
22 * Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 * contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40 /*
41 * PCI bus front-end for the Digital Semiconductor ``Tulip'' (21x4x)
42 * Ethernet controller family driver.
43 */
44
45 #include "opt_inet.h"
46 #include "opt_ns.h"
47 #include "bpfilter.h"
48 #include "opt_tlp.h"
49
50 #include <sys/param.h>
51 #include <sys/systm.h>
52 #include <sys/mbuf.h>
53 #include <sys/malloc.h>
54 #include <sys/kernel.h>
55 #include <sys/socket.h>
56 #include <sys/ioctl.h>
57 #include <sys/errno.h>
58 #include <sys/device.h>
59
60 #include <machine/endian.h>
61
62 #include <net/if.h>
63 #include <net/if_dl.h>
64 #include <net/if_media.h>
65 #include <net/if_ether.h>
66
67 #if NBPFILTER > 0
68 #include <net/bpf.h>
69 #endif
70
71 #ifdef INET
72 #include <netinet/in.h>
73 #include <netinet/if_inarp.h>
74 #endif
75
76 #ifdef NS
77 #include <netns/ns.h>
78 #include <netns/ns_if.h>
79 #endif
80
81 #include <machine/bus.h>
82 #include <machine/intr.h>
83
84 #include <dev/mii/miivar.h>
85 #include <dev/mii/mii_bitbang.h>
86
87 #include <dev/ic/tulipreg.h>
88 #include <dev/ic/tulipvar.h>
89
90 #include <dev/pci/pcivar.h>
91 #include <dev/pci/pcireg.h>
92 #include <dev/pci/pcidevs.h>
93
94 /*
95 * PCI configuration space registers used by the Tulip.
96 */
97 #define TULIP_PCI_IOBA 0x10 /* i/o mapped base */
98 #define TULIP_PCI_MMBA 0x14 /* memory mapped base */
99 #define TULIP_PCI_CFDA 0x40 /* configuration driver area */
100
101 #define CFDA_SLEEP 0x80000000 /* sleep mode */
102 #define CFDA_SNOOZE 0x40000000 /* snooze mode */
103
104 struct tulip_pci_softc {
105 struct tulip_softc sc_tulip; /* real Tulip softc */
106
107 /* PCI-specific goo. */
108 void *sc_ih; /* interrupt handle */
109
110 pci_chipset_tag_t sc_pc; /* our PCI chipset */
111 pcitag_t sc_pcitag; /* our PCI tag */
112
113 int sc_flags; /* flags; see below */
114
115 LIST_HEAD(, tulip_pci_softc) sc_intrslaves;
116 LIST_ENTRY(tulip_pci_softc) sc_intrq;
117
118 /* Our {ROM,interrupt} master. */
119 struct tulip_pci_softc *sc_master;
120 };
121
122 /* sc_flags */
123 #define TULIP_PCI_SHAREDINTR 0x01 /* interrupt is shared */
124 #define TULIP_PCI_SLAVEINTR 0x02 /* interrupt is slave */
125 #define TULIP_PCI_SHAREDROM 0x04 /* ROM is shared */
126 #define TULIP_PCI_SLAVEROM 0x08 /* slave of shared ROM */
127
128 int tlp_pci_match __P((struct device *, struct cfdata *, void *));
129 void tlp_pci_attach __P((struct device *, struct device *, void *));
130
131 struct cfattach tlp_pci_ca = {
132 sizeof(struct tulip_pci_softc), tlp_pci_match, tlp_pci_attach,
133 };
134
135 const struct tulip_pci_product {
136 u_int32_t tpp_vendor; /* PCI vendor ID */
137 u_int32_t tpp_product; /* PCI product ID */
138 tulip_chip_t tpp_chip; /* base Tulip chip type */
139 } tlp_pci_products[] = {
140 #ifdef TLP_MATCH_21040
141 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21040,
142 TULIP_CHIP_21040 },
143 #endif
144 #ifdef TLP_MATCH_21041
145 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21041,
146 TULIP_CHIP_21041 },
147 #endif
148 #ifdef TLP_MATCH_21140
149 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21140,
150 TULIP_CHIP_21140 },
151 #endif
152 #ifdef TLP_MATCH_21142
153 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142,
154 TULIP_CHIP_21142 },
155 #endif
156
157 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C168,
158 TULIP_CHIP_82C168 },
159
160 /*
161 * Note: This is like a MX98725 with Wake-On-LAN and a
162 * 128-bit multicast hash table.
163 */
164 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C115,
165 TULIP_CHIP_82C115 },
166
167 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98713,
168 TULIP_CHIP_MX98713 },
169 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX987x5,
170 TULIP_CHIP_MX98715 },
171
172 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100TX,
173 TULIP_CHIP_MX98713 },
174
175 { PCI_VENDOR_WINBOND, PCI_PRODUCT_WINBOND_W89C840F,
176 TULIP_CHIP_WB89C840F },
177 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100ATX,
178 TULIP_CHIP_WB89C840F },
179
180 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9102,
181 TULIP_CHIP_DM9102 },
182
183 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AL981,
184 TULIP_CHIP_AL981 },
185
186 #if 0
187 { PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX88140A,
188 TULIP_CHIP_AX88140 },
189 #endif
190
191 { 0, 0,
192 TULIP_CHIP_INVALID },
193 };
194
195 struct tlp_pci_quirks {
196 void (*tpq_func) __P((struct tulip_pci_softc *,
197 const u_int8_t *));
198 u_int8_t tpq_oui[3];
199 };
200
201 void tlp_pci_dec_quirks __P((struct tulip_pci_softc *,
202 const u_int8_t *));
203
204 void tlp_pci_znyx_21040_quirks __P((struct tulip_pci_softc *,
205 const u_int8_t *));
206 void tlp_pci_smc_21040_quirks __P((struct tulip_pci_softc *,
207 const u_int8_t *));
208 void tlp_pci_cogent_21040_quirks __P((struct tulip_pci_softc *,
209 const u_int8_t *));
210 void tlp_pci_accton_21040_quirks __P((struct tulip_pci_softc *,
211 const u_int8_t *));
212
213 void tlp_pci_cobalt_21142_quirks __P((struct tulip_pci_softc *,
214 const u_int8_t *));
215
216 const struct tlp_pci_quirks tlp_pci_21040_quirks[] = {
217 { tlp_pci_znyx_21040_quirks, { 0x00, 0xc0, 0x95 } },
218 { tlp_pci_smc_21040_quirks, { 0x00, 0x00, 0xc0 } },
219 { tlp_pci_cogent_21040_quirks, { 0x00, 0x00, 0x92 } },
220 { tlp_pci_accton_21040_quirks, { 0x00, 0x00, 0xe8 } },
221 { NULL, { 0, 0, 0 } }
222 };
223
224 const struct tlp_pci_quirks tlp_pci_21041_quirks[] = {
225 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } },
226 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } },
227 { NULL, { 0, 0, 0 } }
228 };
229
230 void tlp_pci_asante_21140_quirks __P((struct tulip_pci_softc *,
231 const u_int8_t *));
232
233 const struct tlp_pci_quirks tlp_pci_21140_quirks[] = {
234 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } },
235 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } },
236 { tlp_pci_asante_21140_quirks, { 0x00, 0x00, 0x94 } },
237 { NULL, { 0, 0, 0 } }
238 };
239
240 const struct tlp_pci_quirks tlp_pci_21142_quirks[] = {
241 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } },
242 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } },
243 { tlp_pci_cobalt_21142_quirks, { 0x00, 0x10, 0xe0 } },
244 { NULL, { 0, 0, 0 } }
245 };
246
247 int tlp_pci_shared_intr __P((void *));
248
249 const struct tulip_pci_product *tlp_pci_lookup
250 __P((const struct pci_attach_args *));
251 void tlp_pci_get_quirks __P((struct tulip_pci_softc *, const u_int8_t *,
252 const struct tlp_pci_quirks *));
253 void tlp_pci_check_slaved __P((struct tulip_pci_softc *, int, int));
254
255 const struct tulip_pci_product *
256 tlp_pci_lookup(pa)
257 const struct pci_attach_args *pa;
258 {
259 const struct tulip_pci_product *tpp;
260
261 for (tpp = tlp_pci_products;
262 tlp_chip_names[tpp->tpp_chip] != NULL;
263 tpp++) {
264 if (PCI_VENDOR(pa->pa_id) == tpp->tpp_vendor &&
265 PCI_PRODUCT(pa->pa_id) == tpp->tpp_product)
266 return (tpp);
267 }
268 return (NULL);
269 }
270
271 void
272 tlp_pci_get_quirks(psc, enaddr, tpq)
273 struct tulip_pci_softc *psc;
274 const u_int8_t *enaddr;
275 const struct tlp_pci_quirks *tpq;
276 {
277
278 for (; tpq->tpq_func != NULL; tpq++) {
279 if (tpq->tpq_oui[0] == enaddr[0] &&
280 tpq->tpq_oui[1] == enaddr[1] &&
281 tpq->tpq_oui[2] == enaddr[2]) {
282 (*tpq->tpq_func)(psc, enaddr);
283 return;
284 }
285 }
286 }
287
288 void
289 tlp_pci_check_slaved(psc, shared, slaved)
290 struct tulip_pci_softc *psc;
291 int shared, slaved;
292 {
293 extern struct cfdriver tlp_cd;
294 struct tulip_pci_softc *cur, *best = NULL;
295 struct tulip_softc *sc = &psc->sc_tulip;
296 int i;
297
298 /*
299 * First of all, find the lowest pcidev numbered device on our
300 * bus marked as shared. That should be our master.
301 */
302 for (i = 0; i < tlp_cd.cd_ndevs; i++) {
303 if ((cur = tlp_cd.cd_devs[i]) == NULL)
304 continue;
305 if (cur->sc_tulip.sc_dev.dv_parent != sc->sc_dev.dv_parent)
306 continue;
307 if ((cur->sc_flags & shared) == 0)
308 continue;
309 if (cur == psc)
310 continue;
311 if (best == NULL ||
312 best->sc_tulip.sc_devno > cur->sc_tulip.sc_devno)
313 best = cur;
314 }
315
316 if (best != NULL) {
317 psc->sc_master = best;
318 psc->sc_flags |= (shared | slaved);
319 }
320 }
321
322 int
323 tlp_pci_match(parent, match, aux)
324 struct device *parent;
325 struct cfdata *match;
326 void *aux;
327 {
328 struct pci_attach_args *pa = aux;
329
330 if (tlp_pci_lookup(pa) != NULL)
331 return (10); /* beat if_de.c */
332
333 return (0);
334 }
335
336 void
337 tlp_pci_attach(parent, self, aux)
338 struct device *parent, *self;
339 void *aux;
340 {
341 struct tulip_pci_softc *psc = (void *) self;
342 struct tulip_softc *sc = &psc->sc_tulip;
343 struct pci_attach_args *pa = aux;
344 pci_chipset_tag_t pc = pa->pa_pc;
345 pci_intr_handle_t ih;
346 const char *intrstr = NULL;
347 bus_space_tag_t iot, memt;
348 bus_space_handle_t ioh, memh;
349 int ioh_valid, memh_valid, i, j;
350 const struct tulip_pci_product *tpp;
351 u_int8_t enaddr[ETHER_ADDR_LEN];
352 u_int32_t val;
353 pcireg_t reg;
354 int pmreg;
355
356 sc->sc_devno = pa->pa_device;
357 psc->sc_pc = pa->pa_pc;
358 psc->sc_pcitag = pa->pa_tag;
359
360 LIST_INIT(&psc->sc_intrslaves);
361
362 tpp = tlp_pci_lookup(pa);
363 if (tpp == NULL) {
364 printf("\n");
365 panic("tlp_pci_attach: impossible");
366 }
367 sc->sc_chip = tpp->tpp_chip;
368
369 /*
370 * By default, Tulip registers are 8 bytes long (4 bytes
371 * followed by a 4 byte pad).
372 */
373 sc->sc_regshift = 3;
374
375 /*
376 * No power management hooks.
377 * XXX Maybe we should add some!
378 */
379 sc->sc_flags |= TULIPF_ENABLED;
380
381 /*
382 * Get revision info, and set some chip-specific variables.
383 */
384 sc->sc_rev = PCI_REVISION(pa->pa_class);
385 switch (sc->sc_chip) {
386 case TULIP_CHIP_21140:
387 if (sc->sc_rev >= 0x20)
388 sc->sc_chip = TULIP_CHIP_21140A;
389 break;
390
391 case TULIP_CHIP_21142:
392 if (sc->sc_rev >= 0x20)
393 sc->sc_chip = TULIP_CHIP_21143;
394 break;
395
396 case TULIP_CHIP_82C168:
397 if (sc->sc_rev >= 0x20)
398 sc->sc_chip = TULIP_CHIP_82C169;
399 break;
400
401 case TULIP_CHIP_MX98713:
402 if (sc->sc_rev >= 0x10)
403 sc->sc_chip = TULIP_CHIP_MX98713A;
404 break;
405
406 case TULIP_CHIP_MX98715:
407 if (sc->sc_rev >= 0x20)
408 sc->sc_chip = TULIP_CHIP_MX98715A;
409 if (sc->sc_rev >= 0x30)
410 sc->sc_chip = TULIP_CHIP_MX98725;
411 break;
412
413 case TULIP_CHIP_WB89C840F:
414 sc->sc_regshift = 2;
415 break;
416
417 case TULIP_CHIP_AX88140:
418 if (sc->sc_rev >= 0x10)
419 sc->sc_chip = TULIP_CHIP_AX88141;
420 break;
421
422 case TULIP_CHIP_DM9102:
423 if (sc->sc_rev >= 0x30)
424 sc->sc_chip = TULIP_CHIP_DM9102A;
425 break;
426
427 default:
428 /* Nothing. */
429 }
430
431 printf(": %s Ethernet, pass %d.%d\n",
432 tlp_chip_names[sc->sc_chip],
433 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf);
434
435 switch (sc->sc_chip) {
436 case TULIP_CHIP_21040:
437 if (sc->sc_rev < 0x20) {
438 printf("%s: 21040 must be at least pass 2.0\n",
439 sc->sc_dev.dv_xname);
440 return;
441 }
442 break;
443
444 case TULIP_CHIP_21140:
445 if (sc->sc_rev < 0x11) {
446 printf("%s: 21140 must be at least pass 1.1\n",
447 sc->sc_dev.dv_xname);
448 return;
449 }
450 break;
451
452 default:
453 /* Nothing. */
454 }
455
456 /*
457 * Check to see if the device is in power-save mode, and
458 * being it out if necessary.
459 */
460 switch (sc->sc_chip) {
461 case TULIP_CHIP_21140:
462 case TULIP_CHIP_21140A:
463 case TULIP_CHIP_21142:
464 case TULIP_CHIP_21143:
465 case TULIP_CHIP_MX98713A:
466 case TULIP_CHIP_MX98715:
467 case TULIP_CHIP_MX98715A:
468 case TULIP_CHIP_MX98725:
469 case TULIP_CHIP_DM9102:
470 case TULIP_CHIP_DM9102A:
471 /*
472 * Clear the "sleep mode" bit in the CFDA register.
473 */
474 reg = pci_conf_read(pc, pa->pa_tag, TULIP_PCI_CFDA);
475 if (reg & (CFDA_SLEEP|CFDA_SNOOZE))
476 pci_conf_write(pc, pa->pa_tag, TULIP_PCI_CFDA,
477 reg & ~(CFDA_SLEEP|CFDA_SNOOZE));
478 break;
479
480 default:
481 /* Nothing. */
482 }
483
484 if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PWRMGMT, &pmreg, 0)) {
485 reg = pci_conf_read(pc, pa->pa_tag, pmreg + 4);
486 switch (reg & PCI_PMCSR_STATE_MASK) {
487 case PCI_PMCSR_STATE_D1:
488 case PCI_PMCSR_STATE_D2:
489 printf(": waking up from power state D%d\n%s",
490 reg & PCI_PMCSR_STATE_MASK, sc->sc_dev.dv_xname);
491 pci_conf_write(pc, pa->pa_tag, pmreg + 4,
492 (reg & ~PCI_PMCSR_STATE_MASK) |
493 PCI_PMCSR_STATE_D0);
494 break;
495 case PCI_PMCSR_STATE_D3:
496 /*
497 * The card has lost all configuration data in
498 * this state, so punt.
499 */
500 printf(": unable to wake up from power state D3, "
501 "reboot required.\n");
502 pci_conf_write(pc, pa->pa_tag, pmreg + 4,
503 (reg & ~PCI_PMCSR_STATE_MASK) |
504 PCI_PMCSR_STATE_D0);
505 return;
506 }
507 }
508
509 /*
510 * Map the device.
511 */
512 ioh_valid = (pci_mapreg_map(pa, TULIP_PCI_IOBA,
513 PCI_MAPREG_TYPE_IO, 0,
514 &iot, &ioh, NULL, NULL) == 0);
515 memh_valid = (pci_mapreg_map(pa, TULIP_PCI_MMBA,
516 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0,
517 &memt, &memh, NULL, NULL) == 0);
518
519 if (memh_valid) {
520 sc->sc_st = memt;
521 sc->sc_sh = memh;
522 } else if (ioh_valid) {
523 sc->sc_st = iot;
524 sc->sc_sh = ioh;
525 } else {
526 printf(": unable to map device registers\n");
527 return;
528 }
529
530 sc->sc_dmat = pa->pa_dmat;
531
532 /*
533 * Make sure bus mastering is enabled.
534 */
535 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
536 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) |
537 PCI_COMMAND_MASTER_ENABLE);
538
539 /*
540 * Get the cacheline size.
541 */
542 sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag,
543 PCI_BHLC_REG));
544
545 /*
546 * Get PCI data moving command info.
547 */
548 if (pa->pa_flags & PCI_FLAGS_MRL_OKAY)
549 sc->sc_flags |= TULIPF_MRL;
550 if (pa->pa_flags & PCI_FLAGS_MRM_OKAY)
551 sc->sc_flags |= TULIPF_MRM;
552 if (pa->pa_flags & PCI_FLAGS_MWI_OKAY)
553 sc->sc_flags |= TULIPF_MWI;
554
555 /*
556 * Read the contents of the Ethernet Address ROM/SROM.
557 */
558 switch (sc->sc_chip) {
559 case TULIP_CHIP_21040:
560 sc->sc_srom_addrbits = 6;
561 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, M_NOWAIT);
562 TULIP_WRITE(sc, CSR_MIIROM, MIIROM_SROMCS);
563 for (i = 0; i < TULIP_ROM_SIZE(6); i++) {
564 for (j = 0; j < 10000; j++) {
565 val = TULIP_READ(sc, CSR_MIIROM);
566 if ((val & MIIROM_DN) == 0)
567 break;
568 }
569 sc->sc_srom[i] = val & MIIROM_DATA;
570 }
571 break;
572
573 case TULIP_CHIP_82C168:
574 case TULIP_CHIP_82C169:
575 {
576 sc->sc_srom_addrbits = 2;
577 sc->sc_srom = malloc(TULIP_ROM_SIZE(2), M_DEVBUF, M_NOWAIT);
578
579 /*
580 * The Lite-On PNIC stores the Ethernet address in
581 * the first 3 words of the EEPROM. EEPROM access
582 * is not like the other Tulip chips.
583 */
584 for (i = 0; i < 6; i += 2) {
585 TULIP_WRITE(sc, CSR_PNIC_SROMCTL,
586 PNIC_SROMCTL_READ | (i >> 1));
587 for (j = 0; j < 500; j++) {
588 delay(2);
589 val = TULIP_READ(sc, CSR_MIIROM);
590 if ((val & PNIC_MIIROM_BUSY) == 0)
591 break;
592 }
593 if (val & PNIC_MIIROM_BUSY) {
594 printf("%s: EEPROM timed out\n",
595 sc->sc_dev.dv_xname);
596 return;
597 }
598 val &= PNIC_MIIROM_DATA;
599 sc->sc_srom[i] = val >> 8;
600 sc->sc_srom[i + 1] = val & 0xff;
601 }
602 break;
603 }
604
605 default:
606 if (tlp_read_srom(sc) == 0)
607 goto cant_cope;
608 break;
609 }
610
611 /*
612 * Deal with chip/board quirks. This includes setting up
613 * the mediasw, and extracting the Ethernet address from
614 * the rombuf.
615 */
616 switch (sc->sc_chip) {
617 case TULIP_CHIP_21040:
618 /* Check for a slaved ROM on a multi-port board. */
619 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDROM,
620 TULIP_PCI_SLAVEROM);
621 if (psc->sc_flags & TULIP_PCI_SLAVEROM)
622 memcpy(sc->sc_srom, psc->sc_master->sc_tulip.sc_srom,
623 sizeof(sc->sc_srom));
624
625 /*
626 * Parse the Ethernet Address ROM.
627 */
628 if (tlp_parse_old_srom(sc, enaddr) == 0)
629 goto cant_cope;
630
631 /*
632 * If we have a slaved ROM, adjust the Ethernet address.
633 */
634 if (psc->sc_flags & TULIP_PCI_SLAVEROM)
635 enaddr[5] +=
636 sc->sc_devno - psc->sc_master->sc_tulip.sc_devno;
637
638 /*
639 * All 21040 boards start out with the same
640 * media switch.
641 */
642 sc->sc_mediasw = &tlp_21040_mediasw;
643
644 /*
645 * Deal with any quirks this board might have.
646 */
647 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21040_quirks);
648 break;
649
650 case TULIP_CHIP_21041:
651 /* Check for a slaved ROM on a multi-port board. */
652 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDROM,
653 TULIP_PCI_SLAVEROM);
654 if (psc->sc_flags & TULIP_PCI_SLAVEROM)
655 memcpy(sc->sc_srom, psc->sc_master->sc_tulip.sc_srom,
656 sizeof(sc->sc_srom));
657
658 /* Check for new format SROM. */
659 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) {
660 /*
661 * Not an ISV SROM; try the old DEC Ethernet Address
662 * ROM format.
663 */
664 if (tlp_parse_old_srom(sc, enaddr) == 0)
665 goto cant_cope;
666 }
667
668 /*
669 * All 21041 boards use the same media switch; they all
670 * work basically the same! Yippee!
671 */
672 sc->sc_mediasw = &tlp_21041_mediasw;
673
674 /*
675 * Deal with any quirks this board might have.
676 */
677 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21041_quirks);
678 break;
679
680 case TULIP_CHIP_21140:
681 case TULIP_CHIP_21140A:
682 /* Check for new format SROM. */
683 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) {
684 /*
685 * Not an ISV SROM; try the old DEC Ethernet Address
686 * ROM format.
687 */
688 if (tlp_parse_old_srom(sc, enaddr) == 0)
689 goto cant_cope;
690 } else {
691 /*
692 * We start out with the 2114x ISV media switch.
693 * When we search for quirks, we may change to
694 * a different switch.
695 */
696 sc->sc_mediasw = &tlp_2114x_isv_mediasw;
697 }
698
699 /*
700 * Deal with any quirks this board might have.
701 */
702 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21140_quirks);
703
704 /*
705 * Bail out now if we can't deal with this board.
706 */
707 if (sc->sc_mediasw == NULL)
708 goto cant_cope;
709 break;
710
711 case TULIP_CHIP_21142:
712 case TULIP_CHIP_21143:
713 /* Check for new format SROM. */
714 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) {
715 /*
716 * Not an ISV SROM; try the old DEC Ethernet Address
717 * ROM format.
718 */
719 if (tlp_parse_old_srom(sc, enaddr) == 0)
720 goto cant_cope;
721 } else {
722 /*
723 * We start out with the 2114x ISV media switch.
724 * When we search for quirks, we may change to
725 * a different switch.
726 */
727 sc->sc_mediasw = &tlp_2114x_isv_mediasw;
728 }
729
730 /*
731 * Deal with any quirks this board might have.
732 */
733 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21142_quirks);
734
735 /*
736 * Bail out now if we can't deal with this board.
737 */
738 if (sc->sc_mediasw == NULL)
739 goto cant_cope;
740 break;
741
742 case TULIP_CHIP_82C168:
743 case TULIP_CHIP_82C169:
744 /*
745 * Lite-On PNIC's Ethernet address is the first 6
746 * bytes of its EEPROM.
747 */
748 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN);
749
750 /*
751 * Lite-On PNICs always use the same mediasw; we
752 * select MII vs. internal NWAY automatically.
753 */
754 sc->sc_mediasw = &tlp_pnic_mediasw;
755 break;
756
757 case TULIP_CHIP_MX98713:
758 /*
759 * The Macronix MX98713 has an MII and GPIO, but no
760 * internal Nway block. This chip is basically a
761 * perfect 21140A clone, with the exception of the
762 * a magic register frobbing in order to make the
763 * interface function.
764 */
765 if (tlp_isv_srom_enaddr(sc, enaddr)) {
766 sc->sc_mediasw = &tlp_2114x_isv_mediasw;
767 break;
768 }
769 /* FALLTHROUGH */
770
771 case TULIP_CHIP_82C115:
772 /*
773 * Yippee! The Lite-On 82C115 is a clone of
774 * the MX98725 (the data sheet even says `MXIC'
775 * on it)! Imagine that, a clone of a clone.
776 *
777 * The differences are really minimal:
778 *
779 * - Wake-On-LAN support
780 * - 128-bit multicast hash table, rather than
781 * the standard 512-bit hash table
782 */
783 /* FALLTHROUGH */
784
785 case TULIP_CHIP_MX98713A:
786 case TULIP_CHIP_MX98715A:
787 case TULIP_CHIP_MX98725:
788 /*
789 * The MX98713A has an MII as well as an internal Nway block,
790 * but no GPIO. The MX98715 and MX98725 have an internal
791 * Nway block only.
792 *
793 * The internal Nway block, unlike the Lite-On PNIC's, does
794 * just that - performs Nway. Once autonegotiation completes,
795 * we must program the GPR media information into the chip.
796 *
797 * The byte offset of the Ethernet address is stored at
798 * offset 0x70.
799 */
800 memcpy(enaddr, &sc->sc_srom[sc->sc_srom[0x70]], ETHER_ADDR_LEN);
801 sc->sc_mediasw = &tlp_pmac_mediasw;
802 break;
803
804 case TULIP_CHIP_WB89C840F:
805 /*
806 * Winbond 89C840F's Ethernet address is the first
807 * 6 bytes of its EEPROM.
808 */
809 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN);
810
811 /*
812 * Winbond 89C840F has an MII attached to the SIO.
813 */
814 sc->sc_mediasw = &tlp_sio_mii_mediasw;
815 break;
816
817 case TULIP_CHIP_AL981:
818 /*
819 * The ADMtek AL981's Ethernet address is located
820 * at offset 8 of its EEPROM.
821 */
822 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN);
823
824 /*
825 * ADMtek AL981 has a built-in PHY accessed through
826 * special registers.
827 */
828 sc->sc_mediasw = &tlp_al981_mediasw;
829 break;
830
831 case TULIP_CHIP_DM9102:
832 case TULIP_CHIP_DM9102A:
833 /*
834 * Some boards with the Davicom chip have an ISV
835 * SROM (mostly DM9102A boards -- trying to describe
836 * the HomePNA PHY, probably) although the data in
837 * them is generally wrong. Check for ISV format
838 * and grab the Ethernet address that way, and if
839 * that fails, fall back on grabbing it from an
840 * observed offset of 20 (which is where it would
841 * be in an ISV SROM anyhow, tho ISV can cope with
842 * multi-port boards).
843 */
844 if (tlp_isv_srom_enaddr(sc, enaddr))
845 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN);
846
847 /*
848 * Davicom chips all have an internal MII interface
849 * and a built-in PHY. DM9102A also has a an external
850 * MII interface, usually with a HomePNA PHY attached
851 * to it.
852 */
853 sc->sc_mediasw = &tlp_dm9102_mediasw;
854 break;
855
856 default:
857 cant_cope:
858 printf("%s: sorry, unable to handle your board\n",
859 sc->sc_dev.dv_xname);
860 return;
861 }
862
863 /*
864 * Handle shared interrupts.
865 */
866 if (psc->sc_flags & TULIP_PCI_SHAREDINTR) {
867 if (psc->sc_master)
868 psc->sc_flags |= TULIP_PCI_SLAVEINTR;
869 else {
870 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDINTR,
871 TULIP_PCI_SLAVEINTR);
872 if (psc->sc_master == NULL)
873 psc->sc_master = psc;
874 }
875 LIST_INSERT_HEAD(&psc->sc_master->sc_intrslaves,
876 psc, sc_intrq);
877 }
878
879 if (psc->sc_flags & TULIP_PCI_SLAVEINTR) {
880 printf("%s: sharing interrupt with %s\n",
881 sc->sc_dev.dv_xname,
882 psc->sc_master->sc_tulip.sc_dev.dv_xname);
883 } else {
884 /*
885 * Map and establish our interrupt.
886 */
887 if (pci_intr_map(pc, pa->pa_intrtag, pa->pa_intrpin,
888 pa->pa_intrline, &ih)) {
889 printf("%s: unable to map interrupt\n",
890 sc->sc_dev.dv_xname);
891 return;
892 }
893 intrstr = pci_intr_string(pc, ih);
894 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET,
895 (psc->sc_flags & TULIP_PCI_SHAREDINTR) ?
896 tlp_pci_shared_intr : tlp_intr, sc);
897 if (psc->sc_ih == NULL) {
898 printf("%s: unable to establish interrupt",
899 sc->sc_dev.dv_xname);
900 if (intrstr != NULL)
901 printf(" at %s", intrstr);
902 printf("\n");
903 return;
904 }
905 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname,
906 intrstr);
907 }
908
909 /*
910 * Finish off the attach.
911 */
912 tlp_attach(sc, enaddr);
913 }
914
915 int
916 tlp_pci_shared_intr(arg)
917 void *arg;
918 {
919 struct tulip_pci_softc *master = arg, *slave;
920 int rv = 0;
921
922 for (slave = LIST_FIRST(&master->sc_intrslaves);
923 slave != NULL;
924 slave = LIST_NEXT(slave, sc_intrq))
925 rv |= tlp_intr(&slave->sc_tulip);
926
927 return (rv);
928 }
929
930 void
931 tlp_pci_dec_quirks(psc, enaddr)
932 struct tulip_pci_softc *psc;
933 const u_int8_t *enaddr;
934 {
935 struct tulip_softc *sc = &psc->sc_tulip;
936
937 /*
938 * This isn't really a quirk-gathering device, really. We
939 * just want to get the spiffy DEC board name from the SROM.
940 */
941 strcpy(sc->sc_name, "DEC ");
942
943 if (memcmp(&sc->sc_srom[29], "DE500", 5) == 0 ||
944 memcmp(&sc->sc_srom[29], "DE450", 5) == 0)
945 memcpy(&sc->sc_name[4], &sc->sc_srom[29], 8);
946 }
947
948 void
949 tlp_pci_znyx_21040_quirks(psc, enaddr)
950 struct tulip_pci_softc *psc;
951 const u_int8_t *enaddr;
952 {
953 struct tulip_softc *sc = &psc->sc_tulip;
954 u_int16_t id = 0;
955
956 /*
957 * If we have a slaved ROM, just copy the bits from the master.
958 * This is in case we fail the ROM ID check (older boards) and
959 * need to fall back on Ethernet address model checking; that
960 * will fail for slave chips.
961 */
962 if (psc->sc_flags & TULIP_PCI_SLAVEROM) {
963 strcpy(sc->sc_name, psc->sc_master->sc_tulip.sc_name);
964 sc->sc_mediasw = psc->sc_master->sc_tulip.sc_mediasw;
965 psc->sc_flags |=
966 psc->sc_master->sc_flags & TULIP_PCI_SHAREDINTR;
967 return;
968 }
969
970 if (sc->sc_srom[32] == 0x4a && sc->sc_srom[33] == 0x52) {
971 id = sc->sc_srom[37] | (sc->sc_srom[36] << 8);
972 switch (id) {
973 zx312:
974 case 0x0602: /* ZX312 */
975 strcpy(sc->sc_name, "ZNYX ZX312");
976 return;
977
978 case 0x0622: /* ZX312T */
979 strcpy(sc->sc_name, "ZNYX ZX312T");
980 sc->sc_mediasw = &tlp_21040_tp_mediasw;
981 return;
982
983 zx314_inta:
984 case 0x0701: /* ZX314 INTA */
985 psc->sc_flags |= TULIP_PCI_SHAREDINTR;
986 /* FALLTHROUGH */
987 case 0x0711: /* ZX314 */
988 strcpy(sc->sc_name, "ZNYX ZX314");
989 psc->sc_flags |= TULIP_PCI_SHAREDROM;
990 sc->sc_mediasw = &tlp_21040_tp_mediasw;
991 return;
992
993 zx315_inta:
994 case 0x0801: /* ZX315 INTA */
995 psc->sc_flags |= TULIP_PCI_SHAREDINTR;
996 /* FALLTHROUGH */
997 case 0x0811: /* ZX315 */
998 strcpy(sc->sc_name, "ZNYX ZX315");
999 psc->sc_flags |= TULIP_PCI_SHAREDROM;
1000 return;
1001
1002 default:
1003 id = 0;
1004 }
1005 }
1006
1007 /*
1008 * Deal with boards that have broken ROMs.
1009 */
1010 if (id == 0) {
1011 if ((enaddr[3] & ~3) == 0xf0 && (enaddr[5] & 3) == 0x00)
1012 goto zx314_inta;
1013 if ((enaddr[3] & ~3) == 0xf4 && (enaddr[5] & 1) == 0x00)
1014 goto zx315_inta;
1015 if ((enaddr[3] & ~3) == 0xec)
1016 goto zx312;
1017 }
1018
1019 strcpy(sc->sc_name, "ZNYX ZX31x");
1020 }
1021
1022 void
1023 tlp_pci_smc_21040_quirks(psc, enaddr)
1024 struct tulip_pci_softc *psc;
1025 const u_int8_t *enaddr;
1026 {
1027 struct tulip_softc *sc = &psc->sc_tulip;
1028 u_int16_t id1, id2, ei;
1029 int auibnc = 0, utp = 0;
1030 char *cp;
1031
1032 id1 = sc->sc_srom[0x60] | (sc->sc_srom[0x61] << 8);
1033 id2 = sc->sc_srom[0x62] | (sc->sc_srom[0x63] << 8);
1034 ei = sc->sc_srom[0x66] | (sc->sc_srom[0x67] << 8);
1035
1036 strcpy(sc->sc_name, "SMC 8432");
1037 cp = &sc->sc_name[8];
1038
1039 if ((id1 & 1) == 0) {
1040 *cp++ = 'B';
1041 auibnc = 1;
1042 }
1043 if ((id1 & 0xff) > 0x32) {
1044 *cp++ = 'T';
1045 utp = 1;
1046 }
1047 if ((id1 & 0x4000) == 0) {
1048 *cp++ = 'A';
1049 auibnc = 1;
1050 }
1051 if (id2 == 0x15) {
1052 sc->sc_name[7] = '4';
1053 *cp++ = '-';
1054 *cp++ = 'C';
1055 *cp++ = 'H';
1056 *cp++ = ei ? '2' : '1';
1057 }
1058 *cp = '\0';
1059
1060 if (utp != 0 && auibnc == 0)
1061 sc->sc_mediasw = &tlp_21040_tp_mediasw;
1062 else if (utp == 0 && auibnc != 0)
1063 sc->sc_mediasw = &tlp_21040_auibnc_mediasw;
1064 }
1065
1066 void
1067 tlp_pci_cogent_21040_quirks(psc, enaddr)
1068 struct tulip_pci_softc *psc;
1069 const u_int8_t *enaddr;
1070 {
1071
1072 strcpy(psc->sc_tulip.sc_name, "Cogent multi-port");
1073 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM;
1074 }
1075
1076 void
1077 tlp_pci_accton_21040_quirks(psc, enaddr)
1078 struct tulip_pci_softc *psc;
1079 const u_int8_t *enaddr;
1080 {
1081
1082 strcpy(psc->sc_tulip.sc_name, "ACCTON EN1203");
1083 }
1084
1085 void tlp_pci_asante_21140_reset __P((struct tulip_softc *));
1086
1087 void
1088 tlp_pci_asante_21140_quirks(psc, enaddr)
1089 struct tulip_pci_softc *psc;
1090 const u_int8_t *enaddr;
1091 {
1092 struct tulip_softc *sc = &psc->sc_tulip;
1093
1094 /*
1095 * Some Asante boards don't use the ISV SROM format. For
1096 * those that don't, we initialize the GPIO direction bits,
1097 * and provide our own reset hook, which resets the MII.
1098 *
1099 * All of these boards use SIO-attached-MII media.
1100 */
1101 if (sc->sc_mediasw == &tlp_2114x_isv_mediasw)
1102 return;
1103
1104 strcpy(sc->sc_name, "Asante");
1105
1106 sc->sc_gp_dir = 0xbf;
1107 sc->sc_reset = tlp_pci_asante_21140_reset;
1108 sc->sc_mediasw = &tlp_sio_mii_mediasw;
1109 }
1110
1111 void
1112 tlp_pci_asante_21140_reset(sc)
1113 struct tulip_softc *sc;
1114 {
1115
1116 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir);
1117 TULIP_WRITE(sc, CSR_GPP, 0x8);
1118 delay(100);
1119 TULIP_WRITE(sc, CSR_GPP, 0);
1120 }
1121
1122 void tlp_pci_cobalt_21142_reset __P((struct tulip_softc *));
1123
1124 void
1125 tlp_pci_cobalt_21142_quirks(psc, enaddr)
1126 struct tulip_pci_softc *psc;
1127 const u_int8_t *enaddr;
1128 {
1129 struct tulip_softc *sc = &psc->sc_tulip;
1130
1131 /*
1132 * Cobalt Networks interfaces are just MII-on-SIO.
1133 */
1134 sc->sc_reset = tlp_pci_cobalt_21142_reset;
1135 sc->sc_mediasw = &tlp_sio_mii_mediasw;
1136
1137 /*
1138 * The Cobalt systems tend to fall back to store-and-forward
1139 * pretty quickly, so we select that from the beginning to
1140 * avoid initial timeouts.
1141 */
1142 sc->sc_txthresh = TXTH_SF;
1143 }
1144
1145 void
1146 tlp_pci_cobalt_21142_reset(sc)
1147 struct tulip_softc *sc;
1148 {
1149 /*
1150 * Reset PHY.
1151 */
1152 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE | (1 << 16));
1153 delay(10);
1154 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE);
1155 delay(10);
1156 }
1157