if_tlp_pci.c revision 1.50 1 /* $NetBSD: if_tlp_pci.c,v 1.50 2001/01/08 21:50:47 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the NetBSD
22 * Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 * contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40 /*
41 * PCI bus front-end for the Digital Semiconductor ``Tulip'' (21x4x)
42 * Ethernet controller family driver.
43 */
44
45 #include "opt_inet.h"
46 #include "opt_ns.h"
47 #include "bpfilter.h"
48 #include "opt_tlp.h"
49
50 #include <sys/param.h>
51 #include <sys/systm.h>
52 #include <sys/mbuf.h>
53 #include <sys/malloc.h>
54 #include <sys/kernel.h>
55 #include <sys/socket.h>
56 #include <sys/ioctl.h>
57 #include <sys/errno.h>
58 #include <sys/device.h>
59
60 #include <machine/endian.h>
61
62 #include <net/if.h>
63 #include <net/if_dl.h>
64 #include <net/if_media.h>
65 #include <net/if_ether.h>
66
67 #if NBPFILTER > 0
68 #include <net/bpf.h>
69 #endif
70
71 #ifdef INET
72 #include <netinet/in.h>
73 #include <netinet/if_inarp.h>
74 #endif
75
76 #ifdef NS
77 #include <netns/ns.h>
78 #include <netns/ns_if.h>
79 #endif
80
81 #include <machine/bus.h>
82 #include <machine/intr.h>
83
84 #include <dev/mii/miivar.h>
85 #include <dev/mii/mii_bitbang.h>
86
87 #include <dev/ic/tulipreg.h>
88 #include <dev/ic/tulipvar.h>
89
90 #include <dev/pci/pcivar.h>
91 #include <dev/pci/pcireg.h>
92 #include <dev/pci/pcidevs.h>
93
94 /*
95 * PCI configuration space registers used by the Tulip.
96 */
97 #define TULIP_PCI_IOBA 0x10 /* i/o mapped base */
98 #define TULIP_PCI_MMBA 0x14 /* memory mapped base */
99 #define TULIP_PCI_CFDA 0x40 /* configuration driver area */
100
101 #define CFDA_SLEEP 0x80000000 /* sleep mode */
102 #define CFDA_SNOOZE 0x40000000 /* snooze mode */
103
104 struct tulip_pci_softc {
105 struct tulip_softc sc_tulip; /* real Tulip softc */
106
107 /* PCI-specific goo. */
108 void *sc_ih; /* interrupt handle */
109
110 pci_chipset_tag_t sc_pc; /* our PCI chipset */
111 pcitag_t sc_pcitag; /* our PCI tag */
112
113 int sc_flags; /* flags; see below */
114
115 LIST_HEAD(, tulip_pci_softc) sc_intrslaves;
116 LIST_ENTRY(tulip_pci_softc) sc_intrq;
117
118 /* Our {ROM,interrupt} master. */
119 struct tulip_pci_softc *sc_master;
120 };
121
122 /* sc_flags */
123 #define TULIP_PCI_SHAREDINTR 0x01 /* interrupt is shared */
124 #define TULIP_PCI_SLAVEINTR 0x02 /* interrupt is slave */
125 #define TULIP_PCI_SHAREDROM 0x04 /* ROM is shared */
126 #define TULIP_PCI_SLAVEROM 0x08 /* slave of shared ROM */
127
128 int tlp_pci_match __P((struct device *, struct cfdata *, void *));
129 void tlp_pci_attach __P((struct device *, struct device *, void *));
130
131 struct cfattach tlp_pci_ca = {
132 sizeof(struct tulip_pci_softc), tlp_pci_match, tlp_pci_attach,
133 };
134
135 const struct tulip_pci_product {
136 u_int32_t tpp_vendor; /* PCI vendor ID */
137 u_int32_t tpp_product; /* PCI product ID */
138 tulip_chip_t tpp_chip; /* base Tulip chip type */
139 } tlp_pci_products[] = {
140 #ifdef TLP_MATCH_21040
141 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21040,
142 TULIP_CHIP_21040 },
143 #endif
144 #ifdef TLP_MATCH_21041
145 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21041,
146 TULIP_CHIP_21041 },
147 #endif
148 #ifdef TLP_MATCH_21140
149 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21140,
150 TULIP_CHIP_21140 },
151 #endif
152 #ifdef TLP_MATCH_21142
153 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142,
154 TULIP_CHIP_21142 },
155 #endif
156
157 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C168,
158 TULIP_CHIP_82C168 },
159
160 /*
161 * Note: This is like a MX98725 with Wake-On-LAN and a
162 * 128-bit multicast hash table.
163 */
164 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C115,
165 TULIP_CHIP_82C115 },
166
167 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98713,
168 TULIP_CHIP_MX98713 },
169 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX987x5,
170 TULIP_CHIP_MX98715 },
171
172 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100TX,
173 TULIP_CHIP_MX98713 },
174
175 { PCI_VENDOR_WINBOND, PCI_PRODUCT_WINBOND_W89C840F,
176 TULIP_CHIP_WB89C840F },
177 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100ATX,
178 TULIP_CHIP_WB89C840F },
179
180 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9102,
181 TULIP_CHIP_DM9102 },
182
183 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AL981,
184 TULIP_CHIP_AL981 },
185
186 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN985,
187 TULIP_CHIP_AN985 },
188 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN2242,
189 TULIP_CHIP_AN985 },
190
191 #if 0
192 { PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX88140A,
193 TULIP_CHIP_AX88140 },
194 #endif
195
196 { 0, 0,
197 TULIP_CHIP_INVALID },
198 };
199
200 struct tlp_pci_quirks {
201 void (*tpq_func) __P((struct tulip_pci_softc *,
202 const u_int8_t *));
203 u_int8_t tpq_oui[3];
204 };
205
206 void tlp_pci_dec_quirks __P((struct tulip_pci_softc *,
207 const u_int8_t *));
208
209 void tlp_pci_znyx_21040_quirks __P((struct tulip_pci_softc *,
210 const u_int8_t *));
211 void tlp_pci_smc_21040_quirks __P((struct tulip_pci_softc *,
212 const u_int8_t *));
213 void tlp_pci_cogent_21040_quirks __P((struct tulip_pci_softc *,
214 const u_int8_t *));
215 void tlp_pci_accton_21040_quirks __P((struct tulip_pci_softc *,
216 const u_int8_t *));
217
218 void tlp_pci_cobalt_21142_quirks __P((struct tulip_pci_softc *,
219 const u_int8_t *));
220
221 const struct tlp_pci_quirks tlp_pci_21040_quirks[] = {
222 { tlp_pci_znyx_21040_quirks, { 0x00, 0xc0, 0x95 } },
223 { tlp_pci_smc_21040_quirks, { 0x00, 0x00, 0xc0 } },
224 { tlp_pci_cogent_21040_quirks, { 0x00, 0x00, 0x92 } },
225 { tlp_pci_accton_21040_quirks, { 0x00, 0x00, 0xe8 } },
226 { NULL, { 0, 0, 0 } }
227 };
228
229 const struct tlp_pci_quirks tlp_pci_21041_quirks[] = {
230 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } },
231 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } },
232 { NULL, { 0, 0, 0 } }
233 };
234
235 void tlp_pci_asante_21140_quirks __P((struct tulip_pci_softc *,
236 const u_int8_t *));
237
238 const struct tlp_pci_quirks tlp_pci_21140_quirks[] = {
239 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } },
240 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } },
241 { tlp_pci_asante_21140_quirks, { 0x00, 0x00, 0x94 } },
242 { NULL, { 0, 0, 0 } }
243 };
244
245 const struct tlp_pci_quirks tlp_pci_21142_quirks[] = {
246 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } },
247 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } },
248 { tlp_pci_cobalt_21142_quirks, { 0x00, 0x10, 0xe0 } },
249 { NULL, { 0, 0, 0 } }
250 };
251
252 int tlp_pci_shared_intr __P((void *));
253
254 const struct tulip_pci_product *tlp_pci_lookup
255 __P((const struct pci_attach_args *));
256 void tlp_pci_get_quirks __P((struct tulip_pci_softc *, const u_int8_t *,
257 const struct tlp_pci_quirks *));
258 void tlp_pci_check_slaved __P((struct tulip_pci_softc *, int, int));
259
260 const struct tulip_pci_product *
261 tlp_pci_lookup(pa)
262 const struct pci_attach_args *pa;
263 {
264 const struct tulip_pci_product *tpp;
265
266 for (tpp = tlp_pci_products;
267 tlp_chip_names[tpp->tpp_chip] != NULL;
268 tpp++) {
269 if (PCI_VENDOR(pa->pa_id) == tpp->tpp_vendor &&
270 PCI_PRODUCT(pa->pa_id) == tpp->tpp_product)
271 return (tpp);
272 }
273 return (NULL);
274 }
275
276 void
277 tlp_pci_get_quirks(psc, enaddr, tpq)
278 struct tulip_pci_softc *psc;
279 const u_int8_t *enaddr;
280 const struct tlp_pci_quirks *tpq;
281 {
282
283 for (; tpq->tpq_func != NULL; tpq++) {
284 if (tpq->tpq_oui[0] == enaddr[0] &&
285 tpq->tpq_oui[1] == enaddr[1] &&
286 tpq->tpq_oui[2] == enaddr[2]) {
287 (*tpq->tpq_func)(psc, enaddr);
288 return;
289 }
290 }
291 }
292
293 void
294 tlp_pci_check_slaved(psc, shared, slaved)
295 struct tulip_pci_softc *psc;
296 int shared, slaved;
297 {
298 extern struct cfdriver tlp_cd;
299 struct tulip_pci_softc *cur, *best = NULL;
300 struct tulip_softc *sc = &psc->sc_tulip;
301 int i;
302
303 /*
304 * First of all, find the lowest pcidev numbered device on our
305 * bus marked as shared. That should be our master.
306 */
307 for (i = 0; i < tlp_cd.cd_ndevs; i++) {
308 if ((cur = tlp_cd.cd_devs[i]) == NULL)
309 continue;
310 if (cur->sc_tulip.sc_dev.dv_parent != sc->sc_dev.dv_parent)
311 continue;
312 if ((cur->sc_flags & shared) == 0)
313 continue;
314 if (cur == psc)
315 continue;
316 if (best == NULL ||
317 best->sc_tulip.sc_devno > cur->sc_tulip.sc_devno)
318 best = cur;
319 }
320
321 if (best != NULL) {
322 psc->sc_master = best;
323 psc->sc_flags |= (shared | slaved);
324 }
325 }
326
327 int
328 tlp_pci_match(parent, match, aux)
329 struct device *parent;
330 struct cfdata *match;
331 void *aux;
332 {
333 struct pci_attach_args *pa = aux;
334
335 if (tlp_pci_lookup(pa) != NULL)
336 return (10); /* beat if_de.c */
337
338 return (0);
339 }
340
341 void
342 tlp_pci_attach(parent, self, aux)
343 struct device *parent, *self;
344 void *aux;
345 {
346 struct tulip_pci_softc *psc = (void *) self;
347 struct tulip_softc *sc = &psc->sc_tulip;
348 struct pci_attach_args *pa = aux;
349 pci_chipset_tag_t pc = pa->pa_pc;
350 pci_intr_handle_t ih;
351 const char *intrstr = NULL;
352 bus_space_tag_t iot, memt;
353 bus_space_handle_t ioh, memh;
354 int ioh_valid, memh_valid, i, j;
355 const struct tulip_pci_product *tpp;
356 u_int8_t enaddr[ETHER_ADDR_LEN];
357 u_int32_t val;
358 pcireg_t reg;
359 int pmreg;
360
361 sc->sc_devno = pa->pa_device;
362 psc->sc_pc = pa->pa_pc;
363 psc->sc_pcitag = pa->pa_tag;
364
365 LIST_INIT(&psc->sc_intrslaves);
366
367 tpp = tlp_pci_lookup(pa);
368 if (tpp == NULL) {
369 printf("\n");
370 panic("tlp_pci_attach: impossible");
371 }
372 sc->sc_chip = tpp->tpp_chip;
373
374 /*
375 * By default, Tulip registers are 8 bytes long (4 bytes
376 * followed by a 4 byte pad).
377 */
378 sc->sc_regshift = 3;
379
380 /*
381 * No power management hooks.
382 * XXX Maybe we should add some!
383 */
384 sc->sc_flags |= TULIPF_ENABLED;
385
386 /*
387 * Get revision info, and set some chip-specific variables.
388 */
389 sc->sc_rev = PCI_REVISION(pa->pa_class);
390 switch (sc->sc_chip) {
391 case TULIP_CHIP_21140:
392 if (sc->sc_rev >= 0x20)
393 sc->sc_chip = TULIP_CHIP_21140A;
394 break;
395
396 case TULIP_CHIP_21142:
397 if (sc->sc_rev >= 0x20)
398 sc->sc_chip = TULIP_CHIP_21143;
399 break;
400
401 case TULIP_CHIP_82C168:
402 if (sc->sc_rev >= 0x20)
403 sc->sc_chip = TULIP_CHIP_82C169;
404 break;
405
406 case TULIP_CHIP_MX98713:
407 if (sc->sc_rev >= 0x10)
408 sc->sc_chip = TULIP_CHIP_MX98713A;
409 break;
410
411 case TULIP_CHIP_MX98715:
412 if (sc->sc_rev >= 0x20)
413 sc->sc_chip = TULIP_CHIP_MX98715A;
414 if (sc->sc_rev >= 0x25)
415 sc->sc_chip = TULIP_CHIP_MX98715AEC_X;
416 if (sc->sc_rev >= 0x30)
417 sc->sc_chip = TULIP_CHIP_MX98725;
418 break;
419
420 case TULIP_CHIP_WB89C840F:
421 sc->sc_regshift = 2;
422 break;
423
424 case TULIP_CHIP_AN985:
425 /*
426 * The AN983 and AN985 are very similar, and are
427 * differentiated by a "signature" register that
428 * is like, but not identical, to a PCI ID register.
429 */
430 reg = pci_conf_read(pc, pa->pa_tag, 0x80);
431 switch (reg) {
432 case 0x09811317:
433 sc->sc_chip = TULIP_CHIP_AN985;
434 break;
435
436 case 0x09851317:
437 sc->sc_chip = TULIP_CHIP_AN983;
438 break;
439
440 default:
441 /* Unknown -- use default. */
442 }
443 break;
444
445 case TULIP_CHIP_AX88140:
446 if (sc->sc_rev >= 0x10)
447 sc->sc_chip = TULIP_CHIP_AX88141;
448 break;
449
450 case TULIP_CHIP_DM9102:
451 if (sc->sc_rev >= 0x30)
452 sc->sc_chip = TULIP_CHIP_DM9102A;
453 break;
454
455 default:
456 /* Nothing. */
457 }
458
459 printf(": %s Ethernet, pass %d.%d\n",
460 tlp_chip_names[sc->sc_chip],
461 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf);
462
463 switch (sc->sc_chip) {
464 case TULIP_CHIP_21040:
465 if (sc->sc_rev < 0x20) {
466 printf("%s: 21040 must be at least pass 2.0\n",
467 sc->sc_dev.dv_xname);
468 return;
469 }
470 break;
471
472 case TULIP_CHIP_21140:
473 if (sc->sc_rev < 0x11) {
474 printf("%s: 21140 must be at least pass 1.1\n",
475 sc->sc_dev.dv_xname);
476 return;
477 }
478 break;
479
480 default:
481 /* Nothing. */
482 }
483
484 /*
485 * Check to see if the device is in power-save mode, and
486 * being it out if necessary.
487 */
488 switch (sc->sc_chip) {
489 case TULIP_CHIP_21140:
490 case TULIP_CHIP_21140A:
491 case TULIP_CHIP_21142:
492 case TULIP_CHIP_21143:
493 case TULIP_CHIP_MX98713A:
494 case TULIP_CHIP_MX98715:
495 case TULIP_CHIP_MX98715A:
496 case TULIP_CHIP_MX98715AEC_X:
497 case TULIP_CHIP_MX98725:
498 case TULIP_CHIP_DM9102:
499 case TULIP_CHIP_DM9102A:
500 /*
501 * Clear the "sleep mode" bit in the CFDA register.
502 */
503 reg = pci_conf_read(pc, pa->pa_tag, TULIP_PCI_CFDA);
504 if (reg & (CFDA_SLEEP|CFDA_SNOOZE))
505 pci_conf_write(pc, pa->pa_tag, TULIP_PCI_CFDA,
506 reg & ~(CFDA_SLEEP|CFDA_SNOOZE));
507 break;
508
509 default:
510 /* Nothing. */
511 }
512
513 if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PWRMGMT, &pmreg, 0)) {
514 reg = pci_conf_read(pc, pa->pa_tag, pmreg + 4);
515 switch (reg & PCI_PMCSR_STATE_MASK) {
516 case PCI_PMCSR_STATE_D1:
517 case PCI_PMCSR_STATE_D2:
518 printf(": waking up from power state D%d\n%s",
519 reg & PCI_PMCSR_STATE_MASK, sc->sc_dev.dv_xname);
520 pci_conf_write(pc, pa->pa_tag, pmreg + 4,
521 (reg & ~PCI_PMCSR_STATE_MASK) |
522 PCI_PMCSR_STATE_D0);
523 break;
524 case PCI_PMCSR_STATE_D3:
525 /*
526 * The card has lost all configuration data in
527 * this state, so punt.
528 */
529 printf(": unable to wake up from power state D3, "
530 "reboot required.\n");
531 pci_conf_write(pc, pa->pa_tag, pmreg + 4,
532 (reg & ~PCI_PMCSR_STATE_MASK) |
533 PCI_PMCSR_STATE_D0);
534 return;
535 }
536 }
537
538 /*
539 * Map the device.
540 */
541 ioh_valid = (pci_mapreg_map(pa, TULIP_PCI_IOBA,
542 PCI_MAPREG_TYPE_IO, 0,
543 &iot, &ioh, NULL, NULL) == 0);
544 memh_valid = (pci_mapreg_map(pa, TULIP_PCI_MMBA,
545 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0,
546 &memt, &memh, NULL, NULL) == 0);
547
548 if (memh_valid) {
549 sc->sc_st = memt;
550 sc->sc_sh = memh;
551 } else if (ioh_valid) {
552 sc->sc_st = iot;
553 sc->sc_sh = ioh;
554 } else {
555 printf(": unable to map device registers\n");
556 return;
557 }
558
559 sc->sc_dmat = pa->pa_dmat;
560
561 /*
562 * Make sure bus mastering is enabled.
563 */
564 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
565 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) |
566 PCI_COMMAND_MASTER_ENABLE);
567
568 /*
569 * Get the cacheline size.
570 */
571 sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag,
572 PCI_BHLC_REG));
573
574 /*
575 * Get PCI data moving command info.
576 */
577 if (pa->pa_flags & PCI_FLAGS_MRL_OKAY)
578 sc->sc_flags |= TULIPF_MRL;
579 if (pa->pa_flags & PCI_FLAGS_MRM_OKAY)
580 sc->sc_flags |= TULIPF_MRM;
581 if (pa->pa_flags & PCI_FLAGS_MWI_OKAY)
582 sc->sc_flags |= TULIPF_MWI;
583
584 /*
585 * Read the contents of the Ethernet Address ROM/SROM.
586 */
587 switch (sc->sc_chip) {
588 case TULIP_CHIP_21040:
589 sc->sc_srom_addrbits = 6;
590 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, M_NOWAIT);
591 TULIP_WRITE(sc, CSR_MIIROM, MIIROM_SROMCS);
592 for (i = 0; i < TULIP_ROM_SIZE(6); i++) {
593 for (j = 0; j < 10000; j++) {
594 val = TULIP_READ(sc, CSR_MIIROM);
595 if ((val & MIIROM_DN) == 0)
596 break;
597 }
598 sc->sc_srom[i] = val & MIIROM_DATA;
599 }
600 break;
601
602 case TULIP_CHIP_82C168:
603 case TULIP_CHIP_82C169:
604 {
605 sc->sc_srom_addrbits = 2;
606 sc->sc_srom = malloc(TULIP_ROM_SIZE(2), M_DEVBUF, M_NOWAIT);
607
608 /*
609 * The Lite-On PNIC stores the Ethernet address in
610 * the first 3 words of the EEPROM. EEPROM access
611 * is not like the other Tulip chips.
612 */
613 for (i = 0; i < 6; i += 2) {
614 TULIP_WRITE(sc, CSR_PNIC_SROMCTL,
615 PNIC_SROMCTL_READ | (i >> 1));
616 for (j = 0; j < 500; j++) {
617 delay(2);
618 val = TULIP_READ(sc, CSR_MIIROM);
619 if ((val & PNIC_MIIROM_BUSY) == 0)
620 break;
621 }
622 if (val & PNIC_MIIROM_BUSY) {
623 printf("%s: EEPROM timed out\n",
624 sc->sc_dev.dv_xname);
625 return;
626 }
627 val &= PNIC_MIIROM_DATA;
628 sc->sc_srom[i] = val >> 8;
629 sc->sc_srom[i + 1] = val & 0xff;
630 }
631 break;
632 }
633
634 default:
635 if (tlp_read_srom(sc) == 0)
636 goto cant_cope;
637 break;
638 }
639
640 /*
641 * Deal with chip/board quirks. This includes setting up
642 * the mediasw, and extracting the Ethernet address from
643 * the rombuf.
644 */
645 switch (sc->sc_chip) {
646 case TULIP_CHIP_21040:
647 /* Check for a slaved ROM on a multi-port board. */
648 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDROM,
649 TULIP_PCI_SLAVEROM);
650 if (psc->sc_flags & TULIP_PCI_SLAVEROM)
651 memcpy(sc->sc_srom, psc->sc_master->sc_tulip.sc_srom,
652 sizeof(sc->sc_srom));
653
654 /*
655 * Parse the Ethernet Address ROM.
656 */
657 if (tlp_parse_old_srom(sc, enaddr) == 0)
658 goto cant_cope;
659
660 /*
661 * If we have a slaved ROM, adjust the Ethernet address.
662 */
663 if (psc->sc_flags & TULIP_PCI_SLAVEROM)
664 enaddr[5] +=
665 sc->sc_devno - psc->sc_master->sc_tulip.sc_devno;
666
667 /*
668 * All 21040 boards start out with the same
669 * media switch.
670 */
671 sc->sc_mediasw = &tlp_21040_mediasw;
672
673 /*
674 * Deal with any quirks this board might have.
675 */
676 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21040_quirks);
677 break;
678
679 case TULIP_CHIP_21041:
680 /* Check for a slaved ROM on a multi-port board. */
681 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDROM,
682 TULIP_PCI_SLAVEROM);
683 if (psc->sc_flags & TULIP_PCI_SLAVEROM)
684 memcpy(sc->sc_srom, psc->sc_master->sc_tulip.sc_srom,
685 sizeof(sc->sc_srom));
686
687 /* Check for new format SROM. */
688 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) {
689 /*
690 * Not an ISV SROM; try the old DEC Ethernet Address
691 * ROM format.
692 */
693 if (tlp_parse_old_srom(sc, enaddr) == 0)
694 goto cant_cope;
695 }
696
697 /*
698 * All 21041 boards use the same media switch; they all
699 * work basically the same! Yippee!
700 */
701 sc->sc_mediasw = &tlp_21041_mediasw;
702
703 /*
704 * Deal with any quirks this board might have.
705 */
706 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21041_quirks);
707 break;
708
709 case TULIP_CHIP_21140:
710 case TULIP_CHIP_21140A:
711 /* Check for new format SROM. */
712 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) {
713 /*
714 * Not an ISV SROM; try the old DEC Ethernet Address
715 * ROM format.
716 */
717 if (tlp_parse_old_srom(sc, enaddr) == 0)
718 goto cant_cope;
719 } else {
720 /*
721 * We start out with the 2114x ISV media switch.
722 * When we search for quirks, we may change to
723 * a different switch.
724 */
725 sc->sc_mediasw = &tlp_2114x_isv_mediasw;
726 }
727
728 /*
729 * Deal with any quirks this board might have.
730 */
731 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21140_quirks);
732
733 /*
734 * Bail out now if we can't deal with this board.
735 */
736 if (sc->sc_mediasw == NULL)
737 goto cant_cope;
738 break;
739
740 case TULIP_CHIP_21142:
741 case TULIP_CHIP_21143:
742 /* Check for new format SROM. */
743 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) {
744 /*
745 * Not an ISV SROM; try the old DEC Ethernet Address
746 * ROM format.
747 */
748 if (tlp_parse_old_srom(sc, enaddr) == 0)
749 goto cant_cope;
750 } else {
751 /*
752 * We start out with the 2114x ISV media switch.
753 * When we search for quirks, we may change to
754 * a different switch.
755 */
756 sc->sc_mediasw = &tlp_2114x_isv_mediasw;
757 }
758
759 /*
760 * Deal with any quirks this board might have.
761 */
762 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21142_quirks);
763
764 /*
765 * Bail out now if we can't deal with this board.
766 */
767 if (sc->sc_mediasw == NULL)
768 goto cant_cope;
769 break;
770
771 case TULIP_CHIP_82C168:
772 case TULIP_CHIP_82C169:
773 /*
774 * Lite-On PNIC's Ethernet address is the first 6
775 * bytes of its EEPROM.
776 */
777 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN);
778
779 /*
780 * Lite-On PNICs always use the same mediasw; we
781 * select MII vs. internal NWAY automatically.
782 */
783 sc->sc_mediasw = &tlp_pnic_mediasw;
784 break;
785
786 case TULIP_CHIP_MX98713:
787 /*
788 * The Macronix MX98713 has an MII and GPIO, but no
789 * internal Nway block. This chip is basically a
790 * perfect 21140A clone, with the exception of the
791 * a magic register frobbing in order to make the
792 * interface function.
793 */
794 if (tlp_isv_srom_enaddr(sc, enaddr)) {
795 sc->sc_mediasw = &tlp_2114x_isv_mediasw;
796 break;
797 }
798 /* FALLTHROUGH */
799
800 case TULIP_CHIP_82C115:
801 /*
802 * Yippee! The Lite-On 82C115 is a clone of
803 * the MX98725 (the data sheet even says `MXIC'
804 * on it)! Imagine that, a clone of a clone.
805 *
806 * The differences are really minimal:
807 *
808 * - Wake-On-LAN support
809 * - 128-bit multicast hash table, rather than
810 * the standard 512-bit hash table
811 */
812 /* FALLTHROUGH */
813
814 case TULIP_CHIP_MX98713A:
815 case TULIP_CHIP_MX98715A:
816 case TULIP_CHIP_MX98715AEC_X:
817 case TULIP_CHIP_MX98725:
818 /*
819 * The MX98713A has an MII as well as an internal Nway block,
820 * but no GPIO. The MX98715 and MX98725 have an internal
821 * Nway block only.
822 *
823 * The internal Nway block, unlike the Lite-On PNIC's, does
824 * just that - performs Nway. Once autonegotiation completes,
825 * we must program the GPR media information into the chip.
826 *
827 * The byte offset of the Ethernet address is stored at
828 * offset 0x70.
829 */
830 memcpy(enaddr, &sc->sc_srom[sc->sc_srom[0x70]], ETHER_ADDR_LEN);
831 sc->sc_mediasw = &tlp_pmac_mediasw;
832 break;
833
834 case TULIP_CHIP_WB89C840F:
835 /*
836 * Winbond 89C840F's Ethernet address is the first
837 * 6 bytes of its EEPROM.
838 */
839 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN);
840
841 /*
842 * Winbond 89C840F has an MII attached to the SIO.
843 */
844 sc->sc_mediasw = &tlp_sio_mii_mediasw;
845 break;
846
847 case TULIP_CHIP_AL981:
848 /*
849 * The ADMtek AL981's Ethernet address is located
850 * at offset 8 of its EEPROM.
851 */
852 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN);
853
854 /*
855 * ADMtek AL981 has a built-in PHY accessed through
856 * special registers.
857 */
858 sc->sc_mediasw = &tlp_al981_mediasw;
859 break;
860
861 case TULIP_CHIP_AN983:
862 case TULIP_CHIP_AN985:
863 /*
864 * The ADMtek AN985's Ethernet address is located
865 * at offset 8 of its EEPROM.
866 */
867 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN);
868
869 /*
870 * The ADMtek AN985 can be configured in Single-Chip
871 * mode or MAC-only mode. Single-Chip uses the built-in
872 * PHY, MAC-only has an external PHY (usually HomePNA).
873 * The selection is based on an EEPROM setting, and both
874 * PHYs are accessed via MII attached to SIO.
875 *
876 * The AN985 "ghosts" the internal PHY onto all
877 * MII addresses, so we have to use a media init
878 * routine that limits the search.
879 * XXX How does this work with MAC-only mode?
880 */
881 sc->sc_mediasw = &tlp_an985_mediasw;
882 break;
883
884 case TULIP_CHIP_DM9102:
885 case TULIP_CHIP_DM9102A:
886 /*
887 * Some boards with the Davicom chip have an ISV
888 * SROM (mostly DM9102A boards -- trying to describe
889 * the HomePNA PHY, probably) although the data in
890 * them is generally wrong. Check for ISV format
891 * and grab the Ethernet address that way, and if
892 * that fails, fall back on grabbing it from an
893 * observed offset of 20 (which is where it would
894 * be in an ISV SROM anyhow, tho ISV can cope with
895 * multi-port boards).
896 */
897 if (tlp_isv_srom_enaddr(sc, enaddr))
898 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN);
899
900 /*
901 * Davicom chips all have an internal MII interface
902 * and a built-in PHY. DM9102A also has a an external
903 * MII interface, usually with a HomePNA PHY attached
904 * to it.
905 */
906 sc->sc_mediasw = &tlp_dm9102_mediasw;
907 break;
908
909 default:
910 cant_cope:
911 printf("%s: sorry, unable to handle your board\n",
912 sc->sc_dev.dv_xname);
913 return;
914 }
915
916 /*
917 * Handle shared interrupts.
918 */
919 if (psc->sc_flags & TULIP_PCI_SHAREDINTR) {
920 if (psc->sc_master)
921 psc->sc_flags |= TULIP_PCI_SLAVEINTR;
922 else {
923 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDINTR,
924 TULIP_PCI_SLAVEINTR);
925 if (psc->sc_master == NULL)
926 psc->sc_master = psc;
927 }
928 LIST_INSERT_HEAD(&psc->sc_master->sc_intrslaves,
929 psc, sc_intrq);
930 }
931
932 if (psc->sc_flags & TULIP_PCI_SLAVEINTR) {
933 printf("%s: sharing interrupt with %s\n",
934 sc->sc_dev.dv_xname,
935 psc->sc_master->sc_tulip.sc_dev.dv_xname);
936 } else {
937 /*
938 * Map and establish our interrupt.
939 */
940 if (pci_intr_map(pa, &ih)) {
941 printf("%s: unable to map interrupt\n",
942 sc->sc_dev.dv_xname);
943 return;
944 }
945 intrstr = pci_intr_string(pc, ih);
946 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET,
947 (psc->sc_flags & TULIP_PCI_SHAREDINTR) ?
948 tlp_pci_shared_intr : tlp_intr, sc);
949 if (psc->sc_ih == NULL) {
950 printf("%s: unable to establish interrupt",
951 sc->sc_dev.dv_xname);
952 if (intrstr != NULL)
953 printf(" at %s", intrstr);
954 printf("\n");
955 return;
956 }
957 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname,
958 intrstr);
959 }
960
961 /*
962 * Finish off the attach.
963 */
964 tlp_attach(sc, enaddr);
965 }
966
967 int
968 tlp_pci_shared_intr(arg)
969 void *arg;
970 {
971 struct tulip_pci_softc *master = arg, *slave;
972 int rv = 0;
973
974 for (slave = LIST_FIRST(&master->sc_intrslaves);
975 slave != NULL;
976 slave = LIST_NEXT(slave, sc_intrq))
977 rv |= tlp_intr(&slave->sc_tulip);
978
979 return (rv);
980 }
981
982 void
983 tlp_pci_dec_quirks(psc, enaddr)
984 struct tulip_pci_softc *psc;
985 const u_int8_t *enaddr;
986 {
987 struct tulip_softc *sc = &psc->sc_tulip;
988
989 /*
990 * This isn't really a quirk-gathering device, really. We
991 * just want to get the spiffy DEC board name from the SROM.
992 */
993 strcpy(sc->sc_name, "DEC ");
994
995 if (memcmp(&sc->sc_srom[29], "DE500", 5) == 0 ||
996 memcmp(&sc->sc_srom[29], "DE450", 5) == 0)
997 memcpy(&sc->sc_name[4], &sc->sc_srom[29], 8);
998 }
999
1000 void
1001 tlp_pci_znyx_21040_quirks(psc, enaddr)
1002 struct tulip_pci_softc *psc;
1003 const u_int8_t *enaddr;
1004 {
1005 struct tulip_softc *sc = &psc->sc_tulip;
1006 u_int16_t id = 0;
1007
1008 /*
1009 * If we have a slaved ROM, just copy the bits from the master.
1010 * This is in case we fail the ROM ID check (older boards) and
1011 * need to fall back on Ethernet address model checking; that
1012 * will fail for slave chips.
1013 */
1014 if (psc->sc_flags & TULIP_PCI_SLAVEROM) {
1015 strcpy(sc->sc_name, psc->sc_master->sc_tulip.sc_name);
1016 sc->sc_mediasw = psc->sc_master->sc_tulip.sc_mediasw;
1017 psc->sc_flags |=
1018 psc->sc_master->sc_flags & TULIP_PCI_SHAREDINTR;
1019 return;
1020 }
1021
1022 if (sc->sc_srom[32] == 0x4a && sc->sc_srom[33] == 0x52) {
1023 id = sc->sc_srom[37] | (sc->sc_srom[36] << 8);
1024 switch (id) {
1025 zx312:
1026 case 0x0602: /* ZX312 */
1027 strcpy(sc->sc_name, "ZNYX ZX312");
1028 return;
1029
1030 case 0x0622: /* ZX312T */
1031 strcpy(sc->sc_name, "ZNYX ZX312T");
1032 sc->sc_mediasw = &tlp_21040_tp_mediasw;
1033 return;
1034
1035 zx314_inta:
1036 case 0x0701: /* ZX314 INTA */
1037 psc->sc_flags |= TULIP_PCI_SHAREDINTR;
1038 /* FALLTHROUGH */
1039 case 0x0711: /* ZX314 */
1040 strcpy(sc->sc_name, "ZNYX ZX314");
1041 psc->sc_flags |= TULIP_PCI_SHAREDROM;
1042 sc->sc_mediasw = &tlp_21040_tp_mediasw;
1043 return;
1044
1045 zx315_inta:
1046 case 0x0801: /* ZX315 INTA */
1047 psc->sc_flags |= TULIP_PCI_SHAREDINTR;
1048 /* FALLTHROUGH */
1049 case 0x0811: /* ZX315 */
1050 strcpy(sc->sc_name, "ZNYX ZX315");
1051 psc->sc_flags |= TULIP_PCI_SHAREDROM;
1052 return;
1053
1054 default:
1055 id = 0;
1056 }
1057 }
1058
1059 /*
1060 * Deal with boards that have broken ROMs.
1061 */
1062 if (id == 0) {
1063 if ((enaddr[3] & ~3) == 0xf0 && (enaddr[5] & 3) == 0x00)
1064 goto zx314_inta;
1065 if ((enaddr[3] & ~3) == 0xf4 && (enaddr[5] & 1) == 0x00)
1066 goto zx315_inta;
1067 if ((enaddr[3] & ~3) == 0xec)
1068 goto zx312;
1069 }
1070
1071 strcpy(sc->sc_name, "ZNYX ZX31x");
1072 }
1073
1074 void
1075 tlp_pci_smc_21040_quirks(psc, enaddr)
1076 struct tulip_pci_softc *psc;
1077 const u_int8_t *enaddr;
1078 {
1079 struct tulip_softc *sc = &psc->sc_tulip;
1080 u_int16_t id1, id2, ei;
1081 int auibnc = 0, utp = 0;
1082 char *cp;
1083
1084 id1 = sc->sc_srom[0x60] | (sc->sc_srom[0x61] << 8);
1085 id2 = sc->sc_srom[0x62] | (sc->sc_srom[0x63] << 8);
1086 ei = sc->sc_srom[0x66] | (sc->sc_srom[0x67] << 8);
1087
1088 strcpy(sc->sc_name, "SMC 8432");
1089 cp = &sc->sc_name[8];
1090
1091 if ((id1 & 1) == 0) {
1092 *cp++ = 'B';
1093 auibnc = 1;
1094 }
1095 if ((id1 & 0xff) > 0x32) {
1096 *cp++ = 'T';
1097 utp = 1;
1098 }
1099 if ((id1 & 0x4000) == 0) {
1100 *cp++ = 'A';
1101 auibnc = 1;
1102 }
1103 if (id2 == 0x15) {
1104 sc->sc_name[7] = '4';
1105 *cp++ = '-';
1106 *cp++ = 'C';
1107 *cp++ = 'H';
1108 *cp++ = ei ? '2' : '1';
1109 }
1110 *cp = '\0';
1111
1112 if (utp != 0 && auibnc == 0)
1113 sc->sc_mediasw = &tlp_21040_tp_mediasw;
1114 else if (utp == 0 && auibnc != 0)
1115 sc->sc_mediasw = &tlp_21040_auibnc_mediasw;
1116 }
1117
1118 void
1119 tlp_pci_cogent_21040_quirks(psc, enaddr)
1120 struct tulip_pci_softc *psc;
1121 const u_int8_t *enaddr;
1122 {
1123
1124 strcpy(psc->sc_tulip.sc_name, "Cogent multi-port");
1125 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM;
1126 }
1127
1128 void
1129 tlp_pci_accton_21040_quirks(psc, enaddr)
1130 struct tulip_pci_softc *psc;
1131 const u_int8_t *enaddr;
1132 {
1133
1134 strcpy(psc->sc_tulip.sc_name, "ACCTON EN1203");
1135 }
1136
1137 void tlp_pci_asante_21140_reset __P((struct tulip_softc *));
1138
1139 void
1140 tlp_pci_asante_21140_quirks(psc, enaddr)
1141 struct tulip_pci_softc *psc;
1142 const u_int8_t *enaddr;
1143 {
1144 struct tulip_softc *sc = &psc->sc_tulip;
1145
1146 /*
1147 * Some Asante boards don't use the ISV SROM format. For
1148 * those that don't, we initialize the GPIO direction bits,
1149 * and provide our own reset hook, which resets the MII.
1150 *
1151 * All of these boards use SIO-attached-MII media.
1152 */
1153 if (sc->sc_mediasw == &tlp_2114x_isv_mediasw)
1154 return;
1155
1156 strcpy(sc->sc_name, "Asante");
1157
1158 sc->sc_gp_dir = 0xbf;
1159 sc->sc_reset = tlp_pci_asante_21140_reset;
1160 sc->sc_mediasw = &tlp_sio_mii_mediasw;
1161 }
1162
1163 void
1164 tlp_pci_asante_21140_reset(sc)
1165 struct tulip_softc *sc;
1166 {
1167
1168 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir);
1169 TULIP_WRITE(sc, CSR_GPP, 0x8);
1170 delay(100);
1171 TULIP_WRITE(sc, CSR_GPP, 0);
1172 }
1173
1174 void tlp_pci_cobalt_21142_reset __P((struct tulip_softc *));
1175
1176 void
1177 tlp_pci_cobalt_21142_quirks(psc, enaddr)
1178 struct tulip_pci_softc *psc;
1179 const u_int8_t *enaddr;
1180 {
1181 struct tulip_softc *sc = &psc->sc_tulip;
1182
1183 /*
1184 * Cobalt Networks interfaces are just MII-on-SIO.
1185 */
1186 sc->sc_reset = tlp_pci_cobalt_21142_reset;
1187 sc->sc_mediasw = &tlp_sio_mii_mediasw;
1188
1189 /*
1190 * The Cobalt systems tend to fall back to store-and-forward
1191 * pretty quickly, so we select that from the beginning to
1192 * avoid initial timeouts.
1193 */
1194 sc->sc_txthresh = TXTH_SF;
1195 }
1196
1197 void
1198 tlp_pci_cobalt_21142_reset(sc)
1199 struct tulip_softc *sc;
1200 {
1201 /*
1202 * Reset PHY.
1203 */
1204 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE | (1 << 16));
1205 delay(10);
1206 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE);
1207 delay(10);
1208 }
1209