if_tlp_pci.c revision 1.51 1 /* $NetBSD: if_tlp_pci.c,v 1.51 2001/02/24 00:01:23 cgd Exp $ */
2
3 /*-
4 * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the NetBSD
22 * Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 * contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40 /*
41 * PCI bus front-end for the Digital Semiconductor ``Tulip'' (21x4x)
42 * Ethernet controller family driver.
43 */
44
45 #include "opt_inet.h"
46 #include "opt_ns.h"
47 #include "bpfilter.h"
48 #include "opt_tlp.h"
49
50 #include <sys/param.h>
51 #include <sys/systm.h>
52 #include <sys/mbuf.h>
53 #include <sys/malloc.h>
54 #include <sys/kernel.h>
55 #include <sys/socket.h>
56 #include <sys/ioctl.h>
57 #include <sys/errno.h>
58 #include <sys/device.h>
59
60 #include <machine/endian.h>
61
62 #include <net/if.h>
63 #include <net/if_dl.h>
64 #include <net/if_media.h>
65 #include <net/if_ether.h>
66
67 #if NBPFILTER > 0
68 #include <net/bpf.h>
69 #endif
70
71 #ifdef INET
72 #include <netinet/in.h>
73 #include <netinet/if_inarp.h>
74 #endif
75
76 #ifdef NS
77 #include <netns/ns.h>
78 #include <netns/ns_if.h>
79 #endif
80
81 #include <machine/bus.h>
82 #include <machine/intr.h>
83
84 #include <dev/mii/miivar.h>
85 #include <dev/mii/mii_bitbang.h>
86
87 #include <dev/ic/tulipreg.h>
88 #include <dev/ic/tulipvar.h>
89
90 #include <dev/pci/pcivar.h>
91 #include <dev/pci/pcireg.h>
92 #include <dev/pci/pcidevs.h>
93
94 /*
95 * PCI configuration space registers used by the Tulip.
96 */
97 #define TULIP_PCI_IOBA 0x10 /* i/o mapped base */
98 #define TULIP_PCI_MMBA 0x14 /* memory mapped base */
99 #define TULIP_PCI_CFDA 0x40 /* configuration driver area */
100
101 #define CFDA_SLEEP 0x80000000 /* sleep mode */
102 #define CFDA_SNOOZE 0x40000000 /* snooze mode */
103
104 struct tulip_pci_softc {
105 struct tulip_softc sc_tulip; /* real Tulip softc */
106
107 /* PCI-specific goo. */
108 void *sc_ih; /* interrupt handle */
109
110 pci_chipset_tag_t sc_pc; /* our PCI chipset */
111 pcitag_t sc_pcitag; /* our PCI tag */
112
113 int sc_flags; /* flags; see below */
114
115 LIST_HEAD(, tulip_pci_softc) sc_intrslaves;
116 LIST_ENTRY(tulip_pci_softc) sc_intrq;
117
118 /* Our {ROM,interrupt} master. */
119 struct tulip_pci_softc *sc_master;
120 };
121
122 /* sc_flags */
123 #define TULIP_PCI_SHAREDINTR 0x01 /* interrupt is shared */
124 #define TULIP_PCI_SLAVEINTR 0x02 /* interrupt is slave */
125 #define TULIP_PCI_SHAREDROM 0x04 /* ROM is shared */
126 #define TULIP_PCI_SLAVEROM 0x08 /* slave of shared ROM */
127
128 int tlp_pci_match __P((struct device *, struct cfdata *, void *));
129 void tlp_pci_attach __P((struct device *, struct device *, void *));
130
131 struct cfattach tlp_pci_ca = {
132 sizeof(struct tulip_pci_softc), tlp_pci_match, tlp_pci_attach,
133 };
134
135 const struct tulip_pci_product {
136 u_int32_t tpp_vendor; /* PCI vendor ID */
137 u_int32_t tpp_product; /* PCI product ID */
138 tulip_chip_t tpp_chip; /* base Tulip chip type */
139 } tlp_pci_products[] = {
140 #ifdef TLP_MATCH_21040
141 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21040,
142 TULIP_CHIP_21040 },
143 #endif
144 #ifdef TLP_MATCH_21041
145 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21041,
146 TULIP_CHIP_21041 },
147 #endif
148 #ifdef TLP_MATCH_21140
149 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21140,
150 TULIP_CHIP_21140 },
151 #endif
152 #ifdef TLP_MATCH_21142
153 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142,
154 TULIP_CHIP_21142 },
155 #endif
156
157 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C168,
158 TULIP_CHIP_82C168 },
159
160 /*
161 * Note: This is like a MX98725 with Wake-On-LAN and a
162 * 128-bit multicast hash table.
163 */
164 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C115,
165 TULIP_CHIP_82C115 },
166
167 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98713,
168 TULIP_CHIP_MX98713 },
169 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX987x5,
170 TULIP_CHIP_MX98715 },
171
172 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100TX,
173 TULIP_CHIP_MX98713 },
174
175 { PCI_VENDOR_WINBOND, PCI_PRODUCT_WINBOND_W89C840F,
176 TULIP_CHIP_WB89C840F },
177 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100ATX,
178 TULIP_CHIP_WB89C840F },
179
180 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9102,
181 TULIP_CHIP_DM9102 },
182
183 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AL981,
184 TULIP_CHIP_AL981 },
185
186 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN985,
187 TULIP_CHIP_AN985 },
188 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN2242,
189 TULIP_CHIP_AN985 },
190
191 #if 0
192 { PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX88140A,
193 TULIP_CHIP_AX88140 },
194 #endif
195
196 { 0, 0,
197 TULIP_CHIP_INVALID },
198 };
199
200 struct tlp_pci_quirks {
201 void (*tpq_func) __P((struct tulip_pci_softc *,
202 const u_int8_t *));
203 u_int8_t tpq_oui[3];
204 };
205
206 void tlp_pci_dec_quirks __P((struct tulip_pci_softc *,
207 const u_int8_t *));
208
209 void tlp_pci_znyx_21040_quirks __P((struct tulip_pci_softc *,
210 const u_int8_t *));
211 void tlp_pci_smc_21040_quirks __P((struct tulip_pci_softc *,
212 const u_int8_t *));
213 void tlp_pci_cogent_21040_quirks __P((struct tulip_pci_softc *,
214 const u_int8_t *));
215 void tlp_pci_accton_21040_quirks __P((struct tulip_pci_softc *,
216 const u_int8_t *));
217
218 void tlp_pci_cobalt_21142_quirks __P((struct tulip_pci_softc *,
219 const u_int8_t *));
220
221 const struct tlp_pci_quirks tlp_pci_21040_quirks[] = {
222 { tlp_pci_znyx_21040_quirks, { 0x00, 0xc0, 0x95 } },
223 { tlp_pci_smc_21040_quirks, { 0x00, 0x00, 0xc0 } },
224 { tlp_pci_cogent_21040_quirks, { 0x00, 0x00, 0x92 } },
225 { tlp_pci_accton_21040_quirks, { 0x00, 0x00, 0xe8 } },
226 { NULL, { 0, 0, 0 } }
227 };
228
229 const struct tlp_pci_quirks tlp_pci_21041_quirks[] = {
230 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } },
231 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } },
232 { NULL, { 0, 0, 0 } }
233 };
234
235 void tlp_pci_asante_21140_quirks __P((struct tulip_pci_softc *,
236 const u_int8_t *));
237
238 const struct tlp_pci_quirks tlp_pci_21140_quirks[] = {
239 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } },
240 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } },
241 { tlp_pci_asante_21140_quirks, { 0x00, 0x00, 0x94 } },
242 { NULL, { 0, 0, 0 } }
243 };
244
245 const struct tlp_pci_quirks tlp_pci_21142_quirks[] = {
246 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } },
247 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } },
248 { tlp_pci_cobalt_21142_quirks, { 0x00, 0x10, 0xe0 } },
249 { NULL, { 0, 0, 0 } }
250 };
251
252 int tlp_pci_shared_intr __P((void *));
253
254 const struct tulip_pci_product *tlp_pci_lookup
255 __P((const struct pci_attach_args *));
256 void tlp_pci_get_quirks __P((struct tulip_pci_softc *, const u_int8_t *,
257 const struct tlp_pci_quirks *));
258 void tlp_pci_check_slaved __P((struct tulip_pci_softc *, int, int));
259
260 const struct tulip_pci_product *
261 tlp_pci_lookup(pa)
262 const struct pci_attach_args *pa;
263 {
264 const struct tulip_pci_product *tpp;
265
266 for (tpp = tlp_pci_products;
267 tlp_chip_names[tpp->tpp_chip] != NULL;
268 tpp++) {
269 if (PCI_VENDOR(pa->pa_id) == tpp->tpp_vendor &&
270 PCI_PRODUCT(pa->pa_id) == tpp->tpp_product)
271 return (tpp);
272 }
273 return (NULL);
274 }
275
276 void
277 tlp_pci_get_quirks(psc, enaddr, tpq)
278 struct tulip_pci_softc *psc;
279 const u_int8_t *enaddr;
280 const struct tlp_pci_quirks *tpq;
281 {
282
283 for (; tpq->tpq_func != NULL; tpq++) {
284 if (tpq->tpq_oui[0] == enaddr[0] &&
285 tpq->tpq_oui[1] == enaddr[1] &&
286 tpq->tpq_oui[2] == enaddr[2]) {
287 (*tpq->tpq_func)(psc, enaddr);
288 return;
289 }
290 }
291 }
292
293 void
294 tlp_pci_check_slaved(psc, shared, slaved)
295 struct tulip_pci_softc *psc;
296 int shared, slaved;
297 {
298 extern struct cfdriver tlp_cd;
299 struct tulip_pci_softc *cur, *best = NULL;
300 struct tulip_softc *sc = &psc->sc_tulip;
301 int i;
302
303 /*
304 * First of all, find the lowest pcidev numbered device on our
305 * bus marked as shared. That should be our master.
306 */
307 for (i = 0; i < tlp_cd.cd_ndevs; i++) {
308 if ((cur = tlp_cd.cd_devs[i]) == NULL)
309 continue;
310 if (cur->sc_tulip.sc_dev.dv_parent != sc->sc_dev.dv_parent)
311 continue;
312 if ((cur->sc_flags & shared) == 0)
313 continue;
314 if (cur == psc)
315 continue;
316 if (best == NULL ||
317 best->sc_tulip.sc_devno > cur->sc_tulip.sc_devno)
318 best = cur;
319 }
320
321 if (best != NULL) {
322 psc->sc_master = best;
323 psc->sc_flags |= (shared | slaved);
324 }
325 }
326
327 int
328 tlp_pci_match(parent, match, aux)
329 struct device *parent;
330 struct cfdata *match;
331 void *aux;
332 {
333 struct pci_attach_args *pa = aux;
334
335 if (tlp_pci_lookup(pa) != NULL)
336 return (10); /* beat if_de.c */
337
338 return (0);
339 }
340
341 void
342 tlp_pci_attach(parent, self, aux)
343 struct device *parent, *self;
344 void *aux;
345 {
346 struct tulip_pci_softc *psc = (void *) self;
347 struct tulip_softc *sc = &psc->sc_tulip;
348 struct pci_attach_args *pa = aux;
349 pci_chipset_tag_t pc = pa->pa_pc;
350 pci_intr_handle_t ih;
351 const char *intrstr = NULL;
352 bus_space_tag_t iot, memt;
353 bus_space_handle_t ioh, memh;
354 int ioh_valid, memh_valid, i, j;
355 const struct tulip_pci_product *tpp;
356 u_int8_t enaddr[ETHER_ADDR_LEN];
357 u_int32_t val;
358 pcireg_t reg;
359 int pmreg;
360
361 sc->sc_devno = pa->pa_device;
362 psc->sc_pc = pa->pa_pc;
363 psc->sc_pcitag = pa->pa_tag;
364
365 LIST_INIT(&psc->sc_intrslaves);
366
367 tpp = tlp_pci_lookup(pa);
368 if (tpp == NULL) {
369 printf("\n");
370 panic("tlp_pci_attach: impossible");
371 }
372 sc->sc_chip = tpp->tpp_chip;
373
374 /*
375 * By default, Tulip registers are 8 bytes long (4 bytes
376 * followed by a 4 byte pad).
377 */
378 sc->sc_regshift = 3;
379
380 /*
381 * No power management hooks.
382 * XXX Maybe we should add some!
383 */
384 sc->sc_flags |= TULIPF_ENABLED;
385
386 /*
387 * Get revision info, and set some chip-specific variables.
388 */
389 sc->sc_rev = PCI_REVISION(pa->pa_class);
390 switch (sc->sc_chip) {
391 case TULIP_CHIP_21140:
392 if (sc->sc_rev >= 0x20)
393 sc->sc_chip = TULIP_CHIP_21140A;
394 break;
395
396 case TULIP_CHIP_21142:
397 if (sc->sc_rev >= 0x20)
398 sc->sc_chip = TULIP_CHIP_21143;
399 break;
400
401 case TULIP_CHIP_82C168:
402 if (sc->sc_rev >= 0x20)
403 sc->sc_chip = TULIP_CHIP_82C169;
404 break;
405
406 case TULIP_CHIP_MX98713:
407 if (sc->sc_rev >= 0x10)
408 sc->sc_chip = TULIP_CHIP_MX98713A;
409 break;
410
411 case TULIP_CHIP_MX98715:
412 if (sc->sc_rev >= 0x20)
413 sc->sc_chip = TULIP_CHIP_MX98715A;
414 if (sc->sc_rev >= 0x25)
415 sc->sc_chip = TULIP_CHIP_MX98715AEC_X;
416 if (sc->sc_rev >= 0x30)
417 sc->sc_chip = TULIP_CHIP_MX98725;
418 break;
419
420 case TULIP_CHIP_WB89C840F:
421 sc->sc_regshift = 2;
422 break;
423
424 case TULIP_CHIP_AN985:
425 /*
426 * The AN983 and AN985 are very similar, and are
427 * differentiated by a "signature" register that
428 * is like, but not identical, to a PCI ID register.
429 */
430 reg = pci_conf_read(pc, pa->pa_tag, 0x80);
431 switch (reg) {
432 case 0x09811317:
433 sc->sc_chip = TULIP_CHIP_AN985;
434 break;
435
436 case 0x09851317:
437 sc->sc_chip = TULIP_CHIP_AN983;
438 break;
439
440 default:
441 /* Unknown -- use default. */
442 break;
443 }
444 break;
445
446 case TULIP_CHIP_AX88140:
447 if (sc->sc_rev >= 0x10)
448 sc->sc_chip = TULIP_CHIP_AX88141;
449 break;
450
451 case TULIP_CHIP_DM9102:
452 if (sc->sc_rev >= 0x30)
453 sc->sc_chip = TULIP_CHIP_DM9102A;
454 break;
455
456 default:
457 /* Nothing. */
458 break;
459 }
460
461 printf(": %s Ethernet, pass %d.%d\n",
462 tlp_chip_names[sc->sc_chip],
463 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf);
464
465 switch (sc->sc_chip) {
466 case TULIP_CHIP_21040:
467 if (sc->sc_rev < 0x20) {
468 printf("%s: 21040 must be at least pass 2.0\n",
469 sc->sc_dev.dv_xname);
470 return;
471 }
472 break;
473
474 case TULIP_CHIP_21140:
475 if (sc->sc_rev < 0x11) {
476 printf("%s: 21140 must be at least pass 1.1\n",
477 sc->sc_dev.dv_xname);
478 return;
479 }
480 break;
481
482 default:
483 /* Nothing. */
484 break;
485 }
486
487 /*
488 * Check to see if the device is in power-save mode, and
489 * being it out if necessary.
490 */
491 switch (sc->sc_chip) {
492 case TULIP_CHIP_21140:
493 case TULIP_CHIP_21140A:
494 case TULIP_CHIP_21142:
495 case TULIP_CHIP_21143:
496 case TULIP_CHIP_MX98713A:
497 case TULIP_CHIP_MX98715:
498 case TULIP_CHIP_MX98715A:
499 case TULIP_CHIP_MX98715AEC_X:
500 case TULIP_CHIP_MX98725:
501 case TULIP_CHIP_DM9102:
502 case TULIP_CHIP_DM9102A:
503 /*
504 * Clear the "sleep mode" bit in the CFDA register.
505 */
506 reg = pci_conf_read(pc, pa->pa_tag, TULIP_PCI_CFDA);
507 if (reg & (CFDA_SLEEP|CFDA_SNOOZE))
508 pci_conf_write(pc, pa->pa_tag, TULIP_PCI_CFDA,
509 reg & ~(CFDA_SLEEP|CFDA_SNOOZE));
510 break;
511
512 default:
513 /* Nothing. */
514 break;
515 }
516
517 if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PWRMGMT, &pmreg, 0)) {
518 reg = pci_conf_read(pc, pa->pa_tag, pmreg + 4);
519 switch (reg & PCI_PMCSR_STATE_MASK) {
520 case PCI_PMCSR_STATE_D1:
521 case PCI_PMCSR_STATE_D2:
522 printf(": waking up from power state D%d\n%s",
523 reg & PCI_PMCSR_STATE_MASK, sc->sc_dev.dv_xname);
524 pci_conf_write(pc, pa->pa_tag, pmreg + 4,
525 (reg & ~PCI_PMCSR_STATE_MASK) |
526 PCI_PMCSR_STATE_D0);
527 break;
528 case PCI_PMCSR_STATE_D3:
529 /*
530 * The card has lost all configuration data in
531 * this state, so punt.
532 */
533 printf(": unable to wake up from power state D3, "
534 "reboot required.\n");
535 pci_conf_write(pc, pa->pa_tag, pmreg + 4,
536 (reg & ~PCI_PMCSR_STATE_MASK) |
537 PCI_PMCSR_STATE_D0);
538 return;
539 }
540 }
541
542 /*
543 * Map the device.
544 */
545 ioh_valid = (pci_mapreg_map(pa, TULIP_PCI_IOBA,
546 PCI_MAPREG_TYPE_IO, 0,
547 &iot, &ioh, NULL, NULL) == 0);
548 memh_valid = (pci_mapreg_map(pa, TULIP_PCI_MMBA,
549 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0,
550 &memt, &memh, NULL, NULL) == 0);
551
552 if (memh_valid) {
553 sc->sc_st = memt;
554 sc->sc_sh = memh;
555 } else if (ioh_valid) {
556 sc->sc_st = iot;
557 sc->sc_sh = ioh;
558 } else {
559 printf(": unable to map device registers\n");
560 return;
561 }
562
563 sc->sc_dmat = pa->pa_dmat;
564
565 /*
566 * Make sure bus mastering is enabled.
567 */
568 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
569 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) |
570 PCI_COMMAND_MASTER_ENABLE);
571
572 /*
573 * Get the cacheline size.
574 */
575 sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag,
576 PCI_BHLC_REG));
577
578 /*
579 * Get PCI data moving command info.
580 */
581 if (pa->pa_flags & PCI_FLAGS_MRL_OKAY)
582 sc->sc_flags |= TULIPF_MRL;
583 if (pa->pa_flags & PCI_FLAGS_MRM_OKAY)
584 sc->sc_flags |= TULIPF_MRM;
585 if (pa->pa_flags & PCI_FLAGS_MWI_OKAY)
586 sc->sc_flags |= TULIPF_MWI;
587
588 /*
589 * Read the contents of the Ethernet Address ROM/SROM.
590 */
591 switch (sc->sc_chip) {
592 case TULIP_CHIP_21040:
593 sc->sc_srom_addrbits = 6;
594 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, M_NOWAIT);
595 TULIP_WRITE(sc, CSR_MIIROM, MIIROM_SROMCS);
596 for (i = 0; i < TULIP_ROM_SIZE(6); i++) {
597 for (j = 0; j < 10000; j++) {
598 val = TULIP_READ(sc, CSR_MIIROM);
599 if ((val & MIIROM_DN) == 0)
600 break;
601 }
602 sc->sc_srom[i] = val & MIIROM_DATA;
603 }
604 break;
605
606 case TULIP_CHIP_82C168:
607 case TULIP_CHIP_82C169:
608 {
609 sc->sc_srom_addrbits = 2;
610 sc->sc_srom = malloc(TULIP_ROM_SIZE(2), M_DEVBUF, M_NOWAIT);
611
612 /*
613 * The Lite-On PNIC stores the Ethernet address in
614 * the first 3 words of the EEPROM. EEPROM access
615 * is not like the other Tulip chips.
616 */
617 for (i = 0; i < 6; i += 2) {
618 TULIP_WRITE(sc, CSR_PNIC_SROMCTL,
619 PNIC_SROMCTL_READ | (i >> 1));
620 for (j = 0; j < 500; j++) {
621 delay(2);
622 val = TULIP_READ(sc, CSR_MIIROM);
623 if ((val & PNIC_MIIROM_BUSY) == 0)
624 break;
625 }
626 if (val & PNIC_MIIROM_BUSY) {
627 printf("%s: EEPROM timed out\n",
628 sc->sc_dev.dv_xname);
629 return;
630 }
631 val &= PNIC_MIIROM_DATA;
632 sc->sc_srom[i] = val >> 8;
633 sc->sc_srom[i + 1] = val & 0xff;
634 }
635 break;
636 }
637
638 default:
639 if (tlp_read_srom(sc) == 0)
640 goto cant_cope;
641 break;
642 }
643
644 /*
645 * Deal with chip/board quirks. This includes setting up
646 * the mediasw, and extracting the Ethernet address from
647 * the rombuf.
648 */
649 switch (sc->sc_chip) {
650 case TULIP_CHIP_21040:
651 /* Check for a slaved ROM on a multi-port board. */
652 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDROM,
653 TULIP_PCI_SLAVEROM);
654 if (psc->sc_flags & TULIP_PCI_SLAVEROM)
655 memcpy(sc->sc_srom, psc->sc_master->sc_tulip.sc_srom,
656 sizeof(sc->sc_srom));
657
658 /*
659 * Parse the Ethernet Address ROM.
660 */
661 if (tlp_parse_old_srom(sc, enaddr) == 0)
662 goto cant_cope;
663
664 /*
665 * If we have a slaved ROM, adjust the Ethernet address.
666 */
667 if (psc->sc_flags & TULIP_PCI_SLAVEROM)
668 enaddr[5] +=
669 sc->sc_devno - psc->sc_master->sc_tulip.sc_devno;
670
671 /*
672 * All 21040 boards start out with the same
673 * media switch.
674 */
675 sc->sc_mediasw = &tlp_21040_mediasw;
676
677 /*
678 * Deal with any quirks this board might have.
679 */
680 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21040_quirks);
681 break;
682
683 case TULIP_CHIP_21041:
684 /* Check for a slaved ROM on a multi-port board. */
685 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDROM,
686 TULIP_PCI_SLAVEROM);
687 if (psc->sc_flags & TULIP_PCI_SLAVEROM)
688 memcpy(sc->sc_srom, psc->sc_master->sc_tulip.sc_srom,
689 sizeof(sc->sc_srom));
690
691 /* Check for new format SROM. */
692 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) {
693 /*
694 * Not an ISV SROM; try the old DEC Ethernet Address
695 * ROM format.
696 */
697 if (tlp_parse_old_srom(sc, enaddr) == 0)
698 goto cant_cope;
699 }
700
701 /*
702 * All 21041 boards use the same media switch; they all
703 * work basically the same! Yippee!
704 */
705 sc->sc_mediasw = &tlp_21041_mediasw;
706
707 /*
708 * Deal with any quirks this board might have.
709 */
710 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21041_quirks);
711 break;
712
713 case TULIP_CHIP_21140:
714 case TULIP_CHIP_21140A:
715 /* Check for new format SROM. */
716 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) {
717 /*
718 * Not an ISV SROM; try the old DEC Ethernet Address
719 * ROM format.
720 */
721 if (tlp_parse_old_srom(sc, enaddr) == 0)
722 goto cant_cope;
723 } else {
724 /*
725 * We start out with the 2114x ISV media switch.
726 * When we search for quirks, we may change to
727 * a different switch.
728 */
729 sc->sc_mediasw = &tlp_2114x_isv_mediasw;
730 }
731
732 /*
733 * Deal with any quirks this board might have.
734 */
735 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21140_quirks);
736
737 /*
738 * Bail out now if we can't deal with this board.
739 */
740 if (sc->sc_mediasw == NULL)
741 goto cant_cope;
742 break;
743
744 case TULIP_CHIP_21142:
745 case TULIP_CHIP_21143:
746 /* Check for new format SROM. */
747 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) {
748 /*
749 * Not an ISV SROM; try the old DEC Ethernet Address
750 * ROM format.
751 */
752 if (tlp_parse_old_srom(sc, enaddr) == 0)
753 goto cant_cope;
754 } else {
755 /*
756 * We start out with the 2114x ISV media switch.
757 * When we search for quirks, we may change to
758 * a different switch.
759 */
760 sc->sc_mediasw = &tlp_2114x_isv_mediasw;
761 }
762
763 /*
764 * Deal with any quirks this board might have.
765 */
766 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21142_quirks);
767
768 /*
769 * Bail out now if we can't deal with this board.
770 */
771 if (sc->sc_mediasw == NULL)
772 goto cant_cope;
773 break;
774
775 case TULIP_CHIP_82C168:
776 case TULIP_CHIP_82C169:
777 /*
778 * Lite-On PNIC's Ethernet address is the first 6
779 * bytes of its EEPROM.
780 */
781 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN);
782
783 /*
784 * Lite-On PNICs always use the same mediasw; we
785 * select MII vs. internal NWAY automatically.
786 */
787 sc->sc_mediasw = &tlp_pnic_mediasw;
788 break;
789
790 case TULIP_CHIP_MX98713:
791 /*
792 * The Macronix MX98713 has an MII and GPIO, but no
793 * internal Nway block. This chip is basically a
794 * perfect 21140A clone, with the exception of the
795 * a magic register frobbing in order to make the
796 * interface function.
797 */
798 if (tlp_isv_srom_enaddr(sc, enaddr)) {
799 sc->sc_mediasw = &tlp_2114x_isv_mediasw;
800 break;
801 }
802 /* FALLTHROUGH */
803
804 case TULIP_CHIP_82C115:
805 /*
806 * Yippee! The Lite-On 82C115 is a clone of
807 * the MX98725 (the data sheet even says `MXIC'
808 * on it)! Imagine that, a clone of a clone.
809 *
810 * The differences are really minimal:
811 *
812 * - Wake-On-LAN support
813 * - 128-bit multicast hash table, rather than
814 * the standard 512-bit hash table
815 */
816 /* FALLTHROUGH */
817
818 case TULIP_CHIP_MX98713A:
819 case TULIP_CHIP_MX98715A:
820 case TULIP_CHIP_MX98715AEC_X:
821 case TULIP_CHIP_MX98725:
822 /*
823 * The MX98713A has an MII as well as an internal Nway block,
824 * but no GPIO. The MX98715 and MX98725 have an internal
825 * Nway block only.
826 *
827 * The internal Nway block, unlike the Lite-On PNIC's, does
828 * just that - performs Nway. Once autonegotiation completes,
829 * we must program the GPR media information into the chip.
830 *
831 * The byte offset of the Ethernet address is stored at
832 * offset 0x70.
833 */
834 memcpy(enaddr, &sc->sc_srom[sc->sc_srom[0x70]], ETHER_ADDR_LEN);
835 sc->sc_mediasw = &tlp_pmac_mediasw;
836 break;
837
838 case TULIP_CHIP_WB89C840F:
839 /*
840 * Winbond 89C840F's Ethernet address is the first
841 * 6 bytes of its EEPROM.
842 */
843 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN);
844
845 /*
846 * Winbond 89C840F has an MII attached to the SIO.
847 */
848 sc->sc_mediasw = &tlp_sio_mii_mediasw;
849 break;
850
851 case TULIP_CHIP_AL981:
852 /*
853 * The ADMtek AL981's Ethernet address is located
854 * at offset 8 of its EEPROM.
855 */
856 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN);
857
858 /*
859 * ADMtek AL981 has a built-in PHY accessed through
860 * special registers.
861 */
862 sc->sc_mediasw = &tlp_al981_mediasw;
863 break;
864
865 case TULIP_CHIP_AN983:
866 case TULIP_CHIP_AN985:
867 /*
868 * The ADMtek AN985's Ethernet address is located
869 * at offset 8 of its EEPROM.
870 */
871 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN);
872
873 /*
874 * The ADMtek AN985 can be configured in Single-Chip
875 * mode or MAC-only mode. Single-Chip uses the built-in
876 * PHY, MAC-only has an external PHY (usually HomePNA).
877 * The selection is based on an EEPROM setting, and both
878 * PHYs are accessed via MII attached to SIO.
879 *
880 * The AN985 "ghosts" the internal PHY onto all
881 * MII addresses, so we have to use a media init
882 * routine that limits the search.
883 * XXX How does this work with MAC-only mode?
884 */
885 sc->sc_mediasw = &tlp_an985_mediasw;
886 break;
887
888 case TULIP_CHIP_DM9102:
889 case TULIP_CHIP_DM9102A:
890 /*
891 * Some boards with the Davicom chip have an ISV
892 * SROM (mostly DM9102A boards -- trying to describe
893 * the HomePNA PHY, probably) although the data in
894 * them is generally wrong. Check for ISV format
895 * and grab the Ethernet address that way, and if
896 * that fails, fall back on grabbing it from an
897 * observed offset of 20 (which is where it would
898 * be in an ISV SROM anyhow, tho ISV can cope with
899 * multi-port boards).
900 */
901 if (tlp_isv_srom_enaddr(sc, enaddr))
902 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN);
903
904 /*
905 * Davicom chips all have an internal MII interface
906 * and a built-in PHY. DM9102A also has a an external
907 * MII interface, usually with a HomePNA PHY attached
908 * to it.
909 */
910 sc->sc_mediasw = &tlp_dm9102_mediasw;
911 break;
912
913 default:
914 cant_cope:
915 printf("%s: sorry, unable to handle your board\n",
916 sc->sc_dev.dv_xname);
917 return;
918 }
919
920 /*
921 * Handle shared interrupts.
922 */
923 if (psc->sc_flags & TULIP_PCI_SHAREDINTR) {
924 if (psc->sc_master)
925 psc->sc_flags |= TULIP_PCI_SLAVEINTR;
926 else {
927 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDINTR,
928 TULIP_PCI_SLAVEINTR);
929 if (psc->sc_master == NULL)
930 psc->sc_master = psc;
931 }
932 LIST_INSERT_HEAD(&psc->sc_master->sc_intrslaves,
933 psc, sc_intrq);
934 }
935
936 if (psc->sc_flags & TULIP_PCI_SLAVEINTR) {
937 printf("%s: sharing interrupt with %s\n",
938 sc->sc_dev.dv_xname,
939 psc->sc_master->sc_tulip.sc_dev.dv_xname);
940 } else {
941 /*
942 * Map and establish our interrupt.
943 */
944 if (pci_intr_map(pa, &ih)) {
945 printf("%s: unable to map interrupt\n",
946 sc->sc_dev.dv_xname);
947 return;
948 }
949 intrstr = pci_intr_string(pc, ih);
950 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET,
951 (psc->sc_flags & TULIP_PCI_SHAREDINTR) ?
952 tlp_pci_shared_intr : tlp_intr, sc);
953 if (psc->sc_ih == NULL) {
954 printf("%s: unable to establish interrupt",
955 sc->sc_dev.dv_xname);
956 if (intrstr != NULL)
957 printf(" at %s", intrstr);
958 printf("\n");
959 return;
960 }
961 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname,
962 intrstr);
963 }
964
965 /*
966 * Finish off the attach.
967 */
968 tlp_attach(sc, enaddr);
969 }
970
971 int
972 tlp_pci_shared_intr(arg)
973 void *arg;
974 {
975 struct tulip_pci_softc *master = arg, *slave;
976 int rv = 0;
977
978 for (slave = LIST_FIRST(&master->sc_intrslaves);
979 slave != NULL;
980 slave = LIST_NEXT(slave, sc_intrq))
981 rv |= tlp_intr(&slave->sc_tulip);
982
983 return (rv);
984 }
985
986 void
987 tlp_pci_dec_quirks(psc, enaddr)
988 struct tulip_pci_softc *psc;
989 const u_int8_t *enaddr;
990 {
991 struct tulip_softc *sc = &psc->sc_tulip;
992
993 /*
994 * This isn't really a quirk-gathering device, really. We
995 * just want to get the spiffy DEC board name from the SROM.
996 */
997 strcpy(sc->sc_name, "DEC ");
998
999 if (memcmp(&sc->sc_srom[29], "DE500", 5) == 0 ||
1000 memcmp(&sc->sc_srom[29], "DE450", 5) == 0)
1001 memcpy(&sc->sc_name[4], &sc->sc_srom[29], 8);
1002 }
1003
1004 void
1005 tlp_pci_znyx_21040_quirks(psc, enaddr)
1006 struct tulip_pci_softc *psc;
1007 const u_int8_t *enaddr;
1008 {
1009 struct tulip_softc *sc = &psc->sc_tulip;
1010 u_int16_t id = 0;
1011
1012 /*
1013 * If we have a slaved ROM, just copy the bits from the master.
1014 * This is in case we fail the ROM ID check (older boards) and
1015 * need to fall back on Ethernet address model checking; that
1016 * will fail for slave chips.
1017 */
1018 if (psc->sc_flags & TULIP_PCI_SLAVEROM) {
1019 strcpy(sc->sc_name, psc->sc_master->sc_tulip.sc_name);
1020 sc->sc_mediasw = psc->sc_master->sc_tulip.sc_mediasw;
1021 psc->sc_flags |=
1022 psc->sc_master->sc_flags & TULIP_PCI_SHAREDINTR;
1023 return;
1024 }
1025
1026 if (sc->sc_srom[32] == 0x4a && sc->sc_srom[33] == 0x52) {
1027 id = sc->sc_srom[37] | (sc->sc_srom[36] << 8);
1028 switch (id) {
1029 zx312:
1030 case 0x0602: /* ZX312 */
1031 strcpy(sc->sc_name, "ZNYX ZX312");
1032 return;
1033
1034 case 0x0622: /* ZX312T */
1035 strcpy(sc->sc_name, "ZNYX ZX312T");
1036 sc->sc_mediasw = &tlp_21040_tp_mediasw;
1037 return;
1038
1039 zx314_inta:
1040 case 0x0701: /* ZX314 INTA */
1041 psc->sc_flags |= TULIP_PCI_SHAREDINTR;
1042 /* FALLTHROUGH */
1043 case 0x0711: /* ZX314 */
1044 strcpy(sc->sc_name, "ZNYX ZX314");
1045 psc->sc_flags |= TULIP_PCI_SHAREDROM;
1046 sc->sc_mediasw = &tlp_21040_tp_mediasw;
1047 return;
1048
1049 zx315_inta:
1050 case 0x0801: /* ZX315 INTA */
1051 psc->sc_flags |= TULIP_PCI_SHAREDINTR;
1052 /* FALLTHROUGH */
1053 case 0x0811: /* ZX315 */
1054 strcpy(sc->sc_name, "ZNYX ZX315");
1055 psc->sc_flags |= TULIP_PCI_SHAREDROM;
1056 return;
1057
1058 default:
1059 id = 0;
1060 break;
1061 }
1062 }
1063
1064 /*
1065 * Deal with boards that have broken ROMs.
1066 */
1067 if (id == 0) {
1068 if ((enaddr[3] & ~3) == 0xf0 && (enaddr[5] & 3) == 0x00)
1069 goto zx314_inta;
1070 if ((enaddr[3] & ~3) == 0xf4 && (enaddr[5] & 1) == 0x00)
1071 goto zx315_inta;
1072 if ((enaddr[3] & ~3) == 0xec)
1073 goto zx312;
1074 }
1075
1076 strcpy(sc->sc_name, "ZNYX ZX31x");
1077 }
1078
1079 void
1080 tlp_pci_smc_21040_quirks(psc, enaddr)
1081 struct tulip_pci_softc *psc;
1082 const u_int8_t *enaddr;
1083 {
1084 struct tulip_softc *sc = &psc->sc_tulip;
1085 u_int16_t id1, id2, ei;
1086 int auibnc = 0, utp = 0;
1087 char *cp;
1088
1089 id1 = sc->sc_srom[0x60] | (sc->sc_srom[0x61] << 8);
1090 id2 = sc->sc_srom[0x62] | (sc->sc_srom[0x63] << 8);
1091 ei = sc->sc_srom[0x66] | (sc->sc_srom[0x67] << 8);
1092
1093 strcpy(sc->sc_name, "SMC 8432");
1094 cp = &sc->sc_name[8];
1095
1096 if ((id1 & 1) == 0) {
1097 *cp++ = 'B';
1098 auibnc = 1;
1099 }
1100 if ((id1 & 0xff) > 0x32) {
1101 *cp++ = 'T';
1102 utp = 1;
1103 }
1104 if ((id1 & 0x4000) == 0) {
1105 *cp++ = 'A';
1106 auibnc = 1;
1107 }
1108 if (id2 == 0x15) {
1109 sc->sc_name[7] = '4';
1110 *cp++ = '-';
1111 *cp++ = 'C';
1112 *cp++ = 'H';
1113 *cp++ = ei ? '2' : '1';
1114 }
1115 *cp = '\0';
1116
1117 if (utp != 0 && auibnc == 0)
1118 sc->sc_mediasw = &tlp_21040_tp_mediasw;
1119 else if (utp == 0 && auibnc != 0)
1120 sc->sc_mediasw = &tlp_21040_auibnc_mediasw;
1121 }
1122
1123 void
1124 tlp_pci_cogent_21040_quirks(psc, enaddr)
1125 struct tulip_pci_softc *psc;
1126 const u_int8_t *enaddr;
1127 {
1128
1129 strcpy(psc->sc_tulip.sc_name, "Cogent multi-port");
1130 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM;
1131 }
1132
1133 void
1134 tlp_pci_accton_21040_quirks(psc, enaddr)
1135 struct tulip_pci_softc *psc;
1136 const u_int8_t *enaddr;
1137 {
1138
1139 strcpy(psc->sc_tulip.sc_name, "ACCTON EN1203");
1140 }
1141
1142 void tlp_pci_asante_21140_reset __P((struct tulip_softc *));
1143
1144 void
1145 tlp_pci_asante_21140_quirks(psc, enaddr)
1146 struct tulip_pci_softc *psc;
1147 const u_int8_t *enaddr;
1148 {
1149 struct tulip_softc *sc = &psc->sc_tulip;
1150
1151 /*
1152 * Some Asante boards don't use the ISV SROM format. For
1153 * those that don't, we initialize the GPIO direction bits,
1154 * and provide our own reset hook, which resets the MII.
1155 *
1156 * All of these boards use SIO-attached-MII media.
1157 */
1158 if (sc->sc_mediasw == &tlp_2114x_isv_mediasw)
1159 return;
1160
1161 strcpy(sc->sc_name, "Asante");
1162
1163 sc->sc_gp_dir = 0xbf;
1164 sc->sc_reset = tlp_pci_asante_21140_reset;
1165 sc->sc_mediasw = &tlp_sio_mii_mediasw;
1166 }
1167
1168 void
1169 tlp_pci_asante_21140_reset(sc)
1170 struct tulip_softc *sc;
1171 {
1172
1173 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir);
1174 TULIP_WRITE(sc, CSR_GPP, 0x8);
1175 delay(100);
1176 TULIP_WRITE(sc, CSR_GPP, 0);
1177 }
1178
1179 void tlp_pci_cobalt_21142_reset __P((struct tulip_softc *));
1180
1181 void
1182 tlp_pci_cobalt_21142_quirks(psc, enaddr)
1183 struct tulip_pci_softc *psc;
1184 const u_int8_t *enaddr;
1185 {
1186 struct tulip_softc *sc = &psc->sc_tulip;
1187
1188 /*
1189 * Cobalt Networks interfaces are just MII-on-SIO.
1190 */
1191 sc->sc_reset = tlp_pci_cobalt_21142_reset;
1192 sc->sc_mediasw = &tlp_sio_mii_mediasw;
1193
1194 /*
1195 * The Cobalt systems tend to fall back to store-and-forward
1196 * pretty quickly, so we select that from the beginning to
1197 * avoid initial timeouts.
1198 */
1199 sc->sc_txthresh = TXTH_SF;
1200 }
1201
1202 void
1203 tlp_pci_cobalt_21142_reset(sc)
1204 struct tulip_softc *sc;
1205 {
1206 /*
1207 * Reset PHY.
1208 */
1209 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE | (1 << 16));
1210 delay(10);
1211 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE);
1212 delay(10);
1213 }
1214