if_tlp_pci.c revision 1.51.2.1
1 /* $NetBSD: if_tlp_pci.c,v 1.51.2.1 2001/06/21 20:04:53 nathanw Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * PCI bus front-end for the Digital Semiconductor ``Tulip'' (21x4x) 42 * Ethernet controller family driver. 43 */ 44 45 #include "bpfilter.h" 46 #include "opt_tlp.h" 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/mbuf.h> 51 #include <sys/malloc.h> 52 #include <sys/kernel.h> 53 #include <sys/socket.h> 54 #include <sys/ioctl.h> 55 #include <sys/errno.h> 56 #include <sys/device.h> 57 58 #include <machine/endian.h> 59 60 #include <net/if.h> 61 #include <net/if_dl.h> 62 #include <net/if_media.h> 63 #include <net/if_ether.h> 64 65 #if NBPFILTER > 0 66 #include <net/bpf.h> 67 #endif 68 69 #include <machine/bus.h> 70 #include <machine/intr.h> 71 72 #include <dev/mii/miivar.h> 73 #include <dev/mii/mii_bitbang.h> 74 75 #include <dev/ic/tulipreg.h> 76 #include <dev/ic/tulipvar.h> 77 78 #include <dev/pci/pcivar.h> 79 #include <dev/pci/pcireg.h> 80 #include <dev/pci/pcidevs.h> 81 82 /* 83 * PCI configuration space registers used by the Tulip. 84 */ 85 #define TULIP_PCI_IOBA 0x10 /* i/o mapped base */ 86 #define TULIP_PCI_MMBA 0x14 /* memory mapped base */ 87 #define TULIP_PCI_CFDA 0x40 /* configuration driver area */ 88 89 #define CFDA_SLEEP 0x80000000 /* sleep mode */ 90 #define CFDA_SNOOZE 0x40000000 /* snooze mode */ 91 92 struct tulip_pci_softc { 93 struct tulip_softc sc_tulip; /* real Tulip softc */ 94 95 /* PCI-specific goo. */ 96 void *sc_ih; /* interrupt handle */ 97 98 pci_chipset_tag_t sc_pc; /* our PCI chipset */ 99 pcitag_t sc_pcitag; /* our PCI tag */ 100 101 int sc_flags; /* flags; see below */ 102 103 LIST_HEAD(, tulip_pci_softc) sc_intrslaves; 104 LIST_ENTRY(tulip_pci_softc) sc_intrq; 105 106 /* Our {ROM,interrupt} master. */ 107 struct tulip_pci_softc *sc_master; 108 }; 109 110 /* sc_flags */ 111 #define TULIP_PCI_SHAREDINTR 0x01 /* interrupt is shared */ 112 #define TULIP_PCI_SLAVEINTR 0x02 /* interrupt is slave */ 113 #define TULIP_PCI_SHAREDROM 0x04 /* ROM is shared */ 114 #define TULIP_PCI_SLAVEROM 0x08 /* slave of shared ROM */ 115 116 int tlp_pci_match __P((struct device *, struct cfdata *, void *)); 117 void tlp_pci_attach __P((struct device *, struct device *, void *)); 118 119 struct cfattach tlp_pci_ca = { 120 sizeof(struct tulip_pci_softc), tlp_pci_match, tlp_pci_attach, 121 }; 122 123 const struct tulip_pci_product { 124 u_int32_t tpp_vendor; /* PCI vendor ID */ 125 u_int32_t tpp_product; /* PCI product ID */ 126 tulip_chip_t tpp_chip; /* base Tulip chip type */ 127 } tlp_pci_products[] = { 128 #ifdef TLP_MATCH_21040 129 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21040, 130 TULIP_CHIP_21040 }, 131 #endif 132 #ifdef TLP_MATCH_21041 133 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21041, 134 TULIP_CHIP_21041 }, 135 #endif 136 #ifdef TLP_MATCH_21140 137 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21140, 138 TULIP_CHIP_21140 }, 139 #endif 140 #ifdef TLP_MATCH_21142 141 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142, 142 TULIP_CHIP_21142 }, 143 #endif 144 145 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C168, 146 TULIP_CHIP_82C168 }, 147 148 /* 149 * Note: This is like a MX98725 with Wake-On-LAN and a 150 * 128-bit multicast hash table. 151 */ 152 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C115, 153 TULIP_CHIP_82C115 }, 154 155 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98713, 156 TULIP_CHIP_MX98713 }, 157 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX987x5, 158 TULIP_CHIP_MX98715 }, 159 160 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100TX, 161 TULIP_CHIP_MX98713 }, 162 163 { PCI_VENDOR_WINBOND, PCI_PRODUCT_WINBOND_W89C840F, 164 TULIP_CHIP_WB89C840F }, 165 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100ATX, 166 TULIP_CHIP_WB89C840F }, 167 168 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9102, 169 TULIP_CHIP_DM9102 }, 170 171 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AL981, 172 TULIP_CHIP_AL981 }, 173 174 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN985, 175 TULIP_CHIP_AN985 }, 176 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN2242, 177 TULIP_CHIP_AN985 }, 178 179 #if 0 180 { PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX88140A, 181 TULIP_CHIP_AX88140 }, 182 #endif 183 184 { 0, 0, 185 TULIP_CHIP_INVALID }, 186 }; 187 188 struct tlp_pci_quirks { 189 void (*tpq_func) __P((struct tulip_pci_softc *, 190 const u_int8_t *)); 191 u_int8_t tpq_oui[3]; 192 }; 193 194 void tlp_pci_dec_quirks __P((struct tulip_pci_softc *, 195 const u_int8_t *)); 196 197 void tlp_pci_znyx_21040_quirks __P((struct tulip_pci_softc *, 198 const u_int8_t *)); 199 void tlp_pci_smc_21040_quirks __P((struct tulip_pci_softc *, 200 const u_int8_t *)); 201 void tlp_pci_cogent_21040_quirks __P((struct tulip_pci_softc *, 202 const u_int8_t *)); 203 void tlp_pci_accton_21040_quirks __P((struct tulip_pci_softc *, 204 const u_int8_t *)); 205 206 void tlp_pci_cobalt_21142_quirks __P((struct tulip_pci_softc *, 207 const u_int8_t *)); 208 void tlp_pci_algor_21142_quirks __P((struct tulip_pci_softc *, 209 const u_int8_t *)); 210 211 const struct tlp_pci_quirks tlp_pci_21040_quirks[] = { 212 { tlp_pci_znyx_21040_quirks, { 0x00, 0xc0, 0x95 } }, 213 { tlp_pci_smc_21040_quirks, { 0x00, 0x00, 0xc0 } }, 214 { tlp_pci_cogent_21040_quirks, { 0x00, 0x00, 0x92 } }, 215 { tlp_pci_accton_21040_quirks, { 0x00, 0x00, 0xe8 } }, 216 { NULL, { 0, 0, 0 } } 217 }; 218 219 const struct tlp_pci_quirks tlp_pci_21041_quirks[] = { 220 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 221 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 222 { NULL, { 0, 0, 0 } } 223 }; 224 225 void tlp_pci_asante_21140_quirks __P((struct tulip_pci_softc *, 226 const u_int8_t *)); 227 228 const struct tlp_pci_quirks tlp_pci_21140_quirks[] = { 229 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 230 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 231 { tlp_pci_asante_21140_quirks, { 0x00, 0x00, 0x94 } }, 232 { NULL, { 0, 0, 0 } } 233 }; 234 235 const struct tlp_pci_quirks tlp_pci_21142_quirks[] = { 236 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 237 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 238 { tlp_pci_cobalt_21142_quirks, { 0x00, 0x10, 0xe0 } }, 239 { tlp_pci_algor_21142_quirks, { 0x00, 0x40, 0xbc } }, 240 { NULL, { 0, 0, 0 } } 241 }; 242 243 int tlp_pci_shared_intr __P((void *)); 244 245 const struct tulip_pci_product *tlp_pci_lookup 246 __P((const struct pci_attach_args *)); 247 void tlp_pci_get_quirks __P((struct tulip_pci_softc *, const u_int8_t *, 248 const struct tlp_pci_quirks *)); 249 void tlp_pci_check_slaved __P((struct tulip_pci_softc *, int, int)); 250 251 const struct tulip_pci_product * 252 tlp_pci_lookup(pa) 253 const struct pci_attach_args *pa; 254 { 255 const struct tulip_pci_product *tpp; 256 257 for (tpp = tlp_pci_products; 258 tlp_chip_names[tpp->tpp_chip] != NULL; 259 tpp++) { 260 if (PCI_VENDOR(pa->pa_id) == tpp->tpp_vendor && 261 PCI_PRODUCT(pa->pa_id) == tpp->tpp_product) 262 return (tpp); 263 } 264 return (NULL); 265 } 266 267 void 268 tlp_pci_get_quirks(psc, enaddr, tpq) 269 struct tulip_pci_softc *psc; 270 const u_int8_t *enaddr; 271 const struct tlp_pci_quirks *tpq; 272 { 273 274 for (; tpq->tpq_func != NULL; tpq++) { 275 if (tpq->tpq_oui[0] == enaddr[0] && 276 tpq->tpq_oui[1] == enaddr[1] && 277 tpq->tpq_oui[2] == enaddr[2]) { 278 (*tpq->tpq_func)(psc, enaddr); 279 return; 280 } 281 } 282 } 283 284 void 285 tlp_pci_check_slaved(psc, shared, slaved) 286 struct tulip_pci_softc *psc; 287 int shared, slaved; 288 { 289 extern struct cfdriver tlp_cd; 290 struct tulip_pci_softc *cur, *best = NULL; 291 struct tulip_softc *sc = &psc->sc_tulip; 292 int i; 293 294 /* 295 * First of all, find the lowest pcidev numbered device on our 296 * bus marked as shared. That should be our master. 297 */ 298 for (i = 0; i < tlp_cd.cd_ndevs; i++) { 299 if ((cur = tlp_cd.cd_devs[i]) == NULL) 300 continue; 301 if (cur->sc_tulip.sc_dev.dv_parent != sc->sc_dev.dv_parent) 302 continue; 303 if ((cur->sc_flags & shared) == 0) 304 continue; 305 if (cur == psc) 306 continue; 307 if (best == NULL || 308 best->sc_tulip.sc_devno > cur->sc_tulip.sc_devno) 309 best = cur; 310 } 311 312 if (best != NULL) { 313 psc->sc_master = best; 314 psc->sc_flags |= (shared | slaved); 315 } 316 } 317 318 int 319 tlp_pci_match(parent, match, aux) 320 struct device *parent; 321 struct cfdata *match; 322 void *aux; 323 { 324 struct pci_attach_args *pa = aux; 325 326 if (tlp_pci_lookup(pa) != NULL) 327 return (10); /* beat if_de.c */ 328 329 return (0); 330 } 331 332 void 333 tlp_pci_attach(parent, self, aux) 334 struct device *parent, *self; 335 void *aux; 336 { 337 struct tulip_pci_softc *psc = (void *) self; 338 struct tulip_softc *sc = &psc->sc_tulip; 339 struct pci_attach_args *pa = aux; 340 pci_chipset_tag_t pc = pa->pa_pc; 341 pci_intr_handle_t ih; 342 const char *intrstr = NULL; 343 bus_space_tag_t iot, memt; 344 bus_space_handle_t ioh, memh; 345 int ioh_valid, memh_valid, i, j; 346 const struct tulip_pci_product *tpp; 347 u_int8_t enaddr[ETHER_ADDR_LEN]; 348 u_int32_t val; 349 pcireg_t reg; 350 int pmreg; 351 352 sc->sc_devno = pa->pa_device; 353 psc->sc_pc = pa->pa_pc; 354 psc->sc_pcitag = pa->pa_tag; 355 356 LIST_INIT(&psc->sc_intrslaves); 357 358 tpp = tlp_pci_lookup(pa); 359 if (tpp == NULL) { 360 printf("\n"); 361 panic("tlp_pci_attach: impossible"); 362 } 363 sc->sc_chip = tpp->tpp_chip; 364 365 /* 366 * By default, Tulip registers are 8 bytes long (4 bytes 367 * followed by a 4 byte pad). 368 */ 369 sc->sc_regshift = 3; 370 371 /* 372 * No power management hooks. 373 * XXX Maybe we should add some! 374 */ 375 sc->sc_flags |= TULIPF_ENABLED; 376 377 /* 378 * Get revision info, and set some chip-specific variables. 379 */ 380 sc->sc_rev = PCI_REVISION(pa->pa_class); 381 switch (sc->sc_chip) { 382 case TULIP_CHIP_21140: 383 if (sc->sc_rev >= 0x20) 384 sc->sc_chip = TULIP_CHIP_21140A; 385 break; 386 387 case TULIP_CHIP_21142: 388 if (sc->sc_rev >= 0x20) 389 sc->sc_chip = TULIP_CHIP_21143; 390 break; 391 392 case TULIP_CHIP_82C168: 393 if (sc->sc_rev >= 0x20) 394 sc->sc_chip = TULIP_CHIP_82C169; 395 break; 396 397 case TULIP_CHIP_MX98713: 398 if (sc->sc_rev >= 0x10) 399 sc->sc_chip = TULIP_CHIP_MX98713A; 400 break; 401 402 case TULIP_CHIP_MX98715: 403 if (sc->sc_rev >= 0x20) 404 sc->sc_chip = TULIP_CHIP_MX98715A; 405 if (sc->sc_rev >= 0x25) 406 sc->sc_chip = TULIP_CHIP_MX98715AEC_X; 407 if (sc->sc_rev >= 0x30) 408 sc->sc_chip = TULIP_CHIP_MX98725; 409 break; 410 411 case TULIP_CHIP_WB89C840F: 412 sc->sc_regshift = 2; 413 break; 414 415 case TULIP_CHIP_AN985: 416 /* 417 * The AN983 and AN985 are very similar, and are 418 * differentiated by a "signature" register that 419 * is like, but not identical, to a PCI ID register. 420 */ 421 reg = pci_conf_read(pc, pa->pa_tag, 0x80); 422 switch (reg) { 423 case 0x09811317: 424 sc->sc_chip = TULIP_CHIP_AN985; 425 break; 426 427 case 0x09851317: 428 sc->sc_chip = TULIP_CHIP_AN983; 429 break; 430 431 default: 432 /* Unknown -- use default. */ 433 break; 434 } 435 break; 436 437 case TULIP_CHIP_AX88140: 438 if (sc->sc_rev >= 0x10) 439 sc->sc_chip = TULIP_CHIP_AX88141; 440 break; 441 442 case TULIP_CHIP_DM9102: 443 if (sc->sc_rev >= 0x30) 444 sc->sc_chip = TULIP_CHIP_DM9102A; 445 break; 446 447 default: 448 /* Nothing. */ 449 break; 450 } 451 452 printf(": %s Ethernet, pass %d.%d\n", 453 tlp_chip_names[sc->sc_chip], 454 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf); 455 456 switch (sc->sc_chip) { 457 case TULIP_CHIP_21040: 458 if (sc->sc_rev < 0x20) { 459 printf("%s: 21040 must be at least pass 2.0\n", 460 sc->sc_dev.dv_xname); 461 return; 462 } 463 break; 464 465 case TULIP_CHIP_21140: 466 if (sc->sc_rev < 0x11) { 467 printf("%s: 21140 must be at least pass 1.1\n", 468 sc->sc_dev.dv_xname); 469 return; 470 } 471 break; 472 473 default: 474 /* Nothing. */ 475 break; 476 } 477 478 /* 479 * Check to see if the device is in power-save mode, and 480 * being it out if necessary. 481 */ 482 switch (sc->sc_chip) { 483 case TULIP_CHIP_21140: 484 case TULIP_CHIP_21140A: 485 case TULIP_CHIP_21142: 486 case TULIP_CHIP_21143: 487 case TULIP_CHIP_MX98713A: 488 case TULIP_CHIP_MX98715: 489 case TULIP_CHIP_MX98715A: 490 case TULIP_CHIP_MX98715AEC_X: 491 case TULIP_CHIP_MX98725: 492 case TULIP_CHIP_DM9102: 493 case TULIP_CHIP_DM9102A: 494 /* 495 * Clear the "sleep mode" bit in the CFDA register. 496 */ 497 reg = pci_conf_read(pc, pa->pa_tag, TULIP_PCI_CFDA); 498 if (reg & (CFDA_SLEEP|CFDA_SNOOZE)) 499 pci_conf_write(pc, pa->pa_tag, TULIP_PCI_CFDA, 500 reg & ~(CFDA_SLEEP|CFDA_SNOOZE)); 501 break; 502 503 default: 504 /* Nothing. */ 505 break; 506 } 507 508 if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PWRMGMT, &pmreg, 0)) { 509 reg = pci_conf_read(pc, pa->pa_tag, pmreg + 4); 510 switch (reg & PCI_PMCSR_STATE_MASK) { 511 case PCI_PMCSR_STATE_D1: 512 case PCI_PMCSR_STATE_D2: 513 printf(": waking up from power state D%d\n%s", 514 reg & PCI_PMCSR_STATE_MASK, sc->sc_dev.dv_xname); 515 pci_conf_write(pc, pa->pa_tag, pmreg + 4, 516 (reg & ~PCI_PMCSR_STATE_MASK) | 517 PCI_PMCSR_STATE_D0); 518 break; 519 case PCI_PMCSR_STATE_D3: 520 /* 521 * The card has lost all configuration data in 522 * this state, so punt. 523 */ 524 printf(": unable to wake up from power state D3, " 525 "reboot required.\n"); 526 pci_conf_write(pc, pa->pa_tag, pmreg + 4, 527 (reg & ~PCI_PMCSR_STATE_MASK) | 528 PCI_PMCSR_STATE_D0); 529 return; 530 } 531 } 532 533 /* 534 * Map the device. 535 */ 536 ioh_valid = (pci_mapreg_map(pa, TULIP_PCI_IOBA, 537 PCI_MAPREG_TYPE_IO, 0, 538 &iot, &ioh, NULL, NULL) == 0); 539 memh_valid = (pci_mapreg_map(pa, TULIP_PCI_MMBA, 540 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 541 &memt, &memh, NULL, NULL) == 0); 542 543 if (memh_valid) { 544 sc->sc_st = memt; 545 sc->sc_sh = memh; 546 } else if (ioh_valid) { 547 sc->sc_st = iot; 548 sc->sc_sh = ioh; 549 } else { 550 printf(": unable to map device registers\n"); 551 return; 552 } 553 554 sc->sc_dmat = pa->pa_dmat; 555 556 /* 557 * Make sure bus mastering is enabled. 558 */ 559 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 560 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 561 PCI_COMMAND_MASTER_ENABLE); 562 563 /* 564 * Get the cacheline size. 565 */ 566 sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag, 567 PCI_BHLC_REG)); 568 569 /* 570 * Get PCI data moving command info. 571 */ 572 if (pa->pa_flags & PCI_FLAGS_MRL_OKAY) 573 sc->sc_flags |= TULIPF_MRL; 574 if (pa->pa_flags & PCI_FLAGS_MRM_OKAY) 575 sc->sc_flags |= TULIPF_MRM; 576 if (pa->pa_flags & PCI_FLAGS_MWI_OKAY) 577 sc->sc_flags |= TULIPF_MWI; 578 579 /* 580 * Read the contents of the Ethernet Address ROM/SROM. 581 */ 582 switch (sc->sc_chip) { 583 case TULIP_CHIP_21040: 584 sc->sc_srom_addrbits = 6; 585 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, M_NOWAIT); 586 TULIP_WRITE(sc, CSR_MIIROM, MIIROM_SROMCS); 587 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 588 for (j = 0; j < 10000; j++) { 589 val = TULIP_READ(sc, CSR_MIIROM); 590 if ((val & MIIROM_DN) == 0) 591 break; 592 } 593 sc->sc_srom[i] = val & MIIROM_DATA; 594 } 595 break; 596 597 case TULIP_CHIP_82C168: 598 case TULIP_CHIP_82C169: 599 { 600 sc->sc_srom_addrbits = 2; 601 sc->sc_srom = malloc(TULIP_ROM_SIZE(2), M_DEVBUF, M_NOWAIT); 602 603 /* 604 * The Lite-On PNIC stores the Ethernet address in 605 * the first 3 words of the EEPROM. EEPROM access 606 * is not like the other Tulip chips. 607 */ 608 for (i = 0; i < 6; i += 2) { 609 TULIP_WRITE(sc, CSR_PNIC_SROMCTL, 610 PNIC_SROMCTL_READ | (i >> 1)); 611 for (j = 0; j < 500; j++) { 612 delay(2); 613 val = TULIP_READ(sc, CSR_MIIROM); 614 if ((val & PNIC_MIIROM_BUSY) == 0) 615 break; 616 } 617 if (val & PNIC_MIIROM_BUSY) { 618 printf("%s: EEPROM timed out\n", 619 sc->sc_dev.dv_xname); 620 return; 621 } 622 val &= PNIC_MIIROM_DATA; 623 sc->sc_srom[i] = val >> 8; 624 sc->sc_srom[i + 1] = val & 0xff; 625 } 626 break; 627 } 628 629 default: 630 #ifdef algor 631 /* 632 * XXX This should be done with device properties, but 633 * XXX we don't have those yet. 634 */ 635 if (algor_get_ethaddr(pa, NULL)) { 636 extern int tlp_srom_debug; 637 sc->sc_srom_addrbits = 6; 638 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, 639 M_NOWAIT); 640 memset(sc->sc_srom, 0, TULIP_ROM_SIZE(6)); 641 algor_get_ethaddr(pa, sc->sc_srom); 642 if (tlp_srom_debug) { 643 printf("SROM CONTENTS:"); 644 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 645 if ((i % 8) == 0) 646 printf("\n\t"); 647 printf("0x%02x ", sc->sc_srom[i]); 648 } 649 printf("\n"); 650 } 651 break; 652 } 653 #endif /* algor */ 654 if (tlp_read_srom(sc) == 0) 655 goto cant_cope; 656 break; 657 } 658 659 /* 660 * Deal with chip/board quirks. This includes setting up 661 * the mediasw, and extracting the Ethernet address from 662 * the rombuf. 663 */ 664 switch (sc->sc_chip) { 665 case TULIP_CHIP_21040: 666 /* Check for a slaved ROM on a multi-port board. */ 667 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDROM, 668 TULIP_PCI_SLAVEROM); 669 if (psc->sc_flags & TULIP_PCI_SLAVEROM) 670 memcpy(sc->sc_srom, psc->sc_master->sc_tulip.sc_srom, 671 sizeof(sc->sc_srom)); 672 673 /* 674 * Parse the Ethernet Address ROM. 675 */ 676 if (tlp_parse_old_srom(sc, enaddr) == 0) 677 goto cant_cope; 678 679 /* 680 * If we have a slaved ROM, adjust the Ethernet address. 681 */ 682 if (psc->sc_flags & TULIP_PCI_SLAVEROM) 683 enaddr[5] += 684 sc->sc_devno - psc->sc_master->sc_tulip.sc_devno; 685 686 /* 687 * All 21040 boards start out with the same 688 * media switch. 689 */ 690 sc->sc_mediasw = &tlp_21040_mediasw; 691 692 /* 693 * Deal with any quirks this board might have. 694 */ 695 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21040_quirks); 696 break; 697 698 case TULIP_CHIP_21041: 699 /* Check for a slaved ROM on a multi-port board. */ 700 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDROM, 701 TULIP_PCI_SLAVEROM); 702 if (psc->sc_flags & TULIP_PCI_SLAVEROM) 703 memcpy(sc->sc_srom, psc->sc_master->sc_tulip.sc_srom, 704 sizeof(sc->sc_srom)); 705 706 /* Check for new format SROM. */ 707 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 708 /* 709 * Not an ISV SROM; try the old DEC Ethernet Address 710 * ROM format. 711 */ 712 if (tlp_parse_old_srom(sc, enaddr) == 0) 713 goto cant_cope; 714 } 715 716 /* 717 * All 21041 boards use the same media switch; they all 718 * work basically the same! Yippee! 719 */ 720 sc->sc_mediasw = &tlp_21041_mediasw; 721 722 /* 723 * Deal with any quirks this board might have. 724 */ 725 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21041_quirks); 726 break; 727 728 case TULIP_CHIP_21140: 729 case TULIP_CHIP_21140A: 730 /* Check for new format SROM. */ 731 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 732 /* 733 * Not an ISV SROM; try the old DEC Ethernet Address 734 * ROM format. 735 */ 736 if (tlp_parse_old_srom(sc, enaddr) == 0) 737 goto cant_cope; 738 } else { 739 /* 740 * We start out with the 2114x ISV media switch. 741 * When we search for quirks, we may change to 742 * a different switch. 743 */ 744 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 745 } 746 747 /* 748 * Deal with any quirks this board might have. 749 */ 750 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21140_quirks); 751 752 /* 753 * Bail out now if we can't deal with this board. 754 */ 755 if (sc->sc_mediasw == NULL) 756 goto cant_cope; 757 break; 758 759 case TULIP_CHIP_21142: 760 case TULIP_CHIP_21143: 761 /* Check for new format SROM. */ 762 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 763 /* 764 * Not an ISV SROM; try the old DEC Ethernet Address 765 * ROM format. 766 */ 767 if (tlp_parse_old_srom(sc, enaddr) == 0) 768 goto cant_cope; 769 } else { 770 /* 771 * We start out with the 2114x ISV media switch. 772 * When we search for quirks, we may change to 773 * a different switch. 774 */ 775 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 776 } 777 778 /* 779 * Deal with any quirks this board might have. 780 */ 781 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21142_quirks); 782 783 /* 784 * Bail out now if we can't deal with this board. 785 */ 786 if (sc->sc_mediasw == NULL) 787 goto cant_cope; 788 break; 789 790 case TULIP_CHIP_82C168: 791 case TULIP_CHIP_82C169: 792 /* 793 * Lite-On PNIC's Ethernet address is the first 6 794 * bytes of its EEPROM. 795 */ 796 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 797 798 /* 799 * Lite-On PNICs always use the same mediasw; we 800 * select MII vs. internal NWAY automatically. 801 */ 802 sc->sc_mediasw = &tlp_pnic_mediasw; 803 break; 804 805 case TULIP_CHIP_MX98713: 806 /* 807 * The Macronix MX98713 has an MII and GPIO, but no 808 * internal Nway block. This chip is basically a 809 * perfect 21140A clone, with the exception of the 810 * a magic register frobbing in order to make the 811 * interface function. 812 */ 813 if (tlp_isv_srom_enaddr(sc, enaddr)) { 814 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 815 break; 816 } 817 /* FALLTHROUGH */ 818 819 case TULIP_CHIP_82C115: 820 /* 821 * Yippee! The Lite-On 82C115 is a clone of 822 * the MX98725 (the data sheet even says `MXIC' 823 * on it)! Imagine that, a clone of a clone. 824 * 825 * The differences are really minimal: 826 * 827 * - Wake-On-LAN support 828 * - 128-bit multicast hash table, rather than 829 * the standard 512-bit hash table 830 */ 831 /* FALLTHROUGH */ 832 833 case TULIP_CHIP_MX98713A: 834 case TULIP_CHIP_MX98715A: 835 case TULIP_CHIP_MX98715AEC_X: 836 case TULIP_CHIP_MX98725: 837 /* 838 * The MX98713A has an MII as well as an internal Nway block, 839 * but no GPIO. The MX98715 and MX98725 have an internal 840 * Nway block only. 841 * 842 * The internal Nway block, unlike the Lite-On PNIC's, does 843 * just that - performs Nway. Once autonegotiation completes, 844 * we must program the GPR media information into the chip. 845 * 846 * The byte offset of the Ethernet address is stored at 847 * offset 0x70. 848 */ 849 memcpy(enaddr, &sc->sc_srom[sc->sc_srom[0x70]], ETHER_ADDR_LEN); 850 sc->sc_mediasw = &tlp_pmac_mediasw; 851 break; 852 853 case TULIP_CHIP_WB89C840F: 854 /* 855 * Winbond 89C840F's Ethernet address is the first 856 * 6 bytes of its EEPROM. 857 */ 858 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 859 860 /* 861 * Winbond 89C840F has an MII attached to the SIO. 862 */ 863 sc->sc_mediasw = &tlp_sio_mii_mediasw; 864 break; 865 866 case TULIP_CHIP_AL981: 867 /* 868 * The ADMtek AL981's Ethernet address is located 869 * at offset 8 of its EEPROM. 870 */ 871 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 872 873 /* 874 * ADMtek AL981 has a built-in PHY accessed through 875 * special registers. 876 */ 877 sc->sc_mediasw = &tlp_al981_mediasw; 878 break; 879 880 case TULIP_CHIP_AN983: 881 case TULIP_CHIP_AN985: 882 /* 883 * The ADMtek AN985's Ethernet address is located 884 * at offset 8 of its EEPROM. 885 */ 886 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 887 888 /* 889 * The ADMtek AN985 can be configured in Single-Chip 890 * mode or MAC-only mode. Single-Chip uses the built-in 891 * PHY, MAC-only has an external PHY (usually HomePNA). 892 * The selection is based on an EEPROM setting, and both 893 * PHYs are accessed via MII attached to SIO. 894 * 895 * The AN985 "ghosts" the internal PHY onto all 896 * MII addresses, so we have to use a media init 897 * routine that limits the search. 898 * XXX How does this work with MAC-only mode? 899 */ 900 sc->sc_mediasw = &tlp_an985_mediasw; 901 break; 902 903 case TULIP_CHIP_DM9102: 904 case TULIP_CHIP_DM9102A: 905 /* 906 * Some boards with the Davicom chip have an ISV 907 * SROM (mostly DM9102A boards -- trying to describe 908 * the HomePNA PHY, probably) although the data in 909 * them is generally wrong. Check for ISV format 910 * and grab the Ethernet address that way, and if 911 * that fails, fall back on grabbing it from an 912 * observed offset of 20 (which is where it would 913 * be in an ISV SROM anyhow, tho ISV can cope with 914 * multi-port boards). 915 */ 916 if (tlp_isv_srom_enaddr(sc, enaddr)) 917 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN); 918 919 /* 920 * Davicom chips all have an internal MII interface 921 * and a built-in PHY. DM9102A also has a an external 922 * MII interface, usually with a HomePNA PHY attached 923 * to it. 924 */ 925 sc->sc_mediasw = &tlp_dm9102_mediasw; 926 break; 927 928 default: 929 cant_cope: 930 printf("%s: sorry, unable to handle your board\n", 931 sc->sc_dev.dv_xname); 932 return; 933 } 934 935 /* 936 * Handle shared interrupts. 937 */ 938 if (psc->sc_flags & TULIP_PCI_SHAREDINTR) { 939 if (psc->sc_master) 940 psc->sc_flags |= TULIP_PCI_SLAVEINTR; 941 else { 942 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDINTR, 943 TULIP_PCI_SLAVEINTR); 944 if (psc->sc_master == NULL) 945 psc->sc_master = psc; 946 } 947 LIST_INSERT_HEAD(&psc->sc_master->sc_intrslaves, 948 psc, sc_intrq); 949 } 950 951 if (psc->sc_flags & TULIP_PCI_SLAVEINTR) { 952 printf("%s: sharing interrupt with %s\n", 953 sc->sc_dev.dv_xname, 954 psc->sc_master->sc_tulip.sc_dev.dv_xname); 955 } else { 956 /* 957 * Map and establish our interrupt. 958 */ 959 if (pci_intr_map(pa, &ih)) { 960 printf("%s: unable to map interrupt\n", 961 sc->sc_dev.dv_xname); 962 return; 963 } 964 intrstr = pci_intr_string(pc, ih); 965 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, 966 (psc->sc_flags & TULIP_PCI_SHAREDINTR) ? 967 tlp_pci_shared_intr : tlp_intr, sc); 968 if (psc->sc_ih == NULL) { 969 printf("%s: unable to establish interrupt", 970 sc->sc_dev.dv_xname); 971 if (intrstr != NULL) 972 printf(" at %s", intrstr); 973 printf("\n"); 974 return; 975 } 976 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, 977 intrstr); 978 } 979 980 /* 981 * Finish off the attach. 982 */ 983 tlp_attach(sc, enaddr); 984 } 985 986 int 987 tlp_pci_shared_intr(arg) 988 void *arg; 989 { 990 struct tulip_pci_softc *master = arg, *slave; 991 int rv = 0; 992 993 for (slave = LIST_FIRST(&master->sc_intrslaves); 994 slave != NULL; 995 slave = LIST_NEXT(slave, sc_intrq)) 996 rv |= tlp_intr(&slave->sc_tulip); 997 998 return (rv); 999 } 1000 1001 void 1002 tlp_pci_dec_quirks(psc, enaddr) 1003 struct tulip_pci_softc *psc; 1004 const u_int8_t *enaddr; 1005 { 1006 struct tulip_softc *sc = &psc->sc_tulip; 1007 1008 /* 1009 * This isn't really a quirk-gathering device, really. We 1010 * just want to get the spiffy DEC board name from the SROM. 1011 */ 1012 strcpy(sc->sc_name, "DEC "); 1013 1014 if (memcmp(&sc->sc_srom[29], "DE500", 5) == 0 || 1015 memcmp(&sc->sc_srom[29], "DE450", 5) == 0) 1016 memcpy(&sc->sc_name[4], &sc->sc_srom[29], 8); 1017 } 1018 1019 void 1020 tlp_pci_znyx_21040_quirks(psc, enaddr) 1021 struct tulip_pci_softc *psc; 1022 const u_int8_t *enaddr; 1023 { 1024 struct tulip_softc *sc = &psc->sc_tulip; 1025 u_int16_t id = 0; 1026 1027 /* 1028 * If we have a slaved ROM, just copy the bits from the master. 1029 * This is in case we fail the ROM ID check (older boards) and 1030 * need to fall back on Ethernet address model checking; that 1031 * will fail for slave chips. 1032 */ 1033 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 1034 strcpy(sc->sc_name, psc->sc_master->sc_tulip.sc_name); 1035 sc->sc_mediasw = psc->sc_master->sc_tulip.sc_mediasw; 1036 psc->sc_flags |= 1037 psc->sc_master->sc_flags & TULIP_PCI_SHAREDINTR; 1038 return; 1039 } 1040 1041 if (sc->sc_srom[32] == 0x4a && sc->sc_srom[33] == 0x52) { 1042 id = sc->sc_srom[37] | (sc->sc_srom[36] << 8); 1043 switch (id) { 1044 zx312: 1045 case 0x0602: /* ZX312 */ 1046 strcpy(sc->sc_name, "ZNYX ZX312"); 1047 return; 1048 1049 case 0x0622: /* ZX312T */ 1050 strcpy(sc->sc_name, "ZNYX ZX312T"); 1051 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1052 return; 1053 1054 zx314_inta: 1055 case 0x0701: /* ZX314 INTA */ 1056 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1057 /* FALLTHROUGH */ 1058 case 0x0711: /* ZX314 */ 1059 strcpy(sc->sc_name, "ZNYX ZX314"); 1060 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1061 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1062 return; 1063 1064 zx315_inta: 1065 case 0x0801: /* ZX315 INTA */ 1066 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1067 /* FALLTHROUGH */ 1068 case 0x0811: /* ZX315 */ 1069 strcpy(sc->sc_name, "ZNYX ZX315"); 1070 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1071 return; 1072 1073 default: 1074 id = 0; 1075 break; 1076 } 1077 } 1078 1079 /* 1080 * Deal with boards that have broken ROMs. 1081 */ 1082 if (id == 0) { 1083 if ((enaddr[3] & ~3) == 0xf0 && (enaddr[5] & 3) == 0x00) 1084 goto zx314_inta; 1085 if ((enaddr[3] & ~3) == 0xf4 && (enaddr[5] & 1) == 0x00) 1086 goto zx315_inta; 1087 if ((enaddr[3] & ~3) == 0xec) 1088 goto zx312; 1089 } 1090 1091 strcpy(sc->sc_name, "ZNYX ZX31x"); 1092 } 1093 1094 void 1095 tlp_pci_smc_21040_quirks(psc, enaddr) 1096 struct tulip_pci_softc *psc; 1097 const u_int8_t *enaddr; 1098 { 1099 struct tulip_softc *sc = &psc->sc_tulip; 1100 u_int16_t id1, id2, ei; 1101 int auibnc = 0, utp = 0; 1102 char *cp; 1103 1104 id1 = sc->sc_srom[0x60] | (sc->sc_srom[0x61] << 8); 1105 id2 = sc->sc_srom[0x62] | (sc->sc_srom[0x63] << 8); 1106 ei = sc->sc_srom[0x66] | (sc->sc_srom[0x67] << 8); 1107 1108 strcpy(sc->sc_name, "SMC 8432"); 1109 cp = &sc->sc_name[8]; 1110 1111 if ((id1 & 1) == 0) { 1112 *cp++ = 'B'; 1113 auibnc = 1; 1114 } 1115 if ((id1 & 0xff) > 0x32) { 1116 *cp++ = 'T'; 1117 utp = 1; 1118 } 1119 if ((id1 & 0x4000) == 0) { 1120 *cp++ = 'A'; 1121 auibnc = 1; 1122 } 1123 if (id2 == 0x15) { 1124 sc->sc_name[7] = '4'; 1125 *cp++ = '-'; 1126 *cp++ = 'C'; 1127 *cp++ = 'H'; 1128 *cp++ = ei ? '2' : '1'; 1129 } 1130 *cp = '\0'; 1131 1132 if (utp != 0 && auibnc == 0) 1133 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1134 else if (utp == 0 && auibnc != 0) 1135 sc->sc_mediasw = &tlp_21040_auibnc_mediasw; 1136 } 1137 1138 void 1139 tlp_pci_cogent_21040_quirks(psc, enaddr) 1140 struct tulip_pci_softc *psc; 1141 const u_int8_t *enaddr; 1142 { 1143 1144 strcpy(psc->sc_tulip.sc_name, "Cogent multi-port"); 1145 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1146 } 1147 1148 void 1149 tlp_pci_accton_21040_quirks(psc, enaddr) 1150 struct tulip_pci_softc *psc; 1151 const u_int8_t *enaddr; 1152 { 1153 1154 strcpy(psc->sc_tulip.sc_name, "ACCTON EN1203"); 1155 } 1156 1157 void tlp_pci_asante_21140_reset __P((struct tulip_softc *)); 1158 1159 void 1160 tlp_pci_asante_21140_quirks(psc, enaddr) 1161 struct tulip_pci_softc *psc; 1162 const u_int8_t *enaddr; 1163 { 1164 struct tulip_softc *sc = &psc->sc_tulip; 1165 1166 /* 1167 * Some Asante boards don't use the ISV SROM format. For 1168 * those that don't, we initialize the GPIO direction bits, 1169 * and provide our own reset hook, which resets the MII. 1170 * 1171 * All of these boards use SIO-attached-MII media. 1172 */ 1173 if (sc->sc_mediasw == &tlp_2114x_isv_mediasw) 1174 return; 1175 1176 strcpy(sc->sc_name, "Asante"); 1177 1178 sc->sc_gp_dir = 0xbf; 1179 sc->sc_reset = tlp_pci_asante_21140_reset; 1180 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1181 } 1182 1183 void 1184 tlp_pci_asante_21140_reset(sc) 1185 struct tulip_softc *sc; 1186 { 1187 1188 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1189 TULIP_WRITE(sc, CSR_GPP, 0x8); 1190 delay(100); 1191 TULIP_WRITE(sc, CSR_GPP, 0); 1192 } 1193 1194 void tlp_pci_cobalt_21142_reset __P((struct tulip_softc *)); 1195 1196 void 1197 tlp_pci_cobalt_21142_quirks(psc, enaddr) 1198 struct tulip_pci_softc *psc; 1199 const u_int8_t *enaddr; 1200 { 1201 struct tulip_softc *sc = &psc->sc_tulip; 1202 1203 /* 1204 * Cobalt Networks interfaces are just MII-on-SIO. 1205 */ 1206 sc->sc_reset = tlp_pci_cobalt_21142_reset; 1207 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1208 1209 /* 1210 * The Cobalt systems tend to fall back to store-and-forward 1211 * pretty quickly, so we select that from the beginning to 1212 * avoid initial timeouts. 1213 */ 1214 sc->sc_txthresh = TXTH_SF; 1215 } 1216 1217 void 1218 tlp_pci_cobalt_21142_reset(sc) 1219 struct tulip_softc *sc; 1220 { 1221 /* 1222 * Reset PHY. 1223 */ 1224 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE | (1 << 16)); 1225 delay(10); 1226 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE); 1227 delay(10); 1228 } 1229 1230 void 1231 tlp_pci_algor_21142_quirks(psc, enaddr) 1232 struct tulip_pci_softc *psc; 1233 const u_int8_t *enaddr; 1234 { 1235 struct tulip_softc *sc = &psc->sc_tulip; 1236 1237 /* 1238 * Algorithmics boards just have MII-on-SIO. 1239 * 1240 * XXX They also have AUI on the serial interface. 1241 * XXX Deal with this. 1242 */ 1243 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1244 } 1245
Indexes created Wed Oct 01 13:09:50 GMT 2025