if_tlp_pci.c revision 1.51.2.2
1 /* $NetBSD: if_tlp_pci.c,v 1.51.2.2 2001/08/24 00:10:10 nathanw Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * PCI bus front-end for the Digital Semiconductor ``Tulip'' (21x4x) 42 * Ethernet controller family driver. 43 */ 44 45 #include "opt_tlp.h" 46 47 #include <sys/param.h> 48 #include <sys/systm.h> 49 #include <sys/mbuf.h> 50 #include <sys/malloc.h> 51 #include <sys/kernel.h> 52 #include <sys/socket.h> 53 #include <sys/ioctl.h> 54 #include <sys/errno.h> 55 #include <sys/device.h> 56 57 #include <machine/endian.h> 58 59 #include <net/if.h> 60 #include <net/if_dl.h> 61 #include <net/if_media.h> 62 #include <net/if_ether.h> 63 64 #include <machine/bus.h> 65 #include <machine/intr.h> 66 67 #include <dev/mii/miivar.h> 68 #include <dev/mii/mii_bitbang.h> 69 70 #include <dev/ic/tulipreg.h> 71 #include <dev/ic/tulipvar.h> 72 73 #include <dev/pci/pcivar.h> 74 #include <dev/pci/pcireg.h> 75 #include <dev/pci/pcidevs.h> 76 77 /* 78 * PCI configuration space registers used by the Tulip. 79 */ 80 #define TULIP_PCI_IOBA 0x10 /* i/o mapped base */ 81 #define TULIP_PCI_MMBA 0x14 /* memory mapped base */ 82 #define TULIP_PCI_CFDA 0x40 /* configuration driver area */ 83 84 #define CFDA_SLEEP 0x80000000 /* sleep mode */ 85 #define CFDA_SNOOZE 0x40000000 /* snooze mode */ 86 87 struct tulip_pci_softc { 88 struct tulip_softc sc_tulip; /* real Tulip softc */ 89 90 /* PCI-specific goo. */ 91 void *sc_ih; /* interrupt handle */ 92 93 pci_chipset_tag_t sc_pc; /* our PCI chipset */ 94 pcitag_t sc_pcitag; /* our PCI tag */ 95 96 int sc_flags; /* flags; see below */ 97 98 LIST_HEAD(, tulip_pci_softc) sc_intrslaves; 99 LIST_ENTRY(tulip_pci_softc) sc_intrq; 100 101 /* Our {ROM,interrupt} master. */ 102 struct tulip_pci_softc *sc_master; 103 }; 104 105 /* sc_flags */ 106 #define TULIP_PCI_SHAREDINTR 0x01 /* interrupt is shared */ 107 #define TULIP_PCI_SLAVEINTR 0x02 /* interrupt is slave */ 108 #define TULIP_PCI_SHAREDROM 0x04 /* ROM is shared */ 109 #define TULIP_PCI_SLAVEROM 0x08 /* slave of shared ROM */ 110 111 int tlp_pci_match __P((struct device *, struct cfdata *, void *)); 112 void tlp_pci_attach __P((struct device *, struct device *, void *)); 113 114 struct cfattach tlp_pci_ca = { 115 sizeof(struct tulip_pci_softc), tlp_pci_match, tlp_pci_attach, 116 }; 117 118 const struct tulip_pci_product { 119 u_int32_t tpp_vendor; /* PCI vendor ID */ 120 u_int32_t tpp_product; /* PCI product ID */ 121 tulip_chip_t tpp_chip; /* base Tulip chip type */ 122 } tlp_pci_products[] = { 123 #ifdef TLP_MATCH_21040 124 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21040, 125 TULIP_CHIP_21040 }, 126 #endif 127 #ifdef TLP_MATCH_21041 128 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21041, 129 TULIP_CHIP_21041 }, 130 #endif 131 #ifdef TLP_MATCH_21140 132 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21140, 133 TULIP_CHIP_21140 }, 134 #endif 135 #ifdef TLP_MATCH_21142 136 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142, 137 TULIP_CHIP_21142 }, 138 #endif 139 140 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C168, 141 TULIP_CHIP_82C168 }, 142 143 /* 144 * Note: This is like a MX98725 with Wake-On-LAN and a 145 * 128-bit multicast hash table. 146 */ 147 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C115, 148 TULIP_CHIP_82C115 }, 149 150 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98713, 151 TULIP_CHIP_MX98713 }, 152 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX987x5, 153 TULIP_CHIP_MX98715 }, 154 155 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100TX, 156 TULIP_CHIP_MX98713 }, 157 158 { PCI_VENDOR_WINBOND, PCI_PRODUCT_WINBOND_W89C840F, 159 TULIP_CHIP_WB89C840F }, 160 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100ATX, 161 TULIP_CHIP_WB89C840F }, 162 163 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9102, 164 TULIP_CHIP_DM9102 }, 165 166 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AL981, 167 TULIP_CHIP_AL981 }, 168 169 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN985, 170 TULIP_CHIP_AN985 }, 171 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN2242, 172 TULIP_CHIP_AN985 }, 173 174 #if 0 175 { PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX88140A, 176 TULIP_CHIP_AX88140 }, 177 #endif 178 179 { 0, 0, 180 TULIP_CHIP_INVALID }, 181 }; 182 183 struct tlp_pci_quirks { 184 void (*tpq_func) __P((struct tulip_pci_softc *, 185 const u_int8_t *)); 186 u_int8_t tpq_oui[3]; 187 }; 188 189 void tlp_pci_dec_quirks __P((struct tulip_pci_softc *, 190 const u_int8_t *)); 191 192 void tlp_pci_znyx_21040_quirks __P((struct tulip_pci_softc *, 193 const u_int8_t *)); 194 void tlp_pci_smc_21040_quirks __P((struct tulip_pci_softc *, 195 const u_int8_t *)); 196 void tlp_pci_cogent_21040_quirks __P((struct tulip_pci_softc *, 197 const u_int8_t *)); 198 void tlp_pci_accton_21040_quirks __P((struct tulip_pci_softc *, 199 const u_int8_t *)); 200 201 void tlp_pci_cobalt_21142_quirks __P((struct tulip_pci_softc *, 202 const u_int8_t *)); 203 void tlp_pci_algor_21142_quirks __P((struct tulip_pci_softc *, 204 const u_int8_t *)); 205 206 const struct tlp_pci_quirks tlp_pci_21040_quirks[] = { 207 { tlp_pci_znyx_21040_quirks, { 0x00, 0xc0, 0x95 } }, 208 { tlp_pci_smc_21040_quirks, { 0x00, 0x00, 0xc0 } }, 209 { tlp_pci_cogent_21040_quirks, { 0x00, 0x00, 0x92 } }, 210 { tlp_pci_accton_21040_quirks, { 0x00, 0x00, 0xe8 } }, 211 { NULL, { 0, 0, 0 } } 212 }; 213 214 const struct tlp_pci_quirks tlp_pci_21041_quirks[] = { 215 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 216 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 217 { NULL, { 0, 0, 0 } } 218 }; 219 220 void tlp_pci_asante_21140_quirks __P((struct tulip_pci_softc *, 221 const u_int8_t *)); 222 223 const struct tlp_pci_quirks tlp_pci_21140_quirks[] = { 224 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 225 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 226 { tlp_pci_asante_21140_quirks, { 0x00, 0x00, 0x94 } }, 227 { NULL, { 0, 0, 0 } } 228 }; 229 230 const struct tlp_pci_quirks tlp_pci_21142_quirks[] = { 231 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 232 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 233 { tlp_pci_cobalt_21142_quirks, { 0x00, 0x10, 0xe0 } }, 234 { tlp_pci_algor_21142_quirks, { 0x00, 0x40, 0xbc } }, 235 { NULL, { 0, 0, 0 } } 236 }; 237 238 int tlp_pci_shared_intr __P((void *)); 239 240 const struct tulip_pci_product *tlp_pci_lookup 241 __P((const struct pci_attach_args *)); 242 void tlp_pci_get_quirks __P((struct tulip_pci_softc *, const u_int8_t *, 243 const struct tlp_pci_quirks *)); 244 void tlp_pci_check_slaved __P((struct tulip_pci_softc *, int, int)); 245 246 const struct tulip_pci_product * 247 tlp_pci_lookup(pa) 248 const struct pci_attach_args *pa; 249 { 250 const struct tulip_pci_product *tpp; 251 252 for (tpp = tlp_pci_products; 253 tlp_chip_names[tpp->tpp_chip] != NULL; 254 tpp++) { 255 if (PCI_VENDOR(pa->pa_id) == tpp->tpp_vendor && 256 PCI_PRODUCT(pa->pa_id) == tpp->tpp_product) 257 return (tpp); 258 } 259 return (NULL); 260 } 261 262 void 263 tlp_pci_get_quirks(psc, enaddr, tpq) 264 struct tulip_pci_softc *psc; 265 const u_int8_t *enaddr; 266 const struct tlp_pci_quirks *tpq; 267 { 268 269 for (; tpq->tpq_func != NULL; tpq++) { 270 if (tpq->tpq_oui[0] == enaddr[0] && 271 tpq->tpq_oui[1] == enaddr[1] && 272 tpq->tpq_oui[2] == enaddr[2]) { 273 (*tpq->tpq_func)(psc, enaddr); 274 return; 275 } 276 } 277 } 278 279 void 280 tlp_pci_check_slaved(psc, shared, slaved) 281 struct tulip_pci_softc *psc; 282 int shared, slaved; 283 { 284 extern struct cfdriver tlp_cd; 285 struct tulip_pci_softc *cur, *best = NULL; 286 struct tulip_softc *sc = &psc->sc_tulip; 287 int i; 288 289 /* 290 * First of all, find the lowest pcidev numbered device on our 291 * bus marked as shared. That should be our master. 292 */ 293 for (i = 0; i < tlp_cd.cd_ndevs; i++) { 294 if ((cur = tlp_cd.cd_devs[i]) == NULL) 295 continue; 296 if (cur->sc_tulip.sc_dev.dv_parent != sc->sc_dev.dv_parent) 297 continue; 298 if ((cur->sc_flags & shared) == 0) 299 continue; 300 if (cur == psc) 301 continue; 302 if (best == NULL || 303 best->sc_tulip.sc_devno > cur->sc_tulip.sc_devno) 304 best = cur; 305 } 306 307 if (best != NULL) { 308 psc->sc_master = best; 309 psc->sc_flags |= (shared | slaved); 310 } 311 } 312 313 int 314 tlp_pci_match(parent, match, aux) 315 struct device *parent; 316 struct cfdata *match; 317 void *aux; 318 { 319 struct pci_attach_args *pa = aux; 320 321 if (tlp_pci_lookup(pa) != NULL) 322 return (10); /* beat if_de.c */ 323 324 return (0); 325 } 326 327 void 328 tlp_pci_attach(parent, self, aux) 329 struct device *parent, *self; 330 void *aux; 331 { 332 struct tulip_pci_softc *psc = (void *) self; 333 struct tulip_softc *sc = &psc->sc_tulip; 334 struct pci_attach_args *pa = aux; 335 pci_chipset_tag_t pc = pa->pa_pc; 336 pci_intr_handle_t ih; 337 const char *intrstr = NULL; 338 bus_space_tag_t iot, memt; 339 bus_space_handle_t ioh, memh; 340 int ioh_valid, memh_valid, i, j; 341 const struct tulip_pci_product *tpp; 342 u_int8_t enaddr[ETHER_ADDR_LEN]; 343 u_int32_t val; 344 pcireg_t reg; 345 int pmreg; 346 347 sc->sc_devno = pa->pa_device; 348 psc->sc_pc = pa->pa_pc; 349 psc->sc_pcitag = pa->pa_tag; 350 351 LIST_INIT(&psc->sc_intrslaves); 352 353 tpp = tlp_pci_lookup(pa); 354 if (tpp == NULL) { 355 printf("\n"); 356 panic("tlp_pci_attach: impossible"); 357 } 358 sc->sc_chip = tpp->tpp_chip; 359 360 /* 361 * By default, Tulip registers are 8 bytes long (4 bytes 362 * followed by a 4 byte pad). 363 */ 364 sc->sc_regshift = 3; 365 366 /* 367 * No power management hooks. 368 * XXX Maybe we should add some! 369 */ 370 sc->sc_flags |= TULIPF_ENABLED; 371 372 /* 373 * Get revision info, and set some chip-specific variables. 374 */ 375 sc->sc_rev = PCI_REVISION(pa->pa_class); 376 switch (sc->sc_chip) { 377 case TULIP_CHIP_21140: 378 if (sc->sc_rev >= 0x20) 379 sc->sc_chip = TULIP_CHIP_21140A; 380 break; 381 382 case TULIP_CHIP_21142: 383 if (sc->sc_rev >= 0x20) 384 sc->sc_chip = TULIP_CHIP_21143; 385 break; 386 387 case TULIP_CHIP_82C168: 388 if (sc->sc_rev >= 0x20) 389 sc->sc_chip = TULIP_CHIP_82C169; 390 break; 391 392 case TULIP_CHIP_MX98713: 393 if (sc->sc_rev >= 0x10) 394 sc->sc_chip = TULIP_CHIP_MX98713A; 395 break; 396 397 case TULIP_CHIP_MX98715: 398 if (sc->sc_rev >= 0x20) 399 sc->sc_chip = TULIP_CHIP_MX98715A; 400 if (sc->sc_rev >= 0x25) 401 sc->sc_chip = TULIP_CHIP_MX98715AEC_X; 402 if (sc->sc_rev >= 0x30) 403 sc->sc_chip = TULIP_CHIP_MX98725; 404 break; 405 406 case TULIP_CHIP_WB89C840F: 407 sc->sc_regshift = 2; 408 break; 409 410 case TULIP_CHIP_AN985: 411 /* 412 * The AN983 and AN985 are very similar, and are 413 * differentiated by a "signature" register that 414 * is like, but not identical, to a PCI ID register. 415 */ 416 reg = pci_conf_read(pc, pa->pa_tag, 0x80); 417 switch (reg) { 418 case 0x09811317: 419 sc->sc_chip = TULIP_CHIP_AN985; 420 break; 421 422 case 0x09851317: 423 sc->sc_chip = TULIP_CHIP_AN983; 424 break; 425 426 default: 427 /* Unknown -- use default. */ 428 break; 429 } 430 break; 431 432 case TULIP_CHIP_AX88140: 433 if (sc->sc_rev >= 0x10) 434 sc->sc_chip = TULIP_CHIP_AX88141; 435 break; 436 437 case TULIP_CHIP_DM9102: 438 if (sc->sc_rev >= 0x30) 439 sc->sc_chip = TULIP_CHIP_DM9102A; 440 break; 441 442 default: 443 /* Nothing. */ 444 break; 445 } 446 447 printf(": %s Ethernet, pass %d.%d\n", 448 tlp_chip_names[sc->sc_chip], 449 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf); 450 451 switch (sc->sc_chip) { 452 case TULIP_CHIP_21040: 453 if (sc->sc_rev < 0x20) { 454 printf("%s: 21040 must be at least pass 2.0\n", 455 sc->sc_dev.dv_xname); 456 return; 457 } 458 break; 459 460 case TULIP_CHIP_21140: 461 if (sc->sc_rev < 0x11) { 462 printf("%s: 21140 must be at least pass 1.1\n", 463 sc->sc_dev.dv_xname); 464 return; 465 } 466 break; 467 468 default: 469 /* Nothing. */ 470 break; 471 } 472 473 /* 474 * Check to see if the device is in power-save mode, and 475 * being it out if necessary. 476 */ 477 switch (sc->sc_chip) { 478 case TULIP_CHIP_21140: 479 case TULIP_CHIP_21140A: 480 case TULIP_CHIP_21142: 481 case TULIP_CHIP_21143: 482 case TULIP_CHIP_MX98713A: 483 case TULIP_CHIP_MX98715: 484 case TULIP_CHIP_MX98715A: 485 case TULIP_CHIP_MX98715AEC_X: 486 case TULIP_CHIP_MX98725: 487 case TULIP_CHIP_DM9102: 488 case TULIP_CHIP_DM9102A: 489 /* 490 * Clear the "sleep mode" bit in the CFDA register. 491 */ 492 reg = pci_conf_read(pc, pa->pa_tag, TULIP_PCI_CFDA); 493 if (reg & (CFDA_SLEEP|CFDA_SNOOZE)) 494 pci_conf_write(pc, pa->pa_tag, TULIP_PCI_CFDA, 495 reg & ~(CFDA_SLEEP|CFDA_SNOOZE)); 496 break; 497 498 default: 499 /* Nothing. */ 500 break; 501 } 502 503 if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PWRMGMT, &pmreg, 0)) { 504 reg = pci_conf_read(pc, pa->pa_tag, pmreg + 4); 505 switch (reg & PCI_PMCSR_STATE_MASK) { 506 case PCI_PMCSR_STATE_D1: 507 case PCI_PMCSR_STATE_D2: 508 printf(": waking up from power state D%d\n%s", 509 reg & PCI_PMCSR_STATE_MASK, sc->sc_dev.dv_xname); 510 pci_conf_write(pc, pa->pa_tag, pmreg + 4, 511 (reg & ~PCI_PMCSR_STATE_MASK) | 512 PCI_PMCSR_STATE_D0); 513 break; 514 case PCI_PMCSR_STATE_D3: 515 /* 516 * The card has lost all configuration data in 517 * this state, so punt. 518 */ 519 printf(": unable to wake up from power state D3, " 520 "reboot required.\n"); 521 pci_conf_write(pc, pa->pa_tag, pmreg + 4, 522 (reg & ~PCI_PMCSR_STATE_MASK) | 523 PCI_PMCSR_STATE_D0); 524 return; 525 } 526 } 527 528 /* 529 * Map the device. 530 */ 531 ioh_valid = (pci_mapreg_map(pa, TULIP_PCI_IOBA, 532 PCI_MAPREG_TYPE_IO, 0, 533 &iot, &ioh, NULL, NULL) == 0); 534 memh_valid = (pci_mapreg_map(pa, TULIP_PCI_MMBA, 535 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 536 &memt, &memh, NULL, NULL) == 0); 537 538 if (memh_valid) { 539 sc->sc_st = memt; 540 sc->sc_sh = memh; 541 } else if (ioh_valid) { 542 sc->sc_st = iot; 543 sc->sc_sh = ioh; 544 } else { 545 printf(": unable to map device registers\n"); 546 return; 547 } 548 549 sc->sc_dmat = pa->pa_dmat; 550 551 /* 552 * Make sure bus mastering is enabled. 553 */ 554 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 555 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 556 PCI_COMMAND_MASTER_ENABLE); 557 558 /* 559 * Get the cacheline size. 560 */ 561 sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag, 562 PCI_BHLC_REG)); 563 564 /* 565 * Get PCI data moving command info. 566 */ 567 if (pa->pa_flags & PCI_FLAGS_MRL_OKAY) 568 sc->sc_flags |= TULIPF_MRL; 569 if (pa->pa_flags & PCI_FLAGS_MRM_OKAY) 570 sc->sc_flags |= TULIPF_MRM; 571 if (pa->pa_flags & PCI_FLAGS_MWI_OKAY) 572 sc->sc_flags |= TULIPF_MWI; 573 574 /* 575 * Read the contents of the Ethernet Address ROM/SROM. 576 */ 577 switch (sc->sc_chip) { 578 case TULIP_CHIP_21040: 579 sc->sc_srom_addrbits = 6; 580 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, M_NOWAIT); 581 TULIP_WRITE(sc, CSR_MIIROM, MIIROM_SROMCS); 582 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 583 for (j = 0; j < 10000; j++) { 584 val = TULIP_READ(sc, CSR_MIIROM); 585 if ((val & MIIROM_DN) == 0) 586 break; 587 } 588 sc->sc_srom[i] = val & MIIROM_DATA; 589 } 590 break; 591 592 case TULIP_CHIP_82C168: 593 case TULIP_CHIP_82C169: 594 { 595 sc->sc_srom_addrbits = 2; 596 sc->sc_srom = malloc(TULIP_ROM_SIZE(2), M_DEVBUF, M_NOWAIT); 597 598 /* 599 * The Lite-On PNIC stores the Ethernet address in 600 * the first 3 words of the EEPROM. EEPROM access 601 * is not like the other Tulip chips. 602 */ 603 for (i = 0; i < 6; i += 2) { 604 TULIP_WRITE(sc, CSR_PNIC_SROMCTL, 605 PNIC_SROMCTL_READ | (i >> 1)); 606 for (j = 0; j < 500; j++) { 607 delay(2); 608 val = TULIP_READ(sc, CSR_MIIROM); 609 if ((val & PNIC_MIIROM_BUSY) == 0) 610 break; 611 } 612 if (val & PNIC_MIIROM_BUSY) { 613 printf("%s: EEPROM timed out\n", 614 sc->sc_dev.dv_xname); 615 return; 616 } 617 val &= PNIC_MIIROM_DATA; 618 sc->sc_srom[i] = val >> 8; 619 sc->sc_srom[i + 1] = val & 0xff; 620 } 621 break; 622 } 623 624 default: 625 #ifdef algor 626 /* 627 * XXX This should be done with device properties, but 628 * XXX we don't have those yet. 629 */ 630 if (algor_get_ethaddr(pa, NULL)) { 631 extern int tlp_srom_debug; 632 sc->sc_srom_addrbits = 6; 633 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, 634 M_NOWAIT); 635 memset(sc->sc_srom, 0, TULIP_ROM_SIZE(6)); 636 algor_get_ethaddr(pa, sc->sc_srom); 637 if (tlp_srom_debug) { 638 printf("SROM CONTENTS:"); 639 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 640 if ((i % 8) == 0) 641 printf("\n\t"); 642 printf("0x%02x ", sc->sc_srom[i]); 643 } 644 printf("\n"); 645 } 646 break; 647 } 648 #endif /* algor */ 649 if (tlp_read_srom(sc) == 0) 650 goto cant_cope; 651 break; 652 } 653 654 /* 655 * Deal with chip/board quirks. This includes setting up 656 * the mediasw, and extracting the Ethernet address from 657 * the rombuf. 658 */ 659 switch (sc->sc_chip) { 660 case TULIP_CHIP_21040: 661 /* Check for a slaved ROM on a multi-port board. */ 662 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDROM, 663 TULIP_PCI_SLAVEROM); 664 if (psc->sc_flags & TULIP_PCI_SLAVEROM) 665 memcpy(sc->sc_srom, psc->sc_master->sc_tulip.sc_srom, 666 sizeof(sc->sc_srom)); 667 668 /* 669 * Parse the Ethernet Address ROM. 670 */ 671 if (tlp_parse_old_srom(sc, enaddr) == 0) 672 goto cant_cope; 673 674 /* 675 * If we have a slaved ROM, adjust the Ethernet address. 676 */ 677 if (psc->sc_flags & TULIP_PCI_SLAVEROM) 678 enaddr[5] += 679 sc->sc_devno - psc->sc_master->sc_tulip.sc_devno; 680 681 /* 682 * All 21040 boards start out with the same 683 * media switch. 684 */ 685 sc->sc_mediasw = &tlp_21040_mediasw; 686 687 /* 688 * Deal with any quirks this board might have. 689 */ 690 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21040_quirks); 691 break; 692 693 case TULIP_CHIP_21041: 694 /* Check for a slaved ROM on a multi-port board. */ 695 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDROM, 696 TULIP_PCI_SLAVEROM); 697 if (psc->sc_flags & TULIP_PCI_SLAVEROM) 698 memcpy(sc->sc_srom, psc->sc_master->sc_tulip.sc_srom, 699 sizeof(sc->sc_srom)); 700 701 /* Check for new format SROM. */ 702 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 703 /* 704 * Not an ISV SROM; try the old DEC Ethernet Address 705 * ROM format. 706 */ 707 if (tlp_parse_old_srom(sc, enaddr) == 0) 708 goto cant_cope; 709 } 710 711 /* 712 * All 21041 boards use the same media switch; they all 713 * work basically the same! Yippee! 714 */ 715 sc->sc_mediasw = &tlp_21041_mediasw; 716 717 /* 718 * Deal with any quirks this board might have. 719 */ 720 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21041_quirks); 721 break; 722 723 case TULIP_CHIP_21140: 724 case TULIP_CHIP_21140A: 725 /* Check for new format SROM. */ 726 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 727 /* 728 * Not an ISV SROM; try the old DEC Ethernet Address 729 * ROM format. 730 */ 731 if (tlp_parse_old_srom(sc, enaddr) == 0) 732 goto cant_cope; 733 } else { 734 /* 735 * We start out with the 2114x ISV media switch. 736 * When we search for quirks, we may change to 737 * a different switch. 738 */ 739 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 740 } 741 742 /* 743 * Deal with any quirks this board might have. 744 */ 745 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21140_quirks); 746 747 /* 748 * Bail out now if we can't deal with this board. 749 */ 750 if (sc->sc_mediasw == NULL) 751 goto cant_cope; 752 break; 753 754 case TULIP_CHIP_21142: 755 case TULIP_CHIP_21143: 756 /* Check for new format SROM. */ 757 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 758 /* 759 * Not an ISV SROM; try the old DEC Ethernet Address 760 * ROM format. 761 */ 762 if (tlp_parse_old_srom(sc, enaddr) == 0) 763 goto cant_cope; 764 } else { 765 /* 766 * We start out with the 2114x ISV media switch. 767 * When we search for quirks, we may change to 768 * a different switch. 769 */ 770 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 771 } 772 773 /* 774 * Deal with any quirks this board might have. 775 */ 776 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21142_quirks); 777 778 /* 779 * Bail out now if we can't deal with this board. 780 */ 781 if (sc->sc_mediasw == NULL) 782 goto cant_cope; 783 break; 784 785 case TULIP_CHIP_82C168: 786 case TULIP_CHIP_82C169: 787 /* 788 * Lite-On PNIC's Ethernet address is the first 6 789 * bytes of its EEPROM. 790 */ 791 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 792 793 /* 794 * Lite-On PNICs always use the same mediasw; we 795 * select MII vs. internal NWAY automatically. 796 */ 797 sc->sc_mediasw = &tlp_pnic_mediasw; 798 break; 799 800 case TULIP_CHIP_MX98713: 801 /* 802 * The Macronix MX98713 has an MII and GPIO, but no 803 * internal Nway block. This chip is basically a 804 * perfect 21140A clone, with the exception of the 805 * a magic register frobbing in order to make the 806 * interface function. 807 */ 808 if (tlp_isv_srom_enaddr(sc, enaddr)) { 809 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 810 break; 811 } 812 /* FALLTHROUGH */ 813 814 case TULIP_CHIP_82C115: 815 /* 816 * Yippee! The Lite-On 82C115 is a clone of 817 * the MX98725 (the data sheet even says `MXIC' 818 * on it)! Imagine that, a clone of a clone. 819 * 820 * The differences are really minimal: 821 * 822 * - Wake-On-LAN support 823 * - 128-bit multicast hash table, rather than 824 * the standard 512-bit hash table 825 */ 826 /* FALLTHROUGH */ 827 828 case TULIP_CHIP_MX98713A: 829 case TULIP_CHIP_MX98715A: 830 case TULIP_CHIP_MX98715AEC_X: 831 case TULIP_CHIP_MX98725: 832 /* 833 * The MX98713A has an MII as well as an internal Nway block, 834 * but no GPIO. The MX98715 and MX98725 have an internal 835 * Nway block only. 836 * 837 * The internal Nway block, unlike the Lite-On PNIC's, does 838 * just that - performs Nway. Once autonegotiation completes, 839 * we must program the GPR media information into the chip. 840 * 841 * The byte offset of the Ethernet address is stored at 842 * offset 0x70. 843 */ 844 memcpy(enaddr, &sc->sc_srom[sc->sc_srom[0x70]], ETHER_ADDR_LEN); 845 sc->sc_mediasw = &tlp_pmac_mediasw; 846 break; 847 848 case TULIP_CHIP_WB89C840F: 849 /* 850 * Winbond 89C840F's Ethernet address is the first 851 * 6 bytes of its EEPROM. 852 */ 853 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 854 855 /* 856 * Winbond 89C840F has an MII attached to the SIO. 857 */ 858 sc->sc_mediasw = &tlp_sio_mii_mediasw; 859 break; 860 861 case TULIP_CHIP_AL981: 862 /* 863 * The ADMtek AL981's Ethernet address is located 864 * at offset 8 of its EEPROM. 865 */ 866 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 867 868 /* 869 * ADMtek AL981 has a built-in PHY accessed through 870 * special registers. 871 */ 872 sc->sc_mediasw = &tlp_al981_mediasw; 873 break; 874 875 case TULIP_CHIP_AN983: 876 case TULIP_CHIP_AN985: 877 /* 878 * The ADMtek AN985's Ethernet address is located 879 * at offset 8 of its EEPROM. 880 */ 881 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 882 883 /* 884 * The ADMtek AN985 can be configured in Single-Chip 885 * mode or MAC-only mode. Single-Chip uses the built-in 886 * PHY, MAC-only has an external PHY (usually HomePNA). 887 * The selection is based on an EEPROM setting, and both 888 * PHYs are accessed via MII attached to SIO. 889 * 890 * The AN985 "ghosts" the internal PHY onto all 891 * MII addresses, so we have to use a media init 892 * routine that limits the search. 893 * XXX How does this work with MAC-only mode? 894 */ 895 sc->sc_mediasw = &tlp_an985_mediasw; 896 break; 897 898 case TULIP_CHIP_DM9102: 899 case TULIP_CHIP_DM9102A: 900 /* 901 * Some boards with the Davicom chip have an ISV 902 * SROM (mostly DM9102A boards -- trying to describe 903 * the HomePNA PHY, probably) although the data in 904 * them is generally wrong. Check for ISV format 905 * and grab the Ethernet address that way, and if 906 * that fails, fall back on grabbing it from an 907 * observed offset of 20 (which is where it would 908 * be in an ISV SROM anyhow, tho ISV can cope with 909 * multi-port boards). 910 */ 911 if (tlp_isv_srom_enaddr(sc, enaddr)) 912 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN); 913 914 /* 915 * Davicom chips all have an internal MII interface 916 * and a built-in PHY. DM9102A also has a an external 917 * MII interface, usually with a HomePNA PHY attached 918 * to it. 919 */ 920 sc->sc_mediasw = &tlp_dm9102_mediasw; 921 break; 922 923 default: 924 cant_cope: 925 printf("%s: sorry, unable to handle your board\n", 926 sc->sc_dev.dv_xname); 927 return; 928 } 929 930 /* 931 * Handle shared interrupts. 932 */ 933 if (psc->sc_flags & TULIP_PCI_SHAREDINTR) { 934 if (psc->sc_master) 935 psc->sc_flags |= TULIP_PCI_SLAVEINTR; 936 else { 937 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDINTR, 938 TULIP_PCI_SLAVEINTR); 939 if (psc->sc_master == NULL) 940 psc->sc_master = psc; 941 } 942 LIST_INSERT_HEAD(&psc->sc_master->sc_intrslaves, 943 psc, sc_intrq); 944 } 945 946 if (psc->sc_flags & TULIP_PCI_SLAVEINTR) { 947 printf("%s: sharing interrupt with %s\n", 948 sc->sc_dev.dv_xname, 949 psc->sc_master->sc_tulip.sc_dev.dv_xname); 950 } else { 951 /* 952 * Map and establish our interrupt. 953 */ 954 if (pci_intr_map(pa, &ih)) { 955 printf("%s: unable to map interrupt\n", 956 sc->sc_dev.dv_xname); 957 return; 958 } 959 intrstr = pci_intr_string(pc, ih); 960 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, 961 (psc->sc_flags & TULIP_PCI_SHAREDINTR) ? 962 tlp_pci_shared_intr : tlp_intr, sc); 963 if (psc->sc_ih == NULL) { 964 printf("%s: unable to establish interrupt", 965 sc->sc_dev.dv_xname); 966 if (intrstr != NULL) 967 printf(" at %s", intrstr); 968 printf("\n"); 969 return; 970 } 971 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, 972 intrstr); 973 } 974 975 /* 976 * Finish off the attach. 977 */ 978 tlp_attach(sc, enaddr); 979 } 980 981 int 982 tlp_pci_shared_intr(arg) 983 void *arg; 984 { 985 struct tulip_pci_softc *master = arg, *slave; 986 int rv = 0; 987 988 for (slave = LIST_FIRST(&master->sc_intrslaves); 989 slave != NULL; 990 slave = LIST_NEXT(slave, sc_intrq)) 991 rv |= tlp_intr(&slave->sc_tulip); 992 993 return (rv); 994 } 995 996 void 997 tlp_pci_dec_quirks(psc, enaddr) 998 struct tulip_pci_softc *psc; 999 const u_int8_t *enaddr; 1000 { 1001 struct tulip_softc *sc = &psc->sc_tulip; 1002 1003 /* 1004 * This isn't really a quirk-gathering device, really. We 1005 * just want to get the spiffy DEC board name from the SROM. 1006 */ 1007 strcpy(sc->sc_name, "DEC "); 1008 1009 if (memcmp(&sc->sc_srom[29], "DE500", 5) == 0 || 1010 memcmp(&sc->sc_srom[29], "DE450", 5) == 0) 1011 memcpy(&sc->sc_name[4], &sc->sc_srom[29], 8); 1012 } 1013 1014 void 1015 tlp_pci_znyx_21040_quirks(psc, enaddr) 1016 struct tulip_pci_softc *psc; 1017 const u_int8_t *enaddr; 1018 { 1019 struct tulip_softc *sc = &psc->sc_tulip; 1020 u_int16_t id = 0; 1021 1022 /* 1023 * If we have a slaved ROM, just copy the bits from the master. 1024 * This is in case we fail the ROM ID check (older boards) and 1025 * need to fall back on Ethernet address model checking; that 1026 * will fail for slave chips. 1027 */ 1028 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 1029 strcpy(sc->sc_name, psc->sc_master->sc_tulip.sc_name); 1030 sc->sc_mediasw = psc->sc_master->sc_tulip.sc_mediasw; 1031 psc->sc_flags |= 1032 psc->sc_master->sc_flags & TULIP_PCI_SHAREDINTR; 1033 return; 1034 } 1035 1036 if (sc->sc_srom[32] == 0x4a && sc->sc_srom[33] == 0x52) { 1037 id = sc->sc_srom[37] | (sc->sc_srom[36] << 8); 1038 switch (id) { 1039 zx312: 1040 case 0x0602: /* ZX312 */ 1041 strcpy(sc->sc_name, "ZNYX ZX312"); 1042 return; 1043 1044 case 0x0622: /* ZX312T */ 1045 strcpy(sc->sc_name, "ZNYX ZX312T"); 1046 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1047 return; 1048 1049 zx314_inta: 1050 case 0x0701: /* ZX314 INTA */ 1051 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1052 /* FALLTHROUGH */ 1053 case 0x0711: /* ZX314 */ 1054 strcpy(sc->sc_name, "ZNYX ZX314"); 1055 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1056 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1057 return; 1058 1059 zx315_inta: 1060 case 0x0801: /* ZX315 INTA */ 1061 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1062 /* FALLTHROUGH */ 1063 case 0x0811: /* ZX315 */ 1064 strcpy(sc->sc_name, "ZNYX ZX315"); 1065 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1066 return; 1067 1068 default: 1069 id = 0; 1070 break; 1071 } 1072 } 1073 1074 /* 1075 * Deal with boards that have broken ROMs. 1076 */ 1077 if (id == 0) { 1078 if ((enaddr[3] & ~3) == 0xf0 && (enaddr[5] & 3) == 0x00) 1079 goto zx314_inta; 1080 if ((enaddr[3] & ~3) == 0xf4 && (enaddr[5] & 1) == 0x00) 1081 goto zx315_inta; 1082 if ((enaddr[3] & ~3) == 0xec) 1083 goto zx312; 1084 } 1085 1086 strcpy(sc->sc_name, "ZNYX ZX31x"); 1087 } 1088 1089 void 1090 tlp_pci_smc_21040_quirks(psc, enaddr) 1091 struct tulip_pci_softc *psc; 1092 const u_int8_t *enaddr; 1093 { 1094 struct tulip_softc *sc = &psc->sc_tulip; 1095 u_int16_t id1, id2, ei; 1096 int auibnc = 0, utp = 0; 1097 char *cp; 1098 1099 id1 = sc->sc_srom[0x60] | (sc->sc_srom[0x61] << 8); 1100 id2 = sc->sc_srom[0x62] | (sc->sc_srom[0x63] << 8); 1101 ei = sc->sc_srom[0x66] | (sc->sc_srom[0x67] << 8); 1102 1103 strcpy(sc->sc_name, "SMC 8432"); 1104 cp = &sc->sc_name[8]; 1105 1106 if ((id1 & 1) == 0) { 1107 *cp++ = 'B'; 1108 auibnc = 1; 1109 } 1110 if ((id1 & 0xff) > 0x32) { 1111 *cp++ = 'T'; 1112 utp = 1; 1113 } 1114 if ((id1 & 0x4000) == 0) { 1115 *cp++ = 'A'; 1116 auibnc = 1; 1117 } 1118 if (id2 == 0x15) { 1119 sc->sc_name[7] = '4'; 1120 *cp++ = '-'; 1121 *cp++ = 'C'; 1122 *cp++ = 'H'; 1123 *cp++ = ei ? '2' : '1'; 1124 } 1125 *cp = '\0'; 1126 1127 if (utp != 0 && auibnc == 0) 1128 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1129 else if (utp == 0 && auibnc != 0) 1130 sc->sc_mediasw = &tlp_21040_auibnc_mediasw; 1131 } 1132 1133 void 1134 tlp_pci_cogent_21040_quirks(psc, enaddr) 1135 struct tulip_pci_softc *psc; 1136 const u_int8_t *enaddr; 1137 { 1138 1139 strcpy(psc->sc_tulip.sc_name, "Cogent multi-port"); 1140 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1141 } 1142 1143 void 1144 tlp_pci_accton_21040_quirks(psc, enaddr) 1145 struct tulip_pci_softc *psc; 1146 const u_int8_t *enaddr; 1147 { 1148 1149 strcpy(psc->sc_tulip.sc_name, "ACCTON EN1203"); 1150 } 1151 1152 void tlp_pci_asante_21140_reset __P((struct tulip_softc *)); 1153 1154 void 1155 tlp_pci_asante_21140_quirks(psc, enaddr) 1156 struct tulip_pci_softc *psc; 1157 const u_int8_t *enaddr; 1158 { 1159 struct tulip_softc *sc = &psc->sc_tulip; 1160 1161 /* 1162 * Some Asante boards don't use the ISV SROM format. For 1163 * those that don't, we initialize the GPIO direction bits, 1164 * and provide our own reset hook, which resets the MII. 1165 * 1166 * All of these boards use SIO-attached-MII media. 1167 */ 1168 if (sc->sc_mediasw == &tlp_2114x_isv_mediasw) 1169 return; 1170 1171 strcpy(sc->sc_name, "Asante"); 1172 1173 sc->sc_gp_dir = 0xbf; 1174 sc->sc_reset = tlp_pci_asante_21140_reset; 1175 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1176 } 1177 1178 void 1179 tlp_pci_asante_21140_reset(sc) 1180 struct tulip_softc *sc; 1181 { 1182 1183 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1184 TULIP_WRITE(sc, CSR_GPP, 0x8); 1185 delay(100); 1186 TULIP_WRITE(sc, CSR_GPP, 0); 1187 } 1188 1189 void tlp_pci_cobalt_21142_reset __P((struct tulip_softc *)); 1190 1191 void 1192 tlp_pci_cobalt_21142_quirks(psc, enaddr) 1193 struct tulip_pci_softc *psc; 1194 const u_int8_t *enaddr; 1195 { 1196 struct tulip_softc *sc = &psc->sc_tulip; 1197 1198 /* 1199 * Cobalt Networks interfaces are just MII-on-SIO. 1200 */ 1201 sc->sc_reset = tlp_pci_cobalt_21142_reset; 1202 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1203 1204 /* 1205 * The Cobalt systems tend to fall back to store-and-forward 1206 * pretty quickly, so we select that from the beginning to 1207 * avoid initial timeouts. 1208 */ 1209 sc->sc_txthresh = TXTH_SF; 1210 } 1211 1212 void 1213 tlp_pci_cobalt_21142_reset(sc) 1214 struct tulip_softc *sc; 1215 { 1216 /* 1217 * Reset PHY. 1218 */ 1219 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE | (1 << 16)); 1220 delay(10); 1221 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE); 1222 delay(10); 1223 } 1224 1225 void 1226 tlp_pci_algor_21142_quirks(psc, enaddr) 1227 struct tulip_pci_softc *psc; 1228 const u_int8_t *enaddr; 1229 { 1230 struct tulip_softc *sc = &psc->sc_tulip; 1231 1232 /* 1233 * Algorithmics boards just have MII-on-SIO. 1234 * 1235 * XXX They also have AUI on the serial interface. 1236 * XXX Deal with this. 1237 */ 1238 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1239 } 1240
Indexes created Wed Oct 01 13:09:50 GMT 2025