if_tlp_pci.c revision 1.52
1 /* $NetBSD: if_tlp_pci.c,v 1.52 2001/05/27 21:00:33 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * PCI bus front-end for the Digital Semiconductor ``Tulip'' (21x4x) 42 * Ethernet controller family driver. 43 */ 44 45 #include "opt_inet.h" 46 #include "opt_ns.h" 47 #include "bpfilter.h" 48 #include "opt_tlp.h" 49 50 #include <sys/param.h> 51 #include <sys/systm.h> 52 #include <sys/mbuf.h> 53 #include <sys/malloc.h> 54 #include <sys/kernel.h> 55 #include <sys/socket.h> 56 #include <sys/ioctl.h> 57 #include <sys/errno.h> 58 #include <sys/device.h> 59 60 #include <machine/endian.h> 61 62 #include <net/if.h> 63 #include <net/if_dl.h> 64 #include <net/if_media.h> 65 #include <net/if_ether.h> 66 67 #if NBPFILTER > 0 68 #include <net/bpf.h> 69 #endif 70 71 #ifdef INET 72 #include <netinet/in.h> 73 #include <netinet/if_inarp.h> 74 #endif 75 76 #ifdef NS 77 #include <netns/ns.h> 78 #include <netns/ns_if.h> 79 #endif 80 81 #include <machine/bus.h> 82 #include <machine/intr.h> 83 84 #include <dev/mii/miivar.h> 85 #include <dev/mii/mii_bitbang.h> 86 87 #include <dev/ic/tulipreg.h> 88 #include <dev/ic/tulipvar.h> 89 90 #include <dev/pci/pcivar.h> 91 #include <dev/pci/pcireg.h> 92 #include <dev/pci/pcidevs.h> 93 94 /* 95 * PCI configuration space registers used by the Tulip. 96 */ 97 #define TULIP_PCI_IOBA 0x10 /* i/o mapped base */ 98 #define TULIP_PCI_MMBA 0x14 /* memory mapped base */ 99 #define TULIP_PCI_CFDA 0x40 /* configuration driver area */ 100 101 #define CFDA_SLEEP 0x80000000 /* sleep mode */ 102 #define CFDA_SNOOZE 0x40000000 /* snooze mode */ 103 104 struct tulip_pci_softc { 105 struct tulip_softc sc_tulip; /* real Tulip softc */ 106 107 /* PCI-specific goo. */ 108 void *sc_ih; /* interrupt handle */ 109 110 pci_chipset_tag_t sc_pc; /* our PCI chipset */ 111 pcitag_t sc_pcitag; /* our PCI tag */ 112 113 int sc_flags; /* flags; see below */ 114 115 LIST_HEAD(, tulip_pci_softc) sc_intrslaves; 116 LIST_ENTRY(tulip_pci_softc) sc_intrq; 117 118 /* Our {ROM,interrupt} master. */ 119 struct tulip_pci_softc *sc_master; 120 }; 121 122 /* sc_flags */ 123 #define TULIP_PCI_SHAREDINTR 0x01 /* interrupt is shared */ 124 #define TULIP_PCI_SLAVEINTR 0x02 /* interrupt is slave */ 125 #define TULIP_PCI_SHAREDROM 0x04 /* ROM is shared */ 126 #define TULIP_PCI_SLAVEROM 0x08 /* slave of shared ROM */ 127 128 int tlp_pci_match __P((struct device *, struct cfdata *, void *)); 129 void tlp_pci_attach __P((struct device *, struct device *, void *)); 130 131 struct cfattach tlp_pci_ca = { 132 sizeof(struct tulip_pci_softc), tlp_pci_match, tlp_pci_attach, 133 }; 134 135 const struct tulip_pci_product { 136 u_int32_t tpp_vendor; /* PCI vendor ID */ 137 u_int32_t tpp_product; /* PCI product ID */ 138 tulip_chip_t tpp_chip; /* base Tulip chip type */ 139 } tlp_pci_products[] = { 140 #ifdef TLP_MATCH_21040 141 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21040, 142 TULIP_CHIP_21040 }, 143 #endif 144 #ifdef TLP_MATCH_21041 145 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21041, 146 TULIP_CHIP_21041 }, 147 #endif 148 #ifdef TLP_MATCH_21140 149 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21140, 150 TULIP_CHIP_21140 }, 151 #endif 152 #ifdef TLP_MATCH_21142 153 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142, 154 TULIP_CHIP_21142 }, 155 #endif 156 157 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C168, 158 TULIP_CHIP_82C168 }, 159 160 /* 161 * Note: This is like a MX98725 with Wake-On-LAN and a 162 * 128-bit multicast hash table. 163 */ 164 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C115, 165 TULIP_CHIP_82C115 }, 166 167 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98713, 168 TULIP_CHIP_MX98713 }, 169 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX987x5, 170 TULIP_CHIP_MX98715 }, 171 172 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100TX, 173 TULIP_CHIP_MX98713 }, 174 175 { PCI_VENDOR_WINBOND, PCI_PRODUCT_WINBOND_W89C840F, 176 TULIP_CHIP_WB89C840F }, 177 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100ATX, 178 TULIP_CHIP_WB89C840F }, 179 180 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9102, 181 TULIP_CHIP_DM9102 }, 182 183 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AL981, 184 TULIP_CHIP_AL981 }, 185 186 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN985, 187 TULIP_CHIP_AN985 }, 188 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN2242, 189 TULIP_CHIP_AN985 }, 190 191 #if 0 192 { PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX88140A, 193 TULIP_CHIP_AX88140 }, 194 #endif 195 196 { 0, 0, 197 TULIP_CHIP_INVALID }, 198 }; 199 200 struct tlp_pci_quirks { 201 void (*tpq_func) __P((struct tulip_pci_softc *, 202 const u_int8_t *)); 203 u_int8_t tpq_oui[3]; 204 }; 205 206 void tlp_pci_dec_quirks __P((struct tulip_pci_softc *, 207 const u_int8_t *)); 208 209 void tlp_pci_znyx_21040_quirks __P((struct tulip_pci_softc *, 210 const u_int8_t *)); 211 void tlp_pci_smc_21040_quirks __P((struct tulip_pci_softc *, 212 const u_int8_t *)); 213 void tlp_pci_cogent_21040_quirks __P((struct tulip_pci_softc *, 214 const u_int8_t *)); 215 void tlp_pci_accton_21040_quirks __P((struct tulip_pci_softc *, 216 const u_int8_t *)); 217 218 void tlp_pci_cobalt_21142_quirks __P((struct tulip_pci_softc *, 219 const u_int8_t *)); 220 void tlp_pci_algor_21142_quirks __P((struct tulip_pci_softc *, 221 const u_int8_t *)); 222 223 const struct tlp_pci_quirks tlp_pci_21040_quirks[] = { 224 { tlp_pci_znyx_21040_quirks, { 0x00, 0xc0, 0x95 } }, 225 { tlp_pci_smc_21040_quirks, { 0x00, 0x00, 0xc0 } }, 226 { tlp_pci_cogent_21040_quirks, { 0x00, 0x00, 0x92 } }, 227 { tlp_pci_accton_21040_quirks, { 0x00, 0x00, 0xe8 } }, 228 { NULL, { 0, 0, 0 } } 229 }; 230 231 const struct tlp_pci_quirks tlp_pci_21041_quirks[] = { 232 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 233 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 234 { NULL, { 0, 0, 0 } } 235 }; 236 237 void tlp_pci_asante_21140_quirks __P((struct tulip_pci_softc *, 238 const u_int8_t *)); 239 240 const struct tlp_pci_quirks tlp_pci_21140_quirks[] = { 241 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 242 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 243 { tlp_pci_asante_21140_quirks, { 0x00, 0x00, 0x94 } }, 244 { NULL, { 0, 0, 0 } } 245 }; 246 247 const struct tlp_pci_quirks tlp_pci_21142_quirks[] = { 248 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 249 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 250 { tlp_pci_cobalt_21142_quirks, { 0x00, 0x10, 0xe0 } }, 251 { tlp_pci_algor_21142_quirks, { 0x00, 0x40, 0xbc } }, 252 { NULL, { 0, 0, 0 } } 253 }; 254 255 int tlp_pci_shared_intr __P((void *)); 256 257 const struct tulip_pci_product *tlp_pci_lookup 258 __P((const struct pci_attach_args *)); 259 void tlp_pci_get_quirks __P((struct tulip_pci_softc *, const u_int8_t *, 260 const struct tlp_pci_quirks *)); 261 void tlp_pci_check_slaved __P((struct tulip_pci_softc *, int, int)); 262 263 const struct tulip_pci_product * 264 tlp_pci_lookup(pa) 265 const struct pci_attach_args *pa; 266 { 267 const struct tulip_pci_product *tpp; 268 269 for (tpp = tlp_pci_products; 270 tlp_chip_names[tpp->tpp_chip] != NULL; 271 tpp++) { 272 if (PCI_VENDOR(pa->pa_id) == tpp->tpp_vendor && 273 PCI_PRODUCT(pa->pa_id) == tpp->tpp_product) 274 return (tpp); 275 } 276 return (NULL); 277 } 278 279 void 280 tlp_pci_get_quirks(psc, enaddr, tpq) 281 struct tulip_pci_softc *psc; 282 const u_int8_t *enaddr; 283 const struct tlp_pci_quirks *tpq; 284 { 285 286 for (; tpq->tpq_func != NULL; tpq++) { 287 if (tpq->tpq_oui[0] == enaddr[0] && 288 tpq->tpq_oui[1] == enaddr[1] && 289 tpq->tpq_oui[2] == enaddr[2]) { 290 (*tpq->tpq_func)(psc, enaddr); 291 return; 292 } 293 } 294 } 295 296 void 297 tlp_pci_check_slaved(psc, shared, slaved) 298 struct tulip_pci_softc *psc; 299 int shared, slaved; 300 { 301 extern struct cfdriver tlp_cd; 302 struct tulip_pci_softc *cur, *best = NULL; 303 struct tulip_softc *sc = &psc->sc_tulip; 304 int i; 305 306 /* 307 * First of all, find the lowest pcidev numbered device on our 308 * bus marked as shared. That should be our master. 309 */ 310 for (i = 0; i < tlp_cd.cd_ndevs; i++) { 311 if ((cur = tlp_cd.cd_devs[i]) == NULL) 312 continue; 313 if (cur->sc_tulip.sc_dev.dv_parent != sc->sc_dev.dv_parent) 314 continue; 315 if ((cur->sc_flags & shared) == 0) 316 continue; 317 if (cur == psc) 318 continue; 319 if (best == NULL || 320 best->sc_tulip.sc_devno > cur->sc_tulip.sc_devno) 321 best = cur; 322 } 323 324 if (best != NULL) { 325 psc->sc_master = best; 326 psc->sc_flags |= (shared | slaved); 327 } 328 } 329 330 int 331 tlp_pci_match(parent, match, aux) 332 struct device *parent; 333 struct cfdata *match; 334 void *aux; 335 { 336 struct pci_attach_args *pa = aux; 337 338 if (tlp_pci_lookup(pa) != NULL) 339 return (10); /* beat if_de.c */ 340 341 return (0); 342 } 343 344 void 345 tlp_pci_attach(parent, self, aux) 346 struct device *parent, *self; 347 void *aux; 348 { 349 struct tulip_pci_softc *psc = (void *) self; 350 struct tulip_softc *sc = &psc->sc_tulip; 351 struct pci_attach_args *pa = aux; 352 pci_chipset_tag_t pc = pa->pa_pc; 353 pci_intr_handle_t ih; 354 const char *intrstr = NULL; 355 bus_space_tag_t iot, memt; 356 bus_space_handle_t ioh, memh; 357 int ioh_valid, memh_valid, i, j; 358 const struct tulip_pci_product *tpp; 359 u_int8_t enaddr[ETHER_ADDR_LEN]; 360 u_int32_t val; 361 pcireg_t reg; 362 int pmreg; 363 364 sc->sc_devno = pa->pa_device; 365 psc->sc_pc = pa->pa_pc; 366 psc->sc_pcitag = pa->pa_tag; 367 368 LIST_INIT(&psc->sc_intrslaves); 369 370 tpp = tlp_pci_lookup(pa); 371 if (tpp == NULL) { 372 printf("\n"); 373 panic("tlp_pci_attach: impossible"); 374 } 375 sc->sc_chip = tpp->tpp_chip; 376 377 /* 378 * By default, Tulip registers are 8 bytes long (4 bytes 379 * followed by a 4 byte pad). 380 */ 381 sc->sc_regshift = 3; 382 383 /* 384 * No power management hooks. 385 * XXX Maybe we should add some! 386 */ 387 sc->sc_flags |= TULIPF_ENABLED; 388 389 /* 390 * Get revision info, and set some chip-specific variables. 391 */ 392 sc->sc_rev = PCI_REVISION(pa->pa_class); 393 switch (sc->sc_chip) { 394 case TULIP_CHIP_21140: 395 if (sc->sc_rev >= 0x20) 396 sc->sc_chip = TULIP_CHIP_21140A; 397 break; 398 399 case TULIP_CHIP_21142: 400 if (sc->sc_rev >= 0x20) 401 sc->sc_chip = TULIP_CHIP_21143; 402 break; 403 404 case TULIP_CHIP_82C168: 405 if (sc->sc_rev >= 0x20) 406 sc->sc_chip = TULIP_CHIP_82C169; 407 break; 408 409 case TULIP_CHIP_MX98713: 410 if (sc->sc_rev >= 0x10) 411 sc->sc_chip = TULIP_CHIP_MX98713A; 412 break; 413 414 case TULIP_CHIP_MX98715: 415 if (sc->sc_rev >= 0x20) 416 sc->sc_chip = TULIP_CHIP_MX98715A; 417 if (sc->sc_rev >= 0x25) 418 sc->sc_chip = TULIP_CHIP_MX98715AEC_X; 419 if (sc->sc_rev >= 0x30) 420 sc->sc_chip = TULIP_CHIP_MX98725; 421 break; 422 423 case TULIP_CHIP_WB89C840F: 424 sc->sc_regshift = 2; 425 break; 426 427 case TULIP_CHIP_AN985: 428 /* 429 * The AN983 and AN985 are very similar, and are 430 * differentiated by a "signature" register that 431 * is like, but not identical, to a PCI ID register. 432 */ 433 reg = pci_conf_read(pc, pa->pa_tag, 0x80); 434 switch (reg) { 435 case 0x09811317: 436 sc->sc_chip = TULIP_CHIP_AN985; 437 break; 438 439 case 0x09851317: 440 sc->sc_chip = TULIP_CHIP_AN983; 441 break; 442 443 default: 444 /* Unknown -- use default. */ 445 break; 446 } 447 break; 448 449 case TULIP_CHIP_AX88140: 450 if (sc->sc_rev >= 0x10) 451 sc->sc_chip = TULIP_CHIP_AX88141; 452 break; 453 454 case TULIP_CHIP_DM9102: 455 if (sc->sc_rev >= 0x30) 456 sc->sc_chip = TULIP_CHIP_DM9102A; 457 break; 458 459 default: 460 /* Nothing. */ 461 break; 462 } 463 464 printf(": %s Ethernet, pass %d.%d\n", 465 tlp_chip_names[sc->sc_chip], 466 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf); 467 468 switch (sc->sc_chip) { 469 case TULIP_CHIP_21040: 470 if (sc->sc_rev < 0x20) { 471 printf("%s: 21040 must be at least pass 2.0\n", 472 sc->sc_dev.dv_xname); 473 return; 474 } 475 break; 476 477 case TULIP_CHIP_21140: 478 if (sc->sc_rev < 0x11) { 479 printf("%s: 21140 must be at least pass 1.1\n", 480 sc->sc_dev.dv_xname); 481 return; 482 } 483 break; 484 485 default: 486 /* Nothing. */ 487 break; 488 } 489 490 /* 491 * Check to see if the device is in power-save mode, and 492 * being it out if necessary. 493 */ 494 switch (sc->sc_chip) { 495 case TULIP_CHIP_21140: 496 case TULIP_CHIP_21140A: 497 case TULIP_CHIP_21142: 498 case TULIP_CHIP_21143: 499 case TULIP_CHIP_MX98713A: 500 case TULIP_CHIP_MX98715: 501 case TULIP_CHIP_MX98715A: 502 case TULIP_CHIP_MX98715AEC_X: 503 case TULIP_CHIP_MX98725: 504 case TULIP_CHIP_DM9102: 505 case TULIP_CHIP_DM9102A: 506 /* 507 * Clear the "sleep mode" bit in the CFDA register. 508 */ 509 reg = pci_conf_read(pc, pa->pa_tag, TULIP_PCI_CFDA); 510 if (reg & (CFDA_SLEEP|CFDA_SNOOZE)) 511 pci_conf_write(pc, pa->pa_tag, TULIP_PCI_CFDA, 512 reg & ~(CFDA_SLEEP|CFDA_SNOOZE)); 513 break; 514 515 default: 516 /* Nothing. */ 517 break; 518 } 519 520 if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PWRMGMT, &pmreg, 0)) { 521 reg = pci_conf_read(pc, pa->pa_tag, pmreg + 4); 522 switch (reg & PCI_PMCSR_STATE_MASK) { 523 case PCI_PMCSR_STATE_D1: 524 case PCI_PMCSR_STATE_D2: 525 printf(": waking up from power state D%d\n%s", 526 reg & PCI_PMCSR_STATE_MASK, sc->sc_dev.dv_xname); 527 pci_conf_write(pc, pa->pa_tag, pmreg + 4, 528 (reg & ~PCI_PMCSR_STATE_MASK) | 529 PCI_PMCSR_STATE_D0); 530 break; 531 case PCI_PMCSR_STATE_D3: 532 /* 533 * The card has lost all configuration data in 534 * this state, so punt. 535 */ 536 printf(": unable to wake up from power state D3, " 537 "reboot required.\n"); 538 pci_conf_write(pc, pa->pa_tag, pmreg + 4, 539 (reg & ~PCI_PMCSR_STATE_MASK) | 540 PCI_PMCSR_STATE_D0); 541 return; 542 } 543 } 544 545 /* 546 * Map the device. 547 */ 548 ioh_valid = (pci_mapreg_map(pa, TULIP_PCI_IOBA, 549 PCI_MAPREG_TYPE_IO, 0, 550 &iot, &ioh, NULL, NULL) == 0); 551 memh_valid = (pci_mapreg_map(pa, TULIP_PCI_MMBA, 552 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 553 &memt, &memh, NULL, NULL) == 0); 554 555 if (memh_valid) { 556 sc->sc_st = memt; 557 sc->sc_sh = memh; 558 } else if (ioh_valid) { 559 sc->sc_st = iot; 560 sc->sc_sh = ioh; 561 } else { 562 printf(": unable to map device registers\n"); 563 return; 564 } 565 566 sc->sc_dmat = pa->pa_dmat; 567 568 /* 569 * Make sure bus mastering is enabled. 570 */ 571 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 572 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 573 PCI_COMMAND_MASTER_ENABLE); 574 575 /* 576 * Get the cacheline size. 577 */ 578 sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag, 579 PCI_BHLC_REG)); 580 581 /* 582 * Get PCI data moving command info. 583 */ 584 if (pa->pa_flags & PCI_FLAGS_MRL_OKAY) 585 sc->sc_flags |= TULIPF_MRL; 586 if (pa->pa_flags & PCI_FLAGS_MRM_OKAY) 587 sc->sc_flags |= TULIPF_MRM; 588 if (pa->pa_flags & PCI_FLAGS_MWI_OKAY) 589 sc->sc_flags |= TULIPF_MWI; 590 591 /* 592 * Read the contents of the Ethernet Address ROM/SROM. 593 */ 594 switch (sc->sc_chip) { 595 case TULIP_CHIP_21040: 596 sc->sc_srom_addrbits = 6; 597 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, M_NOWAIT); 598 TULIP_WRITE(sc, CSR_MIIROM, MIIROM_SROMCS); 599 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 600 for (j = 0; j < 10000; j++) { 601 val = TULIP_READ(sc, CSR_MIIROM); 602 if ((val & MIIROM_DN) == 0) 603 break; 604 } 605 sc->sc_srom[i] = val & MIIROM_DATA; 606 } 607 break; 608 609 case TULIP_CHIP_82C168: 610 case TULIP_CHIP_82C169: 611 { 612 sc->sc_srom_addrbits = 2; 613 sc->sc_srom = malloc(TULIP_ROM_SIZE(2), M_DEVBUF, M_NOWAIT); 614 615 /* 616 * The Lite-On PNIC stores the Ethernet address in 617 * the first 3 words of the EEPROM. EEPROM access 618 * is not like the other Tulip chips. 619 */ 620 for (i = 0; i < 6; i += 2) { 621 TULIP_WRITE(sc, CSR_PNIC_SROMCTL, 622 PNIC_SROMCTL_READ | (i >> 1)); 623 for (j = 0; j < 500; j++) { 624 delay(2); 625 val = TULIP_READ(sc, CSR_MIIROM); 626 if ((val & PNIC_MIIROM_BUSY) == 0) 627 break; 628 } 629 if (val & PNIC_MIIROM_BUSY) { 630 printf("%s: EEPROM timed out\n", 631 sc->sc_dev.dv_xname); 632 return; 633 } 634 val &= PNIC_MIIROM_DATA; 635 sc->sc_srom[i] = val >> 8; 636 sc->sc_srom[i + 1] = val & 0xff; 637 } 638 break; 639 } 640 641 default: 642 #ifdef algor 643 /* 644 * XXX This should be done with device properties, but 645 * XXX we don't have those yet. 646 */ 647 if (algor_get_ethaddr(pa, NULL)) { 648 extern int tlp_srom_debug; 649 sc->sc_srom_addrbits = 6; 650 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, 651 M_NOWAIT); 652 memset(sc->sc_srom, 0, TULIP_ROM_SIZE(6)); 653 algor_get_ethaddr(pa, sc->sc_srom); 654 if (tlp_srom_debug) { 655 printf("SROM CONTENTS:"); 656 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 657 if ((i % 8) == 0) 658 printf("\n\t"); 659 printf("0x%02x ", sc->sc_srom[i]); 660 } 661 printf("\n"); 662 } 663 break; 664 } 665 #endif /* algor */ 666 if (tlp_read_srom(sc) == 0) 667 goto cant_cope; 668 break; 669 } 670 671 /* 672 * Deal with chip/board quirks. This includes setting up 673 * the mediasw, and extracting the Ethernet address from 674 * the rombuf. 675 */ 676 switch (sc->sc_chip) { 677 case TULIP_CHIP_21040: 678 /* Check for a slaved ROM on a multi-port board. */ 679 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDROM, 680 TULIP_PCI_SLAVEROM); 681 if (psc->sc_flags & TULIP_PCI_SLAVEROM) 682 memcpy(sc->sc_srom, psc->sc_master->sc_tulip.sc_srom, 683 sizeof(sc->sc_srom)); 684 685 /* 686 * Parse the Ethernet Address ROM. 687 */ 688 if (tlp_parse_old_srom(sc, enaddr) == 0) 689 goto cant_cope; 690 691 /* 692 * If we have a slaved ROM, adjust the Ethernet address. 693 */ 694 if (psc->sc_flags & TULIP_PCI_SLAVEROM) 695 enaddr[5] += 696 sc->sc_devno - psc->sc_master->sc_tulip.sc_devno; 697 698 /* 699 * All 21040 boards start out with the same 700 * media switch. 701 */ 702 sc->sc_mediasw = &tlp_21040_mediasw; 703 704 /* 705 * Deal with any quirks this board might have. 706 */ 707 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21040_quirks); 708 break; 709 710 case TULIP_CHIP_21041: 711 /* Check for a slaved ROM on a multi-port board. */ 712 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDROM, 713 TULIP_PCI_SLAVEROM); 714 if (psc->sc_flags & TULIP_PCI_SLAVEROM) 715 memcpy(sc->sc_srom, psc->sc_master->sc_tulip.sc_srom, 716 sizeof(sc->sc_srom)); 717 718 /* Check for new format SROM. */ 719 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 720 /* 721 * Not an ISV SROM; try the old DEC Ethernet Address 722 * ROM format. 723 */ 724 if (tlp_parse_old_srom(sc, enaddr) == 0) 725 goto cant_cope; 726 } 727 728 /* 729 * All 21041 boards use the same media switch; they all 730 * work basically the same! Yippee! 731 */ 732 sc->sc_mediasw = &tlp_21041_mediasw; 733 734 /* 735 * Deal with any quirks this board might have. 736 */ 737 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21041_quirks); 738 break; 739 740 case TULIP_CHIP_21140: 741 case TULIP_CHIP_21140A: 742 /* Check for new format SROM. */ 743 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 744 /* 745 * Not an ISV SROM; try the old DEC Ethernet Address 746 * ROM format. 747 */ 748 if (tlp_parse_old_srom(sc, enaddr) == 0) 749 goto cant_cope; 750 } else { 751 /* 752 * We start out with the 2114x ISV media switch. 753 * When we search for quirks, we may change to 754 * a different switch. 755 */ 756 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 757 } 758 759 /* 760 * Deal with any quirks this board might have. 761 */ 762 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21140_quirks); 763 764 /* 765 * Bail out now if we can't deal with this board. 766 */ 767 if (sc->sc_mediasw == NULL) 768 goto cant_cope; 769 break; 770 771 case TULIP_CHIP_21142: 772 case TULIP_CHIP_21143: 773 /* Check for new format SROM. */ 774 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 775 /* 776 * Not an ISV SROM; try the old DEC Ethernet Address 777 * ROM format. 778 */ 779 if (tlp_parse_old_srom(sc, enaddr) == 0) 780 goto cant_cope; 781 } else { 782 /* 783 * We start out with the 2114x ISV media switch. 784 * When we search for quirks, we may change to 785 * a different switch. 786 */ 787 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 788 } 789 790 /* 791 * Deal with any quirks this board might have. 792 */ 793 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21142_quirks); 794 795 /* 796 * Bail out now if we can't deal with this board. 797 */ 798 if (sc->sc_mediasw == NULL) 799 goto cant_cope; 800 break; 801 802 case TULIP_CHIP_82C168: 803 case TULIP_CHIP_82C169: 804 /* 805 * Lite-On PNIC's Ethernet address is the first 6 806 * bytes of its EEPROM. 807 */ 808 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 809 810 /* 811 * Lite-On PNICs always use the same mediasw; we 812 * select MII vs. internal NWAY automatically. 813 */ 814 sc->sc_mediasw = &tlp_pnic_mediasw; 815 break; 816 817 case TULIP_CHIP_MX98713: 818 /* 819 * The Macronix MX98713 has an MII and GPIO, but no 820 * internal Nway block. This chip is basically a 821 * perfect 21140A clone, with the exception of the 822 * a magic register frobbing in order to make the 823 * interface function. 824 */ 825 if (tlp_isv_srom_enaddr(sc, enaddr)) { 826 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 827 break; 828 } 829 /* FALLTHROUGH */ 830 831 case TULIP_CHIP_82C115: 832 /* 833 * Yippee! The Lite-On 82C115 is a clone of 834 * the MX98725 (the data sheet even says `MXIC' 835 * on it)! Imagine that, a clone of a clone. 836 * 837 * The differences are really minimal: 838 * 839 * - Wake-On-LAN support 840 * - 128-bit multicast hash table, rather than 841 * the standard 512-bit hash table 842 */ 843 /* FALLTHROUGH */ 844 845 case TULIP_CHIP_MX98713A: 846 case TULIP_CHIP_MX98715A: 847 case TULIP_CHIP_MX98715AEC_X: 848 case TULIP_CHIP_MX98725: 849 /* 850 * The MX98713A has an MII as well as an internal Nway block, 851 * but no GPIO. The MX98715 and MX98725 have an internal 852 * Nway block only. 853 * 854 * The internal Nway block, unlike the Lite-On PNIC's, does 855 * just that - performs Nway. Once autonegotiation completes, 856 * we must program the GPR media information into the chip. 857 * 858 * The byte offset of the Ethernet address is stored at 859 * offset 0x70. 860 */ 861 memcpy(enaddr, &sc->sc_srom[sc->sc_srom[0x70]], ETHER_ADDR_LEN); 862 sc->sc_mediasw = &tlp_pmac_mediasw; 863 break; 864 865 case TULIP_CHIP_WB89C840F: 866 /* 867 * Winbond 89C840F's Ethernet address is the first 868 * 6 bytes of its EEPROM. 869 */ 870 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 871 872 /* 873 * Winbond 89C840F has an MII attached to the SIO. 874 */ 875 sc->sc_mediasw = &tlp_sio_mii_mediasw; 876 break; 877 878 case TULIP_CHIP_AL981: 879 /* 880 * The ADMtek AL981's Ethernet address is located 881 * at offset 8 of its EEPROM. 882 */ 883 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 884 885 /* 886 * ADMtek AL981 has a built-in PHY accessed through 887 * special registers. 888 */ 889 sc->sc_mediasw = &tlp_al981_mediasw; 890 break; 891 892 case TULIP_CHIP_AN983: 893 case TULIP_CHIP_AN985: 894 /* 895 * The ADMtek AN985's Ethernet address is located 896 * at offset 8 of its EEPROM. 897 */ 898 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 899 900 /* 901 * The ADMtek AN985 can be configured in Single-Chip 902 * mode or MAC-only mode. Single-Chip uses the built-in 903 * PHY, MAC-only has an external PHY (usually HomePNA). 904 * The selection is based on an EEPROM setting, and both 905 * PHYs are accessed via MII attached to SIO. 906 * 907 * The AN985 "ghosts" the internal PHY onto all 908 * MII addresses, so we have to use a media init 909 * routine that limits the search. 910 * XXX How does this work with MAC-only mode? 911 */ 912 sc->sc_mediasw = &tlp_an985_mediasw; 913 break; 914 915 case TULIP_CHIP_DM9102: 916 case TULIP_CHIP_DM9102A: 917 /* 918 * Some boards with the Davicom chip have an ISV 919 * SROM (mostly DM9102A boards -- trying to describe 920 * the HomePNA PHY, probably) although the data in 921 * them is generally wrong. Check for ISV format 922 * and grab the Ethernet address that way, and if 923 * that fails, fall back on grabbing it from an 924 * observed offset of 20 (which is where it would 925 * be in an ISV SROM anyhow, tho ISV can cope with 926 * multi-port boards). 927 */ 928 if (tlp_isv_srom_enaddr(sc, enaddr)) 929 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN); 930 931 /* 932 * Davicom chips all have an internal MII interface 933 * and a built-in PHY. DM9102A also has a an external 934 * MII interface, usually with a HomePNA PHY attached 935 * to it. 936 */ 937 sc->sc_mediasw = &tlp_dm9102_mediasw; 938 break; 939 940 default: 941 cant_cope: 942 printf("%s: sorry, unable to handle your board\n", 943 sc->sc_dev.dv_xname); 944 return; 945 } 946 947 /* 948 * Handle shared interrupts. 949 */ 950 if (psc->sc_flags & TULIP_PCI_SHAREDINTR) { 951 if (psc->sc_master) 952 psc->sc_flags |= TULIP_PCI_SLAVEINTR; 953 else { 954 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDINTR, 955 TULIP_PCI_SLAVEINTR); 956 if (psc->sc_master == NULL) 957 psc->sc_master = psc; 958 } 959 LIST_INSERT_HEAD(&psc->sc_master->sc_intrslaves, 960 psc, sc_intrq); 961 } 962 963 if (psc->sc_flags & TULIP_PCI_SLAVEINTR) { 964 printf("%s: sharing interrupt with %s\n", 965 sc->sc_dev.dv_xname, 966 psc->sc_master->sc_tulip.sc_dev.dv_xname); 967 } else { 968 /* 969 * Map and establish our interrupt. 970 */ 971 if (pci_intr_map(pa, &ih)) { 972 printf("%s: unable to map interrupt\n", 973 sc->sc_dev.dv_xname); 974 return; 975 } 976 intrstr = pci_intr_string(pc, ih); 977 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, 978 (psc->sc_flags & TULIP_PCI_SHAREDINTR) ? 979 tlp_pci_shared_intr : tlp_intr, sc); 980 if (psc->sc_ih == NULL) { 981 printf("%s: unable to establish interrupt", 982 sc->sc_dev.dv_xname); 983 if (intrstr != NULL) 984 printf(" at %s", intrstr); 985 printf("\n"); 986 return; 987 } 988 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, 989 intrstr); 990 } 991 992 /* 993 * Finish off the attach. 994 */ 995 tlp_attach(sc, enaddr); 996 } 997 998 int 999 tlp_pci_shared_intr(arg) 1000 void *arg; 1001 { 1002 struct tulip_pci_softc *master = arg, *slave; 1003 int rv = 0; 1004 1005 for (slave = LIST_FIRST(&master->sc_intrslaves); 1006 slave != NULL; 1007 slave = LIST_NEXT(slave, sc_intrq)) 1008 rv |= tlp_intr(&slave->sc_tulip); 1009 1010 return (rv); 1011 } 1012 1013 void 1014 tlp_pci_dec_quirks(psc, enaddr) 1015 struct tulip_pci_softc *psc; 1016 const u_int8_t *enaddr; 1017 { 1018 struct tulip_softc *sc = &psc->sc_tulip; 1019 1020 /* 1021 * This isn't really a quirk-gathering device, really. We 1022 * just want to get the spiffy DEC board name from the SROM. 1023 */ 1024 strcpy(sc->sc_name, "DEC "); 1025 1026 if (memcmp(&sc->sc_srom[29], "DE500", 5) == 0 || 1027 memcmp(&sc->sc_srom[29], "DE450", 5) == 0) 1028 memcpy(&sc->sc_name[4], &sc->sc_srom[29], 8); 1029 } 1030 1031 void 1032 tlp_pci_znyx_21040_quirks(psc, enaddr) 1033 struct tulip_pci_softc *psc; 1034 const u_int8_t *enaddr; 1035 { 1036 struct tulip_softc *sc = &psc->sc_tulip; 1037 u_int16_t id = 0; 1038 1039 /* 1040 * If we have a slaved ROM, just copy the bits from the master. 1041 * This is in case we fail the ROM ID check (older boards) and 1042 * need to fall back on Ethernet address model checking; that 1043 * will fail for slave chips. 1044 */ 1045 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 1046 strcpy(sc->sc_name, psc->sc_master->sc_tulip.sc_name); 1047 sc->sc_mediasw = psc->sc_master->sc_tulip.sc_mediasw; 1048 psc->sc_flags |= 1049 psc->sc_master->sc_flags & TULIP_PCI_SHAREDINTR; 1050 return; 1051 } 1052 1053 if (sc->sc_srom[32] == 0x4a && sc->sc_srom[33] == 0x52) { 1054 id = sc->sc_srom[37] | (sc->sc_srom[36] << 8); 1055 switch (id) { 1056 zx312: 1057 case 0x0602: /* ZX312 */ 1058 strcpy(sc->sc_name, "ZNYX ZX312"); 1059 return; 1060 1061 case 0x0622: /* ZX312T */ 1062 strcpy(sc->sc_name, "ZNYX ZX312T"); 1063 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1064 return; 1065 1066 zx314_inta: 1067 case 0x0701: /* ZX314 INTA */ 1068 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1069 /* FALLTHROUGH */ 1070 case 0x0711: /* ZX314 */ 1071 strcpy(sc->sc_name, "ZNYX ZX314"); 1072 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1073 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1074 return; 1075 1076 zx315_inta: 1077 case 0x0801: /* ZX315 INTA */ 1078 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1079 /* FALLTHROUGH */ 1080 case 0x0811: /* ZX315 */ 1081 strcpy(sc->sc_name, "ZNYX ZX315"); 1082 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1083 return; 1084 1085 default: 1086 id = 0; 1087 break; 1088 } 1089 } 1090 1091 /* 1092 * Deal with boards that have broken ROMs. 1093 */ 1094 if (id == 0) { 1095 if ((enaddr[3] & ~3) == 0xf0 && (enaddr[5] & 3) == 0x00) 1096 goto zx314_inta; 1097 if ((enaddr[3] & ~3) == 0xf4 && (enaddr[5] & 1) == 0x00) 1098 goto zx315_inta; 1099 if ((enaddr[3] & ~3) == 0xec) 1100 goto zx312; 1101 } 1102 1103 strcpy(sc->sc_name, "ZNYX ZX31x"); 1104 } 1105 1106 void 1107 tlp_pci_smc_21040_quirks(psc, enaddr) 1108 struct tulip_pci_softc *psc; 1109 const u_int8_t *enaddr; 1110 { 1111 struct tulip_softc *sc = &psc->sc_tulip; 1112 u_int16_t id1, id2, ei; 1113 int auibnc = 0, utp = 0; 1114 char *cp; 1115 1116 id1 = sc->sc_srom[0x60] | (sc->sc_srom[0x61] << 8); 1117 id2 = sc->sc_srom[0x62] | (sc->sc_srom[0x63] << 8); 1118 ei = sc->sc_srom[0x66] | (sc->sc_srom[0x67] << 8); 1119 1120 strcpy(sc->sc_name, "SMC 8432"); 1121 cp = &sc->sc_name[8]; 1122 1123 if ((id1 & 1) == 0) { 1124 *cp++ = 'B'; 1125 auibnc = 1; 1126 } 1127 if ((id1 & 0xff) > 0x32) { 1128 *cp++ = 'T'; 1129 utp = 1; 1130 } 1131 if ((id1 & 0x4000) == 0) { 1132 *cp++ = 'A'; 1133 auibnc = 1; 1134 } 1135 if (id2 == 0x15) { 1136 sc->sc_name[7] = '4'; 1137 *cp++ = '-'; 1138 *cp++ = 'C'; 1139 *cp++ = 'H'; 1140 *cp++ = ei ? '2' : '1'; 1141 } 1142 *cp = '\0'; 1143 1144 if (utp != 0 && auibnc == 0) 1145 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1146 else if (utp == 0 && auibnc != 0) 1147 sc->sc_mediasw = &tlp_21040_auibnc_mediasw; 1148 } 1149 1150 void 1151 tlp_pci_cogent_21040_quirks(psc, enaddr) 1152 struct tulip_pci_softc *psc; 1153 const u_int8_t *enaddr; 1154 { 1155 1156 strcpy(psc->sc_tulip.sc_name, "Cogent multi-port"); 1157 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1158 } 1159 1160 void 1161 tlp_pci_accton_21040_quirks(psc, enaddr) 1162 struct tulip_pci_softc *psc; 1163 const u_int8_t *enaddr; 1164 { 1165 1166 strcpy(psc->sc_tulip.sc_name, "ACCTON EN1203"); 1167 } 1168 1169 void tlp_pci_asante_21140_reset __P((struct tulip_softc *)); 1170 1171 void 1172 tlp_pci_asante_21140_quirks(psc, enaddr) 1173 struct tulip_pci_softc *psc; 1174 const u_int8_t *enaddr; 1175 { 1176 struct tulip_softc *sc = &psc->sc_tulip; 1177 1178 /* 1179 * Some Asante boards don't use the ISV SROM format. For 1180 * those that don't, we initialize the GPIO direction bits, 1181 * and provide our own reset hook, which resets the MII. 1182 * 1183 * All of these boards use SIO-attached-MII media. 1184 */ 1185 if (sc->sc_mediasw == &tlp_2114x_isv_mediasw) 1186 return; 1187 1188 strcpy(sc->sc_name, "Asante"); 1189 1190 sc->sc_gp_dir = 0xbf; 1191 sc->sc_reset = tlp_pci_asante_21140_reset; 1192 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1193 } 1194 1195 void 1196 tlp_pci_asante_21140_reset(sc) 1197 struct tulip_softc *sc; 1198 { 1199 1200 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1201 TULIP_WRITE(sc, CSR_GPP, 0x8); 1202 delay(100); 1203 TULIP_WRITE(sc, CSR_GPP, 0); 1204 } 1205 1206 void tlp_pci_cobalt_21142_reset __P((struct tulip_softc *)); 1207 1208 void 1209 tlp_pci_cobalt_21142_quirks(psc, enaddr) 1210 struct tulip_pci_softc *psc; 1211 const u_int8_t *enaddr; 1212 { 1213 struct tulip_softc *sc = &psc->sc_tulip; 1214 1215 /* 1216 * Cobalt Networks interfaces are just MII-on-SIO. 1217 */ 1218 sc->sc_reset = tlp_pci_cobalt_21142_reset; 1219 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1220 1221 /* 1222 * The Cobalt systems tend to fall back to store-and-forward 1223 * pretty quickly, so we select that from the beginning to 1224 * avoid initial timeouts. 1225 */ 1226 sc->sc_txthresh = TXTH_SF; 1227 } 1228 1229 void 1230 tlp_pci_cobalt_21142_reset(sc) 1231 struct tulip_softc *sc; 1232 { 1233 /* 1234 * Reset PHY. 1235 */ 1236 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE | (1 << 16)); 1237 delay(10); 1238 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE); 1239 delay(10); 1240 } 1241 1242 void 1243 tlp_pci_algor_21142_quirks(psc, enaddr) 1244 struct tulip_pci_softc *psc; 1245 const u_int8_t *enaddr; 1246 { 1247 struct tulip_softc *sc = &psc->sc_tulip; 1248 1249 /* 1250 * Algorithmics boards just have MII-on-SIO. 1251 * 1252 * XXX They also have AUI on the serial interface. 1253 * XXX Deal with this. 1254 */ 1255 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1256 } 1257
Indexes created Wed Sep 24 05:09:52 GMT 2025