if_tlp_pci.c revision 1.58
1 /* $NetBSD: if_tlp_pci.c,v 1.58 2002/02/14 07:59:55 chs Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * PCI bus front-end for the Digital Semiconductor ``Tulip'' (21x4x) 42 * Ethernet controller family driver. 43 */ 44 45 #include <sys/cdefs.h> 46 __KERNEL_RCSID(0, "$NetBSD: if_tlp_pci.c,v 1.58 2002/02/14 07:59:55 chs Exp $"); 47 48 #include "opt_tlp.h" 49 50 #include <sys/param.h> 51 #include <sys/systm.h> 52 #include <sys/mbuf.h> 53 #include <sys/malloc.h> 54 #include <sys/kernel.h> 55 #include <sys/socket.h> 56 #include <sys/ioctl.h> 57 #include <sys/errno.h> 58 #include <sys/device.h> 59 60 #include <machine/endian.h> 61 62 #include <net/if.h> 63 #include <net/if_dl.h> 64 #include <net/if_media.h> 65 #include <net/if_ether.h> 66 67 #include <machine/bus.h> 68 #include <machine/intr.h> 69 70 #include <dev/mii/miivar.h> 71 #include <dev/mii/mii_bitbang.h> 72 73 #include <dev/ic/tulipreg.h> 74 #include <dev/ic/tulipvar.h> 75 76 #include <dev/pci/pcivar.h> 77 #include <dev/pci/pcireg.h> 78 #include <dev/pci/pcidevs.h> 79 80 /* 81 * PCI configuration space registers used by the Tulip. 82 */ 83 #define TULIP_PCI_IOBA 0x10 /* i/o mapped base */ 84 #define TULIP_PCI_MMBA 0x14 /* memory mapped base */ 85 #define TULIP_PCI_CFDA 0x40 /* configuration driver area */ 86 87 #define CFDA_SLEEP 0x80000000 /* sleep mode */ 88 #define CFDA_SNOOZE 0x40000000 /* snooze mode */ 89 90 struct tulip_pci_softc { 91 struct tulip_softc sc_tulip; /* real Tulip softc */ 92 93 /* PCI-specific goo. */ 94 void *sc_ih; /* interrupt handle */ 95 96 pci_chipset_tag_t sc_pc; /* our PCI chipset */ 97 pcitag_t sc_pcitag; /* our PCI tag */ 98 99 int sc_flags; /* flags; see below */ 100 101 LIST_HEAD(, tulip_pci_softc) sc_intrslaves; 102 LIST_ENTRY(tulip_pci_softc) sc_intrq; 103 104 /* Our {ROM,interrupt} master. */ 105 struct tulip_pci_softc *sc_master; 106 }; 107 108 /* sc_flags */ 109 #define TULIP_PCI_SHAREDINTR 0x01 /* interrupt is shared */ 110 #define TULIP_PCI_SLAVEINTR 0x02 /* interrupt is slave */ 111 #define TULIP_PCI_SHAREDROM 0x04 /* ROM is shared */ 112 #define TULIP_PCI_SLAVEROM 0x08 /* slave of shared ROM */ 113 114 int tlp_pci_match __P((struct device *, struct cfdata *, void *)); 115 void tlp_pci_attach __P((struct device *, struct device *, void *)); 116 117 struct cfattach tlp_pci_ca = { 118 sizeof(struct tulip_pci_softc), tlp_pci_match, tlp_pci_attach, 119 }; 120 121 const struct tulip_pci_product { 122 u_int32_t tpp_vendor; /* PCI vendor ID */ 123 u_int32_t tpp_product; /* PCI product ID */ 124 tulip_chip_t tpp_chip; /* base Tulip chip type */ 125 } tlp_pci_products[] = { 126 #ifdef TLP_MATCH_21040 127 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21040, 128 TULIP_CHIP_21040 }, 129 #endif 130 #ifdef TLP_MATCH_21041 131 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21041, 132 TULIP_CHIP_21041 }, 133 #endif 134 #ifdef TLP_MATCH_21140 135 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21140, 136 TULIP_CHIP_21140 }, 137 #endif 138 #ifdef TLP_MATCH_21142 139 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142, 140 TULIP_CHIP_21142 }, 141 #endif 142 143 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C168, 144 TULIP_CHIP_82C168 }, 145 146 /* 147 * Note: This is like a MX98725 with Wake-On-LAN and a 148 * 128-bit multicast hash table. 149 */ 150 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C115, 151 TULIP_CHIP_82C115 }, 152 153 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98713, 154 TULIP_CHIP_MX98713 }, 155 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX987x5, 156 TULIP_CHIP_MX98715 }, 157 158 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100TX, 159 TULIP_CHIP_MX98713 }, 160 161 { PCI_VENDOR_WINBOND, PCI_PRODUCT_WINBOND_W89C840F, 162 TULIP_CHIP_WB89C840F }, 163 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100ATX, 164 TULIP_CHIP_WB89C840F }, 165 166 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9102, 167 TULIP_CHIP_DM9102 }, 168 169 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AL981, 170 TULIP_CHIP_AL981 }, 171 172 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN985, 173 TULIP_CHIP_AN985 }, 174 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN2242, 175 TULIP_CHIP_AN985 }, 176 177 #if 0 178 { PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX88140A, 179 TULIP_CHIP_AX88140 }, 180 #endif 181 182 { 0, 0, 183 TULIP_CHIP_INVALID }, 184 }; 185 186 struct tlp_pci_quirks { 187 void (*tpq_func) __P((struct tulip_pci_softc *, 188 const u_int8_t *)); 189 u_int8_t tpq_oui[3]; 190 }; 191 192 void tlp_pci_dec_quirks __P((struct tulip_pci_softc *, 193 const u_int8_t *)); 194 195 void tlp_pci_znyx_21040_quirks __P((struct tulip_pci_softc *, 196 const u_int8_t *)); 197 void tlp_pci_smc_21040_quirks __P((struct tulip_pci_softc *, 198 const u_int8_t *)); 199 void tlp_pci_cogent_21040_quirks __P((struct tulip_pci_softc *, 200 const u_int8_t *)); 201 void tlp_pci_accton_21040_quirks __P((struct tulip_pci_softc *, 202 const u_int8_t *)); 203 204 void tlp_pci_cobalt_21142_quirks __P((struct tulip_pci_softc *, 205 const u_int8_t *)); 206 void tlp_pci_algor_21142_quirks __P((struct tulip_pci_softc *, 207 const u_int8_t *)); 208 209 void tlp_pci_adaptec_21143_quirks __P((struct tulip_pci_softc *, 210 const u_int8_t *)); 211 212 const struct tlp_pci_quirks tlp_pci_21040_quirks[] = { 213 { tlp_pci_znyx_21040_quirks, { 0x00, 0xc0, 0x95 } }, 214 { tlp_pci_smc_21040_quirks, { 0x00, 0x00, 0xc0 } }, 215 { tlp_pci_cogent_21040_quirks, { 0x00, 0x00, 0x92 } }, 216 { tlp_pci_accton_21040_quirks, { 0x00, 0x00, 0xe8 } }, 217 { NULL, { 0, 0, 0 } } 218 }; 219 220 const struct tlp_pci_quirks tlp_pci_21041_quirks[] = { 221 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 222 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 223 { NULL, { 0, 0, 0 } } 224 }; 225 226 void tlp_pci_asante_21140_quirks __P((struct tulip_pci_softc *, 227 const u_int8_t *)); 228 229 const struct tlp_pci_quirks tlp_pci_21140_quirks[] = { 230 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 231 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 232 { tlp_pci_asante_21140_quirks, { 0x00, 0x00, 0x94 } }, 233 { NULL, { 0, 0, 0 } } 234 }; 235 236 const struct tlp_pci_quirks tlp_pci_21142_quirks[] = { 237 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 238 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 239 { tlp_pci_cobalt_21142_quirks, { 0x00, 0x10, 0xe0 } }, 240 { tlp_pci_algor_21142_quirks, { 0x00, 0x40, 0xbc } }, 241 { tlp_pci_adaptec_21143_quirks, { 0x00, 0x00, 0xd1 } }, 242 { NULL, { 0, 0, 0 } } 243 }; 244 245 int tlp_pci_shared_intr __P((void *)); 246 247 const struct tulip_pci_product *tlp_pci_lookup 248 __P((const struct pci_attach_args *)); 249 void tlp_pci_get_quirks __P((struct tulip_pci_softc *, const u_int8_t *, 250 const struct tlp_pci_quirks *)); 251 void tlp_pci_check_slaved __P((struct tulip_pci_softc *, int, int)); 252 253 const struct tulip_pci_product * 254 tlp_pci_lookup(pa) 255 const struct pci_attach_args *pa; 256 { 257 const struct tulip_pci_product *tpp; 258 259 for (tpp = tlp_pci_products; 260 tlp_chip_names[tpp->tpp_chip] != NULL; 261 tpp++) { 262 if (PCI_VENDOR(pa->pa_id) == tpp->tpp_vendor && 263 PCI_PRODUCT(pa->pa_id) == tpp->tpp_product) 264 return (tpp); 265 } 266 return (NULL); 267 } 268 269 void 270 tlp_pci_get_quirks(psc, enaddr, tpq) 271 struct tulip_pci_softc *psc; 272 const u_int8_t *enaddr; 273 const struct tlp_pci_quirks *tpq; 274 { 275 276 for (; tpq->tpq_func != NULL; tpq++) { 277 if (tpq->tpq_oui[0] == enaddr[0] && 278 tpq->tpq_oui[1] == enaddr[1] && 279 tpq->tpq_oui[2] == enaddr[2]) { 280 (*tpq->tpq_func)(psc, enaddr); 281 return; 282 } 283 } 284 } 285 286 void 287 tlp_pci_check_slaved(psc, shared, slaved) 288 struct tulip_pci_softc *psc; 289 int shared, slaved; 290 { 291 extern struct cfdriver tlp_cd; 292 struct tulip_pci_softc *cur, *best = NULL; 293 struct tulip_softc *sc = &psc->sc_tulip; 294 int i; 295 296 /* 297 * First of all, find the lowest pcidev numbered device on our 298 * bus marked as shared. That should be our master. 299 */ 300 for (i = 0; i < tlp_cd.cd_ndevs; i++) { 301 if ((cur = tlp_cd.cd_devs[i]) == NULL) 302 continue; 303 if (cur->sc_tulip.sc_dev.dv_parent != sc->sc_dev.dv_parent) 304 continue; 305 if ((cur->sc_flags & shared) == 0) 306 continue; 307 if (cur == psc) 308 continue; 309 if (best == NULL || 310 best->sc_tulip.sc_devno > cur->sc_tulip.sc_devno) 311 best = cur; 312 } 313 314 if (best != NULL) { 315 psc->sc_master = best; 316 psc->sc_flags |= (shared | slaved); 317 } 318 } 319 320 int 321 tlp_pci_match(parent, match, aux) 322 struct device *parent; 323 struct cfdata *match; 324 void *aux; 325 { 326 struct pci_attach_args *pa = aux; 327 328 if (tlp_pci_lookup(pa) != NULL) 329 return (10); /* beat if_de.c */ 330 331 return (0); 332 } 333 334 void 335 tlp_pci_attach(parent, self, aux) 336 struct device *parent, *self; 337 void *aux; 338 { 339 struct tulip_pci_softc *psc = (void *) self; 340 struct tulip_softc *sc = &psc->sc_tulip; 341 struct pci_attach_args *pa = aux; 342 pci_chipset_tag_t pc = pa->pa_pc; 343 pci_intr_handle_t ih; 344 const char *intrstr = NULL; 345 bus_space_tag_t iot, memt; 346 bus_space_handle_t ioh, memh; 347 int ioh_valid, memh_valid, i, j; 348 const struct tulip_pci_product *tpp; 349 u_int8_t enaddr[ETHER_ADDR_LEN]; 350 u_int32_t val; 351 pcireg_t reg; 352 int pmreg; 353 354 sc->sc_devno = pa->pa_device; 355 psc->sc_pc = pa->pa_pc; 356 psc->sc_pcitag = pa->pa_tag; 357 358 LIST_INIT(&psc->sc_intrslaves); 359 360 tpp = tlp_pci_lookup(pa); 361 if (tpp == NULL) { 362 printf("\n"); 363 panic("tlp_pci_attach: impossible"); 364 } 365 sc->sc_chip = tpp->tpp_chip; 366 367 /* 368 * By default, Tulip registers are 8 bytes long (4 bytes 369 * followed by a 4 byte pad). 370 */ 371 sc->sc_regshift = 3; 372 373 /* 374 * No power management hooks. 375 * XXX Maybe we should add some! 376 */ 377 sc->sc_flags |= TULIPF_ENABLED; 378 379 /* 380 * Get revision info, and set some chip-specific variables. 381 */ 382 sc->sc_rev = PCI_REVISION(pa->pa_class); 383 switch (sc->sc_chip) { 384 case TULIP_CHIP_21140: 385 if (sc->sc_rev >= 0x20) 386 sc->sc_chip = TULIP_CHIP_21140A; 387 break; 388 389 case TULIP_CHIP_21142: 390 if (sc->sc_rev >= 0x20) 391 sc->sc_chip = TULIP_CHIP_21143; 392 break; 393 394 case TULIP_CHIP_82C168: 395 if (sc->sc_rev >= 0x20) 396 sc->sc_chip = TULIP_CHIP_82C169; 397 break; 398 399 case TULIP_CHIP_MX98713: 400 if (sc->sc_rev >= 0x10) 401 sc->sc_chip = TULIP_CHIP_MX98713A; 402 break; 403 404 case TULIP_CHIP_MX98715: 405 if (sc->sc_rev >= 0x20) 406 sc->sc_chip = TULIP_CHIP_MX98715A; 407 if (sc->sc_rev >= 0x25) 408 sc->sc_chip = TULIP_CHIP_MX98715AEC_X; 409 if (sc->sc_rev >= 0x30) 410 sc->sc_chip = TULIP_CHIP_MX98725; 411 break; 412 413 case TULIP_CHIP_WB89C840F: 414 sc->sc_regshift = 2; 415 break; 416 417 case TULIP_CHIP_AN985: 418 /* 419 * The AN983 and AN985 are very similar, and are 420 * differentiated by a "signature" register that 421 * is like, but not identical, to a PCI ID register. 422 */ 423 reg = pci_conf_read(pc, pa->pa_tag, 0x80); 424 switch (reg) { 425 case 0x09811317: 426 sc->sc_chip = TULIP_CHIP_AN985; 427 break; 428 429 case 0x09851317: 430 sc->sc_chip = TULIP_CHIP_AN983; 431 break; 432 433 default: 434 /* Unknown -- use default. */ 435 break; 436 } 437 break; 438 439 case TULIP_CHIP_AX88140: 440 if (sc->sc_rev >= 0x10) 441 sc->sc_chip = TULIP_CHIP_AX88141; 442 break; 443 444 case TULIP_CHIP_DM9102: 445 if (sc->sc_rev >= 0x30) 446 sc->sc_chip = TULIP_CHIP_DM9102A; 447 break; 448 449 default: 450 /* Nothing. */ 451 break; 452 } 453 454 printf(": %s Ethernet, pass %d.%d\n", 455 tlp_chip_names[sc->sc_chip], 456 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf); 457 458 switch (sc->sc_chip) { 459 case TULIP_CHIP_21040: 460 if (sc->sc_rev < 0x20) { 461 printf("%s: 21040 must be at least pass 2.0\n", 462 sc->sc_dev.dv_xname); 463 return; 464 } 465 break; 466 467 case TULIP_CHIP_21140: 468 if (sc->sc_rev < 0x11) { 469 printf("%s: 21140 must be at least pass 1.1\n", 470 sc->sc_dev.dv_xname); 471 return; 472 } 473 break; 474 475 default: 476 /* Nothing. */ 477 break; 478 } 479 480 /* 481 * Check to see if the device is in power-save mode, and 482 * being it out if necessary. 483 */ 484 switch (sc->sc_chip) { 485 case TULIP_CHIP_21140: 486 case TULIP_CHIP_21140A: 487 case TULIP_CHIP_21142: 488 case TULIP_CHIP_21143: 489 case TULIP_CHIP_MX98713A: 490 case TULIP_CHIP_MX98715: 491 case TULIP_CHIP_MX98715A: 492 case TULIP_CHIP_MX98715AEC_X: 493 case TULIP_CHIP_MX98725: 494 case TULIP_CHIP_DM9102: 495 case TULIP_CHIP_DM9102A: 496 /* 497 * Clear the "sleep mode" bit in the CFDA register. 498 */ 499 reg = pci_conf_read(pc, pa->pa_tag, TULIP_PCI_CFDA); 500 if (reg & (CFDA_SLEEP|CFDA_SNOOZE)) 501 pci_conf_write(pc, pa->pa_tag, TULIP_PCI_CFDA, 502 reg & ~(CFDA_SLEEP|CFDA_SNOOZE)); 503 break; 504 505 default: 506 /* Nothing. */ 507 break; 508 } 509 510 if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PWRMGMT, &pmreg, 0)) { 511 reg = pci_conf_read(pc, pa->pa_tag, pmreg + 4); 512 switch (reg & PCI_PMCSR_STATE_MASK) { 513 case PCI_PMCSR_STATE_D1: 514 case PCI_PMCSR_STATE_D2: 515 printf(": waking up from power state D%d\n%s", 516 reg & PCI_PMCSR_STATE_MASK, sc->sc_dev.dv_xname); 517 pci_conf_write(pc, pa->pa_tag, pmreg + 4, 518 (reg & ~PCI_PMCSR_STATE_MASK) | 519 PCI_PMCSR_STATE_D0); 520 break; 521 case PCI_PMCSR_STATE_D3: 522 /* 523 * The card has lost all configuration data in 524 * this state, so punt. 525 */ 526 printf(": unable to wake up from power state D3, " 527 "reboot required.\n"); 528 pci_conf_write(pc, pa->pa_tag, pmreg + 4, 529 (reg & ~PCI_PMCSR_STATE_MASK) | 530 PCI_PMCSR_STATE_D0); 531 return; 532 } 533 } 534 535 /* 536 * Map the device. 537 */ 538 ioh_valid = (pci_mapreg_map(pa, TULIP_PCI_IOBA, 539 PCI_MAPREG_TYPE_IO, 0, 540 &iot, &ioh, NULL, NULL) == 0); 541 memh_valid = (pci_mapreg_map(pa, TULIP_PCI_MMBA, 542 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 543 &memt, &memh, NULL, NULL) == 0); 544 545 if (memh_valid) { 546 sc->sc_st = memt; 547 sc->sc_sh = memh; 548 } else if (ioh_valid) { 549 sc->sc_st = iot; 550 sc->sc_sh = ioh; 551 } else { 552 printf(": unable to map device registers\n"); 553 return; 554 } 555 556 sc->sc_dmat = pa->pa_dmat; 557 558 /* 559 * Make sure bus mastering is enabled. 560 */ 561 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 562 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 563 PCI_COMMAND_MASTER_ENABLE); 564 565 /* 566 * Get the cacheline size. 567 */ 568 sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag, 569 PCI_BHLC_REG)); 570 571 /* 572 * Get PCI data moving command info. 573 */ 574 if (pa->pa_flags & PCI_FLAGS_MRL_OKAY) 575 sc->sc_flags |= TULIPF_MRL; 576 if (pa->pa_flags & PCI_FLAGS_MRM_OKAY) 577 sc->sc_flags |= TULIPF_MRM; 578 if (pa->pa_flags & PCI_FLAGS_MWI_OKAY) 579 sc->sc_flags |= TULIPF_MWI; 580 581 /* 582 * Read the contents of the Ethernet Address ROM/SROM. 583 */ 584 switch (sc->sc_chip) { 585 case TULIP_CHIP_21040: 586 sc->sc_srom_addrbits = 6; 587 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, M_NOWAIT); 588 TULIP_WRITE(sc, CSR_MIIROM, MIIROM_SROMCS); 589 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 590 for (j = 0; j < 10000; j++) { 591 val = TULIP_READ(sc, CSR_MIIROM); 592 if ((val & MIIROM_DN) == 0) 593 break; 594 } 595 sc->sc_srom[i] = val & MIIROM_DATA; 596 } 597 break; 598 599 case TULIP_CHIP_82C168: 600 case TULIP_CHIP_82C169: 601 { 602 sc->sc_srom_addrbits = 2; 603 sc->sc_srom = malloc(TULIP_ROM_SIZE(2), M_DEVBUF, M_NOWAIT); 604 605 /* 606 * The Lite-On PNIC stores the Ethernet address in 607 * the first 3 words of the EEPROM. EEPROM access 608 * is not like the other Tulip chips. 609 */ 610 for (i = 0; i < 6; i += 2) { 611 TULIP_WRITE(sc, CSR_PNIC_SROMCTL, 612 PNIC_SROMCTL_READ | (i >> 1)); 613 for (j = 0; j < 500; j++) { 614 delay(2); 615 val = TULIP_READ(sc, CSR_MIIROM); 616 if ((val & PNIC_MIIROM_BUSY) == 0) 617 break; 618 } 619 if (val & PNIC_MIIROM_BUSY) { 620 printf("%s: EEPROM timed out\n", 621 sc->sc_dev.dv_xname); 622 return; 623 } 624 val &= PNIC_MIIROM_DATA; 625 sc->sc_srom[i] = val >> 8; 626 sc->sc_srom[i + 1] = val & 0xff; 627 } 628 break; 629 } 630 631 default: 632 #ifdef algor 633 /* 634 * XXX This should be done with device properties, but 635 * XXX we don't have those yet. 636 */ 637 if (algor_get_ethaddr(pa, NULL)) { 638 extern int tlp_srom_debug; 639 sc->sc_srom_addrbits = 6; 640 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, 641 M_NOWAIT|M_ZERO); 642 algor_get_ethaddr(pa, sc->sc_srom); 643 if (tlp_srom_debug) { 644 printf("SROM CONTENTS:"); 645 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 646 if ((i % 8) == 0) 647 printf("\n\t"); 648 printf("0x%02x ", sc->sc_srom[i]); 649 } 650 printf("\n"); 651 } 652 break; 653 } 654 #endif /* algor */ 655 656 /* Check for a slaved ROM on a multi-port board. */ 657 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDROM, 658 TULIP_PCI_SLAVEROM); 659 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 660 sc->sc_srom_addrbits = 661 psc->sc_master->sc_tulip.sc_srom_addrbits; 662 sc->sc_srom = psc->sc_master->sc_tulip.sc_srom; 663 enaddr[5] += 664 sc->sc_devno - psc->sc_master->sc_tulip.sc_devno; 665 } 666 else if (tlp_read_srom(sc) == 0) 667 goto cant_cope; 668 break; 669 } 670 671 /* 672 * Deal with chip/board quirks. This includes setting up 673 * the mediasw, and extracting the Ethernet address from 674 * the rombuf. 675 */ 676 switch (sc->sc_chip) { 677 case TULIP_CHIP_21040: 678 /* 679 * Parse the Ethernet Address ROM. 680 */ 681 if (tlp_parse_old_srom(sc, enaddr) == 0) 682 goto cant_cope; 683 684 685 /* 686 * All 21040 boards start out with the same 687 * media switch. 688 */ 689 sc->sc_mediasw = &tlp_21040_mediasw; 690 691 /* 692 * Deal with any quirks this board might have. 693 */ 694 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21040_quirks); 695 break; 696 697 case TULIP_CHIP_21041: 698 /* Check for new format SROM. */ 699 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 700 /* 701 * Not an ISV SROM; try the old DEC Ethernet Address 702 * ROM format. 703 */ 704 if (tlp_parse_old_srom(sc, enaddr) == 0) 705 goto cant_cope; 706 } 707 708 /* 709 * All 21041 boards use the same media switch; they all 710 * work basically the same! Yippee! 711 */ 712 sc->sc_mediasw = &tlp_21041_mediasw; 713 714 /* 715 * Deal with any quirks this board might have. 716 */ 717 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21041_quirks); 718 break; 719 720 case TULIP_CHIP_21140: 721 case TULIP_CHIP_21140A: 722 /* Check for new format SROM. */ 723 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 724 /* 725 * Not an ISV SROM; try the old DEC Ethernet Address 726 * ROM format. 727 */ 728 if (tlp_parse_old_srom(sc, enaddr) == 0) 729 goto cant_cope; 730 } else { 731 /* 732 * We start out with the 2114x ISV media switch. 733 * When we search for quirks, we may change to 734 * a different switch. 735 */ 736 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 737 } 738 739 /* 740 * Deal with any quirks this board might have. 741 */ 742 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21140_quirks); 743 744 /* 745 * Bail out now if we can't deal with this board. 746 */ 747 if (sc->sc_mediasw == NULL) 748 goto cant_cope; 749 break; 750 751 case TULIP_CHIP_21142: 752 case TULIP_CHIP_21143: 753 /* Check for new format SROM. */ 754 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 755 /* 756 * Not an ISV SROM; try the old DEC Ethernet Address 757 * ROM format. 758 */ 759 if (tlp_parse_old_srom(sc, enaddr) == 0) 760 goto cant_cope; 761 } else { 762 /* 763 * We start out with the 2114x ISV media switch. 764 * When we search for quirks, we may change to 765 * a different switch. 766 */ 767 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 768 } 769 770 /* 771 * Deal with any quirks this board might have. 772 */ 773 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21142_quirks); 774 775 /* 776 * Bail out now if we can't deal with this board. 777 */ 778 if (sc->sc_mediasw == NULL) 779 goto cant_cope; 780 break; 781 782 case TULIP_CHIP_82C168: 783 case TULIP_CHIP_82C169: 784 /* 785 * Lite-On PNIC's Ethernet address is the first 6 786 * bytes of its EEPROM. 787 */ 788 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 789 790 /* 791 * Lite-On PNICs always use the same mediasw; we 792 * select MII vs. internal NWAY automatically. 793 */ 794 sc->sc_mediasw = &tlp_pnic_mediasw; 795 break; 796 797 case TULIP_CHIP_MX98713: 798 /* 799 * The Macronix MX98713 has an MII and GPIO, but no 800 * internal Nway block. This chip is basically a 801 * perfect 21140A clone, with the exception of the 802 * a magic register frobbing in order to make the 803 * interface function. 804 */ 805 if (tlp_isv_srom_enaddr(sc, enaddr)) { 806 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 807 break; 808 } 809 /* FALLTHROUGH */ 810 811 case TULIP_CHIP_82C115: 812 /* 813 * Yippee! The Lite-On 82C115 is a clone of 814 * the MX98725 (the data sheet even says `MXIC' 815 * on it)! Imagine that, a clone of a clone. 816 * 817 * The differences are really minimal: 818 * 819 * - Wake-On-LAN support 820 * - 128-bit multicast hash table, rather than 821 * the standard 512-bit hash table 822 */ 823 /* FALLTHROUGH */ 824 825 case TULIP_CHIP_MX98713A: 826 case TULIP_CHIP_MX98715A: 827 case TULIP_CHIP_MX98715AEC_X: 828 case TULIP_CHIP_MX98725: 829 /* 830 * The MX98713A has an MII as well as an internal Nway block, 831 * but no GPIO. The MX98715 and MX98725 have an internal 832 * Nway block only. 833 * 834 * The internal Nway block, unlike the Lite-On PNIC's, does 835 * just that - performs Nway. Once autonegotiation completes, 836 * we must program the GPR media information into the chip. 837 * 838 * The byte offset of the Ethernet address is stored at 839 * offset 0x70. 840 */ 841 memcpy(enaddr, &sc->sc_srom[sc->sc_srom[0x70]], ETHER_ADDR_LEN); 842 sc->sc_mediasw = &tlp_pmac_mediasw; 843 break; 844 845 case TULIP_CHIP_WB89C840F: 846 /* 847 * Winbond 89C840F's Ethernet address is the first 848 * 6 bytes of its EEPROM. 849 */ 850 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 851 852 /* 853 * Winbond 89C840F has an MII attached to the SIO. 854 */ 855 sc->sc_mediasw = &tlp_sio_mii_mediasw; 856 break; 857 858 case TULIP_CHIP_AL981: 859 /* 860 * The ADMtek AL981's Ethernet address is located 861 * at offset 8 of its EEPROM. 862 */ 863 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 864 865 /* 866 * ADMtek AL981 has a built-in PHY accessed through 867 * special registers. 868 */ 869 sc->sc_mediasw = &tlp_al981_mediasw; 870 break; 871 872 case TULIP_CHIP_AN983: 873 case TULIP_CHIP_AN985: 874 /* 875 * The ADMtek AN985's Ethernet address is located 876 * at offset 8 of its EEPROM. 877 */ 878 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 879 880 /* 881 * The ADMtek AN985 can be configured in Single-Chip 882 * mode or MAC-only mode. Single-Chip uses the built-in 883 * PHY, MAC-only has an external PHY (usually HomePNA). 884 * The selection is based on an EEPROM setting, and both 885 * PHYs are accessed via MII attached to SIO. 886 * 887 * The AN985 "ghosts" the internal PHY onto all 888 * MII addresses, so we have to use a media init 889 * routine that limits the search. 890 * XXX How does this work with MAC-only mode? 891 */ 892 sc->sc_mediasw = &tlp_an985_mediasw; 893 break; 894 895 case TULIP_CHIP_DM9102: 896 case TULIP_CHIP_DM9102A: 897 /* 898 * Some boards with the Davicom chip have an ISV 899 * SROM (mostly DM9102A boards -- trying to describe 900 * the HomePNA PHY, probably) although the data in 901 * them is generally wrong. Check for ISV format 902 * and grab the Ethernet address that way, and if 903 * that fails, fall back on grabbing it from an 904 * observed offset of 20 (which is where it would 905 * be in an ISV SROM anyhow, tho ISV can cope with 906 * multi-port boards). 907 */ 908 if (!tlp_isv_srom_enaddr(sc, enaddr)) { 909 #ifdef __sparc__ 910 if (!sc->sc_srom[20] && !sc->sc_srom[21] && 911 !sc->sc_srom[22]) { 912 extern void myetheraddr __P((u_char *)); 913 myetheraddr(enaddr); 914 } else 915 #endif 916 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN); 917 } 918 919 /* 920 * Davicom chips all have an internal MII interface 921 * and a built-in PHY. DM9102A also has a an external 922 * MII interface, usually with a HomePNA PHY attached 923 * to it. 924 */ 925 sc->sc_mediasw = &tlp_dm9102_mediasw; 926 break; 927 928 default: 929 cant_cope: 930 printf("%s: sorry, unable to handle your board\n", 931 sc->sc_dev.dv_xname); 932 return; 933 } 934 935 /* 936 * Handle shared interrupts. 937 */ 938 if (psc->sc_flags & TULIP_PCI_SHAREDINTR) { 939 if (psc->sc_master) 940 psc->sc_flags |= TULIP_PCI_SLAVEINTR; 941 else { 942 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDINTR, 943 TULIP_PCI_SLAVEINTR); 944 if (psc->sc_master == NULL) 945 psc->sc_master = psc; 946 } 947 LIST_INSERT_HEAD(&psc->sc_master->sc_intrslaves, 948 psc, sc_intrq); 949 } 950 951 if (psc->sc_flags & TULIP_PCI_SLAVEINTR) { 952 printf("%s: sharing interrupt with %s\n", 953 sc->sc_dev.dv_xname, 954 psc->sc_master->sc_tulip.sc_dev.dv_xname); 955 } else { 956 /* 957 * Map and establish our interrupt. 958 */ 959 if (pci_intr_map(pa, &ih)) { 960 printf("%s: unable to map interrupt\n", 961 sc->sc_dev.dv_xname); 962 return; 963 } 964 intrstr = pci_intr_string(pc, ih); 965 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, 966 (psc->sc_flags & TULIP_PCI_SHAREDINTR) ? 967 tlp_pci_shared_intr : tlp_intr, sc); 968 if (psc->sc_ih == NULL) { 969 printf("%s: unable to establish interrupt", 970 sc->sc_dev.dv_xname); 971 if (intrstr != NULL) 972 printf(" at %s", intrstr); 973 printf("\n"); 974 return; 975 } 976 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, 977 intrstr); 978 } 979 980 /* 981 * Finish off the attach. 982 */ 983 tlp_attach(sc, enaddr); 984 } 985 986 int 987 tlp_pci_shared_intr(arg) 988 void *arg; 989 { 990 struct tulip_pci_softc *master = arg, *slave; 991 int rv = 0; 992 993 for (slave = LIST_FIRST(&master->sc_intrslaves); 994 slave != NULL; 995 slave = LIST_NEXT(slave, sc_intrq)) 996 rv |= tlp_intr(&slave->sc_tulip); 997 998 return (rv); 999 } 1000 1001 void 1002 tlp_pci_dec_quirks(psc, enaddr) 1003 struct tulip_pci_softc *psc; 1004 const u_int8_t *enaddr; 1005 { 1006 struct tulip_softc *sc = &psc->sc_tulip; 1007 1008 /* 1009 * This isn't really a quirk-gathering device, really. We 1010 * just want to get the spiffy DEC board name from the SROM. 1011 */ 1012 strcpy(sc->sc_name, "DEC "); 1013 1014 if (memcmp(&sc->sc_srom[29], "DE500", 5) == 0 || 1015 memcmp(&sc->sc_srom[29], "DE450", 5) == 0) 1016 memcpy(&sc->sc_name[4], &sc->sc_srom[29], 8); 1017 } 1018 1019 void 1020 tlp_pci_znyx_21040_quirks(psc, enaddr) 1021 struct tulip_pci_softc *psc; 1022 const u_int8_t *enaddr; 1023 { 1024 struct tulip_softc *sc = &psc->sc_tulip; 1025 u_int16_t id = 0; 1026 1027 /* 1028 * If we have a slaved ROM, just copy the bits from the master. 1029 * This is in case we fail the ROM ID check (older boards) and 1030 * need to fall back on Ethernet address model checking; that 1031 * will fail for slave chips. 1032 */ 1033 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 1034 strcpy(sc->sc_name, psc->sc_master->sc_tulip.sc_name); 1035 sc->sc_mediasw = psc->sc_master->sc_tulip.sc_mediasw; 1036 psc->sc_flags |= 1037 psc->sc_master->sc_flags & TULIP_PCI_SHAREDINTR; 1038 return; 1039 } 1040 1041 if (sc->sc_srom[32] == 0x4a && sc->sc_srom[33] == 0x52) { 1042 id = sc->sc_srom[37] | (sc->sc_srom[36] << 8); 1043 switch (id) { 1044 zx312: 1045 case 0x0602: /* ZX312 */ 1046 strcpy(sc->sc_name, "ZNYX ZX312"); 1047 return; 1048 1049 case 0x0622: /* ZX312T */ 1050 strcpy(sc->sc_name, "ZNYX ZX312T"); 1051 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1052 return; 1053 1054 zx314_inta: 1055 case 0x0701: /* ZX314 INTA */ 1056 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1057 /* FALLTHROUGH */ 1058 case 0x0711: /* ZX314 */ 1059 strcpy(sc->sc_name, "ZNYX ZX314"); 1060 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1061 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1062 return; 1063 1064 zx315_inta: 1065 case 0x0801: /* ZX315 INTA */ 1066 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1067 /* FALLTHROUGH */ 1068 case 0x0811: /* ZX315 */ 1069 strcpy(sc->sc_name, "ZNYX ZX315"); 1070 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1071 return; 1072 1073 default: 1074 id = 0; 1075 break; 1076 } 1077 } 1078 1079 /* 1080 * Deal with boards that have broken ROMs. 1081 */ 1082 if (id == 0) { 1083 if ((enaddr[3] & ~3) == 0xf0 && (enaddr[5] & 3) == 0x00) 1084 goto zx314_inta; 1085 if ((enaddr[3] & ~3) == 0xf4 && (enaddr[5] & 1) == 0x00) 1086 goto zx315_inta; 1087 if ((enaddr[3] & ~3) == 0xec) 1088 goto zx312; 1089 } 1090 1091 strcpy(sc->sc_name, "ZNYX ZX31x"); 1092 } 1093 1094 void 1095 tlp_pci_smc_21040_quirks(psc, enaddr) 1096 struct tulip_pci_softc *psc; 1097 const u_int8_t *enaddr; 1098 { 1099 struct tulip_softc *sc = &psc->sc_tulip; 1100 u_int16_t id1, id2, ei; 1101 int auibnc = 0, utp = 0; 1102 char *cp; 1103 1104 id1 = sc->sc_srom[0x60] | (sc->sc_srom[0x61] << 8); 1105 id2 = sc->sc_srom[0x62] | (sc->sc_srom[0x63] << 8); 1106 ei = sc->sc_srom[0x66] | (sc->sc_srom[0x67] << 8); 1107 1108 strcpy(sc->sc_name, "SMC 8432"); 1109 cp = &sc->sc_name[8]; 1110 1111 if ((id1 & 1) == 0) { 1112 *cp++ = 'B'; 1113 auibnc = 1; 1114 } 1115 if ((id1 & 0xff) > 0x32) { 1116 *cp++ = 'T'; 1117 utp = 1; 1118 } 1119 if ((id1 & 0x4000) == 0) { 1120 *cp++ = 'A'; 1121 auibnc = 1; 1122 } 1123 if (id2 == 0x15) { 1124 sc->sc_name[7] = '4'; 1125 *cp++ = '-'; 1126 *cp++ = 'C'; 1127 *cp++ = 'H'; 1128 *cp++ = ei ? '2' : '1'; 1129 } 1130 *cp = '\0'; 1131 1132 if (utp != 0 && auibnc == 0) 1133 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1134 else if (utp == 0 && auibnc != 0) 1135 sc->sc_mediasw = &tlp_21040_auibnc_mediasw; 1136 } 1137 1138 void 1139 tlp_pci_cogent_21040_quirks(psc, enaddr) 1140 struct tulip_pci_softc *psc; 1141 const u_int8_t *enaddr; 1142 { 1143 1144 strcpy(psc->sc_tulip.sc_name, "Cogent multi-port"); 1145 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1146 } 1147 1148 void 1149 tlp_pci_accton_21040_quirks(psc, enaddr) 1150 struct tulip_pci_softc *psc; 1151 const u_int8_t *enaddr; 1152 { 1153 1154 strcpy(psc->sc_tulip.sc_name, "ACCTON EN1203"); 1155 } 1156 1157 void tlp_pci_asante_21140_reset __P((struct tulip_softc *)); 1158 1159 void 1160 tlp_pci_asante_21140_quirks(psc, enaddr) 1161 struct tulip_pci_softc *psc; 1162 const u_int8_t *enaddr; 1163 { 1164 struct tulip_softc *sc = &psc->sc_tulip; 1165 1166 /* 1167 * Some Asante boards don't use the ISV SROM format. For 1168 * those that don't, we initialize the GPIO direction bits, 1169 * and provide our own reset hook, which resets the MII. 1170 * 1171 * All of these boards use SIO-attached-MII media. 1172 */ 1173 if (sc->sc_mediasw == &tlp_2114x_isv_mediasw) 1174 return; 1175 1176 strcpy(sc->sc_name, "Asante"); 1177 1178 sc->sc_gp_dir = 0xbf; 1179 sc->sc_reset = tlp_pci_asante_21140_reset; 1180 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1181 } 1182 1183 void 1184 tlp_pci_asante_21140_reset(sc) 1185 struct tulip_softc *sc; 1186 { 1187 1188 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1189 TULIP_WRITE(sc, CSR_GPP, 0x8); 1190 delay(100); 1191 TULIP_WRITE(sc, CSR_GPP, 0); 1192 } 1193 1194 void tlp_pci_cobalt_21142_reset __P((struct tulip_softc *)); 1195 1196 void 1197 tlp_pci_cobalt_21142_quirks(psc, enaddr) 1198 struct tulip_pci_softc *psc; 1199 const u_int8_t *enaddr; 1200 { 1201 struct tulip_softc *sc = &psc->sc_tulip; 1202 1203 /* 1204 * Cobalt Networks interfaces are just MII-on-SIO. 1205 */ 1206 sc->sc_reset = tlp_pci_cobalt_21142_reset; 1207 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1208 1209 /* 1210 * The Cobalt systems tend to fall back to store-and-forward 1211 * pretty quickly, so we select that from the beginning to 1212 * avoid initial timeouts. 1213 */ 1214 sc->sc_txthresh = TXTH_SF; 1215 } 1216 1217 void 1218 tlp_pci_cobalt_21142_reset(sc) 1219 struct tulip_softc *sc; 1220 { 1221 /* 1222 * Reset PHY. 1223 */ 1224 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE | (1 << 16)); 1225 delay(10); 1226 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE); 1227 delay(10); 1228 } 1229 1230 void 1231 tlp_pci_algor_21142_quirks(psc, enaddr) 1232 struct tulip_pci_softc *psc; 1233 const u_int8_t *enaddr; 1234 { 1235 struct tulip_softc *sc = &psc->sc_tulip; 1236 1237 /* 1238 * Algorithmics boards just have MII-on-SIO. 1239 * 1240 * XXX They also have AUI on the serial interface. 1241 * XXX Deal with this. 1242 */ 1243 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1244 } 1245 1246 void 1247 tlp_pci_adaptec_21143_quirks(psc, enaddr) 1248 struct tulip_pci_softc *psc; 1249 const u_int8_t *enaddr; 1250 { 1251 1252 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-69xx"); 1253 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1254 } 1255
Indexes created Sat Sep 20 22:09:52 GMT 2025