if_tlp_pci.c revision 1.62
1 /* $NetBSD: if_tlp_pci.c,v 1.62 2002/03/26 07:57:17 chs Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * PCI bus front-end for the Digital Semiconductor ``Tulip'' (21x4x) 42 * Ethernet controller family driver. 43 */ 44 45 #include <sys/cdefs.h> 46 __KERNEL_RCSID(0, "$NetBSD: if_tlp_pci.c,v 1.62 2002/03/26 07:57:17 chs Exp $"); 47 48 #include "opt_tlp.h" 49 50 #include <sys/param.h> 51 #include <sys/systm.h> 52 #include <sys/mbuf.h> 53 #include <sys/malloc.h> 54 #include <sys/kernel.h> 55 #include <sys/socket.h> 56 #include <sys/ioctl.h> 57 #include <sys/errno.h> 58 #include <sys/device.h> 59 60 #include <machine/endian.h> 61 62 #include <net/if.h> 63 #include <net/if_dl.h> 64 #include <net/if_media.h> 65 #include <net/if_ether.h> 66 67 #include <machine/bus.h> 68 #include <machine/intr.h> 69 70 #include <dev/mii/miivar.h> 71 #include <dev/mii/mii_bitbang.h> 72 73 #include <dev/ic/tulipreg.h> 74 #include <dev/ic/tulipvar.h> 75 76 #include <dev/pci/pcivar.h> 77 #include <dev/pci/pcireg.h> 78 #include <dev/pci/pcidevs.h> 79 80 /* 81 * PCI configuration space registers used by the Tulip. 82 */ 83 #define TULIP_PCI_IOBA 0x10 /* i/o mapped base */ 84 #define TULIP_PCI_MMBA 0x14 /* memory mapped base */ 85 #define TULIP_PCI_CFDA 0x40 /* configuration driver area */ 86 87 #define CFDA_SLEEP 0x80000000 /* sleep mode */ 88 #define CFDA_SNOOZE 0x40000000 /* snooze mode */ 89 90 struct tulip_pci_softc { 91 struct tulip_softc sc_tulip; /* real Tulip softc */ 92 93 /* PCI-specific goo. */ 94 void *sc_ih; /* interrupt handle */ 95 96 pci_chipset_tag_t sc_pc; /* our PCI chipset */ 97 pcitag_t sc_pcitag; /* our PCI tag */ 98 99 int sc_flags; /* flags; see below */ 100 101 LIST_HEAD(, tulip_pci_softc) sc_intrslaves; 102 LIST_ENTRY(tulip_pci_softc) sc_intrq; 103 104 /* Our {ROM,interrupt} master. */ 105 struct tulip_pci_softc *sc_master; 106 }; 107 108 /* sc_flags */ 109 #define TULIP_PCI_SHAREDINTR 0x01 /* interrupt is shared */ 110 #define TULIP_PCI_SLAVEINTR 0x02 /* interrupt is slave */ 111 #define TULIP_PCI_SHAREDROM 0x04 /* ROM is shared */ 112 #define TULIP_PCI_SLAVEROM 0x08 /* slave of shared ROM */ 113 114 int tlp_pci_match __P((struct device *, struct cfdata *, void *)); 115 void tlp_pci_attach __P((struct device *, struct device *, void *)); 116 117 struct cfattach tlp_pci_ca = { 118 sizeof(struct tulip_pci_softc), tlp_pci_match, tlp_pci_attach, 119 }; 120 121 const struct tulip_pci_product { 122 u_int32_t tpp_vendor; /* PCI vendor ID */ 123 u_int32_t tpp_product; /* PCI product ID */ 124 tulip_chip_t tpp_chip; /* base Tulip chip type */ 125 } tlp_pci_products[] = { 126 #ifdef TLP_MATCH_21040 127 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21040, 128 TULIP_CHIP_21040 }, 129 #endif 130 #ifdef TLP_MATCH_21041 131 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21041, 132 TULIP_CHIP_21041 }, 133 #endif 134 #ifdef TLP_MATCH_21140 135 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21140, 136 TULIP_CHIP_21140 }, 137 #endif 138 #ifdef TLP_MATCH_21142 139 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142, 140 TULIP_CHIP_21142 }, 141 #endif 142 143 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C168, 144 TULIP_CHIP_82C168 }, 145 146 /* 147 * Note: This is like a MX98725 with Wake-On-LAN and a 148 * 128-bit multicast hash table. 149 */ 150 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C115, 151 TULIP_CHIP_82C115 }, 152 153 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98713, 154 TULIP_CHIP_MX98713 }, 155 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX987x5, 156 TULIP_CHIP_MX98715 }, 157 158 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100TX, 159 TULIP_CHIP_MX98713 }, 160 161 { PCI_VENDOR_WINBOND, PCI_PRODUCT_WINBOND_W89C840F, 162 TULIP_CHIP_WB89C840F }, 163 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100ATX, 164 TULIP_CHIP_WB89C840F }, 165 166 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9102, 167 TULIP_CHIP_DM9102 }, 168 169 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AL981, 170 TULIP_CHIP_AL981 }, 171 172 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN985, 173 TULIP_CHIP_AN985 }, 174 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN2242, 175 TULIP_CHIP_AN985 }, 176 177 #if 0 178 { PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX88140A, 179 TULIP_CHIP_AX88140 }, 180 #endif 181 182 { 0, 0, 183 TULIP_CHIP_INVALID }, 184 }; 185 186 struct tlp_pci_quirks { 187 void (*tpq_func) __P((struct tulip_pci_softc *, 188 const u_int8_t *)); 189 u_int8_t tpq_oui[3]; 190 }; 191 192 void tlp_pci_dec_quirks __P((struct tulip_pci_softc *, 193 const u_int8_t *)); 194 195 void tlp_pci_znyx_21040_quirks __P((struct tulip_pci_softc *, 196 const u_int8_t *)); 197 void tlp_pci_smc_21040_quirks __P((struct tulip_pci_softc *, 198 const u_int8_t *)); 199 void tlp_pci_cogent_21040_quirks __P((struct tulip_pci_softc *, 200 const u_int8_t *)); 201 void tlp_pci_accton_21040_quirks __P((struct tulip_pci_softc *, 202 const u_int8_t *)); 203 204 void tlp_pci_cobalt_21142_quirks __P((struct tulip_pci_softc *, 205 const u_int8_t *)); 206 void tlp_pci_algor_21142_quirks __P((struct tulip_pci_softc *, 207 const u_int8_t *)); 208 209 void tlp_pci_adaptec_quirks __P((struct tulip_pci_softc *, 210 const u_int8_t *)); 211 212 const struct tlp_pci_quirks tlp_pci_21040_quirks[] = { 213 { tlp_pci_znyx_21040_quirks, { 0x00, 0xc0, 0x95 } }, 214 { tlp_pci_smc_21040_quirks, { 0x00, 0x00, 0xc0 } }, 215 { tlp_pci_cogent_21040_quirks, { 0x00, 0x00, 0x92 } }, 216 { tlp_pci_accton_21040_quirks, { 0x00, 0x00, 0xe8 } }, 217 { NULL, { 0, 0, 0 } } 218 }; 219 220 const struct tlp_pci_quirks tlp_pci_21041_quirks[] = { 221 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 222 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 223 { NULL, { 0, 0, 0 } } 224 }; 225 226 void tlp_pci_asante_21140_quirks __P((struct tulip_pci_softc *, 227 const u_int8_t *)); 228 void tlp_pci_smc_21140_quirks __P((struct tulip_pci_softc *, 229 const u_int8_t *)); 230 231 const struct tlp_pci_quirks tlp_pci_21140_quirks[] = { 232 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 233 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 234 { tlp_pci_asante_21140_quirks, { 0x00, 0x00, 0x94 } }, 235 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0x92 } }, 236 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } }, 237 { tlp_pci_smc_21140_quirks, { 0x00, 0x00, 0xc0 } }, 238 { NULL, { 0, 0, 0 } } 239 }; 240 241 const struct tlp_pci_quirks tlp_pci_21142_quirks[] = { 242 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 243 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 244 { tlp_pci_cobalt_21142_quirks, { 0x00, 0x10, 0xe0 } }, 245 { tlp_pci_algor_21142_quirks, { 0x00, 0x40, 0xbc } }, 246 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } }, 247 { NULL, { 0, 0, 0 } } 248 }; 249 250 int tlp_pci_shared_intr __P((void *)); 251 252 const struct tulip_pci_product *tlp_pci_lookup 253 __P((const struct pci_attach_args *)); 254 void tlp_pci_get_quirks __P((struct tulip_pci_softc *, const u_int8_t *, 255 const struct tlp_pci_quirks *)); 256 void tlp_pci_check_slaved __P((struct tulip_pci_softc *, int, int)); 257 258 const struct tulip_pci_product * 259 tlp_pci_lookup(pa) 260 const struct pci_attach_args *pa; 261 { 262 const struct tulip_pci_product *tpp; 263 264 for (tpp = tlp_pci_products; 265 tlp_chip_names[tpp->tpp_chip] != NULL; 266 tpp++) { 267 if (PCI_VENDOR(pa->pa_id) == tpp->tpp_vendor && 268 PCI_PRODUCT(pa->pa_id) == tpp->tpp_product) 269 return (tpp); 270 } 271 return (NULL); 272 } 273 274 void 275 tlp_pci_get_quirks(psc, enaddr, tpq) 276 struct tulip_pci_softc *psc; 277 const u_int8_t *enaddr; 278 const struct tlp_pci_quirks *tpq; 279 { 280 281 for (; tpq->tpq_func != NULL; tpq++) { 282 if (tpq->tpq_oui[0] == enaddr[0] && 283 tpq->tpq_oui[1] == enaddr[1] && 284 tpq->tpq_oui[2] == enaddr[2]) { 285 (*tpq->tpq_func)(psc, enaddr); 286 return; 287 } 288 } 289 } 290 291 void 292 tlp_pci_check_slaved(psc, shared, slaved) 293 struct tulip_pci_softc *psc; 294 int shared, slaved; 295 { 296 extern struct cfdriver tlp_cd; 297 struct tulip_pci_softc *cur, *best = NULL; 298 struct tulip_softc *sc = &psc->sc_tulip; 299 int i; 300 301 /* 302 * First of all, find the lowest pcidev numbered device on our 303 * bus marked as shared. That should be our master. 304 */ 305 for (i = 0; i < tlp_cd.cd_ndevs; i++) { 306 if ((cur = tlp_cd.cd_devs[i]) == NULL) 307 continue; 308 if (cur->sc_tulip.sc_dev.dv_parent != sc->sc_dev.dv_parent) 309 continue; 310 if ((cur->sc_flags & shared) == 0) 311 continue; 312 if (cur == psc) 313 continue; 314 if (best == NULL || 315 best->sc_tulip.sc_devno > cur->sc_tulip.sc_devno) 316 best = cur; 317 } 318 319 if (best != NULL) { 320 psc->sc_master = best; 321 psc->sc_flags |= (shared | slaved); 322 } 323 } 324 325 int 326 tlp_pci_match(parent, match, aux) 327 struct device *parent; 328 struct cfdata *match; 329 void *aux; 330 { 331 struct pci_attach_args *pa = aux; 332 333 if (tlp_pci_lookup(pa) != NULL) 334 return (10); /* beat if_de.c */ 335 336 return (0); 337 } 338 339 void 340 tlp_pci_attach(parent, self, aux) 341 struct device *parent, *self; 342 void *aux; 343 { 344 struct tulip_pci_softc *psc = (void *) self; 345 struct tulip_softc *sc = &psc->sc_tulip; 346 struct pci_attach_args *pa = aux; 347 pci_chipset_tag_t pc = pa->pa_pc; 348 pci_intr_handle_t ih; 349 const char *intrstr = NULL; 350 bus_space_tag_t iot, memt; 351 bus_space_handle_t ioh, memh; 352 int ioh_valid, memh_valid, i, j; 353 const struct tulip_pci_product *tpp; 354 u_int8_t enaddr[ETHER_ADDR_LEN]; 355 u_int32_t val; 356 pcireg_t reg; 357 int pmreg; 358 359 sc->sc_devno = pa->pa_device; 360 psc->sc_pc = pa->pa_pc; 361 psc->sc_pcitag = pa->pa_tag; 362 363 LIST_INIT(&psc->sc_intrslaves); 364 365 tpp = tlp_pci_lookup(pa); 366 if (tpp == NULL) { 367 printf("\n"); 368 panic("tlp_pci_attach: impossible"); 369 } 370 sc->sc_chip = tpp->tpp_chip; 371 372 /* 373 * By default, Tulip registers are 8 bytes long (4 bytes 374 * followed by a 4 byte pad). 375 */ 376 sc->sc_regshift = 3; 377 378 /* 379 * No power management hooks. 380 * XXX Maybe we should add some! 381 */ 382 sc->sc_flags |= TULIPF_ENABLED; 383 384 /* 385 * Get revision info, and set some chip-specific variables. 386 */ 387 sc->sc_rev = PCI_REVISION(pa->pa_class); 388 switch (sc->sc_chip) { 389 case TULIP_CHIP_21140: 390 if (sc->sc_rev >= 0x20) 391 sc->sc_chip = TULIP_CHIP_21140A; 392 break; 393 394 case TULIP_CHIP_21142: 395 if (sc->sc_rev >= 0x20) 396 sc->sc_chip = TULIP_CHIP_21143; 397 break; 398 399 case TULIP_CHIP_82C168: 400 if (sc->sc_rev >= 0x20) 401 sc->sc_chip = TULIP_CHIP_82C169; 402 break; 403 404 case TULIP_CHIP_MX98713: 405 if (sc->sc_rev >= 0x10) 406 sc->sc_chip = TULIP_CHIP_MX98713A; 407 break; 408 409 case TULIP_CHIP_MX98715: 410 if (sc->sc_rev >= 0x20) 411 sc->sc_chip = TULIP_CHIP_MX98715A; 412 if (sc->sc_rev >= 0x25) 413 sc->sc_chip = TULIP_CHIP_MX98715AEC_X; 414 if (sc->sc_rev >= 0x30) 415 sc->sc_chip = TULIP_CHIP_MX98725; 416 break; 417 418 case TULIP_CHIP_WB89C840F: 419 sc->sc_regshift = 2; 420 break; 421 422 case TULIP_CHIP_AN985: 423 /* 424 * The AN983 and AN985 are very similar, and are 425 * differentiated by a "signature" register that 426 * is like, but not identical, to a PCI ID register. 427 */ 428 reg = pci_conf_read(pc, pa->pa_tag, 0x80); 429 switch (reg) { 430 case 0x09811317: 431 sc->sc_chip = TULIP_CHIP_AN985; 432 break; 433 434 case 0x09851317: 435 sc->sc_chip = TULIP_CHIP_AN983; 436 break; 437 438 default: 439 /* Unknown -- use default. */ 440 break; 441 } 442 break; 443 444 case TULIP_CHIP_AX88140: 445 if (sc->sc_rev >= 0x10) 446 sc->sc_chip = TULIP_CHIP_AX88141; 447 break; 448 449 case TULIP_CHIP_DM9102: 450 if (sc->sc_rev >= 0x30) 451 sc->sc_chip = TULIP_CHIP_DM9102A; 452 break; 453 454 default: 455 /* Nothing. */ 456 break; 457 } 458 459 printf(": %s Ethernet, pass %d.%d\n", 460 tlp_chip_names[sc->sc_chip], 461 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf); 462 463 switch (sc->sc_chip) { 464 case TULIP_CHIP_21040: 465 if (sc->sc_rev < 0x20) { 466 printf("%s: 21040 must be at least pass 2.0\n", 467 sc->sc_dev.dv_xname); 468 return; 469 } 470 break; 471 472 case TULIP_CHIP_21140: 473 if (sc->sc_rev < 0x11) { 474 printf("%s: 21140 must be at least pass 1.1\n", 475 sc->sc_dev.dv_xname); 476 return; 477 } 478 break; 479 480 default: 481 /* Nothing. */ 482 break; 483 } 484 485 /* 486 * Check to see if the device is in power-save mode, and 487 * being it out if necessary. 488 */ 489 switch (sc->sc_chip) { 490 case TULIP_CHIP_21140: 491 case TULIP_CHIP_21140A: 492 case TULIP_CHIP_21142: 493 case TULIP_CHIP_21143: 494 case TULIP_CHIP_MX98713A: 495 case TULIP_CHIP_MX98715: 496 case TULIP_CHIP_MX98715A: 497 case TULIP_CHIP_MX98715AEC_X: 498 case TULIP_CHIP_MX98725: 499 case TULIP_CHIP_DM9102: 500 case TULIP_CHIP_DM9102A: 501 /* 502 * Clear the "sleep mode" bit in the CFDA register. 503 */ 504 reg = pci_conf_read(pc, pa->pa_tag, TULIP_PCI_CFDA); 505 if (reg & (CFDA_SLEEP|CFDA_SNOOZE)) 506 pci_conf_write(pc, pa->pa_tag, TULIP_PCI_CFDA, 507 reg & ~(CFDA_SLEEP|CFDA_SNOOZE)); 508 break; 509 510 default: 511 /* Nothing. */ 512 break; 513 } 514 515 if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PWRMGMT, &pmreg, 0)) { 516 reg = pci_conf_read(pc, pa->pa_tag, pmreg + 4); 517 switch (reg & PCI_PMCSR_STATE_MASK) { 518 case PCI_PMCSR_STATE_D1: 519 case PCI_PMCSR_STATE_D2: 520 printf(": waking up from power state D%d\n%s", 521 reg & PCI_PMCSR_STATE_MASK, sc->sc_dev.dv_xname); 522 pci_conf_write(pc, pa->pa_tag, pmreg + 4, 523 (reg & ~PCI_PMCSR_STATE_MASK) | 524 PCI_PMCSR_STATE_D0); 525 break; 526 case PCI_PMCSR_STATE_D3: 527 /* 528 * The card has lost all configuration data in 529 * this state, so punt. 530 */ 531 printf(": unable to wake up from power state D3, " 532 "reboot required.\n"); 533 pci_conf_write(pc, pa->pa_tag, pmreg + 4, 534 (reg & ~PCI_PMCSR_STATE_MASK) | 535 PCI_PMCSR_STATE_D0); 536 return; 537 } 538 } 539 540 /* 541 * Map the device. 542 */ 543 ioh_valid = (pci_mapreg_map(pa, TULIP_PCI_IOBA, 544 PCI_MAPREG_TYPE_IO, 0, 545 &iot, &ioh, NULL, NULL) == 0); 546 memh_valid = (pci_mapreg_map(pa, TULIP_PCI_MMBA, 547 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 548 &memt, &memh, NULL, NULL) == 0); 549 550 if (memh_valid) { 551 sc->sc_st = memt; 552 sc->sc_sh = memh; 553 } else if (ioh_valid) { 554 sc->sc_st = iot; 555 sc->sc_sh = ioh; 556 } else { 557 printf(": unable to map device registers\n"); 558 return; 559 } 560 561 sc->sc_dmat = pa->pa_dmat; 562 563 /* 564 * Make sure bus mastering is enabled. 565 */ 566 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 567 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 568 PCI_COMMAND_MASTER_ENABLE); 569 570 /* 571 * Get the cacheline size. 572 */ 573 sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag, 574 PCI_BHLC_REG)); 575 576 /* 577 * Get PCI data moving command info. 578 */ 579 if (pa->pa_flags & PCI_FLAGS_MRL_OKAY) 580 sc->sc_flags |= TULIPF_MRL; 581 if (pa->pa_flags & PCI_FLAGS_MRM_OKAY) 582 sc->sc_flags |= TULIPF_MRM; 583 if (pa->pa_flags & PCI_FLAGS_MWI_OKAY) 584 sc->sc_flags |= TULIPF_MWI; 585 586 /* 587 * Read the contents of the Ethernet Address ROM/SROM. 588 */ 589 switch (sc->sc_chip) { 590 case TULIP_CHIP_21040: 591 sc->sc_srom_addrbits = 6; 592 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, M_NOWAIT); 593 TULIP_WRITE(sc, CSR_MIIROM, MIIROM_SROMCS); 594 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 595 for (j = 0; j < 10000; j++) { 596 val = TULIP_READ(sc, CSR_MIIROM); 597 if ((val & MIIROM_DN) == 0) 598 break; 599 } 600 sc->sc_srom[i] = val & MIIROM_DATA; 601 } 602 break; 603 604 case TULIP_CHIP_82C168: 605 case TULIP_CHIP_82C169: 606 { 607 sc->sc_srom_addrbits = 2; 608 sc->sc_srom = malloc(TULIP_ROM_SIZE(2), M_DEVBUF, M_NOWAIT); 609 610 /* 611 * The Lite-On PNIC stores the Ethernet address in 612 * the first 3 words of the EEPROM. EEPROM access 613 * is not like the other Tulip chips. 614 */ 615 for (i = 0; i < 6; i += 2) { 616 TULIP_WRITE(sc, CSR_PNIC_SROMCTL, 617 PNIC_SROMCTL_READ | (i >> 1)); 618 for (j = 0; j < 500; j++) { 619 delay(2); 620 val = TULIP_READ(sc, CSR_MIIROM); 621 if ((val & PNIC_MIIROM_BUSY) == 0) 622 break; 623 } 624 if (val & PNIC_MIIROM_BUSY) { 625 printf("%s: EEPROM timed out\n", 626 sc->sc_dev.dv_xname); 627 return; 628 } 629 val &= PNIC_MIIROM_DATA; 630 sc->sc_srom[i] = val >> 8; 631 sc->sc_srom[i + 1] = val & 0xff; 632 } 633 break; 634 } 635 636 default: 637 #ifdef algor 638 /* 639 * XXX This should be done with device properties, but 640 * XXX we don't have those yet. 641 */ 642 if (algor_get_ethaddr(pa, NULL)) { 643 extern int tlp_srom_debug; 644 sc->sc_srom_addrbits = 6; 645 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, 646 M_NOWAIT|M_ZERO); 647 algor_get_ethaddr(pa, sc->sc_srom); 648 if (tlp_srom_debug) { 649 printf("SROM CONTENTS:"); 650 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 651 if ((i % 8) == 0) 652 printf("\n\t"); 653 printf("0x%02x ", sc->sc_srom[i]); 654 } 655 printf("\n"); 656 } 657 break; 658 } 659 #endif /* algor */ 660 661 /* Check for a slaved ROM on a multi-port board. */ 662 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDROM, 663 TULIP_PCI_SLAVEROM); 664 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 665 sc->sc_srom_addrbits = 666 psc->sc_master->sc_tulip.sc_srom_addrbits; 667 sc->sc_srom = psc->sc_master->sc_tulip.sc_srom; 668 enaddr[5] += 669 sc->sc_devno - psc->sc_master->sc_tulip.sc_devno; 670 } 671 else if (tlp_read_srom(sc) == 0) 672 goto cant_cope; 673 break; 674 } 675 676 /* 677 * Deal with chip/board quirks. This includes setting up 678 * the mediasw, and extracting the Ethernet address from 679 * the rombuf. 680 */ 681 switch (sc->sc_chip) { 682 case TULIP_CHIP_21040: 683 /* 684 * Parse the Ethernet Address ROM. 685 */ 686 if (tlp_parse_old_srom(sc, enaddr) == 0) 687 goto cant_cope; 688 689 690 /* 691 * All 21040 boards start out with the same 692 * media switch. 693 */ 694 sc->sc_mediasw = &tlp_21040_mediasw; 695 696 /* 697 * Deal with any quirks this board might have. 698 */ 699 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21040_quirks); 700 break; 701 702 case TULIP_CHIP_21041: 703 /* Check for new format SROM. */ 704 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 705 /* 706 * Not an ISV SROM; try the old DEC Ethernet Address 707 * ROM format. 708 */ 709 if (tlp_parse_old_srom(sc, enaddr) == 0) 710 goto cant_cope; 711 } 712 713 /* 714 * All 21041 boards use the same media switch; they all 715 * work basically the same! Yippee! 716 */ 717 sc->sc_mediasw = &tlp_21041_mediasw; 718 719 /* 720 * Deal with any quirks this board might have. 721 */ 722 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21041_quirks); 723 break; 724 725 case TULIP_CHIP_21140: 726 case TULIP_CHIP_21140A: 727 /* Check for new format SROM. */ 728 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 729 /* 730 * Not an ISV SROM; try the old DEC Ethernet Address 731 * ROM format. 732 */ 733 if (tlp_parse_old_srom(sc, enaddr) == 0) 734 goto cant_cope; 735 } else { 736 /* 737 * We start out with the 2114x ISV media switch. 738 * When we search for quirks, we may change to 739 * a different switch. 740 */ 741 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 742 } 743 744 /* 745 * Deal with any quirks this board might have. 746 */ 747 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21140_quirks); 748 749 /* 750 * Bail out now if we can't deal with this board. 751 */ 752 if (sc->sc_mediasw == NULL) 753 goto cant_cope; 754 break; 755 756 case TULIP_CHIP_21142: 757 case TULIP_CHIP_21143: 758 /* Check for new format SROM. */ 759 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 760 /* 761 * Not an ISV SROM; try the old DEC Ethernet Address 762 * ROM format. 763 */ 764 if (tlp_parse_old_srom(sc, enaddr) == 0) 765 goto cant_cope; 766 } else { 767 /* 768 * We start out with the 2114x ISV media switch. 769 * When we search for quirks, we may change to 770 * a different switch. 771 */ 772 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 773 } 774 775 /* 776 * Deal with any quirks this board might have. 777 */ 778 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21142_quirks); 779 780 /* 781 * Bail out now if we can't deal with this board. 782 */ 783 if (sc->sc_mediasw == NULL) 784 goto cant_cope; 785 break; 786 787 case TULIP_CHIP_82C168: 788 case TULIP_CHIP_82C169: 789 /* 790 * Lite-On PNIC's Ethernet address is the first 6 791 * bytes of its EEPROM. 792 */ 793 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 794 795 /* 796 * Lite-On PNICs always use the same mediasw; we 797 * select MII vs. internal NWAY automatically. 798 */ 799 sc->sc_mediasw = &tlp_pnic_mediasw; 800 break; 801 802 case TULIP_CHIP_MX98713: 803 /* 804 * The Macronix MX98713 has an MII and GPIO, but no 805 * internal Nway block. This chip is basically a 806 * perfect 21140A clone, with the exception of the 807 * a magic register frobbing in order to make the 808 * interface function. 809 */ 810 if (tlp_isv_srom_enaddr(sc, enaddr)) { 811 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 812 break; 813 } 814 /* FALLTHROUGH */ 815 816 case TULIP_CHIP_82C115: 817 /* 818 * Yippee! The Lite-On 82C115 is a clone of 819 * the MX98725 (the data sheet even says `MXIC' 820 * on it)! Imagine that, a clone of a clone. 821 * 822 * The differences are really minimal: 823 * 824 * - Wake-On-LAN support 825 * - 128-bit multicast hash table, rather than 826 * the standard 512-bit hash table 827 */ 828 /* FALLTHROUGH */ 829 830 case TULIP_CHIP_MX98713A: 831 case TULIP_CHIP_MX98715A: 832 case TULIP_CHIP_MX98715AEC_X: 833 case TULIP_CHIP_MX98725: 834 /* 835 * The MX98713A has an MII as well as an internal Nway block, 836 * but no GPIO. The MX98715 and MX98725 have an internal 837 * Nway block only. 838 * 839 * The internal Nway block, unlike the Lite-On PNIC's, does 840 * just that - performs Nway. Once autonegotiation completes, 841 * we must program the GPR media information into the chip. 842 * 843 * The byte offset of the Ethernet address is stored at 844 * offset 0x70. 845 */ 846 memcpy(enaddr, &sc->sc_srom[sc->sc_srom[0x70]], ETHER_ADDR_LEN); 847 sc->sc_mediasw = &tlp_pmac_mediasw; 848 break; 849 850 case TULIP_CHIP_WB89C840F: 851 /* 852 * Winbond 89C840F's Ethernet address is the first 853 * 6 bytes of its EEPROM. 854 */ 855 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 856 857 /* 858 * Winbond 89C840F has an MII attached to the SIO. 859 */ 860 sc->sc_mediasw = &tlp_sio_mii_mediasw; 861 break; 862 863 case TULIP_CHIP_AL981: 864 /* 865 * The ADMtek AL981's Ethernet address is located 866 * at offset 8 of its EEPROM. 867 */ 868 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 869 870 /* 871 * ADMtek AL981 has a built-in PHY accessed through 872 * special registers. 873 */ 874 sc->sc_mediasw = &tlp_al981_mediasw; 875 break; 876 877 case TULIP_CHIP_AN983: 878 case TULIP_CHIP_AN985: 879 /* 880 * The ADMtek AN985's Ethernet address is located 881 * at offset 8 of its EEPROM. 882 */ 883 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 884 885 /* 886 * The ADMtek AN985 can be configured in Single-Chip 887 * mode or MAC-only mode. Single-Chip uses the built-in 888 * PHY, MAC-only has an external PHY (usually HomePNA). 889 * The selection is based on an EEPROM setting, and both 890 * PHYs are accessed via MII attached to SIO. 891 * 892 * The AN985 "ghosts" the internal PHY onto all 893 * MII addresses, so we have to use a media init 894 * routine that limits the search. 895 * XXX How does this work with MAC-only mode? 896 */ 897 sc->sc_mediasw = &tlp_an985_mediasw; 898 break; 899 900 case TULIP_CHIP_DM9102: 901 case TULIP_CHIP_DM9102A: 902 /* 903 * Some boards with the Davicom chip have an ISV 904 * SROM (mostly DM9102A boards -- trying to describe 905 * the HomePNA PHY, probably) although the data in 906 * them is generally wrong. Check for ISV format 907 * and grab the Ethernet address that way, and if 908 * that fails, fall back on grabbing it from an 909 * observed offset of 20 (which is where it would 910 * be in an ISV SROM anyhow, tho ISV can cope with 911 * multi-port boards). 912 */ 913 if (!tlp_isv_srom_enaddr(sc, enaddr)) { 914 #ifdef __sparc__ 915 if (!sc->sc_srom[20] && !sc->sc_srom[21] && 916 !sc->sc_srom[22]) { 917 extern void myetheraddr __P((u_char *)); 918 myetheraddr(enaddr); 919 } else 920 #endif 921 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN); 922 } 923 924 /* 925 * Davicom chips all have an internal MII interface 926 * and a built-in PHY. DM9102A also has a an external 927 * MII interface, usually with a HomePNA PHY attached 928 * to it. 929 */ 930 sc->sc_mediasw = &tlp_dm9102_mediasw; 931 break; 932 933 default: 934 cant_cope: 935 printf("%s: sorry, unable to handle your board\n", 936 sc->sc_dev.dv_xname); 937 return; 938 } 939 940 /* 941 * Handle shared interrupts. 942 */ 943 if (psc->sc_flags & TULIP_PCI_SHAREDINTR) { 944 if (psc->sc_master) 945 psc->sc_flags |= TULIP_PCI_SLAVEINTR; 946 else { 947 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDINTR, 948 TULIP_PCI_SLAVEINTR); 949 if (psc->sc_master == NULL) 950 psc->sc_master = psc; 951 } 952 LIST_INSERT_HEAD(&psc->sc_master->sc_intrslaves, 953 psc, sc_intrq); 954 } 955 956 if (psc->sc_flags & TULIP_PCI_SLAVEINTR) { 957 printf("%s: sharing interrupt with %s\n", 958 sc->sc_dev.dv_xname, 959 psc->sc_master->sc_tulip.sc_dev.dv_xname); 960 } else { 961 /* 962 * Map and establish our interrupt. 963 */ 964 if (pci_intr_map(pa, &ih)) { 965 printf("%s: unable to map interrupt\n", 966 sc->sc_dev.dv_xname); 967 return; 968 } 969 intrstr = pci_intr_string(pc, ih); 970 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, 971 (psc->sc_flags & TULIP_PCI_SHAREDINTR) ? 972 tlp_pci_shared_intr : tlp_intr, sc); 973 if (psc->sc_ih == NULL) { 974 printf("%s: unable to establish interrupt", 975 sc->sc_dev.dv_xname); 976 if (intrstr != NULL) 977 printf(" at %s", intrstr); 978 printf("\n"); 979 return; 980 } 981 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, 982 intrstr); 983 } 984 985 /* 986 * Finish off the attach. 987 */ 988 tlp_attach(sc, enaddr); 989 } 990 991 int 992 tlp_pci_shared_intr(arg) 993 void *arg; 994 { 995 struct tulip_pci_softc *master = arg, *slave; 996 int rv = 0; 997 998 for (slave = LIST_FIRST(&master->sc_intrslaves); 999 slave != NULL; 1000 slave = LIST_NEXT(slave, sc_intrq)) 1001 rv |= tlp_intr(&slave->sc_tulip); 1002 1003 return (rv); 1004 } 1005 1006 void 1007 tlp_pci_dec_quirks(psc, enaddr) 1008 struct tulip_pci_softc *psc; 1009 const u_int8_t *enaddr; 1010 { 1011 struct tulip_softc *sc = &psc->sc_tulip; 1012 1013 /* 1014 * This isn't really a quirk-gathering device, really. We 1015 * just want to get the spiffy DEC board name from the SROM. 1016 */ 1017 strcpy(sc->sc_name, "DEC "); 1018 1019 if (memcmp(&sc->sc_srom[29], "DE500", 5) == 0 || 1020 memcmp(&sc->sc_srom[29], "DE450", 5) == 0) 1021 memcpy(&sc->sc_name[4], &sc->sc_srom[29], 8); 1022 } 1023 1024 void 1025 tlp_pci_znyx_21040_quirks(psc, enaddr) 1026 struct tulip_pci_softc *psc; 1027 const u_int8_t *enaddr; 1028 { 1029 struct tulip_softc *sc = &psc->sc_tulip; 1030 u_int16_t id = 0; 1031 1032 /* 1033 * If we have a slaved ROM, just copy the bits from the master. 1034 * This is in case we fail the ROM ID check (older boards) and 1035 * need to fall back on Ethernet address model checking; that 1036 * will fail for slave chips. 1037 */ 1038 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 1039 strcpy(sc->sc_name, psc->sc_master->sc_tulip.sc_name); 1040 sc->sc_mediasw = psc->sc_master->sc_tulip.sc_mediasw; 1041 psc->sc_flags |= 1042 psc->sc_master->sc_flags & TULIP_PCI_SHAREDINTR; 1043 return; 1044 } 1045 1046 if (sc->sc_srom[32] == 0x4a && sc->sc_srom[33] == 0x52) { 1047 id = sc->sc_srom[37] | (sc->sc_srom[36] << 8); 1048 switch (id) { 1049 zx312: 1050 case 0x0602: /* ZX312 */ 1051 strcpy(sc->sc_name, "ZNYX ZX312"); 1052 return; 1053 1054 case 0x0622: /* ZX312T */ 1055 strcpy(sc->sc_name, "ZNYX ZX312T"); 1056 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1057 return; 1058 1059 zx314_inta: 1060 case 0x0701: /* ZX314 INTA */ 1061 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1062 /* FALLTHROUGH */ 1063 case 0x0711: /* ZX314 */ 1064 strcpy(sc->sc_name, "ZNYX ZX314"); 1065 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1066 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1067 return; 1068 1069 zx315_inta: 1070 case 0x0801: /* ZX315 INTA */ 1071 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1072 /* FALLTHROUGH */ 1073 case 0x0811: /* ZX315 */ 1074 strcpy(sc->sc_name, "ZNYX ZX315"); 1075 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1076 return; 1077 1078 default: 1079 id = 0; 1080 break; 1081 } 1082 } 1083 1084 /* 1085 * Deal with boards that have broken ROMs. 1086 */ 1087 if (id == 0) { 1088 if ((enaddr[3] & ~3) == 0xf0 && (enaddr[5] & 3) == 0x00) 1089 goto zx314_inta; 1090 if ((enaddr[3] & ~3) == 0xf4 && (enaddr[5] & 1) == 0x00) 1091 goto zx315_inta; 1092 if ((enaddr[3] & ~3) == 0xec) 1093 goto zx312; 1094 } 1095 1096 strcpy(sc->sc_name, "ZNYX ZX31x"); 1097 } 1098 1099 void 1100 tlp_pci_smc_21040_quirks(psc, enaddr) 1101 struct tulip_pci_softc *psc; 1102 const u_int8_t *enaddr; 1103 { 1104 struct tulip_softc *sc = &psc->sc_tulip; 1105 u_int16_t id1, id2, ei; 1106 int auibnc = 0, utp = 0; 1107 char *cp; 1108 1109 id1 = sc->sc_srom[0x60] | (sc->sc_srom[0x61] << 8); 1110 id2 = sc->sc_srom[0x62] | (sc->sc_srom[0x63] << 8); 1111 ei = sc->sc_srom[0x66] | (sc->sc_srom[0x67] << 8); 1112 1113 strcpy(sc->sc_name, "SMC 8432"); 1114 cp = &sc->sc_name[8]; 1115 1116 if ((id1 & 1) == 0) { 1117 *cp++ = 'B'; 1118 auibnc = 1; 1119 } 1120 if ((id1 & 0xff) > 0x32) { 1121 *cp++ = 'T'; 1122 utp = 1; 1123 } 1124 if ((id1 & 0x4000) == 0) { 1125 *cp++ = 'A'; 1126 auibnc = 1; 1127 } 1128 if (id2 == 0x15) { 1129 sc->sc_name[7] = '4'; 1130 *cp++ = '-'; 1131 *cp++ = 'C'; 1132 *cp++ = 'H'; 1133 *cp++ = ei ? '2' : '1'; 1134 } 1135 *cp = '\0'; 1136 1137 if (utp != 0 && auibnc == 0) 1138 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1139 else if (utp == 0 && auibnc != 0) 1140 sc->sc_mediasw = &tlp_21040_auibnc_mediasw; 1141 } 1142 1143 void 1144 tlp_pci_cogent_21040_quirks(psc, enaddr) 1145 struct tulip_pci_softc *psc; 1146 const u_int8_t *enaddr; 1147 { 1148 1149 strcpy(psc->sc_tulip.sc_name, "Cogent multi-port"); 1150 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1151 } 1152 1153 void 1154 tlp_pci_accton_21040_quirks(psc, enaddr) 1155 struct tulip_pci_softc *psc; 1156 const u_int8_t *enaddr; 1157 { 1158 1159 strcpy(psc->sc_tulip.sc_name, "ACCTON EN1203"); 1160 } 1161 1162 void tlp_pci_asante_21140_reset __P((struct tulip_softc *)); 1163 1164 void 1165 tlp_pci_asante_21140_quirks(psc, enaddr) 1166 struct tulip_pci_softc *psc; 1167 const u_int8_t *enaddr; 1168 { 1169 struct tulip_softc *sc = &psc->sc_tulip; 1170 1171 /* 1172 * Some Asante boards don't use the ISV SROM format. For 1173 * those that don't, we initialize the GPIO direction bits, 1174 * and provide our own reset hook, which resets the MII. 1175 * 1176 * All of these boards use SIO-attached-MII media. 1177 */ 1178 if (sc->sc_mediasw == &tlp_2114x_isv_mediasw) 1179 return; 1180 1181 strcpy(sc->sc_name, "Asante"); 1182 1183 sc->sc_gp_dir = 0xbf; 1184 sc->sc_reset = tlp_pci_asante_21140_reset; 1185 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1186 } 1187 1188 void 1189 tlp_pci_asante_21140_reset(sc) 1190 struct tulip_softc *sc; 1191 { 1192 1193 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1194 TULIP_WRITE(sc, CSR_GPP, 0x8); 1195 delay(100); 1196 TULIP_WRITE(sc, CSR_GPP, 0); 1197 } 1198 1199 /* 1200 * SMC 9332DST media switch. 1201 */ 1202 void tlp_smc9332dst_tmsw_init __P((struct tulip_softc *)); 1203 1204 const struct tulip_mediasw tlp_smc9332dst_mediasw = { 1205 tlp_smc9332dst_tmsw_init, 1206 tlp_21140_gpio_get, 1207 tlp_21140_gpio_set 1208 }; 1209 1210 void 1211 tlp_pci_smc_21140_quirks(psc, enaddr) 1212 struct tulip_pci_softc *psc; 1213 const u_int8_t *enaddr; 1214 { 1215 struct tulip_softc *sc = &psc->sc_tulip; 1216 1217 if (sc->sc_mediasw != NULL) { 1218 return; 1219 } 1220 strcpy(psc->sc_tulip.sc_name, "SMC 9332DST"); 1221 sc->sc_mediasw = &tlp_smc9332dst_mediasw; 1222 } 1223 1224 void 1225 tlp_smc9332dst_tmsw_init(sc) 1226 struct tulip_softc *sc; 1227 { 1228 struct tulip_21x4x_media *tm; 1229 const char *sep = ""; 1230 uint32_t reg; 1231 int i, cnt; 1232 1233 sc->sc_gp_dir = GPP_SMC9332DST_PINS; 1234 sc->sc_opmode = OPMODE_MBO | OPMODE_PS; 1235 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 1236 1237 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 1238 tlp_mediastatus); 1239 printf("%s: ", sc->sc_dev.dv_xname); 1240 1241 #define ADD(m, c) \ 1242 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK|M_ZERO); \ 1243 tm->tm_opmode = (c); \ 1244 tm->tm_gpdata = GPP_SMC9332DST_INIT; \ 1245 ifmedia_add(&sc->sc_mii.mii_media, (m), 0, tm) 1246 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 1247 1248 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0), OPMODE_TTM); 1249 PRINT("10baseT"); 1250 1251 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, 0), 1252 OPMODE_TTM | OPMODE_FD); 1253 PRINT("10baseT-FDX"); 1254 1255 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 1256 OPMODE_PS | OPMODE_PCS | OPMODE_SCR); 1257 PRINT("100baseTX"); 1258 1259 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, 0), 1260 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD); 1261 PRINT("100baseTX-FDX"); 1262 1263 #undef ADD 1264 #undef PRINT 1265 1266 printf("\n"); 1267 1268 tlp_reset(sc); 1269 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode | OPMODE_PCS | OPMODE_SCR); 1270 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1271 delay(10); 1272 TULIP_WRITE(sc, CSR_GPP, GPP_SMC9332DST_INIT); 1273 delay(200000); 1274 cnt = 0; 1275 for (i = 1000; i > 0; i--) { 1276 reg = TULIP_READ(sc, CSR_GPP); 1277 if ((~reg & (GPP_SMC9332DST_OK10 | 1278 GPP_SMC9332DST_OK100)) == 0) { 1279 if (cnt++ > 100) { 1280 break; 1281 } 1282 } else if ((reg & GPP_SMC9332DST_OK10) == 0) { 1283 break; 1284 } else { 1285 cnt = 0; 1286 } 1287 delay(1000); 1288 } 1289 if (cnt > 100) { 1290 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX); 1291 } else { 1292 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 1293 } 1294 } 1295 1296 void tlp_pci_cobalt_21142_reset __P((struct tulip_softc *)); 1297 1298 void 1299 tlp_pci_cobalt_21142_quirks(psc, enaddr) 1300 struct tulip_pci_softc *psc; 1301 const u_int8_t *enaddr; 1302 { 1303 struct tulip_softc *sc = &psc->sc_tulip; 1304 1305 /* 1306 * Cobalt Networks interfaces are just MII-on-SIO. 1307 */ 1308 sc->sc_reset = tlp_pci_cobalt_21142_reset; 1309 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1310 1311 /* 1312 * The Cobalt systems tend to fall back to store-and-forward 1313 * pretty quickly, so we select that from the beginning to 1314 * avoid initial timeouts. 1315 */ 1316 sc->sc_txthresh = TXTH_SF; 1317 } 1318 1319 void 1320 tlp_pci_cobalt_21142_reset(sc) 1321 struct tulip_softc *sc; 1322 { 1323 /* 1324 * Reset PHY. 1325 */ 1326 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE | (1 << 16)); 1327 delay(10); 1328 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE); 1329 delay(10); 1330 } 1331 1332 void 1333 tlp_pci_algor_21142_quirks(psc, enaddr) 1334 struct tulip_pci_softc *psc; 1335 const u_int8_t *enaddr; 1336 { 1337 struct tulip_softc *sc = &psc->sc_tulip; 1338 1339 /* 1340 * Algorithmics boards just have MII-on-SIO. 1341 * 1342 * XXX They also have AUI on the serial interface. 1343 * XXX Deal with this. 1344 */ 1345 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1346 } 1347 1348 void 1349 tlp_pci_adaptec_quirks(psc, enaddr) 1350 struct tulip_pci_softc *psc; 1351 const u_int8_t *enaddr; 1352 { 1353 struct tulip_softc *sc = &psc->sc_tulip; 1354 uint8_t *srom = sc->sc_srom; 1355 uint16_t id1, id2; 1356 1357 id1 = TULIP_ROM_GETW(srom, 0); 1358 id2 = TULIP_ROM_GETW(srom, 2); 1359 if (id1 != 0x1109) { 1360 goto unknown; 1361 } 1362 1363 switch (id2) { 1364 case 0x1900: 1365 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911"); 1366 break; 1367 1368 case 0x2400: 1369 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6944A"); 1370 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1371 break; 1372 1373 case 0x2b00: 1374 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911A"); 1375 break; 1376 1377 case 0x3000: 1378 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6922"); 1379 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1380 break; 1381 1382 default: 1383 unknown: 1384 printf("%s: unknown Adaptec/Cogent board ID 0x%04x/0x%04x\n", 1385 sc->sc_dev.dv_xname, id1, id2); 1386 } 1387 } 1388
Indexes created Tue Sep 23 14:10:03 GMT 2025