if_tlp_pci.c revision 1.64 1 /* $NetBSD: if_tlp_pci.c,v 1.64 2002/04/04 05:45:55 chs Exp $ */
2
3 /*-
4 * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the NetBSD
22 * Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 * contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40 /*
41 * PCI bus front-end for the Digital Semiconductor ``Tulip'' (21x4x)
42 * Ethernet controller family driver.
43 */
44
45 #include <sys/cdefs.h>
46 __KERNEL_RCSID(0, "$NetBSD: if_tlp_pci.c,v 1.64 2002/04/04 05:45:55 chs Exp $");
47
48 #include "opt_tlp.h"
49
50 #include <sys/param.h>
51 #include <sys/systm.h>
52 #include <sys/mbuf.h>
53 #include <sys/malloc.h>
54 #include <sys/kernel.h>
55 #include <sys/socket.h>
56 #include <sys/ioctl.h>
57 #include <sys/errno.h>
58 #include <sys/device.h>
59
60 #include <machine/endian.h>
61
62 #include <net/if.h>
63 #include <net/if_dl.h>
64 #include <net/if_media.h>
65 #include <net/if_ether.h>
66
67 #include <machine/bus.h>
68 #include <machine/intr.h>
69
70 #include <dev/mii/miivar.h>
71 #include <dev/mii/mii_bitbang.h>
72
73 #include <dev/ic/tulipreg.h>
74 #include <dev/ic/tulipvar.h>
75
76 #include <dev/pci/pcivar.h>
77 #include <dev/pci/pcireg.h>
78 #include <dev/pci/pcidevs.h>
79
80 /*
81 * PCI configuration space registers used by the Tulip.
82 */
83 #define TULIP_PCI_IOBA 0x10 /* i/o mapped base */
84 #define TULIP_PCI_MMBA 0x14 /* memory mapped base */
85 #define TULIP_PCI_CFDA 0x40 /* configuration driver area */
86
87 #define CFDA_SLEEP 0x80000000 /* sleep mode */
88 #define CFDA_SNOOZE 0x40000000 /* snooze mode */
89
90 struct tulip_pci_softc {
91 struct tulip_softc sc_tulip; /* real Tulip softc */
92
93 /* PCI-specific goo. */
94 void *sc_ih; /* interrupt handle */
95
96 pci_chipset_tag_t sc_pc; /* our PCI chipset */
97 pcitag_t sc_pcitag; /* our PCI tag */
98
99 int sc_flags; /* flags; see below */
100
101 LIST_HEAD(, tulip_pci_softc) sc_intrslaves;
102 LIST_ENTRY(tulip_pci_softc) sc_intrq;
103
104 /* Our {ROM,interrupt} master. */
105 struct tulip_pci_softc *sc_master;
106 };
107
108 /* sc_flags */
109 #define TULIP_PCI_SHAREDINTR 0x01 /* interrupt is shared */
110 #define TULIP_PCI_SLAVEINTR 0x02 /* interrupt is slave */
111 #define TULIP_PCI_SHAREDROM 0x04 /* ROM is shared */
112 #define TULIP_PCI_SLAVEROM 0x08 /* slave of shared ROM */
113
114 int tlp_pci_match __P((struct device *, struct cfdata *, void *));
115 void tlp_pci_attach __P((struct device *, struct device *, void *));
116
117 struct cfattach tlp_pci_ca = {
118 sizeof(struct tulip_pci_softc), tlp_pci_match, tlp_pci_attach,
119 };
120
121 const struct tulip_pci_product {
122 u_int32_t tpp_vendor; /* PCI vendor ID */
123 u_int32_t tpp_product; /* PCI product ID */
124 tulip_chip_t tpp_chip; /* base Tulip chip type */
125 } tlp_pci_products[] = {
126 #ifdef TLP_MATCH_21040
127 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21040,
128 TULIP_CHIP_21040 },
129 #endif
130 #ifdef TLP_MATCH_21041
131 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21041,
132 TULIP_CHIP_21041 },
133 #endif
134 #ifdef TLP_MATCH_21140
135 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21140,
136 TULIP_CHIP_21140 },
137 #endif
138 #ifdef TLP_MATCH_21142
139 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142,
140 TULIP_CHIP_21142 },
141 #endif
142
143 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C168,
144 TULIP_CHIP_82C168 },
145
146 /*
147 * Note: This is like a MX98725 with Wake-On-LAN and a
148 * 128-bit multicast hash table.
149 */
150 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C115,
151 TULIP_CHIP_82C115 },
152
153 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98713,
154 TULIP_CHIP_MX98713 },
155 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX987x5,
156 TULIP_CHIP_MX98715 },
157
158 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100TX,
159 TULIP_CHIP_MX98713 },
160
161 { PCI_VENDOR_WINBOND, PCI_PRODUCT_WINBOND_W89C840F,
162 TULIP_CHIP_WB89C840F },
163 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100ATX,
164 TULIP_CHIP_WB89C840F },
165
166 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9102,
167 TULIP_CHIP_DM9102 },
168
169 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AL981,
170 TULIP_CHIP_AL981 },
171
172 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN985,
173 TULIP_CHIP_AN985 },
174 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN2242,
175 TULIP_CHIP_AN985 },
176
177 #if 0
178 { PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX88140A,
179 TULIP_CHIP_AX88140 },
180 #endif
181
182 { 0, 0,
183 TULIP_CHIP_INVALID },
184 };
185
186 struct tlp_pci_quirks {
187 void (*tpq_func) __P((struct tulip_pci_softc *,
188 const u_int8_t *));
189 u_int8_t tpq_oui[3];
190 };
191
192 void tlp_pci_dec_quirks __P((struct tulip_pci_softc *,
193 const u_int8_t *));
194
195 void tlp_pci_znyx_21040_quirks __P((struct tulip_pci_softc *,
196 const u_int8_t *));
197 void tlp_pci_smc_21040_quirks __P((struct tulip_pci_softc *,
198 const u_int8_t *));
199 void tlp_pci_cogent_21040_quirks __P((struct tulip_pci_softc *,
200 const u_int8_t *));
201 void tlp_pci_accton_21040_quirks __P((struct tulip_pci_softc *,
202 const u_int8_t *));
203
204 void tlp_pci_cobalt_21142_quirks __P((struct tulip_pci_softc *,
205 const u_int8_t *));
206 void tlp_pci_algor_21142_quirks __P((struct tulip_pci_softc *,
207 const u_int8_t *));
208 void tlp_pci_netwinder_21142_quirks __P((struct tulip_pci_softc *,
209 const u_int8_t *));
210
211 void tlp_pci_adaptec_quirks __P((struct tulip_pci_softc *,
212 const u_int8_t *));
213
214 const struct tlp_pci_quirks tlp_pci_21040_quirks[] = {
215 { tlp_pci_znyx_21040_quirks, { 0x00, 0xc0, 0x95 } },
216 { tlp_pci_smc_21040_quirks, { 0x00, 0x00, 0xc0 } },
217 { tlp_pci_cogent_21040_quirks, { 0x00, 0x00, 0x92 } },
218 { tlp_pci_accton_21040_quirks, { 0x00, 0x00, 0xe8 } },
219 { NULL, { 0, 0, 0 } }
220 };
221
222 const struct tlp_pci_quirks tlp_pci_21041_quirks[] = {
223 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } },
224 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } },
225 { NULL, { 0, 0, 0 } }
226 };
227
228 void tlp_pci_asante_21140_quirks __P((struct tulip_pci_softc *,
229 const u_int8_t *));
230 void tlp_pci_smc_21140_quirks __P((struct tulip_pci_softc *,
231 const u_int8_t *));
232
233 const struct tlp_pci_quirks tlp_pci_21140_quirks[] = {
234 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } },
235 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } },
236 { tlp_pci_asante_21140_quirks, { 0x00, 0x00, 0x94 } },
237 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0x92 } },
238 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } },
239 { tlp_pci_smc_21140_quirks, { 0x00, 0x00, 0xc0 } },
240 { NULL, { 0, 0, 0 } }
241 };
242
243 const struct tlp_pci_quirks tlp_pci_21142_quirks[] = {
244 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } },
245 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } },
246 { tlp_pci_cobalt_21142_quirks, { 0x00, 0x10, 0xe0 } },
247 { tlp_pci_algor_21142_quirks, { 0x00, 0x40, 0xbc } },
248 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } },
249 { tlp_pci_netwinder_21142_quirks,{ 0x00, 0x10, 0x57 } },
250 { NULL, { 0, 0, 0 } }
251 };
252
253 int tlp_pci_shared_intr __P((void *));
254
255 const struct tulip_pci_product *tlp_pci_lookup
256 __P((const struct pci_attach_args *));
257 void tlp_pci_get_quirks __P((struct tulip_pci_softc *, const u_int8_t *,
258 const struct tlp_pci_quirks *));
259 void tlp_pci_check_slaved __P((struct tulip_pci_softc *, int, int));
260
261 const struct tulip_pci_product *
262 tlp_pci_lookup(pa)
263 const struct pci_attach_args *pa;
264 {
265 const struct tulip_pci_product *tpp;
266
267 for (tpp = tlp_pci_products;
268 tlp_chip_names[tpp->tpp_chip] != NULL;
269 tpp++) {
270 if (PCI_VENDOR(pa->pa_id) == tpp->tpp_vendor &&
271 PCI_PRODUCT(pa->pa_id) == tpp->tpp_product)
272 return (tpp);
273 }
274 return (NULL);
275 }
276
277 void
278 tlp_pci_get_quirks(psc, enaddr, tpq)
279 struct tulip_pci_softc *psc;
280 const u_int8_t *enaddr;
281 const struct tlp_pci_quirks *tpq;
282 {
283
284 for (; tpq->tpq_func != NULL; tpq++) {
285 if (tpq->tpq_oui[0] == enaddr[0] &&
286 tpq->tpq_oui[1] == enaddr[1] &&
287 tpq->tpq_oui[2] == enaddr[2]) {
288 (*tpq->tpq_func)(psc, enaddr);
289 return;
290 }
291 }
292 }
293
294 void
295 tlp_pci_check_slaved(psc, shared, slaved)
296 struct tulip_pci_softc *psc;
297 int shared, slaved;
298 {
299 extern struct cfdriver tlp_cd;
300 struct tulip_pci_softc *cur, *best = NULL;
301 struct tulip_softc *sc = &psc->sc_tulip;
302 int i;
303
304 /*
305 * First of all, find the lowest pcidev numbered device on our
306 * bus marked as shared. That should be our master.
307 */
308 for (i = 0; i < tlp_cd.cd_ndevs; i++) {
309 if ((cur = tlp_cd.cd_devs[i]) == NULL)
310 continue;
311 if (cur->sc_tulip.sc_dev.dv_parent != sc->sc_dev.dv_parent)
312 continue;
313 if ((cur->sc_flags & shared) == 0)
314 continue;
315 if (cur == psc)
316 continue;
317 if (best == NULL ||
318 best->sc_tulip.sc_devno > cur->sc_tulip.sc_devno)
319 best = cur;
320 }
321
322 if (best != NULL) {
323 psc->sc_master = best;
324 psc->sc_flags |= (shared | slaved);
325 }
326 }
327
328 int
329 tlp_pci_match(parent, match, aux)
330 struct device *parent;
331 struct cfdata *match;
332 void *aux;
333 {
334 struct pci_attach_args *pa = aux;
335
336 if (tlp_pci_lookup(pa) != NULL)
337 return (10); /* beat if_de.c */
338
339 return (0);
340 }
341
342 void
343 tlp_pci_attach(parent, self, aux)
344 struct device *parent, *self;
345 void *aux;
346 {
347 struct tulip_pci_softc *psc = (void *) self;
348 struct tulip_softc *sc = &psc->sc_tulip;
349 struct pci_attach_args *pa = aux;
350 pci_chipset_tag_t pc = pa->pa_pc;
351 pci_intr_handle_t ih;
352 const char *intrstr = NULL;
353 bus_space_tag_t iot, memt;
354 bus_space_handle_t ioh, memh;
355 int ioh_valid, memh_valid, i, j;
356 const struct tulip_pci_product *tpp;
357 u_int8_t enaddr[ETHER_ADDR_LEN];
358 u_int32_t val;
359 pcireg_t reg;
360 int pmreg;
361
362 sc->sc_devno = pa->pa_device;
363 psc->sc_pc = pa->pa_pc;
364 psc->sc_pcitag = pa->pa_tag;
365
366 LIST_INIT(&psc->sc_intrslaves);
367
368 tpp = tlp_pci_lookup(pa);
369 if (tpp == NULL) {
370 printf("\n");
371 panic("tlp_pci_attach: impossible");
372 }
373 sc->sc_chip = tpp->tpp_chip;
374
375 /*
376 * By default, Tulip registers are 8 bytes long (4 bytes
377 * followed by a 4 byte pad).
378 */
379 sc->sc_regshift = 3;
380
381 /*
382 * No power management hooks.
383 * XXX Maybe we should add some!
384 */
385 sc->sc_flags |= TULIPF_ENABLED;
386
387 /*
388 * Get revision info, and set some chip-specific variables.
389 */
390 sc->sc_rev = PCI_REVISION(pa->pa_class);
391 switch (sc->sc_chip) {
392 case TULIP_CHIP_21140:
393 if (sc->sc_rev >= 0x20)
394 sc->sc_chip = TULIP_CHIP_21140A;
395 break;
396
397 case TULIP_CHIP_21142:
398 if (sc->sc_rev >= 0x20)
399 sc->sc_chip = TULIP_CHIP_21143;
400 break;
401
402 case TULIP_CHIP_82C168:
403 if (sc->sc_rev >= 0x20)
404 sc->sc_chip = TULIP_CHIP_82C169;
405 break;
406
407 case TULIP_CHIP_MX98713:
408 if (sc->sc_rev >= 0x10)
409 sc->sc_chip = TULIP_CHIP_MX98713A;
410 break;
411
412 case TULIP_CHIP_MX98715:
413 if (sc->sc_rev >= 0x20)
414 sc->sc_chip = TULIP_CHIP_MX98715A;
415 if (sc->sc_rev >= 0x25)
416 sc->sc_chip = TULIP_CHIP_MX98715AEC_X;
417 if (sc->sc_rev >= 0x30)
418 sc->sc_chip = TULIP_CHIP_MX98725;
419 break;
420
421 case TULIP_CHIP_WB89C840F:
422 sc->sc_regshift = 2;
423 break;
424
425 case TULIP_CHIP_AN985:
426 /*
427 * The AN983 and AN985 are very similar, and are
428 * differentiated by a "signature" register that
429 * is like, but not identical, to a PCI ID register.
430 */
431 reg = pci_conf_read(pc, pa->pa_tag, 0x80);
432 switch (reg) {
433 case 0x09811317:
434 sc->sc_chip = TULIP_CHIP_AN985;
435 break;
436
437 case 0x09851317:
438 sc->sc_chip = TULIP_CHIP_AN983;
439 break;
440
441 default:
442 /* Unknown -- use default. */
443 break;
444 }
445 break;
446
447 case TULIP_CHIP_AX88140:
448 if (sc->sc_rev >= 0x10)
449 sc->sc_chip = TULIP_CHIP_AX88141;
450 break;
451
452 case TULIP_CHIP_DM9102:
453 if (sc->sc_rev >= 0x30)
454 sc->sc_chip = TULIP_CHIP_DM9102A;
455 break;
456
457 default:
458 /* Nothing. */
459 break;
460 }
461
462 printf(": %s Ethernet, pass %d.%d\n",
463 tlp_chip_names[sc->sc_chip],
464 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf);
465
466 switch (sc->sc_chip) {
467 case TULIP_CHIP_21040:
468 if (sc->sc_rev < 0x20) {
469 printf("%s: 21040 must be at least pass 2.0\n",
470 sc->sc_dev.dv_xname);
471 return;
472 }
473 break;
474
475 case TULIP_CHIP_21140:
476 if (sc->sc_rev < 0x11) {
477 printf("%s: 21140 must be at least pass 1.1\n",
478 sc->sc_dev.dv_xname);
479 return;
480 }
481 break;
482
483 default:
484 /* Nothing. */
485 break;
486 }
487
488 /*
489 * Check to see if the device is in power-save mode, and
490 * being it out if necessary.
491 */
492 switch (sc->sc_chip) {
493 case TULIP_CHIP_21140:
494 case TULIP_CHIP_21140A:
495 case TULIP_CHIP_21142:
496 case TULIP_CHIP_21143:
497 case TULIP_CHIP_MX98713A:
498 case TULIP_CHIP_MX98715:
499 case TULIP_CHIP_MX98715A:
500 case TULIP_CHIP_MX98715AEC_X:
501 case TULIP_CHIP_MX98725:
502 case TULIP_CHIP_DM9102:
503 case TULIP_CHIP_DM9102A:
504 /*
505 * Clear the "sleep mode" bit in the CFDA register.
506 */
507 reg = pci_conf_read(pc, pa->pa_tag, TULIP_PCI_CFDA);
508 if (reg & (CFDA_SLEEP|CFDA_SNOOZE))
509 pci_conf_write(pc, pa->pa_tag, TULIP_PCI_CFDA,
510 reg & ~(CFDA_SLEEP|CFDA_SNOOZE));
511 break;
512
513 default:
514 /* Nothing. */
515 break;
516 }
517
518 if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PWRMGMT, &pmreg, 0)) {
519 reg = pci_conf_read(pc, pa->pa_tag, pmreg + 4);
520 switch (reg & PCI_PMCSR_STATE_MASK) {
521 case PCI_PMCSR_STATE_D1:
522 case PCI_PMCSR_STATE_D2:
523 printf(": waking up from power state D%d\n%s",
524 reg & PCI_PMCSR_STATE_MASK, sc->sc_dev.dv_xname);
525 pci_conf_write(pc, pa->pa_tag, pmreg + 4,
526 (reg & ~PCI_PMCSR_STATE_MASK) |
527 PCI_PMCSR_STATE_D0);
528 break;
529 case PCI_PMCSR_STATE_D3:
530 /*
531 * The card has lost all configuration data in
532 * this state, so punt.
533 */
534 printf(": unable to wake up from power state D3, "
535 "reboot required.\n");
536 pci_conf_write(pc, pa->pa_tag, pmreg + 4,
537 (reg & ~PCI_PMCSR_STATE_MASK) |
538 PCI_PMCSR_STATE_D0);
539 return;
540 }
541 }
542
543 /*
544 * Map the device.
545 */
546 ioh_valid = (pci_mapreg_map(pa, TULIP_PCI_IOBA,
547 PCI_MAPREG_TYPE_IO, 0,
548 &iot, &ioh, NULL, NULL) == 0);
549 memh_valid = (pci_mapreg_map(pa, TULIP_PCI_MMBA,
550 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0,
551 &memt, &memh, NULL, NULL) == 0);
552
553 if (memh_valid) {
554 sc->sc_st = memt;
555 sc->sc_sh = memh;
556 } else if (ioh_valid) {
557 sc->sc_st = iot;
558 sc->sc_sh = ioh;
559 } else {
560 printf(": unable to map device registers\n");
561 return;
562 }
563
564 sc->sc_dmat = pa->pa_dmat;
565
566 /*
567 * Make sure bus mastering is enabled.
568 */
569 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
570 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) |
571 PCI_COMMAND_MASTER_ENABLE);
572
573 /*
574 * Get the cacheline size.
575 */
576 sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag,
577 PCI_BHLC_REG));
578
579 /*
580 * Get PCI data moving command info.
581 */
582 if (pa->pa_flags & PCI_FLAGS_MRL_OKAY)
583 sc->sc_flags |= TULIPF_MRL;
584 if (pa->pa_flags & PCI_FLAGS_MRM_OKAY)
585 sc->sc_flags |= TULIPF_MRM;
586 if (pa->pa_flags & PCI_FLAGS_MWI_OKAY)
587 sc->sc_flags |= TULIPF_MWI;
588
589 /*
590 * Read the contents of the Ethernet Address ROM/SROM.
591 */
592 switch (sc->sc_chip) {
593 case TULIP_CHIP_21040:
594 sc->sc_srom_addrbits = 6;
595 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, M_NOWAIT);
596 TULIP_WRITE(sc, CSR_MIIROM, MIIROM_SROMCS);
597 for (i = 0; i < TULIP_ROM_SIZE(6); i++) {
598 for (j = 0; j < 10000; j++) {
599 val = TULIP_READ(sc, CSR_MIIROM);
600 if ((val & MIIROM_DN) == 0)
601 break;
602 }
603 sc->sc_srom[i] = val & MIIROM_DATA;
604 }
605 break;
606
607 case TULIP_CHIP_82C168:
608 case TULIP_CHIP_82C169:
609 {
610 sc->sc_srom_addrbits = 2;
611 sc->sc_srom = malloc(TULIP_ROM_SIZE(2), M_DEVBUF, M_NOWAIT);
612
613 /*
614 * The Lite-On PNIC stores the Ethernet address in
615 * the first 3 words of the EEPROM. EEPROM access
616 * is not like the other Tulip chips.
617 */
618 for (i = 0; i < 6; i += 2) {
619 TULIP_WRITE(sc, CSR_PNIC_SROMCTL,
620 PNIC_SROMCTL_READ | (i >> 1));
621 for (j = 0; j < 500; j++) {
622 delay(2);
623 val = TULIP_READ(sc, CSR_MIIROM);
624 if ((val & PNIC_MIIROM_BUSY) == 0)
625 break;
626 }
627 if (val & PNIC_MIIROM_BUSY) {
628 printf("%s: EEPROM timed out\n",
629 sc->sc_dev.dv_xname);
630 return;
631 }
632 val &= PNIC_MIIROM_DATA;
633 sc->sc_srom[i] = val >> 8;
634 sc->sc_srom[i + 1] = val & 0xff;
635 }
636 break;
637 }
638
639 default:
640 #ifdef algor
641 /*
642 * XXX This should be done with device properties, but
643 * XXX we don't have those yet.
644 */
645 if (algor_get_ethaddr(pa, NULL)) {
646 extern int tlp_srom_debug;
647 sc->sc_srom_addrbits = 6;
648 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF,
649 M_NOWAIT|M_ZERO);
650 algor_get_ethaddr(pa, sc->sc_srom);
651 if (tlp_srom_debug) {
652 printf("SROM CONTENTS:");
653 for (i = 0; i < TULIP_ROM_SIZE(6); i++) {
654 if ((i % 8) == 0)
655 printf("\n\t");
656 printf("0x%02x ", sc->sc_srom[i]);
657 }
658 printf("\n");
659 }
660 break;
661 }
662 #endif /* algor */
663
664 /* Check for a slaved ROM on a multi-port board. */
665 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDROM,
666 TULIP_PCI_SLAVEROM);
667 if (psc->sc_flags & TULIP_PCI_SLAVEROM) {
668 sc->sc_srom_addrbits =
669 psc->sc_master->sc_tulip.sc_srom_addrbits;
670 sc->sc_srom = psc->sc_master->sc_tulip.sc_srom;
671 enaddr[5] +=
672 sc->sc_devno - psc->sc_master->sc_tulip.sc_devno;
673 }
674 else if (tlp_read_srom(sc) == 0)
675 goto cant_cope;
676 break;
677 }
678
679 /*
680 * Deal with chip/board quirks. This includes setting up
681 * the mediasw, and extracting the Ethernet address from
682 * the rombuf.
683 */
684 switch (sc->sc_chip) {
685 case TULIP_CHIP_21040:
686 /*
687 * Parse the Ethernet Address ROM.
688 */
689 if (tlp_parse_old_srom(sc, enaddr) == 0)
690 goto cant_cope;
691
692
693 /*
694 * All 21040 boards start out with the same
695 * media switch.
696 */
697 sc->sc_mediasw = &tlp_21040_mediasw;
698
699 /*
700 * Deal with any quirks this board might have.
701 */
702 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21040_quirks);
703 break;
704
705 case TULIP_CHIP_21041:
706 /* Check for new format SROM. */
707 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) {
708 /*
709 * Not an ISV SROM; try the old DEC Ethernet Address
710 * ROM format.
711 */
712 if (tlp_parse_old_srom(sc, enaddr) == 0)
713 goto cant_cope;
714 }
715
716 /*
717 * All 21041 boards use the same media switch; they all
718 * work basically the same! Yippee!
719 */
720 sc->sc_mediasw = &tlp_21041_mediasw;
721
722 /*
723 * Deal with any quirks this board might have.
724 */
725 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21041_quirks);
726 break;
727
728 case TULIP_CHIP_21140:
729 case TULIP_CHIP_21140A:
730 /* Check for new format SROM. */
731 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) {
732 /*
733 * Not an ISV SROM; try the old DEC Ethernet Address
734 * ROM format.
735 */
736 if (tlp_parse_old_srom(sc, enaddr) == 0)
737 goto cant_cope;
738 } else {
739 /*
740 * We start out with the 2114x ISV media switch.
741 * When we search for quirks, we may change to
742 * a different switch.
743 */
744 sc->sc_mediasw = &tlp_2114x_isv_mediasw;
745 }
746
747 /*
748 * Deal with any quirks this board might have.
749 */
750 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21140_quirks);
751
752 /*
753 * Bail out now if we can't deal with this board.
754 */
755 if (sc->sc_mediasw == NULL)
756 goto cant_cope;
757 break;
758
759 case TULIP_CHIP_21142:
760 case TULIP_CHIP_21143:
761 /* Check for new format SROM. */
762 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) {
763 /*
764 * Not an ISV SROM; try the old DEC Ethernet Address
765 * ROM format.
766 */
767 if (tlp_parse_old_srom(sc, enaddr) == 0) {
768 /*
769 * One last try: just copy the address
770 * from offset 20 and try to look
771 * up quirks.
772 */
773 memcpy(enaddr, &sc->sc_srom[20],
774 ETHER_ADDR_LEN);
775 }
776 } else {
777 /*
778 * We start out with the 2114x ISV media switch.
779 * When we search for quirks, we may change to
780 * a different switch.
781 */
782 sc->sc_mediasw = &tlp_2114x_isv_mediasw;
783 }
784
785 /*
786 * Deal with any quirks this board might have.
787 */
788 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21142_quirks);
789
790 /*
791 * Bail out now if we can't deal with this board.
792 */
793 if (sc->sc_mediasw == NULL)
794 goto cant_cope;
795 break;
796
797 case TULIP_CHIP_82C168:
798 case TULIP_CHIP_82C169:
799 /*
800 * Lite-On PNIC's Ethernet address is the first 6
801 * bytes of its EEPROM.
802 */
803 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN);
804
805 /*
806 * Lite-On PNICs always use the same mediasw; we
807 * select MII vs. internal NWAY automatically.
808 */
809 sc->sc_mediasw = &tlp_pnic_mediasw;
810 break;
811
812 case TULIP_CHIP_MX98713:
813 /*
814 * The Macronix MX98713 has an MII and GPIO, but no
815 * internal Nway block. This chip is basically a
816 * perfect 21140A clone, with the exception of the
817 * a magic register frobbing in order to make the
818 * interface function.
819 */
820 if (tlp_isv_srom_enaddr(sc, enaddr)) {
821 sc->sc_mediasw = &tlp_2114x_isv_mediasw;
822 break;
823 }
824 /* FALLTHROUGH */
825
826 case TULIP_CHIP_82C115:
827 /*
828 * Yippee! The Lite-On 82C115 is a clone of
829 * the MX98725 (the data sheet even says `MXIC'
830 * on it)! Imagine that, a clone of a clone.
831 *
832 * The differences are really minimal:
833 *
834 * - Wake-On-LAN support
835 * - 128-bit multicast hash table, rather than
836 * the standard 512-bit hash table
837 */
838 /* FALLTHROUGH */
839
840 case TULIP_CHIP_MX98713A:
841 case TULIP_CHIP_MX98715A:
842 case TULIP_CHIP_MX98715AEC_X:
843 case TULIP_CHIP_MX98725:
844 /*
845 * The MX98713A has an MII as well as an internal Nway block,
846 * but no GPIO. The MX98715 and MX98725 have an internal
847 * Nway block only.
848 *
849 * The internal Nway block, unlike the Lite-On PNIC's, does
850 * just that - performs Nway. Once autonegotiation completes,
851 * we must program the GPR media information into the chip.
852 *
853 * The byte offset of the Ethernet address is stored at
854 * offset 0x70.
855 */
856 memcpy(enaddr, &sc->sc_srom[sc->sc_srom[0x70]], ETHER_ADDR_LEN);
857 sc->sc_mediasw = &tlp_pmac_mediasw;
858 break;
859
860 case TULIP_CHIP_WB89C840F:
861 /*
862 * Winbond 89C840F's Ethernet address is the first
863 * 6 bytes of its EEPROM.
864 */
865 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN);
866
867 /*
868 * Winbond 89C840F has an MII attached to the SIO.
869 */
870 sc->sc_mediasw = &tlp_sio_mii_mediasw;
871 break;
872
873 case TULIP_CHIP_AL981:
874 /*
875 * The ADMtek AL981's Ethernet address is located
876 * at offset 8 of its EEPROM.
877 */
878 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN);
879
880 /*
881 * ADMtek AL981 has a built-in PHY accessed through
882 * special registers.
883 */
884 sc->sc_mediasw = &tlp_al981_mediasw;
885 break;
886
887 case TULIP_CHIP_AN983:
888 case TULIP_CHIP_AN985:
889 /*
890 * The ADMtek AN985's Ethernet address is located
891 * at offset 8 of its EEPROM.
892 */
893 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN);
894
895 /*
896 * The ADMtek AN985 can be configured in Single-Chip
897 * mode or MAC-only mode. Single-Chip uses the built-in
898 * PHY, MAC-only has an external PHY (usually HomePNA).
899 * The selection is based on an EEPROM setting, and both
900 * PHYs are accessed via MII attached to SIO.
901 *
902 * The AN985 "ghosts" the internal PHY onto all
903 * MII addresses, so we have to use a media init
904 * routine that limits the search.
905 * XXX How does this work with MAC-only mode?
906 */
907 sc->sc_mediasw = &tlp_an985_mediasw;
908 break;
909
910 case TULIP_CHIP_DM9102:
911 case TULIP_CHIP_DM9102A:
912 /*
913 * Some boards with the Davicom chip have an ISV
914 * SROM (mostly DM9102A boards -- trying to describe
915 * the HomePNA PHY, probably) although the data in
916 * them is generally wrong. Check for ISV format
917 * and grab the Ethernet address that way, and if
918 * that fails, fall back on grabbing it from an
919 * observed offset of 20 (which is where it would
920 * be in an ISV SROM anyhow, tho ISV can cope with
921 * multi-port boards).
922 */
923 if (!tlp_isv_srom_enaddr(sc, enaddr)) {
924 #ifdef __sparc__
925 if (!sc->sc_srom[20] && !sc->sc_srom[21] &&
926 !sc->sc_srom[22]) {
927 extern void myetheraddr __P((u_char *));
928 myetheraddr(enaddr);
929 } else
930 #endif
931 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN);
932 }
933
934 /*
935 * Davicom chips all have an internal MII interface
936 * and a built-in PHY. DM9102A also has a an external
937 * MII interface, usually with a HomePNA PHY attached
938 * to it.
939 */
940 sc->sc_mediasw = &tlp_dm9102_mediasw;
941 break;
942
943 default:
944 cant_cope:
945 printf("%s: sorry, unable to handle your board\n",
946 sc->sc_dev.dv_xname);
947 return;
948 }
949
950 /*
951 * Handle shared interrupts.
952 */
953 if (psc->sc_flags & TULIP_PCI_SHAREDINTR) {
954 if (psc->sc_master)
955 psc->sc_flags |= TULIP_PCI_SLAVEINTR;
956 else {
957 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDINTR,
958 TULIP_PCI_SLAVEINTR);
959 if (psc->sc_master == NULL)
960 psc->sc_master = psc;
961 }
962 LIST_INSERT_HEAD(&psc->sc_master->sc_intrslaves,
963 psc, sc_intrq);
964 }
965
966 if (psc->sc_flags & TULIP_PCI_SLAVEINTR) {
967 printf("%s: sharing interrupt with %s\n",
968 sc->sc_dev.dv_xname,
969 psc->sc_master->sc_tulip.sc_dev.dv_xname);
970 } else {
971 /*
972 * Map and establish our interrupt.
973 */
974 if (pci_intr_map(pa, &ih)) {
975 printf("%s: unable to map interrupt\n",
976 sc->sc_dev.dv_xname);
977 return;
978 }
979 intrstr = pci_intr_string(pc, ih);
980 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET,
981 (psc->sc_flags & TULIP_PCI_SHAREDINTR) ?
982 tlp_pci_shared_intr : tlp_intr, sc);
983 if (psc->sc_ih == NULL) {
984 printf("%s: unable to establish interrupt",
985 sc->sc_dev.dv_xname);
986 if (intrstr != NULL)
987 printf(" at %s", intrstr);
988 printf("\n");
989 return;
990 }
991 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname,
992 intrstr);
993 }
994
995 /*
996 * Finish off the attach.
997 */
998 tlp_attach(sc, enaddr);
999 }
1000
1001 int
1002 tlp_pci_shared_intr(arg)
1003 void *arg;
1004 {
1005 struct tulip_pci_softc *master = arg, *slave;
1006 int rv = 0;
1007
1008 for (slave = LIST_FIRST(&master->sc_intrslaves);
1009 slave != NULL;
1010 slave = LIST_NEXT(slave, sc_intrq))
1011 rv |= tlp_intr(&slave->sc_tulip);
1012
1013 return (rv);
1014 }
1015
1016 void
1017 tlp_pci_dec_quirks(psc, enaddr)
1018 struct tulip_pci_softc *psc;
1019 const u_int8_t *enaddr;
1020 {
1021 struct tulip_softc *sc = &psc->sc_tulip;
1022
1023 /*
1024 * This isn't really a quirk-gathering device, really. We
1025 * just want to get the spiffy DEC board name from the SROM.
1026 */
1027 strcpy(sc->sc_name, "DEC ");
1028
1029 if (memcmp(&sc->sc_srom[29], "DE500", 5) == 0 ||
1030 memcmp(&sc->sc_srom[29], "DE450", 5) == 0)
1031 memcpy(&sc->sc_name[4], &sc->sc_srom[29], 8);
1032 }
1033
1034 void
1035 tlp_pci_znyx_21040_quirks(psc, enaddr)
1036 struct tulip_pci_softc *psc;
1037 const u_int8_t *enaddr;
1038 {
1039 struct tulip_softc *sc = &psc->sc_tulip;
1040 u_int16_t id = 0;
1041
1042 /*
1043 * If we have a slaved ROM, just copy the bits from the master.
1044 * This is in case we fail the ROM ID check (older boards) and
1045 * need to fall back on Ethernet address model checking; that
1046 * will fail for slave chips.
1047 */
1048 if (psc->sc_flags & TULIP_PCI_SLAVEROM) {
1049 strcpy(sc->sc_name, psc->sc_master->sc_tulip.sc_name);
1050 sc->sc_mediasw = psc->sc_master->sc_tulip.sc_mediasw;
1051 psc->sc_flags |=
1052 psc->sc_master->sc_flags & TULIP_PCI_SHAREDINTR;
1053 return;
1054 }
1055
1056 if (sc->sc_srom[32] == 0x4a && sc->sc_srom[33] == 0x52) {
1057 id = sc->sc_srom[37] | (sc->sc_srom[36] << 8);
1058 switch (id) {
1059 zx312:
1060 case 0x0602: /* ZX312 */
1061 strcpy(sc->sc_name, "ZNYX ZX312");
1062 return;
1063
1064 case 0x0622: /* ZX312T */
1065 strcpy(sc->sc_name, "ZNYX ZX312T");
1066 sc->sc_mediasw = &tlp_21040_tp_mediasw;
1067 return;
1068
1069 zx314_inta:
1070 case 0x0701: /* ZX314 INTA */
1071 psc->sc_flags |= TULIP_PCI_SHAREDINTR;
1072 /* FALLTHROUGH */
1073 case 0x0711: /* ZX314 */
1074 strcpy(sc->sc_name, "ZNYX ZX314");
1075 psc->sc_flags |= TULIP_PCI_SHAREDROM;
1076 sc->sc_mediasw = &tlp_21040_tp_mediasw;
1077 return;
1078
1079 zx315_inta:
1080 case 0x0801: /* ZX315 INTA */
1081 psc->sc_flags |= TULIP_PCI_SHAREDINTR;
1082 /* FALLTHROUGH */
1083 case 0x0811: /* ZX315 */
1084 strcpy(sc->sc_name, "ZNYX ZX315");
1085 psc->sc_flags |= TULIP_PCI_SHAREDROM;
1086 return;
1087
1088 default:
1089 id = 0;
1090 break;
1091 }
1092 }
1093
1094 /*
1095 * Deal with boards that have broken ROMs.
1096 */
1097 if (id == 0) {
1098 if ((enaddr[3] & ~3) == 0xf0 && (enaddr[5] & 3) == 0x00)
1099 goto zx314_inta;
1100 if ((enaddr[3] & ~3) == 0xf4 && (enaddr[5] & 1) == 0x00)
1101 goto zx315_inta;
1102 if ((enaddr[3] & ~3) == 0xec)
1103 goto zx312;
1104 }
1105
1106 strcpy(sc->sc_name, "ZNYX ZX31x");
1107 }
1108
1109 void
1110 tlp_pci_smc_21040_quirks(psc, enaddr)
1111 struct tulip_pci_softc *psc;
1112 const u_int8_t *enaddr;
1113 {
1114 struct tulip_softc *sc = &psc->sc_tulip;
1115 u_int16_t id1, id2, ei;
1116 int auibnc = 0, utp = 0;
1117 char *cp;
1118
1119 id1 = sc->sc_srom[0x60] | (sc->sc_srom[0x61] << 8);
1120 id2 = sc->sc_srom[0x62] | (sc->sc_srom[0x63] << 8);
1121 ei = sc->sc_srom[0x66] | (sc->sc_srom[0x67] << 8);
1122
1123 strcpy(sc->sc_name, "SMC 8432");
1124 cp = &sc->sc_name[8];
1125
1126 if ((id1 & 1) == 0) {
1127 *cp++ = 'B';
1128 auibnc = 1;
1129 }
1130 if ((id1 & 0xff) > 0x32) {
1131 *cp++ = 'T';
1132 utp = 1;
1133 }
1134 if ((id1 & 0x4000) == 0) {
1135 *cp++ = 'A';
1136 auibnc = 1;
1137 }
1138 if (id2 == 0x15) {
1139 sc->sc_name[7] = '4';
1140 *cp++ = '-';
1141 *cp++ = 'C';
1142 *cp++ = 'H';
1143 *cp++ = ei ? '2' : '1';
1144 }
1145 *cp = '\0';
1146
1147 if (utp != 0 && auibnc == 0)
1148 sc->sc_mediasw = &tlp_21040_tp_mediasw;
1149 else if (utp == 0 && auibnc != 0)
1150 sc->sc_mediasw = &tlp_21040_auibnc_mediasw;
1151 }
1152
1153 void
1154 tlp_pci_cogent_21040_quirks(psc, enaddr)
1155 struct tulip_pci_softc *psc;
1156 const u_int8_t *enaddr;
1157 {
1158
1159 strcpy(psc->sc_tulip.sc_name, "Cogent multi-port");
1160 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM;
1161 }
1162
1163 void
1164 tlp_pci_accton_21040_quirks(psc, enaddr)
1165 struct tulip_pci_softc *psc;
1166 const u_int8_t *enaddr;
1167 {
1168
1169 strcpy(psc->sc_tulip.sc_name, "ACCTON EN1203");
1170 }
1171
1172 void tlp_pci_asante_21140_reset __P((struct tulip_softc *));
1173
1174 void
1175 tlp_pci_asante_21140_quirks(psc, enaddr)
1176 struct tulip_pci_softc *psc;
1177 const u_int8_t *enaddr;
1178 {
1179 struct tulip_softc *sc = &psc->sc_tulip;
1180
1181 /*
1182 * Some Asante boards don't use the ISV SROM format. For
1183 * those that don't, we initialize the GPIO direction bits,
1184 * and provide our own reset hook, which resets the MII.
1185 *
1186 * All of these boards use SIO-attached-MII media.
1187 */
1188 if (sc->sc_mediasw == &tlp_2114x_isv_mediasw)
1189 return;
1190
1191 strcpy(sc->sc_name, "Asante");
1192
1193 sc->sc_gp_dir = 0xbf;
1194 sc->sc_reset = tlp_pci_asante_21140_reset;
1195 sc->sc_mediasw = &tlp_sio_mii_mediasw;
1196 }
1197
1198 void
1199 tlp_pci_asante_21140_reset(sc)
1200 struct tulip_softc *sc;
1201 {
1202
1203 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir);
1204 TULIP_WRITE(sc, CSR_GPP, 0x8);
1205 delay(100);
1206 TULIP_WRITE(sc, CSR_GPP, 0);
1207 }
1208
1209 /*
1210 * SMC 9332DST media switch.
1211 */
1212 void tlp_smc9332dst_tmsw_init __P((struct tulip_softc *));
1213
1214 const struct tulip_mediasw tlp_smc9332dst_mediasw = {
1215 tlp_smc9332dst_tmsw_init,
1216 tlp_21140_gpio_get,
1217 tlp_21140_gpio_set
1218 };
1219
1220 void
1221 tlp_pci_smc_21140_quirks(psc, enaddr)
1222 struct tulip_pci_softc *psc;
1223 const u_int8_t *enaddr;
1224 {
1225 struct tulip_softc *sc = &psc->sc_tulip;
1226
1227 if (sc->sc_mediasw != NULL) {
1228 return;
1229 }
1230 strcpy(psc->sc_tulip.sc_name, "SMC 9332DST");
1231 sc->sc_mediasw = &tlp_smc9332dst_mediasw;
1232 }
1233
1234 void
1235 tlp_smc9332dst_tmsw_init(sc)
1236 struct tulip_softc *sc;
1237 {
1238 struct tulip_21x4x_media *tm;
1239 const char *sep = "";
1240 uint32_t reg;
1241 int i, cnt;
1242
1243 sc->sc_gp_dir = GPP_SMC9332DST_PINS;
1244 sc->sc_opmode = OPMODE_MBO | OPMODE_PS;
1245 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
1246
1247 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange,
1248 tlp_mediastatus);
1249 printf("%s: ", sc->sc_dev.dv_xname);
1250
1251 #define ADD(m, c) \
1252 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK|M_ZERO); \
1253 tm->tm_opmode = (c); \
1254 tm->tm_gpdata = GPP_SMC9332DST_INIT; \
1255 ifmedia_add(&sc->sc_mii.mii_media, (m), 0, tm)
1256 #define PRINT(str) printf("%s%s", sep, str); sep = ", "
1257
1258 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0), OPMODE_TTM);
1259 PRINT("10baseT");
1260
1261 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, 0),
1262 OPMODE_TTM | OPMODE_FD);
1263 PRINT("10baseT-FDX");
1264
1265 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0),
1266 OPMODE_PS | OPMODE_PCS | OPMODE_SCR);
1267 PRINT("100baseTX");
1268
1269 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, 0),
1270 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD);
1271 PRINT("100baseTX-FDX");
1272
1273 #undef ADD
1274 #undef PRINT
1275
1276 printf("\n");
1277
1278 tlp_reset(sc);
1279 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode | OPMODE_PCS | OPMODE_SCR);
1280 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir);
1281 delay(10);
1282 TULIP_WRITE(sc, CSR_GPP, GPP_SMC9332DST_INIT);
1283 delay(200000);
1284 cnt = 0;
1285 for (i = 1000; i > 0; i--) {
1286 reg = TULIP_READ(sc, CSR_GPP);
1287 if ((~reg & (GPP_SMC9332DST_OK10 |
1288 GPP_SMC9332DST_OK100)) == 0) {
1289 if (cnt++ > 100) {
1290 break;
1291 }
1292 } else if ((reg & GPP_SMC9332DST_OK10) == 0) {
1293 break;
1294 } else {
1295 cnt = 0;
1296 }
1297 delay(1000);
1298 }
1299 if (cnt > 100) {
1300 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX);
1301 } else {
1302 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T);
1303 }
1304 }
1305
1306 void tlp_pci_cobalt_21142_reset __P((struct tulip_softc *));
1307
1308 void
1309 tlp_pci_cobalt_21142_quirks(psc, enaddr)
1310 struct tulip_pci_softc *psc;
1311 const u_int8_t *enaddr;
1312 {
1313 struct tulip_softc *sc = &psc->sc_tulip;
1314
1315 /*
1316 * Cobalt Networks interfaces are just MII-on-SIO.
1317 */
1318 sc->sc_reset = tlp_pci_cobalt_21142_reset;
1319 sc->sc_mediasw = &tlp_sio_mii_mediasw;
1320
1321 /*
1322 * The Cobalt systems tend to fall back to store-and-forward
1323 * pretty quickly, so we select that from the beginning to
1324 * avoid initial timeouts.
1325 */
1326 sc->sc_txthresh = TXTH_SF;
1327 }
1328
1329 void
1330 tlp_pci_cobalt_21142_reset(sc)
1331 struct tulip_softc *sc;
1332 {
1333 /*
1334 * Reset PHY.
1335 */
1336 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE | (1 << 16));
1337 delay(10);
1338 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE);
1339 delay(10);
1340 }
1341
1342 void
1343 tlp_pci_algor_21142_quirks(psc, enaddr)
1344 struct tulip_pci_softc *psc;
1345 const u_int8_t *enaddr;
1346 {
1347 struct tulip_softc *sc = &psc->sc_tulip;
1348
1349 /*
1350 * Algorithmics boards just have MII-on-SIO.
1351 *
1352 * XXX They also have AUI on the serial interface.
1353 * XXX Deal with this.
1354 */
1355 sc->sc_mediasw = &tlp_sio_mii_mediasw;
1356 }
1357
1358 /*
1359 * Cogent EM1x0 (aka. Adaptec ANA-6910) media switch.
1360 */
1361 void tlp_cogent_em1x0_tmsw_init __P((struct tulip_softc *));
1362
1363 const struct tulip_mediasw tlp_cogent_em1x0_mediasw = {
1364 tlp_cogent_em1x0_tmsw_init,
1365 tlp_21140_gpio_get,
1366 tlp_21140_gpio_set
1367 };
1368
1369 void
1370 tlp_pci_adaptec_quirks(psc, enaddr)
1371 struct tulip_pci_softc *psc;
1372 const u_int8_t *enaddr;
1373 {
1374 struct tulip_softc *sc = &psc->sc_tulip;
1375 uint8_t *srom = sc->sc_srom, id0;
1376 uint16_t id1, id2;
1377
1378 if (sc->sc_mediasw == NULL) {
1379 id0 = srom[32];
1380 switch (id0) {
1381 case 0x12:
1382 strcpy(psc->sc_tulip.sc_name, "Cogent EM100TX");
1383 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw;
1384 break;
1385
1386 case 0x15:
1387 strcpy(psc->sc_tulip.sc_name, "Cogent EM100FX");
1388 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw;
1389 break;
1390
1391 #if 0
1392 case XXX:
1393 strcpy(psc->sc_tulip.sc_name, "Cogent EM110TX");
1394 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw;
1395 break;
1396 #endif
1397
1398 default:
1399 printf("%s: unknown Cogent board ID 0x%02x\n",
1400 sc->sc_dev.dv_xname, id0);
1401 }
1402 return;
1403 }
1404
1405 id1 = TULIP_ROM_GETW(srom, 0);
1406 id2 = TULIP_ROM_GETW(srom, 2);
1407 if (id1 != 0x1109) {
1408 goto unknown;
1409 }
1410
1411 switch (id2) {
1412 case 0x1900:
1413 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911");
1414 break;
1415
1416 case 0x2400:
1417 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6944A");
1418 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM;
1419 break;
1420
1421 case 0x2b00:
1422 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911A");
1423 break;
1424
1425 case 0x3000:
1426 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6922");
1427 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM;
1428 break;
1429
1430 default:
1431 unknown:
1432 printf("%s: unknown Adaptec/Cogent board ID 0x%04x/0x%04x\n",
1433 sc->sc_dev.dv_xname, id1, id2);
1434 }
1435 }
1436
1437 void
1438 tlp_cogent_em1x0_tmsw_init(sc)
1439 struct tulip_softc *sc;
1440 {
1441 struct tulip_21x4x_media *tm;
1442 const char *sep = "";
1443
1444 sc->sc_gp_dir = GPP_COGENT_EM1x0_PINS;
1445 sc->sc_opmode = OPMODE_MBO | OPMODE_PS;
1446 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode);
1447
1448 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange,
1449 tlp_mediastatus);
1450 printf("%s: ", sc->sc_dev.dv_xname);
1451
1452 #define ADD(m, c) \
1453 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK|M_ZERO); \
1454 tm->tm_opmode = (c); \
1455 tm->tm_gpdata = GPP_COGENT_EM1x0_INIT; \
1456 ifmedia_add(&sc->sc_mii.mii_media, (m), 0, tm)
1457 #define PRINT(str) printf("%s%s", sep, str); sep = ", "
1458
1459 if (sc->sc_srom[32] == 0x15) {
1460 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, 0, 0),
1461 OPMODE_PS | OPMODE_PCS);
1462 PRINT("100baseFX");
1463
1464 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0),
1465 OPMODE_PS | OPMODE_PCS | OPMODE_FD);
1466 PRINT("100baseFX-FDX");
1467 printf("\n");
1468
1469 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_FX);
1470 } else {
1471 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0),
1472 OPMODE_PS | OPMODE_PCS | OPMODE_SCR);
1473 PRINT("100baseTX");
1474
1475 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0),
1476 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD);
1477 PRINT("100baseTX-FDX");
1478 printf("\n");
1479
1480 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX);
1481 }
1482
1483 #undef ADD
1484 #undef PRINT
1485 }
1486
1487 void tlp_pci_netwinder_21142_reset(struct tulip_softc *);
1488
1489 void
1490 tlp_pci_netwinder_21142_quirks(psc, enaddr)
1491 struct tulip_pci_softc *psc;
1492 const u_int8_t *enaddr;
1493 {
1494 struct tulip_softc *sc = &psc->sc_tulip;
1495
1496 /*
1497 * Netwinders just use MII-on_SIO.
1498 */
1499 sc->sc_mediasw = &tlp_sio_mii_mediasw;
1500 sc->sc_reset = tlp_pci_netwinder_21142_reset;
1501 }
1502
1503 void
1504 tlp_pci_netwinder_21142_reset(sc)
1505 struct tulip_softc *sc;
1506 {
1507
1508 /*
1509 * Reset the PHY.
1510 */
1511 TULIP_WRITE(sc, CSR_SIAGEN, 0x0821 << 16);
1512 delay(10);
1513 TULIP_WRITE(sc, CSR_SIAGEN, 0x0000 << 16);
1514 delay(10);
1515 TULIP_WRITE(sc, CSR_SIAGEN, 0x0001 << 16);
1516 delay(10);
1517 }
1518