if_tlp_pci.c revision 1.67
1 /* $NetBSD: if_tlp_pci.c,v 1.67 2002/09/30 20:37:41 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center; and Charles M. Hannum. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * PCI bus front-end for the Digital Semiconductor ``Tulip'' (21x4x) 42 * Ethernet controller family driver. 43 */ 44 45 #include <sys/cdefs.h> 46 __KERNEL_RCSID(0, "$NetBSD: if_tlp_pci.c,v 1.67 2002/09/30 20:37:41 thorpej Exp $"); 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/mbuf.h> 51 #include <sys/malloc.h> 52 #include <sys/kernel.h> 53 #include <sys/socket.h> 54 #include <sys/ioctl.h> 55 #include <sys/errno.h> 56 #include <sys/device.h> 57 58 #include <machine/endian.h> 59 60 #include <net/if.h> 61 #include <net/if_dl.h> 62 #include <net/if_media.h> 63 #include <net/if_ether.h> 64 65 #include <machine/bus.h> 66 #include <machine/intr.h> 67 68 #include <dev/mii/miivar.h> 69 #include <dev/mii/mii_bitbang.h> 70 71 #include <dev/ic/tulipreg.h> 72 #include <dev/ic/tulipvar.h> 73 74 #include <dev/pci/pcivar.h> 75 #include <dev/pci/pcireg.h> 76 #include <dev/pci/pcidevs.h> 77 78 /* 79 * PCI configuration space registers used by the Tulip. 80 */ 81 #define TULIP_PCI_IOBA 0x10 /* i/o mapped base */ 82 #define TULIP_PCI_MMBA 0x14 /* memory mapped base */ 83 #define TULIP_PCI_CFDA 0x40 /* configuration driver area */ 84 85 #define CFDA_SLEEP 0x80000000 /* sleep mode */ 86 #define CFDA_SNOOZE 0x40000000 /* snooze mode */ 87 88 struct tulip_pci_softc { 89 struct tulip_softc sc_tulip; /* real Tulip softc */ 90 91 /* PCI-specific goo. */ 92 void *sc_ih; /* interrupt handle */ 93 94 pci_chipset_tag_t sc_pc; /* our PCI chipset */ 95 pcitag_t sc_pcitag; /* our PCI tag */ 96 97 int sc_flags; /* flags; see below */ 98 99 LIST_HEAD(, tulip_pci_softc) sc_intrslaves; 100 LIST_ENTRY(tulip_pci_softc) sc_intrq; 101 102 /* Our {ROM,interrupt} master. */ 103 struct tulip_pci_softc *sc_master; 104 }; 105 106 /* sc_flags */ 107 #define TULIP_PCI_SHAREDINTR 0x01 /* interrupt is shared */ 108 #define TULIP_PCI_SLAVEINTR 0x02 /* interrupt is slave */ 109 #define TULIP_PCI_SHAREDROM 0x04 /* ROM is shared */ 110 #define TULIP_PCI_SLAVEROM 0x08 /* slave of shared ROM */ 111 112 int tlp_pci_match __P((struct device *, struct cfdata *, void *)); 113 void tlp_pci_attach __P((struct device *, struct device *, void *)); 114 115 CFATTACH_DECL(tlp_pci, sizeof(struct tulip_pci_softc), 116 tlp_pci_match, tlp_pci_attach, NULL, NULL) 117 118 const struct tulip_pci_product { 119 u_int32_t tpp_vendor; /* PCI vendor ID */ 120 u_int32_t tpp_product; /* PCI product ID */ 121 tulip_chip_t tpp_chip; /* base Tulip chip type */ 122 } tlp_pci_products[] = { 123 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21040, 124 TULIP_CHIP_21040 }, 125 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21041, 126 TULIP_CHIP_21041 }, 127 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21140, 128 TULIP_CHIP_21140 }, 129 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142, 130 TULIP_CHIP_21142 }, 131 132 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C168, 133 TULIP_CHIP_82C168 }, 134 135 /* 136 * Note: This is like a MX98725 with Wake-On-LAN and a 137 * 128-bit multicast hash table. 138 */ 139 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C115, 140 TULIP_CHIP_82C115 }, 141 142 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98713, 143 TULIP_CHIP_MX98713 }, 144 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX987x5, 145 TULIP_CHIP_MX98715 }, 146 147 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100TX, 148 TULIP_CHIP_MX98713 }, 149 150 { PCI_VENDOR_WINBOND, PCI_PRODUCT_WINBOND_W89C840F, 151 TULIP_CHIP_WB89C840F }, 152 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100ATX, 153 TULIP_CHIP_WB89C840F }, 154 155 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9102, 156 TULIP_CHIP_DM9102 }, 157 158 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AL981, 159 TULIP_CHIP_AL981 }, 160 161 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN985, 162 TULIP_CHIP_AN985 }, 163 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN2242, 164 TULIP_CHIP_AN985 }, 165 166 #if 0 167 { PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX88140A, 168 TULIP_CHIP_AX88140 }, 169 #endif 170 171 { 0, 0, 172 TULIP_CHIP_INVALID }, 173 }; 174 175 struct tlp_pci_quirks { 176 void (*tpq_func) __P((struct tulip_pci_softc *, 177 const u_int8_t *)); 178 u_int8_t tpq_oui[3]; 179 }; 180 181 void tlp_pci_dec_quirks __P((struct tulip_pci_softc *, 182 const u_int8_t *)); 183 184 void tlp_pci_znyx_21040_quirks __P((struct tulip_pci_softc *, 185 const u_int8_t *)); 186 void tlp_pci_smc_21040_quirks __P((struct tulip_pci_softc *, 187 const u_int8_t *)); 188 void tlp_pci_cogent_21040_quirks __P((struct tulip_pci_softc *, 189 const u_int8_t *)); 190 void tlp_pci_accton_21040_quirks __P((struct tulip_pci_softc *, 191 const u_int8_t *)); 192 193 void tlp_pci_cobalt_21142_quirks __P((struct tulip_pci_softc *, 194 const u_int8_t *)); 195 void tlp_pci_algor_21142_quirks __P((struct tulip_pci_softc *, 196 const u_int8_t *)); 197 void tlp_pci_netwinder_21142_quirks __P((struct tulip_pci_softc *, 198 const u_int8_t *)); 199 200 void tlp_pci_adaptec_quirks __P((struct tulip_pci_softc *, 201 const u_int8_t *)); 202 203 const struct tlp_pci_quirks tlp_pci_21040_quirks[] = { 204 { tlp_pci_znyx_21040_quirks, { 0x00, 0xc0, 0x95 } }, 205 { tlp_pci_smc_21040_quirks, { 0x00, 0x00, 0xc0 } }, 206 { tlp_pci_cogent_21040_quirks, { 0x00, 0x00, 0x92 } }, 207 { tlp_pci_accton_21040_quirks, { 0x00, 0x00, 0xe8 } }, 208 { NULL, { 0, 0, 0 } } 209 }; 210 211 const struct tlp_pci_quirks tlp_pci_21041_quirks[] = { 212 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 213 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 214 { NULL, { 0, 0, 0 } } 215 }; 216 217 void tlp_pci_asante_21140_quirks __P((struct tulip_pci_softc *, 218 const u_int8_t *)); 219 void tlp_pci_smc_21140_quirks __P((struct tulip_pci_softc *, 220 const u_int8_t *)); 221 222 const struct tlp_pci_quirks tlp_pci_21140_quirks[] = { 223 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 224 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 225 { tlp_pci_asante_21140_quirks, { 0x00, 0x00, 0x94 } }, 226 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0x92 } }, 227 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } }, 228 { tlp_pci_smc_21140_quirks, { 0x00, 0x00, 0xc0 } }, 229 { NULL, { 0, 0, 0 } } 230 }; 231 232 const struct tlp_pci_quirks tlp_pci_21142_quirks[] = { 233 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 234 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 235 { tlp_pci_cobalt_21142_quirks, { 0x00, 0x10, 0xe0 } }, 236 { tlp_pci_algor_21142_quirks, { 0x00, 0x40, 0xbc } }, 237 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } }, 238 { tlp_pci_netwinder_21142_quirks,{ 0x00, 0x10, 0x57 } }, 239 { NULL, { 0, 0, 0 } } 240 }; 241 242 int tlp_pci_shared_intr __P((void *)); 243 244 const struct tulip_pci_product *tlp_pci_lookup 245 __P((const struct pci_attach_args *)); 246 void tlp_pci_get_quirks __P((struct tulip_pci_softc *, const u_int8_t *, 247 const struct tlp_pci_quirks *)); 248 void tlp_pci_check_slaved __P((struct tulip_pci_softc *, int, int)); 249 250 const struct tulip_pci_product * 251 tlp_pci_lookup(pa) 252 const struct pci_attach_args *pa; 253 { 254 const struct tulip_pci_product *tpp; 255 256 for (tpp = tlp_pci_products; 257 tlp_chip_names[tpp->tpp_chip] != NULL; 258 tpp++) { 259 if (PCI_VENDOR(pa->pa_id) == tpp->tpp_vendor && 260 PCI_PRODUCT(pa->pa_id) == tpp->tpp_product) 261 return (tpp); 262 } 263 return (NULL); 264 } 265 266 void 267 tlp_pci_get_quirks(psc, enaddr, tpq) 268 struct tulip_pci_softc *psc; 269 const u_int8_t *enaddr; 270 const struct tlp_pci_quirks *tpq; 271 { 272 273 for (; tpq->tpq_func != NULL; tpq++) { 274 if (tpq->tpq_oui[0] == enaddr[0] && 275 tpq->tpq_oui[1] == enaddr[1] && 276 tpq->tpq_oui[2] == enaddr[2]) { 277 (*tpq->tpq_func)(psc, enaddr); 278 return; 279 } 280 } 281 } 282 283 void 284 tlp_pci_check_slaved(psc, shared, slaved) 285 struct tulip_pci_softc *psc; 286 int shared, slaved; 287 { 288 extern struct cfdriver tlp_cd; 289 struct tulip_pci_softc *cur, *best = NULL; 290 struct tulip_softc *sc = &psc->sc_tulip; 291 int i; 292 293 /* 294 * First of all, find the lowest pcidev numbered device on our 295 * bus marked as shared. That should be our master. 296 */ 297 for (i = 0; i < tlp_cd.cd_ndevs; i++) { 298 if ((cur = tlp_cd.cd_devs[i]) == NULL) 299 continue; 300 if (cur->sc_tulip.sc_dev.dv_parent != sc->sc_dev.dv_parent) 301 continue; 302 if ((cur->sc_flags & shared) == 0) 303 continue; 304 if (cur == psc) 305 continue; 306 if (best == NULL || 307 best->sc_tulip.sc_devno > cur->sc_tulip.sc_devno) 308 best = cur; 309 } 310 311 if (best != NULL) { 312 psc->sc_master = best; 313 psc->sc_flags |= (shared | slaved); 314 } 315 } 316 317 int 318 tlp_pci_match(parent, match, aux) 319 struct device *parent; 320 struct cfdata *match; 321 void *aux; 322 { 323 struct pci_attach_args *pa = aux; 324 325 if (tlp_pci_lookup(pa) != NULL) 326 return (10); /* beat if_de.c */ 327 328 return (0); 329 } 330 331 void 332 tlp_pci_attach(parent, self, aux) 333 struct device *parent, *self; 334 void *aux; 335 { 336 struct tulip_pci_softc *psc = (void *) self; 337 struct tulip_softc *sc = &psc->sc_tulip; 338 struct pci_attach_args *pa = aux; 339 pci_chipset_tag_t pc = pa->pa_pc; 340 pci_intr_handle_t ih; 341 const char *intrstr = NULL; 342 bus_space_tag_t iot, memt; 343 bus_space_handle_t ioh, memh; 344 int ioh_valid, memh_valid, i, j; 345 const struct tulip_pci_product *tpp; 346 u_int8_t enaddr[ETHER_ADDR_LEN]; 347 u_int32_t val; 348 pcireg_t reg; 349 int pmreg; 350 351 sc->sc_devno = pa->pa_device; 352 psc->sc_pc = pa->pa_pc; 353 psc->sc_pcitag = pa->pa_tag; 354 355 LIST_INIT(&psc->sc_intrslaves); 356 357 tpp = tlp_pci_lookup(pa); 358 if (tpp == NULL) { 359 printf("\n"); 360 panic("tlp_pci_attach: impossible"); 361 } 362 sc->sc_chip = tpp->tpp_chip; 363 364 /* 365 * By default, Tulip registers are 8 bytes long (4 bytes 366 * followed by a 4 byte pad). 367 */ 368 sc->sc_regshift = 3; 369 370 /* 371 * No power management hooks. 372 * XXX Maybe we should add some! 373 */ 374 sc->sc_flags |= TULIPF_ENABLED; 375 376 /* 377 * Get revision info, and set some chip-specific variables. 378 */ 379 sc->sc_rev = PCI_REVISION(pa->pa_class); 380 switch (sc->sc_chip) { 381 case TULIP_CHIP_21140: 382 if (sc->sc_rev >= 0x20) 383 sc->sc_chip = TULIP_CHIP_21140A; 384 break; 385 386 case TULIP_CHIP_21142: 387 if (sc->sc_rev >= 0x20) 388 sc->sc_chip = TULIP_CHIP_21143; 389 break; 390 391 case TULIP_CHIP_82C168: 392 if (sc->sc_rev >= 0x20) 393 sc->sc_chip = TULIP_CHIP_82C169; 394 break; 395 396 case TULIP_CHIP_MX98713: 397 if (sc->sc_rev >= 0x10) 398 sc->sc_chip = TULIP_CHIP_MX98713A; 399 break; 400 401 case TULIP_CHIP_MX98715: 402 if (sc->sc_rev >= 0x20) 403 sc->sc_chip = TULIP_CHIP_MX98715A; 404 if (sc->sc_rev >= 0x25) 405 sc->sc_chip = TULIP_CHIP_MX98715AEC_X; 406 if (sc->sc_rev >= 0x30) 407 sc->sc_chip = TULIP_CHIP_MX98725; 408 break; 409 410 case TULIP_CHIP_WB89C840F: 411 sc->sc_regshift = 2; 412 break; 413 414 case TULIP_CHIP_AN985: 415 /* 416 * The AN983 and AN985 are very similar, and are 417 * differentiated by a "signature" register that 418 * is like, but not identical, to a PCI ID register. 419 */ 420 reg = pci_conf_read(pc, pa->pa_tag, 0x80); 421 switch (reg) { 422 case 0x09811317: 423 sc->sc_chip = TULIP_CHIP_AN985; 424 break; 425 426 case 0x09851317: 427 sc->sc_chip = TULIP_CHIP_AN983; 428 break; 429 430 default: 431 /* Unknown -- use default. */ 432 break; 433 } 434 break; 435 436 case TULIP_CHIP_AX88140: 437 if (sc->sc_rev >= 0x10) 438 sc->sc_chip = TULIP_CHIP_AX88141; 439 break; 440 441 case TULIP_CHIP_DM9102: 442 if (sc->sc_rev >= 0x30) 443 sc->sc_chip = TULIP_CHIP_DM9102A; 444 break; 445 446 default: 447 /* Nothing. */ 448 break; 449 } 450 451 printf(": %s Ethernet, pass %d.%d\n", 452 tlp_chip_names[sc->sc_chip], 453 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf); 454 455 switch (sc->sc_chip) { 456 case TULIP_CHIP_21040: 457 if (sc->sc_rev < 0x20) { 458 printf("%s: 21040 must be at least pass 2.0\n", 459 sc->sc_dev.dv_xname); 460 return; 461 } 462 break; 463 464 case TULIP_CHIP_21140: 465 if (sc->sc_rev < 0x11) { 466 printf("%s: 21140 must be at least pass 1.1\n", 467 sc->sc_dev.dv_xname); 468 return; 469 } 470 break; 471 472 default: 473 /* Nothing. */ 474 break; 475 } 476 477 /* 478 * Check to see if the device is in power-save mode, and 479 * being it out if necessary. 480 */ 481 switch (sc->sc_chip) { 482 case TULIP_CHIP_21140: 483 case TULIP_CHIP_21140A: 484 case TULIP_CHIP_21142: 485 case TULIP_CHIP_21143: 486 case TULIP_CHIP_MX98713A: 487 case TULIP_CHIP_MX98715: 488 case TULIP_CHIP_MX98715A: 489 case TULIP_CHIP_MX98715AEC_X: 490 case TULIP_CHIP_MX98725: 491 case TULIP_CHIP_DM9102: 492 case TULIP_CHIP_DM9102A: 493 /* 494 * Clear the "sleep mode" bit in the CFDA register. 495 */ 496 reg = pci_conf_read(pc, pa->pa_tag, TULIP_PCI_CFDA); 497 if (reg & (CFDA_SLEEP|CFDA_SNOOZE)) 498 pci_conf_write(pc, pa->pa_tag, TULIP_PCI_CFDA, 499 reg & ~(CFDA_SLEEP|CFDA_SNOOZE)); 500 break; 501 502 default: 503 /* Nothing. */ 504 break; 505 } 506 507 if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PWRMGMT, &pmreg, 0)) { 508 reg = pci_conf_read(pc, pa->pa_tag, pmreg + 4); 509 switch (reg & PCI_PMCSR_STATE_MASK) { 510 case PCI_PMCSR_STATE_D1: 511 case PCI_PMCSR_STATE_D2: 512 printf(": waking up from power state D%d\n%s", 513 reg & PCI_PMCSR_STATE_MASK, sc->sc_dev.dv_xname); 514 pci_conf_write(pc, pa->pa_tag, pmreg + 4, 515 (reg & ~PCI_PMCSR_STATE_MASK) | 516 PCI_PMCSR_STATE_D0); 517 break; 518 case PCI_PMCSR_STATE_D3: 519 /* 520 * The card has lost all configuration data in 521 * this state, so punt. 522 */ 523 printf(": unable to wake up from power state D3, " 524 "reboot required.\n"); 525 pci_conf_write(pc, pa->pa_tag, pmreg + 4, 526 (reg & ~PCI_PMCSR_STATE_MASK) | 527 PCI_PMCSR_STATE_D0); 528 return; 529 } 530 } 531 532 /* 533 * Map the device. 534 */ 535 ioh_valid = (pci_mapreg_map(pa, TULIP_PCI_IOBA, 536 PCI_MAPREG_TYPE_IO, 0, 537 &iot, &ioh, NULL, NULL) == 0); 538 memh_valid = (pci_mapreg_map(pa, TULIP_PCI_MMBA, 539 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 540 &memt, &memh, NULL, NULL) == 0); 541 542 if (memh_valid) { 543 sc->sc_st = memt; 544 sc->sc_sh = memh; 545 } else if (ioh_valid) { 546 sc->sc_st = iot; 547 sc->sc_sh = ioh; 548 } else { 549 printf(": unable to map device registers\n"); 550 return; 551 } 552 553 sc->sc_dmat = pa->pa_dmat; 554 555 /* 556 * Make sure bus mastering is enabled. 557 */ 558 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 559 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 560 PCI_COMMAND_MASTER_ENABLE); 561 562 /* 563 * Get the cacheline size. 564 */ 565 sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag, 566 PCI_BHLC_REG)); 567 568 /* 569 * Get PCI data moving command info. 570 */ 571 if (pa->pa_flags & PCI_FLAGS_MRL_OKAY) 572 sc->sc_flags |= TULIPF_MRL; 573 if (pa->pa_flags & PCI_FLAGS_MRM_OKAY) 574 sc->sc_flags |= TULIPF_MRM; 575 if (pa->pa_flags & PCI_FLAGS_MWI_OKAY) 576 sc->sc_flags |= TULIPF_MWI; 577 578 /* 579 * Read the contents of the Ethernet Address ROM/SROM. 580 */ 581 switch (sc->sc_chip) { 582 case TULIP_CHIP_21040: 583 sc->sc_srom_addrbits = 6; 584 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, M_NOWAIT); 585 TULIP_WRITE(sc, CSR_MIIROM, MIIROM_SROMCS); 586 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 587 for (j = 0; j < 10000; j++) { 588 val = TULIP_READ(sc, CSR_MIIROM); 589 if ((val & MIIROM_DN) == 0) 590 break; 591 } 592 sc->sc_srom[i] = val & MIIROM_DATA; 593 } 594 break; 595 596 case TULIP_CHIP_82C168: 597 case TULIP_CHIP_82C169: 598 { 599 sc->sc_srom_addrbits = 2; 600 sc->sc_srom = malloc(TULIP_ROM_SIZE(2), M_DEVBUF, M_NOWAIT); 601 602 /* 603 * The Lite-On PNIC stores the Ethernet address in 604 * the first 3 words of the EEPROM. EEPROM access 605 * is not like the other Tulip chips. 606 */ 607 for (i = 0; i < 6; i += 2) { 608 TULIP_WRITE(sc, CSR_PNIC_SROMCTL, 609 PNIC_SROMCTL_READ | (i >> 1)); 610 for (j = 0; j < 500; j++) { 611 delay(2); 612 val = TULIP_READ(sc, CSR_MIIROM); 613 if ((val & PNIC_MIIROM_BUSY) == 0) 614 break; 615 } 616 if (val & PNIC_MIIROM_BUSY) { 617 printf("%s: EEPROM timed out\n", 618 sc->sc_dev.dv_xname); 619 return; 620 } 621 val &= PNIC_MIIROM_DATA; 622 sc->sc_srom[i] = val >> 8; 623 sc->sc_srom[i + 1] = val & 0xff; 624 } 625 break; 626 } 627 628 default: 629 #ifdef algor 630 /* 631 * XXX This should be done with device properties, but 632 * XXX we don't have those yet. 633 */ 634 if (algor_get_ethaddr(pa, NULL)) { 635 extern int tlp_srom_debug; 636 sc->sc_srom_addrbits = 6; 637 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, 638 M_NOWAIT|M_ZERO); 639 algor_get_ethaddr(pa, sc->sc_srom); 640 if (tlp_srom_debug) { 641 printf("SROM CONTENTS:"); 642 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 643 if ((i % 8) == 0) 644 printf("\n\t"); 645 printf("0x%02x ", sc->sc_srom[i]); 646 } 647 printf("\n"); 648 } 649 break; 650 } 651 #endif /* algor */ 652 653 /* Check for a slaved ROM on a multi-port board. */ 654 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDROM, 655 TULIP_PCI_SLAVEROM); 656 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 657 sc->sc_srom_addrbits = 658 psc->sc_master->sc_tulip.sc_srom_addrbits; 659 sc->sc_srom = psc->sc_master->sc_tulip.sc_srom; 660 enaddr[5] += 661 sc->sc_devno - psc->sc_master->sc_tulip.sc_devno; 662 } 663 else if (tlp_read_srom(sc) == 0) 664 goto cant_cope; 665 break; 666 } 667 668 /* 669 * Deal with chip/board quirks. This includes setting up 670 * the mediasw, and extracting the Ethernet address from 671 * the rombuf. 672 */ 673 switch (sc->sc_chip) { 674 case TULIP_CHIP_21040: 675 /* 676 * Parse the Ethernet Address ROM. 677 */ 678 if (tlp_parse_old_srom(sc, enaddr) == 0) 679 goto cant_cope; 680 681 682 /* 683 * All 21040 boards start out with the same 684 * media switch. 685 */ 686 sc->sc_mediasw = &tlp_21040_mediasw; 687 688 /* 689 * Deal with any quirks this board might have. 690 */ 691 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21040_quirks); 692 break; 693 694 case TULIP_CHIP_21041: 695 /* Check for new format SROM. */ 696 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 697 /* 698 * Not an ISV SROM; try the old DEC Ethernet Address 699 * ROM format. 700 */ 701 if (tlp_parse_old_srom(sc, enaddr) == 0) 702 goto cant_cope; 703 } 704 705 /* 706 * All 21041 boards use the same media switch; they all 707 * work basically the same! Yippee! 708 */ 709 sc->sc_mediasw = &tlp_21041_mediasw; 710 711 /* 712 * Deal with any quirks this board might have. 713 */ 714 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21041_quirks); 715 break; 716 717 case TULIP_CHIP_21140: 718 case TULIP_CHIP_21140A: 719 /* Check for new format SROM. */ 720 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 721 /* 722 * Not an ISV SROM; try the old DEC Ethernet Address 723 * ROM format. 724 */ 725 if (tlp_parse_old_srom(sc, enaddr) == 0) 726 goto cant_cope; 727 } else { 728 /* 729 * We start out with the 2114x ISV media switch. 730 * When we search for quirks, we may change to 731 * a different switch. 732 */ 733 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 734 } 735 736 /* 737 * Deal with any quirks this board might have. 738 */ 739 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21140_quirks); 740 741 /* 742 * Bail out now if we can't deal with this board. 743 */ 744 if (sc->sc_mediasw == NULL) 745 goto cant_cope; 746 break; 747 748 case TULIP_CHIP_21142: 749 case TULIP_CHIP_21143: 750 /* Check for new format SROM. */ 751 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 752 /* 753 * Not an ISV SROM; try the old DEC Ethernet Address 754 * ROM format. 755 */ 756 if (tlp_parse_old_srom(sc, enaddr) == 0) { 757 /* 758 * One last try: just copy the address 759 * from offset 20 and try to look 760 * up quirks. 761 */ 762 memcpy(enaddr, &sc->sc_srom[20], 763 ETHER_ADDR_LEN); 764 } 765 } else { 766 /* 767 * We start out with the 2114x ISV media switch. 768 * When we search for quirks, we may change to 769 * a different switch. 770 */ 771 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 772 } 773 774 /* 775 * Deal with any quirks this board might have. 776 */ 777 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21142_quirks); 778 779 /* 780 * Bail out now if we can't deal with this board. 781 */ 782 if (sc->sc_mediasw == NULL) 783 goto cant_cope; 784 break; 785 786 case TULIP_CHIP_82C168: 787 case TULIP_CHIP_82C169: 788 /* 789 * Lite-On PNIC's Ethernet address is the first 6 790 * bytes of its EEPROM. 791 */ 792 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 793 794 /* 795 * Lite-On PNICs always use the same mediasw; we 796 * select MII vs. internal NWAY automatically. 797 */ 798 sc->sc_mediasw = &tlp_pnic_mediasw; 799 break; 800 801 case TULIP_CHIP_MX98713: 802 /* 803 * The Macronix MX98713 has an MII and GPIO, but no 804 * internal Nway block. This chip is basically a 805 * perfect 21140A clone, with the exception of the 806 * a magic register frobbing in order to make the 807 * interface function. 808 */ 809 if (tlp_isv_srom_enaddr(sc, enaddr)) { 810 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 811 break; 812 } 813 /* FALLTHROUGH */ 814 815 case TULIP_CHIP_82C115: 816 /* 817 * Yippee! The Lite-On 82C115 is a clone of 818 * the MX98725 (the data sheet even says `MXIC' 819 * on it)! Imagine that, a clone of a clone. 820 * 821 * The differences are really minimal: 822 * 823 * - Wake-On-LAN support 824 * - 128-bit multicast hash table, rather than 825 * the standard 512-bit hash table 826 */ 827 /* FALLTHROUGH */ 828 829 case TULIP_CHIP_MX98713A: 830 case TULIP_CHIP_MX98715A: 831 case TULIP_CHIP_MX98715AEC_X: 832 case TULIP_CHIP_MX98725: 833 /* 834 * The MX98713A has an MII as well as an internal Nway block, 835 * but no GPIO. The MX98715 and MX98725 have an internal 836 * Nway block only. 837 * 838 * The internal Nway block, unlike the Lite-On PNIC's, does 839 * just that - performs Nway. Once autonegotiation completes, 840 * we must program the GPR media information into the chip. 841 * 842 * The byte offset of the Ethernet address is stored at 843 * offset 0x70. 844 */ 845 memcpy(enaddr, &sc->sc_srom[sc->sc_srom[0x70]], ETHER_ADDR_LEN); 846 sc->sc_mediasw = &tlp_pmac_mediasw; 847 break; 848 849 case TULIP_CHIP_WB89C840F: 850 /* 851 * Winbond 89C840F's Ethernet address is the first 852 * 6 bytes of its EEPROM. 853 */ 854 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 855 856 /* 857 * Winbond 89C840F has an MII attached to the SIO. 858 */ 859 sc->sc_mediasw = &tlp_sio_mii_mediasw; 860 break; 861 862 case TULIP_CHIP_AL981: 863 /* 864 * The ADMtek AL981's Ethernet address is located 865 * at offset 8 of its EEPROM. 866 */ 867 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 868 869 /* 870 * ADMtek AL981 has a built-in PHY accessed through 871 * special registers. 872 */ 873 sc->sc_mediasw = &tlp_al981_mediasw; 874 break; 875 876 case TULIP_CHIP_AN983: 877 case TULIP_CHIP_AN985: 878 /* 879 * The ADMtek AN985's Ethernet address is located 880 * at offset 8 of its EEPROM. 881 */ 882 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 883 884 /* 885 * The ADMtek AN985 can be configured in Single-Chip 886 * mode or MAC-only mode. Single-Chip uses the built-in 887 * PHY, MAC-only has an external PHY (usually HomePNA). 888 * The selection is based on an EEPROM setting, and both 889 * PHYs are accessed via MII attached to SIO. 890 * 891 * The AN985 "ghosts" the internal PHY onto all 892 * MII addresses, so we have to use a media init 893 * routine that limits the search. 894 * XXX How does this work with MAC-only mode? 895 */ 896 sc->sc_mediasw = &tlp_an985_mediasw; 897 break; 898 899 case TULIP_CHIP_DM9102: 900 case TULIP_CHIP_DM9102A: 901 /* 902 * Some boards with the Davicom chip have an ISV 903 * SROM (mostly DM9102A boards -- trying to describe 904 * the HomePNA PHY, probably) although the data in 905 * them is generally wrong. Check for ISV format 906 * and grab the Ethernet address that way, and if 907 * that fails, fall back on grabbing it from an 908 * observed offset of 20 (which is where it would 909 * be in an ISV SROM anyhow, tho ISV can cope with 910 * multi-port boards). 911 */ 912 if (!tlp_isv_srom_enaddr(sc, enaddr)) { 913 #ifdef __sparc__ 914 if (!sc->sc_srom[20] && !sc->sc_srom[21] && 915 !sc->sc_srom[22]) { 916 extern void myetheraddr __P((u_char *)); 917 myetheraddr(enaddr); 918 } else 919 #endif 920 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN); 921 } 922 923 /* 924 * Davicom chips all have an internal MII interface 925 * and a built-in PHY. DM9102A also has a an external 926 * MII interface, usually with a HomePNA PHY attached 927 * to it. 928 */ 929 sc->sc_mediasw = &tlp_dm9102_mediasw; 930 break; 931 932 default: 933 cant_cope: 934 printf("%s: sorry, unable to handle your board\n", 935 sc->sc_dev.dv_xname); 936 return; 937 } 938 939 /* 940 * Handle shared interrupts. 941 */ 942 if (psc->sc_flags & TULIP_PCI_SHAREDINTR) { 943 if (psc->sc_master) 944 psc->sc_flags |= TULIP_PCI_SLAVEINTR; 945 else { 946 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDINTR, 947 TULIP_PCI_SLAVEINTR); 948 if (psc->sc_master == NULL) 949 psc->sc_master = psc; 950 } 951 LIST_INSERT_HEAD(&psc->sc_master->sc_intrslaves, 952 psc, sc_intrq); 953 } 954 955 if (psc->sc_flags & TULIP_PCI_SLAVEINTR) { 956 printf("%s: sharing interrupt with %s\n", 957 sc->sc_dev.dv_xname, 958 psc->sc_master->sc_tulip.sc_dev.dv_xname); 959 } else { 960 /* 961 * Map and establish our interrupt. 962 */ 963 if (pci_intr_map(pa, &ih)) { 964 printf("%s: unable to map interrupt\n", 965 sc->sc_dev.dv_xname); 966 return; 967 } 968 intrstr = pci_intr_string(pc, ih); 969 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, 970 (psc->sc_flags & TULIP_PCI_SHAREDINTR) ? 971 tlp_pci_shared_intr : tlp_intr, sc); 972 if (psc->sc_ih == NULL) { 973 printf("%s: unable to establish interrupt", 974 sc->sc_dev.dv_xname); 975 if (intrstr != NULL) 976 printf(" at %s", intrstr); 977 printf("\n"); 978 return; 979 } 980 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, 981 intrstr); 982 } 983 984 /* 985 * Finish off the attach. 986 */ 987 tlp_attach(sc, enaddr); 988 } 989 990 int 991 tlp_pci_shared_intr(arg) 992 void *arg; 993 { 994 struct tulip_pci_softc *master = arg, *slave; 995 int rv = 0; 996 997 for (slave = LIST_FIRST(&master->sc_intrslaves); 998 slave != NULL; 999 slave = LIST_NEXT(slave, sc_intrq)) 1000 rv |= tlp_intr(&slave->sc_tulip); 1001 1002 return (rv); 1003 } 1004 1005 void 1006 tlp_pci_dec_quirks(psc, enaddr) 1007 struct tulip_pci_softc *psc; 1008 const u_int8_t *enaddr; 1009 { 1010 struct tulip_softc *sc = &psc->sc_tulip; 1011 1012 /* 1013 * This isn't really a quirk-gathering device, really. We 1014 * just want to get the spiffy DEC board name from the SROM. 1015 */ 1016 strcpy(sc->sc_name, "DEC "); 1017 1018 if (memcmp(&sc->sc_srom[29], "DE500", 5) == 0 || 1019 memcmp(&sc->sc_srom[29], "DE450", 5) == 0) 1020 memcpy(&sc->sc_name[4], &sc->sc_srom[29], 8); 1021 } 1022 1023 void 1024 tlp_pci_znyx_21040_quirks(psc, enaddr) 1025 struct tulip_pci_softc *psc; 1026 const u_int8_t *enaddr; 1027 { 1028 struct tulip_softc *sc = &psc->sc_tulip; 1029 u_int16_t id = 0; 1030 1031 /* 1032 * If we have a slaved ROM, just copy the bits from the master. 1033 * This is in case we fail the ROM ID check (older boards) and 1034 * need to fall back on Ethernet address model checking; that 1035 * will fail for slave chips. 1036 */ 1037 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 1038 strcpy(sc->sc_name, psc->sc_master->sc_tulip.sc_name); 1039 sc->sc_mediasw = psc->sc_master->sc_tulip.sc_mediasw; 1040 psc->sc_flags |= 1041 psc->sc_master->sc_flags & TULIP_PCI_SHAREDINTR; 1042 return; 1043 } 1044 1045 if (sc->sc_srom[32] == 0x4a && sc->sc_srom[33] == 0x52) { 1046 id = sc->sc_srom[37] | (sc->sc_srom[36] << 8); 1047 switch (id) { 1048 zx312: 1049 case 0x0602: /* ZX312 */ 1050 strcpy(sc->sc_name, "ZNYX ZX312"); 1051 return; 1052 1053 case 0x0622: /* ZX312T */ 1054 strcpy(sc->sc_name, "ZNYX ZX312T"); 1055 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1056 return; 1057 1058 zx314_inta: 1059 case 0x0701: /* ZX314 INTA */ 1060 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1061 /* FALLTHROUGH */ 1062 case 0x0711: /* ZX314 */ 1063 strcpy(sc->sc_name, "ZNYX ZX314"); 1064 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1065 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1066 return; 1067 1068 zx315_inta: 1069 case 0x0801: /* ZX315 INTA */ 1070 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1071 /* FALLTHROUGH */ 1072 case 0x0811: /* ZX315 */ 1073 strcpy(sc->sc_name, "ZNYX ZX315"); 1074 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1075 return; 1076 1077 default: 1078 id = 0; 1079 break; 1080 } 1081 } 1082 1083 /* 1084 * Deal with boards that have broken ROMs. 1085 */ 1086 if (id == 0) { 1087 if ((enaddr[3] & ~3) == 0xf0 && (enaddr[5] & 3) == 0x00) 1088 goto zx314_inta; 1089 if ((enaddr[3] & ~3) == 0xf4 && (enaddr[5] & 1) == 0x00) 1090 goto zx315_inta; 1091 if ((enaddr[3] & ~3) == 0xec) 1092 goto zx312; 1093 } 1094 1095 strcpy(sc->sc_name, "ZNYX ZX31x"); 1096 } 1097 1098 void 1099 tlp_pci_smc_21040_quirks(psc, enaddr) 1100 struct tulip_pci_softc *psc; 1101 const u_int8_t *enaddr; 1102 { 1103 struct tulip_softc *sc = &psc->sc_tulip; 1104 u_int16_t id1, id2, ei; 1105 int auibnc = 0, utp = 0; 1106 char *cp; 1107 1108 id1 = sc->sc_srom[0x60] | (sc->sc_srom[0x61] << 8); 1109 id2 = sc->sc_srom[0x62] | (sc->sc_srom[0x63] << 8); 1110 ei = sc->sc_srom[0x66] | (sc->sc_srom[0x67] << 8); 1111 1112 strcpy(sc->sc_name, "SMC 8432"); 1113 cp = &sc->sc_name[8]; 1114 1115 if ((id1 & 1) == 0) { 1116 *cp++ = 'B'; 1117 auibnc = 1; 1118 } 1119 if ((id1 & 0xff) > 0x32) { 1120 *cp++ = 'T'; 1121 utp = 1; 1122 } 1123 if ((id1 & 0x4000) == 0) { 1124 *cp++ = 'A'; 1125 auibnc = 1; 1126 } 1127 if (id2 == 0x15) { 1128 sc->sc_name[7] = '4'; 1129 *cp++ = '-'; 1130 *cp++ = 'C'; 1131 *cp++ = 'H'; 1132 *cp++ = ei ? '2' : '1'; 1133 } 1134 *cp = '\0'; 1135 1136 if (utp != 0 && auibnc == 0) 1137 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1138 else if (utp == 0 && auibnc != 0) 1139 sc->sc_mediasw = &tlp_21040_auibnc_mediasw; 1140 } 1141 1142 void 1143 tlp_pci_cogent_21040_quirks(psc, enaddr) 1144 struct tulip_pci_softc *psc; 1145 const u_int8_t *enaddr; 1146 { 1147 1148 strcpy(psc->sc_tulip.sc_name, "Cogent multi-port"); 1149 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1150 } 1151 1152 void 1153 tlp_pci_accton_21040_quirks(psc, enaddr) 1154 struct tulip_pci_softc *psc; 1155 const u_int8_t *enaddr; 1156 { 1157 1158 strcpy(psc->sc_tulip.sc_name, "ACCTON EN1203"); 1159 } 1160 1161 void tlp_pci_asante_21140_reset __P((struct tulip_softc *)); 1162 1163 void 1164 tlp_pci_asante_21140_quirks(psc, enaddr) 1165 struct tulip_pci_softc *psc; 1166 const u_int8_t *enaddr; 1167 { 1168 struct tulip_softc *sc = &psc->sc_tulip; 1169 1170 /* 1171 * Some Asante boards don't use the ISV SROM format. For 1172 * those that don't, we initialize the GPIO direction bits, 1173 * and provide our own reset hook, which resets the MII. 1174 * 1175 * All of these boards use SIO-attached-MII media. 1176 */ 1177 if (sc->sc_mediasw == &tlp_2114x_isv_mediasw) 1178 return; 1179 1180 strcpy(sc->sc_name, "Asante"); 1181 1182 sc->sc_gp_dir = 0xbf; 1183 sc->sc_reset = tlp_pci_asante_21140_reset; 1184 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1185 } 1186 1187 void 1188 tlp_pci_asante_21140_reset(sc) 1189 struct tulip_softc *sc; 1190 { 1191 1192 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1193 TULIP_WRITE(sc, CSR_GPP, 0x8); 1194 delay(100); 1195 TULIP_WRITE(sc, CSR_GPP, 0); 1196 } 1197 1198 /* 1199 * SMC 9332DST media switch. 1200 */ 1201 void tlp_smc9332dst_tmsw_init __P((struct tulip_softc *)); 1202 1203 const struct tulip_mediasw tlp_smc9332dst_mediasw = { 1204 tlp_smc9332dst_tmsw_init, 1205 tlp_21140_gpio_get, 1206 tlp_21140_gpio_set 1207 }; 1208 1209 void 1210 tlp_pci_smc_21140_quirks(psc, enaddr) 1211 struct tulip_pci_softc *psc; 1212 const u_int8_t *enaddr; 1213 { 1214 struct tulip_softc *sc = &psc->sc_tulip; 1215 1216 if (sc->sc_mediasw != NULL) { 1217 return; 1218 } 1219 strcpy(psc->sc_tulip.sc_name, "SMC 9332DST"); 1220 sc->sc_mediasw = &tlp_smc9332dst_mediasw; 1221 } 1222 1223 void 1224 tlp_smc9332dst_tmsw_init(sc) 1225 struct tulip_softc *sc; 1226 { 1227 struct tulip_21x4x_media *tm; 1228 const char *sep = ""; 1229 uint32_t reg; 1230 int i, cnt; 1231 1232 sc->sc_gp_dir = GPP_SMC9332DST_PINS; 1233 sc->sc_opmode = OPMODE_MBO | OPMODE_PS; 1234 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 1235 1236 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 1237 tlp_mediastatus); 1238 printf("%s: ", sc->sc_dev.dv_xname); 1239 1240 #define ADD(m, c) \ 1241 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK|M_ZERO); \ 1242 tm->tm_opmode = (c); \ 1243 tm->tm_gpdata = GPP_SMC9332DST_INIT; \ 1244 ifmedia_add(&sc->sc_mii.mii_media, (m), 0, tm) 1245 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 1246 1247 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0), OPMODE_TTM); 1248 PRINT("10baseT"); 1249 1250 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, 0), 1251 OPMODE_TTM | OPMODE_FD); 1252 PRINT("10baseT-FDX"); 1253 1254 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 1255 OPMODE_PS | OPMODE_PCS | OPMODE_SCR); 1256 PRINT("100baseTX"); 1257 1258 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, 0), 1259 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD); 1260 PRINT("100baseTX-FDX"); 1261 1262 #undef ADD 1263 #undef PRINT 1264 1265 printf("\n"); 1266 1267 tlp_reset(sc); 1268 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode | OPMODE_PCS | OPMODE_SCR); 1269 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1270 delay(10); 1271 TULIP_WRITE(sc, CSR_GPP, GPP_SMC9332DST_INIT); 1272 delay(200000); 1273 cnt = 0; 1274 for (i = 1000; i > 0; i--) { 1275 reg = TULIP_READ(sc, CSR_GPP); 1276 if ((~reg & (GPP_SMC9332DST_OK10 | 1277 GPP_SMC9332DST_OK100)) == 0) { 1278 if (cnt++ > 100) { 1279 break; 1280 } 1281 } else if ((reg & GPP_SMC9332DST_OK10) == 0) { 1282 break; 1283 } else { 1284 cnt = 0; 1285 } 1286 delay(1000); 1287 } 1288 if (cnt > 100) { 1289 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX); 1290 } else { 1291 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 1292 } 1293 } 1294 1295 void tlp_pci_cobalt_21142_reset __P((struct tulip_softc *)); 1296 1297 void 1298 tlp_pci_cobalt_21142_quirks(psc, enaddr) 1299 struct tulip_pci_softc *psc; 1300 const u_int8_t *enaddr; 1301 { 1302 struct tulip_softc *sc = &psc->sc_tulip; 1303 1304 /* 1305 * Cobalt Networks interfaces are just MII-on-SIO. 1306 */ 1307 sc->sc_reset = tlp_pci_cobalt_21142_reset; 1308 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1309 1310 /* 1311 * The Cobalt systems tend to fall back to store-and-forward 1312 * pretty quickly, so we select that from the beginning to 1313 * avoid initial timeouts. 1314 */ 1315 sc->sc_txthresh = TXTH_SF; 1316 } 1317 1318 void 1319 tlp_pci_cobalt_21142_reset(sc) 1320 struct tulip_softc *sc; 1321 { 1322 /* 1323 * Reset PHY. 1324 */ 1325 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE | (1 << 16)); 1326 delay(10); 1327 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE); 1328 delay(10); 1329 } 1330 1331 void 1332 tlp_pci_algor_21142_quirks(psc, enaddr) 1333 struct tulip_pci_softc *psc; 1334 const u_int8_t *enaddr; 1335 { 1336 struct tulip_softc *sc = &psc->sc_tulip; 1337 1338 /* 1339 * Algorithmics boards just have MII-on-SIO. 1340 * 1341 * XXX They also have AUI on the serial interface. 1342 * XXX Deal with this. 1343 */ 1344 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1345 } 1346 1347 /* 1348 * Cogent EM1x0 (aka. Adaptec ANA-6910) media switch. 1349 */ 1350 void tlp_cogent_em1x0_tmsw_init __P((struct tulip_softc *)); 1351 1352 const struct tulip_mediasw tlp_cogent_em1x0_mediasw = { 1353 tlp_cogent_em1x0_tmsw_init, 1354 tlp_21140_gpio_get, 1355 tlp_21140_gpio_set 1356 }; 1357 1358 void 1359 tlp_pci_adaptec_quirks(psc, enaddr) 1360 struct tulip_pci_softc *psc; 1361 const u_int8_t *enaddr; 1362 { 1363 struct tulip_softc *sc = &psc->sc_tulip; 1364 uint8_t *srom = sc->sc_srom, id0; 1365 uint16_t id1, id2; 1366 1367 if (sc->sc_mediasw == NULL) { 1368 id0 = srom[32]; 1369 switch (id0) { 1370 case 0x12: 1371 strcpy(psc->sc_tulip.sc_name, "Cogent EM100TX"); 1372 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1373 break; 1374 1375 case 0x15: 1376 strcpy(psc->sc_tulip.sc_name, "Cogent EM100FX"); 1377 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1378 break; 1379 1380 #if 0 1381 case XXX: 1382 strcpy(psc->sc_tulip.sc_name, "Cogent EM110TX"); 1383 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1384 break; 1385 #endif 1386 1387 default: 1388 printf("%s: unknown Cogent board ID 0x%02x\n", 1389 sc->sc_dev.dv_xname, id0); 1390 } 1391 return; 1392 } 1393 1394 id1 = TULIP_ROM_GETW(srom, 0); 1395 id2 = TULIP_ROM_GETW(srom, 2); 1396 if (id1 != 0x1109) { 1397 goto unknown; 1398 } 1399 1400 switch (id2) { 1401 case 0x1900: 1402 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911"); 1403 break; 1404 1405 case 0x2400: 1406 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6944A"); 1407 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1408 break; 1409 1410 case 0x2b00: 1411 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911A"); 1412 break; 1413 1414 case 0x3000: 1415 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6922"); 1416 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1417 break; 1418 1419 default: 1420 unknown: 1421 printf("%s: unknown Adaptec/Cogent board ID 0x%04x/0x%04x\n", 1422 sc->sc_dev.dv_xname, id1, id2); 1423 } 1424 } 1425 1426 void 1427 tlp_cogent_em1x0_tmsw_init(sc) 1428 struct tulip_softc *sc; 1429 { 1430 struct tulip_21x4x_media *tm; 1431 const char *sep = ""; 1432 1433 sc->sc_gp_dir = GPP_COGENT_EM1x0_PINS; 1434 sc->sc_opmode = OPMODE_MBO | OPMODE_PS; 1435 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 1436 1437 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 1438 tlp_mediastatus); 1439 printf("%s: ", sc->sc_dev.dv_xname); 1440 1441 #define ADD(m, c) \ 1442 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK|M_ZERO); \ 1443 tm->tm_opmode = (c); \ 1444 tm->tm_gpdata = GPP_COGENT_EM1x0_INIT; \ 1445 ifmedia_add(&sc->sc_mii.mii_media, (m), 0, tm) 1446 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 1447 1448 if (sc->sc_srom[32] == 0x15) { 1449 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, 0, 0), 1450 OPMODE_PS | OPMODE_PCS); 1451 PRINT("100baseFX"); 1452 1453 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0), 1454 OPMODE_PS | OPMODE_PCS | OPMODE_FD); 1455 PRINT("100baseFX-FDX"); 1456 printf("\n"); 1457 1458 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_FX); 1459 } else { 1460 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 1461 OPMODE_PS | OPMODE_PCS | OPMODE_SCR); 1462 PRINT("100baseTX"); 1463 1464 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0), 1465 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD); 1466 PRINT("100baseTX-FDX"); 1467 printf("\n"); 1468 1469 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX); 1470 } 1471 1472 #undef ADD 1473 #undef PRINT 1474 } 1475 1476 void tlp_pci_netwinder_21142_reset(struct tulip_softc *); 1477 1478 void 1479 tlp_pci_netwinder_21142_quirks(psc, enaddr) 1480 struct tulip_pci_softc *psc; 1481 const u_int8_t *enaddr; 1482 { 1483 struct tulip_softc *sc = &psc->sc_tulip; 1484 1485 /* 1486 * Netwinders just use MII-on_SIO. 1487 */ 1488 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1489 sc->sc_reset = tlp_pci_netwinder_21142_reset; 1490 } 1491 1492 void 1493 tlp_pci_netwinder_21142_reset(sc) 1494 struct tulip_softc *sc; 1495 { 1496 1497 /* 1498 * Reset the PHY. 1499 */ 1500 TULIP_WRITE(sc, CSR_SIAGEN, 0x0821 << 16); 1501 delay(10); 1502 TULIP_WRITE(sc, CSR_SIAGEN, 0x0000 << 16); 1503 delay(10); 1504 TULIP_WRITE(sc, CSR_SIAGEN, 0x0001 << 16); 1505 delay(10); 1506 } 1507
Indexes created Sun Sep 21 20:09:37 GMT 2025