if_tlp_pci.c revision 1.69
1 /* $NetBSD: if_tlp_pci.c,v 1.69 2002/10/08 15:09:54 minoura Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center; and Charles M. Hannum. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * PCI bus front-end for the Digital Semiconductor ``Tulip'' (21x4x) 42 * Ethernet controller family driver. 43 */ 44 45 #include <sys/cdefs.h> 46 __KERNEL_RCSID(0, "$NetBSD: if_tlp_pci.c,v 1.69 2002/10/08 15:09:54 minoura Exp $"); 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/mbuf.h> 51 #include <sys/malloc.h> 52 #include <sys/kernel.h> 53 #include <sys/socket.h> 54 #include <sys/ioctl.h> 55 #include <sys/errno.h> 56 #include <sys/device.h> 57 58 #include <machine/endian.h> 59 60 #include <net/if.h> 61 #include <net/if_dl.h> 62 #include <net/if_media.h> 63 #include <net/if_ether.h> 64 65 #include <machine/bus.h> 66 #include <machine/intr.h> 67 68 #include <dev/mii/miivar.h> 69 #include <dev/mii/mii_bitbang.h> 70 71 #include <dev/ic/tulipreg.h> 72 #include <dev/ic/tulipvar.h> 73 74 #include <dev/pci/pcivar.h> 75 #include <dev/pci/pcireg.h> 76 #include <dev/pci/pcidevs.h> 77 78 /* 79 * PCI configuration space registers used by the Tulip. 80 */ 81 #define TULIP_PCI_IOBA 0x10 /* i/o mapped base */ 82 #define TULIP_PCI_MMBA 0x14 /* memory mapped base */ 83 #define TULIP_PCI_CFDA 0x40 /* configuration driver area */ 84 85 #define CFDA_SLEEP 0x80000000 /* sleep mode */ 86 #define CFDA_SNOOZE 0x40000000 /* snooze mode */ 87 88 struct tulip_pci_softc { 89 struct tulip_softc sc_tulip; /* real Tulip softc */ 90 91 /* PCI-specific goo. */ 92 void *sc_ih; /* interrupt handle */ 93 94 pci_chipset_tag_t sc_pc; /* our PCI chipset */ 95 pcitag_t sc_pcitag; /* our PCI tag */ 96 97 int sc_flags; /* flags; see below */ 98 99 LIST_HEAD(, tulip_pci_softc) sc_intrslaves; 100 LIST_ENTRY(tulip_pci_softc) sc_intrq; 101 102 /* Our {ROM,interrupt} master. */ 103 struct tulip_pci_softc *sc_master; 104 }; 105 106 /* sc_flags */ 107 #define TULIP_PCI_SHAREDINTR 0x01 /* interrupt is shared */ 108 #define TULIP_PCI_SLAVEINTR 0x02 /* interrupt is slave */ 109 #define TULIP_PCI_SHAREDROM 0x04 /* ROM is shared */ 110 #define TULIP_PCI_SLAVEROM 0x08 /* slave of shared ROM */ 111 112 int tlp_pci_match __P((struct device *, struct cfdata *, void *)); 113 void tlp_pci_attach __P((struct device *, struct device *, void *)); 114 115 CFATTACH_DECL(tlp_pci, sizeof(struct tulip_pci_softc), 116 tlp_pci_match, tlp_pci_attach, NULL, NULL); 117 118 const struct tulip_pci_product { 119 u_int32_t tpp_vendor; /* PCI vendor ID */ 120 u_int32_t tpp_product; /* PCI product ID */ 121 tulip_chip_t tpp_chip; /* base Tulip chip type */ 122 } tlp_pci_products[] = { 123 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21040, 124 TULIP_CHIP_21040 }, 125 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21041, 126 TULIP_CHIP_21041 }, 127 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21140, 128 TULIP_CHIP_21140 }, 129 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142, 130 TULIP_CHIP_21142 }, 131 132 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C168, 133 TULIP_CHIP_82C168 }, 134 135 /* 136 * Note: This is like a MX98725 with Wake-On-LAN and a 137 * 128-bit multicast hash table. 138 */ 139 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C115, 140 TULIP_CHIP_82C115 }, 141 142 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98713, 143 TULIP_CHIP_MX98713 }, 144 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX987x5, 145 TULIP_CHIP_MX98715 }, 146 147 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100TX, 148 TULIP_CHIP_MX98713 }, 149 150 { PCI_VENDOR_WINBOND, PCI_PRODUCT_WINBOND_W89C840F, 151 TULIP_CHIP_WB89C840F }, 152 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100ATX, 153 TULIP_CHIP_WB89C840F }, 154 155 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9102, 156 TULIP_CHIP_DM9102 }, 157 158 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AL981, 159 TULIP_CHIP_AL981 }, 160 161 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN985, 162 TULIP_CHIP_AN985 }, 163 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN2242, 164 TULIP_CHIP_AN985 }, 165 166 #if 0 167 { PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX88140A, 168 TULIP_CHIP_AX88140 }, 169 #endif 170 171 { 0, 0, 172 TULIP_CHIP_INVALID }, 173 }; 174 175 struct tlp_pci_quirks { 176 void (*tpq_func) __P((struct tulip_pci_softc *, 177 const u_int8_t *)); 178 u_int8_t tpq_oui[3]; 179 }; 180 181 void tlp_pci_dec_quirks __P((struct tulip_pci_softc *, 182 const u_int8_t *)); 183 184 void tlp_pci_znyx_21040_quirks __P((struct tulip_pci_softc *, 185 const u_int8_t *)); 186 void tlp_pci_smc_21040_quirks __P((struct tulip_pci_softc *, 187 const u_int8_t *)); 188 void tlp_pci_cogent_21040_quirks __P((struct tulip_pci_softc *, 189 const u_int8_t *)); 190 void tlp_pci_accton_21040_quirks __P((struct tulip_pci_softc *, 191 const u_int8_t *)); 192 193 void tlp_pci_cobalt_21142_quirks __P((struct tulip_pci_softc *, 194 const u_int8_t *)); 195 void tlp_pci_algor_21142_quirks __P((struct tulip_pci_softc *, 196 const u_int8_t *)); 197 void tlp_pci_netwinder_21142_quirks __P((struct tulip_pci_softc *, 198 const u_int8_t *)); 199 200 void tlp_pci_adaptec_quirks __P((struct tulip_pci_softc *, 201 const u_int8_t *)); 202 203 const struct tlp_pci_quirks tlp_pci_21040_quirks[] = { 204 { tlp_pci_znyx_21040_quirks, { 0x00, 0xc0, 0x95 } }, 205 { tlp_pci_smc_21040_quirks, { 0x00, 0x00, 0xc0 } }, 206 { tlp_pci_cogent_21040_quirks, { 0x00, 0x00, 0x92 } }, 207 { tlp_pci_accton_21040_quirks, { 0x00, 0x00, 0xe8 } }, 208 { NULL, { 0, 0, 0 } } 209 }; 210 211 const struct tlp_pci_quirks tlp_pci_21041_quirks[] = { 212 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 213 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 214 { NULL, { 0, 0, 0 } } 215 }; 216 217 void tlp_pci_asante_21140_quirks __P((struct tulip_pci_softc *, 218 const u_int8_t *)); 219 void tlp_pci_smc_21140_quirks __P((struct tulip_pci_softc *, 220 const u_int8_t *)); 221 void tlp_pci_vpc_21140_quirks __P((struct tulip_pci_softc *, 222 const u_int8_t *)); 223 224 const struct tlp_pci_quirks tlp_pci_21140_quirks[] = { 225 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 226 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 227 { tlp_pci_asante_21140_quirks, { 0x00, 0x00, 0x94 } }, 228 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0x92 } }, 229 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } }, 230 { tlp_pci_smc_21140_quirks, { 0x00, 0x00, 0xc0 } }, 231 { tlp_pci_vpc_21140_quirks, { 0x00, 0x03, 0xff } }, 232 { NULL, { 0, 0, 0 } } 233 }; 234 235 const struct tlp_pci_quirks tlp_pci_21142_quirks[] = { 236 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 237 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 238 { tlp_pci_cobalt_21142_quirks, { 0x00, 0x10, 0xe0 } }, 239 { tlp_pci_algor_21142_quirks, { 0x00, 0x40, 0xbc } }, 240 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } }, 241 { tlp_pci_netwinder_21142_quirks,{ 0x00, 0x10, 0x57 } }, 242 { NULL, { 0, 0, 0 } } 243 }; 244 245 int tlp_pci_shared_intr __P((void *)); 246 247 const struct tulip_pci_product *tlp_pci_lookup 248 __P((const struct pci_attach_args *)); 249 void tlp_pci_get_quirks __P((struct tulip_pci_softc *, const u_int8_t *, 250 const struct tlp_pci_quirks *)); 251 void tlp_pci_check_slaved __P((struct tulip_pci_softc *, int, int)); 252 253 const struct tulip_pci_product * 254 tlp_pci_lookup(pa) 255 const struct pci_attach_args *pa; 256 { 257 const struct tulip_pci_product *tpp; 258 259 for (tpp = tlp_pci_products; 260 tlp_chip_names[tpp->tpp_chip] != NULL; 261 tpp++) { 262 if (PCI_VENDOR(pa->pa_id) == tpp->tpp_vendor && 263 PCI_PRODUCT(pa->pa_id) == tpp->tpp_product) 264 return (tpp); 265 } 266 return (NULL); 267 } 268 269 void 270 tlp_pci_get_quirks(psc, enaddr, tpq) 271 struct tulip_pci_softc *psc; 272 const u_int8_t *enaddr; 273 const struct tlp_pci_quirks *tpq; 274 { 275 276 for (; tpq->tpq_func != NULL; tpq++) { 277 if (tpq->tpq_oui[0] == enaddr[0] && 278 tpq->tpq_oui[1] == enaddr[1] && 279 tpq->tpq_oui[2] == enaddr[2]) { 280 (*tpq->tpq_func)(psc, enaddr); 281 return; 282 } 283 } 284 } 285 286 void 287 tlp_pci_check_slaved(psc, shared, slaved) 288 struct tulip_pci_softc *psc; 289 int shared, slaved; 290 { 291 extern struct cfdriver tlp_cd; 292 struct tulip_pci_softc *cur, *best = NULL; 293 struct tulip_softc *sc = &psc->sc_tulip; 294 int i; 295 296 /* 297 * First of all, find the lowest pcidev numbered device on our 298 * bus marked as shared. That should be our master. 299 */ 300 for (i = 0; i < tlp_cd.cd_ndevs; i++) { 301 if ((cur = tlp_cd.cd_devs[i]) == NULL) 302 continue; 303 if (cur->sc_tulip.sc_dev.dv_parent != sc->sc_dev.dv_parent) 304 continue; 305 if ((cur->sc_flags & shared) == 0) 306 continue; 307 if (cur == psc) 308 continue; 309 if (best == NULL || 310 best->sc_tulip.sc_devno > cur->sc_tulip.sc_devno) 311 best = cur; 312 } 313 314 if (best != NULL) { 315 psc->sc_master = best; 316 psc->sc_flags |= (shared | slaved); 317 } 318 } 319 320 int 321 tlp_pci_match(parent, match, aux) 322 struct device *parent; 323 struct cfdata *match; 324 void *aux; 325 { 326 struct pci_attach_args *pa = aux; 327 328 if (tlp_pci_lookup(pa) != NULL) 329 return (10); /* beat if_de.c */ 330 331 return (0); 332 } 333 334 void 335 tlp_pci_attach(parent, self, aux) 336 struct device *parent, *self; 337 void *aux; 338 { 339 struct tulip_pci_softc *psc = (void *) self; 340 struct tulip_softc *sc = &psc->sc_tulip; 341 struct pci_attach_args *pa = aux; 342 pci_chipset_tag_t pc = pa->pa_pc; 343 pci_intr_handle_t ih; 344 const char *intrstr = NULL; 345 bus_space_tag_t iot, memt; 346 bus_space_handle_t ioh, memh; 347 int ioh_valid, memh_valid, i, j; 348 const struct tulip_pci_product *tpp; 349 u_int8_t enaddr[ETHER_ADDR_LEN]; 350 u_int32_t val; 351 pcireg_t reg; 352 int pmreg; 353 354 sc->sc_devno = pa->pa_device; 355 psc->sc_pc = pa->pa_pc; 356 psc->sc_pcitag = pa->pa_tag; 357 358 LIST_INIT(&psc->sc_intrslaves); 359 360 tpp = tlp_pci_lookup(pa); 361 if (tpp == NULL) { 362 printf("\n"); 363 panic("tlp_pci_attach: impossible"); 364 } 365 sc->sc_chip = tpp->tpp_chip; 366 367 /* 368 * By default, Tulip registers are 8 bytes long (4 bytes 369 * followed by a 4 byte pad). 370 */ 371 sc->sc_regshift = 3; 372 373 /* 374 * No power management hooks. 375 * XXX Maybe we should add some! 376 */ 377 sc->sc_flags |= TULIPF_ENABLED; 378 379 /* 380 * Get revision info, and set some chip-specific variables. 381 */ 382 sc->sc_rev = PCI_REVISION(pa->pa_class); 383 switch (sc->sc_chip) { 384 case TULIP_CHIP_21140: 385 if (sc->sc_rev >= 0x20) 386 sc->sc_chip = TULIP_CHIP_21140A; 387 break; 388 389 case TULIP_CHIP_21142: 390 if (sc->sc_rev >= 0x20) 391 sc->sc_chip = TULIP_CHIP_21143; 392 break; 393 394 case TULIP_CHIP_82C168: 395 if (sc->sc_rev >= 0x20) 396 sc->sc_chip = TULIP_CHIP_82C169; 397 break; 398 399 case TULIP_CHIP_MX98713: 400 if (sc->sc_rev >= 0x10) 401 sc->sc_chip = TULIP_CHIP_MX98713A; 402 break; 403 404 case TULIP_CHIP_MX98715: 405 if (sc->sc_rev >= 0x20) 406 sc->sc_chip = TULIP_CHIP_MX98715A; 407 if (sc->sc_rev >= 0x25) 408 sc->sc_chip = TULIP_CHIP_MX98715AEC_X; 409 if (sc->sc_rev >= 0x30) 410 sc->sc_chip = TULIP_CHIP_MX98725; 411 break; 412 413 case TULIP_CHIP_WB89C840F: 414 sc->sc_regshift = 2; 415 break; 416 417 case TULIP_CHIP_AN985: 418 /* 419 * The AN983 and AN985 are very similar, and are 420 * differentiated by a "signature" register that 421 * is like, but not identical, to a PCI ID register. 422 */ 423 reg = pci_conf_read(pc, pa->pa_tag, 0x80); 424 switch (reg) { 425 case 0x09811317: 426 sc->sc_chip = TULIP_CHIP_AN985; 427 break; 428 429 case 0x09851317: 430 sc->sc_chip = TULIP_CHIP_AN983; 431 break; 432 433 default: 434 /* Unknown -- use default. */ 435 break; 436 } 437 break; 438 439 case TULIP_CHIP_AX88140: 440 if (sc->sc_rev >= 0x10) 441 sc->sc_chip = TULIP_CHIP_AX88141; 442 break; 443 444 case TULIP_CHIP_DM9102: 445 if (sc->sc_rev >= 0x30) 446 sc->sc_chip = TULIP_CHIP_DM9102A; 447 break; 448 449 default: 450 /* Nothing. */ 451 break; 452 } 453 454 printf(": %s Ethernet, pass %d.%d\n", 455 tlp_chip_names[sc->sc_chip], 456 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf); 457 458 switch (sc->sc_chip) { 459 case TULIP_CHIP_21040: 460 if (sc->sc_rev < 0x20) { 461 printf("%s: 21040 must be at least pass 2.0\n", 462 sc->sc_dev.dv_xname); 463 return; 464 } 465 break; 466 467 case TULIP_CHIP_21140: 468 if (sc->sc_rev < 0x11) { 469 printf("%s: 21140 must be at least pass 1.1\n", 470 sc->sc_dev.dv_xname); 471 return; 472 } 473 break; 474 475 default: 476 /* Nothing. */ 477 break; 478 } 479 480 /* 481 * Check to see if the device is in power-save mode, and 482 * being it out if necessary. 483 */ 484 switch (sc->sc_chip) { 485 case TULIP_CHIP_21140: 486 case TULIP_CHIP_21140A: 487 case TULIP_CHIP_21142: 488 case TULIP_CHIP_21143: 489 case TULIP_CHIP_MX98713A: 490 case TULIP_CHIP_MX98715: 491 case TULIP_CHIP_MX98715A: 492 case TULIP_CHIP_MX98715AEC_X: 493 case TULIP_CHIP_MX98725: 494 case TULIP_CHIP_DM9102: 495 case TULIP_CHIP_DM9102A: 496 /* 497 * Clear the "sleep mode" bit in the CFDA register. 498 */ 499 reg = pci_conf_read(pc, pa->pa_tag, TULIP_PCI_CFDA); 500 if (reg & (CFDA_SLEEP|CFDA_SNOOZE)) 501 pci_conf_write(pc, pa->pa_tag, TULIP_PCI_CFDA, 502 reg & ~(CFDA_SLEEP|CFDA_SNOOZE)); 503 break; 504 505 default: 506 /* Nothing. */ 507 break; 508 } 509 510 if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PWRMGMT, &pmreg, 0)) { 511 reg = pci_conf_read(pc, pa->pa_tag, pmreg + 4); 512 switch (reg & PCI_PMCSR_STATE_MASK) { 513 case PCI_PMCSR_STATE_D1: 514 case PCI_PMCSR_STATE_D2: 515 printf(": waking up from power state D%d\n%s", 516 reg & PCI_PMCSR_STATE_MASK, sc->sc_dev.dv_xname); 517 pci_conf_write(pc, pa->pa_tag, pmreg + 4, 518 (reg & ~PCI_PMCSR_STATE_MASK) | 519 PCI_PMCSR_STATE_D0); 520 break; 521 case PCI_PMCSR_STATE_D3: 522 /* 523 * The card has lost all configuration data in 524 * this state, so punt. 525 */ 526 printf(": unable to wake up from power state D3, " 527 "reboot required.\n"); 528 pci_conf_write(pc, pa->pa_tag, pmreg + 4, 529 (reg & ~PCI_PMCSR_STATE_MASK) | 530 PCI_PMCSR_STATE_D0); 531 return; 532 } 533 } 534 535 /* 536 * Map the device. 537 */ 538 ioh_valid = (pci_mapreg_map(pa, TULIP_PCI_IOBA, 539 PCI_MAPREG_TYPE_IO, 0, 540 &iot, &ioh, NULL, NULL) == 0); 541 memh_valid = (pci_mapreg_map(pa, TULIP_PCI_MMBA, 542 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 543 &memt, &memh, NULL, NULL) == 0); 544 545 if (memh_valid) { 546 sc->sc_st = memt; 547 sc->sc_sh = memh; 548 } else if (ioh_valid) { 549 sc->sc_st = iot; 550 sc->sc_sh = ioh; 551 } else { 552 printf(": unable to map device registers\n"); 553 return; 554 } 555 556 sc->sc_dmat = pa->pa_dmat; 557 558 /* 559 * Make sure bus mastering is enabled. 560 */ 561 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 562 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 563 PCI_COMMAND_MASTER_ENABLE); 564 565 /* 566 * Get the cacheline size. 567 */ 568 sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag, 569 PCI_BHLC_REG)); 570 571 /* 572 * Get PCI data moving command info. 573 */ 574 if (pa->pa_flags & PCI_FLAGS_MRL_OKAY) 575 sc->sc_flags |= TULIPF_MRL; 576 if (pa->pa_flags & PCI_FLAGS_MRM_OKAY) 577 sc->sc_flags |= TULIPF_MRM; 578 if (pa->pa_flags & PCI_FLAGS_MWI_OKAY) 579 sc->sc_flags |= TULIPF_MWI; 580 581 /* 582 * Read the contents of the Ethernet Address ROM/SROM. 583 */ 584 switch (sc->sc_chip) { 585 case TULIP_CHIP_21040: 586 sc->sc_srom_addrbits = 6; 587 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, M_NOWAIT); 588 TULIP_WRITE(sc, CSR_MIIROM, MIIROM_SROMCS); 589 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 590 for (j = 0; j < 10000; j++) { 591 val = TULIP_READ(sc, CSR_MIIROM); 592 if ((val & MIIROM_DN) == 0) 593 break; 594 } 595 sc->sc_srom[i] = val & MIIROM_DATA; 596 } 597 break; 598 599 case TULIP_CHIP_82C168: 600 case TULIP_CHIP_82C169: 601 { 602 sc->sc_srom_addrbits = 2; 603 sc->sc_srom = malloc(TULIP_ROM_SIZE(2), M_DEVBUF, M_NOWAIT); 604 605 /* 606 * The Lite-On PNIC stores the Ethernet address in 607 * the first 3 words of the EEPROM. EEPROM access 608 * is not like the other Tulip chips. 609 */ 610 for (i = 0; i < 6; i += 2) { 611 TULIP_WRITE(sc, CSR_PNIC_SROMCTL, 612 PNIC_SROMCTL_READ | (i >> 1)); 613 for (j = 0; j < 500; j++) { 614 delay(2); 615 val = TULIP_READ(sc, CSR_MIIROM); 616 if ((val & PNIC_MIIROM_BUSY) == 0) 617 break; 618 } 619 if (val & PNIC_MIIROM_BUSY) { 620 printf("%s: EEPROM timed out\n", 621 sc->sc_dev.dv_xname); 622 return; 623 } 624 val &= PNIC_MIIROM_DATA; 625 sc->sc_srom[i] = val >> 8; 626 sc->sc_srom[i + 1] = val & 0xff; 627 } 628 break; 629 } 630 631 default: 632 #ifdef algor 633 /* 634 * XXX This should be done with device properties, but 635 * XXX we don't have those yet. 636 */ 637 if (algor_get_ethaddr(pa, NULL)) { 638 extern int tlp_srom_debug; 639 sc->sc_srom_addrbits = 6; 640 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, 641 M_NOWAIT|M_ZERO); 642 algor_get_ethaddr(pa, sc->sc_srom); 643 if (tlp_srom_debug) { 644 printf("SROM CONTENTS:"); 645 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 646 if ((i % 8) == 0) 647 printf("\n\t"); 648 printf("0x%02x ", sc->sc_srom[i]); 649 } 650 printf("\n"); 651 } 652 break; 653 } 654 #endif /* algor */ 655 656 /* Check for a slaved ROM on a multi-port board. */ 657 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDROM, 658 TULIP_PCI_SLAVEROM); 659 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 660 sc->sc_srom_addrbits = 661 psc->sc_master->sc_tulip.sc_srom_addrbits; 662 sc->sc_srom = psc->sc_master->sc_tulip.sc_srom; 663 enaddr[5] += 664 sc->sc_devno - psc->sc_master->sc_tulip.sc_devno; 665 } 666 else if (tlp_read_srom(sc) == 0) 667 goto cant_cope; 668 break; 669 } 670 671 /* 672 * Deal with chip/board quirks. This includes setting up 673 * the mediasw, and extracting the Ethernet address from 674 * the rombuf. 675 */ 676 switch (sc->sc_chip) { 677 case TULIP_CHIP_21040: 678 /* 679 * Parse the Ethernet Address ROM. 680 */ 681 if (tlp_parse_old_srom(sc, enaddr) == 0) 682 goto cant_cope; 683 684 685 /* 686 * All 21040 boards start out with the same 687 * media switch. 688 */ 689 sc->sc_mediasw = &tlp_21040_mediasw; 690 691 /* 692 * Deal with any quirks this board might have. 693 */ 694 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21040_quirks); 695 break; 696 697 case TULIP_CHIP_21041: 698 /* Check for new format SROM. */ 699 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 700 /* 701 * Not an ISV SROM; try the old DEC Ethernet Address 702 * ROM format. 703 */ 704 if (tlp_parse_old_srom(sc, enaddr) == 0) 705 goto cant_cope; 706 } 707 708 /* 709 * All 21041 boards use the same media switch; they all 710 * work basically the same! Yippee! 711 */ 712 sc->sc_mediasw = &tlp_21041_mediasw; 713 714 /* 715 * Deal with any quirks this board might have. 716 */ 717 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21041_quirks); 718 break; 719 720 case TULIP_CHIP_21140: 721 case TULIP_CHIP_21140A: 722 /* Check for new format SROM. */ 723 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 724 /* 725 * Not an ISV SROM; try the old DEC Ethernet Address 726 * ROM format. 727 */ 728 if (tlp_parse_old_srom(sc, enaddr) == 0) 729 goto cant_cope; 730 } else { 731 /* 732 * We start out with the 2114x ISV media switch. 733 * When we search for quirks, we may change to 734 * a different switch. 735 */ 736 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 737 } 738 739 /* 740 * Deal with any quirks this board might have. 741 */ 742 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21140_quirks); 743 744 /* 745 * Bail out now if we can't deal with this board. 746 */ 747 if (sc->sc_mediasw == NULL) 748 goto cant_cope; 749 break; 750 751 case TULIP_CHIP_21142: 752 case TULIP_CHIP_21143: 753 /* Check for new format SROM. */ 754 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 755 /* 756 * Not an ISV SROM; try the old DEC Ethernet Address 757 * ROM format. 758 */ 759 if (tlp_parse_old_srom(sc, enaddr) == 0) { 760 /* 761 * One last try: just copy the address 762 * from offset 20 and try to look 763 * up quirks. 764 */ 765 memcpy(enaddr, &sc->sc_srom[20], 766 ETHER_ADDR_LEN); 767 } 768 } else { 769 /* 770 * We start out with the 2114x ISV media switch. 771 * When we search for quirks, we may change to 772 * a different switch. 773 */ 774 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 775 } 776 777 /* 778 * Deal with any quirks this board might have. 779 */ 780 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21142_quirks); 781 782 /* 783 * Bail out now if we can't deal with this board. 784 */ 785 if (sc->sc_mediasw == NULL) 786 goto cant_cope; 787 break; 788 789 case TULIP_CHIP_82C168: 790 case TULIP_CHIP_82C169: 791 /* 792 * Lite-On PNIC's Ethernet address is the first 6 793 * bytes of its EEPROM. 794 */ 795 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 796 797 /* 798 * Lite-On PNICs always use the same mediasw; we 799 * select MII vs. internal NWAY automatically. 800 */ 801 sc->sc_mediasw = &tlp_pnic_mediasw; 802 break; 803 804 case TULIP_CHIP_MX98713: 805 /* 806 * The Macronix MX98713 has an MII and GPIO, but no 807 * internal Nway block. This chip is basically a 808 * perfect 21140A clone, with the exception of the 809 * a magic register frobbing in order to make the 810 * interface function. 811 */ 812 if (tlp_isv_srom_enaddr(sc, enaddr)) { 813 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 814 break; 815 } 816 /* FALLTHROUGH */ 817 818 case TULIP_CHIP_82C115: 819 /* 820 * Yippee! The Lite-On 82C115 is a clone of 821 * the MX98725 (the data sheet even says `MXIC' 822 * on it)! Imagine that, a clone of a clone. 823 * 824 * The differences are really minimal: 825 * 826 * - Wake-On-LAN support 827 * - 128-bit multicast hash table, rather than 828 * the standard 512-bit hash table 829 */ 830 /* FALLTHROUGH */ 831 832 case TULIP_CHIP_MX98713A: 833 case TULIP_CHIP_MX98715A: 834 case TULIP_CHIP_MX98715AEC_X: 835 case TULIP_CHIP_MX98725: 836 /* 837 * The MX98713A has an MII as well as an internal Nway block, 838 * but no GPIO. The MX98715 and MX98725 have an internal 839 * Nway block only. 840 * 841 * The internal Nway block, unlike the Lite-On PNIC's, does 842 * just that - performs Nway. Once autonegotiation completes, 843 * we must program the GPR media information into the chip. 844 * 845 * The byte offset of the Ethernet address is stored at 846 * offset 0x70. 847 */ 848 memcpy(enaddr, &sc->sc_srom[sc->sc_srom[0x70]], ETHER_ADDR_LEN); 849 sc->sc_mediasw = &tlp_pmac_mediasw; 850 break; 851 852 case TULIP_CHIP_WB89C840F: 853 /* 854 * Winbond 89C840F's Ethernet address is the first 855 * 6 bytes of its EEPROM. 856 */ 857 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 858 859 /* 860 * Winbond 89C840F has an MII attached to the SIO. 861 */ 862 sc->sc_mediasw = &tlp_sio_mii_mediasw; 863 break; 864 865 case TULIP_CHIP_AL981: 866 /* 867 * The ADMtek AL981's Ethernet address is located 868 * at offset 8 of its EEPROM. 869 */ 870 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 871 872 /* 873 * ADMtek AL981 has a built-in PHY accessed through 874 * special registers. 875 */ 876 sc->sc_mediasw = &tlp_al981_mediasw; 877 break; 878 879 case TULIP_CHIP_AN983: 880 case TULIP_CHIP_AN985: 881 /* 882 * The ADMtek AN985's Ethernet address is located 883 * at offset 8 of its EEPROM. 884 */ 885 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 886 887 /* 888 * The ADMtek AN985 can be configured in Single-Chip 889 * mode or MAC-only mode. Single-Chip uses the built-in 890 * PHY, MAC-only has an external PHY (usually HomePNA). 891 * The selection is based on an EEPROM setting, and both 892 * PHYs are accessed via MII attached to SIO. 893 * 894 * The AN985 "ghosts" the internal PHY onto all 895 * MII addresses, so we have to use a media init 896 * routine that limits the search. 897 * XXX How does this work with MAC-only mode? 898 */ 899 sc->sc_mediasw = &tlp_an985_mediasw; 900 break; 901 902 case TULIP_CHIP_DM9102: 903 case TULIP_CHIP_DM9102A: 904 /* 905 * Some boards with the Davicom chip have an ISV 906 * SROM (mostly DM9102A boards -- trying to describe 907 * the HomePNA PHY, probably) although the data in 908 * them is generally wrong. Check for ISV format 909 * and grab the Ethernet address that way, and if 910 * that fails, fall back on grabbing it from an 911 * observed offset of 20 (which is where it would 912 * be in an ISV SROM anyhow, tho ISV can cope with 913 * multi-port boards). 914 */ 915 if (!tlp_isv_srom_enaddr(sc, enaddr)) { 916 #ifdef __sparc__ 917 if (!sc->sc_srom[20] && !sc->sc_srom[21] && 918 !sc->sc_srom[22]) { 919 extern void myetheraddr __P((u_char *)); 920 myetheraddr(enaddr); 921 } else 922 #endif 923 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN); 924 } 925 926 /* 927 * Davicom chips all have an internal MII interface 928 * and a built-in PHY. DM9102A also has a an external 929 * MII interface, usually with a HomePNA PHY attached 930 * to it. 931 */ 932 sc->sc_mediasw = &tlp_dm9102_mediasw; 933 break; 934 935 default: 936 cant_cope: 937 printf("%s: sorry, unable to handle your board\n", 938 sc->sc_dev.dv_xname); 939 return; 940 } 941 942 /* 943 * Handle shared interrupts. 944 */ 945 if (psc->sc_flags & TULIP_PCI_SHAREDINTR) { 946 if (psc->sc_master) 947 psc->sc_flags |= TULIP_PCI_SLAVEINTR; 948 else { 949 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDINTR, 950 TULIP_PCI_SLAVEINTR); 951 if (psc->sc_master == NULL) 952 psc->sc_master = psc; 953 } 954 LIST_INSERT_HEAD(&psc->sc_master->sc_intrslaves, 955 psc, sc_intrq); 956 } 957 958 if (psc->sc_flags & TULIP_PCI_SLAVEINTR) { 959 printf("%s: sharing interrupt with %s\n", 960 sc->sc_dev.dv_xname, 961 psc->sc_master->sc_tulip.sc_dev.dv_xname); 962 } else { 963 /* 964 * Map and establish our interrupt. 965 */ 966 if (pci_intr_map(pa, &ih)) { 967 printf("%s: unable to map interrupt\n", 968 sc->sc_dev.dv_xname); 969 return; 970 } 971 intrstr = pci_intr_string(pc, ih); 972 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, 973 (psc->sc_flags & TULIP_PCI_SHAREDINTR) ? 974 tlp_pci_shared_intr : tlp_intr, sc); 975 if (psc->sc_ih == NULL) { 976 printf("%s: unable to establish interrupt", 977 sc->sc_dev.dv_xname); 978 if (intrstr != NULL) 979 printf(" at %s", intrstr); 980 printf("\n"); 981 return; 982 } 983 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, 984 intrstr); 985 } 986 987 /* 988 * Finish off the attach. 989 */ 990 tlp_attach(sc, enaddr); 991 } 992 993 int 994 tlp_pci_shared_intr(arg) 995 void *arg; 996 { 997 struct tulip_pci_softc *master = arg, *slave; 998 int rv = 0; 999 1000 for (slave = LIST_FIRST(&master->sc_intrslaves); 1001 slave != NULL; 1002 slave = LIST_NEXT(slave, sc_intrq)) 1003 rv |= tlp_intr(&slave->sc_tulip); 1004 1005 return (rv); 1006 } 1007 1008 void 1009 tlp_pci_dec_quirks(psc, enaddr) 1010 struct tulip_pci_softc *psc; 1011 const u_int8_t *enaddr; 1012 { 1013 struct tulip_softc *sc = &psc->sc_tulip; 1014 1015 /* 1016 * This isn't really a quirk-gathering device, really. We 1017 * just want to get the spiffy DEC board name from the SROM. 1018 */ 1019 strcpy(sc->sc_name, "DEC "); 1020 1021 if (memcmp(&sc->sc_srom[29], "DE500", 5) == 0 || 1022 memcmp(&sc->sc_srom[29], "DE450", 5) == 0) 1023 memcpy(&sc->sc_name[4], &sc->sc_srom[29], 8); 1024 } 1025 1026 void 1027 tlp_pci_znyx_21040_quirks(psc, enaddr) 1028 struct tulip_pci_softc *psc; 1029 const u_int8_t *enaddr; 1030 { 1031 struct tulip_softc *sc = &psc->sc_tulip; 1032 u_int16_t id = 0; 1033 1034 /* 1035 * If we have a slaved ROM, just copy the bits from the master. 1036 * This is in case we fail the ROM ID check (older boards) and 1037 * need to fall back on Ethernet address model checking; that 1038 * will fail for slave chips. 1039 */ 1040 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 1041 strcpy(sc->sc_name, psc->sc_master->sc_tulip.sc_name); 1042 sc->sc_mediasw = psc->sc_master->sc_tulip.sc_mediasw; 1043 psc->sc_flags |= 1044 psc->sc_master->sc_flags & TULIP_PCI_SHAREDINTR; 1045 return; 1046 } 1047 1048 if (sc->sc_srom[32] == 0x4a && sc->sc_srom[33] == 0x52) { 1049 id = sc->sc_srom[37] | (sc->sc_srom[36] << 8); 1050 switch (id) { 1051 zx312: 1052 case 0x0602: /* ZX312 */ 1053 strcpy(sc->sc_name, "ZNYX ZX312"); 1054 return; 1055 1056 case 0x0622: /* ZX312T */ 1057 strcpy(sc->sc_name, "ZNYX ZX312T"); 1058 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1059 return; 1060 1061 zx314_inta: 1062 case 0x0701: /* ZX314 INTA */ 1063 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1064 /* FALLTHROUGH */ 1065 case 0x0711: /* ZX314 */ 1066 strcpy(sc->sc_name, "ZNYX ZX314"); 1067 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1068 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1069 return; 1070 1071 zx315_inta: 1072 case 0x0801: /* ZX315 INTA */ 1073 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1074 /* FALLTHROUGH */ 1075 case 0x0811: /* ZX315 */ 1076 strcpy(sc->sc_name, "ZNYX ZX315"); 1077 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1078 return; 1079 1080 default: 1081 id = 0; 1082 break; 1083 } 1084 } 1085 1086 /* 1087 * Deal with boards that have broken ROMs. 1088 */ 1089 if (id == 0) { 1090 if ((enaddr[3] & ~3) == 0xf0 && (enaddr[5] & 3) == 0x00) 1091 goto zx314_inta; 1092 if ((enaddr[3] & ~3) == 0xf4 && (enaddr[5] & 1) == 0x00) 1093 goto zx315_inta; 1094 if ((enaddr[3] & ~3) == 0xec) 1095 goto zx312; 1096 } 1097 1098 strcpy(sc->sc_name, "ZNYX ZX31x"); 1099 } 1100 1101 void 1102 tlp_pci_smc_21040_quirks(psc, enaddr) 1103 struct tulip_pci_softc *psc; 1104 const u_int8_t *enaddr; 1105 { 1106 struct tulip_softc *sc = &psc->sc_tulip; 1107 u_int16_t id1, id2, ei; 1108 int auibnc = 0, utp = 0; 1109 char *cp; 1110 1111 id1 = sc->sc_srom[0x60] | (sc->sc_srom[0x61] << 8); 1112 id2 = sc->sc_srom[0x62] | (sc->sc_srom[0x63] << 8); 1113 ei = sc->sc_srom[0x66] | (sc->sc_srom[0x67] << 8); 1114 1115 strcpy(sc->sc_name, "SMC 8432"); 1116 cp = &sc->sc_name[8]; 1117 1118 if ((id1 & 1) == 0) { 1119 *cp++ = 'B'; 1120 auibnc = 1; 1121 } 1122 if ((id1 & 0xff) > 0x32) { 1123 *cp++ = 'T'; 1124 utp = 1; 1125 } 1126 if ((id1 & 0x4000) == 0) { 1127 *cp++ = 'A'; 1128 auibnc = 1; 1129 } 1130 if (id2 == 0x15) { 1131 sc->sc_name[7] = '4'; 1132 *cp++ = '-'; 1133 *cp++ = 'C'; 1134 *cp++ = 'H'; 1135 *cp++ = ei ? '2' : '1'; 1136 } 1137 *cp = '\0'; 1138 1139 if (utp != 0 && auibnc == 0) 1140 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1141 else if (utp == 0 && auibnc != 0) 1142 sc->sc_mediasw = &tlp_21040_auibnc_mediasw; 1143 } 1144 1145 void 1146 tlp_pci_cogent_21040_quirks(psc, enaddr) 1147 struct tulip_pci_softc *psc; 1148 const u_int8_t *enaddr; 1149 { 1150 1151 strcpy(psc->sc_tulip.sc_name, "Cogent multi-port"); 1152 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1153 } 1154 1155 void 1156 tlp_pci_accton_21040_quirks(psc, enaddr) 1157 struct tulip_pci_softc *psc; 1158 const u_int8_t *enaddr; 1159 { 1160 1161 strcpy(psc->sc_tulip.sc_name, "ACCTON EN1203"); 1162 } 1163 1164 void tlp_pci_asante_21140_reset __P((struct tulip_softc *)); 1165 1166 void 1167 tlp_pci_asante_21140_quirks(psc, enaddr) 1168 struct tulip_pci_softc *psc; 1169 const u_int8_t *enaddr; 1170 { 1171 struct tulip_softc *sc = &psc->sc_tulip; 1172 1173 /* 1174 * Some Asante boards don't use the ISV SROM format. For 1175 * those that don't, we initialize the GPIO direction bits, 1176 * and provide our own reset hook, which resets the MII. 1177 * 1178 * All of these boards use SIO-attached-MII media. 1179 */ 1180 if (sc->sc_mediasw == &tlp_2114x_isv_mediasw) 1181 return; 1182 1183 strcpy(sc->sc_name, "Asante"); 1184 1185 sc->sc_gp_dir = 0xbf; 1186 sc->sc_reset = tlp_pci_asante_21140_reset; 1187 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1188 } 1189 1190 void 1191 tlp_pci_asante_21140_reset(sc) 1192 struct tulip_softc *sc; 1193 { 1194 1195 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1196 TULIP_WRITE(sc, CSR_GPP, 0x8); 1197 delay(100); 1198 TULIP_WRITE(sc, CSR_GPP, 0); 1199 } 1200 1201 /* 1202 * SMC 9332DST media switch. 1203 */ 1204 void tlp_smc9332dst_tmsw_init __P((struct tulip_softc *)); 1205 1206 const struct tulip_mediasw tlp_smc9332dst_mediasw = { 1207 tlp_smc9332dst_tmsw_init, 1208 tlp_21140_gpio_get, 1209 tlp_21140_gpio_set 1210 }; 1211 1212 void 1213 tlp_pci_smc_21140_quirks(psc, enaddr) 1214 struct tulip_pci_softc *psc; 1215 const u_int8_t *enaddr; 1216 { 1217 struct tulip_softc *sc = &psc->sc_tulip; 1218 1219 if (sc->sc_mediasw != NULL) { 1220 return; 1221 } 1222 strcpy(psc->sc_tulip.sc_name, "SMC 9332DST"); 1223 sc->sc_mediasw = &tlp_smc9332dst_mediasw; 1224 } 1225 1226 void 1227 tlp_smc9332dst_tmsw_init(sc) 1228 struct tulip_softc *sc; 1229 { 1230 struct tulip_21x4x_media *tm; 1231 const char *sep = ""; 1232 uint32_t reg; 1233 int i, cnt; 1234 1235 sc->sc_gp_dir = GPP_SMC9332DST_PINS; 1236 sc->sc_opmode = OPMODE_MBO | OPMODE_PS; 1237 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 1238 1239 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 1240 tlp_mediastatus); 1241 printf("%s: ", sc->sc_dev.dv_xname); 1242 1243 #define ADD(m, c) \ 1244 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK|M_ZERO); \ 1245 tm->tm_opmode = (c); \ 1246 tm->tm_gpdata = GPP_SMC9332DST_INIT; \ 1247 ifmedia_add(&sc->sc_mii.mii_media, (m), 0, tm) 1248 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 1249 1250 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0), OPMODE_TTM); 1251 PRINT("10baseT"); 1252 1253 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, 0), 1254 OPMODE_TTM | OPMODE_FD); 1255 PRINT("10baseT-FDX"); 1256 1257 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 1258 OPMODE_PS | OPMODE_PCS | OPMODE_SCR); 1259 PRINT("100baseTX"); 1260 1261 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, 0), 1262 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD); 1263 PRINT("100baseTX-FDX"); 1264 1265 #undef ADD 1266 #undef PRINT 1267 1268 printf("\n"); 1269 1270 tlp_reset(sc); 1271 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode | OPMODE_PCS | OPMODE_SCR); 1272 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1273 delay(10); 1274 TULIP_WRITE(sc, CSR_GPP, GPP_SMC9332DST_INIT); 1275 delay(200000); 1276 cnt = 0; 1277 for (i = 1000; i > 0; i--) { 1278 reg = TULIP_READ(sc, CSR_GPP); 1279 if ((~reg & (GPP_SMC9332DST_OK10 | 1280 GPP_SMC9332DST_OK100)) == 0) { 1281 if (cnt++ > 100) { 1282 break; 1283 } 1284 } else if ((reg & GPP_SMC9332DST_OK10) == 0) { 1285 break; 1286 } else { 1287 cnt = 0; 1288 } 1289 delay(1000); 1290 } 1291 if (cnt > 100) { 1292 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX); 1293 } else { 1294 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 1295 } 1296 } 1297 1298 void 1299 tlp_pci_vpc_21140_quirks(psc, enaddr) 1300 struct tulip_pci_softc *psc; 1301 const u_int8_t *enaddr; 1302 { 1303 struct tulip_softc *sc = &psc->sc_tulip; 1304 char *p1 = (char *) &sc->sc_srom[32]; 1305 char *p2 = &sc->sc_name[0]; 1306 1307 do { 1308 if (*p1 < 0) 1309 *p2++ = ' '; 1310 else 1311 *p2++ = *p1; 1312 } while (*p1++); 1313 } 1314 1315 void tlp_pci_cobalt_21142_reset __P((struct tulip_softc *)); 1316 1317 void 1318 tlp_pci_cobalt_21142_quirks(psc, enaddr) 1319 struct tulip_pci_softc *psc; 1320 const u_int8_t *enaddr; 1321 { 1322 struct tulip_softc *sc = &psc->sc_tulip; 1323 1324 /* 1325 * Cobalt Networks interfaces are just MII-on-SIO. 1326 */ 1327 sc->sc_reset = tlp_pci_cobalt_21142_reset; 1328 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1329 1330 /* 1331 * The Cobalt systems tend to fall back to store-and-forward 1332 * pretty quickly, so we select that from the beginning to 1333 * avoid initial timeouts. 1334 */ 1335 sc->sc_txthresh = TXTH_SF; 1336 } 1337 1338 void 1339 tlp_pci_cobalt_21142_reset(sc) 1340 struct tulip_softc *sc; 1341 { 1342 /* 1343 * Reset PHY. 1344 */ 1345 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE | (1 << 16)); 1346 delay(10); 1347 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE); 1348 delay(10); 1349 } 1350 1351 void 1352 tlp_pci_algor_21142_quirks(psc, enaddr) 1353 struct tulip_pci_softc *psc; 1354 const u_int8_t *enaddr; 1355 { 1356 struct tulip_softc *sc = &psc->sc_tulip; 1357 1358 /* 1359 * Algorithmics boards just have MII-on-SIO. 1360 * 1361 * XXX They also have AUI on the serial interface. 1362 * XXX Deal with this. 1363 */ 1364 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1365 } 1366 1367 /* 1368 * Cogent EM1x0 (aka. Adaptec ANA-6910) media switch. 1369 */ 1370 void tlp_cogent_em1x0_tmsw_init __P((struct tulip_softc *)); 1371 1372 const struct tulip_mediasw tlp_cogent_em1x0_mediasw = { 1373 tlp_cogent_em1x0_tmsw_init, 1374 tlp_21140_gpio_get, 1375 tlp_21140_gpio_set 1376 }; 1377 1378 void 1379 tlp_pci_adaptec_quirks(psc, enaddr) 1380 struct tulip_pci_softc *psc; 1381 const u_int8_t *enaddr; 1382 { 1383 struct tulip_softc *sc = &psc->sc_tulip; 1384 uint8_t *srom = sc->sc_srom, id0; 1385 uint16_t id1, id2; 1386 1387 if (sc->sc_mediasw == NULL) { 1388 id0 = srom[32]; 1389 switch (id0) { 1390 case 0x12: 1391 strcpy(psc->sc_tulip.sc_name, "Cogent EM100TX"); 1392 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1393 break; 1394 1395 case 0x15: 1396 strcpy(psc->sc_tulip.sc_name, "Cogent EM100FX"); 1397 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1398 break; 1399 1400 #if 0 1401 case XXX: 1402 strcpy(psc->sc_tulip.sc_name, "Cogent EM110TX"); 1403 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1404 break; 1405 #endif 1406 1407 default: 1408 printf("%s: unknown Cogent board ID 0x%02x\n", 1409 sc->sc_dev.dv_xname, id0); 1410 } 1411 return; 1412 } 1413 1414 id1 = TULIP_ROM_GETW(srom, 0); 1415 id2 = TULIP_ROM_GETW(srom, 2); 1416 if (id1 != 0x1109) { 1417 goto unknown; 1418 } 1419 1420 switch (id2) { 1421 case 0x1900: 1422 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911"); 1423 break; 1424 1425 case 0x2400: 1426 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6944A"); 1427 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1428 break; 1429 1430 case 0x2b00: 1431 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911A"); 1432 break; 1433 1434 case 0x3000: 1435 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6922"); 1436 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1437 break; 1438 1439 default: 1440 unknown: 1441 printf("%s: unknown Adaptec/Cogent board ID 0x%04x/0x%04x\n", 1442 sc->sc_dev.dv_xname, id1, id2); 1443 } 1444 } 1445 1446 void 1447 tlp_cogent_em1x0_tmsw_init(sc) 1448 struct tulip_softc *sc; 1449 { 1450 struct tulip_21x4x_media *tm; 1451 const char *sep = ""; 1452 1453 sc->sc_gp_dir = GPP_COGENT_EM1x0_PINS; 1454 sc->sc_opmode = OPMODE_MBO | OPMODE_PS; 1455 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 1456 1457 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 1458 tlp_mediastatus); 1459 printf("%s: ", sc->sc_dev.dv_xname); 1460 1461 #define ADD(m, c) \ 1462 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK|M_ZERO); \ 1463 tm->tm_opmode = (c); \ 1464 tm->tm_gpdata = GPP_COGENT_EM1x0_INIT; \ 1465 ifmedia_add(&sc->sc_mii.mii_media, (m), 0, tm) 1466 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 1467 1468 if (sc->sc_srom[32] == 0x15) { 1469 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, 0, 0), 1470 OPMODE_PS | OPMODE_PCS); 1471 PRINT("100baseFX"); 1472 1473 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0), 1474 OPMODE_PS | OPMODE_PCS | OPMODE_FD); 1475 PRINT("100baseFX-FDX"); 1476 printf("\n"); 1477 1478 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_FX); 1479 } else { 1480 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 1481 OPMODE_PS | OPMODE_PCS | OPMODE_SCR); 1482 PRINT("100baseTX"); 1483 1484 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0), 1485 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD); 1486 PRINT("100baseTX-FDX"); 1487 printf("\n"); 1488 1489 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX); 1490 } 1491 1492 #undef ADD 1493 #undef PRINT 1494 } 1495 1496 void tlp_pci_netwinder_21142_reset(struct tulip_softc *); 1497 1498 void 1499 tlp_pci_netwinder_21142_quirks(psc, enaddr) 1500 struct tulip_pci_softc *psc; 1501 const u_int8_t *enaddr; 1502 { 1503 struct tulip_softc *sc = &psc->sc_tulip; 1504 1505 /* 1506 * Netwinders just use MII-on_SIO. 1507 */ 1508 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1509 sc->sc_reset = tlp_pci_netwinder_21142_reset; 1510 } 1511 1512 void 1513 tlp_pci_netwinder_21142_reset(sc) 1514 struct tulip_softc *sc; 1515 { 1516 1517 /* 1518 * Reset the PHY. 1519 */ 1520 TULIP_WRITE(sc, CSR_SIAGEN, 0x0821 << 16); 1521 delay(10); 1522 TULIP_WRITE(sc, CSR_SIAGEN, 0x0000 << 16); 1523 delay(10); 1524 TULIP_WRITE(sc, CSR_SIAGEN, 0x0001 << 16); 1525 delay(10); 1526 } 1527
Indexes created Sat Sep 20 22:09:52 GMT 2025