if_tlp_pci.c revision 1.72
1 /* $NetBSD: if_tlp_pci.c,v 1.72 2003/03/10 20:50:22 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center; and Charles M. Hannum. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * PCI bus front-end for the Digital Semiconductor ``Tulip'' (21x4x) 42 * Ethernet controller family driver. 43 */ 44 45 #include <sys/cdefs.h> 46 __KERNEL_RCSID(0, "$NetBSD: if_tlp_pci.c,v 1.72 2003/03/10 20:50:22 thorpej Exp $"); 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/mbuf.h> 51 #include <sys/malloc.h> 52 #include <sys/kernel.h> 53 #include <sys/socket.h> 54 #include <sys/ioctl.h> 55 #include <sys/errno.h> 56 #include <sys/device.h> 57 58 #include <machine/endian.h> 59 60 #include <net/if.h> 61 #include <net/if_dl.h> 62 #include <net/if_media.h> 63 #include <net/if_ether.h> 64 65 #include <machine/bus.h> 66 #include <machine/intr.h> 67 68 #include <dev/mii/miivar.h> 69 #include <dev/mii/mii_bitbang.h> 70 71 #include <dev/ic/tulipreg.h> 72 #include <dev/ic/tulipvar.h> 73 74 #include <dev/pci/pcivar.h> 75 #include <dev/pci/pcireg.h> 76 #include <dev/pci/pcidevs.h> 77 78 /* 79 * PCI configuration space registers used by the Tulip. 80 */ 81 #define TULIP_PCI_IOBA 0x10 /* i/o mapped base */ 82 #define TULIP_PCI_MMBA 0x14 /* memory mapped base */ 83 #define TULIP_PCI_CFDA 0x40 /* configuration driver area */ 84 85 #define CFDA_SLEEP 0x80000000 /* sleep mode */ 86 #define CFDA_SNOOZE 0x40000000 /* snooze mode */ 87 88 struct tulip_pci_softc { 89 struct tulip_softc sc_tulip; /* real Tulip softc */ 90 91 /* PCI-specific goo. */ 92 void *sc_ih; /* interrupt handle */ 93 94 pci_chipset_tag_t sc_pc; /* our PCI chipset */ 95 pcitag_t sc_pcitag; /* our PCI tag */ 96 97 int sc_flags; /* flags; see below */ 98 99 LIST_HEAD(, tulip_pci_softc) sc_intrslaves; 100 LIST_ENTRY(tulip_pci_softc) sc_intrq; 101 102 /* Our {ROM,interrupt} master. */ 103 struct tulip_pci_softc *sc_master; 104 }; 105 106 /* sc_flags */ 107 #define TULIP_PCI_SHAREDINTR 0x01 /* interrupt is shared */ 108 #define TULIP_PCI_SLAVEINTR 0x02 /* interrupt is slave */ 109 #define TULIP_PCI_SHAREDROM 0x04 /* ROM is shared */ 110 #define TULIP_PCI_SLAVEROM 0x08 /* slave of shared ROM */ 111 112 int tlp_pci_match __P((struct device *, struct cfdata *, void *)); 113 void tlp_pci_attach __P((struct device *, struct device *, void *)); 114 115 CFATTACH_DECL(tlp_pci, sizeof(struct tulip_pci_softc), 116 tlp_pci_match, tlp_pci_attach, NULL, NULL); 117 118 const struct tulip_pci_product { 119 u_int32_t tpp_vendor; /* PCI vendor ID */ 120 u_int32_t tpp_product; /* PCI product ID */ 121 tulip_chip_t tpp_chip; /* base Tulip chip type */ 122 } tlp_pci_products[] = { 123 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21040, 124 TULIP_CHIP_21040 }, 125 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21041, 126 TULIP_CHIP_21041 }, 127 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21140, 128 TULIP_CHIP_21140 }, 129 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142, 130 TULIP_CHIP_21142 }, 131 132 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C168, 133 TULIP_CHIP_82C168 }, 134 135 /* 136 * Note: This is like a MX98725 with Wake-On-LAN and a 137 * 128-bit multicast hash table. 138 */ 139 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C115, 140 TULIP_CHIP_82C115 }, 141 142 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98713, 143 TULIP_CHIP_MX98713 }, 144 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX987x5, 145 TULIP_CHIP_MX98715 }, 146 147 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100TX, 148 TULIP_CHIP_MX98713 }, 149 150 { PCI_VENDOR_WINBOND, PCI_PRODUCT_WINBOND_W89C840F, 151 TULIP_CHIP_WB89C840F }, 152 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100ATX, 153 TULIP_CHIP_WB89C840F }, 154 155 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9102, 156 TULIP_CHIP_DM9102 }, 157 158 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AL981, 159 TULIP_CHIP_AL981 }, 160 161 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN985, 162 TULIP_CHIP_AN985 }, 163 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN2242, 164 TULIP_CHIP_AN985 }, 165 166 #if 0 167 { PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX88140A, 168 TULIP_CHIP_AX88140 }, 169 #endif 170 171 { 0, 0, 172 TULIP_CHIP_INVALID }, 173 }; 174 175 struct tlp_pci_quirks { 176 void (*tpq_func) __P((struct tulip_pci_softc *, 177 const u_int8_t *)); 178 u_int8_t tpq_oui[3]; 179 }; 180 181 void tlp_pci_dec_quirks __P((struct tulip_pci_softc *, 182 const u_int8_t *)); 183 184 void tlp_pci_znyx_21040_quirks __P((struct tulip_pci_softc *, 185 const u_int8_t *)); 186 void tlp_pci_smc_21040_quirks __P((struct tulip_pci_softc *, 187 const u_int8_t *)); 188 void tlp_pci_cogent_21040_quirks __P((struct tulip_pci_softc *, 189 const u_int8_t *)); 190 void tlp_pci_accton_21040_quirks __P((struct tulip_pci_softc *, 191 const u_int8_t *)); 192 193 void tlp_pci_cobalt_21142_quirks __P((struct tulip_pci_softc *, 194 const u_int8_t *)); 195 void tlp_pci_algor_21142_quirks __P((struct tulip_pci_softc *, 196 const u_int8_t *)); 197 void tlp_pci_netwinder_21142_quirks __P((struct tulip_pci_softc *, 198 const u_int8_t *)); 199 200 void tlp_pci_adaptec_quirks __P((struct tulip_pci_softc *, 201 const u_int8_t *)); 202 203 const struct tlp_pci_quirks tlp_pci_21040_quirks[] = { 204 { tlp_pci_znyx_21040_quirks, { 0x00, 0xc0, 0x95 } }, 205 { tlp_pci_smc_21040_quirks, { 0x00, 0x00, 0xc0 } }, 206 { tlp_pci_cogent_21040_quirks, { 0x00, 0x00, 0x92 } }, 207 { tlp_pci_accton_21040_quirks, { 0x00, 0x00, 0xe8 } }, 208 { NULL, { 0, 0, 0 } } 209 }; 210 211 const struct tlp_pci_quirks tlp_pci_21041_quirks[] = { 212 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 213 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 214 { NULL, { 0, 0, 0 } } 215 }; 216 217 void tlp_pci_asante_21140_quirks __P((struct tulip_pci_softc *, 218 const u_int8_t *)); 219 void tlp_pci_smc_21140_quirks __P((struct tulip_pci_softc *, 220 const u_int8_t *)); 221 void tlp_pci_vpc_21140_quirks __P((struct tulip_pci_softc *, 222 const u_int8_t *)); 223 224 const struct tlp_pci_quirks tlp_pci_21140_quirks[] = { 225 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 226 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 227 { tlp_pci_asante_21140_quirks, { 0x00, 0x00, 0x94 } }, 228 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0x92 } }, 229 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } }, 230 { tlp_pci_smc_21140_quirks, { 0x00, 0x00, 0xc0 } }, 231 { tlp_pci_vpc_21140_quirks, { 0x00, 0x03, 0xff } }, 232 { NULL, { 0, 0, 0 } } 233 }; 234 235 const struct tlp_pci_quirks tlp_pci_21142_quirks[] = { 236 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 237 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 238 { tlp_pci_cobalt_21142_quirks, { 0x00, 0x10, 0xe0 } }, 239 { tlp_pci_algor_21142_quirks, { 0x00, 0x40, 0xbc } }, 240 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } }, 241 { tlp_pci_netwinder_21142_quirks,{ 0x00, 0x10, 0x57 } }, 242 { NULL, { 0, 0, 0 } } 243 }; 244 245 int tlp_pci_shared_intr __P((void *)); 246 247 const struct tulip_pci_product *tlp_pci_lookup 248 __P((const struct pci_attach_args *)); 249 void tlp_pci_get_quirks __P((struct tulip_pci_softc *, const u_int8_t *, 250 const struct tlp_pci_quirks *)); 251 void tlp_pci_check_slaved __P((struct tulip_pci_softc *, int, int)); 252 253 const struct tulip_pci_product * 254 tlp_pci_lookup(pa) 255 const struct pci_attach_args *pa; 256 { 257 const struct tulip_pci_product *tpp; 258 259 for (tpp = tlp_pci_products; 260 tlp_chip_names[tpp->tpp_chip] != NULL; 261 tpp++) { 262 if (PCI_VENDOR(pa->pa_id) == tpp->tpp_vendor && 263 PCI_PRODUCT(pa->pa_id) == tpp->tpp_product) 264 return (tpp); 265 } 266 return (NULL); 267 } 268 269 void 270 tlp_pci_get_quirks(psc, enaddr, tpq) 271 struct tulip_pci_softc *psc; 272 const u_int8_t *enaddr; 273 const struct tlp_pci_quirks *tpq; 274 { 275 276 for (; tpq->tpq_func != NULL; tpq++) { 277 if (tpq->tpq_oui[0] == enaddr[0] && 278 tpq->tpq_oui[1] == enaddr[1] && 279 tpq->tpq_oui[2] == enaddr[2]) { 280 (*tpq->tpq_func)(psc, enaddr); 281 return; 282 } 283 } 284 } 285 286 void 287 tlp_pci_check_slaved(psc, shared, slaved) 288 struct tulip_pci_softc *psc; 289 int shared, slaved; 290 { 291 extern struct cfdriver tlp_cd; 292 struct tulip_pci_softc *cur, *best = NULL; 293 struct tulip_softc *sc = &psc->sc_tulip; 294 int i; 295 296 /* 297 * First of all, find the lowest pcidev numbered device on our 298 * bus marked as shared. That should be our master. 299 */ 300 for (i = 0; i < tlp_cd.cd_ndevs; i++) { 301 if ((cur = tlp_cd.cd_devs[i]) == NULL) 302 continue; 303 if (cur->sc_tulip.sc_dev.dv_parent != sc->sc_dev.dv_parent) 304 continue; 305 if ((cur->sc_flags & shared) == 0) 306 continue; 307 if (cur == psc) 308 continue; 309 if (best == NULL || 310 best->sc_tulip.sc_devno > cur->sc_tulip.sc_devno) 311 best = cur; 312 } 313 314 if (best != NULL) { 315 psc->sc_master = best; 316 psc->sc_flags |= (shared | slaved); 317 } 318 } 319 320 int 321 tlp_pci_match(parent, match, aux) 322 struct device *parent; 323 struct cfdata *match; 324 void *aux; 325 { 326 struct pci_attach_args *pa = aux; 327 328 if (tlp_pci_lookup(pa) != NULL) 329 return (10); /* beat if_de.c */ 330 331 return (0); 332 } 333 334 void 335 tlp_pci_attach(parent, self, aux) 336 struct device *parent, *self; 337 void *aux; 338 { 339 struct tulip_pci_softc *psc = (void *) self; 340 struct tulip_softc *sc = &psc->sc_tulip; 341 struct pci_attach_args *pa = aux; 342 pci_chipset_tag_t pc = pa->pa_pc; 343 pci_intr_handle_t ih; 344 const char *intrstr = NULL; 345 bus_space_tag_t iot, memt; 346 bus_space_handle_t ioh, memh; 347 int ioh_valid, memh_valid, i, j; 348 const struct tulip_pci_product *tpp; 349 u_int8_t enaddr[ETHER_ADDR_LEN]; 350 u_int32_t val; 351 pcireg_t reg; 352 int pmreg; 353 354 sc->sc_devno = pa->pa_device; 355 psc->sc_pc = pa->pa_pc; 356 psc->sc_pcitag = pa->pa_tag; 357 358 LIST_INIT(&psc->sc_intrslaves); 359 360 tpp = tlp_pci_lookup(pa); 361 if (tpp == NULL) { 362 printf("\n"); 363 panic("tlp_pci_attach: impossible"); 364 } 365 sc->sc_chip = tpp->tpp_chip; 366 367 /* 368 * By default, Tulip registers are 8 bytes long (4 bytes 369 * followed by a 4 byte pad). 370 */ 371 sc->sc_regshift = 3; 372 373 /* 374 * No power management hooks. 375 * XXX Maybe we should add some! 376 */ 377 sc->sc_flags |= TULIPF_ENABLED; 378 379 /* 380 * Get revision info, and set some chip-specific variables. 381 */ 382 sc->sc_rev = PCI_REVISION(pa->pa_class); 383 switch (sc->sc_chip) { 384 case TULIP_CHIP_21140: 385 if (sc->sc_rev >= 0x20) 386 sc->sc_chip = TULIP_CHIP_21140A; 387 break; 388 389 case TULIP_CHIP_21142: 390 if (sc->sc_rev >= 0x20) 391 sc->sc_chip = TULIP_CHIP_21143; 392 break; 393 394 case TULIP_CHIP_82C168: 395 if (sc->sc_rev >= 0x20) 396 sc->sc_chip = TULIP_CHIP_82C169; 397 break; 398 399 case TULIP_CHIP_MX98713: 400 if (sc->sc_rev >= 0x10) 401 sc->sc_chip = TULIP_CHIP_MX98713A; 402 break; 403 404 case TULIP_CHIP_MX98715: 405 if (sc->sc_rev >= 0x20) 406 sc->sc_chip = TULIP_CHIP_MX98715A; 407 if (sc->sc_rev >= 0x25) 408 sc->sc_chip = TULIP_CHIP_MX98715AEC_X; 409 if (sc->sc_rev >= 0x30) 410 sc->sc_chip = TULIP_CHIP_MX98725; 411 break; 412 413 case TULIP_CHIP_WB89C840F: 414 sc->sc_regshift = 2; 415 break; 416 417 case TULIP_CHIP_AN985: 418 /* 419 * The AN983 and AN985 are very similar, and are 420 * differentiated by a "signature" register that 421 * is like, but not identical, to a PCI ID register. 422 */ 423 reg = pci_conf_read(pc, pa->pa_tag, 0x80); 424 switch (reg) { 425 case 0x09811317: 426 sc->sc_chip = TULIP_CHIP_AN985; 427 break; 428 429 case 0x09851317: 430 sc->sc_chip = TULIP_CHIP_AN983; 431 break; 432 433 default: 434 /* Unknown -- use default. */ 435 break; 436 } 437 break; 438 439 case TULIP_CHIP_AX88140: 440 if (sc->sc_rev >= 0x10) 441 sc->sc_chip = TULIP_CHIP_AX88141; 442 break; 443 444 case TULIP_CHIP_DM9102: 445 if (sc->sc_rev >= 0x30) 446 sc->sc_chip = TULIP_CHIP_DM9102A; 447 break; 448 449 default: 450 /* Nothing. */ 451 break; 452 } 453 454 printf(": %s Ethernet, pass %d.%d\n", 455 tlp_chip_names[sc->sc_chip], 456 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf); 457 458 switch (sc->sc_chip) { 459 case TULIP_CHIP_21040: 460 if (sc->sc_rev < 0x20) { 461 printf("%s: 21040 must be at least pass 2.0\n", 462 sc->sc_dev.dv_xname); 463 return; 464 } 465 break; 466 467 case TULIP_CHIP_21140: 468 if (sc->sc_rev < 0x11) { 469 printf("%s: 21140 must be at least pass 1.1\n", 470 sc->sc_dev.dv_xname); 471 return; 472 } 473 break; 474 475 default: 476 /* Nothing. */ 477 break; 478 } 479 480 /* 481 * Check to see if the device is in power-save mode, and 482 * being it out if necessary. 483 */ 484 switch (sc->sc_chip) { 485 case TULIP_CHIP_21140: 486 case TULIP_CHIP_21140A: 487 case TULIP_CHIP_21142: 488 case TULIP_CHIP_21143: 489 case TULIP_CHIP_MX98713A: 490 case TULIP_CHIP_MX98715: 491 case TULIP_CHIP_MX98715A: 492 case TULIP_CHIP_MX98715AEC_X: 493 case TULIP_CHIP_MX98725: 494 case TULIP_CHIP_DM9102: 495 case TULIP_CHIP_DM9102A: 496 /* 497 * Clear the "sleep mode" bit in the CFDA register. 498 */ 499 reg = pci_conf_read(pc, pa->pa_tag, TULIP_PCI_CFDA); 500 if (reg & (CFDA_SLEEP|CFDA_SNOOZE)) 501 pci_conf_write(pc, pa->pa_tag, TULIP_PCI_CFDA, 502 reg & ~(CFDA_SLEEP|CFDA_SNOOZE)); 503 break; 504 505 default: 506 /* Nothing. */ 507 break; 508 } 509 510 if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PWRMGMT, &pmreg, 0)) { 511 reg = pci_conf_read(pc, pa->pa_tag, pmreg + PCI_PMCSR); 512 switch (reg & PCI_PMCSR_STATE_MASK) { 513 case PCI_PMCSR_STATE_D1: 514 case PCI_PMCSR_STATE_D2: 515 printf("%s: waking up from power state D%d\n%s", 516 sc->sc_dev.dv_xname, 517 reg & PCI_PMCSR_STATE_MASK, sc->sc_dev.dv_xname); 518 pci_conf_write(pc, pa->pa_tag, pmreg + PCI_PMCSR, 519 (reg & ~PCI_PMCSR_STATE_MASK) | 520 PCI_PMCSR_STATE_D0); 521 break; 522 case PCI_PMCSR_STATE_D3: 523 /* 524 * The card has lost all configuration data in 525 * this state, so punt. 526 */ 527 printf("%s: unable to wake up from power state D3, " 528 "reboot required.\n", sc->sc_dev.dv_xname); 529 pci_conf_write(pc, pa->pa_tag, pmreg + PCI_PMCSR, 530 (reg & ~PCI_PMCSR_STATE_MASK) | 531 PCI_PMCSR_STATE_D0); 532 return; 533 } 534 } 535 536 /* 537 * Map the device. 538 */ 539 ioh_valid = (pci_mapreg_map(pa, TULIP_PCI_IOBA, 540 PCI_MAPREG_TYPE_IO, 0, 541 &iot, &ioh, NULL, NULL) == 0); 542 memh_valid = (pci_mapreg_map(pa, TULIP_PCI_MMBA, 543 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 544 &memt, &memh, NULL, NULL) == 0); 545 546 if (memh_valid) { 547 sc->sc_st = memt; 548 sc->sc_sh = memh; 549 } else if (ioh_valid) { 550 sc->sc_st = iot; 551 sc->sc_sh = ioh; 552 } else { 553 printf("%s: unable to map device registers\n", 554 sc->sc_dev.dv_xname); 555 return; 556 } 557 558 sc->sc_dmat = pa->pa_dmat; 559 560 /* 561 * Make sure bus mastering is enabled. 562 */ 563 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 564 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 565 PCI_COMMAND_MASTER_ENABLE); 566 567 /* 568 * Get the cacheline size. 569 */ 570 sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag, 571 PCI_BHLC_REG)); 572 573 /* 574 * Get PCI data moving command info. 575 */ 576 if (pa->pa_flags & PCI_FLAGS_MRL_OKAY) 577 sc->sc_flags |= TULIPF_MRL; 578 if (pa->pa_flags & PCI_FLAGS_MRM_OKAY) 579 sc->sc_flags |= TULIPF_MRM; 580 if (pa->pa_flags & PCI_FLAGS_MWI_OKAY) 581 sc->sc_flags |= TULIPF_MWI; 582 583 /* 584 * Read the contents of the Ethernet Address ROM/SROM. 585 */ 586 switch (sc->sc_chip) { 587 case TULIP_CHIP_21040: 588 sc->sc_srom_addrbits = 6; 589 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, M_NOWAIT); 590 TULIP_WRITE(sc, CSR_MIIROM, MIIROM_SROMCS); 591 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 592 for (j = 0; j < 10000; j++) { 593 val = TULIP_READ(sc, CSR_MIIROM); 594 if ((val & MIIROM_DN) == 0) 595 break; 596 } 597 sc->sc_srom[i] = val & MIIROM_DATA; 598 } 599 break; 600 601 case TULIP_CHIP_82C168: 602 case TULIP_CHIP_82C169: 603 { 604 sc->sc_srom_addrbits = 2; 605 sc->sc_srom = malloc(TULIP_ROM_SIZE(2), M_DEVBUF, M_NOWAIT); 606 607 /* 608 * The Lite-On PNIC stores the Ethernet address in 609 * the first 3 words of the EEPROM. EEPROM access 610 * is not like the other Tulip chips. 611 */ 612 for (i = 0; i < 6; i += 2) { 613 TULIP_WRITE(sc, CSR_PNIC_SROMCTL, 614 PNIC_SROMCTL_READ | (i >> 1)); 615 for (j = 0; j < 500; j++) { 616 delay(2); 617 val = TULIP_READ(sc, CSR_MIIROM); 618 if ((val & PNIC_MIIROM_BUSY) == 0) 619 break; 620 } 621 if (val & PNIC_MIIROM_BUSY) { 622 printf("%s: EEPROM timed out\n", 623 sc->sc_dev.dv_xname); 624 return; 625 } 626 val &= PNIC_MIIROM_DATA; 627 sc->sc_srom[i] = val >> 8; 628 sc->sc_srom[i + 1] = val & 0xff; 629 } 630 break; 631 } 632 633 default: 634 #ifdef algor 635 /* 636 * XXX This should be done with device properties, but 637 * XXX we don't have those yet. 638 */ 639 if (algor_get_ethaddr(pa, NULL)) { 640 extern int tlp_srom_debug; 641 sc->sc_srom_addrbits = 6; 642 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, 643 M_NOWAIT|M_ZERO); 644 algor_get_ethaddr(pa, sc->sc_srom); 645 if (tlp_srom_debug) { 646 printf("SROM CONTENTS:"); 647 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 648 if ((i % 8) == 0) 649 printf("\n\t"); 650 printf("0x%02x ", sc->sc_srom[i]); 651 } 652 printf("\n"); 653 } 654 break; 655 } 656 #endif /* algor */ 657 658 /* Check for a slaved ROM on a multi-port board. */ 659 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDROM, 660 TULIP_PCI_SLAVEROM); 661 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 662 sc->sc_srom_addrbits = 663 psc->sc_master->sc_tulip.sc_srom_addrbits; 664 sc->sc_srom = psc->sc_master->sc_tulip.sc_srom; 665 enaddr[5] += 666 sc->sc_devno - psc->sc_master->sc_tulip.sc_devno; 667 } 668 else if (tlp_read_srom(sc) == 0) 669 goto cant_cope; 670 break; 671 } 672 673 /* 674 * Deal with chip/board quirks. This includes setting up 675 * the mediasw, and extracting the Ethernet address from 676 * the rombuf. 677 */ 678 switch (sc->sc_chip) { 679 case TULIP_CHIP_21040: 680 /* 681 * Parse the Ethernet Address ROM. 682 */ 683 if (tlp_parse_old_srom(sc, enaddr) == 0) 684 goto cant_cope; 685 686 687 /* 688 * All 21040 boards start out with the same 689 * media switch. 690 */ 691 sc->sc_mediasw = &tlp_21040_mediasw; 692 693 /* 694 * Deal with any quirks this board might have. 695 */ 696 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21040_quirks); 697 break; 698 699 case TULIP_CHIP_21041: 700 /* Check for new format SROM. */ 701 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 702 /* 703 * Not an ISV SROM; try the old DEC Ethernet Address 704 * ROM format. 705 */ 706 if (tlp_parse_old_srom(sc, enaddr) == 0) 707 goto cant_cope; 708 } 709 710 /* 711 * All 21041 boards use the same media switch; they all 712 * work basically the same! Yippee! 713 */ 714 sc->sc_mediasw = &tlp_21041_mediasw; 715 716 /* 717 * Deal with any quirks this board might have. 718 */ 719 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21041_quirks); 720 break; 721 722 case TULIP_CHIP_21140: 723 case TULIP_CHIP_21140A: 724 /* Check for new format SROM. */ 725 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 726 /* 727 * Not an ISV SROM; try the old DEC Ethernet Address 728 * ROM format. 729 */ 730 if (tlp_parse_old_srom(sc, enaddr) == 0) 731 goto cant_cope; 732 } else { 733 /* 734 * We start out with the 2114x ISV media switch. 735 * When we search for quirks, we may change to 736 * a different switch. 737 */ 738 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 739 } 740 741 /* 742 * Deal with any quirks this board might have. 743 */ 744 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21140_quirks); 745 746 /* 747 * Bail out now if we can't deal with this board. 748 */ 749 if (sc->sc_mediasw == NULL) 750 goto cant_cope; 751 break; 752 753 case TULIP_CHIP_21142: 754 case TULIP_CHIP_21143: 755 /* Check for new format SROM. */ 756 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 757 /* 758 * Not an ISV SROM; try the old DEC Ethernet Address 759 * ROM format. 760 */ 761 if (tlp_parse_old_srom(sc, enaddr) == 0) { 762 /* 763 * One last try: just copy the address 764 * from offset 20 and try to look 765 * up quirks. 766 */ 767 memcpy(enaddr, &sc->sc_srom[20], 768 ETHER_ADDR_LEN); 769 } 770 } else { 771 /* 772 * We start out with the 2114x ISV media switch. 773 * When we search for quirks, we may change to 774 * a different switch. 775 */ 776 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 777 } 778 779 /* 780 * Deal with any quirks this board might have. 781 */ 782 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21142_quirks); 783 784 /* 785 * Bail out now if we can't deal with this board. 786 */ 787 if (sc->sc_mediasw == NULL) 788 goto cant_cope; 789 break; 790 791 case TULIP_CHIP_82C168: 792 case TULIP_CHIP_82C169: 793 /* 794 * Lite-On PNIC's Ethernet address is the first 6 795 * bytes of its EEPROM. 796 */ 797 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 798 799 /* 800 * Lite-On PNICs always use the same mediasw; we 801 * select MII vs. internal NWAY automatically. 802 */ 803 sc->sc_mediasw = &tlp_pnic_mediasw; 804 break; 805 806 case TULIP_CHIP_MX98713: 807 /* 808 * The Macronix MX98713 has an MII and GPIO, but no 809 * internal Nway block. This chip is basically a 810 * perfect 21140A clone, with the exception of the 811 * a magic register frobbing in order to make the 812 * interface function. 813 */ 814 if (tlp_isv_srom_enaddr(sc, enaddr)) { 815 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 816 break; 817 } 818 /* FALLTHROUGH */ 819 820 case TULIP_CHIP_82C115: 821 /* 822 * Yippee! The Lite-On 82C115 is a clone of 823 * the MX98725 (the data sheet even says `MXIC' 824 * on it)! Imagine that, a clone of a clone. 825 * 826 * The differences are really minimal: 827 * 828 * - Wake-On-LAN support 829 * - 128-bit multicast hash table, rather than 830 * the standard 512-bit hash table 831 */ 832 /* FALLTHROUGH */ 833 834 case TULIP_CHIP_MX98713A: 835 case TULIP_CHIP_MX98715A: 836 case TULIP_CHIP_MX98715AEC_X: 837 case TULIP_CHIP_MX98725: 838 /* 839 * The MX98713A has an MII as well as an internal Nway block, 840 * but no GPIO. The MX98715 and MX98725 have an internal 841 * Nway block only. 842 * 843 * The internal Nway block, unlike the Lite-On PNIC's, does 844 * just that - performs Nway. Once autonegotiation completes, 845 * we must program the GPR media information into the chip. 846 * 847 * The byte offset of the Ethernet address is stored at 848 * offset 0x70. 849 */ 850 memcpy(enaddr, &sc->sc_srom[sc->sc_srom[0x70]], ETHER_ADDR_LEN); 851 sc->sc_mediasw = &tlp_pmac_mediasw; 852 break; 853 854 case TULIP_CHIP_WB89C840F: 855 /* 856 * Winbond 89C840F's Ethernet address is the first 857 * 6 bytes of its EEPROM. 858 */ 859 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 860 861 /* 862 * Winbond 89C840F has an MII attached to the SIO. 863 */ 864 sc->sc_mediasw = &tlp_sio_mii_mediasw; 865 break; 866 867 case TULIP_CHIP_AL981: 868 /* 869 * The ADMtek AL981's Ethernet address is located 870 * at offset 8 of its EEPROM. 871 */ 872 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 873 874 /* 875 * ADMtek AL981 has a built-in PHY accessed through 876 * special registers. 877 */ 878 sc->sc_mediasw = &tlp_al981_mediasw; 879 break; 880 881 case TULIP_CHIP_AN983: 882 case TULIP_CHIP_AN985: 883 /* 884 * The ADMtek AN985's Ethernet address is located 885 * at offset 8 of its EEPROM. 886 */ 887 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 888 889 /* 890 * The ADMtek AN985 can be configured in Single-Chip 891 * mode or MAC-only mode. Single-Chip uses the built-in 892 * PHY, MAC-only has an external PHY (usually HomePNA). 893 * The selection is based on an EEPROM setting, and both 894 * PHYs are accessed via MII attached to SIO. 895 * 896 * The AN985 "ghosts" the internal PHY onto all 897 * MII addresses, so we have to use a media init 898 * routine that limits the search. 899 * XXX How does this work with MAC-only mode? 900 */ 901 sc->sc_mediasw = &tlp_an985_mediasw; 902 break; 903 904 case TULIP_CHIP_DM9102: 905 case TULIP_CHIP_DM9102A: 906 /* 907 * Some boards with the Davicom chip have an ISV 908 * SROM (mostly DM9102A boards -- trying to describe 909 * the HomePNA PHY, probably) although the data in 910 * them is generally wrong. Check for ISV format 911 * and grab the Ethernet address that way, and if 912 * that fails, fall back on grabbing it from an 913 * observed offset of 20 (which is where it would 914 * be in an ISV SROM anyhow, tho ISV can cope with 915 * multi-port boards). 916 */ 917 if (!tlp_isv_srom_enaddr(sc, enaddr)) { 918 #ifdef __sparc__ 919 if (!sc->sc_srom[20] && !sc->sc_srom[21] && 920 !sc->sc_srom[22]) { 921 extern void myetheraddr __P((u_char *)); 922 myetheraddr(enaddr); 923 } else 924 #endif 925 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN); 926 } 927 928 /* 929 * Davicom chips all have an internal MII interface 930 * and a built-in PHY. DM9102A also has a an external 931 * MII interface, usually with a HomePNA PHY attached 932 * to it. 933 */ 934 sc->sc_mediasw = &tlp_dm9102_mediasw; 935 break; 936 937 default: 938 cant_cope: 939 printf("%s: sorry, unable to handle your board\n", 940 sc->sc_dev.dv_xname); 941 return; 942 } 943 944 /* 945 * Handle shared interrupts. 946 */ 947 if (psc->sc_flags & TULIP_PCI_SHAREDINTR) { 948 if (psc->sc_master) 949 psc->sc_flags |= TULIP_PCI_SLAVEINTR; 950 else { 951 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDINTR, 952 TULIP_PCI_SLAVEINTR); 953 if (psc->sc_master == NULL) 954 psc->sc_master = psc; 955 } 956 LIST_INSERT_HEAD(&psc->sc_master->sc_intrslaves, 957 psc, sc_intrq); 958 } 959 960 if (psc->sc_flags & TULIP_PCI_SLAVEINTR) { 961 printf("%s: sharing interrupt with %s\n", 962 sc->sc_dev.dv_xname, 963 psc->sc_master->sc_tulip.sc_dev.dv_xname); 964 } else { 965 /* 966 * Map and establish our interrupt. 967 */ 968 if (pci_intr_map(pa, &ih)) { 969 printf("%s: unable to map interrupt\n", 970 sc->sc_dev.dv_xname); 971 return; 972 } 973 intrstr = pci_intr_string(pc, ih); 974 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, 975 (psc->sc_flags & TULIP_PCI_SHAREDINTR) ? 976 tlp_pci_shared_intr : tlp_intr, sc); 977 if (psc->sc_ih == NULL) { 978 printf("%s: unable to establish interrupt", 979 sc->sc_dev.dv_xname); 980 if (intrstr != NULL) 981 printf(" at %s", intrstr); 982 printf("\n"); 983 return; 984 } 985 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, 986 intrstr); 987 } 988 989 /* 990 * Finish off the attach. 991 */ 992 tlp_attach(sc, enaddr); 993 } 994 995 int 996 tlp_pci_shared_intr(arg) 997 void *arg; 998 { 999 struct tulip_pci_softc *master = arg, *slave; 1000 int rv = 0; 1001 1002 for (slave = LIST_FIRST(&master->sc_intrslaves); 1003 slave != NULL; 1004 slave = LIST_NEXT(slave, sc_intrq)) 1005 rv |= tlp_intr(&slave->sc_tulip); 1006 1007 return (rv); 1008 } 1009 1010 void 1011 tlp_pci_dec_quirks(psc, enaddr) 1012 struct tulip_pci_softc *psc; 1013 const u_int8_t *enaddr; 1014 { 1015 struct tulip_softc *sc = &psc->sc_tulip; 1016 1017 /* 1018 * This isn't really a quirk-gathering device, really. We 1019 * just want to get the spiffy DEC board name from the SROM. 1020 */ 1021 strcpy(sc->sc_name, "DEC "); 1022 1023 if (memcmp(&sc->sc_srom[29], "DE500", 5) == 0 || 1024 memcmp(&sc->sc_srom[29], "DE450", 5) == 0) 1025 memcpy(&sc->sc_name[4], &sc->sc_srom[29], 8); 1026 } 1027 1028 void 1029 tlp_pci_znyx_21040_quirks(psc, enaddr) 1030 struct tulip_pci_softc *psc; 1031 const u_int8_t *enaddr; 1032 { 1033 struct tulip_softc *sc = &psc->sc_tulip; 1034 u_int16_t id = 0; 1035 1036 /* 1037 * If we have a slaved ROM, just copy the bits from the master. 1038 * This is in case we fail the ROM ID check (older boards) and 1039 * need to fall back on Ethernet address model checking; that 1040 * will fail for slave chips. 1041 */ 1042 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 1043 strcpy(sc->sc_name, psc->sc_master->sc_tulip.sc_name); 1044 sc->sc_mediasw = psc->sc_master->sc_tulip.sc_mediasw; 1045 psc->sc_flags |= 1046 psc->sc_master->sc_flags & TULIP_PCI_SHAREDINTR; 1047 return; 1048 } 1049 1050 if (sc->sc_srom[32] == 0x4a && sc->sc_srom[33] == 0x52) { 1051 id = sc->sc_srom[37] | (sc->sc_srom[36] << 8); 1052 switch (id) { 1053 zx312: 1054 case 0x0602: /* ZX312 */ 1055 strcpy(sc->sc_name, "ZNYX ZX312"); 1056 return; 1057 1058 case 0x0622: /* ZX312T */ 1059 strcpy(sc->sc_name, "ZNYX ZX312T"); 1060 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1061 return; 1062 1063 zx314_inta: 1064 case 0x0701: /* ZX314 INTA */ 1065 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1066 /* FALLTHROUGH */ 1067 case 0x0711: /* ZX314 */ 1068 strcpy(sc->sc_name, "ZNYX ZX314"); 1069 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1070 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1071 return; 1072 1073 zx315_inta: 1074 case 0x0801: /* ZX315 INTA */ 1075 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1076 /* FALLTHROUGH */ 1077 case 0x0811: /* ZX315 */ 1078 strcpy(sc->sc_name, "ZNYX ZX315"); 1079 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1080 return; 1081 1082 default: 1083 id = 0; 1084 break; 1085 } 1086 } 1087 1088 /* 1089 * Deal with boards that have broken ROMs. 1090 */ 1091 if (id == 0) { 1092 if ((enaddr[3] & ~3) == 0xf0 && (enaddr[5] & 3) == 0x00) 1093 goto zx314_inta; 1094 if ((enaddr[3] & ~3) == 0xf4 && (enaddr[5] & 1) == 0x00) 1095 goto zx315_inta; 1096 if ((enaddr[3] & ~3) == 0xec) 1097 goto zx312; 1098 } 1099 1100 strcpy(sc->sc_name, "ZNYX ZX31x"); 1101 } 1102 1103 void 1104 tlp_pci_smc_21040_quirks(psc, enaddr) 1105 struct tulip_pci_softc *psc; 1106 const u_int8_t *enaddr; 1107 { 1108 struct tulip_softc *sc = &psc->sc_tulip; 1109 u_int16_t id1, id2, ei; 1110 int auibnc = 0, utp = 0; 1111 char *cp; 1112 1113 id1 = sc->sc_srom[0x60] | (sc->sc_srom[0x61] << 8); 1114 id2 = sc->sc_srom[0x62] | (sc->sc_srom[0x63] << 8); 1115 ei = sc->sc_srom[0x66] | (sc->sc_srom[0x67] << 8); 1116 1117 strcpy(sc->sc_name, "SMC 8432"); 1118 cp = &sc->sc_name[8]; 1119 1120 if ((id1 & 1) == 0) { 1121 *cp++ = 'B'; 1122 auibnc = 1; 1123 } 1124 if ((id1 & 0xff) > 0x32) { 1125 *cp++ = 'T'; 1126 utp = 1; 1127 } 1128 if ((id1 & 0x4000) == 0) { 1129 *cp++ = 'A'; 1130 auibnc = 1; 1131 } 1132 if (id2 == 0x15) { 1133 sc->sc_name[7] = '4'; 1134 *cp++ = '-'; 1135 *cp++ = 'C'; 1136 *cp++ = 'H'; 1137 *cp++ = ei ? '2' : '1'; 1138 } 1139 *cp = '\0'; 1140 1141 if (utp != 0 && auibnc == 0) 1142 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1143 else if (utp == 0 && auibnc != 0) 1144 sc->sc_mediasw = &tlp_21040_auibnc_mediasw; 1145 } 1146 1147 void 1148 tlp_pci_cogent_21040_quirks(psc, enaddr) 1149 struct tulip_pci_softc *psc; 1150 const u_int8_t *enaddr; 1151 { 1152 1153 strcpy(psc->sc_tulip.sc_name, "Cogent multi-port"); 1154 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1155 } 1156 1157 void 1158 tlp_pci_accton_21040_quirks(psc, enaddr) 1159 struct tulip_pci_softc *psc; 1160 const u_int8_t *enaddr; 1161 { 1162 1163 strcpy(psc->sc_tulip.sc_name, "ACCTON EN1203"); 1164 } 1165 1166 void tlp_pci_asante_21140_reset __P((struct tulip_softc *)); 1167 1168 void 1169 tlp_pci_asante_21140_quirks(psc, enaddr) 1170 struct tulip_pci_softc *psc; 1171 const u_int8_t *enaddr; 1172 { 1173 struct tulip_softc *sc = &psc->sc_tulip; 1174 1175 /* 1176 * Some Asante boards don't use the ISV SROM format. For 1177 * those that don't, we initialize the GPIO direction bits, 1178 * and provide our own reset hook, which resets the MII. 1179 * 1180 * All of these boards use SIO-attached-MII media. 1181 */ 1182 if (sc->sc_mediasw == &tlp_2114x_isv_mediasw) 1183 return; 1184 1185 strcpy(sc->sc_name, "Asante"); 1186 1187 sc->sc_gp_dir = 0xbf; 1188 sc->sc_reset = tlp_pci_asante_21140_reset; 1189 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1190 } 1191 1192 void 1193 tlp_pci_asante_21140_reset(sc) 1194 struct tulip_softc *sc; 1195 { 1196 1197 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1198 TULIP_WRITE(sc, CSR_GPP, 0x8); 1199 delay(100); 1200 TULIP_WRITE(sc, CSR_GPP, 0); 1201 } 1202 1203 /* 1204 * SMC 9332DST media switch. 1205 */ 1206 void tlp_smc9332dst_tmsw_init __P((struct tulip_softc *)); 1207 1208 const struct tulip_mediasw tlp_smc9332dst_mediasw = { 1209 tlp_smc9332dst_tmsw_init, 1210 tlp_21140_gpio_get, 1211 tlp_21140_gpio_set 1212 }; 1213 1214 void 1215 tlp_pci_smc_21140_quirks(psc, enaddr) 1216 struct tulip_pci_softc *psc; 1217 const u_int8_t *enaddr; 1218 { 1219 struct tulip_softc *sc = &psc->sc_tulip; 1220 1221 if (sc->sc_mediasw != NULL) { 1222 return; 1223 } 1224 strcpy(psc->sc_tulip.sc_name, "SMC 9332DST"); 1225 sc->sc_mediasw = &tlp_smc9332dst_mediasw; 1226 } 1227 1228 void 1229 tlp_smc9332dst_tmsw_init(sc) 1230 struct tulip_softc *sc; 1231 { 1232 struct tulip_21x4x_media *tm; 1233 const char *sep = ""; 1234 uint32_t reg; 1235 int i, cnt; 1236 1237 sc->sc_gp_dir = GPP_SMC9332DST_PINS; 1238 sc->sc_opmode = OPMODE_MBO | OPMODE_PS; 1239 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 1240 1241 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 1242 tlp_mediastatus); 1243 printf("%s: ", sc->sc_dev.dv_xname); 1244 1245 #define ADD(m, c) \ 1246 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK|M_ZERO); \ 1247 tm->tm_opmode = (c); \ 1248 tm->tm_gpdata = GPP_SMC9332DST_INIT; \ 1249 ifmedia_add(&sc->sc_mii.mii_media, (m), 0, tm) 1250 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 1251 1252 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0), OPMODE_TTM); 1253 PRINT("10baseT"); 1254 1255 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, 0), 1256 OPMODE_TTM | OPMODE_FD); 1257 PRINT("10baseT-FDX"); 1258 1259 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 1260 OPMODE_PS | OPMODE_PCS | OPMODE_SCR); 1261 PRINT("100baseTX"); 1262 1263 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, 0), 1264 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD); 1265 PRINT("100baseTX-FDX"); 1266 1267 #undef ADD 1268 #undef PRINT 1269 1270 printf("\n"); 1271 1272 tlp_reset(sc); 1273 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode | OPMODE_PCS | OPMODE_SCR); 1274 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1275 delay(10); 1276 TULIP_WRITE(sc, CSR_GPP, GPP_SMC9332DST_INIT); 1277 delay(200000); 1278 cnt = 0; 1279 for (i = 1000; i > 0; i--) { 1280 reg = TULIP_READ(sc, CSR_GPP); 1281 if ((~reg & (GPP_SMC9332DST_OK10 | 1282 GPP_SMC9332DST_OK100)) == 0) { 1283 if (cnt++ > 100) { 1284 break; 1285 } 1286 } else if ((reg & GPP_SMC9332DST_OK10) == 0) { 1287 break; 1288 } else { 1289 cnt = 0; 1290 } 1291 delay(1000); 1292 } 1293 if (cnt > 100) { 1294 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX); 1295 } else { 1296 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 1297 } 1298 } 1299 1300 void 1301 tlp_pci_vpc_21140_quirks(psc, enaddr) 1302 struct tulip_pci_softc *psc; 1303 const u_int8_t *enaddr; 1304 { 1305 struct tulip_softc *sc = &psc->sc_tulip; 1306 char *p1 = (char *) &sc->sc_srom[32]; 1307 char *p2 = &sc->sc_name[0]; 1308 1309 do { 1310 if ((unsigned char) *p1 & 0x80) 1311 *p2++ = ' '; 1312 else 1313 *p2++ = *p1; 1314 } while (*p1++); 1315 } 1316 1317 void tlp_pci_cobalt_21142_reset __P((struct tulip_softc *)); 1318 1319 void 1320 tlp_pci_cobalt_21142_quirks(psc, enaddr) 1321 struct tulip_pci_softc *psc; 1322 const u_int8_t *enaddr; 1323 { 1324 struct tulip_softc *sc = &psc->sc_tulip; 1325 1326 /* 1327 * Cobalt Networks interfaces are just MII-on-SIO. 1328 */ 1329 sc->sc_reset = tlp_pci_cobalt_21142_reset; 1330 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1331 1332 /* 1333 * The Cobalt systems tend to fall back to store-and-forward 1334 * pretty quickly, so we select that from the beginning to 1335 * avoid initial timeouts. 1336 */ 1337 sc->sc_txthresh = TXTH_SF; 1338 } 1339 1340 void 1341 tlp_pci_cobalt_21142_reset(sc) 1342 struct tulip_softc *sc; 1343 { 1344 /* 1345 * Reset PHY. 1346 */ 1347 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE | (1 << 16)); 1348 delay(10); 1349 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE); 1350 delay(10); 1351 } 1352 1353 void 1354 tlp_pci_algor_21142_quirks(psc, enaddr) 1355 struct tulip_pci_softc *psc; 1356 const u_int8_t *enaddr; 1357 { 1358 struct tulip_softc *sc = &psc->sc_tulip; 1359 1360 /* 1361 * Algorithmics boards just have MII-on-SIO. 1362 * 1363 * XXX They also have AUI on the serial interface. 1364 * XXX Deal with this. 1365 */ 1366 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1367 } 1368 1369 /* 1370 * Cogent EM1x0 (aka. Adaptec ANA-6910) media switch. 1371 */ 1372 void tlp_cogent_em1x0_tmsw_init __P((struct tulip_softc *)); 1373 1374 const struct tulip_mediasw tlp_cogent_em1x0_mediasw = { 1375 tlp_cogent_em1x0_tmsw_init, 1376 tlp_21140_gpio_get, 1377 tlp_21140_gpio_set 1378 }; 1379 1380 void 1381 tlp_pci_adaptec_quirks(psc, enaddr) 1382 struct tulip_pci_softc *psc; 1383 const u_int8_t *enaddr; 1384 { 1385 struct tulip_softc *sc = &psc->sc_tulip; 1386 uint8_t *srom = sc->sc_srom, id0; 1387 uint16_t id1, id2; 1388 1389 if (sc->sc_mediasw == NULL) { 1390 id0 = srom[32]; 1391 switch (id0) { 1392 case 0x12: 1393 strcpy(psc->sc_tulip.sc_name, "Cogent EM100TX"); 1394 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1395 break; 1396 1397 case 0x15: 1398 strcpy(psc->sc_tulip.sc_name, "Cogent EM100FX"); 1399 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1400 break; 1401 1402 #if 0 1403 case XXX: 1404 strcpy(psc->sc_tulip.sc_name, "Cogent EM110TX"); 1405 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1406 break; 1407 #endif 1408 1409 default: 1410 printf("%s: unknown Cogent board ID 0x%02x\n", 1411 sc->sc_dev.dv_xname, id0); 1412 } 1413 return; 1414 } 1415 1416 id1 = TULIP_ROM_GETW(srom, 0); 1417 id2 = TULIP_ROM_GETW(srom, 2); 1418 if (id1 != 0x1109) { 1419 goto unknown; 1420 } 1421 1422 switch (id2) { 1423 case 0x1900: 1424 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911"); 1425 break; 1426 1427 case 0x2400: 1428 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6944A"); 1429 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1430 break; 1431 1432 case 0x2b00: 1433 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911A"); 1434 break; 1435 1436 case 0x3000: 1437 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6922"); 1438 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1439 break; 1440 1441 default: 1442 unknown: 1443 printf("%s: unknown Adaptec/Cogent board ID 0x%04x/0x%04x\n", 1444 sc->sc_dev.dv_xname, id1, id2); 1445 } 1446 } 1447 1448 void 1449 tlp_cogent_em1x0_tmsw_init(sc) 1450 struct tulip_softc *sc; 1451 { 1452 struct tulip_21x4x_media *tm; 1453 const char *sep = ""; 1454 1455 sc->sc_gp_dir = GPP_COGENT_EM1x0_PINS; 1456 sc->sc_opmode = OPMODE_MBO | OPMODE_PS; 1457 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 1458 1459 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 1460 tlp_mediastatus); 1461 printf("%s: ", sc->sc_dev.dv_xname); 1462 1463 #define ADD(m, c) \ 1464 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK|M_ZERO); \ 1465 tm->tm_opmode = (c); \ 1466 tm->tm_gpdata = GPP_COGENT_EM1x0_INIT; \ 1467 ifmedia_add(&sc->sc_mii.mii_media, (m), 0, tm) 1468 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 1469 1470 if (sc->sc_srom[32] == 0x15) { 1471 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, 0, 0), 1472 OPMODE_PS | OPMODE_PCS); 1473 PRINT("100baseFX"); 1474 1475 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0), 1476 OPMODE_PS | OPMODE_PCS | OPMODE_FD); 1477 PRINT("100baseFX-FDX"); 1478 printf("\n"); 1479 1480 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_FX); 1481 } else { 1482 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 1483 OPMODE_PS | OPMODE_PCS | OPMODE_SCR); 1484 PRINT("100baseTX"); 1485 1486 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0), 1487 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD); 1488 PRINT("100baseTX-FDX"); 1489 printf("\n"); 1490 1491 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX); 1492 } 1493 1494 #undef ADD 1495 #undef PRINT 1496 } 1497 1498 void tlp_pci_netwinder_21142_reset(struct tulip_softc *); 1499 1500 void 1501 tlp_pci_netwinder_21142_quirks(psc, enaddr) 1502 struct tulip_pci_softc *psc; 1503 const u_int8_t *enaddr; 1504 { 1505 struct tulip_softc *sc = &psc->sc_tulip; 1506 1507 /* 1508 * Netwinders just use MII-on_SIO. 1509 */ 1510 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1511 sc->sc_reset = tlp_pci_netwinder_21142_reset; 1512 } 1513 1514 void 1515 tlp_pci_netwinder_21142_reset(sc) 1516 struct tulip_softc *sc; 1517 { 1518 1519 /* 1520 * Reset the PHY. 1521 */ 1522 TULIP_WRITE(sc, CSR_SIAGEN, 0x0821 << 16); 1523 delay(10); 1524 TULIP_WRITE(sc, CSR_SIAGEN, 0x0000 << 16); 1525 delay(10); 1526 TULIP_WRITE(sc, CSR_SIAGEN, 0x0001 << 16); 1527 delay(10); 1528 } 1529
Indexes created Fri Sep 26 20:09:58 GMT 2025