if_tlp_pci.c revision 1.73
1 /* $NetBSD: if_tlp_pci.c,v 1.73 2003/06/27 12:25:38 itohy Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center; and Charles M. Hannum. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * PCI bus front-end for the Digital Semiconductor ``Tulip'' (21x4x) 42 * Ethernet controller family driver. 43 */ 44 45 #include <sys/cdefs.h> 46 __KERNEL_RCSID(0, "$NetBSD: if_tlp_pci.c,v 1.73 2003/06/27 12:25:38 itohy Exp $"); 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/mbuf.h> 51 #include <sys/malloc.h> 52 #include <sys/kernel.h> 53 #include <sys/socket.h> 54 #include <sys/ioctl.h> 55 #include <sys/errno.h> 56 #include <sys/device.h> 57 58 #include <machine/endian.h> 59 60 #include <net/if.h> 61 #include <net/if_dl.h> 62 #include <net/if_media.h> 63 #include <net/if_ether.h> 64 65 #include <machine/bus.h> 66 #include <machine/intr.h> 67 68 #include <dev/mii/miivar.h> 69 #include <dev/mii/mii_bitbang.h> 70 71 #include <dev/ic/tulipreg.h> 72 #include <dev/ic/tulipvar.h> 73 74 #include <dev/pci/pcivar.h> 75 #include <dev/pci/pcireg.h> 76 #include <dev/pci/pcidevs.h> 77 78 /* 79 * PCI configuration space registers used by the Tulip. 80 */ 81 #define TULIP_PCI_IOBA 0x10 /* i/o mapped base */ 82 #define TULIP_PCI_MMBA 0x14 /* memory mapped base */ 83 #define TULIP_PCI_CFDA 0x40 /* configuration driver area */ 84 85 #define CFDA_SLEEP 0x80000000 /* sleep mode */ 86 #define CFDA_SNOOZE 0x40000000 /* snooze mode */ 87 88 struct tulip_pci_softc { 89 struct tulip_softc sc_tulip; /* real Tulip softc */ 90 91 /* PCI-specific goo. */ 92 void *sc_ih; /* interrupt handle */ 93 94 pci_chipset_tag_t sc_pc; /* our PCI chipset */ 95 pcitag_t sc_pcitag; /* our PCI tag */ 96 97 int sc_flags; /* flags; see below */ 98 99 LIST_HEAD(, tulip_pci_softc) sc_intrslaves; 100 LIST_ENTRY(tulip_pci_softc) sc_intrq; 101 102 /* Our {ROM,interrupt} master. */ 103 struct tulip_pci_softc *sc_master; 104 }; 105 106 /* sc_flags */ 107 #define TULIP_PCI_SHAREDINTR 0x01 /* interrupt is shared */ 108 #define TULIP_PCI_SLAVEINTR 0x02 /* interrupt is slave */ 109 #define TULIP_PCI_SHAREDROM 0x04 /* ROM is shared */ 110 #define TULIP_PCI_SLAVEROM 0x08 /* slave of shared ROM */ 111 112 int tlp_pci_match __P((struct device *, struct cfdata *, void *)); 113 void tlp_pci_attach __P((struct device *, struct device *, void *)); 114 115 CFATTACH_DECL(tlp_pci, sizeof(struct tulip_pci_softc), 116 tlp_pci_match, tlp_pci_attach, NULL, NULL); 117 118 const struct tulip_pci_product { 119 u_int32_t tpp_vendor; /* PCI vendor ID */ 120 u_int32_t tpp_product; /* PCI product ID */ 121 tulip_chip_t tpp_chip; /* base Tulip chip type */ 122 } tlp_pci_products[] = { 123 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21040, 124 TULIP_CHIP_21040 }, 125 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21041, 126 TULIP_CHIP_21041 }, 127 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21140, 128 TULIP_CHIP_21140 }, 129 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142, 130 TULIP_CHIP_21142 }, 131 132 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C168, 133 TULIP_CHIP_82C168 }, 134 135 /* 136 * Note: This is like a MX98725 with Wake-On-LAN and a 137 * 128-bit multicast hash table. 138 */ 139 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C115, 140 TULIP_CHIP_82C115 }, 141 142 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98713, 143 TULIP_CHIP_MX98713 }, 144 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX987x5, 145 TULIP_CHIP_MX98715 }, 146 147 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100TX, 148 TULIP_CHIP_MX98713 }, 149 150 { PCI_VENDOR_WINBOND, PCI_PRODUCT_WINBOND_W89C840F, 151 TULIP_CHIP_WB89C840F }, 152 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100ATX, 153 TULIP_CHIP_WB89C840F }, 154 155 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9102, 156 TULIP_CHIP_DM9102 }, 157 158 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AL981, 159 TULIP_CHIP_AL981 }, 160 161 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN985, 162 TULIP_CHIP_AN985 }, 163 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN2242, 164 TULIP_CHIP_AN985 }, 165 166 #if 0 167 { PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX88140A, 168 TULIP_CHIP_AX88140 }, 169 #endif 170 171 { 0, 0, 172 TULIP_CHIP_INVALID }, 173 }; 174 175 struct tlp_pci_quirks { 176 void (*tpq_func) __P((struct tulip_pci_softc *, 177 const u_int8_t *)); 178 u_int8_t tpq_oui[3]; 179 }; 180 181 void tlp_pci_dec_quirks __P((struct tulip_pci_softc *, 182 const u_int8_t *)); 183 184 void tlp_pci_znyx_21040_quirks __P((struct tulip_pci_softc *, 185 const u_int8_t *)); 186 void tlp_pci_smc_21040_quirks __P((struct tulip_pci_softc *, 187 const u_int8_t *)); 188 void tlp_pci_cogent_21040_quirks __P((struct tulip_pci_softc *, 189 const u_int8_t *)); 190 void tlp_pci_accton_21040_quirks __P((struct tulip_pci_softc *, 191 const u_int8_t *)); 192 193 void tlp_pci_cobalt_21142_quirks __P((struct tulip_pci_softc *, 194 const u_int8_t *)); 195 void tlp_pci_algor_21142_quirks __P((struct tulip_pci_softc *, 196 const u_int8_t *)); 197 void tlp_pci_netwinder_21142_quirks __P((struct tulip_pci_softc *, 198 const u_int8_t *)); 199 void tlp_pci_znyx_21142_quirks __P((struct tulip_pci_softc *, 200 const u_int8_t *)); 201 202 void tlp_pci_adaptec_quirks __P((struct tulip_pci_softc *, 203 const u_int8_t *)); 204 205 const struct tlp_pci_quirks tlp_pci_21040_quirks[] = { 206 { tlp_pci_znyx_21040_quirks, { 0x00, 0xc0, 0x95 } }, 207 { tlp_pci_smc_21040_quirks, { 0x00, 0x00, 0xc0 } }, 208 { tlp_pci_cogent_21040_quirks, { 0x00, 0x00, 0x92 } }, 209 { tlp_pci_accton_21040_quirks, { 0x00, 0x00, 0xe8 } }, 210 { NULL, { 0, 0, 0 } } 211 }; 212 213 const struct tlp_pci_quirks tlp_pci_21041_quirks[] = { 214 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 215 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 216 { NULL, { 0, 0, 0 } } 217 }; 218 219 void tlp_pci_asante_21140_quirks __P((struct tulip_pci_softc *, 220 const u_int8_t *)); 221 void tlp_pci_smc_21140_quirks __P((struct tulip_pci_softc *, 222 const u_int8_t *)); 223 void tlp_pci_vpc_21140_quirks __P((struct tulip_pci_softc *, 224 const u_int8_t *)); 225 226 const struct tlp_pci_quirks tlp_pci_21140_quirks[] = { 227 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 228 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 229 { tlp_pci_asante_21140_quirks, { 0x00, 0x00, 0x94 } }, 230 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0x92 } }, 231 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } }, 232 { tlp_pci_smc_21140_quirks, { 0x00, 0x00, 0xc0 } }, 233 { tlp_pci_vpc_21140_quirks, { 0x00, 0x03, 0xff } }, 234 { NULL, { 0, 0, 0 } } 235 }; 236 237 const struct tlp_pci_quirks tlp_pci_21142_quirks[] = { 238 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 239 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 240 { tlp_pci_cobalt_21142_quirks, { 0x00, 0x10, 0xe0 } }, 241 { tlp_pci_algor_21142_quirks, { 0x00, 0x40, 0xbc } }, 242 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } }, 243 { tlp_pci_netwinder_21142_quirks,{ 0x00, 0x10, 0x57 } }, 244 { tlp_pci_znyx_21142_quirks, { 0x00, 0xc0, 0x95 } }, 245 { NULL, { 0, 0, 0 } } 246 }; 247 248 int tlp_pci_shared_intr __P((void *)); 249 250 const struct tulip_pci_product *tlp_pci_lookup 251 __P((const struct pci_attach_args *)); 252 void tlp_pci_get_quirks __P((struct tulip_pci_softc *, const u_int8_t *, 253 const struct tlp_pci_quirks *)); 254 void tlp_pci_check_slaved __P((struct tulip_pci_softc *, int, int)); 255 256 const struct tulip_pci_product * 257 tlp_pci_lookup(pa) 258 const struct pci_attach_args *pa; 259 { 260 const struct tulip_pci_product *tpp; 261 262 for (tpp = tlp_pci_products; 263 tlp_chip_names[tpp->tpp_chip] != NULL; 264 tpp++) { 265 if (PCI_VENDOR(pa->pa_id) == tpp->tpp_vendor && 266 PCI_PRODUCT(pa->pa_id) == tpp->tpp_product) 267 return (tpp); 268 } 269 return (NULL); 270 } 271 272 void 273 tlp_pci_get_quirks(psc, enaddr, tpq) 274 struct tulip_pci_softc *psc; 275 const u_int8_t *enaddr; 276 const struct tlp_pci_quirks *tpq; 277 { 278 279 for (; tpq->tpq_func != NULL; tpq++) { 280 if (tpq->tpq_oui[0] == enaddr[0] && 281 tpq->tpq_oui[1] == enaddr[1] && 282 tpq->tpq_oui[2] == enaddr[2]) { 283 (*tpq->tpq_func)(psc, enaddr); 284 return; 285 } 286 } 287 } 288 289 void 290 tlp_pci_check_slaved(psc, shared, slaved) 291 struct tulip_pci_softc *psc; 292 int shared, slaved; 293 { 294 extern struct cfdriver tlp_cd; 295 struct tulip_pci_softc *cur, *best = NULL; 296 struct tulip_softc *sc = &psc->sc_tulip; 297 int i; 298 299 /* 300 * First of all, find the lowest pcidev numbered device on our 301 * bus marked as shared. That should be our master. 302 */ 303 for (i = 0; i < tlp_cd.cd_ndevs; i++) { 304 if ((cur = tlp_cd.cd_devs[i]) == NULL) 305 continue; 306 if (cur->sc_tulip.sc_dev.dv_parent != sc->sc_dev.dv_parent) 307 continue; 308 if ((cur->sc_flags & shared) == 0) 309 continue; 310 if (cur == psc) 311 continue; 312 if (best == NULL || 313 best->sc_tulip.sc_devno > cur->sc_tulip.sc_devno) 314 best = cur; 315 } 316 317 if (best != NULL) { 318 psc->sc_master = best; 319 psc->sc_flags |= (shared | slaved); 320 } 321 } 322 323 int 324 tlp_pci_match(parent, match, aux) 325 struct device *parent; 326 struct cfdata *match; 327 void *aux; 328 { 329 struct pci_attach_args *pa = aux; 330 331 if (tlp_pci_lookup(pa) != NULL) 332 return (10); /* beat if_de.c */ 333 334 return (0); 335 } 336 337 void 338 tlp_pci_attach(parent, self, aux) 339 struct device *parent, *self; 340 void *aux; 341 { 342 struct tulip_pci_softc *psc = (void *) self; 343 struct tulip_softc *sc = &psc->sc_tulip; 344 struct pci_attach_args *pa = aux; 345 pci_chipset_tag_t pc = pa->pa_pc; 346 pci_intr_handle_t ih; 347 const char *intrstr = NULL; 348 bus_space_tag_t iot, memt; 349 bus_space_handle_t ioh, memh; 350 int ioh_valid, memh_valid, i, j; 351 const struct tulip_pci_product *tpp; 352 u_int8_t enaddr[ETHER_ADDR_LEN]; 353 u_int32_t val; 354 pcireg_t reg; 355 int pmreg; 356 357 sc->sc_devno = pa->pa_device; 358 psc->sc_pc = pa->pa_pc; 359 psc->sc_pcitag = pa->pa_tag; 360 361 LIST_INIT(&psc->sc_intrslaves); 362 363 tpp = tlp_pci_lookup(pa); 364 if (tpp == NULL) { 365 printf("\n"); 366 panic("tlp_pci_attach: impossible"); 367 } 368 sc->sc_chip = tpp->tpp_chip; 369 370 /* 371 * By default, Tulip registers are 8 bytes long (4 bytes 372 * followed by a 4 byte pad). 373 */ 374 sc->sc_regshift = 3; 375 376 /* 377 * No power management hooks. 378 * XXX Maybe we should add some! 379 */ 380 sc->sc_flags |= TULIPF_ENABLED; 381 382 /* 383 * Get revision info, and set some chip-specific variables. 384 */ 385 sc->sc_rev = PCI_REVISION(pa->pa_class); 386 switch (sc->sc_chip) { 387 case TULIP_CHIP_21140: 388 if (sc->sc_rev >= 0x20) 389 sc->sc_chip = TULIP_CHIP_21140A; 390 break; 391 392 case TULIP_CHIP_21142: 393 if (sc->sc_rev >= 0x20) 394 sc->sc_chip = TULIP_CHIP_21143; 395 break; 396 397 case TULIP_CHIP_82C168: 398 if (sc->sc_rev >= 0x20) 399 sc->sc_chip = TULIP_CHIP_82C169; 400 break; 401 402 case TULIP_CHIP_MX98713: 403 if (sc->sc_rev >= 0x10) 404 sc->sc_chip = TULIP_CHIP_MX98713A; 405 break; 406 407 case TULIP_CHIP_MX98715: 408 if (sc->sc_rev >= 0x20) 409 sc->sc_chip = TULIP_CHIP_MX98715A; 410 if (sc->sc_rev >= 0x25) 411 sc->sc_chip = TULIP_CHIP_MX98715AEC_X; 412 if (sc->sc_rev >= 0x30) 413 sc->sc_chip = TULIP_CHIP_MX98725; 414 break; 415 416 case TULIP_CHIP_WB89C840F: 417 sc->sc_regshift = 2; 418 break; 419 420 case TULIP_CHIP_AN985: 421 /* 422 * The AN983 and AN985 are very similar, and are 423 * differentiated by a "signature" register that 424 * is like, but not identical, to a PCI ID register. 425 */ 426 reg = pci_conf_read(pc, pa->pa_tag, 0x80); 427 switch (reg) { 428 case 0x09811317: 429 sc->sc_chip = TULIP_CHIP_AN985; 430 break; 431 432 case 0x09851317: 433 sc->sc_chip = TULIP_CHIP_AN983; 434 break; 435 436 default: 437 /* Unknown -- use default. */ 438 break; 439 } 440 break; 441 442 case TULIP_CHIP_AX88140: 443 if (sc->sc_rev >= 0x10) 444 sc->sc_chip = TULIP_CHIP_AX88141; 445 break; 446 447 case TULIP_CHIP_DM9102: 448 if (sc->sc_rev >= 0x30) 449 sc->sc_chip = TULIP_CHIP_DM9102A; 450 break; 451 452 default: 453 /* Nothing. */ 454 break; 455 } 456 457 printf(": %s Ethernet, pass %d.%d\n", 458 tlp_chip_names[sc->sc_chip], 459 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf); 460 461 switch (sc->sc_chip) { 462 case TULIP_CHIP_21040: 463 if (sc->sc_rev < 0x20) { 464 printf("%s: 21040 must be at least pass 2.0\n", 465 sc->sc_dev.dv_xname); 466 return; 467 } 468 break; 469 470 case TULIP_CHIP_21140: 471 if (sc->sc_rev < 0x11) { 472 printf("%s: 21140 must be at least pass 1.1\n", 473 sc->sc_dev.dv_xname); 474 return; 475 } 476 break; 477 478 default: 479 /* Nothing. */ 480 break; 481 } 482 483 /* 484 * Check to see if the device is in power-save mode, and 485 * being it out if necessary. 486 */ 487 switch (sc->sc_chip) { 488 case TULIP_CHIP_21140: 489 case TULIP_CHIP_21140A: 490 case TULIP_CHIP_21142: 491 case TULIP_CHIP_21143: 492 case TULIP_CHIP_MX98713A: 493 case TULIP_CHIP_MX98715: 494 case TULIP_CHIP_MX98715A: 495 case TULIP_CHIP_MX98715AEC_X: 496 case TULIP_CHIP_MX98725: 497 case TULIP_CHIP_DM9102: 498 case TULIP_CHIP_DM9102A: 499 /* 500 * Clear the "sleep mode" bit in the CFDA register. 501 */ 502 reg = pci_conf_read(pc, pa->pa_tag, TULIP_PCI_CFDA); 503 if (reg & (CFDA_SLEEP|CFDA_SNOOZE)) 504 pci_conf_write(pc, pa->pa_tag, TULIP_PCI_CFDA, 505 reg & ~(CFDA_SLEEP|CFDA_SNOOZE)); 506 break; 507 508 default: 509 /* Nothing. */ 510 break; 511 } 512 513 if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PWRMGMT, &pmreg, 0)) { 514 reg = pci_conf_read(pc, pa->pa_tag, pmreg + PCI_PMCSR); 515 switch (reg & PCI_PMCSR_STATE_MASK) { 516 case PCI_PMCSR_STATE_D1: 517 case PCI_PMCSR_STATE_D2: 518 printf("%s: waking up from power state D%d\n%s", 519 sc->sc_dev.dv_xname, 520 reg & PCI_PMCSR_STATE_MASK, sc->sc_dev.dv_xname); 521 pci_conf_write(pc, pa->pa_tag, pmreg + PCI_PMCSR, 522 (reg & ~PCI_PMCSR_STATE_MASK) | 523 PCI_PMCSR_STATE_D0); 524 break; 525 case PCI_PMCSR_STATE_D3: 526 /* 527 * The card has lost all configuration data in 528 * this state, so punt. 529 */ 530 printf("%s: unable to wake up from power state D3, " 531 "reboot required.\n", sc->sc_dev.dv_xname); 532 pci_conf_write(pc, pa->pa_tag, pmreg + PCI_PMCSR, 533 (reg & ~PCI_PMCSR_STATE_MASK) | 534 PCI_PMCSR_STATE_D0); 535 return; 536 } 537 } 538 539 /* 540 * Map the device. 541 */ 542 ioh_valid = (pci_mapreg_map(pa, TULIP_PCI_IOBA, 543 PCI_MAPREG_TYPE_IO, 0, 544 &iot, &ioh, NULL, NULL) == 0); 545 memh_valid = (pci_mapreg_map(pa, TULIP_PCI_MMBA, 546 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 547 &memt, &memh, NULL, NULL) == 0); 548 549 if (memh_valid) { 550 sc->sc_st = memt; 551 sc->sc_sh = memh; 552 } else if (ioh_valid) { 553 sc->sc_st = iot; 554 sc->sc_sh = ioh; 555 } else { 556 printf("%s: unable to map device registers\n", 557 sc->sc_dev.dv_xname); 558 return; 559 } 560 561 sc->sc_dmat = pa->pa_dmat; 562 563 /* 564 * Make sure bus mastering is enabled. 565 */ 566 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 567 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 568 PCI_COMMAND_MASTER_ENABLE); 569 570 /* 571 * Get the cacheline size. 572 */ 573 sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag, 574 PCI_BHLC_REG)); 575 576 /* 577 * Get PCI data moving command info. 578 */ 579 if (pa->pa_flags & PCI_FLAGS_MRL_OKAY) 580 sc->sc_flags |= TULIPF_MRL; 581 if (pa->pa_flags & PCI_FLAGS_MRM_OKAY) 582 sc->sc_flags |= TULIPF_MRM; 583 if (pa->pa_flags & PCI_FLAGS_MWI_OKAY) 584 sc->sc_flags |= TULIPF_MWI; 585 586 /* 587 * Read the contents of the Ethernet Address ROM/SROM. 588 */ 589 switch (sc->sc_chip) { 590 case TULIP_CHIP_21040: 591 sc->sc_srom_addrbits = 6; 592 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, M_NOWAIT); 593 TULIP_WRITE(sc, CSR_MIIROM, MIIROM_SROMCS); 594 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 595 for (j = 0; j < 10000; j++) { 596 val = TULIP_READ(sc, CSR_MIIROM); 597 if ((val & MIIROM_DN) == 0) 598 break; 599 } 600 sc->sc_srom[i] = val & MIIROM_DATA; 601 } 602 break; 603 604 case TULIP_CHIP_82C168: 605 case TULIP_CHIP_82C169: 606 { 607 sc->sc_srom_addrbits = 2; 608 sc->sc_srom = malloc(TULIP_ROM_SIZE(2), M_DEVBUF, M_NOWAIT); 609 610 /* 611 * The Lite-On PNIC stores the Ethernet address in 612 * the first 3 words of the EEPROM. EEPROM access 613 * is not like the other Tulip chips. 614 */ 615 for (i = 0; i < 6; i += 2) { 616 TULIP_WRITE(sc, CSR_PNIC_SROMCTL, 617 PNIC_SROMCTL_READ | (i >> 1)); 618 for (j = 0; j < 500; j++) { 619 delay(2); 620 val = TULIP_READ(sc, CSR_MIIROM); 621 if ((val & PNIC_MIIROM_BUSY) == 0) 622 break; 623 } 624 if (val & PNIC_MIIROM_BUSY) { 625 printf("%s: EEPROM timed out\n", 626 sc->sc_dev.dv_xname); 627 return; 628 } 629 val &= PNIC_MIIROM_DATA; 630 sc->sc_srom[i] = val >> 8; 631 sc->sc_srom[i + 1] = val & 0xff; 632 } 633 break; 634 } 635 636 default: 637 #ifdef algor 638 /* 639 * XXX This should be done with device properties, but 640 * XXX we don't have those yet. 641 */ 642 if (algor_get_ethaddr(pa, NULL)) { 643 extern int tlp_srom_debug; 644 sc->sc_srom_addrbits = 6; 645 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, 646 M_NOWAIT|M_ZERO); 647 algor_get_ethaddr(pa, sc->sc_srom); 648 if (tlp_srom_debug) { 649 printf("SROM CONTENTS:"); 650 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 651 if ((i % 8) == 0) 652 printf("\n\t"); 653 printf("0x%02x ", sc->sc_srom[i]); 654 } 655 printf("\n"); 656 } 657 break; 658 } 659 #endif /* algor */ 660 661 /* Check for a slaved ROM on a multi-port board. */ 662 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDROM, 663 TULIP_PCI_SLAVEROM); 664 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 665 sc->sc_srom_addrbits = 666 psc->sc_master->sc_tulip.sc_srom_addrbits; 667 sc->sc_srom = psc->sc_master->sc_tulip.sc_srom; 668 enaddr[5] += 669 sc->sc_devno - psc->sc_master->sc_tulip.sc_devno; 670 } 671 else if (tlp_read_srom(sc) == 0) 672 goto cant_cope; 673 break; 674 } 675 676 /* 677 * Deal with chip/board quirks. This includes setting up 678 * the mediasw, and extracting the Ethernet address from 679 * the rombuf. 680 */ 681 switch (sc->sc_chip) { 682 case TULIP_CHIP_21040: 683 /* 684 * Parse the Ethernet Address ROM. 685 */ 686 if (tlp_parse_old_srom(sc, enaddr) == 0) 687 goto cant_cope; 688 689 690 /* 691 * All 21040 boards start out with the same 692 * media switch. 693 */ 694 sc->sc_mediasw = &tlp_21040_mediasw; 695 696 /* 697 * Deal with any quirks this board might have. 698 */ 699 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21040_quirks); 700 break; 701 702 case TULIP_CHIP_21041: 703 /* Check for new format SROM. */ 704 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 705 /* 706 * Not an ISV SROM; try the old DEC Ethernet Address 707 * ROM format. 708 */ 709 if (tlp_parse_old_srom(sc, enaddr) == 0) 710 goto cant_cope; 711 } 712 713 /* 714 * All 21041 boards use the same media switch; they all 715 * work basically the same! Yippee! 716 */ 717 sc->sc_mediasw = &tlp_21041_mediasw; 718 719 /* 720 * Deal with any quirks this board might have. 721 */ 722 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21041_quirks); 723 break; 724 725 case TULIP_CHIP_21140: 726 case TULIP_CHIP_21140A: 727 /* Check for new format SROM. */ 728 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 729 /* 730 * Not an ISV SROM; try the old DEC Ethernet Address 731 * ROM format. 732 */ 733 if (tlp_parse_old_srom(sc, enaddr) == 0) 734 goto cant_cope; 735 } else { 736 /* 737 * We start out with the 2114x ISV media switch. 738 * When we search for quirks, we may change to 739 * a different switch. 740 */ 741 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 742 } 743 744 /* 745 * Deal with any quirks this board might have. 746 */ 747 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21140_quirks); 748 749 /* 750 * Bail out now if we can't deal with this board. 751 */ 752 if (sc->sc_mediasw == NULL) 753 goto cant_cope; 754 break; 755 756 case TULIP_CHIP_21142: 757 case TULIP_CHIP_21143: 758 /* Check for new format SROM. */ 759 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 760 /* 761 * Not an ISV SROM; try the old DEC Ethernet Address 762 * ROM format. 763 */ 764 if (tlp_parse_old_srom(sc, enaddr) == 0) { 765 /* 766 * One last try: just copy the address 767 * from offset 20 and try to look 768 * up quirks. 769 */ 770 memcpy(enaddr, &sc->sc_srom[20], 771 ETHER_ADDR_LEN); 772 } 773 } else { 774 /* 775 * We start out with the 2114x ISV media switch. 776 * When we search for quirks, we may change to 777 * a different switch. 778 */ 779 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 780 } 781 782 /* 783 * Deal with any quirks this board might have. 784 */ 785 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21142_quirks); 786 787 /* 788 * Bail out now if we can't deal with this board. 789 */ 790 if (sc->sc_mediasw == NULL) 791 goto cant_cope; 792 break; 793 794 case TULIP_CHIP_82C168: 795 case TULIP_CHIP_82C169: 796 /* 797 * Lite-On PNIC's Ethernet address is the first 6 798 * bytes of its EEPROM. 799 */ 800 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 801 802 /* 803 * Lite-On PNICs always use the same mediasw; we 804 * select MII vs. internal NWAY automatically. 805 */ 806 sc->sc_mediasw = &tlp_pnic_mediasw; 807 break; 808 809 case TULIP_CHIP_MX98713: 810 /* 811 * The Macronix MX98713 has an MII and GPIO, but no 812 * internal Nway block. This chip is basically a 813 * perfect 21140A clone, with the exception of the 814 * a magic register frobbing in order to make the 815 * interface function. 816 */ 817 if (tlp_isv_srom_enaddr(sc, enaddr)) { 818 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 819 break; 820 } 821 /* FALLTHROUGH */ 822 823 case TULIP_CHIP_82C115: 824 /* 825 * Yippee! The Lite-On 82C115 is a clone of 826 * the MX98725 (the data sheet even says `MXIC' 827 * on it)! Imagine that, a clone of a clone. 828 * 829 * The differences are really minimal: 830 * 831 * - Wake-On-LAN support 832 * - 128-bit multicast hash table, rather than 833 * the standard 512-bit hash table 834 */ 835 /* FALLTHROUGH */ 836 837 case TULIP_CHIP_MX98713A: 838 case TULIP_CHIP_MX98715A: 839 case TULIP_CHIP_MX98715AEC_X: 840 case TULIP_CHIP_MX98725: 841 /* 842 * The MX98713A has an MII as well as an internal Nway block, 843 * but no GPIO. The MX98715 and MX98725 have an internal 844 * Nway block only. 845 * 846 * The internal Nway block, unlike the Lite-On PNIC's, does 847 * just that - performs Nway. Once autonegotiation completes, 848 * we must program the GPR media information into the chip. 849 * 850 * The byte offset of the Ethernet address is stored at 851 * offset 0x70. 852 */ 853 memcpy(enaddr, &sc->sc_srom[sc->sc_srom[0x70]], ETHER_ADDR_LEN); 854 sc->sc_mediasw = &tlp_pmac_mediasw; 855 break; 856 857 case TULIP_CHIP_WB89C840F: 858 /* 859 * Winbond 89C840F's Ethernet address is the first 860 * 6 bytes of its EEPROM. 861 */ 862 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 863 864 /* 865 * Winbond 89C840F has an MII attached to the SIO. 866 */ 867 sc->sc_mediasw = &tlp_sio_mii_mediasw; 868 break; 869 870 case TULIP_CHIP_AL981: 871 /* 872 * The ADMtek AL981's Ethernet address is located 873 * at offset 8 of its EEPROM. 874 */ 875 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 876 877 /* 878 * ADMtek AL981 has a built-in PHY accessed through 879 * special registers. 880 */ 881 sc->sc_mediasw = &tlp_al981_mediasw; 882 break; 883 884 case TULIP_CHIP_AN983: 885 case TULIP_CHIP_AN985: 886 /* 887 * The ADMtek AN985's Ethernet address is located 888 * at offset 8 of its EEPROM. 889 */ 890 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 891 892 /* 893 * The ADMtek AN985 can be configured in Single-Chip 894 * mode or MAC-only mode. Single-Chip uses the built-in 895 * PHY, MAC-only has an external PHY (usually HomePNA). 896 * The selection is based on an EEPROM setting, and both 897 * PHYs are accessed via MII attached to SIO. 898 * 899 * The AN985 "ghosts" the internal PHY onto all 900 * MII addresses, so we have to use a media init 901 * routine that limits the search. 902 * XXX How does this work with MAC-only mode? 903 */ 904 sc->sc_mediasw = &tlp_an985_mediasw; 905 break; 906 907 case TULIP_CHIP_DM9102: 908 case TULIP_CHIP_DM9102A: 909 /* 910 * Some boards with the Davicom chip have an ISV 911 * SROM (mostly DM9102A boards -- trying to describe 912 * the HomePNA PHY, probably) although the data in 913 * them is generally wrong. Check for ISV format 914 * and grab the Ethernet address that way, and if 915 * that fails, fall back on grabbing it from an 916 * observed offset of 20 (which is where it would 917 * be in an ISV SROM anyhow, tho ISV can cope with 918 * multi-port boards). 919 */ 920 if (!tlp_isv_srom_enaddr(sc, enaddr)) { 921 #ifdef __sparc__ 922 if (!sc->sc_srom[20] && !sc->sc_srom[21] && 923 !sc->sc_srom[22]) { 924 extern void myetheraddr __P((u_char *)); 925 myetheraddr(enaddr); 926 } else 927 #endif 928 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN); 929 } 930 931 /* 932 * Davicom chips all have an internal MII interface 933 * and a built-in PHY. DM9102A also has a an external 934 * MII interface, usually with a HomePNA PHY attached 935 * to it. 936 */ 937 sc->sc_mediasw = &tlp_dm9102_mediasw; 938 break; 939 940 default: 941 cant_cope: 942 printf("%s: sorry, unable to handle your board\n", 943 sc->sc_dev.dv_xname); 944 return; 945 } 946 947 /* 948 * Handle shared interrupts. 949 */ 950 if (psc->sc_flags & TULIP_PCI_SHAREDINTR) { 951 if (psc->sc_master) 952 psc->sc_flags |= TULIP_PCI_SLAVEINTR; 953 else { 954 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDINTR, 955 TULIP_PCI_SLAVEINTR); 956 if (psc->sc_master == NULL) 957 psc->sc_master = psc; 958 } 959 LIST_INSERT_HEAD(&psc->sc_master->sc_intrslaves, 960 psc, sc_intrq); 961 } 962 963 if (psc->sc_flags & TULIP_PCI_SLAVEINTR) { 964 printf("%s: sharing interrupt with %s\n", 965 sc->sc_dev.dv_xname, 966 psc->sc_master->sc_tulip.sc_dev.dv_xname); 967 } else { 968 /* 969 * Map and establish our interrupt. 970 */ 971 if (pci_intr_map(pa, &ih)) { 972 printf("%s: unable to map interrupt\n", 973 sc->sc_dev.dv_xname); 974 return; 975 } 976 intrstr = pci_intr_string(pc, ih); 977 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, 978 (psc->sc_flags & TULIP_PCI_SHAREDINTR) ? 979 tlp_pci_shared_intr : tlp_intr, sc); 980 if (psc->sc_ih == NULL) { 981 printf("%s: unable to establish interrupt", 982 sc->sc_dev.dv_xname); 983 if (intrstr != NULL) 984 printf(" at %s", intrstr); 985 printf("\n"); 986 return; 987 } 988 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, 989 intrstr); 990 } 991 992 /* 993 * Finish off the attach. 994 */ 995 tlp_attach(sc, enaddr); 996 } 997 998 int 999 tlp_pci_shared_intr(arg) 1000 void *arg; 1001 { 1002 struct tulip_pci_softc *master = arg, *slave; 1003 int rv = 0; 1004 1005 for (slave = LIST_FIRST(&master->sc_intrslaves); 1006 slave != NULL; 1007 slave = LIST_NEXT(slave, sc_intrq)) 1008 rv |= tlp_intr(&slave->sc_tulip); 1009 1010 return (rv); 1011 } 1012 1013 void 1014 tlp_pci_dec_quirks(psc, enaddr) 1015 struct tulip_pci_softc *psc; 1016 const u_int8_t *enaddr; 1017 { 1018 struct tulip_softc *sc = &psc->sc_tulip; 1019 1020 /* 1021 * This isn't really a quirk-gathering device, really. We 1022 * just want to get the spiffy DEC board name from the SROM. 1023 */ 1024 strcpy(sc->sc_name, "DEC "); 1025 1026 if (memcmp(&sc->sc_srom[29], "DE500", 5) == 0 || 1027 memcmp(&sc->sc_srom[29], "DE450", 5) == 0) 1028 memcpy(&sc->sc_name[4], &sc->sc_srom[29], 8); 1029 } 1030 1031 void 1032 tlp_pci_znyx_21040_quirks(psc, enaddr) 1033 struct tulip_pci_softc *psc; 1034 const u_int8_t *enaddr; 1035 { 1036 struct tulip_softc *sc = &psc->sc_tulip; 1037 u_int16_t id = 0; 1038 1039 /* 1040 * If we have a slaved ROM, just copy the bits from the master. 1041 * This is in case we fail the ROM ID check (older boards) and 1042 * need to fall back on Ethernet address model checking; that 1043 * will fail for slave chips. 1044 */ 1045 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 1046 strcpy(sc->sc_name, psc->sc_master->sc_tulip.sc_name); 1047 sc->sc_mediasw = psc->sc_master->sc_tulip.sc_mediasw; 1048 psc->sc_flags |= 1049 psc->sc_master->sc_flags & TULIP_PCI_SHAREDINTR; 1050 return; 1051 } 1052 1053 if (sc->sc_srom[32] == 0x4a && sc->sc_srom[33] == 0x52) { 1054 id = sc->sc_srom[37] | (sc->sc_srom[36] << 8); 1055 switch (id) { 1056 zx312: 1057 case 0x0602: /* ZX312 */ 1058 strcpy(sc->sc_name, "ZNYX ZX312"); 1059 return; 1060 1061 case 0x0622: /* ZX312T */ 1062 strcpy(sc->sc_name, "ZNYX ZX312T"); 1063 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1064 return; 1065 1066 zx314_inta: 1067 case 0x0701: /* ZX314 INTA */ 1068 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1069 /* FALLTHROUGH */ 1070 case 0x0711: /* ZX314 */ 1071 strcpy(sc->sc_name, "ZNYX ZX314"); 1072 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1073 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1074 return; 1075 1076 zx315_inta: 1077 case 0x0801: /* ZX315 INTA */ 1078 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1079 /* FALLTHROUGH */ 1080 case 0x0811: /* ZX315 */ 1081 strcpy(sc->sc_name, "ZNYX ZX315"); 1082 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1083 return; 1084 1085 default: 1086 id = 0; 1087 break; 1088 } 1089 } 1090 1091 /* 1092 * Deal with boards that have broken ROMs. 1093 */ 1094 if (id == 0) { 1095 if ((enaddr[3] & ~3) == 0xf0 && (enaddr[5] & 3) == 0x00) 1096 goto zx314_inta; 1097 if ((enaddr[3] & ~3) == 0xf4 && (enaddr[5] & 1) == 0x00) 1098 goto zx315_inta; 1099 if ((enaddr[3] & ~3) == 0xec) 1100 goto zx312; 1101 } 1102 1103 strcpy(sc->sc_name, "ZNYX ZX31x"); 1104 } 1105 1106 void tlp_pci_znyx_21142_qs6611_reset __P((struct tulip_softc *)); 1107 1108 void 1109 tlp_pci_znyx_21142_quirks(psc, enaddr) 1110 struct tulip_pci_softc *psc; 1111 const u_int8_t *enaddr; 1112 { 1113 struct tulip_softc *sc = &psc->sc_tulip; 1114 pcireg_t subid; 1115 1116 subid = pci_conf_read(psc->sc_pc, psc->sc_pcitag, PCI_SUBSYS_ID_REG); 1117 1118 if (PCI_VENDOR(subid) != PCI_VENDOR_ZNYX) 1119 return; /* ? */ 1120 1121 switch (PCI_PRODUCT(subid) & 0xff) { 1122 /* 1123 * ZNYX 21143 boards with QS6611 PHY 1124 */ 1125 case 0x12: /* ZX345Q */ 1126 case 0x13: /* ZX346Q */ 1127 case 0x14: /* ZX348Q */ 1128 case 0x18: /* ZX414 */ 1129 case 0x19: /* ZX412 */ 1130 case 0x1a: /* ZX444 */ 1131 case 0x1b: /* ZX442 */ 1132 case 0x23: /* ZX212 */ 1133 case 0x24: /* ZX214 */ 1134 case 0x29: /* ZX374 */ 1135 case 0x2d: /* ZX372 */ 1136 case 0x2b: /* ZX244 */ 1137 case 0x2c: /* ZX424 */ 1138 case 0x2e: /* ZX422 */ 1139 printf("%s: QS6611 PHY\n", sc->sc_dev.dv_xname); 1140 sc->sc_reset = tlp_pci_znyx_21142_qs6611_reset; 1141 break; 1142 } 1143 } 1144 1145 void 1146 tlp_pci_znyx_21142_qs6611_reset(sc) 1147 struct tulip_softc *sc; 1148 { 1149 1150 /* 1151 * Reset QS6611 PHY. 1152 */ 1153 TULIP_WRITE(sc, CSR_SIAGEN, 1154 SIAGEN_CWE | SIAGEN_LGS1 | SIAGEN_ABM | (0xf << 16)); 1155 delay(200); 1156 TULIP_WRITE(sc, CSR_SIAGEN, (0x4 << 16)); 1157 delay(10000); 1158 } 1159 1160 void 1161 tlp_pci_smc_21040_quirks(psc, enaddr) 1162 struct tulip_pci_softc *psc; 1163 const u_int8_t *enaddr; 1164 { 1165 struct tulip_softc *sc = &psc->sc_tulip; 1166 u_int16_t id1, id2, ei; 1167 int auibnc = 0, utp = 0; 1168 char *cp; 1169 1170 id1 = sc->sc_srom[0x60] | (sc->sc_srom[0x61] << 8); 1171 id2 = sc->sc_srom[0x62] | (sc->sc_srom[0x63] << 8); 1172 ei = sc->sc_srom[0x66] | (sc->sc_srom[0x67] << 8); 1173 1174 strcpy(sc->sc_name, "SMC 8432"); 1175 cp = &sc->sc_name[8]; 1176 1177 if ((id1 & 1) == 0) { 1178 *cp++ = 'B'; 1179 auibnc = 1; 1180 } 1181 if ((id1 & 0xff) > 0x32) { 1182 *cp++ = 'T'; 1183 utp = 1; 1184 } 1185 if ((id1 & 0x4000) == 0) { 1186 *cp++ = 'A'; 1187 auibnc = 1; 1188 } 1189 if (id2 == 0x15) { 1190 sc->sc_name[7] = '4'; 1191 *cp++ = '-'; 1192 *cp++ = 'C'; 1193 *cp++ = 'H'; 1194 *cp++ = ei ? '2' : '1'; 1195 } 1196 *cp = '\0'; 1197 1198 if (utp != 0 && auibnc == 0) 1199 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1200 else if (utp == 0 && auibnc != 0) 1201 sc->sc_mediasw = &tlp_21040_auibnc_mediasw; 1202 } 1203 1204 void 1205 tlp_pci_cogent_21040_quirks(psc, enaddr) 1206 struct tulip_pci_softc *psc; 1207 const u_int8_t *enaddr; 1208 { 1209 1210 strcpy(psc->sc_tulip.sc_name, "Cogent multi-port"); 1211 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1212 } 1213 1214 void 1215 tlp_pci_accton_21040_quirks(psc, enaddr) 1216 struct tulip_pci_softc *psc; 1217 const u_int8_t *enaddr; 1218 { 1219 1220 strcpy(psc->sc_tulip.sc_name, "ACCTON EN1203"); 1221 } 1222 1223 void tlp_pci_asante_21140_reset __P((struct tulip_softc *)); 1224 1225 void 1226 tlp_pci_asante_21140_quirks(psc, enaddr) 1227 struct tulip_pci_softc *psc; 1228 const u_int8_t *enaddr; 1229 { 1230 struct tulip_softc *sc = &psc->sc_tulip; 1231 1232 /* 1233 * Some Asante boards don't use the ISV SROM format. For 1234 * those that don't, we initialize the GPIO direction bits, 1235 * and provide our own reset hook, which resets the MII. 1236 * 1237 * All of these boards use SIO-attached-MII media. 1238 */ 1239 if (sc->sc_mediasw == &tlp_2114x_isv_mediasw) 1240 return; 1241 1242 strcpy(sc->sc_name, "Asante"); 1243 1244 sc->sc_gp_dir = 0xbf; 1245 sc->sc_reset = tlp_pci_asante_21140_reset; 1246 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1247 } 1248 1249 void 1250 tlp_pci_asante_21140_reset(sc) 1251 struct tulip_softc *sc; 1252 { 1253 1254 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1255 TULIP_WRITE(sc, CSR_GPP, 0x8); 1256 delay(100); 1257 TULIP_WRITE(sc, CSR_GPP, 0); 1258 } 1259 1260 /* 1261 * SMC 9332DST media switch. 1262 */ 1263 void tlp_smc9332dst_tmsw_init __P((struct tulip_softc *)); 1264 1265 const struct tulip_mediasw tlp_smc9332dst_mediasw = { 1266 tlp_smc9332dst_tmsw_init, 1267 tlp_21140_gpio_get, 1268 tlp_21140_gpio_set 1269 }; 1270 1271 void 1272 tlp_pci_smc_21140_quirks(psc, enaddr) 1273 struct tulip_pci_softc *psc; 1274 const u_int8_t *enaddr; 1275 { 1276 struct tulip_softc *sc = &psc->sc_tulip; 1277 1278 if (sc->sc_mediasw != NULL) { 1279 return; 1280 } 1281 strcpy(psc->sc_tulip.sc_name, "SMC 9332DST"); 1282 sc->sc_mediasw = &tlp_smc9332dst_mediasw; 1283 } 1284 1285 void 1286 tlp_smc9332dst_tmsw_init(sc) 1287 struct tulip_softc *sc; 1288 { 1289 struct tulip_21x4x_media *tm; 1290 const char *sep = ""; 1291 uint32_t reg; 1292 int i, cnt; 1293 1294 sc->sc_gp_dir = GPP_SMC9332DST_PINS; 1295 sc->sc_opmode = OPMODE_MBO | OPMODE_PS; 1296 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 1297 1298 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 1299 tlp_mediastatus); 1300 printf("%s: ", sc->sc_dev.dv_xname); 1301 1302 #define ADD(m, c) \ 1303 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK|M_ZERO); \ 1304 tm->tm_opmode = (c); \ 1305 tm->tm_gpdata = GPP_SMC9332DST_INIT; \ 1306 ifmedia_add(&sc->sc_mii.mii_media, (m), 0, tm) 1307 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 1308 1309 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0), OPMODE_TTM); 1310 PRINT("10baseT"); 1311 1312 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, 0), 1313 OPMODE_TTM | OPMODE_FD); 1314 PRINT("10baseT-FDX"); 1315 1316 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 1317 OPMODE_PS | OPMODE_PCS | OPMODE_SCR); 1318 PRINT("100baseTX"); 1319 1320 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, 0), 1321 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD); 1322 PRINT("100baseTX-FDX"); 1323 1324 #undef ADD 1325 #undef PRINT 1326 1327 printf("\n"); 1328 1329 tlp_reset(sc); 1330 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode | OPMODE_PCS | OPMODE_SCR); 1331 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1332 delay(10); 1333 TULIP_WRITE(sc, CSR_GPP, GPP_SMC9332DST_INIT); 1334 delay(200000); 1335 cnt = 0; 1336 for (i = 1000; i > 0; i--) { 1337 reg = TULIP_READ(sc, CSR_GPP); 1338 if ((~reg & (GPP_SMC9332DST_OK10 | 1339 GPP_SMC9332DST_OK100)) == 0) { 1340 if (cnt++ > 100) { 1341 break; 1342 } 1343 } else if ((reg & GPP_SMC9332DST_OK10) == 0) { 1344 break; 1345 } else { 1346 cnt = 0; 1347 } 1348 delay(1000); 1349 } 1350 if (cnt > 100) { 1351 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX); 1352 } else { 1353 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 1354 } 1355 } 1356 1357 void 1358 tlp_pci_vpc_21140_quirks(psc, enaddr) 1359 struct tulip_pci_softc *psc; 1360 const u_int8_t *enaddr; 1361 { 1362 struct tulip_softc *sc = &psc->sc_tulip; 1363 char *p1 = (char *) &sc->sc_srom[32]; 1364 char *p2 = &sc->sc_name[0]; 1365 1366 do { 1367 if ((unsigned char) *p1 & 0x80) 1368 *p2++ = ' '; 1369 else 1370 *p2++ = *p1; 1371 } while (*p1++); 1372 } 1373 1374 void tlp_pci_cobalt_21142_reset __P((struct tulip_softc *)); 1375 1376 void 1377 tlp_pci_cobalt_21142_quirks(psc, enaddr) 1378 struct tulip_pci_softc *psc; 1379 const u_int8_t *enaddr; 1380 { 1381 struct tulip_softc *sc = &psc->sc_tulip; 1382 1383 /* 1384 * Cobalt Networks interfaces are just MII-on-SIO. 1385 */ 1386 sc->sc_reset = tlp_pci_cobalt_21142_reset; 1387 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1388 1389 /* 1390 * The Cobalt systems tend to fall back to store-and-forward 1391 * pretty quickly, so we select that from the beginning to 1392 * avoid initial timeouts. 1393 */ 1394 sc->sc_txthresh = TXTH_SF; 1395 } 1396 1397 void 1398 tlp_pci_cobalt_21142_reset(sc) 1399 struct tulip_softc *sc; 1400 { 1401 /* 1402 * Reset PHY. 1403 */ 1404 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE | (1 << 16)); 1405 delay(10); 1406 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE); 1407 delay(10); 1408 } 1409 1410 void 1411 tlp_pci_algor_21142_quirks(psc, enaddr) 1412 struct tulip_pci_softc *psc; 1413 const u_int8_t *enaddr; 1414 { 1415 struct tulip_softc *sc = &psc->sc_tulip; 1416 1417 /* 1418 * Algorithmics boards just have MII-on-SIO. 1419 * 1420 * XXX They also have AUI on the serial interface. 1421 * XXX Deal with this. 1422 */ 1423 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1424 } 1425 1426 /* 1427 * Cogent EM1x0 (aka. Adaptec ANA-6910) media switch. 1428 */ 1429 void tlp_cogent_em1x0_tmsw_init __P((struct tulip_softc *)); 1430 1431 const struct tulip_mediasw tlp_cogent_em1x0_mediasw = { 1432 tlp_cogent_em1x0_tmsw_init, 1433 tlp_21140_gpio_get, 1434 tlp_21140_gpio_set 1435 }; 1436 1437 void 1438 tlp_pci_adaptec_quirks(psc, enaddr) 1439 struct tulip_pci_softc *psc; 1440 const u_int8_t *enaddr; 1441 { 1442 struct tulip_softc *sc = &psc->sc_tulip; 1443 uint8_t *srom = sc->sc_srom, id0; 1444 uint16_t id1, id2; 1445 1446 if (sc->sc_mediasw == NULL) { 1447 id0 = srom[32]; 1448 switch (id0) { 1449 case 0x12: 1450 strcpy(psc->sc_tulip.sc_name, "Cogent EM100TX"); 1451 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1452 break; 1453 1454 case 0x15: 1455 strcpy(psc->sc_tulip.sc_name, "Cogent EM100FX"); 1456 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1457 break; 1458 1459 #if 0 1460 case XXX: 1461 strcpy(psc->sc_tulip.sc_name, "Cogent EM110TX"); 1462 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1463 break; 1464 #endif 1465 1466 default: 1467 printf("%s: unknown Cogent board ID 0x%02x\n", 1468 sc->sc_dev.dv_xname, id0); 1469 } 1470 return; 1471 } 1472 1473 id1 = TULIP_ROM_GETW(srom, 0); 1474 id2 = TULIP_ROM_GETW(srom, 2); 1475 if (id1 != 0x1109) { 1476 goto unknown; 1477 } 1478 1479 switch (id2) { 1480 case 0x1900: 1481 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911"); 1482 break; 1483 1484 case 0x2400: 1485 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6944A"); 1486 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1487 break; 1488 1489 case 0x2b00: 1490 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911A"); 1491 break; 1492 1493 case 0x3000: 1494 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6922"); 1495 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1496 break; 1497 1498 default: 1499 unknown: 1500 printf("%s: unknown Adaptec/Cogent board ID 0x%04x/0x%04x\n", 1501 sc->sc_dev.dv_xname, id1, id2); 1502 } 1503 } 1504 1505 void 1506 tlp_cogent_em1x0_tmsw_init(sc) 1507 struct tulip_softc *sc; 1508 { 1509 struct tulip_21x4x_media *tm; 1510 const char *sep = ""; 1511 1512 sc->sc_gp_dir = GPP_COGENT_EM1x0_PINS; 1513 sc->sc_opmode = OPMODE_MBO | OPMODE_PS; 1514 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 1515 1516 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 1517 tlp_mediastatus); 1518 printf("%s: ", sc->sc_dev.dv_xname); 1519 1520 #define ADD(m, c) \ 1521 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK|M_ZERO); \ 1522 tm->tm_opmode = (c); \ 1523 tm->tm_gpdata = GPP_COGENT_EM1x0_INIT; \ 1524 ifmedia_add(&sc->sc_mii.mii_media, (m), 0, tm) 1525 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 1526 1527 if (sc->sc_srom[32] == 0x15) { 1528 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, 0, 0), 1529 OPMODE_PS | OPMODE_PCS); 1530 PRINT("100baseFX"); 1531 1532 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0), 1533 OPMODE_PS | OPMODE_PCS | OPMODE_FD); 1534 PRINT("100baseFX-FDX"); 1535 printf("\n"); 1536 1537 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_FX); 1538 } else { 1539 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 1540 OPMODE_PS | OPMODE_PCS | OPMODE_SCR); 1541 PRINT("100baseTX"); 1542 1543 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0), 1544 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD); 1545 PRINT("100baseTX-FDX"); 1546 printf("\n"); 1547 1548 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX); 1549 } 1550 1551 #undef ADD 1552 #undef PRINT 1553 } 1554 1555 void tlp_pci_netwinder_21142_reset(struct tulip_softc *); 1556 1557 void 1558 tlp_pci_netwinder_21142_quirks(psc, enaddr) 1559 struct tulip_pci_softc *psc; 1560 const u_int8_t *enaddr; 1561 { 1562 struct tulip_softc *sc = &psc->sc_tulip; 1563 1564 /* 1565 * Netwinders just use MII-on_SIO. 1566 */ 1567 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1568 sc->sc_reset = tlp_pci_netwinder_21142_reset; 1569 } 1570 1571 void 1572 tlp_pci_netwinder_21142_reset(sc) 1573 struct tulip_softc *sc; 1574 { 1575 1576 /* 1577 * Reset the PHY. 1578 */ 1579 TULIP_WRITE(sc, CSR_SIAGEN, 0x0821 << 16); 1580 delay(10); 1581 TULIP_WRITE(sc, CSR_SIAGEN, 0x0000 << 16); 1582 delay(10); 1583 TULIP_WRITE(sc, CSR_SIAGEN, 0x0001 << 16); 1584 delay(10); 1585 } 1586
Indexes created Sun Sep 21 20:09:37 GMT 2025